# Mips32_CPU_v2

**Repository Path**: balaLaa/Mips32_CPU_v2

## Basic Information

- **Project Name**: Mips32_CPU_v2
- **Description**: 五级流水线的MIPS32架构CPU
- **Primary Language**: Verilog
- **License**: Not specified
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 0
- **Created**: 2020-11-22
- **Last Updated**: 2022-05-28

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

# Mips32_CPU_v2
五级流水线的MIPS32架构CPU  
项目继承自 https://github.com/huawen0327/MIPSCPU  
第二版参考了一部分OpenMIPS CPU的架构
![picture](./image/mips2.0.png)  
## 进度：
- [x] IF_ID模块
- [x] ID_EX模块(正在测试)
- [ ] EX_MEM
- [ ] MEM_WB
- [ ] WB_IF