diff --git a/.oebuild/bblayers.conf.sample b/.oebuild/bblayers.conf.sample new file mode 100644 index 0000000000000000000000000000000000000000..bfbbe0dd253125e7f875ac9803348d381cbad83e --- /dev/null +++ b/.oebuild/bblayers.conf.sample @@ -0,0 +1,16 @@ +# POKY_BBLAYERS_CONF_VERSION is increased each time build/conf/bblayers.conf +# changes incompatibly +POKY_BBLAYERS_CONF_VERSION = "2" + +BBPATH = "${TOPDIR}" +BBFILES ?= "" + +BBLAYERS ?= " \ + ##OEROOT##/meta \ + ##OEROOT##/../yocto-meta-openembedded/meta-oe \ + ##OEROOT##/../yocto-meta-openembedded/meta-python \ + ##OEROOT##/../yocto-meta-openembedded/meta-networking \ + ##OEROOT##/../yocto-meta-openembedded/meta-filesystems \ + ##OEROOT##/../yocto-meta-openeuler/meta-openeuler \ + ##OEROOT##/../yocto-meta-openeuler/bsp/meta-openeuler-bsp \ + " diff --git a/.oebuild/common.yaml b/.oebuild/common.yaml new file mode 100644 index 0000000000000000000000000000000000000000..fb2aaa6909e3da79be0efe23de27d6806195f127 --- /dev/null +++ b/.oebuild/common.yaml @@ -0,0 +1,10 @@ +repos: + yocto-poky: + url: https://gitee.com/openeuler/yocto-poky.git + path: yocto-poky + refspec: v4.0.10 + + yocto-meta-openembedded: + url: https://gitee.com/openeuler/yocto-meta-openembedded.git + path: yocto-meta-openembedded + refspec: dev_kirkstone diff --git a/.oebuild/cross-tools/README.md b/.oebuild/cross-tools/README.md new file mode 100644 index 0000000000000000000000000000000000000000..af6b047dbef17ae6ed14737f5e203b6d0750ae09 --- /dev/null +++ b/.oebuild/cross-tools/README.md @@ -0,0 +1,149 @@ +# cross_tools + +#### 介绍 + +该模块用于制作openEuler嵌入式的交叉编译器 + +#### 软件架构和配置说明 + +configs: 依赖工具及其crosstool-ng的各架构构建配置 + +prepare.sh: 用于下载构建所需的依赖仓库,并按照下载的路径,刷新config + +对于64位编译器,脚本中(update_feature)通过修改GCC源码,默认从lib64目录下寻找链接器,并在libstdc++.so中添加默认安全选项(relro、now、noexecstack) + +可通过ct-ng show-config查看配置基础情况(例如cp config_aarch64 .config && ct-ng show-config) + +编译链构建容器:swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-sdk:latest + +> 注意: +> +> 如果是自行构建,则在进入容器时使用-u 参数指定用户为openeuler + +最终配置可参见输出件*gcc -v + +例(arm64): + +```` +COLLECT_GCC=/home/openeuler/x-tools/aarch64-openeuler-linux-gnu/bin/aarch64-openeuler-linux-gnu-gcc +COLLECT_LTO_WRAPPER=/home/openeuler/x-tools/aarch64-openeuler-linux-gnu/libexec/gcc/aarch64-openeuler-linux-gnu/10.3.1/lto-wrapper +Target: aarch64-openeuler-linux-gnu +Configured with: /usr1/cross-ng_openeuler/.build/aarch64-openeuler-linux-gnu/src/gcc/configure --build=x86_64-build_pc-linux-gnu --host=x86_64-build_pc-linux-gnu --target=aarch64-openeuler-linux-gnu --prefix=/home/openeuler/x-tools/aarch64-openeuler-linux-gnu --exec_prefix=/home/openeuler/x-tools/aarch64-openeuler-linux-gnu --with-sysroot=/home/openeuler/x-tools/aarch64-openeuler-linux-gnu/aarch64-openeuler-linux-gnu/sysroot --enable-languages=c,c++,fortran --with-pkgversion='crosstool-NG 1.25.0' --enable-__cxa_atexit --disable-libmudflap --enable-libgomp --disable-libssp --disable-libquadmath --disable-libquadmath-support --disable-libsanitizer --disable-libmpx --disable-libstdcxx-verbose --with-gmp=/usr1/cross-ng_openeuler/.build/aarch64-openeuler-linux-gnu/buildtools --with-mpfr=/usr1/cross-ng_openeuler/.build/aarch64-openeuler-linux-gnu/buildtools --with-mpc=/usr1/cross-ng_openeuler/.build/aarch64-openeuler-linux-gnu/buildtools --with-isl=/usr1/cross-ng_openeuler/.build/aarch64-openeuler-linux-gnu/buildtools --enable-lto --enable-threads=posix --enable-target-optspace --enable-plugin --enable-gold --disable-nls --enable-multiarch --with-multilib-list=lp64 --with-local-prefix=/home/openeuler/x-tools/aarch64-openeuler-linux-gnu/aarch64-openeuler-linux-gnu/sysroot --enable-long-long --with-arch=armv8-a --with-gnu-as --with-gnu-ld --enable-c99 --enable-shared --enable-poison-system-directories --enable-symvers=gnu --disable-bootstrap --disable-libstdcxx-dual-abi --enable-default-pie --libdir=/home/openeuler/x-tools/aarch64-openeuler-linux-gnu/lib64 --with-build-time-tools=/home/openeuler/x-tools/aarch64-openeuler-linux-gnu/aarch64-openeuler-linux-gnu/bin +Thread model: posix +Supported LTO compression algorithms: zlib +gcc version 10.3.1 (crosstool-NG 1.25.0) +```` + +#### 使用说明 + +编译链的构建有三种方式,一种是自动构建模式,第二种是交互构建模式,第三种是原始构建模式,所谓自动构建模式就是用户确定好构建内容后oebuild自动执行构建行为,交互构建模式即为生成交叉编译链构建的基础配置文件后通过执行oebuild toolchain后根据给出的提示进行构建,原始构建模式是最能反映交叉编译链的构建流程的,前两种方式都是通过oebuild做了封装,是为了更方便开发者使用,而原始构建模式则是一步步按流程全部执行一遍,因此对于初学者,推荐原始构建模式。 + +自动构建模式: + +1,执行`oebuild generate`会弹出命令行菜单,选择`Build Toolchain`,然后选定`Auto Build`,此时会列出目前支持的交叉编译链类型,选定需要编译的交叉编译链即可,可以多选 + +2,按esc后按y保存配置文件退出,此时就开始自动进行交叉编译链的编译 + +交互构建模式: + +1,执行`oebuild generate`会弹出命令行菜单,选择`Build Toolchain`,然后按ESC后按y保存退出,此时终端窗口会有一些提示,表达的意思是进入toolchain的编译目录,然后执行`oebuild toolchain`开始构建 + +2,进入编译目录会有toolchain.yaml构建配置文件,然后执行`oebuild toolchain` + +```` +oebuild toolchain + +Welcome to the openEuler Embedded build environment, where you +can create openEuler Embedded cross-chains tools by follows: +./cross-tools/prepare.sh ./ +cp config_aarch64 .config && ct-ng build +cp config_aarch64-musl .config && ct-ng build +cp config_arm32 .config && ct-ng build +cp config_x86_64 .config && ct-ng build +cp config_riscv64 .config && ct-ng build + +[openeuler@huawei-thinkcentrem920t-n000 jjj]$ +```` +3,此时继续执行,这一步主要是下载交叉编译链需要的各种库 + +``` +./cross-tools/prepare.sh ./ +``` + +4,拷贝config配置文件,然后执行编译命令(这里以aarch64为例) + +``` +$: cp config_aarch64 .config +$: ct-ng build +``` + +原始构建模式: + +1,创建一个sdk构建容器 + +``` +docker run -it -u openeuler -v /dev/net/tun:/dev/net/tun swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-sdk bash +``` + +2,克隆yocto-meta-openeuler源码,为了提高效率,设置深度为1 + +``` +$ docker clone https://gitee.com/openeuler/yocto-meta-openeuler.git --depth=1 +``` + +3,进入.oebuild/cross-tools,执行prepare.sh下载依赖库,运行完成后会在当下目录出现open_source,这个目录存放构建交叉编译链依赖的库 + +``` +$ cd yocto-meta-openeuler/.oebuild/cross-tools +$ ./prepare.sh +``` + +4,进入configs目录,选择需要构建的编译链类型,这里以aarch64为例,构建完成后会在cross-tools/x-tools下有发布件 + +``` +$ cd configs +$ cp config_aarch64 .config +$ ct-ng build +``` + +不管是自动构建模式还是交互构建模式,在构建完后会在编译目录下生成二进制产物,编译链二进制产物在x-tools目录下,我们需要对编译链文件名做一些修改,参照如下命令: + +```` +$: cd x-tools +# 针对aarch64的处理 +$: mv aarch64-openeuler-linux-gnu openeuler_gcc_arm64le +$: tar czf openeuler_gcc_arm64le.tar.gz openeuler_gcc_arm64le +# 针对arm32的处理 +$: mv arm-openeuler-linux-gnueabi openeuler_gcc_arm32le +$: tar czf openeuler_gcc_arm32le.tar.gz openeuler_gcc_arm32le +# 针对x86-64的处理 +$: mv x86_64-openeuler-linux-gnu openeuler_gcc_x86_64 +$: tar czf openeuler_gcc_x86_64.tar.gz openeuler_gcc_x86_64 +# 针对riscv64的处理 +$: mv riscv64-openeuler-linux-gnu openeuler_gcc_riscv64 +$: tar czf openeuler_gcc_riscv64.tar.gz openeuler_gcc_riscv64 +# 针对aarch64-musl的处理 +$: mv aarch64-openeuler-linux-musl openeuler_gcc_arm64le_musl +$: tar czf openeuler_gcc_arm64le_musl.tar.gz openeuler_gcc_arm64le_musl +```` + +# release.yaml + +### 介绍 + +此文件主要用于升级toolchain工具版本,具体参数如下。 + +tag_name: 发行版标签 + +name: 发行版名称 + +body: 发行版描述 + +target_commitish: 标签关联的对应仓库分支 + +owner: 所属工作组 + +repo: gitee仓库名称 + + + diff --git a/.oebuild/cross-tools/configs/config.xml b/.oebuild/cross-tools/configs/config.xml new file mode 100644 index 0000000000000000000000000000000000000000..15eaf2204d84dbdeca72bb16e350f0ff9c24ffac --- /dev/null +++ b/.oebuild/cross-tools/configs/config.xml @@ -0,0 +1,35 @@ +COMPILER_INFO="gcc 12.3.0" +KERNEL="kernel" +KERNEL_BRANCH="5.10.0-136.20.0" +MUSLC_BRANCH="master" +COMMON_BRANCH="openEuler-24.03-LTS" +GCC="gcc" +GCC_DIR="gcc-12.3.0" +BINUTILS="binutils" +BINUTILS_DIR="binutils-2.41" +MPFR="mpfr" +MPFR_DIR="mpfr-4.2.1" +GMP="gmp" +GMP_DIR="gmp-6.3.0" +MPC="libmpc" +MPC_DIR="mpc-1.3.1" +ISL="isl" +ISL_DIR="isl-0.24" +GLIBC="glibc" +GLIBC_DIR="glibc-2.38" +MUSLC="musl" +MUSLC_DIR="musl-1.2.4" +EXPAT="expat" +EXPAT_DIR="expat-2.5.0" +GETTEXT="gettext" +GETTEXT_DIR="gettext-0.22" +LIBICONV="libiconv" +LIBICONV_DIR="libiconv-1.16" +NCURSES="ncurses" +NCURSES_DIR="ncurses-6.4" +ZLIB="zlib" +ZLIB_DIR="zlib-1.2.13" +GDB="gdb" +GDB_DIR="gdb-14.1" +ZSTD="zstd" +ZSTD_DIR="zstd-1.5.5" diff --git a/.oebuild/cross-tools/configs/config_aarch64 b/.oebuild/cross-tools/configs/config_aarch64 new file mode 100644 index 0000000000000000000000000000000000000000..347ba1a221f152c7a986f5cbb4ae89ac7df8fc40 --- /dev/null +++ b/.oebuild/cross-tools/configs/config_aarch64 @@ -0,0 +1,1110 @@ +# +# Automatically generated file; DO NOT EDIT. +# crosstool-NG 1.26.0 Configuration +# +CT_CONFIGURE_has_static_link=y +CT_CONFIGURE_has_cxx11=y +CT_CONFIGURE_has_wget=y +CT_CONFIGURE_has_curl=y +CT_CONFIGURE_has_meson=y +CT_CONFIGURE_has_ninja=y +CT_CONFIGURE_has_rsync=y +CT_CONFIGURE_has_make_3_81_or_newer=y +CT_CONFIGURE_has_make_4_0_or_newer=y +CT_CONFIGURE_has_make_4_4_or_newer=y +CT_CONFIGURE_has_libtool_2_4_or_newer=y +CT_CONFIGURE_has_libtoolize_2_4_or_newer=y +CT_CONFIGURE_has_autoconf_2_65_or_newer=y +CT_CONFIGURE_has_autoreconf_2_65_or_newer=y +CT_CONFIGURE_has_automake_1_15_or_newer=y +CT_CONFIGURE_has_gnu_m4_1_4_12_or_newer=y +CT_CONFIGURE_has_python_3_4_or_newer=y +CT_CONFIGURE_has_bison_2_7_or_newer=y +CT_CONFIGURE_has_bison_3_0_4_or_newer=y +CT_CONFIGURE_has_python=y +CT_CONFIGURE_has_git=y +CT_CONFIGURE_has_md5sum=y +CT_CONFIGURE_has_sha1sum=y +CT_CONFIGURE_has_sha256sum=y +CT_CONFIGURE_has_sha512sum=y +CT_CONFIGURE_has_install_with_strip_program=y +CT_VERSION="1.26.0" +CT_VCHECK="" +CT_CONFIG_VERSION_ENV="4" +CT_CONFIG_VERSION_CURRENT="4" +CT_CONFIG_VERSION="4" +CT_MODULES=y + +# +# set open_source dir and x-tools dir, if you set CROSS_SOURCE, you should +# set like this: /xxx/open_source/. because the CROSS_SOURCE will be finanal +# /xxx/open_source/../open_source +# +OPENSOURCE_DIR="${CROSS_SOURCE}./open_source" +X_TOOLS_DIR="${HOME}/x-tools" + +# +# Paths and misc options +# + +# +# crosstool-NG behavior +# +# CT_OBSOLETE is not set +CT_EXPERIMENTAL=y +# CT_ALLOW_BUILD_AS_ROOT is not set +# CT_ENABLE_EXPERIMENTAL_BUNDLED_PATCHES is not set +# CT_DEBUG_CT is not set + +# +# Paths +# +CT_LOCAL_TARBALLS_DIR="${HOME}/src" +CT_SAVE_TARBALLS=y +# CT_TARBALLS_BUILDROOT_LAYOUT is not set +CT_WORK_DIR="${CT_TOP_DIR}/.build" +CT_BUILD_TOP_DIR="${CT_WORK_DIR:-${CT_TOP_DIR}/.build}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_BUILD_DIR="${CT_BUILD_TOP_DIR}/build" +CT_PREFIX_DIR="${CT_PREFIX:-${X_TOOLS_DIR}}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_RM_RF_PREFIX_DIR=y +CT_REMOVE_DOCS=y +CT_INSTALL_LICENSES=y +CT_PREFIX_DIR_RO=y +CT_STRIP_HOST_TOOLCHAIN_EXECUTABLES=y +# CT_STRIP_TARGET_TOOLCHAIN_EXECUTABLES is not set +# CT_TARBALL_RESULT is not set + +# +# Downloading +# +# CT_DOWNLOAD_AGENT_WGET is not set +CT_DOWNLOAD_AGENT_CURL=y +# CT_DOWNLOAD_AGENT_NONE is not set +# CT_FORBID_DOWNLOAD is not set +# CT_FORCE_DOWNLOAD is not set +CT_CONNECT_TIMEOUT=10 +CT_DOWNLOAD_CURL_OPTIONS="--location --ftp-pasv --retry 3 --fail --silent" +# CT_ONLY_DOWNLOAD is not set +# CT_USE_MIRROR is not set +CT_VERIFY_DOWNLOAD_DIGEST=y +CT_VERIFY_DOWNLOAD_DIGEST_SHA512=y +# CT_VERIFY_DOWNLOAD_DIGEST_SHA256 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_SHA1 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_MD5 is not set +CT_VERIFY_DOWNLOAD_DIGEST_ALG="sha512" +# CT_VERIFY_DOWNLOAD_SIGNATURE is not set + +# +# Extracting +# +# CT_FORCE_EXTRACT is not set +CT_OVERRIDE_CONFIG_GUESS_SUB=y +# CT_ONLY_EXTRACT is not set +CT_PATCH_BUNDLED=y +# CT_PATCH_LOCAL is not set +# CT_PATCH_BUNDLED_LOCAL is not set +# CT_PATCH_LOCAL_BUNDLED is not set +# CT_PATCH_NONE is not set +CT_PATCH_ORDER="bundled" + +# +# Build behavior +# +CT_PARALLEL_JOBS=0 +CT_LOAD="" +CT_USE_PIPES=y +CT_EXTRA_CFLAGS_FOR_BUILD="" +CT_EXTRA_CXXFLAGS_FOR_BUILD="" +CT_EXTRA_LDFLAGS_FOR_BUILD="" +CT_EXTRA_CFLAGS_FOR_HOST="" +CT_EXTRA_LDFLAGS_FOR_HOST="" +# CT_CONFIG_SHELL_SH is not set +# CT_CONFIG_SHELL_ASH is not set +CT_CONFIG_SHELL_BASH=y +# CT_CONFIG_SHELL_CUSTOM is not set +CT_CONFIG_SHELL="${bash}" + +# +# Logging +# +# CT_LOG_ERROR is not set +# CT_LOG_WARN is not set +# CT_LOG_INFO is not set +CT_LOG_EXTRA=y +# CT_LOG_ALL is not set +# CT_LOG_DEBUG is not set +CT_LOG_LEVEL_MAX="EXTRA" +# CT_LOG_SEE_TOOLS_WARN is not set +CT_LOG_PROGRESS_BAR=y +CT_LOG_TO_FILE=y +CT_LOG_FILE_COMPRESS=y +# end of Paths and misc options + +# +# Target options +# +# CT_ARCH_ALPHA is not set +# CT_ARCH_ARC is not set +CT_ARCH_ARM=y +# CT_ARCH_AVR is not set +# CT_ARCH_BPF is not set +# CT_ARCH_C6X is not set +# CT_ARCH_LOONGARCH is not set +# CT_ARCH_M68K is not set +# CT_ARCH_MICROBLAZE is not set +# CT_ARCH_MIPS is not set +# CT_ARCH_MOXIE is not set +# CT_ARCH_MSP430 is not set +# CT_ARCH_NIOS2 is not set +# CT_ARCH_POWERPC is not set +# CT_ARCH_PRU is not set +# CT_ARCH_RISCV is not set +# CT_ARCH_S390 is not set +# CT_ARCH_SH is not set +# CT_ARCH_SPARC is not set +# CT_ARCH_X86 is not set +# CT_ARCH_XTENSA is not set +CT_ARCH="arm" +CT_ARCH_CHOICE_KSYM="ARM" +CT_ARCH_CPU="" +CT_ARCH_TUNE="" +CT_ARCH_ARM_SHOW=y + +# +# Options for arm +# +CT_ARCH_ARM_PKG_KSYM="" +CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR BPF C6X LOONGARCH M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA" +CT_ARCH_SUFFIX="" +# CT_OMIT_TARGET_VENDOR is not set + +# +# Generic target options +# +CT_MULTILIB=y +# CT_DEMULTILIB is not set +CT_ARCH_SUPPORTS_BOTH_MMU=y +CT_ARCH_DEFAULT_HAS_MMU=y +CT_ARCH_USE_MMU=y +CT_ARCH_SUPPORTS_FLAT_FORMAT=y +CT_ARCH_SUPPORTS_LIBSANITIZER=y +CT_ARCH_SUPPORTS_EITHER_ENDIAN=y +CT_ARCH_DEFAULT_LE=y +# CT_ARCH_BE is not set +CT_ARCH_LE=y +CT_ARCH_ENDIAN="little" +CT_ARCH_SUPPORTS_32=y +CT_ARCH_SUPPORTS_64=y +CT_ARCH_DEFAULT_32=y +CT_ARCH_BITNESS=64 +# CT_ARCH_32 is not set +CT_ARCH_64=y + +# +# Target optimisations +# +CT_ARCH_SUPPORTS_WITH_ARCH=y +CT_ARCH_SUPPORTS_WITH_CPU=y +CT_ARCH_SUPPORTS_WITH_TUNE=y +CT_ARCH_EXCLUSIVE_WITH_CPU=y +CT_ARCH_ARCH="" +CT_TARGET_CFLAGS="" +CT_TARGET_LDFLAGS="" +# end of Target options + +# +# Toolchain options +# + +# +# General toolchain options +# +CT_FORCE_SYSROOT=y +CT_USE_SYSROOT=y +CT_SYSROOT_NAME="sysroot" +CT_SYSROOT_DIR_PREFIX="" +CT_WANTS_STATIC_LINK=y +CT_WANTS_STATIC_LINK_CXX=y +# CT_STATIC_TOOLCHAIN is not set +CT_SHOW_CT_VERSION=y +CT_TOOLCHAIN_PKGVERSION="" +CT_TOOLCHAIN_BUGURL="" + +# +# Tuple completion and aliasing +# +CT_TARGET_VENDOR="openeuler" +CT_TARGET_ALIAS_SED_EXPR="" +CT_TARGET_ALIAS="" + +# +# Toolchain type +# +# CT_NATIVE is not set +CT_CROSS=y +# CT_CROSS_NATIVE is not set +# CT_CANADIAN is not set +CT_TOOLCHAIN_TYPE="cross" + +# +# Build system +# +CT_BUILD="" +CT_BUILD_PREFIX="" +CT_BUILD_SUFFIX="" + +# +# Misc options +# +# CT_TOOLCHAIN_ENABLE_NLS is not set +# end of Toolchain options + +# +# Operating System +# +CT_KERNEL_SUPPORTS_SHARED_LIBS=y +# CT_KERNEL_BARE_METAL is not set +CT_KERNEL_LINUX=y +CT_KERNEL="linux" +CT_KERNEL_CHOICE_KSYM="LINUX" +CT_KERNEL_LINUX_SHOW=y + +# +# Options for linux +# +CT_KERNEL_LINUX_PKG_KSYM="LINUX" +CT_LINUX_DIR_NAME="linux" +CT_LINUX_USE_WWW_KERNEL_ORG=y +# CT_LINUX_USE_ORACLE is not set +CT_LINUX_USE="LINUX" +CT_LINUX_PKG_NAME="linux" +# CT_LINUX_SRC_RELEASE is not set +# CT_LINUX_SRC_DEVEL is not set +CT_LINUX_SRC_CUSTOM=y +CT_LINUX_CUSTOM_LOCATION="${OPENSOURCE_DIR}/kernel" +CT_LINUX_PATCH_GLOBAL=y +# CT_LINUX_PATCH_BUNDLED is not set +# CT_LINUX_PATCH_LOCAL is not set +# CT_LINUX_PATCH_BUNDLED_LOCAL is not set +# CT_LINUX_PATCH_LOCAL_BUNDLED is not set +# CT_LINUX_PATCH_NONE is not set +CT_LINUX_PATCH_ORDER="global" +# CT_LINUX_VERY_NEW is not set +# CT_LINUX_V_6_4 is not set +# CT_LINUX_V_6_3 is not set +# CT_LINUX_V_6_2 is not set +# CT_LINUX_V_6_1 is not set +# CT_LINUX_V_6_0 is not set +# CT_LINUX_V_5_19 is not set +# CT_LINUX_V_5_18 is not set +# CT_LINUX_V_5_17 is not set +# CT_LINUX_V_5_16 is not set +# CT_LINUX_V_5_15 is not set +# CT_LINUX_V_5_14 is not set +# CT_LINUX_V_5_13 is not set +# CT_LINUX_V_5_12 is not set +# CT_LINUX_V_5_11 is not set +CT_LINUX_V_5_10=y +# CT_LINUX_V_5_9 is not set +# CT_LINUX_V_5_8 is not set +# CT_LINUX_V_5_7 is not set +# CT_LINUX_V_5_4 is not set +# CT_LINUX_V_5_3 is not set +# CT_LINUX_V_5_2 is not set +# CT_LINUX_V_5_1 is not set +# CT_LINUX_V_5_0 is not set +# CT_LINUX_V_4_20 is not set +# CT_LINUX_V_4_19 is not set +# CT_LINUX_V_4_18 is not set +# CT_LINUX_V_4_17 is not set +# CT_LINUX_V_4_16 is not set +# CT_LINUX_V_4_15 is not set +# CT_LINUX_V_4_14 is not set +# CT_LINUX_V_4_13 is not set +# CT_LINUX_V_4_12 is not set +# CT_LINUX_V_4_11 is not set +# CT_LINUX_V_4_10 is not set +# CT_LINUX_V_4_9 is not set +# CT_LINUX_V_4_4 is not set +# CT_LINUX_V_4_1 is not set +# CT_LINUX_V_3_16 is not set +# CT_LINUX_V_3_13 is not set +# CT_LINUX_V_3_12 is not set +# CT_LINUX_V_3_10 is not set +CT_LINUX_VERSION="5.10.185" +CT_LINUX_MIRRORS="$(CT_Mirrors kernel.org linux ${CT_LINUX_VERSION})" +CT_LINUX_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_LINUX_SIGNATURE_FORMAT="unpacked/.sign" +CT_LINUX_5_19_or_older=y +CT_LINUX_older_than_5_19=y +CT_LINUX_5_12_or_older=y +CT_LINUX_older_than_5_12=y +CT_LINUX_later_than_5_5=y +CT_LINUX_5_5_or_later=y +CT_LINUX_later_than_5_3=y +CT_LINUX_5_3_or_later=y +CT_LINUX_later_than_4_8=y +CT_LINUX_4_8_or_later=y +CT_LINUX_later_than_3_7=y +CT_LINUX_3_7_or_later=y +CT_LINUX_REQUIRE_3_7_or_later=y +CT_LINUX_later_than_3_2=y +CT_LINUX_3_2_or_later=y +CT_LINUX_REQUIRE_3_2_or_later=y +CT_KERNEL_DEP_RSYNC=y +CT_KERNEL_LINUX_VERBOSITY_0=y +# CT_KERNEL_LINUX_VERBOSITY_1 is not set +# CT_KERNEL_LINUX_VERBOSITY_2 is not set +CT_KERNEL_LINUX_VERBOSE_LEVEL=0 +CT_ALL_KERNEL_CHOICES="BARE_METAL LINUX WINDOWS" + +# +# Common kernel options +# +CT_SHARED_LIBS=y +# end of Operating System + +# +# Binary utilities +# +CT_ARCH_BINFMT_ELF=y +CT_BINUTILS_BINUTILS=y +CT_BINUTILS="binutils" +CT_BINUTILS_CHOICE_KSYM="BINUTILS" +CT_BINUTILS_BINUTILS_SHOW=y + +# +# Options for binutils +# +CT_BINUTILS_BINUTILS_PKG_KSYM="BINUTILS" +CT_BINUTILS_DIR_NAME="binutils" +CT_BINUTILS_USE_GNU=y +# CT_BINUTILS_USE_LINARO is not set +# CT_BINUTILS_USE_ORACLE is not set +CT_BINUTILS_USE="BINUTILS" +CT_BINUTILS_PKG_NAME="binutils" +# CT_BINUTILS_SRC_RELEASE is not set +# CT_BINUTILS_SRC_DEVEL is not set +CT_BINUTILS_SRC_CUSTOM=y +CT_BINUTILS_CUSTOM_LOCATION="${OPENSOURCE_DIR}/binutils/binutils-2.41" +CT_BINUTILS_PATCH_GLOBAL=y +# CT_BINUTILS_PATCH_BUNDLED is not set +# CT_BINUTILS_PATCH_LOCAL is not set +# CT_BINUTILS_PATCH_BUNDLED_LOCAL is not set +# CT_BINUTILS_PATCH_LOCAL_BUNDLED is not set +# CT_BINUTILS_PATCH_NONE is not set +CT_BINUTILS_PATCH_ORDER="global" +CT_BINUTILS_VERY_NEW=y +# CT_BINUTILS_V_2_40 is not set +# CT_BINUTILS_V_2_39 is not set +# CT_BINUTILS_V_2_38 is not set +# CT_BINUTILS_V_2_37 is not set +# CT_BINUTILS_V_2_36 is not set +# CT_BINUTILS_V_2_35 is not set +# CT_BINUTILS_V_2_34 is not set +# CT_BINUTILS_V_2_33 is not set +# CT_BINUTILS_V_2_32 is not set +# CT_BINUTILS_V_2_31 is not set +# CT_BINUTILS_V_2_30 is not set +# CT_BINUTILS_V_2_29 is not set +# CT_BINUTILS_V_2_28 is not set +# CT_BINUTILS_V_2_27 is not set +# CT_BINUTILS_V_2_26 is not set +CT_BINUTILS_VERSION="new" +CT_BINUTILS_MIRRORS="$(CT_Mirrors GNU binutils) $(CT_Mirrors sourceware binutils/releases)" +CT_BINUTILS_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_BINUTILS_SIGNATURE_FORMAT="packed/.sig" +CT_BINUTILS_later_than_2_39=y +CT_BINUTILS_2_39_or_later=y +CT_BINUTILS_later_than_2_30=y +CT_BINUTILS_2_30_or_later=y +CT_BINUTILS_later_than_2_27=y +CT_BINUTILS_2_27_or_later=y +CT_BINUTILS_later_than_2_26=y +CT_BINUTILS_2_26_or_later=y + +# +# GNU binutils +# +CT_BINUTILS_GOLD_SUPPORTS_ARCH=y +CT_BINUTILS_GOLD_SUPPORT=y +CT_BINUTILS_FORCE_LD_BFD_DEFAULT=y +# CT_BINUTILS_LINKER_LD is not set +CT_BINUTILS_LINKER_LD_GOLD=y +CT_BINUTILS_GOLD_INSTALLED=y +CT_BINUTILS_GOLD_THREADS=y +CT_BINUTILS_LINKER_BOTH=y +CT_BINUTILS_LINKERS_LIST="ld,gold" +CT_BINUTILS_LD_WRAPPER=y +CT_BINUTILS_LINKER_DEFAULT="bfd" +CT_BINUTILS_PLUGINS=y +CT_BINUTILS_RELRO=y +CT_BINUTILS_DETERMINISTIC_ARCHIVES=y +CT_BINUTILS_EXTRA_CONFIG_ARRAY="" +# CT_BINUTILS_FOR_TARGET is not set +CT_ALL_BINUTILS_CHOICES="BINUTILS" +# end of Binary utilities + +# +# C-library +# +CT_LIBC_GLIBC=y +# CT_LIBC_MUSL is not set +# CT_LIBC_UCLIBC_NG is not set +CT_LIBC="glibc" +CT_LIBC_CHOICE_KSYM="GLIBC" +CT_LIBC_GLIBC_SHOW=y + +# +# Options for glibc +# +CT_LIBC_GLIBC_PKG_KSYM="GLIBC" +CT_GLIBC_DIR_NAME="glibc" +CT_GLIBC_USE_GNU=y +# CT_GLIBC_USE_ORACLE is not set +CT_GLIBC_USE="GLIBC" +CT_GLIBC_PKG_NAME="glibc" +# CT_GLIBC_SRC_RELEASE is not set +# CT_GLIBC_SRC_DEVEL is not set +CT_GLIBC_SRC_CUSTOM=y +CT_GLIBC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/glibc/glibc-2.38" +CT_GLIBC_PATCH_GLOBAL=y +# CT_GLIBC_PATCH_BUNDLED is not set +# CT_GLIBC_PATCH_LOCAL is not set +# CT_GLIBC_PATCH_BUNDLED_LOCAL is not set +# CT_GLIBC_PATCH_LOCAL_BUNDLED is not set +# CT_GLIBC_PATCH_NONE is not set +CT_GLIBC_PATCH_ORDER="global" +# CT_GLIBC_VERY_NEW is not set +CT_GLIBC_V_2_38=y +# CT_GLIBC_V_2_37 is not set +# CT_GLIBC_V_2_36 is not set +# CT_GLIBC_V_2_35 is not set +# CT_GLIBC_V_2_34 is not set +# CT_GLIBC_V_2_33 is not set +# CT_GLIBC_V_2_32 is not set +# CT_GLIBC_V_2_31 is not set +# CT_GLIBC_V_2_30 is not set +# CT_GLIBC_V_2_29 is not set +# CT_GLIBC_V_2_28 is not set +# CT_GLIBC_V_2_27 is not set +# CT_GLIBC_V_2_26 is not set +# CT_GLIBC_V_2_25 is not set +# CT_GLIBC_V_2_24 is not set +# CT_GLIBC_V_2_23 is not set +# CT_GLIBC_V_2_19 is not set +# CT_GLIBC_V_2_17 is not set +CT_GLIBC_VERSION="2.38" +CT_GLIBC_MIRRORS="$(CT_Mirrors GNU glibc)" +CT_GLIBC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GLIBC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GLIBC_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_GLIBC_SIGNATURE_FORMAT="packed/.sig" +CT_GLIBC_2_38_or_later=y +CT_GLIBC_2_38_or_older=y +CT_GLIBC_later_than_2_37=y +CT_GLIBC_2_37_or_later=y +CT_GLIBC_later_than_2_36=y +CT_GLIBC_2_36_or_later=y +CT_GLIBC_later_than_2_34=y +CT_GLIBC_2_34_or_later=y +CT_GLIBC_later_than_2_32=y +CT_GLIBC_2_32_or_later=y +CT_GLIBC_later_than_2_31=y +CT_GLIBC_2_31_or_later=y +CT_GLIBC_later_than_2_30=y +CT_GLIBC_2_30_or_later=y +CT_GLIBC_later_than_2_29=y +CT_GLIBC_2_29_or_later=y +CT_GLIBC_later_than_2_28=y +CT_GLIBC_2_28_or_later=y +CT_GLIBC_later_than_2_27=y +CT_GLIBC_2_27_or_later=y +CT_GLIBC_later_than_2_26=y +CT_GLIBC_2_26_or_later=y +CT_GLIBC_later_than_2_25=y +CT_GLIBC_2_25_or_later=y +CT_GLIBC_later_than_2_24=y +CT_GLIBC_2_24_or_later=y +CT_GLIBC_later_than_2_23=y +CT_GLIBC_2_23_or_later=y +CT_GLIBC_later_than_2_20=y +CT_GLIBC_2_20_or_later=y +CT_GLIBC_later_than_2_17=y +CT_GLIBC_2_17_or_later=y +CT_GLIBC_later_than_2_14=y +CT_GLIBC_2_14_or_later=y +CT_GLIBC_DEP_KERNEL_HEADERS_VERSION=y +CT_GLIBC_DEP_BINUTILS=y +CT_GLIBC_DEP_GCC=y +CT_GLIBC_DEP_PYTHON=y +CT_THREADS="nptl" +CT_GLIBC_BUILD_SSP=y +CT_GLIBC_HAS_LIBIDN_ADDON=y +# CT_GLIBC_USE_LIBIDN_ADDON is not set +CT_GLIBC_NO_SPARC_V8=y +CT_GLIBC_HAS_OBSOLETE_LIBCRYPT=y +CT_GLIBC_EXTRA_CONFIG_ARRAY="--enable-crypt libc_cv_rtlddir=/lib64 libc_cv_slibdir=/lib64 --libdir=/usr/lib64 " +CT_GLIBC_CONFIGPARMS="" +CT_GLIBC_ENABLE_DEBUG=y +CT_GLIBC_EXTRA_CFLAGS="" +# CT_GLIBC_ENABLE_OBSOLETE_LIBCRYPT is not set +# CT_GLIBC_ENABLE_FORTIFIED_BUILD is not set +# CT_GLIBC_DISABLE_VERSIONING is not set +CT_GLIBC_OLDEST_ABI="" +CT_GLIBC_FORCE_UNWIND=y +# CT_GLIBC_LOCALES is not set +# CT_GLIBC_KERNEL_VERSION_NONE is not set +CT_GLIBC_KERNEL_VERSION_AS_HEADERS=y +# CT_GLIBC_KERNEL_VERSION_CHOSEN is not set +CT_GLIBC_MIN_KERNEL="5.10.185" +CT_GLIBC_SSP_DEFAULT=y +# CT_GLIBC_SSP_NO is not set +# CT_GLIBC_SSP_YES is not set +# CT_GLIBC_SSP_ALL is not set +# CT_GLIBC_SSP_STRONG is not set +CT_GLIBC_ENABLE_WERROR=y +# CT_GLIBC_ENABLE_COMMON_FLAG is not set +CT_ALL_LIBC_CHOICES="AVR_LIBC GLIBC MINGW_W64 MOXIEBOX MUSL NEWLIB NONE PICOLIBC UCLIBC_NG" +CT_LIBC_SUPPORT_THREADS_ANY=y +CT_LIBC_SUPPORT_THREADS_NATIVE=y + +# +# Common C library options +# +CT_THREADS_NATIVE=y +# CT_CREATE_LDSO_CONF is not set +CT_LIBC_XLDD=y +# end of C-library + +# +# C compiler +# +CT_CC_CORE_NEEDED=y +CT_CC_SUPPORT_CXX=y +CT_CC_SUPPORT_FORTRAN=y +CT_CC_SUPPORT_ADA=y +CT_CC_SUPPORT_D=y +CT_CC_SUPPORT_JIT=y +CT_CC_SUPPORT_OBJC=y +CT_CC_SUPPORT_OBJCXX=y +CT_CC_SUPPORT_GOLANG=y +CT_CC_GCC=y +CT_CC="gcc" +CT_CC_CHOICE_KSYM="GCC" +CT_CC_GCC_SHOW=y + +# +# Options for gcc +# +CT_CC_GCC_PKG_KSYM="GCC" +CT_GCC_DIR_NAME="gcc" +CT_GCC_USE_GNU=y +# CT_GCC_USE_LINARO is not set +# CT_GCC_USE_ORACLE is not set +CT_GCC_USE="GCC" +CT_GCC_PKG_NAME="gcc" +# CT_GCC_SRC_RELEASE is not set +# CT_GCC_SRC_DEVEL is not set +CT_GCC_SRC_CUSTOM=y +CT_GCC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gcc/gcc-12.3.0" +CT_GCC_PATCH_GLOBAL=y +# CT_GCC_PATCH_BUNDLED is not set +# CT_GCC_PATCH_LOCAL is not set +# CT_GCC_PATCH_BUNDLED_LOCAL is not set +# CT_GCC_PATCH_LOCAL_BUNDLED is not set +# CT_GCC_PATCH_NONE is not set +CT_GCC_PATCH_ORDER="global" +# CT_GCC_VERY_NEW is not set +# CT_GCC_V_13 is not set +CT_GCC_V_12=y +# CT_GCC_V_11 is not set +# CT_GCC_V_10 is not set +# CT_GCC_V_9 is not set +# CT_GCC_V_8 is not set +# CT_GCC_V_7 is not set +# CT_GCC_V_6 is not set +CT_GCC_VERSION="12.3.0" +CT_GCC_MIRRORS="$(CT_Mirrors GNU gcc/gcc-${CT_GCC_VERSION}) $(CT_Mirrors sourceware gcc/releases/gcc-${CT_GCC_VERSION})" +CT_GCC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GCC_SIGNATURE_FORMAT="" +CT_GCC_13_or_older=y +CT_GCC_older_than_13=y +CT_GCC_later_than_12=y +CT_GCC_12_or_later=y +CT_GCC_later_than_11=y +CT_GCC_11_or_later=y +CT_GCC_later_than_10=y +CT_GCC_10_or_later=y +CT_GCC_later_than_9=y +CT_GCC_9_or_later=y +CT_GCC_later_than_8=y +CT_GCC_8_or_later=y +CT_GCC_later_than_7=y +CT_GCC_7_or_later=y +CT_GCC_later_than_6=y +CT_GCC_6_or_later=y +CT_GCC_REQUIRE_6_or_later=y +CT_GCC_later_than_5=y +CT_GCC_5_or_later=y +CT_GCC_REQUIRE_5_or_later=y +CT_GCC_later_than_4_9=y +CT_GCC_4_9_or_later=y +CT_GCC_REQUIRE_4_9_or_later=y +CT_CC_GCC_ENABLE_PLUGINS=y +CT_CC_GCC_GOLD=y +CT_CC_GCC_HAS_LIBMPX=y +CT_CC_GCC_ENABLE_CXX_FLAGS="" +CT_CC_GCC_CORE_EXTRA_CONFIG_ARRAY="" +CT_CC_GCC_EXTRA_CONFIG_ARRAY="--with-arch=armv8-a --with-gnu-as --with-gnu-ld --enable-c99 --enable-shared --enable-poison-system-directories --enable-symvers=gnu --disable-bootstrap --disable-libstdcxx-dual-abi --enable-default-pie --libdir=\"${CT_PREFIX_DIR}/lib64\" --with-build-time-tools=\"${CT_PREFIX_DIR}/${CT_TARGET}/bin\"" +CT_CC_GCC_MULTILIB_LIST="lp64" +CT_CC_GCC_STATIC_LIBSTDCXX=y +# CT_CC_GCC_SYSTEM_ZLIB is not set +CT_CC_GCC_CONFIG_TLS=m + +# +# Optimisation features +# +CT_CC_GCC_USE_GRAPHITE=y +CT_CC_GCC_USE_LTO=y +CT_CC_GCC_LTO_ZSTD=m + +# +# Settings for libraries running on target +# +# CT_CC_GCC_ENABLE_DEFAULT_PIE is not set +CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y +# CT_CC_GCC_LIBMUDFLAP is not set +CT_CC_GCC_LIBGOMP=y +# CT_CC_GCC_LIBSSP is not set +# CT_CC_GCC_LIBQUADMATH is not set +# CT_CC_GCC_LIBSANITIZER is not set +CT_CC_GCC_LIBSTDCXX_VERBOSE=m + +# +# Misc. obscure options. +# +CT_CC_CXA_ATEXIT=y +CT_CC_GCC_TM_CLONE_REGISTRY=m +# CT_CC_GCC_DISABLE_PCH is not set +CT_CC_GCC_SJLJ_EXCEPTIONS=m +CT_CC_GCC_LDBL_128=m +# CT_CC_GCC_BUILD_ID is not set +CT_CC_GCC_LNK_HASH_STYLE_DEFAULT=y +# CT_CC_GCC_LNK_HASH_STYLE_SYSV is not set +# CT_CC_GCC_LNK_HASH_STYLE_GNU is not set +# CT_CC_GCC_LNK_HASH_STYLE_BOTH is not set +CT_CC_GCC_LNK_HASH_STYLE="" +CT_CC_GCC_DEC_FLOATS_AUTO=y +# CT_CC_GCC_DEC_FLOATS_BID is not set +# CT_CC_GCC_DEC_FLOATS_DPD is not set +# CT_CC_GCC_DEC_FLOATS_NO is not set +CT_CC_GCC_DEC_FLOATS="" +CT_ALL_CC_CHOICES="GCC" + +# +# Additional supported languages: +# +CT_CC_LANG_CXX=y +CT_CC_LANG_FORTRAN=y +# CT_CC_LANG_JIT is not set +# CT_CC_LANG_ADA is not set +# CT_CC_LANG_D is not set +# CT_CC_LANG_OBJC is not set +# CT_CC_LANG_OBJCXX is not set +# CT_CC_LANG_GOLANG is not set +CT_CC_LANG_OTHERS="" +# end of C compiler + +# +# Debug facilities +# +# CT_DEBUG_DUMA is not set +CT_DEBUG_GDB=y +CT_DEBUG_GDB_PKG_KSYM="GDB" +CT_GDB_DIR_NAME="gdb" +CT_GDB_PKG_NAME="gdb" +# CT_GDB_SRC_RELEASE is not set +# CT_GDB_SRC_DEVEL is not set +CT_GDB_SRC_CUSTOM=y +CT_GDB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gdb/gdb-14.1" +CT_GDB_PATCH_GLOBAL=y +# CT_GDB_PATCH_BUNDLED is not set +# CT_GDB_PATCH_LOCAL is not set +# CT_GDB_PATCH_BUNDLED_LOCAL is not set +# CT_GDB_PATCH_LOCAL_BUNDLED is not set +# CT_GDB_PATCH_NONE is not set +CT_GDB_PATCH_ORDER="global" +CT_GDB_VERY_NEW=y +# CT_GDB_V_13 is not set +# CT_GDB_V_12 is not set +# CT_GDB_V_11 is not set +# CT_GDB_V_10 is not set +# CT_GDB_V_9 is not set +# CT_GDB_V_8_3 is not set +CT_GDB_VERSION="new" +CT_GDB_MIRRORS="$(CT_Mirrors GNU gdb) $(CT_Mirrors sourceware gdb/releases)" +CT_GDB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GDB_SIGNATURE_FORMAT="" +CT_GDB_later_than_13=y +CT_GDB_13_or_later=y +CT_GDB_later_than_12=y +CT_GDB_12_or_later=y +CT_GDB_later_than_11=y +CT_GDB_11_or_later=y +CT_GDB_later_than_10=y +CT_GDB_10_or_later=y +CT_GDB_later_than_8_3=y +CT_GDB_8_3_or_later=y +CT_GDB_CROSS=y +# CT_GDB_CROSS_STATIC is not set +# CT_GDB_CROSS_SIM is not set +CT_GDB_CROSS_PYTHON=y +CT_GDB_CROSS_PYTHON_BINARY="" +CT_GDB_CROSS_EXTRA_CONFIG_ARRAY="" +# CT_GDB_NATIVE is not set +CT_GDB_GDBSERVER=y +# CT_GDB_NATIVE_BUILD_IPA_LIB is not set +# CT_GDB_NATIVE_STATIC is not set +# CT_GDB_NATIVE_STATIC_LIBSTDCXX is not set +CT_GDB_GDBSERVER_TOPLEVEL=y +# CT_DEBUG_LTRACE is not set +# CT_DEBUG_STRACE is not set +CT_ALL_DEBUG_CHOICES="DUMA GDB LTRACE STRACE" +# end of Debug facilities + +# +# Companion libraries +# +# CT_COMPLIBS_CHECK is not set +# CT_COMP_LIBS_CLOOG is not set +CT_COMP_LIBS_EXPAT=y +CT_COMP_LIBS_EXPAT_PKG_KSYM="EXPAT" +CT_EXPAT_DIR_NAME="expat" +CT_EXPAT_PKG_NAME="expat" +# CT_EXPAT_SRC_RELEASE is not set +# CT_EXPAT_SRC_DEVEL is not set +CT_EXPAT_SRC_CUSTOM=y +CT_EXPAT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/expat/expat-2.5.0" +CT_EXPAT_PATCH_GLOBAL=y +# CT_EXPAT_PATCH_BUNDLED is not set +# CT_EXPAT_PATCH_LOCAL is not set +# CT_EXPAT_PATCH_BUNDLED_LOCAL is not set +# CT_EXPAT_PATCH_LOCAL_BUNDLED is not set +# CT_EXPAT_PATCH_NONE is not set +CT_EXPAT_PATCH_ORDER="global" +# CT_EXPAT_VERY_NEW is not set +CT_EXPAT_V_2_5=y +CT_EXPAT_VERSION="2.5.0" +CT_EXPAT_MIRRORS="http://downloads.sourceforge.net/project/expat/expat/${CT_EXPAT_VERSION} https://github.com/libexpat/libexpat/releases/download/R_${CT_EXPAT_VERSION//./_}" +CT_EXPAT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2 .tar.gz" +CT_EXPAT_SIGNATURE_FORMAT="" +CT_COMP_LIBS_GETTEXT=y +CT_COMP_LIBS_GETTEXT_PKG_KSYM="GETTEXT" +CT_GETTEXT_DIR_NAME="gettext" +CT_GETTEXT_PKG_NAME="gettext" +# CT_GETTEXT_SRC_RELEASE is not set +# CT_GETTEXT_SRC_DEVEL is not set +CT_GETTEXT_SRC_CUSTOM=y +CT_GETTEXT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gettext/gettext-0.22" +CT_GETTEXT_PATCH_GLOBAL=y +# CT_GETTEXT_PATCH_BUNDLED is not set +# CT_GETTEXT_PATCH_LOCAL is not set +# CT_GETTEXT_PATCH_BUNDLED_LOCAL is not set +# CT_GETTEXT_PATCH_LOCAL_BUNDLED is not set +# CT_GETTEXT_PATCH_NONE is not set +CT_GETTEXT_PATCH_ORDER="global" +CT_GETTEXT_VERY_NEW=y +# CT_GETTEXT_V_0_21 is not set +# CT_GETTEXT_V_0_20_1 is not set +# CT_GETTEXT_V_0_19_8_1 is not set +CT_GETTEXT_VERSION="new" +CT_GETTEXT_MIRRORS="$(CT_Mirrors GNU gettext)" +CT_GETTEXT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GETTEXT_SIGNATURE_FORMAT="packed/.sig" +CT_GETTEXT_later_than_0_21=y +CT_GETTEXT_0_21_or_later=y +CT_GETTEXT_INCOMPATIBLE_WITH_UCLIBC_NG=y + +# +# This version of gettext is not compatible with uClibc-NG. Select +# + +# +# a different version if uClibc-NG is used on the target or (in a +# + +# +# Canadian cross build) on the host. +# +CT_COMP_LIBS_GMP=y +CT_COMP_LIBS_GMP_PKG_KSYM="GMP" +CT_GMP_DIR_NAME="gmp" +CT_GMP_PKG_NAME="gmp" +# CT_GMP_SRC_RELEASE is not set +# CT_GMP_SRC_DEVEL is not set +CT_GMP_SRC_CUSTOM=y +CT_GMP_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gmp/gmp-6.3.0" +CT_GMP_PATCH_GLOBAL=y +# CT_GMP_PATCH_BUNDLED is not set +# CT_GMP_PATCH_LOCAL is not set +# CT_GMP_PATCH_BUNDLED_LOCAL is not set +# CT_GMP_PATCH_LOCAL_BUNDLED is not set +# CT_GMP_PATCH_NONE is not set +CT_GMP_PATCH_ORDER="global" +# CT_GMP_VERY_NEW is not set +CT_GMP_V_6_2=y +# CT_GMP_V_6_1 is not set +CT_GMP_VERSION="6.2.1" +CT_GMP_MIRRORS="https://gmplib.org/download/gmp https://gmplib.org/download/gmp/archive $(CT_Mirrors GNU gmp)" +CT_GMP_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2" +CT_GMP_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_ISL=y +CT_COMP_LIBS_ISL_PKG_KSYM="ISL" +CT_ISL_DIR_NAME="isl" +CT_ISL_PKG_NAME="isl" +# CT_ISL_SRC_RELEASE is not set +# CT_ISL_SRC_DEVEL is not set +CT_ISL_SRC_CUSTOM=y +CT_ISL_CUSTOM_LOCATION="${OPENSOURCE_DIR}/isl/isl-0.24" +CT_ISL_PATCH_GLOBAL=y +# CT_ISL_PATCH_BUNDLED is not set +# CT_ISL_PATCH_LOCAL is not set +# CT_ISL_PATCH_BUNDLED_LOCAL is not set +# CT_ISL_PATCH_LOCAL_BUNDLED is not set +# CT_ISL_PATCH_NONE is not set +CT_ISL_PATCH_ORDER="global" +# CT_ISL_VERY_NEW is not set +# CT_ISL_V_0_26 is not set +# CT_ISL_V_0_25 is not set +# CT_ISL_V_0_24 is not set +# CT_ISL_V_0_23 is not set +# CT_ISL_V_0_22 is not set +# CT_ISL_V_0_21 is not set +# CT_ISL_V_0_20 is not set +# CT_ISL_V_0_19 is not set +# CT_ISL_V_0_18 is not set +# CT_ISL_V_0_17 is not set +CT_ISL_V_0_16=y +# CT_ISL_V_0_15 is not set +CT_ISL_VERSION="0.16.1" +CT_ISL_MIRRORS="https://libisl.sourceforge.io" +CT_ISL_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_ISL_SIGNATURE_FORMAT="" +CT_ISL_0_18_or_older=y +CT_ISL_older_than_0_18=y +CT_ISL_later_than_0_15=y +CT_ISL_0_15_or_later=y +# CT_COMP_LIBS_LIBELF is not set +CT_COMP_LIBS_LIBICONV=y +CT_COMP_LIBS_LIBICONV_PKG_KSYM="LIBICONV" +CT_LIBICONV_DIR_NAME="libiconv" +CT_LIBICONV_PKG_NAME="libiconv" +# CT_LIBICONV_SRC_RELEASE is not set +# CT_LIBICONV_SRC_DEVEL is not set +CT_LIBICONV_SRC_CUSTOM=y +CT_LIBICONV_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libiconv/libiconv-1.16" +CT_LIBICONV_PATCH_GLOBAL=y +# CT_LIBICONV_PATCH_BUNDLED is not set +# CT_LIBICONV_PATCH_LOCAL is not set +# CT_LIBICONV_PATCH_BUNDLED_LOCAL is not set +# CT_LIBICONV_PATCH_LOCAL_BUNDLED is not set +# CT_LIBICONV_PATCH_NONE is not set +CT_LIBICONV_PATCH_ORDER="global" +# CT_LIBICONV_VERY_NEW is not set +CT_LIBICONV_V_1_16=y +# CT_LIBICONV_V_1_15 is not set +CT_LIBICONV_VERSION="1.16" +CT_LIBICONV_MIRRORS="$(CT_Mirrors GNU libiconv)" +CT_LIBICONV_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_FORMATS=".tar.gz" +CT_LIBICONV_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_MPC=y +CT_COMP_LIBS_MPC_PKG_KSYM="MPC" +CT_MPC_DIR_NAME="mpc" +CT_MPC_PKG_NAME="mpc" +# CT_MPC_SRC_RELEASE is not set +# CT_MPC_SRC_DEVEL is not set +CT_MPC_SRC_CUSTOM=y +CT_MPC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libmpc/mpc-1.3.1" +CT_MPC_PATCH_GLOBAL=y +# CT_MPC_PATCH_BUNDLED is not set +# CT_MPC_PATCH_LOCAL is not set +# CT_MPC_PATCH_BUNDLED_LOCAL is not set +# CT_MPC_PATCH_LOCAL_BUNDLED is not set +# CT_MPC_PATCH_NONE is not set +CT_MPC_PATCH_ORDER="global" +CT_MPC_VERY_NEW=y +# CT_MPC_V_1_2 is not set +CT_MPC_VERSION="new" +CT_MPC_MIRRORS="https://www.multiprecision.org/downloads $(CT_Mirrors GNU mpc)" +CT_MPC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_FORMATS=".tar.gz" +CT_MPC_SIGNATURE_FORMAT="packed/.sig" +CT_MPC_later_than_1_1_0=y +CT_MPC_1_1_0_or_later=y +CT_COMP_LIBS_MPFR=y +CT_COMP_LIBS_MPFR_PKG_KSYM="MPFR" +CT_MPFR_DIR_NAME="mpfr" +CT_MPFR_PKG_NAME="mpfr" +# CT_MPFR_SRC_RELEASE is not set +# CT_MPFR_SRC_DEVEL is not set +CT_MPFR_SRC_CUSTOM=y +CT_MPFR_CUSTOM_LOCATION="${OPENSOURCE_DIR}/mpfr/mpfr-4.2.1" +CT_MPFR_PATCH_GLOBAL=y +# CT_MPFR_PATCH_BUNDLED is not set +# CT_MPFR_PATCH_LOCAL is not set +# CT_MPFR_PATCH_BUNDLED_LOCAL is not set +# CT_MPFR_PATCH_LOCAL_BUNDLED is not set +# CT_MPFR_PATCH_NONE is not set +CT_MPFR_PATCH_ORDER="global" +CT_MPFR_VERY_NEW=y +# CT_MPFR_V_4_2 is not set +CT_MPFR_VERSION="new" +CT_MPFR_MIRRORS="https://www.mpfr.org/mpfr-${CT_MPFR_VERSION} $(CT_Mirrors GNU mpfr)" +CT_MPFR_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz .zip" +CT_MPFR_SIGNATURE_FORMAT="packed/.asc" +CT_MPFR_later_than_4_0_0=y +CT_MPFR_4_0_0_or_later=y +CT_COMP_LIBS_NCURSES=y +CT_COMP_LIBS_NCURSES_PKG_KSYM="NCURSES" +CT_NCURSES_DIR_NAME="ncurses" +CT_NCURSES_PKG_NAME="ncurses" +# CT_NCURSES_SRC_RELEASE is not set +# CT_NCURSES_SRC_DEVEL is not set +CT_NCURSES_SRC_CUSTOM=y +CT_NCURSES_CUSTOM_LOCATION="${OPENSOURCE_DIR}/ncurses/ncurses-6.4" +CT_NCURSES_PATCH_GLOBAL=y +# CT_NCURSES_PATCH_BUNDLED is not set +# CT_NCURSES_PATCH_LOCAL is not set +# CT_NCURSES_PATCH_BUNDLED_LOCAL is not set +# CT_NCURSES_PATCH_LOCAL_BUNDLED is not set +# CT_NCURSES_PATCH_NONE is not set +CT_NCURSES_PATCH_ORDER="global" +# CT_NCURSES_VERY_NEW is not set +CT_NCURSES_V_6_4=y +# CT_NCURSES_V_6_2 is not set +# CT_NCURSES_V_6_1 is not set +# CT_NCURSES_V_6_0 is not set +CT_NCURSES_VERSION="6.4" +CT_NCURSES_MIRRORS="https://invisible-mirror.net/archives/ncurses $(CT_Mirrors GNU ncurses)" +CT_NCURSES_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_FORMATS=".tar.gz" +CT_NCURSES_SIGNATURE_FORMAT="packed/.sig" +CT_NCURSES_NEW_ABI=y +CT_NCURSES_HOST_CONFIG_ARGS="" +CT_NCURSES_HOST_DISABLE_DB=y +CT_NCURSES_HOST_FALLBACKS="linux,xterm,xterm-color,xterm-256color,vt100" +CT_NCURSES_TARGET_CONFIG_ARGS="" +# CT_NCURSES_TARGET_DISABLE_DB is not set +CT_NCURSES_TARGET_FALLBACKS="" +CT_COMP_LIBS_ZLIB=y +CT_COMP_LIBS_ZLIB_PKG_KSYM="ZLIB" +CT_ZLIB_DIR_NAME="zlib" +CT_ZLIB_PKG_NAME="zlib" +# CT_ZLIB_SRC_RELEASE is not set +# CT_ZLIB_SRC_DEVEL is not set +CT_ZLIB_SRC_CUSTOM=y +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.3.1" +CT_ZLIB_PATCH_GLOBAL=y +# CT_ZLIB_PATCH_BUNDLED is not set +# CT_ZLIB_PATCH_LOCAL is not set +# CT_ZLIB_PATCH_BUNDLED_LOCAL is not set +# CT_ZLIB_PATCH_LOCAL_BUNDLED is not set +# CT_ZLIB_PATCH_NONE is not set +CT_ZLIB_PATCH_ORDER="global" +CT_ZLIB_VERY_NEW=y +# CT_ZLIB_V_1_2_13 is not set +CT_ZLIB_VERSION="new" +CT_ZLIB_MIRRORS="https://github.com/madler/zlib/releases/download/v${CT_ZLIB_VERSION} https://www.zlib.net/" +CT_ZLIB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_ZLIB_SIGNATURE_FORMAT="packed/.asc" +CT_COMP_LIBS_ZSTD=y +CT_COMP_LIBS_ZSTD_PKG_KSYM="ZSTD" +CT_ZSTD_DIR_NAME="zstd" +CT_ZSTD_PKG_NAME="zstd" +# CT_ZSTD_SRC_RELEASE is not set +# CT_ZSTD_SRC_DEVEL is not set +CT_ZSTD_SRC_CUSTOM=y +CT_ZSTD_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zstd/zstd-1.5.5" +CT_ZSTD_PATCH_GLOBAL=y +# CT_ZSTD_PATCH_BUNDLED is not set +# CT_ZSTD_PATCH_LOCAL is not set +# CT_ZSTD_PATCH_BUNDLED_LOCAL is not set +# CT_ZSTD_PATCH_LOCAL_BUNDLED is not set +# CT_ZSTD_PATCH_NONE is not set +CT_ZSTD_PATCH_ORDER="global" +# CT_ZSTD_VERY_NEW is not set +CT_ZSTD_V_1_5_5=y +# CT_ZSTD_V_1_5_2 is not set +CT_ZSTD_VERSION="1.5.5" +CT_ZSTD_MIRRORS="https://github.com/facebook/zstd/releases/download/v${CT_ZSTD_VERSION} https://www.zstd.net/" +CT_ZSTD_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_FORMATS=".tar.gz" +CT_ZSTD_SIGNATURE_FORMAT="packed/.sig" +CT_ALL_COMP_LIBS_CHOICES="CLOOG EXPAT GETTEXT GMP GNUPRUMCU ISL LIBELF LIBICONV MPC MPFR NCURSES NEWLIB_NANO PICOLIBC ZLIB ZSTD" +CT_LIBICONV_NEEDED=y +CT_GETTEXT_NEEDED=y +CT_GMP_NEEDED=y +CT_MPFR_NEEDED=y +CT_ISL_NEEDED=y +CT_MPC_NEEDED=y +CT_EXPAT_NEEDED=y +CT_NCURSES_NEEDED=y +CT_ZLIB_NEEDED=y +CT_ZSTD_NEEDED=y +CT_LIBICONV=y +CT_GETTEXT=y +CT_GMP=y +CT_MPFR=y +CT_ISL=y +CT_MPC=y +CT_EXPAT=y +CT_NCURSES=y +CT_ZLIB=y +CT_ZSTD=y +# end of Companion libraries + +# +# Companion tools +# +# CT_COMP_TOOLS_FOR_HOST is not set +# CT_COMP_TOOLS_AUTOCONF is not set +# CT_COMP_TOOLS_AUTOMAKE is not set +# CT_COMP_TOOLS_BISON is not set +# CT_COMP_TOOLS_DTC is not set +# CT_COMP_TOOLS_LIBTOOL is not set +# CT_COMP_TOOLS_M4 is not set +# CT_COMP_TOOLS_MAKE is not set +CT_ALL_COMP_TOOLS_CHOICES="AUTOCONF AUTOMAKE BISON DTC LIBTOOL M4 MAKE" +# end of Companion tools + +# +# Test suite +# +# CT_TEST_SUITE_GCC is not set +# end of Test suite diff --git a/.oebuild/cross-tools/configs/config_aarch64-musl b/.oebuild/cross-tools/configs/config_aarch64-musl new file mode 100644 index 0000000000000000000000000000000000000000..7fbea9ab3c8f9f0f1838bf2c2001b6279844967f --- /dev/null +++ b/.oebuild/cross-tools/configs/config_aarch64-musl @@ -0,0 +1,980 @@ +# +# Automatically generated file; DO NOT EDIT. +# crosstool-NG 1.25.0 Configuration +# +CT_CONFIGURE_has_static_link=y +CT_CONFIGURE_has_cxx11=y +CT_CONFIGURE_has_curl=y +CT_CONFIGURE_has_rsync=y +CT_CONFIGURE_has_make_3_81_or_newer=y +CT_CONFIGURE_has_make_4_0_or_newer=y +CT_CONFIGURE_has_libtool_2_4_or_newer=y +CT_CONFIGURE_has_libtoolize_2_4_or_newer=y +CT_CONFIGURE_has_autoconf_2_65_or_newer=y +CT_CONFIGURE_has_autoreconf_2_65_or_newer=y +CT_CONFIGURE_has_automake_1_15_or_newer=y +CT_CONFIGURE_has_gnu_m4_1_4_12_or_newer=y +CT_CONFIGURE_has_python_3_4_or_newer=y +CT_CONFIGURE_has_bison_2_7_or_newer=y +CT_CONFIGURE_has_python=y +CT_CONFIGURE_has_git=y +CT_CONFIGURE_has_md5sum=y +CT_CONFIGURE_has_sha1sum=y +CT_CONFIGURE_has_sha256sum=y +CT_CONFIGURE_has_sha512sum=y +CT_CONFIGURE_has_install_with_strip_program=y +CT_VERSION="1.25.0" +CT_VCHECK="" +CT_CONFIG_VERSION_ENV="4" +CT_CONFIG_VERSION_CURRENT="4" +CT_CONFIG_VERSION="4" +CT_MODULES=y + +# +# set open_source dir and x-tools dir, if you set CROSS_SOURCE, you should +# set like this: /xxx/open_source/. because the CROSS_SOURCE will be finanal +# /xxx/open_source/../open_source +# +OPENSOURCE_DIR="${CROSS_SOURCE}./open_source" +X_TOOLS_DIR="${HOME}/x-tools" + +# +# Paths and misc options +# + +# +# crosstool-NG behavior +# +# CT_OBSOLETE is not set +CT_EXPERIMENTAL=y +# CT_ALLOW_BUILD_AS_ROOT is not set +# CT_DEBUG_CT is not set + +# +# Paths +# +CT_LOCAL_TARBALLS_DIR="${HOME}/src" +CT_SAVE_TARBALLS=y +# CT_TARBALLS_BUILDROOT_LAYOUT is not set +CT_WORK_DIR="${CT_TOP_DIR}/.build" +CT_BUILD_TOP_DIR="${CT_WORK_DIR:-${CT_TOP_DIR}/.build}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_BUILD_DIR="${CT_BUILD_TOP_DIR}/build" +CT_PREFIX_DIR="${CT_PREFIX:-${X_TOOLS_DIR}}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_RM_RF_PREFIX_DIR=y +CT_REMOVE_DOCS=y +CT_INSTALL_LICENSES=y +CT_PREFIX_DIR_RO=y +CT_STRIP_HOST_TOOLCHAIN_EXECUTABLES=y +# CT_STRIP_TARGET_TOOLCHAIN_EXECUTABLES is not set + +# +# Downloading +# +CT_DOWNLOAD_AGENT_CURL=y +# CT_DOWNLOAD_AGENT_NONE is not set +# CT_FORBID_DOWNLOAD is not set +# CT_FORCE_DOWNLOAD is not set +CT_CONNECT_TIMEOUT=10 +CT_DOWNLOAD_CURL_OPTIONS="--location --ftp-pasv --retry 3 --fail --silent" +# CT_ONLY_DOWNLOAD is not set +# CT_USE_MIRROR is not set +CT_VERIFY_DOWNLOAD_DIGEST=y +CT_VERIFY_DOWNLOAD_DIGEST_SHA512=y +# CT_VERIFY_DOWNLOAD_DIGEST_SHA256 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_SHA1 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_MD5 is not set +CT_VERIFY_DOWNLOAD_DIGEST_ALG="sha512" +# CT_VERIFY_DOWNLOAD_SIGNATURE is not set + +# +# Extracting +# +# CT_FORCE_EXTRACT is not set +CT_OVERRIDE_CONFIG_GUESS_SUB=y +# CT_ONLY_EXTRACT is not set +CT_PATCH_BUNDLED=y +# CT_PATCH_LOCAL is not set +# CT_PATCH_BUNDLED_LOCAL is not set +# CT_PATCH_LOCAL_BUNDLED is not set +# CT_PATCH_NONE is not set +CT_PATCH_ORDER="bundled" + +# +# Build behavior +# +CT_PARALLEL_JOBS=0 +CT_LOAD="" +CT_USE_PIPES=y +CT_EXTRA_CFLAGS_FOR_BUILD="" +CT_EXTRA_CXXFLAGS_FOR_BUILD="" +CT_EXTRA_LDFLAGS_FOR_BUILD="" +CT_EXTRA_CFLAGS_FOR_HOST="" +CT_EXTRA_LDFLAGS_FOR_HOST="" +# CT_CONFIG_SHELL_SH is not set +# CT_CONFIG_SHELL_ASH is not set +CT_CONFIG_SHELL_BASH=y +# CT_CONFIG_SHELL_CUSTOM is not set +CT_CONFIG_SHELL="${bash}" + +# +# Logging +# +# CT_LOG_ERROR is not set +# CT_LOG_WARN is not set +# CT_LOG_INFO is not set +CT_LOG_EXTRA=y +# CT_LOG_ALL is not set +# CT_LOG_DEBUG is not set +CT_LOG_LEVEL_MAX="EXTRA" +# CT_LOG_SEE_TOOLS_WARN is not set +CT_LOG_PROGRESS_BAR=y +CT_LOG_TO_FILE=y +CT_LOG_FILE_COMPRESS=y +# end of Paths and misc options + +# +# Target options +# +# CT_ARCH_ALPHA is not set +# CT_ARCH_ARC is not set +CT_ARCH_ARM=y +# CT_ARCH_AVR is not set +# CT_ARCH_C6X is not set +# CT_ARCH_M68K is not set +# CT_ARCH_MICROBLAZE is not set +# CT_ARCH_MIPS is not set +# CT_ARCH_MOXIE is not set +# CT_ARCH_MSP430 is not set +# CT_ARCH_NIOS2 is not set +# CT_ARCH_POWERPC is not set +# CT_ARCH_PRU is not set +# CT_ARCH_RISCV is not set +# CT_ARCH_S390 is not set +# CT_ARCH_SH is not set +# CT_ARCH_SPARC is not set +# CT_ARCH_X86 is not set +# CT_ARCH_XTENSA is not set +CT_ARCH="arm" +CT_ARCH_CHOICE_KSYM="ARM" +CT_ARCH_CPU="" +CT_ARCH_TUNE="" +CT_ARCH_ARM_SHOW=y + +# +# Options for arm +# +CT_ARCH_ARM_PKG_KSYM="" +CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR C6X M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA" +CT_ARCH_SUFFIX="" +# CT_OMIT_TARGET_VENDOR is not set + +# +# Generic target options +# +# CT_MULTILIB is not set +CT_DEMULTILIB=y +CT_ARCH_SUPPORTS_BOTH_MMU=y +CT_ARCH_DEFAULT_HAS_MMU=y +CT_ARCH_USE_MMU=y +CT_ARCH_SUPPORTS_FLAT_FORMAT=y +CT_ARCH_SUPPORTS_EITHER_ENDIAN=y +CT_ARCH_DEFAULT_LE=y +# CT_ARCH_BE is not set +CT_ARCH_LE=y +CT_ARCH_ENDIAN="little" +CT_ARCH_SUPPORTS_32=y +CT_ARCH_SUPPORTS_64=y +CT_ARCH_DEFAULT_32=y +CT_ARCH_BITNESS=64 +# CT_ARCH_32 is not set +CT_ARCH_64=y + +# +# Target optimisations +# +CT_ARCH_SUPPORTS_WITH_ARCH=y +CT_ARCH_SUPPORTS_WITH_CPU=y +CT_ARCH_SUPPORTS_WITH_TUNE=y +CT_ARCH_EXCLUSIVE_WITH_CPU=y +CT_ARCH_ARCH="" +CT_TARGET_CFLAGS="" +CT_TARGET_LDFLAGS="" +# end of Target options + +# +# Toolchain options +# + +# +# General toolchain options +# +CT_FORCE_SYSROOT=y +CT_USE_SYSROOT=y +CT_SYSROOT_NAME="sysroot" +CT_SYSROOT_DIR_PREFIX="" +CT_WANTS_STATIC_LINK=y +CT_WANTS_STATIC_LINK_CXX=y +# CT_STATIC_TOOLCHAIN is not set +CT_SHOW_CT_VERSION=y +CT_TOOLCHAIN_PKGVERSION="" +CT_TOOLCHAIN_BUGURL="" + +# +# Tuple completion and aliasing +# +CT_TARGET_VENDOR="openeuler" +CT_TARGET_ALIAS_SED_EXPR="" +CT_TARGET_ALIAS="" + +# +# Toolchain type +# +# CT_NATIVE is not set +CT_CROSS=y +# CT_CROSS_NATIVE is not set +# CT_CANADIAN is not set +CT_TOOLCHAIN_TYPE="cross" + +# +# Build system +# +CT_BUILD="" +CT_BUILD_PREFIX="" +CT_BUILD_SUFFIX="" + +# +# Misc options +# +# CT_TOOLCHAIN_ENABLE_NLS is not set +# end of Toolchain options + +# +# Operating System +# +CT_KERNEL_SUPPORTS_SHARED_LIBS=y +# CT_KERNEL_BARE_METAL is not set +CT_KERNEL_LINUX=y +CT_KERNEL="linux" +CT_KERNEL_CHOICE_KSYM="LINUX" +CT_KERNEL_LINUX_SHOW=y + +# +# Options for linux +# +CT_KERNEL_LINUX_PKG_KSYM="LINUX" +CT_LINUX_DIR_NAME="linux" +CT_LINUX_USE_WWW_KERNEL_ORG=y +# CT_LINUX_USE_ORACLE is not set +CT_LINUX_USE="LINUX" +CT_LINUX_PKG_NAME="linux" +# CT_LINUX_SRC_RELEASE is not set +# CT_LINUX_SRC_DEVEL is not set +CT_LINUX_SRC_CUSTOM=y +CT_LINUX_CUSTOM_LOCATION="${OPENSOURCE_DIR}/kernel" +CT_LINUX_PATCH_GLOBAL=y +# CT_LINUX_PATCH_BUNDLED is not set +# CT_LINUX_PATCH_LOCAL is not set +# CT_LINUX_PATCH_BUNDLED_LOCAL is not set +# CT_LINUX_PATCH_LOCAL_BUNDLED is not set +# CT_LINUX_PATCH_NONE is not set +CT_LINUX_PATCH_ORDER="global" +# CT_LINUX_VERY_NEW is not set +# CT_LINUX_V_5_16 is not set +# CT_LINUX_V_5_15 is not set +# CT_LINUX_V_5_14 is not set +# CT_LINUX_V_5_13 is not set +# CT_LINUX_V_5_12 is not set +# CT_LINUX_V_5_11 is not set +CT_LINUX_V_5_10=y +# CT_LINUX_V_5_9 is not set +# CT_LINUX_V_5_8 is not set +# CT_LINUX_V_5_7 is not set +# CT_LINUX_V_5_4 is not set +# CT_LINUX_V_5_3 is not set +# CT_LINUX_V_5_2 is not set +# CT_LINUX_V_5_1 is not set +# CT_LINUX_V_5_0 is not set +# CT_LINUX_V_4_20 is not set +# CT_LINUX_V_4_19 is not set +# CT_LINUX_V_4_18 is not set +# CT_LINUX_V_4_17 is not set +# CT_LINUX_V_4_16 is not set +# CT_LINUX_V_4_15 is not set +# CT_LINUX_V_4_14 is not set +# CT_LINUX_V_4_13 is not set +# CT_LINUX_V_4_12 is not set +# CT_LINUX_V_4_11 is not set +# CT_LINUX_V_4_10 is not set +# CT_LINUX_V_4_9 is not set +# CT_LINUX_V_4_4 is not set +# CT_LINUX_V_4_1 is not set +# CT_LINUX_V_3_16 is not set +# CT_LINUX_V_3_13 is not set +# CT_LINUX_V_3_12 is not set +# CT_LINUX_V_3_10 is not set +CT_LINUX_VERSION="5.10.100" +CT_LINUX_MIRRORS="$(CT_Mirrors kernel.org linux ${CT_LINUX_VERSION})" +CT_LINUX_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_LINUX_SIGNATURE_FORMAT="unpacked/.sign" +CT_LINUX_5_12_or_older=y +CT_LINUX_older_than_5_12=y +CT_LINUX_later_than_5_3=y +CT_LINUX_5_3_or_later=y +CT_LINUX_later_than_4_8=y +CT_LINUX_4_8_or_later=y +CT_LINUX_later_than_3_7=y +CT_LINUX_3_7_or_later=y +CT_LINUX_REQUIRE_3_7_or_later=y +CT_LINUX_later_than_3_2=y +CT_LINUX_3_2_or_later=y +CT_LINUX_REQUIRE_3_2_or_later=y +CT_KERNEL_DEP_RSYNC=y +CT_KERNEL_LINUX_VERBOSITY_0=y +# CT_KERNEL_LINUX_VERBOSITY_1 is not set +# CT_KERNEL_LINUX_VERBOSITY_2 is not set +CT_KERNEL_LINUX_VERBOSE_LEVEL=0 +CT_KERNEL_LINUX_INSTALL_CHECK=y +CT_ALL_KERNEL_CHOICES="BARE_METAL LINUX WINDOWS" + +# +# Common kernel options +# +CT_SHARED_LIBS=y +# end of Operating System + +# +# Binary utilities +# +CT_ARCH_BINFMT_ELF=y +CT_BINUTILS_BINUTILS=y +CT_BINUTILS="binutils" +CT_BINUTILS_CHOICE_KSYM="BINUTILS" +CT_BINUTILS_BINUTILS_SHOW=y + +# +# Options for binutils +# +CT_BINUTILS_BINUTILS_PKG_KSYM="BINUTILS" +CT_BINUTILS_DIR_NAME="binutils" +CT_BINUTILS_USE_GNU=y +# CT_BINUTILS_USE_LINARO is not set +# CT_BINUTILS_USE_ORACLE is not set +CT_BINUTILS_USE="BINUTILS" +CT_BINUTILS_PKG_NAME="binutils" +# CT_BINUTILS_SRC_RELEASE is not set +# CT_BINUTILS_SRC_DEVEL is not set +CT_BINUTILS_SRC_CUSTOM=y +CT_BINUTILS_CUSTOM_LOCATION="${OPENSOURCE_DIR}/binutils/binutils-2.37" +CT_BINUTILS_PATCH_GLOBAL=y +# CT_BINUTILS_PATCH_BUNDLED is not set +# CT_BINUTILS_PATCH_LOCAL is not set +# CT_BINUTILS_PATCH_BUNDLED_LOCAL is not set +# CT_BINUTILS_PATCH_LOCAL_BUNDLED is not set +# CT_BINUTILS_PATCH_NONE is not set +CT_BINUTILS_PATCH_ORDER="global" +# CT_BINUTILS_VERY_NEW is not set +# CT_BINUTILS_V_2_38 is not set +CT_BINUTILS_V_2_37=y +# CT_BINUTILS_V_2_36 is not set +# CT_BINUTILS_V_2_35 is not set +# CT_BINUTILS_V_2_34 is not set +# CT_BINUTILS_V_2_33 is not set +# CT_BINUTILS_V_2_32 is not set +# CT_BINUTILS_V_2_31 is not set +# CT_BINUTILS_V_2_30 is not set +# CT_BINUTILS_V_2_29 is not set +# CT_BINUTILS_V_2_28 is not set +# CT_BINUTILS_V_2_27 is not set +# CT_BINUTILS_V_2_26 is not set +CT_BINUTILS_VERSION="2.37" +CT_BINUTILS_MIRRORS="$(CT_Mirrors GNU binutils) $(CT_Mirrors sourceware binutils/releases)" +CT_BINUTILS_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_BINUTILS_SIGNATURE_FORMAT="packed/.sig" +CT_BINUTILS_later_than_2_30=y +CT_BINUTILS_2_30_or_later=y +CT_BINUTILS_later_than_2_27=y +CT_BINUTILS_2_27_or_later=y +CT_BINUTILS_later_than_2_26=y +CT_BINUTILS_2_26_or_later=y + +# +# GNU binutils +# +CT_BINUTILS_GOLD_SUPPORTS_ARCH=y +CT_BINUTILS_GOLD_SUPPORT=y +CT_BINUTILS_FORCE_LD_BFD_DEFAULT=y +# CT_BINUTILS_LINKER_LD is not set +CT_BINUTILS_LINKER_LD_GOLD=y +CT_BINUTILS_GOLD_INSTALLED=y +CT_BINUTILS_GOLD_THREADS=y +CT_BINUTILS_LINKER_BOTH=y +CT_BINUTILS_LINKERS_LIST="ld,gold" +CT_BINUTILS_LD_WRAPPER=y +CT_BINUTILS_LINKER_DEFAULT="bfd" +CT_BINUTILS_PLUGINS=y +CT_BINUTILS_RELRO=y +CT_BINUTILS_DETERMINISTIC_ARCHIVES=y +CT_BINUTILS_EXTRA_CONFIG_ARRAY="" +# CT_BINUTILS_FOR_TARGET is not set +CT_ALL_BINUTILS_CHOICES="BINUTILS" +# end of Binary utilities + +# +# C-library +# +# CT_LIBC_GLIBC is not set +CT_LIBC_MUSL=y +# CT_LIBC_UCLIBC_NG is not set +CT_LIBC="musl" +CT_LIBC_CHOICE_KSYM="MUSL" +CT_THREADS="musl" +CT_LIBC_MUSL_SHOW=y + +# +# Options for musl +# +CT_LIBC_MUSL_PKG_KSYM="MUSL" +CT_MUSL_DIR_NAME="musl" +CT_MUSL_PKG_NAME="musl" +# CT_MUSL_SRC_RELEASE is not set +# CT_MUSL_SRC_DEVEL is not set +CT_MUSL_SRC_CUSTOM=y +CT_MUSL_CUSTOM_LOCATION="${OPENSOURCE_DIR}/musl/musl-1.2.3" +CT_MUSL_PATCH_GLOBAL=y +# CT_MUSL_PATCH_BUNDLED is not set +# CT_MUSL_PATCH_LOCAL is not set +# CT_MUSL_PATCH_BUNDLED_LOCAL is not set +# CT_MUSL_PATCH_LOCAL_BUNDLED is not set +# CT_MUSL_PATCH_NONE is not set +CT_MUSL_PATCH_ORDER="global" +# CT_MUSL_VERY_NEW is not set +CT_MUSL_V_1_2_3=y +# CT_MUSL_V_1_2_2 is not set +# CT_MUSL_V_1_2_1 is not set +# CT_MUSL_V_1_1_24 is not set +# CT_MUSL_V_1_1_23 is not set +# CT_MUSL_V_1_1_22 is not set +# CT_MUSL_V_1_1_21 is not set +# CT_MUSL_V_1_1_20 is not set +# CT_MUSL_V_1_1_19 is not set +# CT_MUSL_V_1_1_18 is not set +# CT_MUSL_V_1_1_17 is not set +# CT_MUSL_V_1_1_16 is not set +CT_MUSL_VERSION="1.2.3" +CT_MUSL_MIRRORS="http://www.musl-libc.org/releases" +CT_MUSL_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MUSL_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MUSL_ARCHIVE_FORMATS=".tar.gz" +CT_MUSL_SIGNATURE_FORMAT="packed/.asc" +# CT_LIBC_MUSL_DEBUG is not set +# CT_LIBC_MUSL_WARNINGS is not set +# CT_LIBC_MUSL_OPTIMIZE_NONE is not set +CT_LIBC_MUSL_OPTIMIZE_AUTO=y +# CT_LIBC_MUSL_OPTIMIZE_SPEED is not set +# CT_LIBC_MUSL_OPTIMIZE_SIZE is not set +CT_LIBC_MUSL_OPTIMIZE="auto" +CT_ALL_LIBC_CHOICES="AVR_LIBC BIONIC GLIBC MINGW_W64 MOXIEBOX MUSL NEWLIB NONE UCLIBC_NG" +CT_LIBC_SUPPORT_THREADS_ANY=y +CT_LIBC_SUPPORT_THREADS_NATIVE=y + +# +# Common C library options +# +CT_THREADS_NATIVE=y +# CT_CREATE_LDSO_CONF is not set +CT_LIBC_XLDD=y +# end of C-library + +# +# C compiler +# +CT_CC_CORE_NEEDED=y +CT_CC_SUPPORT_CXX=y +CT_CC_SUPPORT_FORTRAN=y +CT_CC_SUPPORT_ADA=y +CT_CC_SUPPORT_OBJC=y +CT_CC_SUPPORT_OBJCXX=y +CT_CC_SUPPORT_GOLANG=y +CT_CC_GCC=y +CT_CC="gcc" +CT_CC_CHOICE_KSYM="GCC" +CT_CC_GCC_SHOW=y + +# +# Options for gcc +# +CT_CC_GCC_PKG_KSYM="GCC" +CT_GCC_DIR_NAME="gcc" +CT_GCC_USE_GNU=y +# CT_GCC_USE_LINARO is not set +CT_GCC_USE="GCC" +CT_GCC_PKG_NAME="gcc" +# CT_GCC_SRC_RELEASE is not set +# CT_GCC_SRC_DEVEL is not set +CT_GCC_SRC_CUSTOM=y +CT_GCC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gcc/gcc-10.3.0" +CT_GCC_PATCH_GLOBAL=y +# CT_GCC_PATCH_BUNDLED is not set +# CT_GCC_PATCH_LOCAL is not set +# CT_GCC_PATCH_BUNDLED_LOCAL is not set +# CT_GCC_PATCH_LOCAL_BUNDLED is not set +# CT_GCC_PATCH_NONE is not set +CT_GCC_PATCH_ORDER="global" +# CT_GCC_VERY_NEW is not set +# CT_GCC_V_11 is not set +CT_GCC_V_10=y +# CT_GCC_V_9 is not set +# CT_GCC_V_8 is not set +# CT_GCC_V_7 is not set +# CT_GCC_V_6 is not set +CT_GCC_VERSION="10.3.0" +CT_GCC_MIRRORS="$(CT_Mirrors GNU gcc/gcc-${CT_GCC_VERSION}) $(CT_Mirrors sourceware gcc/releases/gcc-${CT_GCC_VERSION})" +CT_GCC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GCC_SIGNATURE_FORMAT="" +CT_GCC_11_or_older=y +CT_GCC_older_than_11=y +CT_GCC_later_than_10=y +CT_GCC_10_or_later=y +CT_GCC_later_than_9=y +CT_GCC_9_or_later=y +CT_GCC_later_than_8=y +CT_GCC_8_or_later=y +CT_GCC_later_than_7=y +CT_GCC_7_or_later=y +CT_GCC_later_than_6=y +CT_GCC_6_or_later=y +CT_GCC_REQUIRE_6_or_later=y +CT_GCC_later_than_5=y +CT_GCC_5_or_later=y +CT_GCC_REQUIRE_5_or_later=y +CT_GCC_later_than_4_9=y +CT_GCC_4_9_or_later=y +CT_GCC_REQUIRE_4_9_or_later=y +CT_CC_GCC_ENABLE_PLUGINS=y +CT_CC_GCC_GOLD=y +CT_CC_GCC_HAS_LIBMPX=y +CT_CC_GCC_ENABLE_CXX_FLAGS="" +CT_CC_GCC_CORE_EXTRA_CONFIG_ARRAY="" +CT_CC_GCC_EXTRA_CONFIG_ARRAY="--with-arch=armv8-a --with-gnu-as --with-gnu-ld --enable-c99 --enable-shared --enable-poison-system-directories --enable-symvers=gnu --disable-bootstrap --disable-libstdcxx-dual-abi --enable-default-pie --libdir=\"${CT_PREFIX_DIR}/lib64\" --with-build-time-tools=\"${CT_PREFIX_DIR}/${CT_TARGET}/bin\"" +CT_CC_GCC_MULTILIB_LIST="lp64" +CT_CC_GCC_STATIC_LIBSTDCXX=y +# CT_CC_GCC_SYSTEM_ZLIB is not set +CT_CC_GCC_CONFIG_TLS=m + +# +# Optimisation features +# +CT_CC_GCC_USE_GRAPHITE=y +CT_CC_GCC_USE_LTO=y +CT_CC_GCC_LTO_ZSTD=m + +# +# Settings for libraries running on target +# +CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y +# CT_CC_GCC_LIBMUDFLAP is not set +CT_CC_GCC_LIBGOMP=y +# CT_CC_GCC_LIBSSP is not set +# CT_CC_GCC_LIBQUADMATH is not set +# CT_CC_GCC_LIBSANITIZER is not set + +# +# Misc. obscure options. +# +CT_CC_CXA_ATEXIT=y +CT_CC_GCC_TM_CLONE_REGISTRY=m +# CT_CC_GCC_DISABLE_PCH is not set +CT_CC_GCC_SJLJ_EXCEPTIONS=m +CT_CC_GCC_LDBL_128=m +# CT_CC_GCC_BUILD_ID is not set +CT_CC_GCC_LNK_HASH_STYLE_DEFAULT=y +# CT_CC_GCC_LNK_HASH_STYLE_SYSV is not set +# CT_CC_GCC_LNK_HASH_STYLE_GNU is not set +# CT_CC_GCC_LNK_HASH_STYLE_BOTH is not set +CT_CC_GCC_LNK_HASH_STYLE="" +CT_CC_GCC_DEC_FLOATS_AUTO=y +# CT_CC_GCC_DEC_FLOATS_BID is not set +# CT_CC_GCC_DEC_FLOATS_DPD is not set +# CT_CC_GCC_DEC_FLOATS_NO is not set +CT_CC_GCC_DEC_FLOATS="" +CT_ALL_CC_CHOICES="GCC" + +# +# Additional supported languages: +# +CT_CC_LANG_CXX=y +CT_CC_LANG_FORTRAN=y +# CT_CC_LANG_ADA is not set +# CT_CC_LANG_OBJC is not set +# CT_CC_LANG_OBJCXX is not set +# CT_CC_LANG_GOLANG is not set +CT_CC_LANG_OTHERS="" +# end of C compiler + +# +# Debug facilities +# +# CT_DEBUG_DUMA is not set +CT_DEBUG_GDB=y +CT_DEBUG_GDB_PKG_KSYM="GDB" +CT_GDB_DIR_NAME="gdb" +CT_GDB_PKG_NAME="gdb" +# CT_GDB_SRC_RELEASE is not set +# CT_GDB_SRC_DEVEL is not set +CT_GDB_SRC_CUSTOM=y +CT_GDB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gdb/gdb-11.1" +CT_GDB_PATCH_GLOBAL=y +# CT_GDB_PATCH_BUNDLED is not set +# CT_GDB_PATCH_LOCAL is not set +# CT_GDB_PATCH_BUNDLED_LOCAL is not set +# CT_GDB_PATCH_LOCAL_BUNDLED is not set +# CT_GDB_PATCH_NONE is not set +CT_GDB_PATCH_ORDER="global" +# CT_GDB_VERY_NEW is not set +CT_GDB_V_11=y +# CT_GDB_V_10 is not set +# CT_GDB_V_9 is not set +# CT_GDB_V_8_3 is not set +CT_GDB_VERSION="11.2" +CT_GDB_MIRRORS="$(CT_Mirrors GNU gdb) $(CT_Mirrors sourceware gdb/releases)" +CT_GDB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GDB_SIGNATURE_FORMAT="" +CT_GDB_later_than_11=y +CT_GDB_11_or_later=y +CT_GDB_later_than_10=y +CT_GDB_10_or_later=y +CT_GDB_later_than_8_3=y +CT_GDB_8_3_or_later=y +CT_GDB_later_than_8_0=y +CT_GDB_8_0_or_later=y +CT_GDB_later_than_7_12=y +CT_GDB_7_12_or_later=y +CT_GDB_later_than_7_11=y +CT_GDB_7_11_or_later=y +CT_GDB_CROSS=y +# CT_GDB_CROSS_STATIC is not set +# CT_GDB_CROSS_SIM is not set +CT_GDB_CROSS_PYTHON=y +CT_GDB_CROSS_PYTHON_BINARY="" +CT_GDB_CROSS_EXTRA_CONFIG_ARRAY="" +# CT_GDB_NATIVE is not set +CT_GDB_GDBSERVER=y +# CT_GDB_NATIVE_BUILD_IPA_LIB is not set +# CT_GDB_NATIVE_STATIC is not set +# CT_GDB_NATIVE_STATIC_LIBSTDCXX is not set +CT_GDB_GDBSERVER_TOPLEVEL=y +# CT_DEBUG_LTRACE is not set +# CT_DEBUG_STRACE is not set +CT_ALL_DEBUG_CHOICES="DUMA GDB LTRACE STRACE" +# end of Debug facilities + +# +# Companion libraries +# +# CT_COMPLIBS_CHECK is not set +# CT_COMP_LIBS_CLOOG is not set +CT_COMP_LIBS_EXPAT=y +CT_COMP_LIBS_EXPAT_PKG_KSYM="EXPAT" +CT_EXPAT_DIR_NAME="expat" +CT_EXPAT_PKG_NAME="expat" +# CT_EXPAT_SRC_RELEASE is not set +# CT_EXPAT_SRC_DEVEL is not set +CT_EXPAT_SRC_CUSTOM=y +CT_EXPAT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/expat/expat-2.4.8" +CT_EXPAT_PATCH_GLOBAL=y +# CT_EXPAT_PATCH_BUNDLED is not set +# CT_EXPAT_PATCH_LOCAL is not set +# CT_EXPAT_PATCH_BUNDLED_LOCAL is not set +# CT_EXPAT_PATCH_LOCAL_BUNDLED is not set +# CT_EXPAT_PATCH_NONE is not set +CT_EXPAT_PATCH_ORDER="global" +CT_EXPAT_VERY_NEW=y +# CT_EXPAT_V_2_4 is not set +CT_EXPAT_VERSION="new" +CT_EXPAT_MIRRORS="http://downloads.sourceforge.net/project/expat/expat/${CT_EXPAT_VERSION} https://github.com/libexpat/libexpat/releases/download/R_${CT_EXPAT_VERSION//./_}" +CT_EXPAT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2 .tar.gz" +CT_EXPAT_SIGNATURE_FORMAT="" +CT_COMP_LIBS_GETTEXT=y +CT_COMP_LIBS_GETTEXT_PKG_KSYM="GETTEXT" +CT_GETTEXT_DIR_NAME="gettext" +CT_GETTEXT_PKG_NAME="gettext" +# CT_GETTEXT_SRC_RELEASE is not set +# CT_GETTEXT_SRC_DEVEL is not set +CT_GETTEXT_SRC_CUSTOM=y +CT_GETTEXT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gettext/gettext-0.21" +CT_GETTEXT_PATCH_GLOBAL=y +# CT_GETTEXT_PATCH_BUNDLED is not set +# CT_GETTEXT_PATCH_LOCAL is not set +# CT_GETTEXT_PATCH_BUNDLED_LOCAL is not set +# CT_GETTEXT_PATCH_LOCAL_BUNDLED is not set +# CT_GETTEXT_PATCH_NONE is not set +CT_GETTEXT_PATCH_ORDER="global" +# CT_GETTEXT_VERY_NEW is not set +CT_GETTEXT_V_0_21=y +# CT_GETTEXT_V_0_20_1 is not set +# CT_GETTEXT_V_0_19_8_1 is not set +CT_GETTEXT_VERSION="0.21" +CT_GETTEXT_MIRRORS="$(CT_Mirrors GNU gettext)" +CT_GETTEXT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GETTEXT_SIGNATURE_FORMAT="packed/.sig" +CT_GETTEXT_0_21_or_later=y +CT_GETTEXT_0_21_or_older=y +CT_GETTEXT_INCOMPATIBLE_WITH_UCLIBC_NG=y + +# +# This version of gettext is not compatible with uClibc-NG. Select +# + +# +# a different version if uClibc-NG is used on the target or (in a +# + +# +# Canadian cross build) on the host. +# +CT_COMP_LIBS_GMP=y +CT_COMP_LIBS_GMP_PKG_KSYM="GMP" +CT_GMP_DIR_NAME="gmp" +CT_GMP_PKG_NAME="gmp" +# CT_GMP_SRC_RELEASE is not set +# CT_GMP_SRC_DEVEL is not set +CT_GMP_SRC_CUSTOM=y +CT_GMP_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gmp/gmp-6.2.1" +CT_GMP_PATCH_GLOBAL=y +# CT_GMP_PATCH_BUNDLED is not set +# CT_GMP_PATCH_LOCAL is not set +# CT_GMP_PATCH_BUNDLED_LOCAL is not set +# CT_GMP_PATCH_LOCAL_BUNDLED is not set +# CT_GMP_PATCH_NONE is not set +CT_GMP_PATCH_ORDER="global" +# CT_GMP_VERY_NEW is not set +CT_GMP_V_6_2=y +# CT_GMP_V_6_1 is not set +CT_GMP_VERSION="6.2.1" +CT_GMP_MIRRORS="https://gmplib.org/download/gmp https://gmplib.org/download/gmp/archive $(CT_Mirrors GNU gmp)" +CT_GMP_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2" +CT_GMP_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_ISL=y +CT_COMP_LIBS_ISL_PKG_KSYM="ISL" +CT_ISL_DIR_NAME="isl" +CT_ISL_PKG_NAME="isl" +# CT_ISL_SRC_RELEASE is not set +# CT_ISL_SRC_DEVEL is not set +CT_ISL_SRC_CUSTOM=y +CT_ISL_CUSTOM_LOCATION="${OPENSOURCE_DIR}/isl/isl-0.16.1" +CT_ISL_PATCH_GLOBAL=y +# CT_ISL_PATCH_BUNDLED is not set +# CT_ISL_PATCH_LOCAL is not set +# CT_ISL_PATCH_BUNDLED_LOCAL is not set +# CT_ISL_PATCH_LOCAL_BUNDLED is not set +# CT_ISL_PATCH_NONE is not set +CT_ISL_PATCH_ORDER="global" +# CT_ISL_VERY_NEW is not set +# CT_ISL_V_0_24 is not set +# CT_ISL_V_0_23 is not set +# CT_ISL_V_0_22 is not set +# CT_ISL_V_0_21 is not set +# CT_ISL_V_0_20 is not set +# CT_ISL_V_0_19 is not set +# CT_ISL_V_0_18 is not set +# CT_ISL_V_0_17 is not set +CT_ISL_V_0_16=y +# CT_ISL_V_0_15 is not set +CT_ISL_VERSION="0.16.1" +CT_ISL_MIRRORS="https://libisl.sourceforge.io" +CT_ISL_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_ISL_SIGNATURE_FORMAT="" +CT_ISL_0_18_or_older=y +CT_ISL_older_than_0_18=y +CT_ISL_later_than_0_15=y +CT_ISL_0_15_or_later=y +# CT_COMP_LIBS_LIBELF is not set +CT_COMP_LIBS_LIBICONV=y +CT_COMP_LIBS_LIBICONV_PKG_KSYM="LIBICONV" +CT_LIBICONV_DIR_NAME="libiconv" +CT_LIBICONV_PKG_NAME="libiconv" +# CT_LIBICONV_SRC_RELEASE is not set +# CT_LIBICONV_SRC_DEVEL is not set +CT_LIBICONV_SRC_CUSTOM=y +CT_LIBICONV_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libiconv/libiconv-1.16" +CT_LIBICONV_PATCH_GLOBAL=y +# CT_LIBICONV_PATCH_BUNDLED is not set +# CT_LIBICONV_PATCH_LOCAL is not set +# CT_LIBICONV_PATCH_BUNDLED_LOCAL is not set +# CT_LIBICONV_PATCH_LOCAL_BUNDLED is not set +# CT_LIBICONV_PATCH_NONE is not set +CT_LIBICONV_PATCH_ORDER="global" +# CT_LIBICONV_VERY_NEW is not set +CT_LIBICONV_V_1_16=y +# CT_LIBICONV_V_1_15 is not set +CT_LIBICONV_VERSION="1.16" +CT_LIBICONV_MIRRORS="$(CT_Mirrors GNU libiconv)" +CT_LIBICONV_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_FORMATS=".tar.gz" +CT_LIBICONV_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_MPC=y +CT_COMP_LIBS_MPC_PKG_KSYM="MPC" +CT_MPC_DIR_NAME="mpc" +CT_MPC_PKG_NAME="mpc" +# CT_MPC_SRC_RELEASE is not set +# CT_MPC_SRC_DEVEL is not set +CT_MPC_SRC_CUSTOM=y +CT_MPC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libmpc/mpc-1.2.0" +CT_MPC_PATCH_GLOBAL=y +# CT_MPC_PATCH_BUNDLED is not set +# CT_MPC_PATCH_LOCAL is not set +# CT_MPC_PATCH_BUNDLED_LOCAL is not set +# CT_MPC_PATCH_LOCAL_BUNDLED is not set +# CT_MPC_PATCH_NONE is not set +CT_MPC_PATCH_ORDER="global" +# CT_MPC_VERY_NEW is not set +CT_MPC_V_1_2=y +# CT_MPC_V_1_1 is not set +# CT_MPC_V_1_0 is not set +CT_MPC_VERSION="1.2.1" +CT_MPC_MIRRORS="http://www.multiprecision.org/downloads $(CT_Mirrors GNU mpc)" +CT_MPC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_FORMATS=".tar.gz" +CT_MPC_SIGNATURE_FORMAT="packed/.sig" +CT_MPC_later_than_1_1_0=y +CT_MPC_1_1_0_or_later=y +CT_COMP_LIBS_MPFR=y +CT_COMP_LIBS_MPFR_PKG_KSYM="MPFR" +CT_MPFR_DIR_NAME="mpfr" +CT_MPFR_PKG_NAME="mpfr" +# CT_MPFR_SRC_RELEASE is not set +# CT_MPFR_SRC_DEVEL is not set +CT_MPFR_SRC_CUSTOM=y +CT_MPFR_CUSTOM_LOCATION="${OPENSOURCE_DIR}/mpfr/mpfr-4.1.0" +CT_MPFR_PATCH_GLOBAL=y +# CT_MPFR_PATCH_BUNDLED is not set +# CT_MPFR_PATCH_LOCAL is not set +# CT_MPFR_PATCH_BUNDLED_LOCAL is not set +# CT_MPFR_PATCH_LOCAL_BUNDLED is not set +# CT_MPFR_PATCH_NONE is not set +CT_MPFR_PATCH_ORDER="global" +# CT_MPFR_VERY_NEW is not set +CT_MPFR_V_4_1=y +# CT_MPFR_V_4_0 is not set +# CT_MPFR_V_3_1 is not set +CT_MPFR_VERSION="4.1.0" +CT_MPFR_MIRRORS="http://www.mpfr.org/mpfr-${CT_MPFR_VERSION} $(CT_Mirrors GNU mpfr)" +CT_MPFR_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz .zip" +CT_MPFR_SIGNATURE_FORMAT="packed/.asc" +CT_MPFR_later_than_4_0_0=y +CT_MPFR_4_0_0_or_later=y +CT_COMP_LIBS_NCURSES=y +CT_COMP_LIBS_NCURSES_PKG_KSYM="NCURSES" +CT_NCURSES_DIR_NAME="ncurses" +CT_NCURSES_PKG_NAME="ncurses" +# CT_NCURSES_SRC_RELEASE is not set +# CT_NCURSES_SRC_DEVEL is not set +CT_NCURSES_SRC_CUSTOM=y +CT_NCURSES_CUSTOM_LOCATION="${OPENSOURCE_DIR}/ncurses/ncurses-6.3" +CT_NCURSES_PATCH_GLOBAL=y +# CT_NCURSES_PATCH_BUNDLED is not set +# CT_NCURSES_PATCH_LOCAL is not set +# CT_NCURSES_PATCH_BUNDLED_LOCAL is not set +# CT_NCURSES_PATCH_LOCAL_BUNDLED is not set +# CT_NCURSES_PATCH_NONE is not set +CT_NCURSES_PATCH_ORDER="global" +CT_NCURSES_VERY_NEW=y +# CT_NCURSES_V_6_2 is not set +# CT_NCURSES_V_6_1 is not set +# CT_NCURSES_V_6_0 is not set +CT_NCURSES_VERSION="new" +CT_NCURSES_MIRRORS="https://invisible-mirror.net/archives/ncurses $(CT_Mirrors GNU ncurses)" +CT_NCURSES_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_FORMATS=".tar.gz" +CT_NCURSES_SIGNATURE_FORMAT="packed/.sig" +CT_NCURSES_NEW_ABI=y +CT_NCURSES_HOST_CONFIG_ARGS="" +CT_NCURSES_HOST_DISABLE_DB=y +CT_NCURSES_HOST_FALLBACKS="linux,xterm,xterm-color,xterm-256color,vt100" +CT_NCURSES_TARGET_CONFIG_ARGS="" +# CT_NCURSES_TARGET_DISABLE_DB is not set +CT_NCURSES_TARGET_FALLBACKS="" +CT_COMP_LIBS_ZLIB=y +CT_COMP_LIBS_ZLIB_PKG_KSYM="ZLIB" +CT_ZLIB_DIR_NAME="zlib" +CT_ZLIB_PKG_NAME="zlib" +# CT_ZLIB_SRC_RELEASE is not set +# CT_ZLIB_SRC_DEVEL is not set +CT_ZLIB_SRC_CUSTOM=y +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.2.11" +CT_ZLIB_PATCH_GLOBAL=y +# CT_ZLIB_PATCH_BUNDLED is not set +# CT_ZLIB_PATCH_LOCAL is not set +# CT_ZLIB_PATCH_BUNDLED_LOCAL is not set +# CT_ZLIB_PATCH_LOCAL_BUNDLED is not set +# CT_ZLIB_PATCH_NONE is not set +CT_ZLIB_PATCH_ORDER="global" +# CT_ZLIB_VERY_NEW is not set +CT_ZLIB_V_1_2_12=y +CT_ZLIB_VERSION="1.2.12" +CT_ZLIB_MIRRORS="http://downloads.sourceforge.net/project/libpng/zlib/${CT_ZLIB_VERSION} https://www.zlib.net/" +CT_ZLIB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_ZLIB_SIGNATURE_FORMAT="packed/.asc" +CT_ALL_COMP_LIBS_CHOICES="CLOOG EXPAT GETTEXT GMP GNUPRUMCU ISL LIBELF LIBICONV MPC MPFR NCURSES NEWLIB_NANO PICOLIBC ZLIB" +CT_LIBICONV_NEEDED=y +CT_GETTEXT_NEEDED=y +CT_GMP_NEEDED=y +CT_MPFR_NEEDED=y +CT_ISL_NEEDED=y +CT_MPC_NEEDED=y +CT_EXPAT_NEEDED=y +CT_NCURSES_NEEDED=y +CT_ZLIB_NEEDED=y +CT_LIBICONV=y +CT_GETTEXT=y +CT_GMP=y +CT_MPFR=y +CT_ISL=y +CT_MPC=y +CT_EXPAT=y +CT_NCURSES=y +CT_ZLIB=y +# end of Companion libraries + +# +# Companion tools +# +# CT_COMP_TOOLS_FOR_HOST is not set +# CT_COMP_TOOLS_AUTOCONF is not set +# CT_COMP_TOOLS_AUTOMAKE is not set +# CT_COMP_TOOLS_BISON is not set +# CT_COMP_TOOLS_DTC is not set +# CT_COMP_TOOLS_LIBTOOL is not set +# CT_COMP_TOOLS_M4 is not set +# CT_COMP_TOOLS_MAKE is not set +CT_ALL_COMP_TOOLS_CHOICES="AUTOCONF AUTOMAKE BISON DTC LIBTOOL M4 MAKE" +# end of Companion tools + +# +# Test suite +# +# CT_TEST_SUITE_GCC is not set +# end of Test suite diff --git a/.oebuild/cross-tools/configs/config_arm32 b/.oebuild/cross-tools/configs/config_arm32 new file mode 100644 index 0000000000000000000000000000000000000000..a422d52f605cafe28c03273922a9504dee6f2c55 --- /dev/null +++ b/.oebuild/cross-tools/configs/config_arm32 @@ -0,0 +1,1145 @@ +# +# Automatically generated file; DO NOT EDIT. +# crosstool-NG 1.26.0 Configuration +# +CT_CONFIGURE_has_static_link=y +CT_CONFIGURE_has_cxx11=y +CT_CONFIGURE_has_wget=y +CT_CONFIGURE_has_curl=y +CT_CONFIGURE_has_meson=y +CT_CONFIGURE_has_ninja=y +CT_CONFIGURE_has_rsync=y +CT_CONFIGURE_has_make_3_81_or_newer=y +CT_CONFIGURE_has_make_4_0_or_newer=y +CT_CONFIGURE_has_make_4_4_or_newer=y +CT_CONFIGURE_has_libtool_2_4_or_newer=y +CT_CONFIGURE_has_libtoolize_2_4_or_newer=y +CT_CONFIGURE_has_autoconf_2_65_or_newer=y +CT_CONFIGURE_has_autoreconf_2_65_or_newer=y +CT_CONFIGURE_has_automake_1_15_or_newer=y +CT_CONFIGURE_has_gnu_m4_1_4_12_or_newer=y +CT_CONFIGURE_has_python_3_4_or_newer=y +CT_CONFIGURE_has_bison_2_7_or_newer=y +CT_CONFIGURE_has_bison_3_0_4_or_newer=y +CT_CONFIGURE_has_python=y +CT_CONFIGURE_has_git=y +CT_CONFIGURE_has_md5sum=y +CT_CONFIGURE_has_sha1sum=y +CT_CONFIGURE_has_sha256sum=y +CT_CONFIGURE_has_sha512sum=y +CT_CONFIGURE_has_install_with_strip_program=y +CT_VERSION="1.26.0" +CT_VCHECK="" +CT_CONFIG_VERSION_ENV="4" +CT_CONFIG_VERSION_CURRENT="4" +CT_CONFIG_VERSION="4" +CT_MODULES=y + +# +# set open_source dir and x-tools dir, if you set CROSS_SOURCE, you should +# set like this: /xxx/open_source/. because the CROSS_SOURCE will be finanal +# /xxx/open_source/../open_source +# +OPENSOURCE_DIR="${CROSS_SOURCE}./open_source" +X_TOOLS_DIR="${HOME}/x-tools" + +# +# Paths and misc options +# + +# +# crosstool-NG behavior +# +# CT_OBSOLETE is not set +CT_EXPERIMENTAL=y +# CT_ALLOW_BUILD_AS_ROOT is not set +# CT_ENABLE_EXPERIMENTAL_BUNDLED_PATCHES is not set +# CT_DEBUG_CT is not set + +# +# Paths +# +CT_LOCAL_TARBALLS_DIR="${HOME}/src" +CT_SAVE_TARBALLS=y +# CT_TARBALLS_BUILDROOT_LAYOUT is not set +CT_WORK_DIR="${CT_TOP_DIR}/.build" +CT_BUILD_TOP_DIR="${CT_WORK_DIR:-${CT_TOP_DIR}/.build}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_BUILD_DIR="${CT_BUILD_TOP_DIR}/build" +CT_PREFIX_DIR="${CT_PREFIX:-${X_TOOLS_DIR}}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_RM_RF_PREFIX_DIR=y +# CT_REMOVE_DOCS is not set +# CT_BUILD_MANUALS is not set +CT_INSTALL_LICENSES=y +CT_PREFIX_DIR_RO=y +CT_STRIP_HOST_TOOLCHAIN_EXECUTABLES=y +# CT_STRIP_TARGET_TOOLCHAIN_EXECUTABLES is not set +# CT_TARBALL_RESULT is not set + +# +# Downloading +# +# CT_DOWNLOAD_AGENT_WGET is not set +CT_DOWNLOAD_AGENT_CURL=y +# CT_DOWNLOAD_AGENT_NONE is not set +# CT_FORBID_DOWNLOAD is not set +# CT_FORCE_DOWNLOAD is not set +CT_CONNECT_TIMEOUT=10 +CT_DOWNLOAD_CURL_OPTIONS="--location --ftp-pasv --retry 3 --fail --silent" +# CT_ONLY_DOWNLOAD is not set +# CT_USE_MIRROR is not set +CT_VERIFY_DOWNLOAD_DIGEST=y +CT_VERIFY_DOWNLOAD_DIGEST_SHA512=y +# CT_VERIFY_DOWNLOAD_DIGEST_SHA256 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_SHA1 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_MD5 is not set +CT_VERIFY_DOWNLOAD_DIGEST_ALG="sha512" +# CT_VERIFY_DOWNLOAD_SIGNATURE is not set + +# +# Extracting +# +# CT_FORCE_EXTRACT is not set +CT_OVERRIDE_CONFIG_GUESS_SUB=y +# CT_ONLY_EXTRACT is not set +CT_PATCH_BUNDLED=y +# CT_PATCH_LOCAL is not set +# CT_PATCH_BUNDLED_LOCAL is not set +# CT_PATCH_LOCAL_BUNDLED is not set +# CT_PATCH_NONE is not set +CT_PATCH_ORDER="bundled" + +# +# Build behavior +# +CT_PARALLEL_JOBS=0 +CT_LOAD="" +CT_USE_PIPES=y +CT_EXTRA_CFLAGS_FOR_BUILD="" +CT_EXTRA_CXXFLAGS_FOR_BUILD="" +CT_EXTRA_LDFLAGS_FOR_BUILD="" +CT_EXTRA_CFLAGS_FOR_HOST="" +CT_EXTRA_LDFLAGS_FOR_HOST="" +# CT_CONFIG_SHELL_SH is not set +# CT_CONFIG_SHELL_ASH is not set +CT_CONFIG_SHELL_BASH=y +# CT_CONFIG_SHELL_CUSTOM is not set +CT_CONFIG_SHELL="${bash}" + +# +# Logging +# +# CT_LOG_ERROR is not set +# CT_LOG_WARN is not set +# CT_LOG_INFO is not set +CT_LOG_EXTRA=y +# CT_LOG_ALL is not set +# CT_LOG_DEBUG is not set +CT_LOG_LEVEL_MAX="EXTRA" +# CT_LOG_SEE_TOOLS_WARN is not set +CT_LOG_PROGRESS_BAR=y +CT_LOG_TO_FILE=y +CT_LOG_FILE_COMPRESS=y +# end of Paths and misc options + +# +# Target options +# +# CT_ARCH_ALPHA is not set +# CT_ARCH_ARC is not set +CT_ARCH_ARM=y +# CT_ARCH_AVR is not set +# CT_ARCH_BPF is not set +# CT_ARCH_C6X is not set +# CT_ARCH_LOONGARCH is not set +# CT_ARCH_M68K is not set +# CT_ARCH_MICROBLAZE is not set +# CT_ARCH_MIPS is not set +# CT_ARCH_MOXIE is not set +# CT_ARCH_MSP430 is not set +# CT_ARCH_NIOS2 is not set +# CT_ARCH_POWERPC is not set +# CT_ARCH_PRU is not set +# CT_ARCH_RISCV is not set +# CT_ARCH_S390 is not set +# CT_ARCH_SH is not set +# CT_ARCH_SPARC is not set +# CT_ARCH_X86 is not set +# CT_ARCH_XTENSA is not set +CT_ARCH="arm" +CT_ARCH_CHOICE_KSYM="ARM" +CT_ARCH_CPU="" +CT_ARCH_TUNE="" +CT_ARCH_ARM_SHOW=y + +# +# Options for arm +# +CT_ARCH_ARM_PKG_KSYM="" +CT_ARCH_ARM_MODE="arm" +CT_ARCH_ARM_MODE_ARM=y +# CT_ARCH_ARM_MODE_THUMB is not set +# CT_ARCH_ARM_INTERWORKING is not set +CT_ARCH_ARM_EABI_FORCE=y +CT_ARCH_ARM_EABI=y +CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR BPF C6X LOONGARCH M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA" +CT_ARCH_SUFFIX="" +# CT_OMIT_TARGET_VENDOR is not set + +# +# Generic target options +# +# CT_MULTILIB is not set +# CT_DEMULTILIB is not set +CT_ARCH_SUPPORTS_BOTH_MMU=y +CT_ARCH_DEFAULT_HAS_MMU=y +CT_ARCH_USE_MMU=y +CT_ARCH_SUPPORTS_FLAT_FORMAT=y +CT_ARCH_SUPPORTS_LIBSANITIZER=y +CT_ARCH_SUPPORTS_EITHER_ENDIAN=y +CT_ARCH_DEFAULT_LE=y +# CT_ARCH_BE is not set +CT_ARCH_LE=y +CT_ARCH_ENDIAN="little" +CT_ARCH_SUPPORTS_32=y +CT_ARCH_SUPPORTS_64=y +CT_ARCH_DEFAULT_32=y +CT_ARCH_BITNESS=32 +CT_ARCH_32=y +# CT_ARCH_64 is not set + +# +# Target optimisations +# +CT_ARCH_SUPPORTS_WITH_ARCH=y +CT_ARCH_SUPPORTS_WITH_CPU=y +CT_ARCH_SUPPORTS_WITH_TUNE=y +CT_ARCH_SUPPORTS_WITH_FLOAT=y +CT_ARCH_SUPPORTS_WITH_FPU=y +CT_ARCH_SUPPORTS_SOFTFP=y +CT_ARCH_EXCLUSIVE_WITH_CPU=y +CT_ARCH_ARCH="" +CT_ARCH_FPU="" +# CT_ARCH_FLOAT_AUTO is not set +# CT_ARCH_FLOAT_HW is not set +# CT_ARCH_FLOAT_SOFTFP is not set +CT_ARCH_FLOAT_SW=y +CT_TARGET_CFLAGS="" +CT_TARGET_LDFLAGS="" +CT_ARCH_FLOAT="soft" +# end of Target options + +# +# Toolchain options +# + +# +# General toolchain options +# +CT_FORCE_SYSROOT=y +CT_USE_SYSROOT=y +CT_SYSROOT_NAME="sysroot" +CT_SYSROOT_DIR_PREFIX="" +CT_WANTS_STATIC_LINK=y +CT_WANTS_STATIC_LINK_CXX=y +# CT_STATIC_TOOLCHAIN is not set +CT_SHOW_CT_VERSION=y +CT_TOOLCHAIN_PKGVERSION="" +CT_TOOLCHAIN_BUGURL="" + +# +# Tuple completion and aliasing +# +CT_TARGET_VENDOR="openeuler" +CT_TARGET_ALIAS_SED_EXPR="" +CT_TARGET_ALIAS="" + +# +# Toolchain type +# +# CT_NATIVE is not set +CT_CROSS=y +# CT_CROSS_NATIVE is not set +# CT_CANADIAN is not set +CT_TOOLCHAIN_TYPE="cross" + +# +# Build system +# +CT_BUILD="" +CT_BUILD_PREFIX="" +CT_BUILD_SUFFIX="" + +# +# Misc options +# +# CT_TOOLCHAIN_ENABLE_NLS is not set +# end of Toolchain options + +# +# Operating System +# +CT_KERNEL_SUPPORTS_SHARED_LIBS=y +# CT_KERNEL_BARE_METAL is not set +CT_KERNEL_LINUX=y +CT_KERNEL="linux" +CT_KERNEL_CHOICE_KSYM="LINUX" +CT_KERNEL_LINUX_SHOW=y + +# +# Options for linux +# +CT_KERNEL_LINUX_PKG_KSYM="LINUX" +CT_LINUX_DIR_NAME="linux" +CT_LINUX_USE_WWW_KERNEL_ORG=y +# CT_LINUX_USE_ORACLE is not set +CT_LINUX_USE="LINUX" +CT_LINUX_PKG_NAME="linux" +# CT_LINUX_SRC_RELEASE is not set +# CT_LINUX_SRC_DEVEL is not set +CT_LINUX_SRC_CUSTOM=y +CT_LINUX_CUSTOM_LOCATION="${OPENSOURCE_DIR}/kernel" +CT_LINUX_PATCH_GLOBAL=y +# CT_LINUX_PATCH_BUNDLED is not set +# CT_LINUX_PATCH_LOCAL is not set +# CT_LINUX_PATCH_BUNDLED_LOCAL is not set +# CT_LINUX_PATCH_LOCAL_BUNDLED is not set +# CT_LINUX_PATCH_NONE is not set +CT_LINUX_PATCH_ORDER="global" +# CT_LINUX_VERY_NEW is not set +# CT_LINUX_V_6_4 is not set +# CT_LINUX_V_6_3 is not set +# CT_LINUX_V_6_2 is not set +# CT_LINUX_V_6_1 is not set +# CT_LINUX_V_6_0 is not set +# CT_LINUX_V_5_19 is not set +# CT_LINUX_V_5_18 is not set +# CT_LINUX_V_5_17 is not set +# CT_LINUX_V_5_16 is not set +# CT_LINUX_V_5_15 is not set +# CT_LINUX_V_5_14 is not set +# CT_LINUX_V_5_13 is not set +# CT_LINUX_V_5_12 is not set +# CT_LINUX_V_5_11 is not set +CT_LINUX_V_5_10=y +# CT_LINUX_V_5_9 is not set +# CT_LINUX_V_5_8 is not set +# CT_LINUX_V_5_7 is not set +# CT_LINUX_V_5_4 is not set +# CT_LINUX_V_5_3 is not set +# CT_LINUX_V_5_2 is not set +# CT_LINUX_V_5_1 is not set +# CT_LINUX_V_5_0 is not set +# CT_LINUX_V_4_20 is not set +# CT_LINUX_V_4_19 is not set +# CT_LINUX_V_4_18 is not set +# CT_LINUX_V_4_17 is not set +# CT_LINUX_V_4_16 is not set +# CT_LINUX_V_4_15 is not set +# CT_LINUX_V_4_14 is not set +# CT_LINUX_V_4_13 is not set +# CT_LINUX_V_4_12 is not set +# CT_LINUX_V_4_11 is not set +# CT_LINUX_V_4_10 is not set +# CT_LINUX_V_4_9 is not set +# CT_LINUX_V_4_4 is not set +# CT_LINUX_V_4_1 is not set +# CT_LINUX_V_3_16 is not set +# CT_LINUX_V_3_13 is not set +# CT_LINUX_V_3_12 is not set +# CT_LINUX_V_3_10 is not set +# CT_LINUX_V_3_4 is not set +# CT_LINUX_V_3_2 is not set +CT_LINUX_VERSION="5.10.185" +CT_LINUX_MIRRORS="$(CT_Mirrors kernel.org linux ${CT_LINUX_VERSION})" +CT_LINUX_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_LINUX_SIGNATURE_FORMAT="unpacked/.sign" +CT_LINUX_5_19_or_older=y +CT_LINUX_older_than_5_19=y +CT_LINUX_5_12_or_older=y +CT_LINUX_older_than_5_12=y +CT_LINUX_later_than_5_5=y +CT_LINUX_5_5_or_later=y +CT_LINUX_later_than_5_3=y +CT_LINUX_5_3_or_later=y +CT_LINUX_later_than_4_8=y +CT_LINUX_4_8_or_later=y +CT_LINUX_later_than_3_7=y +CT_LINUX_3_7_or_later=y +CT_LINUX_later_than_3_2=y +CT_LINUX_3_2_or_later=y +CT_LINUX_REQUIRE_3_2_or_later=y +CT_KERNEL_DEP_RSYNC=y +CT_KERNEL_LINUX_VERBOSITY_0=y +# CT_KERNEL_LINUX_VERBOSITY_1 is not set +# CT_KERNEL_LINUX_VERBOSITY_2 is not set +CT_KERNEL_LINUX_VERBOSE_LEVEL=0 +CT_ALL_KERNEL_CHOICES="BARE_METAL LINUX WINDOWS" + +# +# Common kernel options +# +CT_SHARED_LIBS=y +# end of Operating System + +# +# Binary utilities +# +CT_ARCH_BINFMT_ELF=y +CT_BINUTILS_BINUTILS=y +CT_BINUTILS="binutils" +CT_BINUTILS_CHOICE_KSYM="BINUTILS" +CT_BINUTILS_BINUTILS_SHOW=y + +# +# Options for binutils +# +CT_BINUTILS_BINUTILS_PKG_KSYM="BINUTILS" +CT_BINUTILS_DIR_NAME="binutils" +CT_BINUTILS_USE_GNU=y +# CT_BINUTILS_USE_LINARO is not set +# CT_BINUTILS_USE_ORACLE is not set +CT_BINUTILS_USE="BINUTILS" +CT_BINUTILS_PKG_NAME="binutils" +# CT_BINUTILS_SRC_RELEASE is not set +# CT_BINUTILS_SRC_DEVEL is not set +CT_BINUTILS_SRC_CUSTOM=y +CT_BINUTILS_CUSTOM_LOCATION="${OPENSOURCE_DIR}/binutils/binutils-2.41" +CT_BINUTILS_PATCH_GLOBAL=y +# CT_BINUTILS_PATCH_BUNDLED is not set +# CT_BINUTILS_PATCH_LOCAL is not set +# CT_BINUTILS_PATCH_BUNDLED_LOCAL is not set +# CT_BINUTILS_PATCH_LOCAL_BUNDLED is not set +# CT_BINUTILS_PATCH_NONE is not set +CT_BINUTILS_PATCH_ORDER="global" +CT_BINUTILS_VERY_NEW=y +# CT_BINUTILS_V_2_40 is not set +# CT_BINUTILS_V_2_39 is not set +# CT_BINUTILS_V_2_38 is not set +# CT_BINUTILS_V_2_37 is not set +# CT_BINUTILS_V_2_36 is not set +# CT_BINUTILS_V_2_35 is not set +# CT_BINUTILS_V_2_34 is not set +# CT_BINUTILS_V_2_33 is not set +# CT_BINUTILS_V_2_32 is not set +# CT_BINUTILS_V_2_31 is not set +# CT_BINUTILS_V_2_30 is not set +# CT_BINUTILS_V_2_29 is not set +# CT_BINUTILS_V_2_28 is not set +# CT_BINUTILS_V_2_27 is not set +# CT_BINUTILS_V_2_26 is not set +CT_BINUTILS_VERSION="new" +CT_BINUTILS_MIRRORS="$(CT_Mirrors GNU binutils) $(CT_Mirrors sourceware binutils/releases)" +CT_BINUTILS_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_BINUTILS_SIGNATURE_FORMAT="packed/.sig" +CT_BINUTILS_later_than_2_39=y +CT_BINUTILS_2_39_or_later=y +CT_BINUTILS_later_than_2_30=y +CT_BINUTILS_2_30_or_later=y +CT_BINUTILS_later_than_2_27=y +CT_BINUTILS_2_27_or_later=y +CT_BINUTILS_later_than_2_26=y +CT_BINUTILS_2_26_or_later=y + +# +# GNU binutils +# +CT_BINUTILS_GOLD_SUPPORTS_ARCH=y +CT_BINUTILS_GOLD_SUPPORT=y +CT_BINUTILS_FORCE_LD_BFD_DEFAULT=y +# CT_BINUTILS_LINKER_LD is not set +CT_BINUTILS_LINKER_LD_GOLD=y +CT_BINUTILS_GOLD_INSTALLED=y +CT_BINUTILS_GOLD_THREADS=y +CT_BINUTILS_LINKER_BOTH=y +CT_BINUTILS_LINKERS_LIST="ld,gold" +CT_BINUTILS_LD_WRAPPER=y +CT_BINUTILS_LINKER_DEFAULT="bfd" +CT_BINUTILS_PLUGINS=y +CT_BINUTILS_RELRO=m +CT_BINUTILS_DETERMINISTIC_ARCHIVES=y +CT_BINUTILS_EXTRA_CONFIG_ARRAY="" +# CT_BINUTILS_FOR_TARGET is not set +CT_ALL_BINUTILS_CHOICES="BINUTILS" +# end of Binary utilities + +# +# C-library +# +CT_LIBC_GLIBC=y +# CT_LIBC_MUSL is not set +# CT_LIBC_UCLIBC_NG is not set +CT_LIBC="glibc" +CT_LIBC_CHOICE_KSYM="GLIBC" +CT_LIBC_GLIBC_SHOW=y + +# +# Options for glibc +# +CT_LIBC_GLIBC_PKG_KSYM="GLIBC" +CT_GLIBC_DIR_NAME="glibc" +CT_GLIBC_USE_GNU=y +# CT_GLIBC_USE_ORACLE is not set +CT_GLIBC_USE="GLIBC" +CT_GLIBC_PKG_NAME="glibc" +# CT_GLIBC_SRC_RELEASE is not set +# CT_GLIBC_SRC_DEVEL is not set +CT_GLIBC_SRC_CUSTOM=y +CT_GLIBC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/glibc/glibc-2.38" +CT_GLIBC_PATCH_GLOBAL=y +# CT_GLIBC_PATCH_BUNDLED is not set +# CT_GLIBC_PATCH_LOCAL is not set +# CT_GLIBC_PATCH_BUNDLED_LOCAL is not set +# CT_GLIBC_PATCH_LOCAL_BUNDLED is not set +# CT_GLIBC_PATCH_NONE is not set +CT_GLIBC_PATCH_ORDER="global" +# CT_GLIBC_VERY_NEW is not set +CT_GLIBC_V_2_38=y +# CT_GLIBC_V_2_37 is not set +# CT_GLIBC_V_2_36 is not set +# CT_GLIBC_V_2_35 is not set +# CT_GLIBC_V_2_34 is not set +# CT_GLIBC_V_2_33 is not set +# CT_GLIBC_V_2_32 is not set +# CT_GLIBC_V_2_31 is not set +# CT_GLIBC_V_2_30 is not set +# CT_GLIBC_V_2_29 is not set +# CT_GLIBC_V_2_28 is not set +# CT_GLIBC_V_2_27 is not set +# CT_GLIBC_V_2_26 is not set +# CT_GLIBC_V_2_25 is not set +# CT_GLIBC_V_2_24 is not set +# CT_GLIBC_V_2_23 is not set +# CT_GLIBC_V_2_19 is not set +# CT_GLIBC_V_2_17 is not set +CT_GLIBC_VERSION="2.38" +CT_GLIBC_MIRRORS="$(CT_Mirrors GNU glibc)" +CT_GLIBC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GLIBC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GLIBC_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_GLIBC_SIGNATURE_FORMAT="packed/.sig" +CT_GLIBC_2_38_or_later=y +CT_GLIBC_2_38_or_older=y +CT_GLIBC_later_than_2_37=y +CT_GLIBC_2_37_or_later=y +CT_GLIBC_later_than_2_36=y +CT_GLIBC_2_36_or_later=y +CT_GLIBC_later_than_2_34=y +CT_GLIBC_2_34_or_later=y +CT_GLIBC_later_than_2_32=y +CT_GLIBC_2_32_or_later=y +CT_GLIBC_later_than_2_31=y +CT_GLIBC_2_31_or_later=y +CT_GLIBC_later_than_2_30=y +CT_GLIBC_2_30_or_later=y +CT_GLIBC_later_than_2_29=y +CT_GLIBC_2_29_or_later=y +CT_GLIBC_later_than_2_28=y +CT_GLIBC_2_28_or_later=y +CT_GLIBC_later_than_2_27=y +CT_GLIBC_2_27_or_later=y +CT_GLIBC_later_than_2_26=y +CT_GLIBC_2_26_or_later=y +CT_GLIBC_later_than_2_25=y +CT_GLIBC_2_25_or_later=y +CT_GLIBC_later_than_2_24=y +CT_GLIBC_2_24_or_later=y +CT_GLIBC_later_than_2_23=y +CT_GLIBC_2_23_or_later=y +CT_GLIBC_later_than_2_20=y +CT_GLIBC_2_20_or_later=y +CT_GLIBC_later_than_2_17=y +CT_GLIBC_2_17_or_later=y +CT_GLIBC_later_than_2_14=y +CT_GLIBC_2_14_or_later=y +CT_GLIBC_DEP_KERNEL_HEADERS_VERSION=y +CT_GLIBC_DEP_BINUTILS=y +CT_GLIBC_DEP_GCC=y +CT_GLIBC_DEP_PYTHON=y +CT_THREADS="nptl" +CT_GLIBC_BUILD_SSP=y +CT_GLIBC_HAS_LIBIDN_ADDON=y +# CT_GLIBC_USE_LIBIDN_ADDON is not set +CT_GLIBC_NO_SPARC_V8=y +CT_GLIBC_HAS_OBSOLETE_LIBCRYPT=y +CT_GLIBC_EXTRA_CONFIG_ARRAY="--enable-crypt" +CT_GLIBC_CONFIGPARMS="" +CT_GLIBC_ENABLE_DEBUG=y +CT_GLIBC_EXTRA_CFLAGS="" +CT_GLIBC_ENABLE_OBSOLETE_LIBCRYPT=y +# CT_GLIBC_ENABLE_FORTIFIED_BUILD is not set +# CT_GLIBC_DISABLE_VERSIONING is not set +CT_GLIBC_OLDEST_ABI="" +CT_GLIBC_FORCE_UNWIND=y +# CT_GLIBC_LOCALES is not set +# CT_GLIBC_KERNEL_VERSION_NONE is not set +CT_GLIBC_KERNEL_VERSION_AS_HEADERS=y +# CT_GLIBC_KERNEL_VERSION_CHOSEN is not set +CT_GLIBC_MIN_KERNEL="5.10.185" +CT_GLIBC_SSP_DEFAULT=y +# CT_GLIBC_SSP_NO is not set +# CT_GLIBC_SSP_YES is not set +# CT_GLIBC_SSP_ALL is not set +# CT_GLIBC_SSP_STRONG is not set +CT_GLIBC_ENABLE_WERROR=y +# CT_GLIBC_ENABLE_COMMON_FLAG is not set +CT_ALL_LIBC_CHOICES="AVR_LIBC GLIBC MINGW_W64 MOXIEBOX MUSL NEWLIB NONE PICOLIBC UCLIBC_NG" +CT_LIBC_SUPPORT_THREADS_ANY=y +CT_LIBC_SUPPORT_THREADS_NATIVE=y + +# +# Common C library options +# +CT_THREADS_NATIVE=y +# CT_CREATE_LDSO_CONF is not set +CT_LIBC_XLDD=y +# end of C-library + +# +# C compiler +# +CT_CC_CORE_NEEDED=y +CT_CC_SUPPORT_CXX=y +CT_CC_SUPPORT_FORTRAN=y +CT_CC_SUPPORT_ADA=y +CT_CC_SUPPORT_D=y +CT_CC_SUPPORT_JIT=y +CT_CC_SUPPORT_OBJC=y +CT_CC_SUPPORT_OBJCXX=y +CT_CC_SUPPORT_GOLANG=y +CT_CC_GCC=y +CT_CC="gcc" +CT_CC_CHOICE_KSYM="GCC" +CT_CC_GCC_SHOW=y + +# +# Options for gcc +# +CT_CC_GCC_PKG_KSYM="GCC" +CT_GCC_DIR_NAME="gcc" +CT_GCC_USE_GNU=y +# CT_GCC_USE_LINARO is not set +# CT_GCC_USE_ORACLE is not set +CT_GCC_USE="GCC" +CT_GCC_PKG_NAME="gcc" +# CT_GCC_SRC_RELEASE is not set +# CT_GCC_SRC_DEVEL is not set +CT_GCC_SRC_CUSTOM=y +CT_GCC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gcc/gcc-12.3.0" +CT_GCC_PATCH_GLOBAL=y +# CT_GCC_PATCH_BUNDLED is not set +# CT_GCC_PATCH_LOCAL is not set +# CT_GCC_PATCH_BUNDLED_LOCAL is not set +# CT_GCC_PATCH_LOCAL_BUNDLED is not set +# CT_GCC_PATCH_NONE is not set +CT_GCC_PATCH_ORDER="global" +# CT_GCC_VERY_NEW is not set +# CT_GCC_V_13 is not set +CT_GCC_V_12=y +# CT_GCC_V_11 is not set +# CT_GCC_V_10 is not set +# CT_GCC_V_9 is not set +# CT_GCC_V_8 is not set +# CT_GCC_V_7 is not set +# CT_GCC_V_6 is not set +CT_GCC_VERSION="12.3.0" +CT_GCC_MIRRORS="$(CT_Mirrors GNU gcc/gcc-${CT_GCC_VERSION}) $(CT_Mirrors sourceware gcc/releases/gcc-${CT_GCC_VERSION})" +CT_GCC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GCC_SIGNATURE_FORMAT="" +CT_GCC_13_or_older=y +CT_GCC_older_than_13=y +CT_GCC_later_than_12=y +CT_GCC_12_or_later=y +CT_GCC_later_than_11=y +CT_GCC_11_or_later=y +CT_GCC_later_than_10=y +CT_GCC_10_or_later=y +CT_GCC_later_than_9=y +CT_GCC_9_or_later=y +CT_GCC_later_than_8=y +CT_GCC_8_or_later=y +CT_GCC_later_than_7=y +CT_GCC_7_or_later=y +CT_GCC_later_than_6=y +CT_GCC_6_or_later=y +CT_GCC_REQUIRE_6_or_later=y +CT_GCC_later_than_5=y +CT_GCC_5_or_later=y +CT_GCC_REQUIRE_5_or_later=y +CT_GCC_later_than_4_9=y +CT_GCC_4_9_or_later=y +CT_GCC_REQUIRE_4_9_or_later=y +CT_CC_GCC_ENABLE_PLUGINS=y +CT_CC_GCC_GOLD=y +CT_CC_GCC_HAS_LIBMPX=y +CT_CC_GCC_ENABLE_CXX_FLAGS="" +CT_CC_GCC_CORE_EXTRA_CONFIG_ARRAY="" +CT_CC_GCC_EXTRA_CONFIG_ARRAY="--with-arch=armv7-a --with-gnu-as --with-gnu-ld --enable-c99 --enable-shared --enable-poison-system-directories --enable-symvers=gnu --disable-bootstrap --disable-libstdcxx-dual-abi --enable-default-pie --with-build-time-tools=\\\"${CT_PREFIX_DIR}/${CT_TARGET}/bin\\\"" +CT_CC_GCC_STATIC_LIBSTDCXX=y +# CT_CC_GCC_SYSTEM_ZLIB is not set +CT_CC_GCC_CONFIG_TLS=m + +# +# Optimisation features +# +CT_CC_GCC_USE_GRAPHITE=y +CT_CC_GCC_USE_LTO=y +CT_CC_GCC_LTO_ZSTD=m + +# +# Settings for libraries running on target +# +# CT_CC_GCC_ENABLE_DEFAULT_PIE is not set +CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y +# CT_CC_GCC_LIBMUDFLAP is not set +# CT_CC_GCC_LIBGOMP is not set +# CT_CC_GCC_LIBSSP is not set +# CT_CC_GCC_LIBQUADMATH is not set +# CT_CC_GCC_LIBSANITIZER is not set +CT_CC_GCC_LIBSTDCXX_VERBOSE=m + +# +# Misc. obscure options. +# +CT_CC_CXA_ATEXIT=y +CT_CC_GCC_TM_CLONE_REGISTRY=m +# CT_CC_GCC_DISABLE_PCH is not set +# CT_CC_GCC_SJLJ_EXCEPTIONS is not set +CT_CC_GCC_LDBL_128=m +# CT_CC_GCC_BUILD_ID is not set +CT_CC_GCC_LNK_HASH_STYLE_DEFAULT=y +# CT_CC_GCC_LNK_HASH_STYLE_SYSV is not set +# CT_CC_GCC_LNK_HASH_STYLE_GNU is not set +# CT_CC_GCC_LNK_HASH_STYLE_BOTH is not set +CT_CC_GCC_LNK_HASH_STYLE="" +CT_CC_GCC_DEC_FLOATS_AUTO=y +# CT_CC_GCC_DEC_FLOATS_BID is not set +# CT_CC_GCC_DEC_FLOATS_DPD is not set +# CT_CC_GCC_DEC_FLOATS_NO is not set +CT_CC_GCC_DEC_FLOATS="" +CT_ALL_CC_CHOICES="GCC" + +# +# Additional supported languages: +# +CT_CC_LANG_CXX=y +CT_CC_LANG_FORTRAN=y +# CT_CC_LANG_JIT is not set +# CT_CC_LANG_ADA is not set +# CT_CC_LANG_D is not set +# CT_CC_LANG_OBJC is not set +# CT_CC_LANG_OBJCXX is not set +# CT_CC_LANG_GOLANG is not set +CT_CC_LANG_OTHERS="" +# end of C compiler + +# +# Debug facilities +# +# CT_DEBUG_DUMA is not set +CT_DEBUG_GDB=y +CT_DEBUG_GDB_PKG_KSYM="GDB" +CT_GDB_DIR_NAME="gdb" +CT_GDB_PKG_NAME="gdb" +# CT_GDB_SRC_RELEASE is not set +# CT_GDB_SRC_DEVEL is not set +CT_GDB_SRC_CUSTOM=y +CT_GDB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gdb/gdb-14.1" +CT_GDB_PATCH_GLOBAL=y +# CT_GDB_PATCH_BUNDLED is not set +# CT_GDB_PATCH_LOCAL is not set +# CT_GDB_PATCH_BUNDLED_LOCAL is not set +# CT_GDB_PATCH_LOCAL_BUNDLED is not set +# CT_GDB_PATCH_NONE is not set +CT_GDB_PATCH_ORDER="global" +CT_GDB_VERY_NEW=y +# CT_GDB_V_13 is not set +# CT_GDB_V_12 is not set +# CT_GDB_V_11 is not set +# CT_GDB_V_10 is not set +# CT_GDB_V_9 is not set +# CT_GDB_V_8_3 is not set +CT_GDB_VERSION="new" +CT_GDB_MIRRORS="$(CT_Mirrors GNU gdb) $(CT_Mirrors sourceware gdb/releases)" +CT_GDB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GDB_SIGNATURE_FORMAT="" +CT_GDB_later_than_13=y +CT_GDB_13_or_later=y +CT_GDB_later_than_12=y +CT_GDB_12_or_later=y +CT_GDB_later_than_11=y +CT_GDB_11_or_later=y +CT_GDB_later_than_10=y +CT_GDB_10_or_later=y +CT_GDB_later_than_8_3=y +CT_GDB_8_3_or_later=y +CT_GDB_CROSS=y +# CT_GDB_CROSS_STATIC is not set +# CT_GDB_CROSS_SIM is not set +# CT_GDB_CROSS_PYTHON is not set +CT_GDB_CROSS_EXTRA_CONFIG_ARRAY="" +# CT_GDB_NATIVE is not set +CT_GDB_GDBSERVER=y +# CT_GDB_NATIVE_BUILD_IPA_LIB is not set +# CT_GDB_NATIVE_STATIC is not set +# CT_GDB_NATIVE_STATIC_LIBSTDCXX is not set +CT_GDB_GDBSERVER_TOPLEVEL=y +# CT_DEBUG_LTRACE is not set +# CT_DEBUG_STRACE is not set +CT_ALL_DEBUG_CHOICES="DUMA GDB LTRACE STRACE" +# end of Debug facilities + +# +# Companion libraries +# +# CT_COMPLIBS_CHECK is not set +# CT_COMP_LIBS_CLOOG is not set +CT_COMP_LIBS_EXPAT=y +CT_COMP_LIBS_EXPAT_PKG_KSYM="EXPAT" +CT_EXPAT_DIR_NAME="expat" +CT_EXPAT_PKG_NAME="expat" +# CT_EXPAT_SRC_RELEASE is not set +# CT_EXPAT_SRC_DEVEL is not set +CT_EXPAT_SRC_CUSTOM=y +CT_EXPAT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/expat/expat-2.5.0" +CT_EXPAT_PATCH_GLOBAL=y +# CT_EXPAT_PATCH_BUNDLED is not set +# CT_EXPAT_PATCH_LOCAL is not set +# CT_EXPAT_PATCH_BUNDLED_LOCAL is not set +# CT_EXPAT_PATCH_LOCAL_BUNDLED is not set +# CT_EXPAT_PATCH_NONE is not set +CT_EXPAT_PATCH_ORDER="global" +# CT_EXPAT_VERY_NEW is not set +CT_EXPAT_V_2_5=y +CT_EXPAT_VERSION="2.5.0" +CT_EXPAT_MIRRORS="http://downloads.sourceforge.net/project/expat/expat/${CT_EXPAT_VERSION} https://github.com/libexpat/libexpat/releases/download/R_${CT_EXPAT_VERSION//./_}" +CT_EXPAT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2 .tar.gz" +CT_EXPAT_SIGNATURE_FORMAT="" +CT_COMP_LIBS_GETTEXT=y +CT_COMP_LIBS_GETTEXT_PKG_KSYM="GETTEXT" +CT_GETTEXT_DIR_NAME="gettext" +CT_GETTEXT_PKG_NAME="gettext" +# CT_GETTEXT_SRC_RELEASE is not set +# CT_GETTEXT_SRC_DEVEL is not set +CT_GETTEXT_SRC_CUSTOM=y +CT_GETTEXT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gettext/gettext-0.22" +CT_GETTEXT_PATCH_GLOBAL=y +# CT_GETTEXT_PATCH_BUNDLED is not set +# CT_GETTEXT_PATCH_LOCAL is not set +# CT_GETTEXT_PATCH_BUNDLED_LOCAL is not set +# CT_GETTEXT_PATCH_LOCAL_BUNDLED is not set +# CT_GETTEXT_PATCH_NONE is not set +CT_GETTEXT_PATCH_ORDER="global" +CT_GETTEXT_VERY_NEW=y +# CT_GETTEXT_V_0_21 is not set +# CT_GETTEXT_V_0_20_1 is not set +# CT_GETTEXT_V_0_19_8_1 is not set +CT_GETTEXT_VERSION="new" +CT_GETTEXT_MIRRORS="$(CT_Mirrors GNU gettext)" +CT_GETTEXT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GETTEXT_SIGNATURE_FORMAT="packed/.sig" +CT_GETTEXT_later_than_0_21=y +CT_GETTEXT_0_21_or_later=y +CT_GETTEXT_INCOMPATIBLE_WITH_UCLIBC_NG=y + +# +# This version of gettext is not compatible with uClibc-NG. Select +# + +# +# a different version if uClibc-NG is used on the target or (in a +# + +# +# Canadian cross build) on the host. +# +CT_COMP_LIBS_GMP=y +CT_COMP_LIBS_GMP_PKG_KSYM="GMP" +CT_GMP_DIR_NAME="gmp" +CT_GMP_PKG_NAME="gmp" +# CT_GMP_SRC_RELEASE is not set +# CT_GMP_SRC_DEVEL is not set +CT_GMP_SRC_CUSTOM=y +CT_GMP_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gmp/gmp-6.3.0" +CT_GMP_PATCH_GLOBAL=y +# CT_GMP_PATCH_BUNDLED is not set +# CT_GMP_PATCH_LOCAL is not set +# CT_GMP_PATCH_BUNDLED_LOCAL is not set +# CT_GMP_PATCH_LOCAL_BUNDLED is not set +# CT_GMP_PATCH_NONE is not set +CT_GMP_PATCH_ORDER="global" +# CT_GMP_VERY_NEW is not set +CT_GMP_V_6_2=y +# CT_GMP_V_6_1 is not set +CT_GMP_VERSION="6.2.1" +CT_GMP_MIRRORS="https://gmplib.org/download/gmp https://gmplib.org/download/gmp/archive $(CT_Mirrors GNU gmp)" +CT_GMP_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2" +CT_GMP_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_ISL=y +CT_COMP_LIBS_ISL_PKG_KSYM="ISL" +CT_ISL_DIR_NAME="isl" +CT_ISL_PKG_NAME="isl" +# CT_ISL_SRC_RELEASE is not set +# CT_ISL_SRC_DEVEL is not set +CT_ISL_SRC_CUSTOM=y +CT_ISL_CUSTOM_LOCATION="${OPENSOURCE_DIR}/isl/isl-0.24" +CT_ISL_PATCH_GLOBAL=y +# CT_ISL_PATCH_BUNDLED is not set +# CT_ISL_PATCH_LOCAL is not set +# CT_ISL_PATCH_BUNDLED_LOCAL is not set +# CT_ISL_PATCH_LOCAL_BUNDLED is not set +# CT_ISL_PATCH_NONE is not set +CT_ISL_PATCH_ORDER="global" +# CT_ISL_VERY_NEW is not set +# CT_ISL_V_0_26 is not set +# CT_ISL_V_0_25 is not set +# CT_ISL_V_0_24 is not set +# CT_ISL_V_0_23 is not set +# CT_ISL_V_0_22 is not set +# CT_ISL_V_0_21 is not set +# CT_ISL_V_0_20 is not set +# CT_ISL_V_0_19 is not set +# CT_ISL_V_0_18 is not set +# CT_ISL_V_0_17 is not set +CT_ISL_V_0_16=y +# CT_ISL_V_0_15 is not set +CT_ISL_VERSION="0.16.1" +CT_ISL_MIRRORS="https://libisl.sourceforge.io" +CT_ISL_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_ISL_SIGNATURE_FORMAT="" +CT_ISL_0_18_or_older=y +CT_ISL_older_than_0_18=y +CT_ISL_later_than_0_15=y +CT_ISL_0_15_or_later=y +CT_COMP_LIBS_LIBELF=y +CT_COMP_LIBS_LIBELF_PKG_KSYM="LIBELF" +CT_LIBELF_DIR_NAME="libelf" +CT_LIBELF_PKG_NAME="libelf" +CT_LIBELF_SRC_RELEASE=y +# CT_LIBELF_SRC_DEVEL is not set +# CT_LIBELF_SRC_CUSTOM is not set +CT_LIBELF_PATCH_GLOBAL=y +# CT_LIBELF_PATCH_BUNDLED is not set +# CT_LIBELF_PATCH_LOCAL is not set +# CT_LIBELF_PATCH_BUNDLED_LOCAL is not set +# CT_LIBELF_PATCH_LOCAL_BUNDLED is not set +# CT_LIBELF_PATCH_NONE is not set +CT_LIBELF_PATCH_ORDER="global" +CT_LIBELF_V_0_8=y +CT_LIBELF_VERSION="0.8.13" +CT_LIBELF_MIRRORS="https://fossies.org/linux/misc/old http://oe-lite.org/mirror/libelf/ http://ftp.osuosl.org/pub/blfs/conglomeration/libelf/" +CT_LIBELF_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LIBELF_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LIBELF_ARCHIVE_FORMATS=".tar.gz" +CT_LIBELF_SIGNATURE_FORMAT="" +CT_COMP_LIBS_LIBICONV=y +CT_COMP_LIBS_LIBICONV_PKG_KSYM="LIBICONV" +CT_LIBICONV_DIR_NAME="libiconv" +CT_LIBICONV_PKG_NAME="libiconv" +# CT_LIBICONV_SRC_RELEASE is not set +# CT_LIBICONV_SRC_DEVEL is not set +CT_LIBICONV_SRC_CUSTOM=y +CT_LIBICONV_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libiconv/libiconv-1.16" +CT_LIBICONV_PATCH_GLOBAL=y +# CT_LIBICONV_PATCH_BUNDLED is not set +# CT_LIBICONV_PATCH_LOCAL is not set +# CT_LIBICONV_PATCH_BUNDLED_LOCAL is not set +# CT_LIBICONV_PATCH_LOCAL_BUNDLED is not set +# CT_LIBICONV_PATCH_NONE is not set +CT_LIBICONV_PATCH_ORDER="global" +# CT_LIBICONV_VERY_NEW is not set +CT_LIBICONV_V_1_16=y +# CT_LIBICONV_V_1_15 is not set +CT_LIBICONV_VERSION="1.16" +CT_LIBICONV_MIRRORS="$(CT_Mirrors GNU libiconv)" +CT_LIBICONV_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_FORMATS=".tar.gz" +CT_LIBICONV_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_MPC=y +CT_COMP_LIBS_MPC_PKG_KSYM="MPC" +CT_MPC_DIR_NAME="mpc" +CT_MPC_PKG_NAME="mpc" +# CT_MPC_SRC_RELEASE is not set +# CT_MPC_SRC_DEVEL is not set +CT_MPC_SRC_CUSTOM=y +CT_MPC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libmpc/mpc-1.3.1" +CT_MPC_PATCH_GLOBAL=y +# CT_MPC_PATCH_BUNDLED is not set +# CT_MPC_PATCH_LOCAL is not set +# CT_MPC_PATCH_BUNDLED_LOCAL is not set +# CT_MPC_PATCH_LOCAL_BUNDLED is not set +# CT_MPC_PATCH_NONE is not set +CT_MPC_PATCH_ORDER="global" +CT_MPC_VERY_NEW=y +# CT_MPC_V_1_2 is not set +CT_MPC_VERSION="new" +CT_MPC_MIRRORS="https://www.multiprecision.org/downloads $(CT_Mirrors GNU mpc)" +CT_MPC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_FORMATS=".tar.gz" +CT_MPC_SIGNATURE_FORMAT="packed/.sig" +CT_MPC_later_than_1_1_0=y +CT_MPC_1_1_0_or_later=y +CT_COMP_LIBS_MPFR=y +CT_COMP_LIBS_MPFR_PKG_KSYM="MPFR" +CT_MPFR_DIR_NAME="mpfr" +CT_MPFR_PKG_NAME="mpfr" +# CT_MPFR_SRC_RELEASE is not set +# CT_MPFR_SRC_DEVEL is not set +CT_MPFR_SRC_CUSTOM=y +CT_MPFR_CUSTOM_LOCATION="${OPENSOURCE_DIR}/mpfr/mpfr-4.2.1" +CT_MPFR_PATCH_GLOBAL=y +# CT_MPFR_PATCH_BUNDLED is not set +# CT_MPFR_PATCH_LOCAL is not set +# CT_MPFR_PATCH_BUNDLED_LOCAL is not set +# CT_MPFR_PATCH_LOCAL_BUNDLED is not set +# CT_MPFR_PATCH_NONE is not set +CT_MPFR_PATCH_ORDER="global" +# CT_MPFR_VERY_NEW is not set +CT_MPFR_V_4_2=y +CT_MPFR_VERSION="4.2.1" +CT_MPFR_MIRRORS="https://www.mpfr.org/mpfr-${CT_MPFR_VERSION} $(CT_Mirrors GNU mpfr)" +CT_MPFR_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz .zip" +CT_MPFR_SIGNATURE_FORMAT="packed/.asc" +CT_MPFR_later_than_4_0_0=y +CT_MPFR_4_0_0_or_later=y +CT_COMP_LIBS_NCURSES=y +CT_COMP_LIBS_NCURSES_PKG_KSYM="NCURSES" +CT_NCURSES_DIR_NAME="ncurses" +CT_NCURSES_PKG_NAME="ncurses" +# CT_NCURSES_SRC_RELEASE is not set +# CT_NCURSES_SRC_DEVEL is not set +CT_NCURSES_SRC_CUSTOM=y +CT_NCURSES_CUSTOM_LOCATION="${OPENSOURCE_DIR}/ncurses/ncurses-6.4" +CT_NCURSES_PATCH_GLOBAL=y +# CT_NCURSES_PATCH_BUNDLED is not set +# CT_NCURSES_PATCH_LOCAL is not set +# CT_NCURSES_PATCH_BUNDLED_LOCAL is not set +# CT_NCURSES_PATCH_LOCAL_BUNDLED is not set +# CT_NCURSES_PATCH_NONE is not set +CT_NCURSES_PATCH_ORDER="global" +# CT_NCURSES_VERY_NEW is not set +CT_NCURSES_V_6_4=y +# CT_NCURSES_V_6_2 is not set +# CT_NCURSES_V_6_1 is not set +# CT_NCURSES_V_6_0 is not set +CT_NCURSES_VERSION="6.4" +CT_NCURSES_MIRRORS="https://invisible-mirror.net/archives/ncurses $(CT_Mirrors GNU ncurses)" +CT_NCURSES_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_FORMATS=".tar.gz" +CT_NCURSES_SIGNATURE_FORMAT="packed/.sig" +CT_NCURSES_NEW_ABI=y +CT_NCURSES_HOST_CONFIG_ARGS="" +CT_NCURSES_HOST_DISABLE_DB=y +CT_NCURSES_HOST_FALLBACKS="linux,xterm,xterm-color,xterm-256color,vt100" +CT_NCURSES_TARGET_CONFIG_ARGS="" +# CT_NCURSES_TARGET_DISABLE_DB is not set +CT_NCURSES_TARGET_FALLBACKS="" +CT_COMP_LIBS_ZLIB=y +CT_COMP_LIBS_ZLIB_PKG_KSYM="ZLIB" +CT_ZLIB_DIR_NAME="zlib" +CT_ZLIB_PKG_NAME="zlib" +# CT_ZLIB_SRC_RELEASE is not set +# CT_ZLIB_SRC_DEVEL is not set +CT_ZLIB_SRC_CUSTOM=y +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.3.1" +CT_ZLIB_PATCH_GLOBAL=y +# CT_ZLIB_PATCH_BUNDLED is not set +# CT_ZLIB_PATCH_LOCAL is not set +# CT_ZLIB_PATCH_BUNDLED_LOCAL is not set +# CT_ZLIB_PATCH_LOCAL_BUNDLED is not set +# CT_ZLIB_PATCH_NONE is not set +CT_ZLIB_PATCH_ORDER="global" +CT_ZLIB_VERY_NEW=y +# CT_ZLIB_V_1_2_13 is not set +CT_ZLIB_VERSION="new" +CT_ZLIB_MIRRORS="https://github.com/madler/zlib/releases/download/v${CT_ZLIB_VERSION} https://www.zlib.net/" +CT_ZLIB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_ZLIB_SIGNATURE_FORMAT="packed/.asc" +CT_COMP_LIBS_ZSTD=y +CT_COMP_LIBS_ZSTD_PKG_KSYM="ZSTD" +CT_ZSTD_DIR_NAME="zstd" +CT_ZSTD_PKG_NAME="zstd" +# CT_ZSTD_SRC_RELEASE is not set +# CT_ZSTD_SRC_DEVEL is not set +CT_ZSTD_SRC_CUSTOM=y +CT_ZSTD_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zstd/zstd-1.5.5" +CT_ZSTD_PATCH_GLOBAL=y +# CT_ZSTD_PATCH_BUNDLED is not set +# CT_ZSTD_PATCH_LOCAL is not set +# CT_ZSTD_PATCH_BUNDLED_LOCAL is not set +# CT_ZSTD_PATCH_LOCAL_BUNDLED is not set +# CT_ZSTD_PATCH_NONE is not set +CT_ZSTD_PATCH_ORDER="global" +# CT_ZSTD_VERY_NEW is not set +CT_ZSTD_V_1_5_5=y +# CT_ZSTD_V_1_5_2 is not set +CT_ZSTD_VERSION="1.5.5" +CT_ZSTD_MIRRORS="https://github.com/facebook/zstd/releases/download/v${CT_ZSTD_VERSION} https://www.zstd.net/" +CT_ZSTD_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_FORMATS=".tar.gz" +CT_ZSTD_SIGNATURE_FORMAT="packed/.sig" +CT_ALL_COMP_LIBS_CHOICES="CLOOG EXPAT GETTEXT GMP GNUPRUMCU ISL LIBELF LIBICONV MPC MPFR NCURSES NEWLIB_NANO PICOLIBC ZLIB ZSTD" +CT_LIBICONV_NEEDED=y +CT_GETTEXT_NEEDED=y +CT_GMP_NEEDED=y +CT_MPFR_NEEDED=y +CT_ISL_NEEDED=y +CT_MPC_NEEDED=y +CT_EXPAT_NEEDED=y +CT_NCURSES_NEEDED=y +CT_ZLIB_NEEDED=y +CT_ZSTD_NEEDED=y +CT_LIBICONV=y +CT_GETTEXT=y +CT_GMP=y +CT_MPFR=y +CT_ISL=y +CT_MPC=y +CT_EXPAT=y +CT_NCURSES=y +CT_ZLIB=y +CT_ZSTD=y +# end of Companion libraries + +# +# Companion tools +# +# CT_COMP_TOOLS_FOR_HOST is not set +# CT_COMP_TOOLS_AUTOCONF is not set +# CT_COMP_TOOLS_AUTOMAKE is not set +# CT_COMP_TOOLS_BISON is not set +# CT_COMP_TOOLS_DTC is not set +# CT_COMP_TOOLS_LIBTOOL is not set +# CT_COMP_TOOLS_M4 is not set +# CT_COMP_TOOLS_MAKE is not set +CT_ALL_COMP_TOOLS_CHOICES="AUTOCONF AUTOMAKE BISON DTC LIBTOOL M4 MAKE" +# end of Companion tools + +# +# Test suite +# +# CT_TEST_SUITE_GCC is not set +# end of Test suite diff --git a/.oebuild/cross-tools/configs/config_riscv64 b/.oebuild/cross-tools/configs/config_riscv64 new file mode 100644 index 0000000000000000000000000000000000000000..0547dcb013ad55c27f21c398dc164db9774497d8 --- /dev/null +++ b/.oebuild/cross-tools/configs/config_riscv64 @@ -0,0 +1,1082 @@ +# +# Automatically generated file; DO NOT EDIT. +# crosstool-NG 1.26.0 Configuration +# +CT_CONFIGURE_has_static_link=y +CT_CONFIGURE_has_cxx11=y +CT_CONFIGURE_has_wget=y +CT_CONFIGURE_has_curl=y +CT_CONFIGURE_has_meson=y +CT_CONFIGURE_has_ninja=y +CT_CONFIGURE_has_rsync=y +CT_CONFIGURE_has_make_3_81_or_newer=y +CT_CONFIGURE_has_make_4_0_or_newer=y +CT_CONFIGURE_has_make_4_4_or_newer=y +CT_CONFIGURE_has_libtool_2_4_or_newer=y +CT_CONFIGURE_has_libtoolize_2_4_or_newer=y +CT_CONFIGURE_has_autoconf_2_65_or_newer=y +CT_CONFIGURE_has_autoreconf_2_65_or_newer=y +CT_CONFIGURE_has_automake_1_15_or_newer=y +CT_CONFIGURE_has_gnu_m4_1_4_12_or_newer=y +CT_CONFIGURE_has_python_3_4_or_newer=y +CT_CONFIGURE_has_bison_2_7_or_newer=y +CT_CONFIGURE_has_bison_3_0_4_or_newer=y +CT_CONFIGURE_has_python=y +CT_CONFIGURE_has_git=y +CT_CONFIGURE_has_md5sum=y +CT_CONFIGURE_has_sha1sum=y +CT_CONFIGURE_has_sha256sum=y +CT_CONFIGURE_has_sha512sum=y +CT_CONFIGURE_has_install_with_strip_program=y +CT_VERSION="1.26.0" +CT_VCHECK="" +CT_CONFIG_VERSION_ENV="4" +CT_CONFIG_VERSION_CURRENT="4" +CT_CONFIG_VERSION="4" +CT_MODULES=y + +# +# set open_source dir and x-tools dir, if you set CROSS_SOURCE, you should +# set like this: /xxx/open_source/. because the CROSS_SOURCE will be finanal +# /xxx/open_source/../open_source +# +OPENSOURCE_DIR="${CROSS_SOURCE}./open_source" +X_TOOLS_DIR="${HOME}/x-tools" + +# +# Paths and misc options +# + +# +# crosstool-NG behavior +# +# CT_OBSOLETE is not set +CT_EXPERIMENTAL=y +# CT_ALLOW_BUILD_AS_ROOT is not set +# CT_ENABLE_EXPERIMENTAL_BUNDLED_PATCHES is not set +# CT_DEBUG_CT is not set + +# +# Paths +# +CT_LOCAL_TARBALLS_DIR="${HOME}/src" +CT_SAVE_TARBALLS=y +# CT_TARBALLS_BUILDROOT_LAYOUT is not set +CT_WORK_DIR="${CT_TOP_DIR}/.build" +CT_BUILD_TOP_DIR="${CT_WORK_DIR:-${CT_TOP_DIR}/.build}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_BUILD_DIR="${CT_BUILD_TOP_DIR}/build" +CT_PREFIX_DIR="${CT_PREFIX:-${X_TOOLS_DIR}}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_RM_RF_PREFIX_DIR=y +CT_REMOVE_DOCS=y +CT_INSTALL_LICENSES=y +CT_PREFIX_DIR_RO=y +CT_STRIP_HOST_TOOLCHAIN_EXECUTABLES=y +# CT_STRIP_TARGET_TOOLCHAIN_EXECUTABLES is not set +# CT_TARBALL_RESULT is not set + +# +# Downloading +# +# CT_DOWNLOAD_AGENT_WGET is not set +CT_DOWNLOAD_AGENT_CURL=y +# CT_DOWNLOAD_AGENT_NONE is not set +# CT_FORBID_DOWNLOAD is not set +# CT_FORCE_DOWNLOAD is not set +CT_CONNECT_TIMEOUT=10 +CT_DOWNLOAD_CURL_OPTIONS="--location --ftp-pasv --retry 3 --fail --silent" +# CT_ONLY_DOWNLOAD is not set +# CT_USE_MIRROR is not set +CT_VERIFY_DOWNLOAD_DIGEST=y +CT_VERIFY_DOWNLOAD_DIGEST_SHA512=y +# CT_VERIFY_DOWNLOAD_DIGEST_SHA256 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_SHA1 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_MD5 is not set +CT_VERIFY_DOWNLOAD_DIGEST_ALG="sha512" +# CT_VERIFY_DOWNLOAD_SIGNATURE is not set + +# +# Extracting +# +# CT_FORCE_EXTRACT is not set +CT_OVERRIDE_CONFIG_GUESS_SUB=y +# CT_ONLY_EXTRACT is not set +CT_PATCH_BUNDLED=y +# CT_PATCH_LOCAL is not set +# CT_PATCH_BUNDLED_LOCAL is not set +# CT_PATCH_LOCAL_BUNDLED is not set +# CT_PATCH_NONE is not set +CT_PATCH_ORDER="bundled" + +# +# Build behavior +# +CT_PARALLEL_JOBS=0 +CT_LOAD="" +CT_USE_PIPES=y +CT_EXTRA_CFLAGS_FOR_BUILD="" +CT_EXTRA_CXXFLAGS_FOR_BUILD="" +CT_EXTRA_LDFLAGS_FOR_BUILD="" +CT_EXTRA_CFLAGS_FOR_HOST="" +CT_EXTRA_LDFLAGS_FOR_HOST="" +# CT_CONFIG_SHELL_SH is not set +# CT_CONFIG_SHELL_ASH is not set +CT_CONFIG_SHELL_BASH=y +# CT_CONFIG_SHELL_CUSTOM is not set +CT_CONFIG_SHELL="${bash}" + +# +# Logging +# +# CT_LOG_ERROR is not set +# CT_LOG_WARN is not set +# CT_LOG_INFO is not set +CT_LOG_EXTRA=y +# CT_LOG_ALL is not set +# CT_LOG_DEBUG is not set +CT_LOG_LEVEL_MAX="EXTRA" +# CT_LOG_SEE_TOOLS_WARN is not set +CT_LOG_PROGRESS_BAR=y +CT_LOG_TO_FILE=y +CT_LOG_FILE_COMPRESS=y +# end of Paths and misc options + +# +# Target options +# +# CT_ARCH_ALPHA is not set +# CT_ARCH_ARC is not set +# CT_ARCH_ARM is not set +# CT_ARCH_AVR is not set +# CT_ARCH_BPF is not set +# CT_ARCH_C6X is not set +# CT_ARCH_LOONGARCH is not set +# CT_ARCH_M68K is not set +# CT_ARCH_MICROBLAZE is not set +# CT_ARCH_MIPS is not set +# CT_ARCH_MOXIE is not set +# CT_ARCH_MSP430 is not set +# CT_ARCH_NIOS2 is not set +# CT_ARCH_POWERPC is not set +# CT_ARCH_PRU is not set +CT_ARCH_RISCV=y +# CT_ARCH_S390 is not set +# CT_ARCH_SH is not set +# CT_ARCH_SPARC is not set +# CT_ARCH_X86 is not set +# CT_ARCH_XTENSA is not set +CT_ARCH="riscv" +CT_ARCH_CHOICE_KSYM="RISCV" +CT_ARCH_TUNE="" +CT_ARCH_RISCV_SHOW=y + +# +# Options for riscv +# +CT_ARCH_RISCV_PKG_KSYM="" +CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR BPF C6X LOONGARCH M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA" +CT_ARCH_SUFFIX="" +# CT_OMIT_TARGET_VENDOR is not set + +# +# Generic target options +# +# CT_MULTILIB is not set +# CT_DEMULTILIB is not set +CT_ARCH_SUPPORTS_BOTH_MMU=y +CT_ARCH_USE_MMU=y +CT_ARCH_SUPPORTS_LIBSANITIZER=y +CT_ARCH_SUPPORTS_32=y +CT_ARCH_SUPPORTS_64=y +CT_ARCH_DEFAULT_32=y +CT_ARCH_BITNESS=64 +# CT_ARCH_32 is not set +CT_ARCH_64=y + +# +# Target optimisations +# +CT_ARCH_SUPPORTS_WITH_ARCH=y +CT_ARCH_SUPPORTS_WITH_ABI=y +CT_ARCH_SUPPORTS_WITH_TUNE=y +CT_ARCH_ARCH="rv64gc" +CT_ARCH_ABI="" +CT_TARGET_CFLAGS="" +CT_TARGET_LDFLAGS="" +# end of Target options + +# +# Toolchain options +# + +# +# General toolchain options +# +CT_FORCE_SYSROOT=y +CT_USE_SYSROOT=y +CT_SYSROOT_NAME="sysroot" +CT_SYSROOT_DIR_PREFIX="" +CT_WANTS_STATIC_LINK=y +CT_WANTS_STATIC_LINK_CXX=y +# CT_STATIC_TOOLCHAIN is not set +CT_SHOW_CT_VERSION=y +CT_TOOLCHAIN_PKGVERSION="" +CT_TOOLCHAIN_BUGURL="" + +# +# Tuple completion and aliasing +# +CT_TARGET_VENDOR="openeuler" +CT_TARGET_ALIAS_SED_EXPR="" +CT_TARGET_ALIAS="" + +# +# Toolchain type +# +# CT_NATIVE is not set +CT_CROSS=y +# CT_CROSS_NATIVE is not set +# CT_CANADIAN is not set +CT_TOOLCHAIN_TYPE="cross" + +# +# Build system +# +CT_BUILD="" +CT_BUILD_PREFIX="" +CT_BUILD_SUFFIX="" + +# +# Misc options +# +# CT_TOOLCHAIN_ENABLE_NLS is not set +# end of Toolchain options + +# +# Operating System +# +CT_KERNEL_SUPPORTS_SHARED_LIBS=y +# CT_KERNEL_BARE_METAL is not set +CT_KERNEL_LINUX=y +CT_KERNEL="linux" +CT_KERNEL_CHOICE_KSYM="LINUX" +CT_KERNEL_LINUX_SHOW=y + +# +# Options for linux +# +CT_KERNEL_LINUX_PKG_KSYM="LINUX" +CT_LINUX_DIR_NAME="linux" +CT_LINUX_USE_WWW_KERNEL_ORG=y +# CT_LINUX_USE_ORACLE is not set +CT_LINUX_USE="LINUX" +CT_LINUX_PKG_NAME="linux" +# CT_LINUX_SRC_RELEASE is not set +# CT_LINUX_SRC_DEVEL is not set +CT_LINUX_SRC_CUSTOM=y +CT_LINUX_CUSTOM_LOCATION="${OPENSOURCE_DIR}/kernel" +CT_LINUX_PATCH_GLOBAL=y +# CT_LINUX_PATCH_BUNDLED is not set +# CT_LINUX_PATCH_LOCAL is not set +# CT_LINUX_PATCH_BUNDLED_LOCAL is not set +# CT_LINUX_PATCH_LOCAL_BUNDLED is not set +# CT_LINUX_PATCH_NONE is not set +CT_LINUX_PATCH_ORDER="global" +# CT_LINUX_VERY_NEW is not set +# CT_LINUX_V_6_4 is not set +# CT_LINUX_V_6_3 is not set +# CT_LINUX_V_6_2 is not set +# CT_LINUX_V_6_1 is not set +# CT_LINUX_V_6_0 is not set +# CT_LINUX_V_5_19 is not set +# CT_LINUX_V_5_18 is not set +# CT_LINUX_V_5_17 is not set +# CT_LINUX_V_5_16 is not set +# CT_LINUX_V_5_15 is not set +# CT_LINUX_V_5_14 is not set +# CT_LINUX_V_5_13 is not set +# CT_LINUX_V_5_12 is not set +# CT_LINUX_V_5_11 is not set +CT_LINUX_V_5_10=y +# CT_LINUX_V_5_9 is not set +# CT_LINUX_V_5_8 is not set +# CT_LINUX_V_5_7 is not set +# CT_LINUX_V_5_4 is not set +# CT_LINUX_V_5_3 is not set +# CT_LINUX_V_5_2 is not set +# CT_LINUX_V_5_1 is not set +# CT_LINUX_V_5_0 is not set +# CT_LINUX_V_4_20 is not set +# CT_LINUX_V_4_19 is not set +# CT_LINUX_V_4_18 is not set +# CT_LINUX_V_4_17 is not set +# CT_LINUX_V_4_16 is not set +# CT_LINUX_V_4_15 is not set +# CT_LINUX_V_4_14 is not set +# CT_LINUX_V_4_13 is not set +# CT_LINUX_V_4_12 is not set +# CT_LINUX_V_4_11 is not set +# CT_LINUX_V_4_10 is not set +# CT_LINUX_V_4_9 is not set +# CT_LINUX_V_4_4 is not set +# CT_LINUX_V_4_1 is not set +# CT_LINUX_V_3_16 is not set +# CT_LINUX_V_3_13 is not set +# CT_LINUX_V_3_12 is not set +# CT_LINUX_V_3_10 is not set +# CT_LINUX_V_3_4 is not set +# CT_LINUX_V_3_2 is not set +CT_LINUX_VERSION="5.10.185" +CT_LINUX_MIRRORS="$(CT_Mirrors kernel.org linux ${CT_LINUX_VERSION})" +CT_LINUX_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_LINUX_SIGNATURE_FORMAT="unpacked/.sign" +CT_LINUX_5_19_or_older=y +CT_LINUX_older_than_5_19=y +CT_LINUX_5_12_or_older=y +CT_LINUX_older_than_5_12=y +CT_LINUX_later_than_5_5=y +CT_LINUX_5_5_or_later=y +CT_LINUX_later_than_5_3=y +CT_LINUX_5_3_or_later=y +CT_LINUX_later_than_4_8=y +CT_LINUX_4_8_or_later=y +CT_LINUX_later_than_3_7=y +CT_LINUX_3_7_or_later=y +CT_LINUX_later_than_3_2=y +CT_LINUX_3_2_or_later=y +CT_LINUX_REQUIRE_3_2_or_later=y +CT_KERNEL_DEP_RSYNC=y +CT_KERNEL_LINUX_VERBOSITY_0=y +# CT_KERNEL_LINUX_VERBOSITY_1 is not set +# CT_KERNEL_LINUX_VERBOSITY_2 is not set +CT_KERNEL_LINUX_VERBOSE_LEVEL=0 +CT_ALL_KERNEL_CHOICES="BARE_METAL LINUX WINDOWS" + +# +# Common kernel options +# +CT_SHARED_LIBS=y +# end of Operating System + +# +# Binary utilities +# +CT_ARCH_BINFMT_ELF=y +CT_BINUTILS_BINUTILS=y +CT_BINUTILS="binutils" +CT_BINUTILS_CHOICE_KSYM="BINUTILS" +CT_BINUTILS_BINUTILS_SHOW=y + +# +# Options for binutils +# +CT_BINUTILS_BINUTILS_PKG_KSYM="BINUTILS" +CT_BINUTILS_DIR_NAME="binutils" +CT_BINUTILS_USE_GNU=y +# CT_BINUTILS_USE_LINARO is not set +# CT_BINUTILS_USE_ORACLE is not set +CT_BINUTILS_USE="BINUTILS" +CT_BINUTILS_PKG_NAME="binutils" +# CT_BINUTILS_SRC_RELEASE is not set +# CT_BINUTILS_SRC_DEVEL is not set +CT_BINUTILS_SRC_CUSTOM=y +CT_BINUTILS_CUSTOM_LOCATION="${OPENSOURCE_DIR}/binutils/binutils-2.41" +CT_BINUTILS_PATCH_GLOBAL=y +# CT_BINUTILS_PATCH_BUNDLED is not set +# CT_BINUTILS_PATCH_LOCAL is not set +# CT_BINUTILS_PATCH_BUNDLED_LOCAL is not set +# CT_BINUTILS_PATCH_LOCAL_BUNDLED is not set +# CT_BINUTILS_PATCH_NONE is not set +CT_BINUTILS_PATCH_ORDER="global" +CT_BINUTILS_VERY_NEW=y +# CT_BINUTILS_V_2_40 is not set +# CT_BINUTILS_V_2_39 is not set +# CT_BINUTILS_V_2_38 is not set +# CT_BINUTILS_V_2_37 is not set +# CT_BINUTILS_V_2_36 is not set +# CT_BINUTILS_V_2_35 is not set +# CT_BINUTILS_V_2_34 is not set +# CT_BINUTILS_V_2_33 is not set +# CT_BINUTILS_V_2_32 is not set +# CT_BINUTILS_V_2_31 is not set +# CT_BINUTILS_V_2_30 is not set +# CT_BINUTILS_V_2_29 is not set +# CT_BINUTILS_V_2_28 is not set +# CT_BINUTILS_V_2_27 is not set +# CT_BINUTILS_V_2_26 is not set +CT_BINUTILS_VERSION="new" +CT_BINUTILS_MIRRORS="$(CT_Mirrors GNU binutils) $(CT_Mirrors sourceware binutils/releases)" +CT_BINUTILS_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_BINUTILS_SIGNATURE_FORMAT="packed/.sig" +CT_BINUTILS_later_than_2_39=y +CT_BINUTILS_2_39_or_later=y +CT_BINUTILS_later_than_2_30=y +CT_BINUTILS_2_30_or_later=y +CT_BINUTILS_later_than_2_27=y +CT_BINUTILS_2_27_or_later=y +CT_BINUTILS_later_than_2_26=y +CT_BINUTILS_2_26_or_later=y + +# +# GNU binutils +# +CT_BINUTILS_FORCE_LD_BFD_DEFAULT=y +CT_BINUTILS_LINKER_LD=y +CT_BINUTILS_LINKERS_LIST="ld" +CT_BINUTILS_LINKER_DEFAULT="bfd" +# CT_BINUTILS_PLUGINS is not set +CT_BINUTILS_RELRO=m +CT_BINUTILS_DETERMINISTIC_ARCHIVES=y +CT_BINUTILS_EXTRA_CONFIG_ARRAY="" +# CT_BINUTILS_FOR_TARGET is not set +CT_ALL_BINUTILS_CHOICES="BINUTILS" +# end of Binary utilities + +# +# C-library +# +CT_LIBC_GLIBC=y +# CT_LIBC_MUSL is not set +# CT_LIBC_UCLIBC_NG is not set +CT_LIBC="glibc" +CT_LIBC_CHOICE_KSYM="GLIBC" +CT_LIBC_GLIBC_SHOW=y + +# +# Options for glibc +# +CT_LIBC_GLIBC_PKG_KSYM="GLIBC" +CT_GLIBC_DIR_NAME="glibc" +CT_GLIBC_USE_GNU=y +# CT_GLIBC_USE_ORACLE is not set +CT_GLIBC_USE="GLIBC" +CT_GLIBC_PKG_NAME="glibc" +# CT_GLIBC_SRC_RELEASE is not set +# CT_GLIBC_SRC_DEVEL is not set +CT_GLIBC_SRC_CUSTOM=y +CT_GLIBC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/glibc/glibc-2.38" +CT_GLIBC_PATCH_GLOBAL=y +# CT_GLIBC_PATCH_BUNDLED is not set +# CT_GLIBC_PATCH_LOCAL is not set +# CT_GLIBC_PATCH_BUNDLED_LOCAL is not set +# CT_GLIBC_PATCH_LOCAL_BUNDLED is not set +# CT_GLIBC_PATCH_NONE is not set +CT_GLIBC_PATCH_ORDER="global" +# CT_GLIBC_VERY_NEW is not set +CT_GLIBC_V_2_38=y +# CT_GLIBC_V_2_37 is not set +# CT_GLIBC_V_2_36 is not set +# CT_GLIBC_V_2_35 is not set +# CT_GLIBC_V_2_34 is not set +# CT_GLIBC_V_2_33 is not set +# CT_GLIBC_V_2_32 is not set +# CT_GLIBC_V_2_31 is not set +# CT_GLIBC_V_2_30 is not set +# CT_GLIBC_V_2_29 is not set +CT_GLIBC_VERSION="2.38" +CT_GLIBC_MIRRORS="$(CT_Mirrors GNU glibc)" +CT_GLIBC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GLIBC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GLIBC_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_GLIBC_SIGNATURE_FORMAT="packed/.sig" +CT_GLIBC_2_38_or_later=y +CT_GLIBC_2_38_or_older=y +CT_GLIBC_later_than_2_37=y +CT_GLIBC_2_37_or_later=y +CT_GLIBC_later_than_2_36=y +CT_GLIBC_2_36_or_later=y +CT_GLIBC_later_than_2_34=y +CT_GLIBC_2_34_or_later=y +CT_GLIBC_later_than_2_32=y +CT_GLIBC_2_32_or_later=y +CT_GLIBC_later_than_2_31=y +CT_GLIBC_2_31_or_later=y +CT_GLIBC_later_than_2_30=y +CT_GLIBC_2_30_or_later=y +CT_GLIBC_later_than_2_29=y +CT_GLIBC_2_29_or_later=y +CT_GLIBC_REQUIRE_2_29_or_later=y +CT_GLIBC_later_than_2_28=y +CT_GLIBC_2_28_or_later=y +CT_GLIBC_later_than_2_27=y +CT_GLIBC_2_27_or_later=y +CT_GLIBC_later_than_2_26=y +CT_GLIBC_2_26_or_later=y +CT_GLIBC_later_than_2_25=y +CT_GLIBC_2_25_or_later=y +CT_GLIBC_later_than_2_24=y +CT_GLIBC_2_24_or_later=y +CT_GLIBC_later_than_2_23=y +CT_GLIBC_2_23_or_later=y +CT_GLIBC_later_than_2_20=y +CT_GLIBC_2_20_or_later=y +CT_GLIBC_later_than_2_17=y +CT_GLIBC_2_17_or_later=y +CT_GLIBC_later_than_2_14=y +CT_GLIBC_2_14_or_later=y +CT_GLIBC_DEP_KERNEL_HEADERS_VERSION=y +CT_GLIBC_DEP_BINUTILS=y +CT_GLIBC_DEP_GCC=y +CT_GLIBC_DEP_PYTHON=y +CT_THREADS="nptl" +CT_GLIBC_BUILD_SSP=y +CT_GLIBC_HAS_LIBIDN_ADDON=y +# CT_GLIBC_USE_LIBIDN_ADDON is not set +CT_GLIBC_NO_SPARC_V8=y +CT_GLIBC_HAS_OBSOLETE_LIBCRYPT=y +CT_GLIBC_EXTRA_CONFIG_ARRAY="--enable-crypt" +CT_GLIBC_CONFIGPARMS="rtlddir=/lib64/lp64d" +CT_GLIBC_ENABLE_DEBUG=y +CT_GLIBC_EXTRA_CFLAGS="" +# CT_GLIBC_ENABLE_OBSOLETE_LIBCRYPT is not set +# CT_GLIBC_ENABLE_FORTIFIED_BUILD is not set +# CT_GLIBC_DISABLE_VERSIONING is not set +CT_GLIBC_OLDEST_ABI="" +CT_GLIBC_FORCE_UNWIND=y +# CT_GLIBC_LOCALES is not set +# CT_GLIBC_KERNEL_VERSION_NONE is not set +CT_GLIBC_KERNEL_VERSION_AS_HEADERS=y +# CT_GLIBC_KERNEL_VERSION_CHOSEN is not set +CT_GLIBC_MIN_KERNEL="5.10.185" +CT_GLIBC_SSP_DEFAULT=y +# CT_GLIBC_SSP_NO is not set +# CT_GLIBC_SSP_YES is not set +# CT_GLIBC_SSP_ALL is not set +# CT_GLIBC_SSP_STRONG is not set +CT_GLIBC_ENABLE_WERROR=y +# CT_GLIBC_ENABLE_COMMON_FLAG is not set +CT_ALL_LIBC_CHOICES="AVR_LIBC GLIBC MINGW_W64 MOXIEBOX MUSL NEWLIB NONE PICOLIBC UCLIBC_NG" +CT_LIBC_SUPPORT_THREADS_ANY=y +CT_LIBC_SUPPORT_THREADS_NATIVE=y + +# +# Common C library options +# +CT_THREADS_NATIVE=y +# CT_CREATE_LDSO_CONF is not set +CT_LIBC_XLDD=y +# end of C-library + +# +# C compiler +# +CT_CC_CORE_NEEDED=y +CT_CC_SUPPORT_CXX=y +CT_CC_SUPPORT_FORTRAN=y +CT_CC_SUPPORT_ADA=y +CT_CC_SUPPORT_D=y +CT_CC_SUPPORT_JIT=y +CT_CC_SUPPORT_OBJC=y +CT_CC_SUPPORT_OBJCXX=y +CT_CC_SUPPORT_GOLANG=y +CT_CC_GCC=y +CT_CC="gcc" +CT_CC_CHOICE_KSYM="GCC" +CT_CC_GCC_SHOW=y + +# +# Options for gcc +# +CT_CC_GCC_PKG_KSYM="GCC" +CT_GCC_DIR_NAME="gcc" +CT_GCC_USE_GNU=y +# CT_GCC_USE_LINARO is not set +# CT_GCC_USE_ORACLE is not set +CT_GCC_USE="GCC" +CT_GCC_PKG_NAME="gcc" +# CT_GCC_SRC_RELEASE is not set +# CT_GCC_SRC_DEVEL is not set +CT_GCC_SRC_CUSTOM=y +CT_GCC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gcc/gcc-12.3.0" +CT_GCC_PATCH_GLOBAL=y +# CT_GCC_PATCH_BUNDLED is not set +# CT_GCC_PATCH_LOCAL is not set +# CT_GCC_PATCH_BUNDLED_LOCAL is not set +# CT_GCC_PATCH_LOCAL_BUNDLED is not set +# CT_GCC_PATCH_NONE is not set +CT_GCC_PATCH_ORDER="global" +# CT_GCC_VERY_NEW is not set +# CT_GCC_V_13 is not set +CT_GCC_V_12=y +# CT_GCC_V_11 is not set +# CT_GCC_V_10 is not set +# CT_GCC_V_9 is not set +# CT_GCC_V_8 is not set +# CT_GCC_V_7 is not set +CT_GCC_VERSION="12.3.0" +CT_GCC_MIRRORS="$(CT_Mirrors GNU gcc/gcc-${CT_GCC_VERSION}) $(CT_Mirrors sourceware gcc/releases/gcc-${CT_GCC_VERSION})" +CT_GCC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GCC_SIGNATURE_FORMAT="" +CT_GCC_13_or_older=y +CT_GCC_older_than_13=y +CT_GCC_later_than_12=y +CT_GCC_12_or_later=y +CT_GCC_later_than_11=y +CT_GCC_11_or_later=y +CT_GCC_later_than_10=y +CT_GCC_10_or_later=y +CT_GCC_later_than_9=y +CT_GCC_9_or_later=y +CT_GCC_later_than_8=y +CT_GCC_8_or_later=y +CT_GCC_later_than_7=y +CT_GCC_7_or_later=y +CT_GCC_REQUIRE_7_or_later=y +CT_GCC_later_than_6=y +CT_GCC_6_or_later=y +CT_GCC_REQUIRE_6_or_later=y +CT_GCC_later_than_5=y +CT_GCC_5_or_later=y +CT_GCC_REQUIRE_5_or_later=y +CT_GCC_later_than_4_9=y +CT_GCC_4_9_or_later=y +CT_GCC_REQUIRE_4_9_or_later=y +CT_CC_GCC_HAS_LIBMPX=y +CT_CC_GCC_ENABLE_CXX_FLAGS="" +CT_CC_GCC_CORE_EXTRA_CONFIG_ARRAY="" +CT_CC_GCC_EXTRA_CONFIG_ARRAY=" --disable-multilib --with-abi=lp64d --with-gnu-as --with-gnu-ld --enable-c99 --enable-shared --enable-poison-system-directories --enable-symvers=gnu --disable-bootstrap --disable-libstdcxx-dual-abi --enable-default-pie --with-toolexeclibdir=\"${CT_PREFIX_DIR}/${CT_TARGET}/sysroot/lib64/lp64d/\"" +CT_CC_GCC_STATIC_LIBSTDCXX=y +# CT_CC_GCC_SYSTEM_ZLIB is not set +CT_CC_GCC_CONFIG_TLS=m + +# +# Optimisation features +# +CT_CC_GCC_USE_GRAPHITE=y +CT_CC_GCC_USE_LTO=y +CT_CC_GCC_LTO_ZSTD=m + +# +# Settings for libraries running on target +# +# CT_CC_GCC_ENABLE_DEFAULT_PIE is not set +CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y +# CT_CC_GCC_LIBMUDFLAP is not set +# CT_CC_GCC_LIBGOMP is not set +# CT_CC_GCC_LIBSSP is not set +# CT_CC_GCC_LIBQUADMATH is not set +# CT_CC_GCC_LIBSANITIZER is not set +CT_CC_GCC_LIBSTDCXX_VERBOSE=m + +# +# Misc. obscure options. +# +CT_CC_CXA_ATEXIT=y +CT_CC_GCC_TM_CLONE_REGISTRY=m +# CT_CC_GCC_DISABLE_PCH is not set +CT_CC_GCC_SJLJ_EXCEPTIONS=m +CT_CC_GCC_LDBL_128=m +# CT_CC_GCC_BUILD_ID is not set +CT_CC_GCC_LNK_HASH_STYLE_DEFAULT=y +# CT_CC_GCC_LNK_HASH_STYLE_SYSV is not set +# CT_CC_GCC_LNK_HASH_STYLE_GNU is not set +# CT_CC_GCC_LNK_HASH_STYLE_BOTH is not set +CT_CC_GCC_LNK_HASH_STYLE="" +CT_CC_GCC_DEC_FLOATS_AUTO=y +# CT_CC_GCC_DEC_FLOATS_BID is not set +# CT_CC_GCC_DEC_FLOATS_DPD is not set +# CT_CC_GCC_DEC_FLOATS_NO is not set +CT_CC_GCC_DEC_FLOATS="" +CT_ALL_CC_CHOICES="GCC" + +# +# Additional supported languages: +# +CT_CC_LANG_CXX=y +CT_CC_LANG_FORTRAN=y +# CT_CC_LANG_JIT is not set +# CT_CC_LANG_ADA is not set +# CT_CC_LANG_D is not set +# CT_CC_LANG_OBJC is not set +# CT_CC_LANG_OBJCXX is not set +# CT_CC_LANG_GOLANG is not set +CT_CC_LANG_OTHERS="" +# end of C compiler + +# +# Debug facilities +# +# CT_DEBUG_DUMA is not set +CT_DEBUG_GDB=y +CT_DEBUG_GDB_PKG_KSYM="GDB" +CT_GDB_DIR_NAME="gdb" +CT_GDB_PKG_NAME="gdb" +# CT_GDB_SRC_RELEASE is not set +# CT_GDB_SRC_DEVEL is not set +CT_GDB_SRC_CUSTOM=y +CT_GDB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gdb/gdb-14.1" +CT_GDB_PATCH_GLOBAL=y +# CT_GDB_PATCH_BUNDLED is not set +# CT_GDB_PATCH_LOCAL is not set +# CT_GDB_PATCH_BUNDLED_LOCAL is not set +# CT_GDB_PATCH_LOCAL_BUNDLED is not set +# CT_GDB_PATCH_NONE is not set +CT_GDB_PATCH_ORDER="global" +CT_GDB_VERY_NEW=y +# CT_GDB_V_13 is not set +# CT_GDB_V_12 is not set +# CT_GDB_V_11 is not set +# CT_GDB_V_10 is not set +# CT_GDB_V_9 is not set +# CT_GDB_V_8_3 is not set +CT_GDB_VERSION="new" +CT_GDB_MIRRORS="$(CT_Mirrors GNU gdb) $(CT_Mirrors sourceware gdb/releases)" +CT_GDB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GDB_SIGNATURE_FORMAT="" +CT_GDB_later_than_13=y +CT_GDB_13_or_later=y +CT_GDB_later_than_12=y +CT_GDB_12_or_later=y +CT_GDB_later_than_11=y +CT_GDB_11_or_later=y +CT_GDB_later_than_10=y +CT_GDB_10_or_later=y +CT_GDB_later_than_8_3=y +CT_GDB_8_3_or_later=y +CT_GDB_CROSS=y +# CT_GDB_CROSS_STATIC is not set +# CT_GDB_CROSS_SIM is not set +# CT_GDB_CROSS_PYTHON is not set +CT_GDB_CROSS_EXTRA_CONFIG_ARRAY="" +# CT_GDB_NATIVE is not set +# CT_GDB_GDBSERVER is not set +CT_GDB_GDBSERVER_TOPLEVEL=y +# CT_DEBUG_LTRACE is not set +# CT_DEBUG_STRACE is not set +CT_ALL_DEBUG_CHOICES="DUMA GDB LTRACE STRACE" +# end of Debug facilities + +# +# Companion libraries +# +# CT_COMPLIBS_CHECK is not set +# CT_COMP_LIBS_CLOOG is not set +CT_COMP_LIBS_EXPAT=y +CT_COMP_LIBS_EXPAT_PKG_KSYM="EXPAT" +CT_EXPAT_DIR_NAME="expat" +CT_EXPAT_PKG_NAME="expat" +# CT_EXPAT_SRC_RELEASE is not set +# CT_EXPAT_SRC_DEVEL is not set +CT_EXPAT_SRC_CUSTOM=y +CT_EXPAT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/expat/expat-2.5.0" +CT_EXPAT_PATCH_GLOBAL=y +# CT_EXPAT_PATCH_BUNDLED is not set +# CT_EXPAT_PATCH_LOCAL is not set +# CT_EXPAT_PATCH_BUNDLED_LOCAL is not set +# CT_EXPAT_PATCH_LOCAL_BUNDLED is not set +# CT_EXPAT_PATCH_NONE is not set +CT_EXPAT_PATCH_ORDER="global" +# CT_EXPAT_VERY_NEW is not set +CT_EXPAT_V_2_5=y +CT_EXPAT_VERSION="2.5.0" +CT_EXPAT_MIRRORS="http://downloads.sourceforge.net/project/expat/expat/${CT_EXPAT_VERSION} https://github.com/libexpat/libexpat/releases/download/R_${CT_EXPAT_VERSION//./_}" +CT_EXPAT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2 .tar.gz" +CT_EXPAT_SIGNATURE_FORMAT="" +CT_COMP_LIBS_GETTEXT=y +CT_COMP_LIBS_GETTEXT_PKG_KSYM="GETTEXT" +CT_GETTEXT_DIR_NAME="gettext" +CT_GETTEXT_PKG_NAME="gettext" +# CT_GETTEXT_SRC_RELEASE is not set +# CT_GETTEXT_SRC_DEVEL is not set +CT_GETTEXT_SRC_CUSTOM=y +CT_GETTEXT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gettext/gettext-0.22" +CT_GETTEXT_PATCH_GLOBAL=y +# CT_GETTEXT_PATCH_BUNDLED is not set +# CT_GETTEXT_PATCH_LOCAL is not set +# CT_GETTEXT_PATCH_BUNDLED_LOCAL is not set +# CT_GETTEXT_PATCH_LOCAL_BUNDLED is not set +# CT_GETTEXT_PATCH_NONE is not set +CT_GETTEXT_PATCH_ORDER="global" +CT_GETTEXT_VERY_NEW=y +# CT_GETTEXT_V_0_21 is not set +# CT_GETTEXT_V_0_20_1 is not set +# CT_GETTEXT_V_0_19_8_1 is not set +CT_GETTEXT_VERSION="new" +CT_GETTEXT_MIRRORS="$(CT_Mirrors GNU gettext)" +CT_GETTEXT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GETTEXT_SIGNATURE_FORMAT="packed/.sig" +CT_GETTEXT_later_than_0_21=y +CT_GETTEXT_0_21_or_later=y +CT_GETTEXT_INCOMPATIBLE_WITH_UCLIBC_NG=y + +# +# This version of gettext is not compatible with uClibc-NG. Select +# + +# +# a different version if uClibc-NG is used on the target or (in a +# + +# +# Canadian cross build) on the host. +# +CT_COMP_LIBS_GMP=y +CT_COMP_LIBS_GMP_PKG_KSYM="GMP" +CT_GMP_DIR_NAME="gmp" +CT_GMP_PKG_NAME="gmp" +# CT_GMP_SRC_RELEASE is not set +# CT_GMP_SRC_DEVEL is not set +CT_GMP_SRC_CUSTOM=y +CT_GMP_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gmp/gmp-6.3.0" +CT_GMP_PATCH_GLOBAL=y +# CT_GMP_PATCH_BUNDLED is not set +# CT_GMP_PATCH_LOCAL is not set +# CT_GMP_PATCH_BUNDLED_LOCAL is not set +# CT_GMP_PATCH_LOCAL_BUNDLED is not set +# CT_GMP_PATCH_NONE is not set +CT_GMP_PATCH_ORDER="global" +# CT_GMP_VERY_NEW is not set +CT_GMP_V_6_2=y +# CT_GMP_V_6_1 is not set +CT_GMP_VERSION="6.2.1" +CT_GMP_MIRRORS="https://gmplib.org/download/gmp https://gmplib.org/download/gmp/archive $(CT_Mirrors GNU gmp)" +CT_GMP_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2" +CT_GMP_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_ISL=y +CT_COMP_LIBS_ISL_PKG_KSYM="ISL" +CT_ISL_DIR_NAME="isl" +CT_ISL_PKG_NAME="isl" +# CT_ISL_SRC_RELEASE is not set +# CT_ISL_SRC_DEVEL is not set +CT_ISL_SRC_CUSTOM=y +CT_ISL_CUSTOM_LOCATION="${OPENSOURCE_DIR}/isl/isl-0.24" +CT_ISL_PATCH_GLOBAL=y +# CT_ISL_PATCH_BUNDLED is not set +# CT_ISL_PATCH_LOCAL is not set +# CT_ISL_PATCH_BUNDLED_LOCAL is not set +# CT_ISL_PATCH_LOCAL_BUNDLED is not set +# CT_ISL_PATCH_NONE is not set +CT_ISL_PATCH_ORDER="global" +# CT_ISL_VERY_NEW is not set +# CT_ISL_V_0_26 is not set +# CT_ISL_V_0_25 is not set +# CT_ISL_V_0_24 is not set +# CT_ISL_V_0_23 is not set +# CT_ISL_V_0_22 is not set +# CT_ISL_V_0_21 is not set +# CT_ISL_V_0_20 is not set +# CT_ISL_V_0_19 is not set +# CT_ISL_V_0_18 is not set +# CT_ISL_V_0_17 is not set +CT_ISL_V_0_16=y +# CT_ISL_V_0_15 is not set +CT_ISL_VERSION="0.16.1" +CT_ISL_MIRRORS="https://libisl.sourceforge.io" +CT_ISL_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_ISL_SIGNATURE_FORMAT="" +CT_ISL_0_18_or_older=y +CT_ISL_older_than_0_18=y +CT_ISL_later_than_0_15=y +CT_ISL_0_15_or_later=y +# CT_COMP_LIBS_LIBELF is not set +CT_COMP_LIBS_LIBICONV=y +CT_COMP_LIBS_LIBICONV_PKG_KSYM="LIBICONV" +CT_LIBICONV_DIR_NAME="libiconv" +CT_LIBICONV_PKG_NAME="libiconv" +# CT_LIBICONV_SRC_RELEASE is not set +# CT_LIBICONV_SRC_DEVEL is not set +CT_LIBICONV_SRC_CUSTOM=y +CT_LIBICONV_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libiconv/libiconv-1.16" +CT_LIBICONV_PATCH_GLOBAL=y +# CT_LIBICONV_PATCH_BUNDLED is not set +# CT_LIBICONV_PATCH_LOCAL is not set +# CT_LIBICONV_PATCH_BUNDLED_LOCAL is not set +# CT_LIBICONV_PATCH_LOCAL_BUNDLED is not set +# CT_LIBICONV_PATCH_NONE is not set +CT_LIBICONV_PATCH_ORDER="global" +# CT_LIBICONV_VERY_NEW is not set +CT_LIBICONV_V_1_16=y +# CT_LIBICONV_V_1_15 is not set +CT_LIBICONV_VERSION="1.16" +CT_LIBICONV_MIRRORS="$(CT_Mirrors GNU libiconv)" +CT_LIBICONV_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_FORMATS=".tar.gz" +CT_LIBICONV_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_MPC=y +CT_COMP_LIBS_MPC_PKG_KSYM="MPC" +CT_MPC_DIR_NAME="mpc" +CT_MPC_PKG_NAME="mpc" +# CT_MPC_SRC_RELEASE is not set +# CT_MPC_SRC_DEVEL is not set +CT_MPC_SRC_CUSTOM=y +CT_MPC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libmpc/mpc-1.3.1" +CT_MPC_PATCH_GLOBAL=y +# CT_MPC_PATCH_BUNDLED is not set +# CT_MPC_PATCH_LOCAL is not set +# CT_MPC_PATCH_BUNDLED_LOCAL is not set +# CT_MPC_PATCH_LOCAL_BUNDLED is not set +# CT_MPC_PATCH_NONE is not set +CT_MPC_PATCH_ORDER="global" +CT_MPC_VERY_NEW=y +# CT_MPC_V_1_2 is not set +CT_MPC_VERSION="new" +CT_MPC_MIRRORS="https://www.multiprecision.org/downloads $(CT_Mirrors GNU mpc)" +CT_MPC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_FORMATS=".tar.gz" +CT_MPC_SIGNATURE_FORMAT="packed/.sig" +CT_MPC_later_than_1_1_0=y +CT_MPC_1_1_0_or_later=y +CT_COMP_LIBS_MPFR=y +CT_COMP_LIBS_MPFR_PKG_KSYM="MPFR" +CT_MPFR_DIR_NAME="mpfr" +CT_MPFR_PKG_NAME="mpfr" +# CT_MPFR_SRC_RELEASE is not set +# CT_MPFR_SRC_DEVEL is not set +CT_MPFR_SRC_CUSTOM=y +CT_MPFR_CUSTOM_LOCATION="${OPENSOURCE_DIR}/mpfr/mpfr-4.2.1" +CT_MPFR_PATCH_GLOBAL=y +# CT_MPFR_PATCH_BUNDLED is not set +# CT_MPFR_PATCH_LOCAL is not set +# CT_MPFR_PATCH_BUNDLED_LOCAL is not set +# CT_MPFR_PATCH_LOCAL_BUNDLED is not set +# CT_MPFR_PATCH_NONE is not set +CT_MPFR_PATCH_ORDER="global" +CT_MPFR_VERY_NEW=y +# CT_MPFR_V_4_2 is not set +CT_MPFR_VERSION="new" +CT_MPFR_MIRRORS="https://www.mpfr.org/mpfr-${CT_MPFR_VERSION} $(CT_Mirrors GNU mpfr)" +CT_MPFR_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz .zip" +CT_MPFR_SIGNATURE_FORMAT="packed/.asc" +CT_MPFR_later_than_4_0_0=y +CT_MPFR_4_0_0_or_later=y +CT_COMP_LIBS_NCURSES=y +CT_COMP_LIBS_NCURSES_PKG_KSYM="NCURSES" +CT_NCURSES_DIR_NAME="ncurses" +CT_NCURSES_PKG_NAME="ncurses" +# CT_NCURSES_SRC_RELEASE is not set +# CT_NCURSES_SRC_DEVEL is not set +CT_NCURSES_SRC_CUSTOM=y +CT_NCURSES_CUSTOM_LOCATION="${OPENSOURCE_DIR}/ncurses/ncurses-6.4" +CT_NCURSES_PATCH_GLOBAL=y +# CT_NCURSES_PATCH_BUNDLED is not set +# CT_NCURSES_PATCH_LOCAL is not set +# CT_NCURSES_PATCH_BUNDLED_LOCAL is not set +# CT_NCURSES_PATCH_LOCAL_BUNDLED is not set +# CT_NCURSES_PATCH_NONE is not set +CT_NCURSES_PATCH_ORDER="global" +# CT_NCURSES_VERY_NEW is not set +CT_NCURSES_V_6_4=y +# CT_NCURSES_V_6_2 is not set +# CT_NCURSES_V_6_1 is not set +# CT_NCURSES_V_6_0 is not set +CT_NCURSES_VERSION="6.4" +CT_NCURSES_MIRRORS="https://invisible-mirror.net/archives/ncurses $(CT_Mirrors GNU ncurses)" +CT_NCURSES_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_FORMATS=".tar.gz" +CT_NCURSES_SIGNATURE_FORMAT="packed/.sig" +CT_NCURSES_NEW_ABI=y +CT_NCURSES_HOST_CONFIG_ARGS="" +CT_NCURSES_HOST_DISABLE_DB=y +CT_NCURSES_HOST_FALLBACKS="linux,xterm,xterm-color,xterm-256color,vt100" +CT_NCURSES_TARGET_CONFIG_ARGS="" +# CT_NCURSES_TARGET_DISABLE_DB is not set +CT_NCURSES_TARGET_FALLBACKS="" +CT_COMP_LIBS_ZLIB=y +CT_COMP_LIBS_ZLIB_PKG_KSYM="ZLIB" +CT_ZLIB_DIR_NAME="zlib" +CT_ZLIB_PKG_NAME="zlib" +# CT_ZLIB_SRC_RELEASE is not set +# CT_ZLIB_SRC_DEVEL is not set +CT_ZLIB_SRC_CUSTOM=y +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.3.1" +CT_ZLIB_PATCH_GLOBAL=y +# CT_ZLIB_PATCH_BUNDLED is not set +# CT_ZLIB_PATCH_LOCAL is not set +# CT_ZLIB_PATCH_BUNDLED_LOCAL is not set +# CT_ZLIB_PATCH_LOCAL_BUNDLED is not set +# CT_ZLIB_PATCH_NONE is not set +CT_ZLIB_PATCH_ORDER="global" +CT_ZLIB_VERY_NEW=y +# CT_ZLIB_V_1_2_13 is not set +CT_ZLIB_VERSION="new" +CT_ZLIB_MIRRORS="https://github.com/madler/zlib/releases/download/v${CT_ZLIB_VERSION} https://www.zlib.net/" +CT_ZLIB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_ZLIB_SIGNATURE_FORMAT="packed/.asc" +CT_COMP_LIBS_ZSTD=y +CT_COMP_LIBS_ZSTD_PKG_KSYM="ZSTD" +CT_ZSTD_DIR_NAME="zstd" +CT_ZSTD_PKG_NAME="zstd" +# CT_ZSTD_SRC_RELEASE is not set +# CT_ZSTD_SRC_DEVEL is not set +CT_ZSTD_SRC_CUSTOM=y +CT_ZSTD_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zstd/zstd-1.5.5" +CT_ZSTD_PATCH_GLOBAL=y +# CT_ZSTD_PATCH_BUNDLED is not set +# CT_ZSTD_PATCH_LOCAL is not set +# CT_ZSTD_PATCH_BUNDLED_LOCAL is not set +# CT_ZSTD_PATCH_LOCAL_BUNDLED is not set +# CT_ZSTD_PATCH_NONE is not set +CT_ZSTD_PATCH_ORDER="global" +# CT_ZSTD_VERY_NEW is not set +CT_ZSTD_V_1_5_5=y +# CT_ZSTD_V_1_5_2 is not set +CT_ZSTD_VERSION="1.5.5" +CT_ZSTD_MIRRORS="https://github.com/facebook/zstd/releases/download/v${CT_ZSTD_VERSION} https://www.zstd.net/" +CT_ZSTD_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_FORMATS=".tar.gz" +CT_ZSTD_SIGNATURE_FORMAT="packed/.sig" +CT_ALL_COMP_LIBS_CHOICES="CLOOG EXPAT GETTEXT GMP GNUPRUMCU ISL LIBELF LIBICONV MPC MPFR NCURSES NEWLIB_NANO PICOLIBC ZLIB ZSTD" +CT_LIBICONV_NEEDED=y +CT_GETTEXT_NEEDED=y +CT_GMP_NEEDED=y +CT_MPFR_NEEDED=y +CT_ISL_NEEDED=y +CT_MPC_NEEDED=y +CT_EXPAT_NEEDED=y +CT_NCURSES_NEEDED=y +CT_ZLIB_NEEDED=y +CT_ZSTD_NEEDED=y +CT_LIBICONV=y +CT_GETTEXT=y +CT_GMP=y +CT_MPFR=y +CT_ISL=y +CT_MPC=y +CT_EXPAT=y +CT_NCURSES=y +CT_ZLIB=y +CT_ZSTD=y +# end of Companion libraries + +# +# Companion tools +# +# CT_COMP_TOOLS_FOR_HOST is not set +# CT_COMP_TOOLS_AUTOCONF is not set +# CT_COMP_TOOLS_AUTOMAKE is not set +# CT_COMP_TOOLS_BISON is not set +# CT_COMP_TOOLS_DTC is not set +# CT_COMP_TOOLS_LIBTOOL is not set +# CT_COMP_TOOLS_M4 is not set +# CT_COMP_TOOLS_MAKE is not set +CT_ALL_COMP_TOOLS_CHOICES="AUTOCONF AUTOMAKE BISON DTC LIBTOOL M4 MAKE" +# end of Companion tools + +# +# Test suite +# +# CT_TEST_SUITE_GCC is not set +# end of Test suite diff --git a/.oebuild/cross-tools/configs/config_x86_64 b/.oebuild/cross-tools/configs/config_x86_64 new file mode 100644 index 0000000000000000000000000000000000000000..8966c323af0e7d14b7afd70d1e4703ab7c34249d --- /dev/null +++ b/.oebuild/cross-tools/configs/config_x86_64 @@ -0,0 +1,1104 @@ +# +# Automatically generated file; DO NOT EDIT. +# crosstool-NG 1.26.0 Configuration +# +CT_CONFIGURE_has_static_link=y +CT_CONFIGURE_has_cxx11=y +CT_CONFIGURE_has_wget=y +CT_CONFIGURE_has_curl=y +CT_CONFIGURE_has_meson=y +CT_CONFIGURE_has_ninja=y +CT_CONFIGURE_has_rsync=y +CT_CONFIGURE_has_make_3_81_or_newer=y +CT_CONFIGURE_has_make_4_0_or_newer=y +CT_CONFIGURE_has_make_4_4_or_newer=y +CT_CONFIGURE_has_libtool_2_4_or_newer=y +CT_CONFIGURE_has_libtoolize_2_4_or_newer=y +CT_CONFIGURE_has_autoconf_2_65_or_newer=y +CT_CONFIGURE_has_autoreconf_2_65_or_newer=y +CT_CONFIGURE_has_automake_1_15_or_newer=y +CT_CONFIGURE_has_gnu_m4_1_4_12_or_newer=y +CT_CONFIGURE_has_python_3_4_or_newer=y +CT_CONFIGURE_has_bison_2_7_or_newer=y +CT_CONFIGURE_has_bison_3_0_4_or_newer=y +CT_CONFIGURE_has_python=y +CT_CONFIGURE_has_git=y +CT_CONFIGURE_has_md5sum=y +CT_CONFIGURE_has_sha1sum=y +CT_CONFIGURE_has_sha256sum=y +CT_CONFIGURE_has_sha512sum=y +CT_CONFIGURE_has_install_with_strip_program=y +CT_VERSION="1.26.0" +CT_VCHECK="" +CT_CONFIG_VERSION_ENV="4" +CT_CONFIG_VERSION_CURRENT="4" +CT_CONFIG_VERSION="4" +CT_MODULES=y + +# +# set open_source dir and x-tools dir, if you set CROSS_SOURCE, you should +# set like this: /xxx/open_source/. because the CROSS_SOURCE will be finanal +# /xxx/open_source/../open_source +# +OPENSOURCE_DIR="${CROSS_SOURCE}./open_source" +X_TOOLS_DIR="${HOME}/x-tools" + +# +# Paths and misc options +# + +# +# crosstool-NG behavior +# +# CT_OBSOLETE is not set +CT_EXPERIMENTAL=y +# CT_ALLOW_BUILD_AS_ROOT is not set +# CT_ENABLE_EXPERIMENTAL_BUNDLED_PATCHES is not set +# CT_DEBUG_CT is not set + +# +# Paths +# +CT_LOCAL_TARBALLS_DIR="${HOME}/src" +CT_SAVE_TARBALLS=y +# CT_TARBALLS_BUILDROOT_LAYOUT is not set +CT_WORK_DIR="${CT_TOP_DIR}/.build" +CT_BUILD_TOP_DIR="${CT_WORK_DIR:-${CT_TOP_DIR}/.build}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_BUILD_DIR="${CT_BUILD_TOP_DIR}/build" +CT_PREFIX_DIR="${CT_PREFIX:-${X_TOOLS_DIR}}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_RM_RF_PREFIX_DIR=y +CT_REMOVE_DOCS=y +CT_INSTALL_LICENSES=y +CT_PREFIX_DIR_RO=y +CT_STRIP_HOST_TOOLCHAIN_EXECUTABLES=y +# CT_STRIP_TARGET_TOOLCHAIN_EXECUTABLES is not set +# CT_TARBALL_RESULT is not set + +# +# Downloading +# +# CT_DOWNLOAD_AGENT_WGET is not set +CT_DOWNLOAD_AGENT_CURL=y +# CT_DOWNLOAD_AGENT_NONE is not set +# CT_FORBID_DOWNLOAD is not set +# CT_FORCE_DOWNLOAD is not set +CT_CONNECT_TIMEOUT=10 +CT_DOWNLOAD_CURL_OPTIONS="--location --ftp-pasv --retry 3 --fail --silent" +# CT_ONLY_DOWNLOAD is not set +# CT_USE_MIRROR is not set +CT_VERIFY_DOWNLOAD_DIGEST=y +CT_VERIFY_DOWNLOAD_DIGEST_SHA512=y +# CT_VERIFY_DOWNLOAD_DIGEST_SHA256 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_SHA1 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_MD5 is not set +CT_VERIFY_DOWNLOAD_DIGEST_ALG="sha512" +# CT_VERIFY_DOWNLOAD_SIGNATURE is not set + +# +# Extracting +# +# CT_FORCE_EXTRACT is not set +CT_OVERRIDE_CONFIG_GUESS_SUB=y +# CT_ONLY_EXTRACT is not set +CT_PATCH_BUNDLED=y +# CT_PATCH_LOCAL is not set +# CT_PATCH_BUNDLED_LOCAL is not set +# CT_PATCH_LOCAL_BUNDLED is not set +# CT_PATCH_NONE is not set +CT_PATCH_ORDER="bundled" + +# +# Build behavior +# +CT_PARALLEL_JOBS=0 +CT_LOAD="" +CT_USE_PIPES=y +CT_EXTRA_CFLAGS_FOR_BUILD="" +CT_EXTRA_CXXFLAGS_FOR_BUILD="" +CT_EXTRA_LDFLAGS_FOR_BUILD="" +CT_EXTRA_CFLAGS_FOR_HOST="" +CT_EXTRA_LDFLAGS_FOR_HOST="" +# CT_CONFIG_SHELL_SH is not set +# CT_CONFIG_SHELL_ASH is not set +CT_CONFIG_SHELL_BASH=y +# CT_CONFIG_SHELL_CUSTOM is not set +CT_CONFIG_SHELL="${bash}" + +# +# Logging +# +# CT_LOG_ERROR is not set +# CT_LOG_WARN is not set +# CT_LOG_INFO is not set +CT_LOG_EXTRA=y +# CT_LOG_ALL is not set +# CT_LOG_DEBUG is not set +CT_LOG_LEVEL_MAX="EXTRA" +# CT_LOG_SEE_TOOLS_WARN is not set +CT_LOG_PROGRESS_BAR=y +CT_LOG_TO_FILE=y +CT_LOG_FILE_COMPRESS=y +# end of Paths and misc options + +# +# Target options +# +# CT_ARCH_ALPHA is not set +# CT_ARCH_ARC is not set +# CT_ARCH_ARM is not set +# CT_ARCH_AVR is not set +# CT_ARCH_BPF is not set +# CT_ARCH_C6X is not set +# CT_ARCH_LOONGARCH is not set +# CT_ARCH_M68K is not set +# CT_ARCH_MICROBLAZE is not set +# CT_ARCH_MIPS is not set +# CT_ARCH_MOXIE is not set +# CT_ARCH_MSP430 is not set +# CT_ARCH_NIOS2 is not set +# CT_ARCH_POWERPC is not set +# CT_ARCH_PRU is not set +# CT_ARCH_RISCV is not set +# CT_ARCH_S390 is not set +# CT_ARCH_SH is not set +# CT_ARCH_SPARC is not set +CT_ARCH_X86=y +# CT_ARCH_XTENSA is not set +CT_ARCH="x86" +CT_ARCH_CHOICE_KSYM="X86" +CT_ARCH_CPU="" +CT_ARCH_TUNE="" +CT_ARCH_X86_SHOW=y + +# +# Options for x86 +# +CT_ARCH_X86_PKG_KSYM="" +CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR BPF C6X LOONGARCH M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA" +CT_ARCH_SUFFIX="" +# CT_OMIT_TARGET_VENDOR is not set + +# +# Generic target options +# +# CT_MULTILIB is not set +# CT_DEMULTILIB is not set +CT_ARCH_USE_MMU=y +CT_ARCH_SUPPORTS_LIBSANITIZER=y +CT_ARCH_SUPPORTS_32=y +CT_ARCH_SUPPORTS_64=y +CT_ARCH_DEFAULT_32=y +CT_ARCH_BITNESS=64 +# CT_ARCH_32 is not set +CT_ARCH_64=y +CT_ARCH_SUPPORTS_WITH_32_64=y + +# +# Target optimisations +# +CT_ARCH_SUPPORTS_WITH_ARCH=y +CT_ARCH_SUPPORTS_WITH_CPU=y +CT_ARCH_SUPPORTS_WITH_TUNE=y +CT_ARCH_ARCH="" +CT_TARGET_CFLAGS="" +CT_TARGET_LDFLAGS="" +# end of Target options + +# +# Toolchain options +# + +# +# General toolchain options +# +CT_FORCE_SYSROOT=y +CT_USE_SYSROOT=y +CT_SYSROOT_NAME="sysroot" +CT_SYSROOT_DIR_PREFIX="" +CT_WANTS_STATIC_LINK=y +CT_WANTS_STATIC_LINK_CXX=y +# CT_STATIC_TOOLCHAIN is not set +CT_SHOW_CT_VERSION=y +CT_TOOLCHAIN_PKGVERSION="" +CT_TOOLCHAIN_BUGURL="" + +# +# Tuple completion and aliasing +# +CT_TARGET_VENDOR="openeuler" +CT_TARGET_ALIAS_SED_EXPR="" +CT_TARGET_ALIAS="" + +# +# Toolchain type +# +# CT_NATIVE is not set +CT_CROSS=y +# CT_CROSS_NATIVE is not set +# CT_CANADIAN is not set +CT_TOOLCHAIN_TYPE="cross" + +# +# Build system +# +CT_BUILD="" +CT_BUILD_PREFIX="" +CT_BUILD_SUFFIX="" + +# +# Misc options +# +# CT_TOOLCHAIN_ENABLE_NLS is not set +# end of Toolchain options + +# +# Operating System +# +CT_KERNEL_SUPPORTS_SHARED_LIBS=y +# CT_KERNEL_BARE_METAL is not set +CT_KERNEL_LINUX=y +# CT_KERNEL_WINDOWS is not set +CT_KERNEL="linux" +CT_KERNEL_CHOICE_KSYM="LINUX" +CT_KERNEL_LINUX_SHOW=y + +# +# Options for linux +# +CT_KERNEL_LINUX_PKG_KSYM="LINUX" +CT_LINUX_DIR_NAME="linux" +CT_LINUX_USE_WWW_KERNEL_ORG=y +# CT_LINUX_USE_ORACLE is not set +CT_LINUX_USE="LINUX" +CT_LINUX_PKG_NAME="linux" +# CT_LINUX_SRC_RELEASE is not set +# CT_LINUX_SRC_DEVEL is not set +CT_LINUX_SRC_CUSTOM=y +CT_LINUX_CUSTOM_LOCATION="${OPENSOURCE_DIR}/kernel" +CT_LINUX_PATCH_GLOBAL=y +# CT_LINUX_PATCH_BUNDLED is not set +# CT_LINUX_PATCH_LOCAL is not set +# CT_LINUX_PATCH_BUNDLED_LOCAL is not set +# CT_LINUX_PATCH_LOCAL_BUNDLED is not set +# CT_LINUX_PATCH_NONE is not set +CT_LINUX_PATCH_ORDER="global" +# CT_LINUX_VERY_NEW is not set +# CT_LINUX_V_6_4 is not set +# CT_LINUX_V_6_3 is not set +# CT_LINUX_V_6_2 is not set +# CT_LINUX_V_6_1 is not set +# CT_LINUX_V_6_0 is not set +# CT_LINUX_V_5_19 is not set +# CT_LINUX_V_5_18 is not set +# CT_LINUX_V_5_17 is not set +# CT_LINUX_V_5_16 is not set +# CT_LINUX_V_5_15 is not set +# CT_LINUX_V_5_14 is not set +# CT_LINUX_V_5_13 is not set +# CT_LINUX_V_5_12 is not set +# CT_LINUX_V_5_11 is not set +CT_LINUX_V_5_10=y +# CT_LINUX_V_5_9 is not set +# CT_LINUX_V_5_8 is not set +# CT_LINUX_V_5_7 is not set +# CT_LINUX_V_5_4 is not set +# CT_LINUX_V_5_3 is not set +# CT_LINUX_V_5_2 is not set +# CT_LINUX_V_5_1 is not set +# CT_LINUX_V_5_0 is not set +# CT_LINUX_V_4_20 is not set +# CT_LINUX_V_4_19 is not set +# CT_LINUX_V_4_18 is not set +# CT_LINUX_V_4_17 is not set +# CT_LINUX_V_4_16 is not set +# CT_LINUX_V_4_15 is not set +# CT_LINUX_V_4_14 is not set +# CT_LINUX_V_4_13 is not set +# CT_LINUX_V_4_12 is not set +# CT_LINUX_V_4_11 is not set +# CT_LINUX_V_4_10 is not set +# CT_LINUX_V_4_9 is not set +# CT_LINUX_V_4_4 is not set +# CT_LINUX_V_4_1 is not set +# CT_LINUX_V_3_16 is not set +# CT_LINUX_V_3_13 is not set +# CT_LINUX_V_3_12 is not set +# CT_LINUX_V_3_10 is not set +# CT_LINUX_V_3_4 is not set +# CT_LINUX_V_3_2 is not set +CT_LINUX_VERSION="5.10.185" +CT_LINUX_MIRRORS="$(CT_Mirrors kernel.org linux ${CT_LINUX_VERSION})" +CT_LINUX_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_LINUX_SIGNATURE_FORMAT="unpacked/.sign" +CT_LINUX_5_19_or_older=y +CT_LINUX_older_than_5_19=y +CT_LINUX_5_12_or_older=y +CT_LINUX_older_than_5_12=y +CT_LINUX_later_than_5_5=y +CT_LINUX_5_5_or_later=y +CT_LINUX_later_than_5_3=y +CT_LINUX_5_3_or_later=y +CT_LINUX_later_than_4_8=y +CT_LINUX_4_8_or_later=y +CT_LINUX_later_than_3_7=y +CT_LINUX_3_7_or_later=y +CT_LINUX_later_than_3_2=y +CT_LINUX_3_2_or_later=y +CT_LINUX_REQUIRE_3_2_or_later=y +CT_KERNEL_DEP_RSYNC=y +CT_KERNEL_LINUX_VERBOSITY_0=y +# CT_KERNEL_LINUX_VERBOSITY_1 is not set +# CT_KERNEL_LINUX_VERBOSITY_2 is not set +CT_KERNEL_LINUX_VERBOSE_LEVEL=0 +CT_ALL_KERNEL_CHOICES="BARE_METAL LINUX WINDOWS" + +# +# Common kernel options +# +CT_SHARED_LIBS=y +# end of Operating System + +# +# Binary utilities +# +CT_ARCH_BINFMT_ELF=y +CT_BINUTILS_BINUTILS=y +CT_BINUTILS="binutils" +CT_BINUTILS_CHOICE_KSYM="BINUTILS" +CT_BINUTILS_BINUTILS_SHOW=y + +# +# Options for binutils +# +CT_BINUTILS_BINUTILS_PKG_KSYM="BINUTILS" +CT_BINUTILS_DIR_NAME="binutils" +CT_BINUTILS_USE_GNU=y +# CT_BINUTILS_USE_LINARO is not set +# CT_BINUTILS_USE_ORACLE is not set +CT_BINUTILS_USE="BINUTILS" +CT_BINUTILS_PKG_NAME="binutils" +# CT_BINUTILS_SRC_RELEASE is not set +# CT_BINUTILS_SRC_DEVEL is not set +CT_BINUTILS_SRC_CUSTOM=y +CT_BINUTILS_CUSTOM_LOCATION="${OPENSOURCE_DIR}/binutils/binutils-2.41" +CT_BINUTILS_PATCH_GLOBAL=y +# CT_BINUTILS_PATCH_BUNDLED is not set +# CT_BINUTILS_PATCH_LOCAL is not set +# CT_BINUTILS_PATCH_BUNDLED_LOCAL is not set +# CT_BINUTILS_PATCH_LOCAL_BUNDLED is not set +# CT_BINUTILS_PATCH_NONE is not set +CT_BINUTILS_PATCH_ORDER="global" +CT_BINUTILS_VERY_NEW=y +# CT_BINUTILS_V_2_40 is not set +# CT_BINUTILS_V_2_39 is not set +# CT_BINUTILS_V_2_38 is not set +# CT_BINUTILS_V_2_37 is not set +# CT_BINUTILS_V_2_36 is not set +# CT_BINUTILS_V_2_35 is not set +# CT_BINUTILS_V_2_34 is not set +# CT_BINUTILS_V_2_33 is not set +# CT_BINUTILS_V_2_32 is not set +# CT_BINUTILS_V_2_31 is not set +# CT_BINUTILS_V_2_30 is not set +# CT_BINUTILS_V_2_29 is not set +# CT_BINUTILS_V_2_28 is not set +# CT_BINUTILS_V_2_27 is not set +# CT_BINUTILS_V_2_26 is not set +CT_BINUTILS_VERSION="new" +CT_BINUTILS_MIRRORS="$(CT_Mirrors GNU binutils) $(CT_Mirrors sourceware binutils/releases)" +CT_BINUTILS_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_BINUTILS_SIGNATURE_FORMAT="packed/.sig" +CT_BINUTILS_later_than_2_39=y +CT_BINUTILS_2_39_or_later=y +CT_BINUTILS_later_than_2_30=y +CT_BINUTILS_2_30_or_later=y +CT_BINUTILS_later_than_2_27=y +CT_BINUTILS_2_27_or_later=y +CT_BINUTILS_later_than_2_26=y +CT_BINUTILS_2_26_or_later=y + +# +# GNU binutils +# +CT_BINUTILS_GOLD_SUPPORTS_ARCH=y +CT_BINUTILS_GOLD_SUPPORT=y +CT_BINUTILS_FORCE_LD_BFD_DEFAULT=y +# CT_BINUTILS_LINKER_LD is not set +CT_BINUTILS_LINKER_LD_GOLD=y +CT_BINUTILS_GOLD_INSTALLED=y +CT_BINUTILS_GOLD_THREADS=y +CT_BINUTILS_LINKER_BOTH=y +CT_BINUTILS_LINKERS_LIST="ld,gold" +CT_BINUTILS_LD_WRAPPER=y +CT_BINUTILS_LINKER_DEFAULT="bfd" +CT_BINUTILS_PLUGINS=y +CT_BINUTILS_RELRO=m +CT_BINUTILS_DETERMINISTIC_ARCHIVES=y +CT_BINUTILS_EXTRA_CONFIG_ARRAY="" +# CT_BINUTILS_FOR_TARGET is not set +CT_ALL_BINUTILS_CHOICES="BINUTILS" +# end of Binary utilities + +# +# C-library +# +CT_LIBC_GLIBC=y +# CT_LIBC_MUSL is not set +# CT_LIBC_UCLIBC_NG is not set +CT_LIBC="glibc" +CT_LIBC_CHOICE_KSYM="GLIBC" +CT_LIBC_GLIBC_SHOW=y + +# +# Options for glibc +# +CT_LIBC_GLIBC_PKG_KSYM="GLIBC" +CT_GLIBC_DIR_NAME="glibc" +CT_GLIBC_USE_GNU=y +# CT_GLIBC_USE_ORACLE is not set +CT_GLIBC_USE="GLIBC" +CT_GLIBC_PKG_NAME="glibc" +# CT_GLIBC_SRC_RELEASE is not set +# CT_GLIBC_SRC_DEVEL is not set +CT_GLIBC_SRC_CUSTOM=y +CT_GLIBC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/glibc/glibc-2.38" +CT_GLIBC_PATCH_GLOBAL=y +# CT_GLIBC_PATCH_BUNDLED is not set +# CT_GLIBC_PATCH_LOCAL is not set +# CT_GLIBC_PATCH_BUNDLED_LOCAL is not set +# CT_GLIBC_PATCH_LOCAL_BUNDLED is not set +# CT_GLIBC_PATCH_NONE is not set +CT_GLIBC_PATCH_ORDER="global" +# CT_GLIBC_VERY_NEW is not set +CT_GLIBC_V_2_38=y +# CT_GLIBC_V_2_37 is not set +# CT_GLIBC_V_2_36 is not set +# CT_GLIBC_V_2_35 is not set +# CT_GLIBC_V_2_34 is not set +# CT_GLIBC_V_2_33 is not set +# CT_GLIBC_V_2_32 is not set +# CT_GLIBC_V_2_31 is not set +# CT_GLIBC_V_2_30 is not set +# CT_GLIBC_V_2_29 is not set +# CT_GLIBC_V_2_28 is not set +# CT_GLIBC_V_2_27 is not set +# CT_GLIBC_V_2_26 is not set +# CT_GLIBC_V_2_25 is not set +# CT_GLIBC_V_2_24 is not set +# CT_GLIBC_V_2_23 is not set +# CT_GLIBC_V_2_19 is not set +# CT_GLIBC_V_2_17 is not set +CT_GLIBC_VERSION="2.38" +CT_GLIBC_MIRRORS="$(CT_Mirrors GNU glibc)" +CT_GLIBC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GLIBC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GLIBC_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_GLIBC_SIGNATURE_FORMAT="packed/.sig" +CT_GLIBC_2_38_or_later=y +CT_GLIBC_2_38_or_older=y +CT_GLIBC_later_than_2_37=y +CT_GLIBC_2_37_or_later=y +CT_GLIBC_later_than_2_36=y +CT_GLIBC_2_36_or_later=y +CT_GLIBC_later_than_2_34=y +CT_GLIBC_2_34_or_later=y +CT_GLIBC_later_than_2_32=y +CT_GLIBC_2_32_or_later=y +CT_GLIBC_later_than_2_31=y +CT_GLIBC_2_31_or_later=y +CT_GLIBC_later_than_2_30=y +CT_GLIBC_2_30_or_later=y +CT_GLIBC_later_than_2_29=y +CT_GLIBC_2_29_or_later=y +CT_GLIBC_later_than_2_28=y +CT_GLIBC_2_28_or_later=y +CT_GLIBC_later_than_2_27=y +CT_GLIBC_2_27_or_later=y +CT_GLIBC_later_than_2_26=y +CT_GLIBC_2_26_or_later=y +CT_GLIBC_later_than_2_25=y +CT_GLIBC_2_25_or_later=y +CT_GLIBC_later_than_2_24=y +CT_GLIBC_2_24_or_later=y +CT_GLIBC_later_than_2_23=y +CT_GLIBC_2_23_or_later=y +CT_GLIBC_later_than_2_20=y +CT_GLIBC_2_20_or_later=y +CT_GLIBC_later_than_2_17=y +CT_GLIBC_2_17_or_later=y +CT_GLIBC_later_than_2_14=y +CT_GLIBC_2_14_or_later=y +CT_GLIBC_DEP_KERNEL_HEADERS_VERSION=y +CT_GLIBC_DEP_BINUTILS=y +CT_GLIBC_DEP_GCC=y +CT_GLIBC_DEP_PYTHON=y +CT_THREADS="nptl" +CT_GLIBC_BUILD_SSP=y +CT_GLIBC_HAS_LIBIDN_ADDON=y +# CT_GLIBC_USE_LIBIDN_ADDON is not set +CT_GLIBC_NO_SPARC_V8=y +CT_GLIBC_HAS_OBSOLETE_LIBCRYPT=y +CT_GLIBC_EXTRA_CONFIG_ARRAY="--enable-crypt" +CT_GLIBC_CONFIGPARMS="" +CT_GLIBC_ENABLE_DEBUG=y +CT_GLIBC_EXTRA_CFLAGS="" +# CT_GLIBC_ENABLE_OBSOLETE_LIBCRYPT is not set +# CT_GLIBC_ENABLE_FORTIFIED_BUILD is not set +# CT_GLIBC_DISABLE_VERSIONING is not set +CT_GLIBC_OLDEST_ABI="" +CT_GLIBC_FORCE_UNWIND=y +# CT_GLIBC_LOCALES is not set +CT_GLIBC_KERNEL_VERSION_NONE=y +# CT_GLIBC_KERNEL_VERSION_AS_HEADERS is not set +# CT_GLIBC_KERNEL_VERSION_CHOSEN is not set +CT_GLIBC_MIN_KERNEL="" +CT_GLIBC_SSP_DEFAULT=y +# CT_GLIBC_SSP_NO is not set +# CT_GLIBC_SSP_YES is not set +# CT_GLIBC_SSP_ALL is not set +# CT_GLIBC_SSP_STRONG is not set +CT_GLIBC_ENABLE_WERROR=y +# CT_GLIBC_ENABLE_COMMON_FLAG is not set +CT_ALL_LIBC_CHOICES="AVR_LIBC GLIBC MINGW_W64 MOXIEBOX MUSL NEWLIB NONE PICOLIBC UCLIBC_NG" +CT_LIBC_SUPPORT_THREADS_ANY=y +CT_LIBC_SUPPORT_THREADS_NATIVE=y + +# +# Common C library options +# +CT_THREADS_NATIVE=y +# CT_CREATE_LDSO_CONF is not set +CT_LIBC_XLDD=y +# end of C-library + +# +# C compiler +# +CT_CC_CORE_NEEDED=y +CT_CC_SUPPORT_CXX=y +CT_CC_SUPPORT_FORTRAN=y +CT_CC_SUPPORT_ADA=y +CT_CC_SUPPORT_D=y +CT_CC_SUPPORT_JIT=y +CT_CC_SUPPORT_OBJC=y +CT_CC_SUPPORT_OBJCXX=y +CT_CC_SUPPORT_GOLANG=y +CT_CC_GCC=y +CT_CC="gcc" +CT_CC_CHOICE_KSYM="GCC" +CT_CC_GCC_SHOW=y + +# +# Options for gcc +# +CT_CC_GCC_PKG_KSYM="GCC" +CT_GCC_DIR_NAME="gcc" +CT_GCC_USE_GNU=y +# CT_GCC_USE_LINARO is not set +# CT_GCC_USE_ORACLE is not set +CT_GCC_USE="GCC" +CT_GCC_PKG_NAME="gcc" +# CT_GCC_SRC_RELEASE is not set +# CT_GCC_SRC_DEVEL is not set +CT_GCC_SRC_CUSTOM=y +CT_GCC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gcc/gcc-12.3.0" +CT_GCC_PATCH_GLOBAL=y +# CT_GCC_PATCH_BUNDLED is not set +# CT_GCC_PATCH_LOCAL is not set +# CT_GCC_PATCH_BUNDLED_LOCAL is not set +# CT_GCC_PATCH_LOCAL_BUNDLED is not set +# CT_GCC_PATCH_NONE is not set +CT_GCC_PATCH_ORDER="global" +# CT_GCC_VERY_NEW is not set +# CT_GCC_V_13 is not set +CT_GCC_V_12=y +# CT_GCC_V_11 is not set +# CT_GCC_V_10 is not set +# CT_GCC_V_9 is not set +# CT_GCC_V_8 is not set +# CT_GCC_V_7 is not set +# CT_GCC_V_6 is not set +CT_GCC_VERSION="12.3.0" +CT_GCC_MIRRORS="$(CT_Mirrors GNU gcc/gcc-${CT_GCC_VERSION}) $(CT_Mirrors sourceware gcc/releases/gcc-${CT_GCC_VERSION})" +CT_GCC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GCC_SIGNATURE_FORMAT="" +CT_GCC_13_or_older=y +CT_GCC_older_than_13=y +CT_GCC_later_than_12=y +CT_GCC_12_or_later=y +CT_GCC_later_than_11=y +CT_GCC_11_or_later=y +CT_GCC_later_than_10=y +CT_GCC_10_or_later=y +CT_GCC_later_than_9=y +CT_GCC_9_or_later=y +CT_GCC_later_than_8=y +CT_GCC_8_or_later=y +CT_GCC_later_than_7=y +CT_GCC_7_or_later=y +CT_GCC_later_than_6=y +CT_GCC_6_or_later=y +CT_GCC_REQUIRE_6_or_later=y +CT_GCC_later_than_5=y +CT_GCC_5_or_later=y +CT_GCC_REQUIRE_5_or_later=y +CT_GCC_later_than_4_9=y +CT_GCC_4_9_or_later=y +CT_GCC_REQUIRE_4_9_or_later=y +CT_CC_GCC_ENABLE_PLUGINS=y +CT_CC_GCC_GOLD=y +CT_CC_GCC_HAS_LIBMPX=y +CT_CC_GCC_ENABLE_CXX_FLAGS="" +CT_CC_GCC_CORE_EXTRA_CONFIG_ARRAY="" +CT_CC_GCC_EXTRA_CONFIG_ARRAY="--enable-gnu-indirect-function --with-stage1-ldflags='-Wl,-z,relro,-z,now' --with-boot-ldflags='-Wl,-z,relro,-z,now' --with-tune=generic --with-arch=x86-64 --disable-multilib --with-gnu-as --with-gnu-ld --enable-shared --enable-poison-system-directories --enable-symvers=gnu --disable-bootstrap --enable-default-pie --libdir=\"${CT_PREFIX_DIR}/lib64\" --with-build-time-tools=\"${CT_PREFIX_DIR}/${CT_TARGET}/bin\"" +CT_CC_GCC_STATIC_LIBSTDCXX=y +# CT_CC_GCC_SYSTEM_ZLIB is not set +CT_CC_GCC_CONFIG_TLS=m + +# +# Optimisation features +# +CT_CC_GCC_USE_GRAPHITE=y +CT_CC_GCC_USE_LTO=y +CT_CC_GCC_LTO_ZSTD=m + +# +# Settings for libraries running on target +# +# CT_CC_GCC_ENABLE_DEFAULT_PIE is not set +CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y +# CT_CC_GCC_LIBMUDFLAP is not set +CT_CC_GCC_LIBGOMP=y +# CT_CC_GCC_LIBSSP is not set +# CT_CC_GCC_LIBQUADMATH is not set +# CT_CC_GCC_LIBSANITIZER is not set +CT_CC_GCC_LIBMPX=y +CT_CC_GCC_LIBSTDCXX_VERBOSE=m + +# +# Misc. obscure options. +# +CT_CC_CXA_ATEXIT=y +CT_CC_GCC_TM_CLONE_REGISTRY=m +# CT_CC_GCC_DISABLE_PCH is not set +CT_CC_GCC_SJLJ_EXCEPTIONS=m +CT_CC_GCC_LDBL_128=m +# CT_CC_GCC_BUILD_ID is not set +# CT_CC_GCC_LNK_HASH_STYLE_DEFAULT is not set +# CT_CC_GCC_LNK_HASH_STYLE_SYSV is not set +# CT_CC_GCC_LNK_HASH_STYLE_GNU is not set +CT_CC_GCC_LNK_HASH_STYLE_BOTH=y +CT_CC_GCC_LNK_HASH_STYLE="both" +CT_CC_GCC_DEC_FLOATS_AUTO=y +# CT_CC_GCC_DEC_FLOATS_BID is not set +# CT_CC_GCC_DEC_FLOATS_DPD is not set +# CT_CC_GCC_DEC_FLOATS_NO is not set +CT_CC_GCC_DEC_FLOATS="" +CT_ALL_CC_CHOICES="GCC" + +# +# Additional supported languages: +# +CT_CC_LANG_CXX=y +CT_CC_LANG_FORTRAN=y +# CT_CC_LANG_JIT is not set +# CT_CC_LANG_ADA is not set +# CT_CC_LANG_D is not set +# CT_CC_LANG_OBJC is not set +# CT_CC_LANG_OBJCXX is not set +# CT_CC_LANG_GOLANG is not set +CT_CC_LANG_OTHERS="" +# end of C compiler + +# +# Debug facilities +# +# CT_DEBUG_DUMA is not set +CT_DEBUG_GDB=y +CT_DEBUG_GDB_PKG_KSYM="GDB" +CT_GDB_DIR_NAME="gdb" +CT_GDB_PKG_NAME="gdb" +# CT_GDB_SRC_RELEASE is not set +# CT_GDB_SRC_DEVEL is not set +CT_GDB_SRC_CUSTOM=y +CT_GDB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gdb/gdb-14.1" +CT_GDB_PATCH_GLOBAL=y +# CT_GDB_PATCH_BUNDLED is not set +# CT_GDB_PATCH_LOCAL is not set +# CT_GDB_PATCH_BUNDLED_LOCAL is not set +# CT_GDB_PATCH_LOCAL_BUNDLED is not set +# CT_GDB_PATCH_NONE is not set +CT_GDB_PATCH_ORDER="global" +CT_GDB_VERY_NEW=y +# CT_GDB_V_13 is not set +# CT_GDB_V_12 is not set +# CT_GDB_V_11 is not set +# CT_GDB_V_10 is not set +# CT_GDB_V_9 is not set +# CT_GDB_V_8_3 is not set +CT_GDB_VERSION="new" +CT_GDB_MIRRORS="$(CT_Mirrors GNU gdb) $(CT_Mirrors sourceware gdb/releases)" +CT_GDB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GDB_SIGNATURE_FORMAT="" +CT_GDB_later_than_13=y +CT_GDB_13_or_later=y +CT_GDB_later_than_12=y +CT_GDB_12_or_later=y +CT_GDB_later_than_11=y +CT_GDB_11_or_later=y +CT_GDB_later_than_10=y +CT_GDB_10_or_later=y +CT_GDB_later_than_8_3=y +CT_GDB_8_3_or_later=y +CT_GDB_CROSS=y +# CT_GDB_CROSS_STATIC is not set +# CT_GDB_CROSS_SIM is not set +CT_GDB_CROSS_PYTHON=y +CT_GDB_CROSS_PYTHON_BINARY="" +CT_GDB_CROSS_EXTRA_CONFIG_ARRAY="" +# CT_GDB_NATIVE is not set +CT_GDB_GDBSERVER=y +# CT_GDB_NATIVE_BUILD_IPA_LIB is not set +# CT_GDB_NATIVE_STATIC is not set +# CT_GDB_NATIVE_STATIC_LIBSTDCXX is not set +CT_GDB_GDBSERVER_TOPLEVEL=y +# CT_DEBUG_LTRACE is not set +# CT_DEBUG_STRACE is not set +CT_ALL_DEBUG_CHOICES="DUMA GDB LTRACE STRACE" +# end of Debug facilities + +# +# Companion libraries +# +# CT_COMPLIBS_CHECK is not set +# CT_COMP_LIBS_CLOOG is not set +CT_COMP_LIBS_EXPAT=y +CT_COMP_LIBS_EXPAT_PKG_KSYM="EXPAT" +CT_EXPAT_DIR_NAME="expat" +CT_EXPAT_PKG_NAME="expat" +# CT_EXPAT_SRC_RELEASE is not set +# CT_EXPAT_SRC_DEVEL is not set +CT_EXPAT_SRC_CUSTOM=y +CT_EXPAT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/expat/expat-2.5.0" +CT_EXPAT_PATCH_GLOBAL=y +# CT_EXPAT_PATCH_BUNDLED is not set +# CT_EXPAT_PATCH_LOCAL is not set +# CT_EXPAT_PATCH_BUNDLED_LOCAL is not set +# CT_EXPAT_PATCH_LOCAL_BUNDLED is not set +# CT_EXPAT_PATCH_NONE is not set +CT_EXPAT_PATCH_ORDER="global" +# CT_EXPAT_VERY_NEW is not set +CT_EXPAT_V_2_5=y +CT_EXPAT_VERSION="2.5.0" +CT_EXPAT_MIRRORS="http://downloads.sourceforge.net/project/expat/expat/${CT_EXPAT_VERSION} https://github.com/libexpat/libexpat/releases/download/R_${CT_EXPAT_VERSION//./_}" +CT_EXPAT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2 .tar.gz" +CT_EXPAT_SIGNATURE_FORMAT="" +CT_COMP_LIBS_GETTEXT=y +CT_COMP_LIBS_GETTEXT_PKG_KSYM="GETTEXT" +CT_GETTEXT_DIR_NAME="gettext" +CT_GETTEXT_PKG_NAME="gettext" +# CT_GETTEXT_SRC_RELEASE is not set +# CT_GETTEXT_SRC_DEVEL is not set +CT_GETTEXT_SRC_CUSTOM=y +CT_GETTEXT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gettext/gettext-0.22" +CT_GETTEXT_PATCH_GLOBAL=y +# CT_GETTEXT_PATCH_BUNDLED is not set +# CT_GETTEXT_PATCH_LOCAL is not set +# CT_GETTEXT_PATCH_BUNDLED_LOCAL is not set +# CT_GETTEXT_PATCH_LOCAL_BUNDLED is not set +# CT_GETTEXT_PATCH_NONE is not set +CT_GETTEXT_PATCH_ORDER="global" +CT_GETTEXT_VERY_NEW=y +# CT_GETTEXT_V_0_21 is not set +# CT_GETTEXT_V_0_20_1 is not set +# CT_GETTEXT_V_0_19_8_1 is not set +CT_GETTEXT_VERSION="new" +CT_GETTEXT_MIRRORS="$(CT_Mirrors GNU gettext)" +CT_GETTEXT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GETTEXT_SIGNATURE_FORMAT="packed/.sig" +CT_GETTEXT_later_than_0_21=y +CT_GETTEXT_0_21_or_later=y +CT_GETTEXT_INCOMPATIBLE_WITH_UCLIBC_NG=y + +# +# This version of gettext is not compatible with uClibc-NG. Select +# + +# +# a different version if uClibc-NG is used on the target or (in a +# + +# +# Canadian cross build) on the host. +# +CT_COMP_LIBS_GMP=y +CT_COMP_LIBS_GMP_PKG_KSYM="GMP" +CT_GMP_DIR_NAME="gmp" +CT_GMP_PKG_NAME="gmp" +# CT_GMP_SRC_RELEASE is not set +# CT_GMP_SRC_DEVEL is not set +CT_GMP_SRC_CUSTOM=y +CT_GMP_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gmp/gmp-6.3.0" +CT_GMP_PATCH_GLOBAL=y +# CT_GMP_PATCH_BUNDLED is not set +# CT_GMP_PATCH_LOCAL is not set +# CT_GMP_PATCH_BUNDLED_LOCAL is not set +# CT_GMP_PATCH_LOCAL_BUNDLED is not set +# CT_GMP_PATCH_NONE is not set +CT_GMP_PATCH_ORDER="global" +CT_GMP_VERY_NEW=y +# CT_GMP_V_6_2 is not set +# CT_GMP_V_6_1 is not set +CT_GMP_VERSION="new" +CT_GMP_MIRRORS="https://gmplib.org/download/gmp https://gmplib.org/download/gmp/archive $(CT_Mirrors GNU gmp)" +CT_GMP_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2" +CT_GMP_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_ISL=y +CT_COMP_LIBS_ISL_PKG_KSYM="ISL" +CT_ISL_DIR_NAME="isl" +CT_ISL_PKG_NAME="isl" +# CT_ISL_SRC_RELEASE is not set +# CT_ISL_SRC_DEVEL is not set +CT_ISL_SRC_CUSTOM=y +CT_ISL_CUSTOM_LOCATION="${OPENSOURCE_DIR}/isl/isl-0.24" +CT_ISL_PATCH_GLOBAL=y +# CT_ISL_PATCH_BUNDLED is not set +# CT_ISL_PATCH_LOCAL is not set +# CT_ISL_PATCH_BUNDLED_LOCAL is not set +# CT_ISL_PATCH_LOCAL_BUNDLED is not set +# CT_ISL_PATCH_NONE is not set +CT_ISL_PATCH_ORDER="global" +# CT_ISL_VERY_NEW is not set +# CT_ISL_V_0_26 is not set +# CT_ISL_V_0_25 is not set +CT_ISL_V_0_24=y +# CT_ISL_V_0_23 is not set +# CT_ISL_V_0_22 is not set +# CT_ISL_V_0_21 is not set +# CT_ISL_V_0_20 is not set +# CT_ISL_V_0_19 is not set +# CT_ISL_V_0_18 is not set +# CT_ISL_V_0_17 is not set +# CT_ISL_V_0_16 is not set +# CT_ISL_V_0_15 is not set +CT_ISL_VERSION="0.24" +CT_ISL_MIRRORS="https://libisl.sourceforge.io" +CT_ISL_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_ISL_SIGNATURE_FORMAT="" +CT_ISL_later_than_0_18=y +CT_ISL_0_18_or_later=y +CT_ISL_later_than_0_15=y +CT_ISL_0_15_or_later=y +# CT_COMP_LIBS_LIBELF is not set +CT_COMP_LIBS_LIBICONV=y +CT_COMP_LIBS_LIBICONV_PKG_KSYM="LIBICONV" +CT_LIBICONV_DIR_NAME="libiconv" +CT_LIBICONV_PKG_NAME="libiconv" +# CT_LIBICONV_SRC_RELEASE is not set +# CT_LIBICONV_SRC_DEVEL is not set +CT_LIBICONV_SRC_CUSTOM=y +CT_LIBICONV_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libiconv/libiconv-1.16" +CT_LIBICONV_PATCH_GLOBAL=y +# CT_LIBICONV_PATCH_BUNDLED is not set +# CT_LIBICONV_PATCH_LOCAL is not set +# CT_LIBICONV_PATCH_BUNDLED_LOCAL is not set +# CT_LIBICONV_PATCH_LOCAL_BUNDLED is not set +# CT_LIBICONV_PATCH_NONE is not set +CT_LIBICONV_PATCH_ORDER="global" +# CT_LIBICONV_VERY_NEW is not set +CT_LIBICONV_V_1_16=y +# CT_LIBICONV_V_1_15 is not set +CT_LIBICONV_VERSION="1.16" +CT_LIBICONV_MIRRORS="$(CT_Mirrors GNU libiconv)" +CT_LIBICONV_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_FORMATS=".tar.gz" +CT_LIBICONV_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_MPC=y +CT_COMP_LIBS_MPC_PKG_KSYM="MPC" +CT_MPC_DIR_NAME="mpc" +CT_MPC_PKG_NAME="mpc" +# CT_MPC_SRC_RELEASE is not set +# CT_MPC_SRC_DEVEL is not set +CT_MPC_SRC_CUSTOM=y +CT_MPC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libmpc/mpc-1.3.1" +CT_MPC_PATCH_GLOBAL=y +# CT_MPC_PATCH_BUNDLED is not set +# CT_MPC_PATCH_LOCAL is not set +# CT_MPC_PATCH_BUNDLED_LOCAL is not set +# CT_MPC_PATCH_LOCAL_BUNDLED is not set +# CT_MPC_PATCH_NONE is not set +CT_MPC_PATCH_ORDER="global" +CT_MPC_VERY_NEW=y +# CT_MPC_V_1_2 is not set +CT_MPC_VERSION="new" +CT_MPC_MIRRORS="https://www.multiprecision.org/downloads $(CT_Mirrors GNU mpc)" +CT_MPC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_FORMATS=".tar.gz" +CT_MPC_SIGNATURE_FORMAT="packed/.sig" +CT_MPC_later_than_1_1_0=y +CT_MPC_1_1_0_or_later=y +CT_COMP_LIBS_MPFR=y +CT_COMP_LIBS_MPFR_PKG_KSYM="MPFR" +CT_MPFR_DIR_NAME="mpfr" +CT_MPFR_PKG_NAME="mpfr" +# CT_MPFR_SRC_RELEASE is not set +# CT_MPFR_SRC_DEVEL is not set +CT_MPFR_SRC_CUSTOM=y +CT_MPFR_CUSTOM_LOCATION="${OPENSOURCE_DIR}/mpfr/mpfr-4.2.1" +CT_MPFR_PATCH_GLOBAL=y +# CT_MPFR_PATCH_BUNDLED is not set +# CT_MPFR_PATCH_LOCAL is not set +# CT_MPFR_PATCH_BUNDLED_LOCAL is not set +# CT_MPFR_PATCH_LOCAL_BUNDLED is not set +# CT_MPFR_PATCH_NONE is not set +CT_MPFR_PATCH_ORDER="global" +# CT_MPFR_VERY_NEW is not set +CT_MPFR_V_4_2=y +CT_MPFR_VERSION="4.2.1" +CT_MPFR_MIRRORS="https://www.mpfr.org/mpfr-${CT_MPFR_VERSION} $(CT_Mirrors GNU mpfr)" +CT_MPFR_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz .zip" +CT_MPFR_SIGNATURE_FORMAT="packed/.asc" +CT_MPFR_later_than_4_0_0=y +CT_MPFR_4_0_0_or_later=y +CT_COMP_LIBS_NCURSES=y +CT_COMP_LIBS_NCURSES_PKG_KSYM="NCURSES" +CT_NCURSES_DIR_NAME="ncurses" +CT_NCURSES_PKG_NAME="ncurses" +# CT_NCURSES_SRC_RELEASE is not set +# CT_NCURSES_SRC_DEVEL is not set +CT_NCURSES_SRC_CUSTOM=y +CT_NCURSES_CUSTOM_LOCATION="${OPENSOURCE_DIR}/ncurses/ncurses-6.4" +CT_NCURSES_PATCH_GLOBAL=y +# CT_NCURSES_PATCH_BUNDLED is not set +# CT_NCURSES_PATCH_LOCAL is not set +# CT_NCURSES_PATCH_BUNDLED_LOCAL is not set +# CT_NCURSES_PATCH_LOCAL_BUNDLED is not set +# CT_NCURSES_PATCH_NONE is not set +CT_NCURSES_PATCH_ORDER="global" +# CT_NCURSES_VERY_NEW is not set +CT_NCURSES_V_6_4=y +# CT_NCURSES_V_6_2 is not set +# CT_NCURSES_V_6_1 is not set +# CT_NCURSES_V_6_0 is not set +CT_NCURSES_VERSION="6.4" +CT_NCURSES_MIRRORS="https://invisible-mirror.net/archives/ncurses $(CT_Mirrors GNU ncurses)" +CT_NCURSES_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_FORMATS=".tar.gz" +CT_NCURSES_SIGNATURE_FORMAT="packed/.sig" +CT_NCURSES_NEW_ABI=y +CT_NCURSES_HOST_CONFIG_ARGS="" +CT_NCURSES_HOST_DISABLE_DB=y +CT_NCURSES_HOST_FALLBACKS="linux,xterm,xterm-color,xterm-256color,vt100" +CT_NCURSES_TARGET_CONFIG_ARGS="" +# CT_NCURSES_TARGET_DISABLE_DB is not set +CT_NCURSES_TARGET_FALLBACKS="" +CT_COMP_LIBS_ZLIB=y +CT_COMP_LIBS_ZLIB_PKG_KSYM="ZLIB" +CT_ZLIB_DIR_NAME="zlib" +CT_ZLIB_PKG_NAME="zlib" +# CT_ZLIB_SRC_RELEASE is not set +# CT_ZLIB_SRC_DEVEL is not set +CT_ZLIB_SRC_CUSTOM=y +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.3.1" +CT_ZLIB_PATCH_GLOBAL=y +# CT_ZLIB_PATCH_BUNDLED is not set +# CT_ZLIB_PATCH_LOCAL is not set +# CT_ZLIB_PATCH_BUNDLED_LOCAL is not set +# CT_ZLIB_PATCH_LOCAL_BUNDLED is not set +# CT_ZLIB_PATCH_NONE is not set +CT_ZLIB_PATCH_ORDER="global" +CT_ZLIB_VERY_NEW=y +# CT_ZLIB_V_1_2_13 is not set +CT_ZLIB_VERSION="new" +CT_ZLIB_MIRRORS="https://github.com/madler/zlib/releases/download/v${CT_ZLIB_VERSION} https://www.zlib.net/" +CT_ZLIB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_ZLIB_SIGNATURE_FORMAT="packed/.asc" +CT_COMP_LIBS_ZSTD=y +CT_COMP_LIBS_ZSTD_PKG_KSYM="ZSTD" +CT_ZSTD_DIR_NAME="zstd" +CT_ZSTD_PKG_NAME="zstd" +# CT_ZSTD_SRC_RELEASE is not set +# CT_ZSTD_SRC_DEVEL is not set +CT_ZSTD_SRC_CUSTOM=y +CT_ZSTD_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zstd/zstd-1.5.5" +CT_ZSTD_PATCH_GLOBAL=y +# CT_ZSTD_PATCH_BUNDLED is not set +# CT_ZSTD_PATCH_LOCAL is not set +# CT_ZSTD_PATCH_BUNDLED_LOCAL is not set +# CT_ZSTD_PATCH_LOCAL_BUNDLED is not set +# CT_ZSTD_PATCH_NONE is not set +CT_ZSTD_PATCH_ORDER="global" +# CT_ZSTD_VERY_NEW is not set +CT_ZSTD_V_1_5_5=y +# CT_ZSTD_V_1_5_2 is not set +CT_ZSTD_VERSION="1.5.5" +CT_ZSTD_MIRRORS="https://github.com/facebook/zstd/releases/download/v${CT_ZSTD_VERSION} https://www.zstd.net/" +CT_ZSTD_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_FORMATS=".tar.gz" +CT_ZSTD_SIGNATURE_FORMAT="packed/.sig" +CT_ALL_COMP_LIBS_CHOICES="CLOOG EXPAT GETTEXT GMP GNUPRUMCU ISL LIBELF LIBICONV MPC MPFR NCURSES NEWLIB_NANO PICOLIBC ZLIB ZSTD" +CT_LIBICONV_NEEDED=y +CT_GETTEXT_NEEDED=y +CT_GMP_NEEDED=y +CT_MPFR_NEEDED=y +CT_ISL_NEEDED=y +CT_MPC_NEEDED=y +CT_EXPAT_NEEDED=y +CT_NCURSES_NEEDED=y +CT_ZLIB_NEEDED=y +CT_ZSTD_NEEDED=y +CT_LIBICONV=y +CT_GETTEXT=y +CT_GMP=y +CT_MPFR=y +CT_ISL=y +CT_MPC=y +CT_EXPAT=y +CT_NCURSES=y +CT_ZLIB=y +CT_ZSTD=y +# end of Companion libraries + +# +# Companion tools +# +# CT_COMP_TOOLS_FOR_HOST is not set +# CT_COMP_TOOLS_AUTOCONF is not set +# CT_COMP_TOOLS_AUTOMAKE is not set +# CT_COMP_TOOLS_BISON is not set +# CT_COMP_TOOLS_DTC is not set +# CT_COMP_TOOLS_LIBTOOL is not set +# CT_COMP_TOOLS_M4 is not set +# CT_COMP_TOOLS_MAKE is not set +CT_ALL_COMP_TOOLS_CHOICES="AUTOCONF AUTOMAKE BISON DTC LIBTOOL M4 MAKE" +# end of Companion tools + +# +# Test suite +# +# CT_TEST_SUITE_GCC is not set +# end of Test suite diff --git a/.oebuild/cross-tools/patches/glibc-revert-reserve-relocation-information-for-sysboost.patch b/.oebuild/cross-tools/patches/glibc-revert-reserve-relocation-information-for-sysboost.patch new file mode 100644 index 0000000000000000000000000000000000000000..9fd6444921557e1ffb497518f02147389dd8cc74 --- /dev/null +++ b/.oebuild/cross-tools/patches/glibc-revert-reserve-relocation-information-for-sysboost.patch @@ -0,0 +1,14 @@ +--- a/Makerules ++++ b/Makerules +@@ -534,7 +534,7 @@ lib%.so: lib%_pic.a $(+preinit) $(+postinit) $(link-libc-deps) + $(call after-link,$@) + + define build-shlib-helper +-$(LINK.o) -shared -static-libgcc -Wl,-O1 $(sysdep-LDFLAGS) -Wl,--emit-relocs \ ++$(LINK.o) -shared -static-libgcc -Wl,-O1 $(sysdep-LDFLAGS) \ + $(if $($(@F)-no-z-defs)$(no-z-defs),,-Wl,-z,defs) $(rtld-LDFLAGS) \ + $(if $($(@F)-no-dt-relr),$(no-dt-relr-ldflag),$(dt-relr-ldflag)) \ + $(extra-B-$(@F:lib%.so=%).so) -B$(csu-objpfx) \ +-- +2.33.0 + diff --git a/.oebuild/cross-tools/prepare.sh b/.oebuild/cross-tools/prepare.sh new file mode 100644 index 0000000000000000000000000000000000000000..b949ed63ec7de80b7e1e0630cc940279d5edeebc --- /dev/null +++ b/.oebuild/cross-tools/prepare.sh @@ -0,0 +1,110 @@ +#!/bin/bash + +function delete_dir() { + while [ $# != 0 ] ; do + [ -n "$1" ] && rm -rf ./$1 ; shift; done +} + +function do_patch() { + pushd $1 + if [ $1 = "isl" ];then + tar xf *.tar.* + elif [ $1 = "zlib" ];then + tar xf *.tar.* + else + PKG=$(echo *.tar.*) + echo "$1: do_unpack for of $PKG..." + tar xf *.tar.* + echo "make patchlist of $1..." + cat *.spec | grep "Patch" | grep -v "#" |grep "\.patch" | awk -F ":" '{print $2}' > $1-patchlist + ls ${OE_PATCH_DIR}/ | grep "^$1" > $1-patchlist-oe || true + pushd ${PKG%%.tar.*} + for i in `cat ../$1-patchlist` + do + echo "----------------apply patch $i:" + patch -p1 < ../$i + done + for i in `cat ../$1-patchlist-oe` + do + echo "----------------apply patch ${OE_PATCH_DIR}/$i:" + patch -p1 < ${OE_PATCH_DIR}/$i + done + popd + fi + popd + echo "------------do_patch for $1 done!" +} + +function download_and_patch() { + while [ $# != 0 ] ; do + [ -n "$1" ] && echo "Download $1" && git clone -b $COMMON_BRANCH https://gitee.com/src-openeuler/$1.git --depth 1 && do_patch $1; shift; + done +} + +function do_prepare() { + [ ! -d "$LIB_PATH" ] && mkdir $LIB_PATH + pushd $LIB_PATH + delete_dir $KERNEL $GCC $GLIBC $MUSLC $BINUTILS $GMP $MPC $MPFR $ISL $EXPAT $GETTEXT $NCURSES $ZLIB $LIBICONV $GDB $ZSTD + git clone -b $KERNEL_BRANCH https://gitee.com/openeuler/kernel.git --depth 1 + git clone -b $MUSLC_BRANCH https://gitee.com/src-openeuler/musl.git --depth 1 && do_patch musl; + download_and_patch $GCC $GLIBC $BINUTILS $GMP $MPC $MPFR $ISL $EXPAT $NCURSES $ZLIB $GDB $ZSTD + #LIBICONV and GETTEXT dir is need, but with no code, it will skip when ct-ng build under our openeuler env. + mkdir -p $LIB_PATH/$LIBICONV/$LIBICONV_DIR + mkdir -p $LIB_PATH/$GETTEXT/$GETTEXT_DIR + popd +} + +usage() +{ + echo -e "Tip: sh cross-tools/prepare.sh \n" +} + +check_use() +{ + if [ -n "$BASH_SOURCE" ]; then + THIS_SCRIPT="$BASH_SOURCE" + elif [ -n "$ZSH_NAME" ]; then + THIS_SCRIPT="$0" + else + THIS_SCRIPT="$(pwd)/prepare.sh" + if [ ! -e "$THIS_SCRIPT" ]; then + echo "Error: $THIS_SCRIPT doesn't exist!" + return 1 + fi + fi + + if [ "$0" != "$THIS_SCRIPT" ]; then + echo "Error: This script cannot be sourced. Please run as 'sh $THIS_SCRIPT'" >&2 + return 1 + fi +} + +main() +{ + usage + check_use || return 1 + set -e + WORK_DIR="$1" + SRC_DIR="$(pwd)" + SRC_DIR="$(realpath ${SRC_DIR})" + if [[ -z "${WORK_DIR}" ]];then + WORK_DIR=$SRC_DIR + echo "use default work dir: $WORK_DIR" + fi + WORK_DIR="$(realpath ${WORK_DIR})" + source $SRC_DIR/configs/config.xml + OE_PATCH_DIR="$SRC_DIR/patches" + readonly LIB_PATH="$WORK_DIR/open_source" + + do_prepare + + cd $WORK_DIR + echo "Prepare done! Now you can run: (not in root please)" + echo "'cp config_arm32 .config && ct-ng build' for build arm" + echo "'cp config_aarch64 .config && ct-ng build' for build arm64" + echo "'cp config_x86_64 .config && ct-ng build' for build x86_64" + echo "'cp config_riscv64 .config && ct-ng build' for build riscv64" + echo "'cp config_aarch64-musl .config && ct-ng build' for build muslc_aarch64" +} + +main "$@" diff --git a/.oebuild/cross-tools/release.yaml b/.oebuild/cross-tools/release.yaml new file mode 100644 index 0000000000000000000000000000000000000000..3b6b3b6acfdf98b94ab4291413a34c8d49c25c29 --- /dev/null +++ b/.oebuild/cross-tools/release.yaml @@ -0,0 +1,9 @@ +tag_name: toolchains-v0.1.5 +name: openEuler Embedded Toolchains V0.1.5 +body: 1.此发行版为对应toolchains V0.1.5版本。 + 2.请下载所有的gz结尾的压缩包及merge_data.sh文件,对应名称的压缩包即为对应构建工具链。 + 3.请给merge_data.sh文件可执行权限,并执行即可得到对应的工具链文件夹。 + 4.更新内容:x86-64交叉编译链打开libgomp开关 +target_commitish: master +owner: openeuler +repo: yocto-meta-openeuler \ No newline at end of file diff --git a/.oebuild/cross-tools/update.sh b/.oebuild/cross-tools/update.sh new file mode 100644 index 0000000000000000000000000000000000000000..72f565b5c084bf4ce479903c7560a1facd188550 --- /dev/null +++ b/.oebuild/cross-tools/update.sh @@ -0,0 +1,55 @@ +#!/bin/bash + +function update_feature() { + # Change GLIBC_DYNAMIC_LINKER to use lib64/xxx.ld for arm64 and lib64/lp64d/xxx.ld for riscv64 + sed -i "s#^\#define GLIBC_DYNAMIC_LINKER.*#\#undef STANDARD_STARTFILE_PREFIX_2\n\#define STANDARD_STARTFILE_PREFIX_2 \"/usr/lib64/\"\n\#define GLIBC_DYNAMIC_LINKER \"/lib%{mabi=lp64:64}%{mabi=ilp32:ilp32}/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1\"#g" $LIB_PATH/$GCC/$GCC_DIR/gcc/config/aarch64/aarch64-linux.h + sed -i "s#^\#define GLIBC_DYNAMIC_LINKER.*#\#define GLIBC_DYNAMIC_LINKER \"/lib64/lp64d/ld-linux-riscv\" XLEN_SPEC \"-\" ABI_SPEC \".so.1\"#g" $LIB_PATH/$GCC/$GCC_DIR/gcc/config/riscv/linux.h + sed -i "s#^\#define MUSL_DYNAMIC_LINKER.*#\#define MUSL_DYNAMIC_LINKER \"/lib%{mabi=lp64:64}%{mabi=ilp32:ilp32}/ld-musl-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1\"#g" $LIB_PATH/$GCC/$GCC_DIR/gcc/config/aarch64/aarch64-linux.h + sed -i "s#^\#define MUSL_DYNAMIC_LINKER.*#\#define MUSL_DYNAMIC_LINKER \"/lib64/lp64d/ld-musl-riscv\" XLEN_SPEC MUSL_ABI_SUFFIX \".so.1\"#g" $LIB_PATH/$GCC/$GCC_DIR/gcc/config/riscv/linux.h + + # Change libstdc++.so option + sed -i "s#^\\t-o \\$\@.*#\\t-Wl,-z,relro,-z,now,-z,noexecstack -Wtrampolines -o \$\@#g" $LIB_PATH/$GCC/$GCC_DIR/libstdc++-v3/src/Makefile.in +} + +function update_config() { + cp $SRC_DIR/configs/config_* $WORK_DIR/ + sed -i "s#^CT_LINUX_CUSTOM_LOCATION.*#CT_LINUX_CUSTOM_LOCATION=\"$LIB_PATH/kernel\"#g" $WORK_DIR/config_* + sed -i "s#^CT_BINUTILS_CUSTOM_LOCATION.*#CT_BINUTILS_CUSTOM_LOCATION=\"$LIB_PATH/$BINUTILS/$BINUTILS_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_GLIBC_CUSTOM_LOCATION.*#CT_GLIBC_CUSTOM_LOCATION=\"$LIB_PATH/$GLIBC/$GLIBC_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_MUSL_CUSTOM_LOCATION.*#CT_MUSL_CUSTOM_LOCATION=\"$LIB_PATH/$MUSLC/$MUSLC_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_GCC_CUSTOM_LOCATION.*#CT_GCC_CUSTOM_LOCATION=\"$LIB_PATH/$GCC/$GCC_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_GDB_CUSTOM_LOCATION.*#CT_GDB_CUSTOM_LOCATION=\"$LIB_PATH/$GDB/$GDB_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_GMP_CUSTOM_LOCATION.*#CT_GMP_CUSTOM_LOCATION=\"$LIB_PATH/$GMP/$GMP_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_ISL_CUSTOM_LOCATION.*#CT_ISL_CUSTOM_LOCATION=\"$LIB_PATH/$ISL/$ISL_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_MPC_CUSTOM_LOCATION.*#CT_MPC_CUSTOM_LOCATION=\"$LIB_PATH/$MPC/$MPC_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_MPFR_CUSTOM_LOCATION.*#CT_MPFR_CUSTOM_LOCATION=\"$LIB_PATH/$MPFR/$MPFR_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_EXPAT_CUSTOM_LOCATION.*#CT_EXPAT_CUSTOM_LOCATION=\"$LIB_PATH/$EXPAT/$EXPAT_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_LIBICONV_CUSTOM_LOCATION.*#CT_LIBICONV_CUSTOM_LOCATION=\"$LIB_PATH/$LIBICONV/$LIBICONV_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_GETTEXT_CUSTOM_LOCATION.*#CT_GETTEXT_CUSTOM_LOCATION=\"$LIB_PATH/$GETTEXT/$GETTEXT_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_NCURSES_CUSTOM_LOCATION.*#CT_NCURSES_CUSTOM_LOCATION=\"$LIB_PATH/$NCURSES/$NCURSES_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_ZLIB_CUSTOM_LOCATION.*#CT_ZLIB_CUSTOM_LOCATION=\"$LIB_PATH/$ZLIB/$ZLIB_DIR\"#g" $WORK_DIR/config_* + sed -i "s#^CT_ZSTD_CUSTOM_LOCATION.*#CT_ZSTD_CUSTOM_LOCATION=\"$LIB_PATH/$ZSTD/$ZSTD_DIR\"#g" $WORK_DIR/config_* +} + +main() +{ + set -e + SRC_DIR="$(pwd)" + SRC_DIR="$(realpath ${SRC_DIR})" + source "${SRC_DIR}/configs/config.xml" + readonly LIB_PATH="$SRC_DIR/open_source" + WORK_DIR=$SRC_DIR + + update_feature + update_config + + cd $SRC_DIR + echo "Prepare done! Now you can run: (not in root please)" + echo "'cp config_arm32 .config && ct-ng build' for build arm" + echo "'cp config_aarch64 .config && ct-ng build' for build arm64" + echo "'cp config_x86_64 .config && ct-ng build' for build x86_64" + echo "'cp config_riscv64 .config && ct-ng build' for build riscv64" + echo "'cp config_aarch64-musl .config && ct-ng build' for build muslc_aarch64" +} + +main "$@" diff --git a/.oebuild/dockerfile/README.md b/.oebuild/dockerfile/README.md new file mode 100644 index 0000000000000000000000000000000000000000..4b4d65606e69cc42dbdb9ea9563f13885dedda1d --- /dev/null +++ b/.oebuild/dockerfile/README.md @@ -0,0 +1,10 @@ +# DockerFile介绍 + +openEuler Embedded涉及到的容器镜像有两种,一种是构建嵌入式镜像的容器,其相关的Dockerfile存放在openeuler-image目录,另一种是构建交叉编译链的容器,其相关的Dockerfile存放在openeuler-sdk目录,在没个目录下都会有两个Dockerfile,其中一个是Dockerfile,其用来构建对应的容器镜像,另一个是Dockerfile_CI,其用来构建所对应的基础设施运行的容器镜像。 + +容器镜像编译命令如下(这里以构建嵌入式容器镜像为例): + +``` +cd openeuler-image +docker build -t openeuler-container:latest . +``` diff --git a/.oebuild/dockerfile/openeuler-container/Dockerfile b/.oebuild/dockerfile/openeuler-container/Dockerfile new file mode 100644 index 0000000000000000000000000000000000000000..666bdb418b6bef79d8454f1d290f674716019f9d --- /dev/null +++ b/.oebuild/dockerfile/openeuler-container/Dockerfile @@ -0,0 +1,115 @@ +FROM openeuler/openeuler:23.09 + +# RUN sed -i "s#http://repo.openeuler.org#https://repo.huaweicloud.com/openeuler#g" /etc/yum.repos.d/openEuler.repo + +RUN set -eux; \ +yum -y install git java tar cmake gperf sqlite-devel libffi-devel xz-devel \ +zlib zlib-devel openssl-devel bzip2-devel ncurses-devel readline-devel \ +libpcap-devel parted autoconf-archive chrpath gcc-c++ patch rpm-build flex \ +autoconf automake m4 bison bc libtool gettext-devel createrepo_c net-tools \ +wget sudo hostname rpcgen texinfo python meson dosfstools mtools libmpc-devel \ +gmp-devel ninja-build numactl-devel make python3 python3-pip screen glibc-locale-archive \ +iproute xz unzip help2man libstdc++-static gcc g++ rsync python3-devel gdisk umoci skopeo \ +libxslt vim hwdata perl-XML-Parser iptables golang quilt + +ARG user=openeuler +ARG group=openeuler +ARG uid=1000 +ARG gid=1000 + +# add build user +RUN groupadd -g ${gid} ${group} && useradd -c "${user}" -d /home/${user} -u ${uid} -g ${gid} -m ${user} +RUN echo "${user} ALL=(ALL) NOPASSWD:ALL" >> /etc/sudoers + +# modify /usr1 owner +RUN mkdir -p /usr1 && chown -R ${user}:${group} /usr1 /opt && chmod -R 755 /usr1 /opt + +# install nativesdk toolchains and environment of build toolchains +# notice: nativesdk and toolchains is for building OS + +# modify default configs +RUN sed -i 's/TMOUT=300/TMOUT=/g' /etc/bashrc + +# add umask conf to 022 in file /etc/bashrc +RUN echo "umask 022" >> /etc/bashrc + +USER openeuler + +ARG openeuler_repo=https://gitee.com/openeuler/yocto-meta-openeuler +ARG openeuler_base_version=24.03-LTS + +# download nativesdk release and install it +ARG nativesdk_version=v0.1.2 +ARG nativesdk_name=x86_64-buildtools-extended-nativesdk-standalone +RUN mkdir -p /opt/buildtools/nativesdk/sdk_info +WORKDIR /opt/buildtools/nativesdk/sdk_info +RUN wget ${openeuler_repo}/releases/download/nativesdk-${nativesdk_version}/${nativesdk_name}-${openeuler_base_version}.testdata.json \ + && wget ${openeuler_repo}/releases/download/nativesdk-${nativesdk_version}/1_${nativesdk_name}-${openeuler_base_version}.sh \ + && wget ${openeuler_repo}/releases/download/nativesdk-${nativesdk_version}/2_${nativesdk_name}-${openeuler_base_version}.sh \ + && wget ${openeuler_repo}/releases/download/nativesdk-${nativesdk_version}/3_${nativesdk_name}-${openeuler_base_version}.sh \ + && wget ${openeuler_repo}/releases/download/nativesdk-${nativesdk_version}/${nativesdk_name}-${openeuler_base_version}.target.manifest \ + && wget ${openeuler_repo}/releases/download/nativesdk-${nativesdk_version}/${nativesdk_name}-${openeuler_base_version}.host.manifest \ + && wget ${openeuler_repo}/releases/download/nativesdk-${nativesdk_version}/merge_data.sh \ + && bash ./merge_data.sh +RUN ./${nativesdk_name}-${openeuler_base_version}.sh -d /opt/buildtools/nativesdk -y +RUN . /opt/buildtools/nativesdk/environment-setup-x86_64-openeulersdk-linux + +# download toolchain release and install it +ARG toolchain_version=toolchains-v0.1.5 +RUN mkdir -p /usr1/openeuler/gcc +WORKDIR /usr1/openeuler/gcc +RUN wget ${openeuler_repo}/releases/download/${toolchain_version}/1_openeuler_gcc_arm64le.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/2_openeuler_gcc_arm64le.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/3_openeuler_gcc_arm64le.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/4_openeuler_gcc_arm64le.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/1_openeuler_gcc_x86_64.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/2_openeuler_gcc_x86_64.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/3_openeuler_gcc_x86_64.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/4_openeuler_gcc_x86_64.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/1_openeuler_gcc_arm32le.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/2_openeuler_gcc_arm32le.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/3_openeuler_gcc_arm32le.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/1_openeuler_gcc_riscv64.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/2_openeuler_gcc_riscv64.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/3_openeuler_gcc_riscv64.tar.gz \ + && wget ${openeuler_repo}/releases/download/${toolchain_version}/merge_data.sh \ + && bash ./merge_data.sh +# deal aarch64 toolchain +RUN tar xzvf openeuler_gcc_arm64le.tar.gz && \ + rm -rf openeuler_gcc_arm64le.tar.gz +# deal x86_64 toolchain +RUN tar xzvf openeuler_gcc_x86_64.tar.gz && \ + rm -rf openeuler_gcc_x86_64.tar.gz +# deal arm toolchain +RUN tar xzvf openeuler_gcc_arm32le.tar.gz && \ + rm -rf openeuler_gcc_arm32le.tar.gz +# deal riscv64 toolchain +RUN tar xzvf openeuler_gcc_riscv64.tar.gz && \ + rm -rf openeuler_gcc_riscv64.tar.gz +RUN rm -rf merge_data.sh + +WORKDIR /usr1/openeuler +# download llvm toolchain and install it +ARG llvm_toolchain_version=llvm-toolchain-v0.1.1 +RUN wget ${openeuler_repo}/releases/download/${llvm_toolchain_version}/1_clang-llvm-17.0.6.tar.gz \ + && wget ${openeuler_repo}/releases/download/${llvm_toolchain_version}/2_clang-llvm-17.0.6.tar.gz \ + && wget ${openeuler_repo}/releases/download/${llvm_toolchain_version}/3_clang-llvm-17.0.6.tar.gz \ + && wget ${openeuler_repo}/releases/download/${llvm_toolchain_version}/4_clang-llvm-17.0.6.tar.gz \ + && wget ${openeuler_repo}/releases/download/${llvm_toolchain_version}/5_clang-llvm-17.0.6.tar.gz \ + && wget ${openeuler_repo}/releases/download/${llvm_toolchain_version}/6_clang-llvm-17.0.6.tar.gz \ + && wget ${openeuler_repo}/releases/download/${llvm_toolchain_version}/7_clang-llvm-17.0.6.tar.gz \ + && wget ${openeuler_repo}/releases/download/${llvm_toolchain_version}/8_clang-llvm-17.0.6.tar.gz \ + && wget ${openeuler_repo}/releases/download/${llvm_toolchain_version}/9_clang-llvm-17.0.6.tar.gz \ + && wget ${openeuler_repo}/releases/download/${llvm_toolchain_version}/merge_data.sh \ + && bash ./merge_data.sh + +RUN tar zxf clang-llvm-17.0.6.tar.gz +RUN sudo mv clang-llvm-17.0.6 llvm && sudo rm -rf clang-llvm-17.0.6.tar.gz merge_data.sh + +RUN sudo chmod -R 777 /opt/buildtools/nativesdk/sysroots/x86_64-openeulersdk-linux/var/ + +WORKDIR /home/${user} + +RUN rm -rf /opt/buildtools/nativesdk/sdk_info +# install necessary python package because Optee-os need this package involve during compile +RUN pip3 install cryptography -i https://pypi.tuna.tsinghua.edu.cn/simple diff --git a/.oebuild/dockerfile/openeuler-container/Dockerfile_CI b/.oebuild/dockerfile/openeuler-container/Dockerfile_CI new file mode 100644 index 0000000000000000000000000000000000000000..707c4ab607472bbe9c4cd45393b56416506ec741 --- /dev/null +++ b/.oebuild/dockerfile/openeuler-container/Dockerfile_CI @@ -0,0 +1,51 @@ +# base image +FROM swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + +ARG VERSION=4.3 +ARG user=jenkins +ARG group=jenkins +#must to be 1001 for adapt disk mount in jenkins'job +ARG uid=1001 +ARG gid=1001 +ARG AGENT_WORKDIR=/home/${user}/agent + +USER root + +RUN curl --create-dirs -fsSLo /usr/share/jenkins/agent.jar https://repo.jenkins-ci.org/public/org/jenkins-ci/main/remoting/${VERSION}/remoting-${VERSION}.jar \ + && chmod 755 /usr/share/jenkins \ + && chmod 644 /usr/share/jenkins/agent.jar \ + && ln -sf /usr/share/jenkins/agent.jar /usr/share/jenkins/slave.jar + +RUN curl --create-dirs -fsSLo /usr/local/bin/jenkins-agent http://121.36.53.23/AdoptOpenJDK/jenkins-agent +#COPY jenkins-agent /usr/local/bin/jenkins-agent + +RUN chmod a+rx /usr/local/bin/jenkins-agent \ + && ln -s /usr/local/bin/jenkins-agent /usr/local/bin/jenkins-slave + +RUN groupadd -g ${gid} ${group} && useradd -c "Jenkins user" -d /home/${user} -u ${uid} -g ${gid} -m ${user} +RUN echo "${user} ALL=(ALL) NOPASSWD:ALL" >> /etc/sudoers + +#add umask conf to 022 in file /etc/bashrc +RUN echo "umask 002" >> /etc/bashrc + +RUN mkdir /home/${user}/.jenkins && mkdir -p ${AGENT_WORKDIR} +RUN chown -R jenkins:jenkins /opt /usr1 ${AGENT_WORKDIR} && chmod -R 755 /opt /usr1 ${AGENT_WORKDIR} + +USER ${user} + +RUN echo "PATH=$PATH:/home/${user}/.local/bin" >> ${HOME}/.bashrc \ + && echo "export PATH" >> ${HOME}/.bashrc + +RUN set -eux; \ +pip install PyYaml python-git requests python-jenkins paramiko json2table \ +gitlint sphinx_tabs sphinx_multiversion sphinx-rtd-theme Sphinx==5.1.1 \ +pyyaml pygit gitpython -i https://pypi.tuna.tsinghua.edu.cn/simple + +RUN pip install oebuild==0.1 + +VOLUME /home/${user}/.jenkins +VOLUME ${AGENT_WORKDIR} + +WORKDIR ${AGENT_WORKDIR} + +ENTRYPOINT ["jenkins-agent"] diff --git a/.oebuild/dockerfile/openeuler-sdk/Dockerfile b/.oebuild/dockerfile/openeuler-sdk/Dockerfile new file mode 100644 index 0000000000000000000000000000000000000000..93a8e7b6e0b1a9743ede65aeda99e5e969320ddb --- /dev/null +++ b/.oebuild/dockerfile/openeuler-sdk/Dockerfile @@ -0,0 +1,46 @@ +# base image +FROM openeuler/openeuler:21.09 + +RUN sed -i 's/repo.openeuler.org/archives.openeuler\.openatom\.cn/g' /etc/yum.repos.d/openEuler.repo + +# yum install +RUN set -eux; \ +yum -y install git java tar binutils-devel gperf sqlite-devel libffi-devel xz-devel \ +zlib zlib-devel openssl-devel bzip2-devel ncurses-devel readline-devel \ +libpcap-devel parted autoconf-archive chrpath gcc-c++ patch rpm-build flex \ +autoconf automake m4 bison bc libtool gettext-devel createrepo_c net-tools \ +wget sudo hostname rpcgen texinfo meson dosfstools mtools libmpc-devel \ +gmp-devel ninja-build numactl-devel make python python3 python3-pip screen \ +iproute help2man gdisk libstdc++-static diffstat lzip python3-devel rsync \ +xz-lzma-compat xz unzip gcc g++ vim hwdata libxslt perl-XML-Parser umoci skopeo + +ARG user=openeuler +ARG group=openeuler +ARG uid=1000 +ARG gid=1000 + +# add build user +RUN groupadd -g ${gid} ${group} && useradd -c "${user}" -d /home/${user} -u ${uid} -g ${gid} -m ${user} +RUN echo "${user} ALL=(ALL) NOPASSWD:ALL" >> /etc/sudoers + +# modify /usr1 owner +RUN mkdir -p /usr1 && chown -R ${user}:${group} /usr1 /opt && chmod -R 755 /usr1 /opt + +# modify default configs +RUN sed -i 's/TMOUT=300/TMOUT=/g' /etc/bashrc + +# download ct-ng +WORKDIR /home/${user} +RUN wget http://crosstool-ng.org/download/crosstool-ng/crosstool-ng-1.26.0.tar.bz2 +RUN tar jxvf crosstool-ng-1.26.0.tar.bz2 +WORKDIR /home/${user}/crosstool-ng-1.26.0 +RUN ./configure +RUN make +RUN sudo make install +WORKDIR /home/${user} +RUN rm -rf crosstool-ng-1.26.0 crosstool-ng-1.26.0.tar.bz2 + +USER ${user} + +# install cmake=3.20.2 for llvm toolchain build +RUN pip install cmake==3.20.2 -i https://pypi.tuna.tsinghua.edu.cn/simple diff --git a/.oebuild/dockerfile/openeuler-sdk/Dockerfile_CI b/.oebuild/dockerfile/openeuler-sdk/Dockerfile_CI new file mode 100644 index 0000000000000000000000000000000000000000..ac375d818acd829aa99014968d49469ca1746225 --- /dev/null +++ b/.oebuild/dockerfile/openeuler-sdk/Dockerfile_CI @@ -0,0 +1,49 @@ +# base image +FROM swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-sdk:latest + +ARG VERSION=4.3 +ARG user=jenkins +ARG group=jenkins +#must to be 1001 for adapt disk mount in jenkins'job +ARG uid=1001 +ARG gid=1001 +ARG AGENT_WORKDIR=/home/${user}/agent + +USER root + +RUN curl --create-dirs -fsSLo /usr/share/jenkins/agent.jar https://repo.jenkins-ci.org/public/org/jenkins-ci/main/remoting/${VERSION}/remoting-${VERSION}.jar \ + && chmod 755 /usr/share/jenkins \ + && chmod 644 /usr/share/jenkins/agent.jar \ + && ln -sf /usr/share/jenkins/agent.jar /usr/share/jenkins/slave.jar + +RUN curl --create-dirs -fsSLo /usr/local/bin/jenkins-agent http://121.36.53.23/AdoptOpenJDK/jenkins-agent +#COPY jenkins-agent /usr/local/bin/jenkins-agent + +RUN chmod a+rx /usr/local/bin/jenkins-agent \ + && ln -s /usr/local/bin/jenkins-agent /usr/local/bin/jenkins-slave + +RUN groupadd -g ${gid} ${group} && useradd -c "Jenkins user" -d /home/${user} -u ${uid} -g ${gid} -m ${user} +RUN echo "${user} ALL=(ALL) NOPASSWD:ALL" >> /etc/sudoers + +#add umask conf to 022 in file /etc/bashrc +RUN echo "umask 002" >> /etc/bashrc + +RUN mkdir /home/${user}/.jenkins && mkdir -p ${AGENT_WORKDIR} +RUN chown -R jenkins:jenkins /opt /usr1 ${AGENT_WORKDIR} && chmod -R 755 /opt /usr1 ${AGENT_WORKDIR} + +USER ${user} + +RUN echo "PATH=$PATH:/home/${user}/.local/bin" >> ${HOME}/.bashrc \ + && echo "export PATH" >> ${HOME}/.bashrc + +RUN set -eux; \ +pip install PyYaml python-git requests python-jenkins paramiko json2table \ +gitlint sphinx_tabs sphinx_multiversion sphinx-rtd-theme Sphinx==5.1.1 \ +oebuild pyyaml pygit gitpython -i https://pypi.tuna.tsinghua.edu.cn/simple + +VOLUME /home/${user}/.jenkins +VOLUME ${AGENT_WORKDIR} + +WORKDIR ${AGENT_WORKDIR} + +ENTRYPOINT ["jenkins-agent"] diff --git a/.oebuild/env.yaml b/.oebuild/env.yaml new file mode 100644 index 0000000000000000000000000000000000000000..108e354140d8fe53965229e81dcb07db22ca4271 --- /dev/null +++ b/.oebuild/env.yaml @@ -0,0 +1,3 @@ +docker_tag: "latest" +docker_image: "swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest" +sdk_docker_image: "swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-sdk:latest" diff --git a/.oebuild/features/busybox.yaml b/.oebuild/features/busybox.yaml new file mode 100644 index 0000000000000000000000000000000000000000..51c3430909ffbf312b4662f47039e0524f0c835b --- /dev/null +++ b/.oebuild/features/busybox.yaml @@ -0,0 +1,5 @@ +type: feature + +local_conf: | + INIT_MANAGER = "mdev-busybox" + VIRTUAL-RUNTIME_dev_manager = "busybox-mdev" diff --git a/.oebuild/features/clang.yaml b/.oebuild/features/clang.yaml new file mode 100644 index 0000000000000000000000000000000000000000..62595d75bff16f829021f81b992ae1b8b8d4dc51 --- /dev/null +++ b/.oebuild/features/clang.yaml @@ -0,0 +1,11 @@ +type: feature + +support: qemu-aarch64|raspberrypi4-64 + +local_conf: | + DISTRO_FEATURES:append = " clang ld-is-lld" + DISTRO_FEATURES_NATIVE:append = " clang " + EXTERNAL_TOOLCHAIN_CLANG_BIN = "${EXTERNAL_TOOLCHAIN_LLVM}/bin" + +layers: +- yocto-meta-openeuler/meta-clang diff --git a/.oebuild/features/debug.yaml b/.oebuild/features/debug.yaml new file mode 100644 index 0000000000000000000000000000000000000000..09e53ba4bcc09ef907b15726242542f2ceb937bb --- /dev/null +++ b/.oebuild/features/debug.yaml @@ -0,0 +1,6 @@ +type: feature + +local_conf: | + IMAGE_FEATURES:append = " tools-debug dbg-pkgs debug-tweaks" + # Allow haveged to provide entropy to speed up the boot time. + DISTRO_FEATURES:append = " haveged" diff --git a/.oebuild/features/hmi.yaml b/.oebuild/features/hmi.yaml new file mode 100644 index 0000000000000000000000000000000000000000..eec5c0b299f5c3e384fe878ad0ca67a0d96688a3 --- /dev/null +++ b/.oebuild/features/hmi.yaml @@ -0,0 +1,20 @@ +type: feature + +repos: + yocto-meta-qt5: + url: https://gitee.com/openeuler/yocto-meta-qt5.git + path: yocto-meta-qt5 + refspec: dev_kirkstone + +local_conf: | + DISTRO_FEATURES:append = " hmi " + DISTRO_FEATURES:append = " opengl" + OPENEULER_DEFAULT_DISTRO_FEATURES:append = " x11" + DISTRO_FEATURES:append = " wayland" + IMAGE_FEATURES:append = " weston" + GLIBC_GENERATE_LOCALES:append = "en_US.UTF-8 zh_CN.UTF-8 " + +layers: +- yocto-meta-openembedded/meta-oe +- yocto-meta-qt5 + diff --git a/.oebuild/features/kernel6.yaml b/.oebuild/features/kernel6.yaml new file mode 100644 index 0000000000000000000000000000000000000000..a8e4a22da4981133cd5a8e28600129688a1ae2ce --- /dev/null +++ b/.oebuild/features/kernel6.yaml @@ -0,0 +1,6 @@ +type: feature + +local_conf: | + DISTRO_FEATURES:append = " kernel6 " + PREFERRED_VERSION_linux-openeuler ?= "6.6%" + PREFERRED_VERSION_linux-openeuler-rt ?= "6.6%" diff --git a/.oebuild/features/musl.yaml b/.oebuild/features/musl.yaml new file mode 100644 index 0000000000000000000000000000000000000000..6a8061cdf1bab91d124f97b62d29f4d74cdd1c73 --- /dev/null +++ b/.oebuild/features/musl.yaml @@ -0,0 +1,13 @@ +type: feature + +support: qemu-aarch64|raspberrypi4-64 + +local_conf: | + EXTERNAL_TARGET_SYS:aarch64 = "aarch64-openeuler-linux-musl" + TCLIBC = "musl" + TCMODE-LIBC = "musl" + TCMODE-CRYPT = "musl" + MACHINE_ESSENTIAL_EXTRA_RDEPENDS = "musl" + +layers: +- yocto-meta-openeuler/meta-musl diff --git a/.oebuild/features/openeuler-container.yaml b/.oebuild/features/openeuler-container.yaml new file mode 100644 index 0000000000000000000000000000000000000000..309acac718ca752ab7c1a595c21788eb2f1dbc5f --- /dev/null +++ b/.oebuild/features/openeuler-container.yaml @@ -0,0 +1,6 @@ +type: feature + +support: qemu-aarch64|raspberrypi4-64|hieulerpi1 + +local_conf: | + DISTRO_FEATURES:append = " isulad " diff --git a/.oebuild/features/openeuler-edge.yaml b/.oebuild/features/openeuler-edge.yaml new file mode 100644 index 0000000000000000000000000000000000000000..272fda90a9b330bc2a64a4c3480e917e2d8d60d9 --- /dev/null +++ b/.oebuild/features/openeuler-edge.yaml @@ -0,0 +1,6 @@ +type: feature + +support: qemu-aarch64|raspberrypi4-64|hieulerpi1 + +local_conf: | + DISTRO_FEATURES:append = " kubeedge isulad " diff --git a/.oebuild/features/openeuler-mcs.yaml b/.oebuild/features/openeuler-mcs.yaml new file mode 100644 index 0000000000000000000000000000000000000000..50ed92fd549b218a803d26183c84d5679ae72355 --- /dev/null +++ b/.oebuild/features/openeuler-mcs.yaml @@ -0,0 +1,16 @@ +type: feature + +support: qemu-aarch64|raspberrypi4-64|hi3093|ok3568|x86-64 + +layers: +- yocto-meta-openeuler/rtos/meta-openeuler-rtos + +local_conf: | + MCS_FEATURES ?= "openamp" + DISTRO_FEATURES:append = " mcs" + +repos: + Jailhouse: + url: https://gitee.com/src-openeuler/Jailhouse + path: Jailhouse + refspec: master diff --git a/.oebuild/features/openeuler-obmc.yaml b/.oebuild/features/openeuler-obmc.yaml new file mode 100644 index 0000000000000000000000000000000000000000..158d95bf3247cfc93bb41fe5f68c042af7e60605 --- /dev/null +++ b/.oebuild/features/openeuler-obmc.yaml @@ -0,0 +1,18 @@ +type: feature + +support: qemu-aarch64|raspberrypi4-64 + +layers: +- yocto-meta-phosphor + +local_conf: | + DISTRO_FEATURES:append = " obmc " + INIT_MANAGER = "systemd" + VIRTUAL-RUNTIME_dev_manager = "systemd" + ROOT_HOME = "/home/root" + +repos: + yocto-meta-phosphor: + url: https://gitee.com/openeuler/yocto-meta-phosphor.git + path: yocto-meta-phosphor + refspec: master diff --git a/.oebuild/features/openeuler-qt.yaml b/.oebuild/features/openeuler-qt.yaml new file mode 100644 index 0000000000000000000000000000000000000000..eeb5028c3529fa8ba3e4b257d4ce73ef4531f812 --- /dev/null +++ b/.oebuild/features/openeuler-qt.yaml @@ -0,0 +1,15 @@ +type: feature + +support: raspberrypi4-64|ok3568|ryd-3568|x86-64|hi3093 + +repos: + yocto-meta-qt5: + url: https://gitee.com/openeuler/yocto-meta-qt5.git + path: yocto-meta-qt5 + refspec: dev_kirkstone + +local_conf: | + +layers: +- yocto-meta-openembedded/meta-oe +- yocto-meta-qt5 diff --git a/.oebuild/features/openeuler-ros.yaml b/.oebuild/features/openeuler-ros.yaml new file mode 100644 index 0000000000000000000000000000000000000000..98d4b3fe3209d27270ac64fa4b34e9b8c8d80d16 --- /dev/null +++ b/.oebuild/features/openeuler-ros.yaml @@ -0,0 +1,16 @@ +type: feature + +repos: + yocto-meta-ros: + url: https://gitee.com/openeuler/yocto-meta-ros.git + path: yocto-meta-ros + refspec: dev_kirkstone + +layers: +- yocto-meta-ros/meta-ros-common +- yocto-meta-ros/meta-ros2 +- yocto-meta-ros/meta-ros2-humble +- yocto-meta-openembedded/meta-multimedia + +local_conf: | + DISTRO_FEATURES:append = " ros " diff --git a/.oebuild/features/openeuler-rt.yaml b/.oebuild/features/openeuler-rt.yaml new file mode 100644 index 0000000000000000000000000000000000000000..179714cf8bdc31508ca77a5921ac85e500a17b5b --- /dev/null +++ b/.oebuild/features/openeuler-rt.yaml @@ -0,0 +1,5 @@ +type: feature + +local_conf: | + PREFERRED_PROVIDER_virtual/kernel = "linux-openeuler-rt" + DISTRO_FEATURES:append = " preempt-rt " diff --git a/.oebuild/features/opengl.yaml b/.oebuild/features/opengl.yaml new file mode 100644 index 0000000000000000000000000000000000000000..f0ef567f0f3500d1854fc73960186539d9866b3b --- /dev/null +++ b/.oebuild/features/opengl.yaml @@ -0,0 +1,4 @@ +type: feature + +local_conf: | + DISTRO_FEATURES:append = " opengl" diff --git a/.oebuild/features/systemd.yaml b/.oebuild/features/systemd.yaml new file mode 100644 index 0000000000000000000000000000000000000000..f260f5c03a87f56cb0f2e9964c327fc7e5a4a33a --- /dev/null +++ b/.oebuild/features/systemd.yaml @@ -0,0 +1,5 @@ +type: feature + +local_conf: | + INIT_MANAGER = "systemd" + VIRTUAL-RUNTIME_dev_manager = "systemd" diff --git a/.oebuild/features/wayland.yaml b/.oebuild/features/wayland.yaml new file mode 100644 index 0000000000000000000000000000000000000000..b8e2514eed1e9c82a9aa064365a417b692849d1d --- /dev/null +++ b/.oebuild/features/wayland.yaml @@ -0,0 +1,5 @@ +type: feature + +local_conf: | + DISTRO_FEATURES:append = " wayland" + IMAGE_FEATURES:append = " weston" diff --git a/.oebuild/features/x11.yaml b/.oebuild/features/x11.yaml new file mode 100644 index 0000000000000000000000000000000000000000..4e7f7d27847c953bd849483db5ae18479318a04c --- /dev/null +++ b/.oebuild/features/x11.yaml @@ -0,0 +1,4 @@ +type: feature + +local_conf: | + OPENEULER_DEFAULT_DISTRO_FEATURES:append = " x11" diff --git a/.oebuild/llvm-toolchain/README.md b/.oebuild/llvm-toolchain/README.md new file mode 100644 index 0000000000000000000000000000000000000000..5d73e2affb109fded8872ab408651b8ecc6983ae --- /dev/null +++ b/.oebuild/llvm-toolchain/README.md @@ -0,0 +1,103 @@ +# llvm-toolchain + +#### 介绍 + +该模块用于制作openEuler嵌入式的LLVM工具链,一条LLVM工具链既能支持x86_64下的native构建,也能支持aarch64下的交叉构建。支持openEuler嵌入式其他架构的交叉构建待后续完善。 + +#### 软件架构和配置说明 + +configs: 相关依赖仓的配置 + +prepare.sh: 用于下载构建所需的依赖仓库 + +编译链构建容器:swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-sdk:latest + +> 注意: +> +> 自行构建时,在进入容器时使用`-u`参数指定用户为`openeuler` + +#### 使用说明 + +LLVM工具链的构建目前只支持自行构建,暂未集成到`oebuild`,待后续完善。通过该模块下的脚本和LLVM源码仓的脚本可以较为方便的构建LLVM工具链。 + +1,下载构建LLVM工具链需要的源码 + +``` +./llvm-toolchain/prepare.sh ./ +``` + +2,进入LLVM源码目录构建LLVM工具链 + +``` +cd ./open_source/llvm-project +./build.sh -e -o -s -i -b release -I clang-llvm-17.0.6 +``` + +使用`./build.sh -h`命令能够查看各个参数的作用,参考如下, + +``` +$ ./build.sh -h +Usage: ./build.sh [options] + +Build the compiler under /home/llvm-project/build, then install under /home/llvm-project/install. + +Options: + -b type Specify CMake build type (default: RelWithDebInfo). + -c Use ccache (default: 0). + -e Build for embedded cross tool chain. + -E Build for openEuler. + -h Display this help message. + -i Install the build (default: 0). + -I name Specify install directory name (default: "install"). + -j N Allow N jobs at once (default: 8). + -o Enable LLVM_INSTALL_TOOLCHAIN_ONLY=ON. + -r Delete /home/llvm-project/install and perform a clean build (default: incremental). + -s Strip binaries and minimize file permissions when (re-)installing. + -t Enable unit tests for components that support them (make check-all). + -v Enable verbose build output (default: quiet). + -f Enable classic flang. + -X archs Build only the specified semi-colon-delimited list of backends (default: "ARM;AArch64;X86"). +``` + +构建完成的LLVM工具链安装在`-I`指定的目录下,默认为`install`目录。 + +3,LLVM工具链集成交叉构建时目标架构的头文件和库文件 + +使用LLVM工具链进行交叉构建时,需要使用`--gcc-toolchain=`和`--sysroot=`选项指定目标架构的头文件和库文件所在的路径,或者将相关的文件集成到LLVM工具链当中,openEuler LLVM已经使能特性能够搜索默认集成的路径。 + +集成所需的头文件和库文件来自于GCC交叉工具链,可以从该[下载链接](https://gitee.com/openeuler/yocto-meta-openeuler/releases)中下载最新`openEuler Embedded Toolchains`版本的GCC交叉工具链,选择其中的`aarch64`版本。集成方式如下, + +``` +# llvm toolchain 目录: +# /path/to/llvm-project/clang-llvm-17.0.6 +# gcc toolchain 目录: +# /path/to/gcc/openeuler_gcc_arm64le +cd /path/to/llvm-project/clang-llvm-17.0.6 +mkdir lib64 aarch64-openeuler-linux-gnu +cp -rf /path/to/gcc/openeuler_gcc_arm64le/lib64/gcc lib64/ +cp -rf /path/to/gcc/openeuler_gcc_arm64le/aarch64-openeuler-linux-gnu/include aarch64-openeuler-linux-gnu/ +cp -rf /path/to/gcc/openeuler_gcc_arm64le/aarch64-openeuler-linux-gnu/sysroot aarch64-openeuler-linux-gnu/ + +# 交叉构建工程中,由于部分软件包无法接收到LDFLAGS中的-fuse-ld=lld选项,导致需要去寻找ld链接器,目前以建立软链接进行处理 +cd /path/to/llvm-project/clang-llvm-17.0.6/bin +ln -sf ld.lld aarch64-openeuler-linux-gnu-ld +``` + +# release.yaml + +#### 介绍 + +此文件主要用于升级toolchain工具版本,具体参数如下。 + +tag_name: 发行版标签 + +name: 发行版名称 + +body: 发行版描述 + +target_commitish: 标签关联的对应仓库分支 + +owner: 所属工作组 + +repo: gitee仓库名称 + diff --git a/.oebuild/llvm-toolchain/configs/config.xml b/.oebuild/llvm-toolchain/configs/config.xml new file mode 100644 index 0000000000000000000000000000000000000000..e434ecef13472865d67e62cc2aae015ec5b2183e --- /dev/null +++ b/.oebuild/llvm-toolchain/configs/config.xml @@ -0,0 +1,2 @@ +LLVM="llvm-project" +LLVM_BRANCH="dev_17.0.6" diff --git a/.oebuild/llvm-toolchain/prepare.sh b/.oebuild/llvm-toolchain/prepare.sh new file mode 100644 index 0000000000000000000000000000000000000000..de5a06356b935f813c529ab0e24e055a20b2e0f4 --- /dev/null +++ b/.oebuild/llvm-toolchain/prepare.sh @@ -0,0 +1,65 @@ +#!/bin/bash + +function delete_dir() { + while [ $# != 0 ] ; do + [ -n "$1" ] && rm -rf ./$1 ; shift; done +} + +function do_prepare() { + [ ! -d "$LIB_PATH" ] && mkdir $LIB_PATH + pushd $LIB_PATH + delete_dir $LLVM + git clone -b $LLVM_BRANCH https://gitee.com/openeuler/$LLVM.git --depth 1 + popd +} + +usage() +{ + echo -e "Tip: sh llvm-toolchain/prepare.sh \n" +} + +check_use() +{ + if [ -n "$BASH_SOURCE" ]; then + THIS_SCRIPT="$BASH_SOURCE" + elif [ -n "$ZSH_NAME" ]; then + THIS_SCRIPT="$0" + else + THIS_SCRIPT="$(pwd)/prepare.sh" + if [ ! -e "$THIS_SCRIPT" ]; then + echo "Error: $THIS_SCRIPT doesn't exist!" + return 1 + fi + fi + + if [ "$0" != "$THIS_SCRIPT" ]; then + echo "Error: This script cannot be sourced. Please run as 'sh $THIS_SCRIPT'" >&2 + return 1 + fi +} + +main() +{ + usage + check_use || return 1 + set -e + WORK_DIR="$1" + SRC_DIR="$(cd $(dirname $0)/;pwd)" + SRC_DIR="$(realpath ${SRC_DIR})" + if [[ -z "${WORK_DIR}" ]];then + WORK_DIR=$SRC_DIR + echo "use default work dir: $WORK_DIR" + fi + WORK_DIR="$(realpath ${WORK_DIR})" + source $SRC_DIR/configs/config.xml + readonly LIB_PATH="$WORK_DIR/open_source" + + do_prepare + + cd $WORK_DIR + echo "Prepare done! Now you can run: (not in root please)" + echo "cd $LIB_PATH/$LLVM" + echo "'./build.sh -e -o -s -i -b release' for LLVM toolchain" +} + +main "$@" diff --git a/.oebuild/llvm-toolchain/release.yaml b/.oebuild/llvm-toolchain/release.yaml new file mode 100644 index 0000000000000000000000000000000000000000..80b7641421fa64f6ec3aae8504ac9194cb941241 --- /dev/null +++ b/.oebuild/llvm-toolchain/release.yaml @@ -0,0 +1,9 @@ +tag_name: llvm-toolchain-v0.1.1 +name: openEuler Embedded LLVM Toolchains V0.1.1 +body: 1.此发行版为对应LLVM Toolchains V0.1.1版本。 + 2.请下载所有的gz结尾的压缩包及merge_data.sh文件,对应名称的压缩包即为对应构建工具链。 + 3.请给merge_data.sh文件可执行权限,并执行即可得到对应的工具链文件夹。 + 4.更新内容:LLVM工具链恢复o+rx权限;集成的GCC工具链相关文件变更为V0.1.5版本。 +target_commitish: master +owner: openeuler +repo: yocto-meta-openeuler diff --git a/.oebuild/local.conf.sample b/.oebuild/local.conf.sample new file mode 100644 index 0000000000000000000000000000000000000000..df4a9433033ec6581001aed652a8e3c40e755fa6 --- /dev/null +++ b/.oebuild/local.conf.sample @@ -0,0 +1,354 @@ +# +# This file is your local configuration file and is where all local user settings +# are placed. The comments in this file give some guide to the options a new user +# to the system might want to change but pretty much any configuration option can +# be set in this file. More adventurous users can look at +# local.conf.sample.extended which contains other examples of configuration which +# can be placed in this file but new users likely won't need any of them +# initially. +# +# Lines starting with the '#' character are commented out and in some cases the +# default values are provided as comments to show people example syntax. Enabling +# the option is a question of removing the # character and making any change to the +# variable as required. + +# +# Machine Selection +# +# You need to select a specific machine to target the build with. There are a selection +# of emulated machines available which can boot and run in the QEMU emulator: +# +#MACHINE ?= "qemuarm" +#MACHINE ?= "qemuarm64" +#MACHINE ?= "qemumips" +#MACHINE ?= "qemumips64" +#MACHINE ?= "qemuppc" +#MACHINE ?= "qemux86" +#MACHINE ?= "qemux86-64" +# +# There are also the following hardware board target machines included for +# demonstration purposes: +# +#MACHINE ?= "beaglebone-yocto" +#MACHINE ?= "genericx86" +#MACHINE ?= "genericx86-64" +#MACHINE ?= "edgerouter" +# +# This sets the default machine to be qemux86-64 if no other machine is selected: +MACHINE ??= "qemu-aarch64" + +# +# Where to place downloads +# +# During a first build the system will download many different source code tarballs +# from various upstream projects. This can take a while, particularly if your network +# connection is slow. These are all stored in DL_DIR. When wiping and rebuilding you +# can preserve this directory to speed up this part of subsequent builds. This directory +# is safe to share between multiple builds on the same machine too. +# +# The default is a downloads directory under TOPDIR which is the build directory. +# +#DL_DIR ?= "${TOPDIR}/downloads" + +# +# Where to place shared-state files +# +# BitBake has the capability to accelerate builds based on previously built output. +# This is done using "shared state" files which can be thought of as cache objects +# and this option determines where those files are placed. +# +# You can wipe out TMPDIR leaving this directory intact and the build would regenerate +# from these files if no changes were made to the configuration. If changes were made +# to the configuration, only shared state files where the state was still valid would +# be used (done using checksums). +# +# The default is a sstate-cache directory under TOPDIR. +# +#SSTATE_DIR ?= "${TOPDIR}/sstate-cache" + +# +# Where to place the build output +# +# This option specifies where the bulk of the building work should be done and +# where BitBake should place its temporary files and output. Keep in mind that +# this includes the extraction and compilation of many applications and the toolchain +# which can use Gigabytes of hard disk space. +# +# The default is a tmp directory under TOPDIR. +# +#TMPDIR = "${TOPDIR}/tmp" + +# +# Default policy config +# +# The distribution setting controls which policy settings are used as defaults. +# The default value is fine for general Yocto project use, at least initially. +# Ultimately when creating custom policy, people will likely end up subclassing +# these defaults. +# +DISTRO ?= "openeuler" +# As an example of a subclass there is a "bleeding" edge policy configuration +# where many versions are set to the absolute latest code from the upstream +# source control systems. This is just mentioned here as an example, its not +# useful to most new users. +# DISTRO ?= "poky-bleeding" + +# +# Package Management configuration +# +# This variable lists which packaging formats to enable. Multiple package backends +# can be enabled at once and the first item listed in the variable will be used +# to generate the root filesystems. +# Options are: +# - 'package_deb' for debian style deb files +# - 'package_ipk' for ipk files are used by opkg (a debian style embedded package manager) +# - 'package_rpm' for rpm style packages +# E.g.: PACKAGE_CLASSES ?= "package_rpm package_deb package_ipk" +# We default to rpm: +PACKAGE_CLASSES ?= "package_rpm" + +# +# SDK target architecture +# +# This variable specifies the architecture to build SDK items for and means +# you can build the SDK packages for architectures other than the machine you are +# running the build on (i.e. building i686 packages on an x86_64 host). +# Supported values are i686, x86_64, aarch64 +#SDKMACHINE ?= "i686" + +# +# Extra image configuration defaults +# +# The EXTRA_IMAGE_FEATURES variable allows extra packages to be added to the generated +# images. Some of these options are added to certain image types automatically. The +# variable can contain the following options: +# "dbg-pkgs" - add -dbg packages for all installed packages +# (adds symbol information for debugging/profiling) +# "src-pkgs" - add -src packages for all installed packages +# (adds source code for debugging) +# "dev-pkgs" - add -dev packages for all installed packages +# (useful if you want to develop against libs in the image) +# "ptest-pkgs" - add -ptest packages for all ptest-enabled packages +# (useful if you want to run the package test suites) +# "tools-sdk" - add development tools (gcc, make, pkgconfig etc.) +# "tools-debug" - add debugging tools (gdb, strace) +# "eclipse-debug" - add Eclipse remote debugging support +# "tools-profile" - add profiling tools (oprofile, lttng, valgrind) +# "tools-testapps" - add useful testing tools (ts_print, aplay, arecord etc.) +# "debug-tweaks" - make an image suitable for development +# e.g. ssh root access has a blank password +# There are other application targets that can be used here too, see +# meta/classes/image.bbclass and meta/classes/core-image.bbclass for more details. +# We default to enabling the debugging tweaks. +# EXTRA_IMAGE_FEATURES ?= "debug-tweaks" + +# +# Additional image features +# +# The following is a list of additional classes to use when building images which +# enable extra features. Some available options which can be included in this variable +# are: +# - 'buildstats' collect build statistics +USER_CLASSES ?= "buildstats" + +# +# Runtime testing of images +# +# The build system can test booting virtual machine images under qemu (an emulator) +# after any root filesystems are created and run tests against those images. It can also +# run tests against any SDK that are built. To enable this uncomment these lines. +# See classes/test{image,sdk}.bbclass for further details. +#IMAGE_CLASSES += "testimage testsdk" +#TESTIMAGE_AUTO:qemuall = "1" + +# +# Interactive shell configuration +# +# Under certain circumstances the system may need input from you and to do this it +# can launch an interactive shell. It needs to do this since the build is +# multithreaded and needs to be able to handle the case where more than one parallel +# process may require the user's attention. The default is iterate over the available +# terminal types to find one that works. +# +# Examples of the occasions this may happen are when resolving patches which cannot +# be applied, to use the devshell or the kernel menuconfig +# +# Supported values are auto, gnome, xfce, rxvt, screen, konsole (KDE 3.x only), none +# Note: currently, Konsole support only works for KDE 3.x due to the way +# newer Konsole versions behave +#OE_TERMINAL = "auto" +# By default disable interactive patch resolution (tasks will just fail instead): +PATCHRESOLVE = "noop" + +# +# Disk Space Monitoring during the build +# +# Monitor the disk space during the build. If there is less that 1GB of space or less +# than 100K inodes in any key build location (TMPDIR, DL_DIR, SSTATE_DIR), gracefully +# shutdown the build. If there is less than 100MB or 1K inodes, perform a hard halt +# of the build. The reason for this is that running completely out of space can corrupt +# files and damages the build in ways which may not be easily recoverable. +# It's necessary to monitor /tmp, if there is no space left the build will fail +# with very exotic errors. +BB_DISKMON_DIRS ??= "\ + STOPTASKS,${TMPDIR},1G,100K \ + STOPTASKS,${DL_DIR},1G,100K \ + STOPTASKS,${SSTATE_DIR},1G,100K \ + STOPTASKS,/tmp,100M,100K \ + HALT,${TMPDIR},100M,1K \ + HALT,${DL_DIR},100M,1K \ + HALT,${SSTATE_DIR},100M,1K \ + HALT,/tmp,10M,1K" + +# +# Shared-state files from other locations +# +# As mentioned above, shared state files are prebuilt cache data objects which can be +# used to accelerate build time. This variable can be used to configure the system +# to search other mirror locations for these objects before it builds the data itself. +# +# This can be a filesystem directory, or a remote url such as https or ftp. These +# would contain the sstate-cache results from previous builds (possibly from other +# machines). This variable works like fetcher MIRRORS/PREMIRRORS and points to the +# cache locations to check for the shared objects. +# NOTE: if the mirror uses the same structure as SSTATE_DIR, you need to add PATH +# at the end as shown in the examples below. This will be substituted with the +# correct path within the directory structure. +#SSTATE_MIRRORS ?= "\ +#file://.* https://someserver.tld/share/sstate/PATH;downloadfilename=PATH \ +#file://.* file:///some/local/dir/sstate/PATH" + +# +# Yocto Project SState Mirror +# +# The Yocto Project has prebuilt artefacts available for its releases, you can enable +# use of these by uncommenting the following lines. This will mean the build uses +# the network to check for artefacts at the start of builds, which does slow it down +# equally, it will also speed up the builds by not having to build things if they are +# present in the cache. It assumes you can download something faster than you can build it +# which will depend on your network. +# Note: For this to work you also need hash-equivalence passthrough to the matching server +# +#BB_HASHSERVE_UPSTREAM = "hashserv.yocto.io:8687" +#SSTATE_MIRRORS ?= "file://.* http://sstate.yoctoproject.org/all/PATH;downloadfilename=PATH" + +# +# Qemu configuration +# +# By default native qemu will build with a builtin VNC server where graphical output can be +# seen. The line below enables the SDL UI frontend too. +#PACKAGECONFIG:append:pn-qemu-system-native = " sdl" +# By default libsdl2-native will be built, if you want to use your host's libSDL instead of +# the minimal libsdl built by libsdl2-native then uncomment the ASSUME_PROVIDED line below. +#ASSUME_PROVIDED += "libsdl2-native" + +# You can also enable the Gtk UI frontend, which takes somewhat longer to build, but adds +# a handy set of menus for controlling the emulator. +#PACKAGECONFIG:append:pn-qemu-system-native = " gtk+" + +# +# Hash Equivalence +# +# Enable support for automatically running a local hash equivalence server and +# instruct bitbake to use a hash equivalence aware signature generator. Hash +# equivalence improves reuse of sstate by detecting when a given sstate +# artifact can be reused as equivalent, even if the current task hash doesn't +# match the one that generated the artifact. +# +# A shared hash equivalent server can be set with ":" format +# +#BB_HASHSERVE = "auto" +#BB_SIGNATURE_HANDLER = "OEEquivHash" + +# +# Memory Resident Bitbake +# +# Bitbake's server component can stay in memory after the UI for the current command +# has completed. This means subsequent commands can run faster since there is no need +# for bitbake to reload cache files and so on. Number is in seconds, after which the +# server will shut down. +# +#BB_SERVER_TIMEOUT = "60" + +# CONF_VERSION is increased each time build/conf/ changes incompatibly and is used to +# track the version of this file when it was generated. This can safely be ignored if +# this doesn't mean anything to you. +CONF_VERSION = "2" + +# use quilt as default patching tool, defined in bitbake.conf +# if you want to modify, please set PATCHTOOL as follow: +# PATCHTOOL = "patch" + +TCMODE = "external-openeuler" +INHERIT:remove = "uninative" +PATCHDEPENDENCY:remove = "patch-replacement-native:do_populate_sysroot" + +# openEuler software package dir +# all openeEuler software packages will be downloaded by specific tool +# into this dir with the following format: +# +# busybox +# openssh +# ..... +OPENEULER_SP_DIR = "/usr1/openeuler/src" + +# the sysroot of native sdk of openeuler which contains all the native tools +# used for building openeuler +# +OPENEULER_PREBUILT_TOOLS_ENABLE = "yes" +OVERRIDES .= "${@['', ':openeuler-prebuilt']['${OPENEULER_PREBUILT_TOOLS_ENABLE}' == 'yes']}" + +# OPENEULER_NATIVESDK_SYSROOT points to the sysroot of prebuilt host tools +OPENEULER_NATIVESDK_SYSROOT = "/opt/buildtools/nativesdk/sysroots/x86_64-openeulersdk-linux" + +# openEuler cross toolchain dir +# prebuilt toolchain with c library is used to build openEuler embedded +# distribution. The prebuilt toolchain should be downloaded and placed in +# EXTERNAL_TOOLCHAIN with the following format: +# +# openeuler_gcc_arm64le +# openeuler_gcc_arm32le" +EXTERNAL_TOOLCHAIN_GCC:arm = "/usr1/openeuler/gcc/openeuler_gcc_arm32le" +EXTERNAL_TOOLCHAIN_GCC:aarch64 = "/usr1/openeuler/gcc/openeuler_gcc_arm64le" +EXTERNAL_TOOLCHAIN_GCC:x86-64 = "/usr1/openeuler/gcc/openeuler_gcc_x86_64" +EXTERNAL_TOOLCHAIN_GCC:riscv64 = "/usr1/openeuler/gcc/openeuler_gcc_riscv64" +EXTERNAL_TOOLCHAIN_LLVM = "/usr1/openeuler/llvm" +EXTERNAL_TARGET_SYS:arm = "arm-openeuler-linux-gnueabi" +EXTERNAL_TARGET_SYS:aarch64 = "aarch64-openeuler-linux-gnu" +EXTERNAL_TARGET_SYS:x86-64 = "x86_64-openeuler-linux-gnu" +EXTERNAL_TARGET_SYS:riscv64 = "riscv64-openeuler-linux-gnu" +EXTERNAL_TOOLCHAIN ?= "${EXTERNAL_TOOLCHAIN_GCC}" + + +# add openeuler security flags +require conf/distro/include/security_flags.inc +require conf/distro/include/security_flags_openeuler.inc + +# OE-built toolchains assume en_US is utf8 +EXTERNAL_TOOLCHAIN_FEATURES_DEFAULT = "locale-utf8-is-default" + +# manifest is base line for building openEuler Embedded image +MANIFEST_DIR ?= "${OPENEULER_SP_DIR}/yocto-meta-openeuler/.oebuild/manifest.yaml" +MAPLIST_DIR ?= "${OPENEULER_SP_DIR}/yocto-meta-openeuler/.oebuild/maplist.yaml" + +# After the update of GCC, it aligns the data segment by MAXPAGESIZE +# rather than COMMONPAGESIZE. In a lot of 64 bit architecture, the +# MAXPAGESIZE is much larger than 4KB. For example, in aarch64 +# MAXPAGESIZE is equal to 64KB. As a result, the padding will be much +# larger than before, which enlarge the binary. +# +# Under embedded scenario, the memory is limited. Even though larger +# page size brings better performance, we should choose keeping the page +# size to be 4KB to better utilize the memory space. +# +# After applying this limitation, the rootfs can be shrinked by 13.33% +# for the openeuler-image. +# +# WARNING: since we limit the MAXPAGESIZE to be 4KB, if the user +# manually change the page size in kernel config to be 64KB, the binary +# cannot be run normally. +# +# For more info, see the following link: +# https://gitee.com/openeuler/yocto-meta-openeuler/issues/IA4BRS?from=project-issue +# +LDFLAGS += " -Wl,-zmax-page-size=0x1000 " diff --git a/.oebuild/manifest.yaml b/.oebuild/manifest.yaml new file mode 100644 index 0000000000000000000000000000000000000000..e3fd78bb2b7dad64b65469522eb62cf81fb22c02 --- /dev/null +++ b/.oebuild/manifest.yaml @@ -0,0 +1,2126 @@ +# Copyright (c) 2023 openEuler Embedded +# oebuild is licensed under Mulan PSL v2. +# You can use this software according to the terms and conditions of the Mulan PSL v2. +# You may obtain a copy of Mulan PSL v2 at: +# http://license.coscl.org.cn/MulanPSL2 +# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +# EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +# MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +# See the Mulan PSL v2 for more details. + +manifest_list: + BehaviorTree.CPP: + remote_url: https://gitee.com/src-openeuler/BehaviorTree.CPP.git + version: 7c0d3c631e66ad13a49474bf9ce7587f246fa284 + Cython: + remote_url: https://gitee.com/src-openeuler/Cython.git + version: 76f0889b6bf7cf9aa0650675a3299c8227255119 + Fast-CDR: + remote_url: https://gitee.com/src-openeuler/Fast-CDR.git + version: c206e23ea6e60e913287265c8be24bf1b64f8f1a + Fast-DDS: + remote_url: https://gitee.com/src-openeuler/Fast-DDS.git + version: 9d8df0ca79ebcb5fcf6f6a9d48bc2c88f74b3441 + GraphicsMagick: + remote_url: https://gitee.com/src-openeuler/GraphicsMagick.git + version: 54d35b3952d5811592370b7ee9fcb8ed0f46526e + HiEuler-driver: + remote_url: https://gitee.com/HiEuler/hardware_driver.git + version: fe390ae40d79c4932f0ead12d35a97b0c3f9c666 + Jailhouse: + remote_url: https://gitee.com/src-openeuler/Jailhouse.git + version: 5fc52fe2d58fd3fd929d97d1f10dbf7b49cdb53e + OpenAMP: + remote_url: https://gitee.com/src-openeuler/OpenAMP.git + version: 0dfe540d001c193e46e73ee37e55ca4ef52ece7c + SDL2: + remote_url: https://gitee.com/src-openeuler/SDL2.git + version: d2ed4dad8b628d9355ceababb419b42c4b6d1866 + abseil-cpp: + remote_url: https://gitee.com/src-openeuler/abseil-cpp.git + version: c31e06bcaa540d08dcf61286bed9f3394f776c40 + ackermann_msgs: + remote_url: https://gitee.com/src-openeuler/ackermann_msgs.git + version: ada460ea14a8ddfb5de825cc398c09b252c737b8 + acl: + remote_url: https://gitee.com/src-openeuler/acl.git + version: 3d8d8158744824af8dffc7686596b7017ae96231 + adwaita-icon-theme: + remote_url: https://gitee.com/src-openeuler/adwaita-icon-theme.git + version: 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https://gitee.com/src-openeuler/ntp.git + version: 9b7f1fb05e2387970c7a611d8110dbce22ed6c70 + cri-tools: + remote_url: https://gitee.com/src-openeuler/cri-tools.git + version: 48d0fda4cf601e34f2d557544332fbcfb10a596b + cni: + remote_url: https://gitee.com/src-openeuler/containernetworking-plugins.git + version: b1ac29e26d64e4887def7d29b22d47e8687e9191 + libvpx: + remote_url: https://gitee.com/src-openeuler/libvpx.git + version: 0ac414f4f38419207a874f79ce6075335eb19b6d diff --git a/.oebuild/maplist.yaml b/.oebuild/maplist.yaml new file mode 100644 index 0000000000000000000000000000000000000000..5bb7aa6999d67afaea5b403b04c4ab0ad260cf85 --- /dev/null +++ b/.oebuild/maplist.yaml @@ -0,0 +1,1329 @@ +# Copyright (c) 2023 openEuler Embedded +# oebuild is licensed under Mulan PSL v2. +# You can use this software according to the terms and conditions of the Mulan PSL v2. +# You may obtain a copy of Mulan PSL v2 at: +# http://license.coscl.org.cn/MulanPSL2 +# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +# EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +# MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +# See the Mulan PSL v2 for more details. + +localname_list: + action-msgs: + localname: rcl-interfaces + workspace_tarball: + - 'git ros-humble-action-msgs_1.2.1.orig.tar.gz' + actionlib-msgs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-actionlib-msgs_4.2.3.orig.tar.gz' + ament-cmake: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake_1.3.4.orig.tar.gz' + ament-cmake-core: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-core_1.3.4.orig.tar.gz' + ament-cmake-export-definitions: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-export-definitions_1.3.4.orig.tar.gz' + ament-cmake-export-dependencies: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-export-dependencies_1.3.4.orig.tar.gz' + ament-cmake-export-include-directories: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-export-include-directories_1.3.4.orig.tar.gz' + ament-cmake-export-interfaces: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-export-interfaces_1.3.4.orig.tar.gz' + ament-cmake-export-libraries: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-export-libraries_1.3.4.orig.tar.gz' + ament-cmake-export-link-flags: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-export-link-flags_1.3.4.orig.tar.gz' + ament-cmake-export-targets: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-export-targets_1.3.4.orig.tar.gz' + ament-cmake-gmock: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-gmock_1.3.4.orig.tar.gz' + ament-cmake-gtest: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-gtest_1.3.4.orig.tar.gz' + ament-cmake-include-directories: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-include-directories_1.3.4.orig.tar.gz' + ament-cmake-libraries: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-libraries_1.3.4.orig.tar.gz' + ament-cmake-pytest: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-pytest_1.3.4.orig.tar.gz' + ament-cmake-python: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-python_1.3.4.orig.tar.gz' + ament-cmake-ros: + localname: ament-cmake-ros + workspace_tarball: + - 'git ros-humble-ament-cmake-ros_0.10.0.orig.tar.gz' + ament-cmake-target-dependencies: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-target-dependencies_1.3.4.orig.tar.gz' + ament-cmake-test: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-test_1.3.4.orig.tar.gz' + ament-cmake-version: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-version_1.3.4.orig.tar.gz' + ament-cmake-gen-version-h: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-gen-version-h_1.3.4.orig.tar.gz' + ament-index-cpp: + localname: ament-index + workspace_tarball: + - 'git ros-humble-ament-index-cpp_1.4.0.orig.tar.gz' + ament-index-python: + localname: ament-index + workspace_tarball: + - 'git ros-humble-ament-index-python_1.4.0.orig.tar.gz' + ament-package: + localname: ament-package + workspace_tarball: + - 'git ros-humble-ament-package_0.14.0.orig.tar.gz' + ament-lint: + PV: 0.12.6 + localname: ament-lint + workspace_tarball: + - 'git ros-humble-ament-lint_0.12.6.orig.tar.gz' + ament-lint-auto: + PV: 0.12.6 + localname: ament-lint + workspace_tarball: + - 'git ros-humble-ament-lint-auto_0.12.6.orig.tar.gz' + ament-lint-common: + PV: 0.12.6 + localname: ament-lint + workspace_tarball: + - 'git ros-humble-ament-lint-common_0.12.6.orig.tar.gz' + ament-lint-cmake: + PV: 0.12.6 + localname: ament-lint + workspace_tarball: + - 'git ros-humble-ament-lint-cmake_0.12.6.orig.tar.gz' + ament-copyright: + PV: 0.12.6 + localname: ament-lint + workspace_tarball: + - 'git ros-humble-ament-copyright_0.12.6.orig.tar.gz' + builtin-interfaces: + localname: rcl-interfaces + workspace_tarball: + - 'git ros-humble-builtin-interfaces_1.2.1.orig.tar.gz' + class-loader: + localname: class-loader + workspace_tarball: + - 'git ros-humble-class-loader_2.2.0.orig.tar.gz' + common-interfaces: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-common-interfaces_4.2.3.orig.tar.gz' + composition-interfaces: + localname: rcl-interfaces + workspace_tarball: + - 'git ros-humble-composition-interfaces_1.2.1.orig.tar.gz' + console-bridge: + localname: console-bridge + workspace_tarball: + - 'git 1.0.2.tar.gz' + console-bridge-vendor: + PV: 1.4.1 + localname: console-bridge-vendor + workspace_tarball: + - 'git ros-humble-console-bridge-vendor_1.4.1.orig.tar.gz' + shared-queues-vendor: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-shared-queues-vendor_0.15.5.orig.tar.gz' + - 'git ef7dfbf553288064347d51b8ac335f1ca489032a.zip' + - 'git 8f65a8734d77c3cc00d74c0532efca872931d3ce.zip' + cyclonedds: + localname: cyclonedds + workspace_tarball: + - 'git ros-humble-cyclonedds_0.9.1.orig.tar.gz' + diagnostic-msgs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-diagnostic-msgs_4.2.3.orig.tar.gz' + domain-coordinator: + localname: ament-cmake-ros + workspace_tarball: + - 'git ros-humble-domain-coordinator_0.10.0.orig.tar.gz' + fastcdr: + localname: Fast-CDR + workspace_tarball: + - 'git ros-humble-fastcdr_1.0.24.orig.tar.gz' + fastrtps: + PV: 2.6.4 + localname: Fast-DDS + workspace_tarball: + - 'git ros-humble-fastrtps_2.6.4.orig.tar.gz' + fastrtps-cmake-module: + localname: rosidl_typesupport_fastrtps + workspace_tarball: + - 'git ros-humble-fastrtps-cmake-module_2.2.0.orig.tar.gz' + foonathan-memory: + PV: 0.7.1 + localname: foonathan-memory-vendor + workspace_tarball: + - 'git memory-0.7-1.tar.gz' + foonathan-memory-vendor: + localname: foonathan-memory-vendor + workspace_tarball: + - 'git ros-humble-foonathan-memory-vendor_1.2.0.orig.tar.gz' + geometry-msgs: + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-geometry-msgs_4.2.3.orig.tar.gz' + gmock-vendor: + localname: googletest + workspace_tarball: + - 'git ros-humble-gmock-vendor_1.10.9004.orig.tar.gz' + gtest-vendor: + localname: googletest + workspace_tarball: + - 'git ros-humble-gtest-vendor_1.10.9004.orig.tar.gz' + launch: + PV: 1.0.4 + localname: launch + workspace_tarball: + - 'git ros-humble-launch_1.0.4.orig.tar.gz' + launch-ros: + PV: 0.19.4 + localname: launch-ros + workspace_tarball: + - 'git ros-humble-launch-ros_0.19.4.orig.tar.gz' + launch-testing: + PV: 1.0.4 + localname: launch + workspace_tarball: + - 'git ros-humble-launch-testing_1.0.4.orig.tar.gz' + launch-testing-ros: + PV: 0.19.4 + localname: launch-ros + workspace_tarball: + - 'git ros-humble-launch-testing-ros_0.19.4.orig.tar.gz' + launch-xml: + PV: 1.0.4 + localname: launch + workspace_tarball: + - 'git ros-humble-launch-xml_1.0.4.orig.tar.gz' + launch-yaml: + PV: 1.0.4 + localname: launch + workspace_tarball: + - 'git ros-humble-launch-yaml_1.0.4.orig.tar.gz' + libstatistics-collector: + PV: 1.3.1 + localname: libstatistics-collector + workspace_tarball: + - 'git ros-humble-libstatistics-collector_1.3.1.orig.tar.gz' + libyaml-vendor: + localname: libyaml-vendor + workspace_tarball: + - 'git ros-humble-libyaml-vendor_1.2.2.orig.tar.gz' + lifecycle-msgs: + localname: rcl-interfaces + workspace_tarball: + - 'git ros-humble-lifecycle-msgs_1.2.1.orig.tar.gz' + nav-msgs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-nav-msgs_4.2.3.orig.tar.gz' + osrf-pycommon: + localname: osrf-pycommon + workspace_tarball: + - 'git ros-humble-osrf-pycommon_2.0.2.orig.tar.gz' + pluginlib: + localname: pluginlib + workspace_tarball: + - 'git ros-humble-pluginlib_5.1.0.orig.tar.gz' + pybind11-vendor: + PV: 2.4.2 + localname: pybind11-vendor + workspace_tarball: + - 'git ros-humble-pybind11-vendor_2.4.2.orig.tar.gz' + python-cmake-module: + localname: python-cmake-module + workspace_tarball: + - 'git ros-humble-python-cmake-module_0.10.0.orig.tar.gz' + python3-rosdistro: + PV: 0.9.0 + localname: python3-rosdistro + workspace_tarball: + - 'git 0.9.0.tar.gz' + rcl: + PV: 5.3.3 + localname: rcl + workspace_tarball: + - 'git ros-humble-rcl_5.3.3.orig.tar.gz' + rcl-action: + PV: 5.3.3 + localname: rcl + workspace_tarball: + - 'git ros-humble-rcl-action_5.3.3.orig.tar.gz' + rcl-interfaces: + localname: rcl-interfaces + workspace_tarball: + - 'git ros-humble-rcl-interfaces_1.2.1.orig.tar.gz' + rcl-lifecycle: + PV: 5.3.3 + localname: rcl + workspace_tarball: + - 'git ros-humble-rcl-lifecycle_5.3.3.orig.tar.gz' + rcl-logging-spdlog: + localname: rcl_logging + workspace_tarball: + - 'git ros-humble-rcl-logging-spdlog_2.3.1.orig.tar.gz' + rcl-logging-noop: + localname: rcl_logging + workspace_tarball: + - 'git ros-humble-rcl-logging-noop_2.3.1.orig.tar.gz' + rcl-logging-interface: + localname: rcl_logging + workspace_tarball: + - 'git ros-humble-rcl-logging-interface_2.3.1.orig.tar.gz' + rcl-yaml-param-parser: + PV: 5.3.3 + localname: rcl + workspace_tarball: + - 'git ros-humble-rcl-yaml-param-parser_5.3.3.orig.tar.gz' + rclcpp: + PV: 16.0.4 + localname: rclcpp + workspace_tarball: + - 'git ros-humble-rclcpp_16.0.4.orig.tar.gz' + rclcpp-components: + PV: 16.0.4 + localname: rclcpp + workspace_tarball: + - 'git ros-humble-rclcpp-components_16.0.4.orig.tar.gz' + rclcpp-lifecycle: + PV: 16.0.4 + localname: rclcpp + workspace_tarball: + - 'git ros-humble-rclcpp-lifecycle_16.0.4.orig.tar.gz' + cascade-lifecycle-msgs: + PV: 1.0.2 + localname: cascade_lifecycle + workspace_tarball: + - 'git ros-humble-cascade-lifecycle-msgs_1.0.2.orig.tar.gz' + rclcpp-cascade-lifecycle: + PV: 1.0.2 + localname: cascade_lifecycle + workspace_tarball: + - 'git ros-humble-rclcpp-cascade-lifecycle_1.0.2.orig.tar.gz' + rclpy-message-converter: + localname: rospy_message_converter + workspace_tarball: + - 'git ros-humble-rclpy-message-converter_2.0.1.orig.tar.gz' + rclpy-message-converter-msgs: + PV: 2.0.1 + localname: rospy_message_converter + workspace_tarball: + - 'git ros-humble-rclpy-message-converter-msgs_2.0.1.orig.tar.gz' + rclpy: + PV: 3.3.8 + localname: rclpy + workspace_tarball: + - 'git ros-humble-rclpy_3.3.8.orig.tar.gz' + rcpputils: + PV: 2.4.1 + localname: rcpputils + workspace_tarball: + - 'git ros-humble-rcpputils_2.4.1.orig.tar.gz' + rcutils: + PV: 5.1.3 + localname: rcutils + workspace_tarball: + - 'git ros-humble-rcutils_5.1.3.orig.tar.gz' + rmw: + localname: rmw + workspace_tarball: + - 'git ros-humble-rmw_6.1.1.orig.tar.gz' + rmw-connextdds: + localname: rmw-connextdds + workspace_tarball: + - 'git ros-humble-rmw-connextdds_0.11.1.orig.tar.gz' + rmw-connextdds-common: + localname: rmw-connextdds + workspace_tarball: + - 'git ros-humble-rmw-connextdds-common_0.11.1.orig.tar.gz' + rmw-cyclonedds-cpp: + localname: rmw_cyclonedds + workspace_tarball: + - 'git ros-humble-rmw-cyclonedds-cpp_1.3.4.orig.tar.gz' + rmw-dds-common: + localname: rmw-dds-common + workspace_tarball: + - 'git ros-humble-rmw-dds-common_1.6.0.orig.tar.gz' + rmw-fastrtps-cpp: + localname: rmw_fastrtps + workspace_tarball: + - 'git ros-humble-rmw-fastrtps-cpp_6.2.2.orig.tar.gz' + rmw-fastrtps-dynamic-cpp: + localname: rmw_fastrtps + workspace_tarball: + - 'git ros-humble-rmw-fastrtps-dynamic-cpp_6.2.2.orig.tar.gz' + rmw-fastrtps-shared-cpp: + localname: rmw_fastrtps + workspace_tarball: + - 'git ros-humble-rmw-fastrtps-shared-cpp_6.2.2.orig.tar.gz' + rmw-implementation: + PV: 2.8.2 + localname: rmw-implementation + workspace_tarball: + - 'git ros-humble-rmw-implementation_2.8.2.orig.tar.gz' + rmw-implementation-cmake: + localname: rmw + workspace_tarball: + - 'git ros-humble-rmw-implementation-cmake_6.1.1.orig.tar.gz' + ros-core: + localname: variants + workspace_tarball: + - 'git ros-humble-ros-core_0.10.0.orig.tar.gz' + ros-environment: + localname: ros-environment + workspace_tarball: + - 'git ros-humble-ros-environment_3.2.2.orig.tar.gz' + ros-workspace: + localname: ros-workspace + workspace_tarball: + - 'git ros-humble-ros-workspace_1.0.2.orig.tar.gz' + ros2action: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2action_0.18.6.orig.tar.gz' + ros2cli: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2cli_0.18.6.orig.tar.gz' + ros2cli-common-extensions: + localname: ros2cli-common-extensions + workspace_tarball: + - 'git ros-humble-ros2cli-common-extensions_0.1.1.orig.tar.gz' + ros2component: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2component_0.18.6.orig.tar.gz' + ros2doctor: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2doctor_0.18.6.orig.tar.gz' + ros2interface: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2interface_0.18.6.orig.tar.gz' + ros2launch: + PV: 0.19.4 + localname: launch-ros + workspace_tarball: + - 'git ros-humble-ros2launch_0.19.4.orig.tar.gz' + ros2lifecycle: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2lifecycle_0.18.6.orig.tar.gz' + ros2multicast: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2multicast_0.18.6.orig.tar.gz' + ros2node: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2node_0.18.6.orig.tar.gz' + ros2param: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2param_0.18.6.orig.tar.gz' + ros2pkg: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2pkg_0.18.6.orig.tar.gz' + ros2run: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2run_0.18.6.orig.tar.gz' + ros2service: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2service_0.18.6.orig.tar.gz' + ros2topic: + PV: 0.18.6 + localname: ros2cli + workspace_tarball: + - 'git ros-humble-ros2topic_0.18.6.orig.tar.gz' + rosgraph-msgs: + localname: rcl-interfaces + workspace_tarball: + - 'git ros-humble-rosgraph-msgs_1.2.1.orig.tar.gz' + rosidl-adapter: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-adapter_3.1.4.orig.tar.gz' + rosidl-cli: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-cli_3.1.4.orig.tar.gz' + rosidl-cmake: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-cmake_3.1.4.orig.tar.gz' + rosidl-default-generators: + localname: rosidl_defaults + workspace_tarball: + - 'git ros-humble-rosidl-default-generators_1.2.0.orig.tar.gz' + rosidl-default-runtime: + localname: rosidl_defaults + workspace_tarball: + - 'git ros-humble-rosidl-default-runtime_1.2.0.orig.tar.gz' + rosidl-generator-c: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-generator-c_3.1.4.orig.tar.gz' + rosidl-generator-cpp: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-generator-cpp_3.1.4.orig.tar.gz' + rosidl-generator-dds-idl: + localname: rosidl_dds + workspace_tarball: + - 'git ros-humble-rosidl-generator-dds-idl_0.8.1.orig.tar.gz' + rosidl-generator-py: + localname: rosidl_python + workspace_tarball: + - 'git ros-humble-rosidl-generator-py_0.14.4.orig.tar.gz' + rosidl-parser: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-parser_3.1.4.orig.tar.gz' + rosidl-runtime-c: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-runtime-c_3.1.4.orig.tar.gz' + rosidl-runtime-cpp: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-runtime-cpp_3.1.4.orig.tar.gz' + rosidl-runtime-py: + localname: rosidl-runtime-py + workspace_tarball: + - 'git ros-humble-rosidl-runtime-py_0.9.3.orig.tar.gz' + rosidl-typesupport-c: + localname: rosidl_typesupport + workspace_tarball: + - 'git ros-humble-rosidl-typesupport-c_2.0.0.orig.tar.gz' + rti-connext-dds-cmake-module: + localname: rmw-connextdds + workspace_tarball: + - 'git ros-humble-rti-connext-dds-cmake-module_0.11.1.orig.tar.gz' + rosidl-typesupport-cpp: + localname: rosidl_typesupport + workspace_tarball: + - 'git ros-humble-rosidl-typesupport-cpp_2.0.0.orig.tar.gz' + rosidl-typesupport-fastrtps-c: + localname: rosidl_typesupport_fastrtps + workspace_tarball: + - 'git ros-humble-rosidl-typesupport-fastrtps-c_2.2.0.orig.tar.gz' + rosidl-typesupport-fastrtps-cpp: + localname: rosidl_typesupport_fastrtps + workspace_tarball: + - 'git ros-humble-rosidl-typesupport-fastrtps-cpp_2.2.0.orig.tar.gz' + rosidl-typesupport-interface: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-typesupport-interface_3.1.4.orig.tar.gz' + rosidl-typesupport-introspection-c: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-typesupport-introspection-c_3.1.4.orig.tar.gz' + rosidl-typesupport-introspection-cpp: + localname: rosidl + workspace_tarball: + - 'git ros-humble-rosidl-typesupport-introspection-cpp_3.1.4.orig.tar.gz' + rpyutils: + localname: rpyutils + workspace_tarball: + - 'git ros-humble-rpyutils_0.2.1.orig.tar.gz' + sensor-msgs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-sensor-msgs_4.2.3.orig.tar.gz' + shape-msgs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-shape-msgs_4.2.3.orig.tar.gz' + spdlog-vendor: + PV: 1.3.1 + localname: spdlog-vendor + workspace_tarball: + - 'git ros-humble-spdlog-vendor_1.3.1.orig.tar.gz' + sros2: + localname: sros2 + workspace_tarball: + - 'git ros-humble-sros2_0.10.4.orig.tar.gz' + sros2-cmake: + localname: sros2 + workspace_tarball: + - 'git ros-humble-sros2-cmake_0.10.4.orig.tar.gz' + statistics-msgs: + localname: rcl-interfaces + workspace_tarball: + - 'git ros-humble-statistics-msgs_1.2.1.orig.tar.gz' + std-msgs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-std-msgs_4.2.3.orig.tar.gz' + std-srvs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-std-srvs_4.2.3.orig.tar.gz' + stereo-msgs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-stereo-msgs_4.2.3.orig.tar.gz' + tinyxml2-vendor: + localname: tinyxml2-vendor + workspace_tarball: + - 'git ros-humble-tinyxml2-vendor_0.7.5.orig.tar.gz' + tracetools: + localname: ros2_tracing + workspace_tarball: + - 'git ros-humble-tracetools_4.1.1.orig.tar.gz' + trajectory-msgs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-trajectory-msgs_4.2.3.orig.tar.gz' + unique-identifier-msgs: + localname: unique-identifier-msgs + workspace_tarball: + - 'git ros-humble-unique-identifier-msgs_2.2.1.orig.tar.gz' + visualization-msgs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-visualization-msgs_4.2.3.orig.tar.gz' + demo-nodes-cpp: + PV: 0.20.3 + localname: demos + workspace_tarball: + - 'git ros-humble-demo-nodes-cpp_0.20.3.orig.tar.gz' + example-interfaces: + localname: example-interfaces + workspace_tarball: + - 'git ros-humble-example-interfaces_0.9.3.orig.tar.gz' + ompl: + PV: 1.6.0 + localname: ompl + workspace_tarball: + - 'git ros-humble-ompl_1.6.0.orig.tar.gz' + libflann: + PV: 1.9.2 + localname: flann + workspace_tarball: + - 'git 1.9.2.tar.gz' + qhull: + PV: 2020.2 + localname: qhull + workspace_tarball: + - 'qhull-2020.2 qhull-2020-src-8.0.2.tgz' + map-msgs: + localname: navigation_msgs + workspace_tarball: + - 'git ros-humble-map-msgs_2.1.0.orig.tar.gz' + pcl-msgs: + localname: pcl-msgs + workspace_tarball: + - 'git ros-humble-pcl-msgs_1.0.0.orig.tar.gz' + geometry-msgs: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-geometry-msgs_4.2.3.orig.tar.gz' + angles: + localname: angles + workspace_tarball: + - 'git ros-humble-angles_1.15.0.orig.tar.gz' + bond: + localname: bond-core + workspace_tarball: + - 'git ros-humble-bond_3.0.2.orig.tar.gz' + cartographer: + localname: cartographer + workspace_tarball: + - 'git ros-humble-cartographer_2.0.9002.orig.tar.gz' + cartographer-ros: + localname: cartographer-ros + workspace_tarball: + - 'git ros-humble-cartographer-ros_2.0.9000.orig.tar.gz' + cartographer-ros-msgs: + localname: cartographer-ros + workspace_tarball: + - 'git ros-humble-cartographer-ros-msgs_2.0.9000.orig.tar.gz' + pcl-ros: + localname: perception-pcl + workspace_tarball: + - 'git ros-humble-pcl-ros_2.4.0.orig.tar.gz' + pcl: + PV: 1.12.1 + localname: pcl + workspace_tarball: + - 'git pcl-1.12.1.tar.gz' + pcl-conversions: + localname: perception-pcl + workspace_tarball: + - 'git ros-humble-pcl-conversions_2.4.0.orig.tar.gz' + perception-pcl: + localname: perception-pcl + workspace_tarball: + - 'git ros-humble-perception-pcl_2.4.0.orig.tar.gz' + message-filters: + PV: 4.3.3 + localname: message-filters + workspace_tarball: + - 'git ros-humble-message-filters_4.3.3.orig.tar.gz' + urdfdom-headers: + localname: urdfdom-headers + workspace_tarball: + - 'git ros-humble-urdfdom-headers_1.0.6.orig.tar.gz' + urdfdom: + localname: urdfdom + workspace_tarball: + - 'git ros-humble-urdfdom_3.0.2.orig.tar.gz' + urdf: + localname: urdf + workspace_tarball: + - 'git ros-humble-urdf_2.6.0.orig.tar.gz' + tinyxml-vendor: + localname: tinyxml-vendor + workspace_tarball: + - 'git ros-humble-tinyxml-vendor_0.8.3.orig.tar.gz' + orocos-kdl: + PV: 1.5.1 + localname: orocos-kdl + workspace_tarball: + - 'git v1.5.1.tar.gz' + orocos-kdl-vendor: + localname: orocos-kdl-vendor + workspace_tarball: + - 'git ros-humble-orocos-kdl-vendor_0.2.5.orig.tar.gz' + kdl-parser: + PV: 2.6.4 + localname: kdl-parser + workspace_tarball: + - 'git ros-humble-kdl-parser_2.6.4.orig.tar.gz' + eigen3-cmake-module: + localname: eigen3-cmake-module + workspace_tarball: + - 'git ros-humble-eigen3-cmake-module_0.1.1.orig.tar.gz' + tf2: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2_0.25.2.orig.tar.gz' + tf2-ros-py: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-ros-py_0.25.2.orig.tar.gz' + bullet: + PV: 2.87 + localname: bullet + workspace_tarball: + - 'git 2.87.tar.gz' + tf2-bullet: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-bullet_0.25.2.orig.tar.gz' + tf2-eigen: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-eigen_0.25.2.orig.tar.gz' + tf2-eigen-kdl: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-eigen-kdl_0.25.2.orig.tar.gz' + sensor-msgs-py: + PV: 4.2.3 + localname: common-interfaces + workspace_tarball: + - 'git ros-humble-sensor-msgs-py_4.2.3.orig.tar.gz' + tf2-geometry-msgs: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-geometry-msgs_0.25.2.orig.tar.gz' + tf2-ros: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-ros_0.25.2.orig.tar.gz' + tf2-msgs: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-msgs_0.25.2.orig.tar.gz' + tf2-py: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-py_0.25.2.orig.tar.gz' + tf2-kdl: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-kdl_0.25.2.orig.tar.gz' + tf2-sensor-msgs: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-sensor-msgs_0.25.2.orig.tar.gz' + tf2-tools: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-tf2-tools_0.25.2.orig.tar.gz' + rclcpp-action: + PV: 16.0.4 + localname: rclcpp + workspace_tarball: + - 'git ros-humble-rclcpp-action_16.0.4.orig.tar.gz' + ament-cmake-auto: + PV: 1.3.4 + localname: ament-cmake + workspace_tarball: + - 'git ros-humble-ament-cmake-auto_1.3.4.orig.tar.gz' + geometry2: + PV: 0.25.2 + localname: geometry2 + workspace_tarball: + - 'git ros-humble-geometry2_0.25.2.orig.tar.gz' + yaml-cpp-vendor: + PV: 8.0.2 + localname: yaml-cpp-vendor + workspace_tarball: + - 'git ros-humble-yaml-cpp-vendor_8.0.2.orig.tar.gz' + laser-geometry: + localname: laser-geometry + workspace_tarball: + - 'git ros-humble-laser-geometry_2.4.0.orig.tar.gz' + test-msgs: + localname: rcl-interfaces + workspace_tarball: + - 'git ros-humble-test-msgs_1.2.1.orig.tar.gz' + test-interface-files: + localname: test-interface-files + workspace_tarball: + - 'git ros-humble-test-interface-files_0.9.1.orig.tar.gz' + launch-testing-ament-cmake: + PV: 1.0.4 + localname: launch + workspace_tarball: + - 'git ros-humble-launch-testing-ament-cmake_1.0.4.orig.tar.gz' + nav2-util: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-util_1.1.9.orig.tar.gz' + nav2-msgs: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-msgs_1.1.9.orig.tar.gz' + nav2-common: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-common_1.1.9.orig.tar.gz' + nav2-voxel-grid: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-voxel-grid_1.1.9.orig.tar.gz' + nav2-costmap-2d: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-costmap-2d_1.1.9.orig.tar.gz' + nav2-map-server: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-map-server_1.1.9.orig.tar.gz' + nav2-lifecycle-manager: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-lifecycle-manager_1.1.9.orig.tar.gz' + nav2-core: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-core_1.1.9.orig.tar.gz' + nav2-bringup: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-bringup_1.1.9.orig.tar.gz' + nav2-amcl: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-amcl_1.1.9.orig.tar.gz' + nav2-behavior-tree: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-behavior-tree_1.1.9.orig.tar.gz' + nav2-bt-navigator: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-bt-navigator_1.1.9.orig.tar.gz' + nav2-controller: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-controller_1.1.9.orig.tar.gz' + nav2-navfn-planner: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-navfn-planner_1.1.9.orig.tar.gz' + nav2-planner: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-planner_1.1.9.orig.tar.gz' + nav2-regulated-pure-pursuit-controller: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-regulated-pure-pursuit-controller_1.1.9.orig.tar.gz' + nav2-smac-planner: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-smac-planner_1.1.9.orig.tar.gz' + nav2-waypoint-follower: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-waypoint-follower_1.1.9.orig.tar.gz' + nav-2d-msgs: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav-2d-msgs_1.1.9.orig.tar.gz' + nav-2d-utils: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav-2d-utils_1.1.9.orig.tar.gz' + nav2-behaviors: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-behaviors_1.1.9.orig.tar.gz' + nav2-collision-monitor: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-collision-monitor_1.1.9.orig.tar.gz' + nav2-constrained-smoother: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-constrained-smoother_1.1.9.orig.tar.gz' + nav2-rotation-shim-controller: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-rotation-shim-controller_1.1.9.orig.tar.gz' + nav2-simple-commander: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-simple-commander_1.1.9.orig.tar.gz' + nav2-smoother: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-smoother_1.1.9.orig.tar.gz' + nav2-system-tests: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-system-tests_1.1.9.orig.tar.gz' + nav2-theta-star-planner: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-theta-star-planner_1.1.9.orig.tar.gz' + nav2-velocity-smoother: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-velocity-smoother_1.1.9.orig.tar.gz' + costmap-queue: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-costmap-queue_1.1.9.orig.tar.gz' + dwb-core: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-dwb-core_1.1.9.orig.tar.gz' + dwb-critics: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-dwb-critics_1.1.9.orig.tar.gz' + dwb-msgs: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-dwb-msgs_1.1.9.orig.tar.gz' + dwb-plugins: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-dwb-plugins_1.1.9.orig.tar.gz' + nav2-dwb-controller: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-nav2-dwb-controller_1.1.9.orig.tar.gz' + navigation2: + PV: 1.1.9 + localname: navigation2 + workspace_tarball: + - 'git ros-humble-navigation2_1.1.9.orig.tar.gz' + behaviortree-cpp-v3: + PV: 3.8.3 + localname: BehaviorTree.CPP + workspace_tarball: + - 'git ros-humble-behaviortree-cpp-v3_3.8.3.orig.tar.gz' + cppzmq: + PV: v4.9.0 + localname: cppzmq + workspace_tarball: + - 'git v4.9.0.tar.gz' + diagnostic-aggregator: + PV: 3.1.2 + localname: diagnostics + workspace_tarball: + - 'git ros-humble-diagnostic-aggregator_3.1.2.orig.tar.gz' + diagnostic-updater: + PV: 3.1.2 + localname: diagnostics + workspace_tarball: + - 'git ros-humble-diagnostic-updater_3.1.2.orig.tar.gz' + self-test: + PV: 3.1.2 + localname: diagnostics + workspace_tarball: + - 'git ros-humble-self-test_3.1.2.orig.tar.gz' + image-geometry: + localname: vision-opencv + workspace_tarball: + - 'git ros-humble-image-geometry_3.2.1.orig.tar.gz' + teleop-twist-joy: + localname: teleop-twist-joy + workspace_tarball: + - 'git ros-humble-teleop-twist-joy_2.4.3.orig.tar.gz' + teleop-twist-keyboard: + localname: teleop-twist-keyboard + workspace_tarball: + - 'git ros-humble-teleop-twist-keyboard_2.3.2.orig.tar.gz' + interactive-markers: + localname: interactive-markers + workspace_tarball: + - 'git ros-humble-interactive-markers_2.3.2.orig.tar.gz' + cv-bridge: + localname: vision-opencv + workspace_tarball: + - 'git ros-humble-cv-bridge_3.2.1.orig.tar.gz' + vision-opencv: + localname: vision-opencv + workspace_tarball: + - 'git ros-humble-vision-opencv_3.2.1.orig.tar.gz' + slam-toolbox: + PV: 2.6.4 + localname: slam-toolbox + workspace_tarball: + - 'git ros-humble-slam-toolbox_2.6.4.orig.tar.gz' + qpoases-vendor: + localname: qpoases-vendor + workspace_tarball: + - 'git ros-humble-qpoases-vendor_3.2.3.orig.tar.gz' + libexif: + PV: 0.6.24 + localname: oee_archive + workspace_tarball: + - 'libexif libexif/libexif-0.6.24.tar.bz2' + libuvc: + localname: libuvc + workspace_tarball: + - 'git v0.0.7.tar.gz' + camera-calibration-parsers: + PV: 3.1.5 + localname: image_common + workspace_tarball: + - 'git ros-humble-camera-calibration-parsers_3.1.5.orig.tar.gz' + camera-info-manager: + PV: 3.1.5 + localname: image_common + workspace_tarball: + - 'git ros-humble-camera-info-manager_3.1.5.orig.tar.gz' + image-common: + PV: 3.1.5 + localname: image_common + workspace_tarball: + - 'git ros-humble-image-common_3.1.5.orig.tar.gz' + v4l2-camera: + localname: ros2_v4l2_camera + workspace_tarball: + - 'git ros-humble-v4l2-camera_0.6.0.orig.tar.gz' + image-transport: + PV: 3.1.5 + localname: image_common + workspace_tarball: + - 'git ros-humble-image-transport_3.1.5.orig.tar.gz' + image-transport-plugins: + localname: image-transport-plugins + workspace_tarball: + - 'git ros-humble-image-transport-plugins_2.5.0.orig.tar.gz' + compressed-depth-image-transport: + localname: image-transport-plugins + workspace_tarball: + - 'git ros-humble-compressed-depth-image-transport_2.5.0.orig.tar.gz' + compressed-image-transport: + localname: image-transport-plugins + workspace_tarball: + - 'git ros-humble-compressed-image-transport_2.5.0.orig.tar.gz' + theora-image-transport: + localname: image-transport-plugins + workspace_tarball: + - 'git ros-humble-theora-image-transport_2.5.0.orig.tar.gz' + iceoryx-hoofs: + PV: 2.0.3 + localname: iceoryx + workspace_tarball: + - 'git ros-humble-iceoryx-hoofs_2.0.3.orig.tar.gz' + iceoryx-posh: + PV: 2.0.3 + localname: iceoryx + workspace_tarball: + - 'git ros-humble-iceoryx-posh_2.0.3.orig.tar.gz' + - 'git/cpptoml-upstream cpptoml-0.1.1.tar.gz' + iceoryx-binding-c: + PV: 2.0.3 + localname: iceoryx + workspace_tarball: + - 'git ros-humble-iceoryx-binding-c_2.0.3.orig.tar.gz' + urdf-parser-plugin: + localname: urdf + workspace_tarball: + - 'git ros-humble-urdf-parser-plugin_2.6.0.orig.tar.gz' + rosbag2-storage: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-rosbag2-storage_0.15.5.orig.tar.gz' + rosbag2-storage-default-plugins: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-rosbag2-storage-default-plugins_0.15.5.orig.tar.gz' + rosbag2-storage-mcap: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-rosbag2-storage-mcap_0.15.5.orig.tar.gz' + mcap-vendor: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-mcap-vendor_0.15.5.orig.tar.gz' + zstd-vendor: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-zstd-vendor_0.15.5.orig.tar.gz' + sqlite3-vendor: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-sqlite3-vendor_0.15.5.orig.tar.gz' + keyboard-handler: + localname: keyboard-handler + workspace_tarball: + - 'git ros-humble-keyboard-handler_0.0.5.orig.tar.gz' + rosbag2-cpp: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-rosbag2-cpp_0.15.5.orig.tar.gz' + rosbag2-interfaces: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-rosbag2-interfaces_0.15.5.orig.tar.gz' + rosbag2-compression: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-rosbag2-compression_0.15.5.orig.tar.gz' + rosbag2-compression-zstd: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-rosbag2-compression-zstd_0.15.5.orig.tar.gz' + rosbag2-transport: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-rosbag2-transport_0.15.5.orig.tar.gz' + rosbag2-py: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-rosbag2-py_0.15.5.orig.tar.gz' + ros2bag: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-ros2bag_0.15.5.orig.tar.gz' + rosbag2: + PV: 0.15.5 + localname: rosbag2 + workspace_tarball: + - 'git ros-humble-rosbag2_0.15.5.orig.tar.gz' + robot-state-publisher: + localname: robot-state-publisher + workspace_tarball: + - 'git ros-humble-robot-state-publisher_3.0.2.orig.tar.gz' + smclib: + localname: bond-core + workspace_tarball: + - 'git ros-humble-smclib_3.0.2.orig.tar.gz' + bond-core: + localname: bond-core + workspace_tarball: + - 'git ros-humble-bond-core_3.0.2.orig.tar.gz' + bondcpp: + localname: bond-core + workspace_tarball: + - 'git ros-humble-bondcpp_3.0.2.orig.tar.gz' + ackermann-msgs: + localname: ackermann_msgs + workspace_tarball: + - 'git ros-humble-ackermann-msgs_2.0.2.orig.tar.gz' + libg2o: + localname: libg2o-release + workspace_tarball: + - 'git ros-humble-libg2o_2020.5.29.orig.tar.gz' + image-publisher: + localname: image_pipeline + workspace_tarball: + - 'git ros-humble-image-publisher_3.0.0.orig.tar.gz' + magic-enum: + PV: 0.8.2 + localname: magic_enum + workspace_tarball: + - 'git ros-humble-magic-enum_0.8.2.orig.tar.gz' + hls-lfcd-lds-driver: + localname: hls_lfcd_lds_driver + workspace_tarball: + - 'git ros-humble-hls-lfcd-lds-driver_2.0.4.orig.tar.gz' + joint-state-publisher: + localname: joint_state_publisher + workspace_tarball: + - 'git ros-humble-joint-state-publisher_2.3.0.orig.tar.gz' + geographiclib: + localname: oee_archive + workspace_tarball: + - 'GeographicLib-1.48 geographiclib/GeographicLib-1.48.tar.gz' + geographic-msgs: + PV: 1.0.5 + localname: geographic_info + workspace_tarball: + - 'git ros-humble-geographic-msgs_1.0.5.orig.tar.gz' + robot-localization: + localname: oee_archive + workspace_tarball: + - 'git robot-localization/robot_localization-release-release-humble-robot_localization-3.3.1-2.tar.gz' diff --git a/.oebuild/platform/d2000.yaml b/.oebuild/platform/d2000.yaml new file mode 100644 index 0000000000000000000000000000000000000000..4778102f28f1c562587dd1389c706c7d62cfc87c --- /dev/null +++ b/.oebuild/platform/d2000.yaml @@ -0,0 +1,8 @@ +type: platform + +machine: d2000 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +layers: + - yocto-meta-openeuler/bsp/meta-phytium diff --git a/.oebuild/platform/ft2000-4.yaml b/.oebuild/platform/ft2000-4.yaml new file mode 100644 index 0000000000000000000000000000000000000000..afaee86f89787cf6837c0e27cd4feca5ccdbc5f8 --- /dev/null +++ b/.oebuild/platform/ft2000-4.yaml @@ -0,0 +1,9 @@ +type: platform + +machine: ft2000-4 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +layers: + - yocto-meta-openeuler/bsp/meta-phytium + diff --git a/.oebuild/platform/hi3093.yaml b/.oebuild/platform/hi3093.yaml new file mode 100644 index 0000000000000000000000000000000000000000..6b4ad642eccfbfc1dc1173cbe09537fba26d9e4c --- /dev/null +++ b/.oebuild/platform/hi3093.yaml @@ -0,0 +1,8 @@ +type: platform + +machine: hi3093 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +layers: + - yocto-meta-openeuler/bsp/meta-hisilicon diff --git a/.oebuild/platform/hieulerpi1.yaml b/.oebuild/platform/hieulerpi1.yaml new file mode 100644 index 0000000000000000000000000000000000000000..30043c7e2d7d817f9f3e809deeecd8ca896ce70b --- /dev/null +++ b/.oebuild/platform/hieulerpi1.yaml @@ -0,0 +1,10 @@ +type: platform + +machine: hieulerpi1 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +layers: + - yocto-meta-openeuler/bsp/meta-hisilicon + - yocto-meta-openembedded/meta-multimedia + diff --git a/.oebuild/platform/myd-ym62x.yaml b/.oebuild/platform/myd-ym62x.yaml new file mode 100644 index 0000000000000000000000000000000000000000..05750de4397c3c8ce665473fefa116af813462d9 --- /dev/null +++ b/.oebuild/platform/myd-ym62x.yaml @@ -0,0 +1,25 @@ +type: platform + +machine: myd-ym62x + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +repos: + yocto-meta-ti: + url: https://git.yoctoproject.org/meta-ti.git + path: yocto-meta-ti + refspec: 09.00.00.006 + yocto-meta-arm: + url: https://git.yoctoproject.org/meta-arm.git + path: yocto-meta-arm + refspec: kirkstone + +layers: + - yocto-meta-ti/meta-ti-bsp + - yocto-meta-ti/meta-ti-extras + - yocto-meta-arm/meta-arm-toolchain + - yocto-meta-arm/meta-arm-bsp + - yocto-meta-arm/meta-arm + +local_conf: | + TCMODE = "default" \ No newline at end of file diff --git a/.oebuild/platform/myir-remi.yaml b/.oebuild/platform/myir-remi.yaml new file mode 100644 index 0000000000000000000000000000000000000000..4a789920aac1eff6104546b5302e08832901e0ce --- /dev/null +++ b/.oebuild/platform/myir-remi.yaml @@ -0,0 +1,14 @@ +type: platform + +machine: myir-remi + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +repos: + yocto-meta-renesas: + url: https://gitee.com/openeuler/yocto-meta-renesas.git + path: yocto-meta-renesas + refspec: dev_kirkstone + +layers: + - yocto-meta-renesas diff --git a/.oebuild/platform/ok-a40i.yaml b/.oebuild/platform/ok-a40i.yaml new file mode 100644 index 0000000000000000000000000000000000000000..95358363af5551e486abf01a97abdfc7f2c20acd --- /dev/null +++ b/.oebuild/platform/ok-a40i.yaml @@ -0,0 +1,23 @@ +type: platform + +machine: ok-a40i + +toolchain_type: EXTERNAL_TOOLCHAIN:arm + +repos: + yocto-meta-sunxi: + url: https://github.com/linux-sunxi/meta-sunxi.git + path: yocto-meta-sunxi + refspec: master + yocto-meta-arm: + url: https://git.yoctoproject.org/meta-arm.git + path: yocto-meta-arm + refspec: kirkstone + +layers: + - yocto-meta-arm/meta-arm + - yocto-meta-arm/meta-arm-toolchain + - yocto-meta-sunxi + +local_conf: | + PREFERRED_PROVIDER_virtual/kernel ?= "linux-openeuler" diff --git a/.oebuild/platform/ok3399.yaml b/.oebuild/platform/ok3399.yaml new file mode 100644 index 0000000000000000000000000000000000000000..70e26bf0365d118abaa414440610c81403a4ea6b --- /dev/null +++ b/.oebuild/platform/ok3399.yaml @@ -0,0 +1,17 @@ +type: platform + +machine: ok3399 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +repos: + yocto-meta-rockchip: + url: https://gitee.com/openeuler/yocto-meta-rockchip.git + path: yocto-meta-rockchip + refspec: dev_kirkstone + +layers: + - yocto-meta-rockchip + +local_conf: | + PREFERRED_PROVIDER_virtual/kernel ?= "linux-openeuler" diff --git a/.oebuild/platform/ok3568.yaml b/.oebuild/platform/ok3568.yaml new file mode 100644 index 0000000000000000000000000000000000000000..cf2cbd383b2e33dfbf46e3ca151992f4296b82bd --- /dev/null +++ b/.oebuild/platform/ok3568.yaml @@ -0,0 +1,17 @@ +type: platform + +machine: ok3568 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +repos: + yocto-meta-rockchip: + url: https://gitee.com/openeuler/yocto-meta-rockchip.git + path: yocto-meta-rockchip + refspec: dev_kirkstone + +layers: + - yocto-meta-rockchip + +local_conf: | + PREFERRED_PROVIDER_virtual/kernel ?= "linux-openeuler" diff --git a/.oebuild/platform/ok3588.yaml b/.oebuild/platform/ok3588.yaml new file mode 100644 index 0000000000000000000000000000000000000000..890a1e23f6dbc4a004d8e35695a0fbd9a9dbffc7 --- /dev/null +++ b/.oebuild/platform/ok3588.yaml @@ -0,0 +1,17 @@ +type: platform + +machine: ok3588 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +repos: + yocto-meta-rockchip: + url: https://gitee.com/openeuler/yocto-meta-rockchip.git + path: yocto-meta-rockchip + refspec: dev_kirkstone + +layers: + - yocto-meta-rockchip + +local_conf: | + PREFERRED_PROVIDER_virtual/kernel ?= "linux-openeuler" diff --git a/.oebuild/platform/orangepi4-lts.yaml b/.oebuild/platform/orangepi4-lts.yaml new file mode 100644 index 0000000000000000000000000000000000000000..d5cd42fed232d8aa84b77390130333268889753c --- /dev/null +++ b/.oebuild/platform/orangepi4-lts.yaml @@ -0,0 +1,14 @@ +type: platform + +machine: orangepi4-lts + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +repos: + yocto-meta-rockchip: + url: https://gitee.com/openeuler/yocto-meta-rockchip.git + path: yocto-meta-rockchip + refspec: dev_kirkstone + +layers: + - yocto-meta-rockchip diff --git a/.oebuild/platform/orangepi5.yaml b/.oebuild/platform/orangepi5.yaml new file mode 100644 index 0000000000000000000000000000000000000000..270efd8a6e717e36fe2726f69dac47ed6b1a8591 --- /dev/null +++ b/.oebuild/platform/orangepi5.yaml @@ -0,0 +1,14 @@ +type: platform + +machine: orangepi5 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +repos: + yocto-meta-rockchip: + url: https://gitee.com/openeuler/yocto-meta-rockchip.git + path: yocto-meta-rockchip + refspec: dev_kirkstone + +layers: + - yocto-meta-rockchip diff --git a/.oebuild/platform/phytiumpi.yaml b/.oebuild/platform/phytiumpi.yaml new file mode 100644 index 0000000000000000000000000000000000000000..8e85366d491ade3e814a74c6d2c7947d44304e96 --- /dev/null +++ b/.oebuild/platform/phytiumpi.yaml @@ -0,0 +1,8 @@ +type: platform + +machine: phytiumpi + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +layers: + - yocto-meta-openeuler/bsp/meta-phytium diff --git a/.oebuild/platform/qemu-aarch64.yaml b/.oebuild/platform/qemu-aarch64.yaml new file mode 100644 index 0000000000000000000000000000000000000000..c3c1f5eb6804a1df1b59c04fa3d82ac645072dcb --- /dev/null +++ b/.oebuild/platform/qemu-aarch64.yaml @@ -0,0 +1,5 @@ +type: platform + +machine: qemu-aarch64 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 diff --git a/.oebuild/platform/qemu-arm.yaml b/.oebuild/platform/qemu-arm.yaml new file mode 100644 index 0000000000000000000000000000000000000000..8e718c4b02eeb2f57ea619fb75095823d85c1507 --- /dev/null +++ b/.oebuild/platform/qemu-arm.yaml @@ -0,0 +1,5 @@ +type: platform + +machine: qemu-arm + +toolchain_type: EXTERNAL_TOOLCHAIN:arm diff --git a/.oebuild/platform/qemu-riscv64.yaml b/.oebuild/platform/qemu-riscv64.yaml new file mode 100644 index 0000000000000000000000000000000000000000..bb58e7c48e28874891dc34dce9a57619ec071098 --- /dev/null +++ b/.oebuild/platform/qemu-riscv64.yaml @@ -0,0 +1,5 @@ +type: platform + +machine: qemu-riscv64 + +toolchain_type: EXTERNAL_TOOLCHAIN:riscv64 diff --git a/.oebuild/platform/raspberrypi4-64.yaml b/.oebuild/platform/raspberrypi4-64.yaml new file mode 100644 index 0000000000000000000000000000000000000000..8fde96da68eef4331ad8da84b05c6489a96521c6 --- /dev/null +++ b/.oebuild/platform/raspberrypi4-64.yaml @@ -0,0 +1,14 @@ +type: platform + +machine: raspberrypi4-64 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +repos: + yocto-meta-raspberrypi: + url: https://gitee.com/openeuler/yocto-meta-raspberrypi.git + path: yocto-meta-raspberrypi + refspec: dev_kirkstone + +layers: + - yocto-meta-raspberrypi diff --git a/.oebuild/platform/roc-rk3588s-pc.yaml b/.oebuild/platform/roc-rk3588s-pc.yaml new file mode 100644 index 0000000000000000000000000000000000000000..7cd83786d3162e2a2f3437c9b067d07061480a4f --- /dev/null +++ b/.oebuild/platform/roc-rk3588s-pc.yaml @@ -0,0 +1,17 @@ +type: platform + +machine: roc-rk3588s-pc + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +repos: + yocto-meta-rockchip: + url: https://gitee.com/openeuler/yocto-meta-rockchip.git + path: yocto-meta-rockchip + refspec: dev_kirkstone + +layers: + - yocto-meta-rockchip + +local_conf: | + PREFERRED_PROVIDER_virtual/kernel ?= "linux-openeuler" diff --git a/.oebuild/platform/ryd-3568.yaml b/.oebuild/platform/ryd-3568.yaml new file mode 100644 index 0000000000000000000000000000000000000000..54706b930b77db722c8eb646dc91a8af59e3aa92 --- /dev/null +++ b/.oebuild/platform/ryd-3568.yaml @@ -0,0 +1,14 @@ +type: platform + +machine: ryd-3568 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +repos: + yocto-meta-rockchip: + url: https://gitee.com/openeuler/yocto-meta-rockchip.git + path: yocto-meta-rockchip + refspec: dev_kirkstone + +layers: + - yocto-meta-rockchip \ No newline at end of file diff --git a/.oebuild/platform/visionfive2.yaml b/.oebuild/platform/visionfive2.yaml new file mode 100644 index 0000000000000000000000000000000000000000..55a11c65ebf1b0a061bf39f698a198406e31980a --- /dev/null +++ b/.oebuild/platform/visionfive2.yaml @@ -0,0 +1,9 @@ +type: platform + +machine: starfive-dubhe + +toolchain_type: EXTERNAL_TOOLCHAIN:riscv64 + +layers: + - yocto-meta-openeuler/bsp/meta-visionfive2 + diff --git a/.oebuild/platform/x86-64.yaml b/.oebuild/platform/x86-64.yaml new file mode 100644 index 0000000000000000000000000000000000000000..0028fcf8128dd72093e3007d0a0a300f8bc14395 --- /dev/null +++ b/.oebuild/platform/x86-64.yaml @@ -0,0 +1,5 @@ +type: platform + +machine: generic-x86-64 + +toolchain_type: EXTERNAL_TOOLCHAIN:x86-64 diff --git a/.oebuild/prebuilt_tool/README.md b/.oebuild/prebuilt_tool/README.md new file mode 100644 index 0000000000000000000000000000000000000000..5fe502099fb13ef6878481701bef4097a840884e --- /dev/null +++ b/.oebuild/prebuilt_tool/README.md @@ -0,0 +1,28 @@ +# ../samples/prebuilt_tool.yaml + +#### 介绍 + +使用 `oebuild prebuilt_tool.yaml` 将在 build/prebuilt_tool/tmp/deploy/sdk 目录中生成最新的预构建工具版本。 + + +# release.yaml + +### 介绍 + +此文件主要用于升级预构建工具版本,具体参数如下。 + +tag_name: 发行版标签 + +name: 发行版名称 + +body: 发行版描述 + +target_commitish: 标签关联的对应仓库分支 + +owner: 所属工作组 + +repo: gitee仓库名称 + + + + diff --git a/.oebuild/prebuilt_tool/release.yaml b/.oebuild/prebuilt_tool/release.yaml new file mode 100644 index 0000000000000000000000000000000000000000..e894b06e9655a23195e9c0d84bd95f09e00031b2 --- /dev/null +++ b/.oebuild/prebuilt_tool/release.yaml @@ -0,0 +1,8 @@ +tag_name: nativesdk-v0.1.2 +name: openEuler Embedded NativeSDK V0.1.2 +body: 1.此为预构建工具的v0.1.2版本。 + 2.请下载所有压缩包及merge_data.sh文件,其中23.09.sh结尾的压缩包为分割上传后的sdk安装文件,manifest为对应安装包列表文件。 + 3.下载完成后给merge_data.sh文件可执行权限后执行,即可获得对应的nativesdk安装执行sh文件,按照提示执行此文件即可。 +target_commitish: master +owner: openeuler +repo: yocto-meta-openeuler diff --git a/.oebuild/relies.yaml b/.oebuild/relies.yaml new file mode 100644 index 0000000000000000000000000000000000000000..3ca790736c49394c8c173118fd3c453e639ec7cd --- /dev/null +++ b/.oebuild/relies.yaml @@ -0,0 +1,443 @@ +# openEuler Embedded builds the full repository file that depends + +# This file lists all the dependencies involved in openEuler Embedded, +# and the check file of the file is suffixed with the same file name +# plus .sha256 under the same path, and it is recommended to verify the +# integrity of the file before using the file in a closed environment + +sha256_file: relies.yaml.sha256 + +# Please add back and refresh the SHA256 check file +relies: +- local_name: kernel-5.10 + remote_url: https://gitee.com/openeuler/kernel.git +- local_name: src-kernel-5.10 + remote_url: https://gitee.com/src-openeuler/kernel.git +- local_name: busybox + remote_url: https://gitee.com/src-openeuler/busybox.git +- local_name: dsoftbus_standard + remote_url: https://gitee.com/openeuler/dsoftbus_standard.git +- local_name: libboundscheck + remote_url: https://gitee.com/src-openeuler/libboundscheck.git +- local_name: cjson + remote_url: https://gitee.com/src-openeuler/cjson.git +- local_name: yocto-embedded-tools + remote_url: https://gitee.com/openeuler/yocto-embedded-tools.git +- local_name: embedded-ipc + remote_url: https://gitee.com/openeuler/embedded-ipc.git +- local_name: yocto-poky + remote_url: https://gitee.com/openeuler/yocto-poky.git +- local_name: yocto-pseudo + remote_url: https://gitee.com/src-openeuler/yocto-pseudo.git +- local_name: yocto-meta-openembedded + remote_url: https://gitee.com/openeuler/yocto-meta-openembedded.git +- local_name: yocto-meta-ros + remote_url: https://gitee.com/openeuler/yocto-meta-ros.git +- local_name: audit + remote_url: https://gitee.com/src-openeuler/audit.git +- local_name: cracklib + remote_url: https://gitee.com/src-openeuler/cracklib.git +- local_name: libcap-ng + remote_url: https://gitee.com/src-openeuler/libcap-ng.git +- local_name: libpwquality + remote_url: https://gitee.com/src-openeuler/libpwquality.git +- local_name: openssh + remote_url: https://gitee.com/src-openeuler/openssh.git +- local_name: libnsl2 + remote_url: https://gitee.com/src-openeuler/libnsl2.git +- local_name: openssl + remote_url: https://gitee.com/src-openeuler/openssl.git +- local_name: pam + remote_url: https://gitee.com/src-openeuler/pam.git +- local_name: shadow + remote_url: https://gitee.com/src-openeuler/shadow.git +- local_name: ncurses + remote_url: https://gitee.com/src-openeuler/ncurses.git +- local_name: bash + remote_url: https://gitee.com/src-openeuler/bash.git +- local_name: libtirpc + remote_url: https://gitee.com/src-openeuler/libtirpc.git +- local_name: grep + remote_url: https://gitee.com/src-openeuler/grep.git +- local_name: pcre + remote_url: https://gitee.com/src-openeuler/pcre.git +- local_name: less + remote_url: https://gitee.com/src-openeuler/less.git +- local_name: gzip + remote_url: https://gitee.com/src-openeuler/gzip.git +- local_name: xz + remote_url: https://gitee.com/src-openeuler/xz.git +- local_name: lzo + remote_url: https://gitee.com/src-openeuler/lzo.git +- local_name: lz4 + remote_url: https://gitee.com/src-openeuler/lz4.git +- local_name: bzip2 + remote_url: https://gitee.com/src-openeuler/bzip2.git +- local_name: sed + remote_url: https://gitee.com/src-openeuler/sed.git +- local_name: json-c + remote_url: https://gitee.com/src-openeuler/json-c.git +- local_name: ethtool + remote_url: https://gitee.com/src-openeuler/ethtool.git +- local_name: expat + remote_url: https://gitee.com/src-openeuler/expat.git +- local_name: acl + remote_url: https://gitee.com/src-openeuler/acl.git +- local_name: attr + remote_url: https://gitee.com/src-openeuler/attr.git +- local_name: readline + remote_url: https://gitee.com/src-openeuler/readline.git +- local_name: libaio + remote_url: https://gitee.com/src-openeuler/libaio.git +- local_name: libffi + remote_url: https://gitee.com/src-openeuler/libffi.git +- local_name: popt + remote_url: https://gitee.com/src-openeuler/popt.git +- local_name: binutils + remote_url: https://gitee.com/src-openeuler/binutils.git +- local_name: elfutils + remote_url: https://gitee.com/src-openeuler/elfutils.git +- local_name: kexec-tools + remote_url: https://gitee.com/src-openeuler/kexec-tools.git +- local_name: psmisc + remote_url: https://gitee.com/src-openeuler/psmisc.git +- local_name: squashfs-tools + remote_url: https://gitee.com/src-openeuler/squashfs-tools.git +- local_name: strace + remote_url: https://gitee.com/src-openeuler/strace.git +- local_name: util-linux + remote_url: https://gitee.com/src-openeuler/util-linux.git +- local_name: libsepol + remote_url: https://gitee.com/src-openeuler/libsepol.git +- local_name: libselinux + remote_url: https://gitee.com/src-openeuler/libselinux.git +- local_name: libsemanage + remote_url: https://gitee.com/src-openeuler/libsemanage.git +- local_name: policycoreutils + remote_url: https://gitee.com/src-openeuler/policycoreutils.git +- local_name: initscripts + remote_url: https://gitee.com/src-openeuler/initscripts.git +- local_name: libestr + remote_url: https://gitee.com/src-openeuler/libestr.git +- local_name: libfastjson + remote_url: https://gitee.com/src-openeuler/libfastjson.git +- local_name: logrotate + remote_url: https://gitee.com/src-openeuler/logrotate.git +- local_name: rsyslog + remote_url: https://gitee.com/src-openeuler/rsyslog.git +- local_name: cifs-utils + remote_url: https://gitee.com/src-openeuler/cifs-utils.git +- local_name: dosfstools + remote_url: https://gitee.com/src-openeuler/dosfstools.git +- local_name: e2fsprogs + remote_url: https://gitee.com/src-openeuler/e2fsprogs.git +- local_name: iproute + remote_url: https://gitee.com/src-openeuler/iproute.git +- local_name: iptables + remote_url: https://gitee.com/src-openeuler/iptables.git +- local_name: dhcp + remote_url: https://gitee.com/src-openeuler/dhcp.git +- local_name: libhugetlbfs + remote_url: https://gitee.com/src-openeuler/libhugetlbfs.git +- local_name: libnl3 + remote_url: https://gitee.com/src-openeuler/libnl3.git +- local_name: libpcap + remote_url: https://gitee.com/src-openeuler/libpcap.git +- local_name: nfs-utils + remote_url: https://gitee.com/src-openeuler/nfs-utils.git +- local_name: rpcbind + remote_url: https://gitee.com/src-openeuler/rpcbind.git +- local_name: cronie + remote_url: https://gitee.com/src-openeuler/cronie.git +- local_name: kmod + remote_url: https://gitee.com/src-openeuler/kmod.git +- local_name: libusbx + remote_url: https://gitee.com/src-openeuler/libusbx.git +- local_name: libxml2 + remote_url: https://gitee.com/src-openeuler/libxml2.git +- local_name: lvm2 + remote_url: https://gitee.com/src-openeuler/lvm2.git +- local_name: quota + remote_url: https://gitee.com/src-openeuler/quota.git +- local_name: pciutils + remote_url: https://gitee.com/src-openeuler/pciutils.git +- local_name: procps-ng + remote_url: https://gitee.com/src-openeuler/procps-ng.git +- local_name: tzdata + remote_url: https://gitee.com/src-openeuler/tzdata.git +- local_name: glib2 + remote_url: https://gitee.com/src-openeuler/glib2.git +- local_name: raspberrypi-firmware + remote_url: https://gitee.com/src-openeuler/raspberrypi-firmware.git +- local_name: gmp + remote_url: https://gitee.com/src-openeuler/gmp.git +- local_name: gdb + remote_url: https://gitee.com/src-openeuler/gdb.git +- local_name: libmetal + remote_url: https://gitee.com/src-openeuler/libmetal.git +- local_name: OpenAMP + remote_url: https://gitee.com/src-openeuler/OpenAMP.git +- local_name: sysfsutils + remote_url: https://gitee.com/src-openeuler/sysfsutils.git +- local_name: tcl + remote_url: https://gitee.com/src-openeuler/tcl.git +- local_name: expect + remote_url: https://gitee.com/src-openeuler/expect.git +- local_name: jitterentropy-library + remote_url: https://gitee.com/src-openeuler/jitterentropy-library.git +- local_name: m4 + remote_url: https://gitee.com/src-openeuler/m4.git +- local_name: gdbm + remote_url: https://gitee.com/src-openeuler/gdbm.git +- local_name: libtool + remote_url: https://gitee.com/src-openeuler/libtool.git +- local_name: libidn2 + remote_url: https://gitee.com/src-openeuler/libidn2.git +- local_name: libunistring + remote_url: https://gitee.com/src-openeuler/libunistring.git +- local_name: gnutls + remote_url: https://gitee.com/src-openeuler/gnutls.git +- local_name: nettle + remote_url: https://gitee.com/src-openeuler/nettle.git +- local_name: rng-tools + remote_url: https://gitee.com/src-openeuler/rng-tools.git +- local_name: bash-completion + remote_url: https://gitee.com/src-openeuler/bash-completion.git +- local_name: coreutils + remote_url: https://gitee.com/src-openeuler/coreutils.git +- local_name: findutils + remote_url: https://gitee.com/src-openeuler/findutils.git +- local_name: gawk + remote_url: https://gitee.com/src-openeuler/gawk.git +- local_name: libmnl + remote_url: https://gitee.com/src-openeuler/libmnl.git +- local_name: libuv + remote_url: https://gitee.com/src-openeuler/libuv.git +- local_name: flex + remote_url: https://gitee.com/src-openeuler/flex.git +- local_name: sqlite + remote_url: https://gitee.com/src-openeuler/sqlite.git +- local_name: bison + remote_url: https://gitee.com/src-openeuler/bison.git +- local_name: perl + remote_url: https://gitee.com/src-openeuler/perl.git +- local_name: userspace-rcu + remote_url: https://gitee.com/src-openeuler/userspace-rcu.git +- local_name: lttng-ust + remote_url: https://gitee.com/src-openeuler/lttng-ust.git +- local_name: libdb + remote_url: https://gitee.com/src-openeuler/libdb.git +- local_name: groff + remote_url: https://gitee.com/src-openeuler/groff.git +- local_name: nasm + remote_url: https://gitee.com/src-openeuler/nasm.git +- local_name: syslinux + remote_url: https://gitee.com/src-openeuler/syslinux.git +- local_name: cdrkit + remote_url: https://gitee.com/src-openeuler/cdrkit.git +- local_name: yocto-opkg-utils + remote_url: https://gitee.com/src-openeuler/yocto-opkg-utils.git +- local_name: python3 + remote_url: https://gitee.com/src-openeuler/python3.git +- local_name: libgpg-error + remote_url: https://gitee.com/src-openeuler/libgpg-error.git +- local_name: libgcrypt + remote_url: https://gitee.com/src-openeuler/libgcrypt.git +- local_name: kbd + remote_url: https://gitee.com/src-openeuler/kbd.git +- local_name: autoconf-archive + remote_url: https://gitee.com/src-openeuler/autoconf-archive.git +- local_name: libxslt + remote_url: https://gitee.com/src-openeuler/libxslt.git +- local_name: dbus + remote_url: https://gitee.com/src-openeuler/dbus.git +- local_name: wpa_supplicant + remote_url: https://gitee.com/src-openeuler/wpa_supplicant.git +- local_name: grub2 + remote_url: https://gitee.com/src-openeuler/grub2.git +- local_name: parted + remote_url: https://gitee.com/src-openeuler/parted.git +- local_name: intltool + remote_url: https://gitee.com/src-openeuler/intltool.git +- local_name: tar + remote_url: https://gitee.com/src-openeuler/tar.git +- local_name: perl-XML-Parser + remote_url: https://gitee.com/src-openeuler/perl-XML-Parser.git +- local_name: systemd + remote_url: https://gitee.com/src-openeuler/systemd.git +- local_name: gnu-efi + remote_url: https://gitee.com/src-openeuler/gnu-efi.git +- local_name: screen + remote_url: https://gitee.com/src-openeuler/screen.git +- local_name: pcre2 + remote_url: https://gitee.com/src-openeuler/pcre2.git +- local_name: mosquitto + remote_url: https://gitee.com/src-openeuler/mosquitto.git +- local_name: uthash + remote_url: https://gitee.com/src-openeuler/uthash.git +- local_name: check + remote_url: https://gitee.com/src-openeuler/check.git +- local_name: ppp + remote_url: https://gitee.com/src-openeuler/ppp.git +- local_name: libinput + remote_url: https://gitee.com/src-openeuler/libinput.git +- local_name: freetype + remote_url: https://gitee.com/src-openeuler/freetype.git +- local_name: wayland + remote_url: https://gitee.com/src-openeuler/wayland.git +- local_name: mesa + remote_url: https://gitee.com/src-openeuler/mesa.git +- local_name: libdrm + remote_url: https://gitee.com/src-openeuler/libdrm.git +- local_name: xorg-x11-proto-devel + remote_url: https://gitee.com/src-openeuler/xorg-x11-proto-devel.git +- local_name: tslib + remote_url: https://gitee.com/src-openeuler/tslib.git +- local_name: libevdev + remote_url: https://gitee.com/src-openeuler/libevdev.git +- local_name: mtd-utils + remote_url: https://gitee.com/src-openeuler/mtd-utils.git +- local_name: dtc + remote_url: https://gitee.com/src-openeuler/dtc.git +- local_name: libunwind + remote_url: https://gitee.com/src-openeuler/libunwind.git +- local_name: libatomic_ops + remote_url: https://gitee.com/src-openeuler/libatomic_ops.git +- local_name: libmodbus + remote_url: https://gitee.com/src-openeuler/libmodbus.git +- local_name: python-argcomplete + remote_url: https://gitee.com/src-openeuler/python-argcomplete.git +- local_name: python-asn1crypto + remote_url: https://gitee.com/src-openeuler/python-asn1crypto.git +- local_name: python-cmd2 + remote_url: https://gitee.com/src-openeuler/python-cmd2.git +- local_name: python-Cython + remote_url: https://gitee.com/src-openeuler/python-Cython.git +- local_name: python-dateutil + remote_url: https://gitee.com/src-openeuler/python-dateutil.git +- local_name: python-docutils + remote_url: https://gitee.com/src-openeuler/python-docutils.git +- local_name: python-idna + remote_url: https://gitee.com/src-openeuler/python-idna.git +- local_name: python-importlib-metadata + remote_url: https://gitee.com/src-openeuler/python-importlib-metadata.git +- local_name: python-lxml + remote_url: https://gitee.com/src-openeuler/python-lxml.git +- local_name: python-mccabe + remote_url: https://gitee.com/src-openeuler/python-mccabe.git +- local_name: python-mock + remote_url: https://gitee.com/src-openeuler/python-mock.git +- local_name: python-more-itertools + remote_url: https://gitee.com/src-openeuler/python-more-itertools.git +- local_name: python-netifaces + remote_url: https://gitee.com/src-openeuler/python-netifaces.git +- local_name: numpy + remote_url: https://gitee.com/src-openeuler/numpy.git +- local_name: python-packaging + remote_url: https://gitee.com/src-openeuler/python-packaging.git +- local_name: python-pathlib2 + remote_url: https://gitee.com/src-openeuler/python-pathlib2.git +- local_name: python-pep8 + remote_url: https://gitee.com/src-openeuler/python-pep8.git +- local_name: python-pip + remote_url: https://gitee.com/src-openeuler/python-pip.git +- local_name: python-ply + remote_url: https://gitee.com/src-openeuler/python-ply.git +- local_name: python-prettytable + remote_url: https://gitee.com/src-openeuler/python-prettytable.git +- local_name: pybind11 + remote_url: https://gitee.com/src-openeuler/pybind11.git +- local_name: pyflakes + remote_url: https://gitee.com/src-openeuler/pyflakes.git +- local_name: pyparsing + remote_url: https://gitee.com/src-openeuler/pyparsing.git +- local_name: python-pyperclip + remote_url: https://gitee.com/src-openeuler/python-pyperclip.git +- local_name: pytest + remote_url: https://gitee.com/src-openeuler/pytest.git +- local_name: PyYAML + remote_url: https://gitee.com/src-openeuler/PyYAML.git +- local_name: python-setuptools + remote_url: https://gitee.com/src-openeuler/python-setuptools.git +- local_name: python-setuptools_scm + remote_url: https://gitee.com/src-openeuler/python-setuptools_scm.git +- local_name: python-toml + remote_url: https://gitee.com/src-openeuler/python-toml.git +- local_name: python-zipp + remote_url: https://gitee.com/src-openeuler/python-zipp.git +- local_name: meson + remote_url: https://gitee.com/src-openeuler/meson.git +- local_name: gnupg2 + remote_url: https://gitee.com/src-openeuler/gnupg2.git +- local_name: gobject-introspection + remote_url: https://gitee.com/src-openeuler/gobject-introspection.git +- local_name: libassuan + remote_url: https://gitee.com/src-openeuler/libassuan.git +- local_name: gpgme + remote_url: https://gitee.com/src-openeuler/gpgme.git +- local_name: gtk-doc + remote_url: https://gitee.com/src-openeuler/gtk-doc.git +- local_name: libdnf + remote_url: https://gitee.com/src-openeuler/libdnf.git +- local_name: libksba + remote_url: https://gitee.com/src-openeuler/libksba.git +- local_name: libmodulemd + remote_url: https://gitee.com/src-openeuler/libmodulemd.git +- local_name: libyaml + remote_url: https://gitee.com/src-openeuler/libyaml.git +- local_name: lua + remote_url: https://gitee.com/src-openeuler/lua.git +- local_name: npth + remote_url: https://gitee.com/src-openeuler/npth.git +- local_name: pinentry + remote_url: https://gitee.com/src-openeuler/pinentry.git +- local_name: python-six + remote_url: https://gitee.com/src-openeuler/python-six.git +- local_name: python-iniparse + remote_url: https://gitee.com/src-openeuler/python-iniparse.git +- local_name: python-setuptools + remote_url: https://gitee.com/src-openeuler/python-setuptools.git +- local_name: swig + remote_url: https://gitee.com/src-openeuler/swig.git +- local_name: dnf + remote_url: https://gitee.com/src-openeuler/dnf.git +- local_name: file + remote_url: https://gitee.com/src-openeuler/file.git +- local_name: libcomps + remote_url: https://gitee.com/src-openeuler/libcomps.git +- local_name: librepo + remote_url: https://gitee.com/src-openeuler/librepo.git +- local_name: zstd + remote_url: https://gitee.com/src-openeuler/zstd.git +- local_name: libsolv + remote_url: https://gitee.com/src-openeuler/libsolv.git +- local_name: rpm + remote_url: https://gitee.com/src-openeuler/rpm.git +- local_name: tcpdump + remote_url: https://gitee.com/src-openeuler/tcpdump.git +- local_name: zlib + remote_url: https://gitee.com/src-openeuler/zlib.git +- local_name: libcap + remote_url: https://gitee.com/src-openeuler/libcap.git +- local_name: yajl + remote_url: https://gitee.com/src-openeuler/yajl.git +- local_name: libseccomp + remote_url: https://gitee.com/src-openeuler/libseccomp.git +- local_name: curl + remote_url: https://gitee.com/src-openeuler/curl.git +- local_name: lxc + remote_url: https://gitee.com/src-openeuler/lxc.git +- local_name: lcr + remote_url: https://gitee.com/src-openeuler/lcr.git +- local_name: libarchive + remote_url: https://gitee.com/src-openeuler/libarchive.git +- local_name: libevent + remote_url: https://gitee.com/src-openeuler/libevent.git +- local_name: libevhtp + remote_url: https://gitee.com/src-openeuler/libevhtp.git +- local_name: http-parser + remote_url: https://gitee.com/src-openeuler/http-parser.git +- local_name: libwebsockets + remote_url: https://gitee.com/src-openeuler/libwebsockets.git +- local_name: iSulad + remote_url: https://gitee.com/src-openeuler/iSulad.git diff --git a/.oebuild/relies.yaml.sha256 b/.oebuild/relies.yaml.sha256 new file mode 100644 index 0000000000000000000000000000000000000000..a390588addc1c9f989fd0ca0af3e598ecbcba967 --- /dev/null +++ b/.oebuild/relies.yaml.sha256 @@ -0,0 +1 @@ +f1895098246c40f99f7b7757b01ad13598d9ae859cddcfe7674b4157ca83c0c9 relies.yaml diff --git a/.oebuild/samples/prebuilt_tool.yaml b/.oebuild/samples/prebuilt_tool.yaml new file mode 100644 index 0000000000000000000000000000000000000000..eefddc100933348d351b275b02ce8acc3558eea2 --- /dev/null +++ b/.oebuild/samples/prebuilt_tool.yaml @@ -0,0 +1,18 @@ +build_in: docker +machine: qemux86-64 +toolchain_type: +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: |+ + # TCMODE = "external-openeuler" + OPENEULER_PREBUILT_TOOLS_ENABLE = "no" + +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake buildtools-extended-tarball -k diff --git a/.oebuild/samples/rpi4_jailhouse_hmi_img.yaml b/.oebuild/samples/rpi4_jailhouse_hmi_img.yaml new file mode 100644 index 0000000000000000000000000000000000000000..a4974d4cd258861240ed3080c72b61739f22e82c --- /dev/null +++ b/.oebuild/samples/rpi4_jailhouse_hmi_img.yaml @@ -0,0 +1,38 @@ +build_in: docker +machine: raspberrypi4-64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-raspberrypi +- Jailhouse +- yocto-meta-qt5 +local_conf: |+ + DISTRO_FEATURES:append = " hmi " + DISTRO_FEATURES:append = " opengl" + OPENEULER_DEFAULT_DISTRO_FEATURES:append = " x11" + DISTRO_FEATURES:append = " wayland" + IMAGE_FEATURES:append = " weston" + GLIBC_GENERATE_LOCALES:append = "en_US.UTF-8 zh_CN.UTF-8 " + + INIT_MANAGER = "systemd" + VIRTUAL-RUNTIME_dev_manager = "systemd" + + MCS_FEATURES ?= "jailhouse" + DISTRO_FEATURES:append = " mcs" + BUILD_GUEST_OS = "1" + +layers: +- yocto-meta-raspberrypi +- yocto-meta-openeuler/rtos/meta-openeuler-rtos +- yocto-meta-openembedded/meta-oe +- yocto-meta-qt5 +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image diff --git a/.oebuild/samples/rpi4_jailhouse_tiny_img.yaml b/.oebuild/samples/rpi4_jailhouse_tiny_img.yaml new file mode 100644 index 0000000000000000000000000000000000000000..7e3c4bd0ad016add811144a711de360ec42c7295 --- /dev/null +++ b/.oebuild/samples/rpi4_jailhouse_tiny_img.yaml @@ -0,0 +1,25 @@ +build_in: docker +machine: raspberrypi4-64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-raspberrypi +- Jailhouse +local_conf: |+ + MCS_FEATURES ?= "jailhouse" + DISTRO_FEATURES:append = " mcs" + BUILD_GUEST_OS = "1" + +layers: +- yocto-meta-raspberrypi +- yocto-meta-openeuler/rtos/meta-openeuler-rtos +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image-tiny diff --git a/.oebuild/workflows/README.md b/.oebuild/workflows/README.md new file mode 100644 index 0000000000000000000000000000000000000000..d60f0430702d6cff83482bc068ca5bcd103e65c0 --- /dev/null +++ b/.oebuild/workflows/README.md @@ -0,0 +1,310 @@ +# workflows简介 + +workflows承载着整个openEuler Embedded基础设施相关的自动化控制脚本,里面包含有门禁运行脚本、CI运行脚本、CI失败补偿运行脚本、gcc交叉编译链发布脚本、llvm交叉编译链发布脚本以及nativesdk发布脚本,下面将依次介绍各个脚本的作用以及相应工程的承载环境。所有的jenkinsfile运行在jenkins的pipline工程中,由流水线来指定,以下将详细给出如何创建基本的pipline工程。 + +> 注意:jenkins环境的搭建请自行学习,查找,这里不做细述。 + +1. 创建pipline工程 + + 在创建好的目录下,在左边的菜单栏点击"新建Item",接下来会弹出一个会话框,提示输入一个任务名称,自行输入任务名称,然后在下面任务类型列表中选择Pipline类型,然后点击"确定"。 + +2. 构建触发器设置 + + 构建触发器的作用是用于触发该任务的执行机制,这里我们经常用到的有两种,一种是定时构建,另一种是webhook触发。 + +3. 选定执行jenkinsfile + + 在流水线模块中可以定制需要执行的jenkinsfile脚本,在定义中有两种,一种是选定"Pipeline script",此时在下方的输入框中直接填入jenkinsfile,这样的方式适用于在线调试时随时能够更改脚本,另一种是"Pipeline script from SCM",顾名思义,jenkinsfile取自SCM(软件配置管理),此时选定下方SCM的来源为git,然后输入相关的配置参数,有以下配置参数根据具体情况填写: + + - Repository URL:用于填写git的仓的地址 + - Credentials:如果对应的git仓需要凭证,则该配置参数需要进行配置 + - Branches to Build:用户指定仓的分支,一般为"\*/master",可以根据具体情况设置为其他分支,具体格式为"\*/xxx" + - 脚本路径:该参数用于指定在检出的仓下要执行的jenkinsfile脚本的具体路径,以仓的路径为根目录,不可以带仓名,例如jenkinsfile的真实路径是yocto-meta-openeuler/.oebuild/workflows/jenkinsfile_gate,则该参数应设置为".oebuild/workflows/jenkinsfile_gate" + +4. 设定外部变量 + + 因为脚本的执行需要一系列外部变量,有外部变量的作用是为了脚本执行更加的灵活,例如如果是门禁,则需要知道来源于哪个源码仓,提交的pr ID是多少,评论区的评论是什么等等,其他也一样,这里我们有两种方式来设定外部变量,一种直接在构建时设定的变量,另一种是webhook传入的变量,这两种方式都可以设定某个变量的值在jenkinsfile中运行,外部变量在jenkinsfile中的引用语法一般为"$"或"${}",例如外部变量名为NAME,则jenkinsfile中引用此变量的方式为"\$NAME"或"${NAME}",推荐第二种。 + + - 直接在构建时设定的变量:在general中选择列表下面的"This project is parameterized",在点击添加参数下来列表按钮,在弹出的变量类型中有bool值,单选,字符串等等,这里不做详细介绍,我们用字符串来讲解,选定字符串后在弹出的虚线框中"String Parameter"标明这是在设定字符串变量,下面的名称即为要设定的变量名,例如可以设定"NAME",再下面的默认值即为要设定的变量值 + + - webhook传入的变量:在构建触发器列表下选择"Generic Webhook Trigger",在新弹出的页面下点击新增"Post content parameters",在弹出的虚线框即为一个变量设定的内容,以下将详细介绍虚线框中各个字段的意义: + + - Variable:变量名,即需要定义的变量名称 + + - Expression:取值表达类型,该字段意思为从什么数据结构中获取字段,有两种数据结构,一种是JSONPath,代表从json数据结构中获取值,另一种是XPath,代表从xml数据结构中获取值 + + 这里以一个简单的json数据来对取值做演示: + + json数据: + + ``` + { + "aaa":{ + "bbb": { + "nnn": "kkk" + } + } + } + ``` + + 则获取nnn的值的方式为"$.aaa.bbb.nnn",获取省略$直接使用"aaa.bbb.nnn",xml格式同理 + + - Value filter:对相应的值取正则,这里填写正则匹配项 + + - Default value:默认值,即如果不存在相应的值则选择默认值 + +>注意:以下所有外部变量的取值,涉及到webhook的都以gitee的webhook的数据结构为准。 + +## jenkinsfile_gate + +该脚本用于门禁的运行,其运行需要有外部条件触发,触发条件是在评论区输入"Hi"或者"/retest"即可触发,门禁的stage运行流程如下: + +- clone embedded-ci + + 下载功能函数库,功能函数库在前期检查中需要用到,主要是对一些常用的行为动作做了统一封装。 + +- pre + + 前置检查,该检查会先查看是否有正在进行的同pr任务,如果有则停止。然后执行pr_check功能,pr_check将会对提交的代码进行筛查,筛查结果将被赋值到env.pr_check_result,主要有文档编译与镜像编译,如果提交代码涉及到文档,则会记录docs,如果提交代码涉及到纯代码,则会记录code,下一步会根据传入的结果来确定执行什么样的任务。 + +- code check + + 提交信息检查,该检查主要针对commit信息是否符合规范进行检查,主要分两项,一项是commit_msg,另一项是commit_scope,commit_msg检查单个commit提交信息是否符合规范,commit_scope检查单个commit是否存在文档与代码同时提交,需要注意的是我们并不允许单次commit同时提交文档与代码。 + +- check task + + 任务运行,该stage会将编译相关的任务以并行的方式执行,在执行并行任务之前,会对"code check"结果进行判断,如果"code check"检查结果为True,则执行并行任务,否则不执行,以下则对并行stage做介绍: + + - docs:执行文档构建 + - qemu_aarch64:执行qemu-aarch64的基础OS构建 + - qemu_aarch64_tiny:执行qemu-aarch64-tiny的OS构建 + - qemu_arm:执行qemu-arm的基础OS构建 + - qemu_x86:执行x86-64的基础OS构建 + +- post 阶段 + + 该阶段表示无论前面"check task"以何种状态结束,都会执行的动作,主要是对前面的任务结果做最终整理,并将整理结果发布到对应的pr评论区下。 + +>注意:运行节点调用的容器镜像为swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-ci-test + +其依赖的外部变量列表如下: + +| 变量名 | 变量值/默认值 | 说明 | +| -------------------- | ------------------------------------------- | ---------------------------------------------- | +| giteeRepoName | repository.name | 触发webhook的仓名 | +| giteePullRequestid | pull_request.number | 提交pr的ID号 | +| giteeSourceBranch | pull_request.head.ref | 提交pr的分支名 | +| giteeTargetBranch | pull_request.base.ref | 要合入的目标分支 | +| giteeSourceNamespace | pull_request.head.repo.namespace | 提交pr的namespace | +| giteeTargetNamespace | pull_request.base.repo.namespace | 要合入的目标namespace | +| giteeCommitter | pull_request.user.login | pr提交者 | +| comment | comment.body | 评论内容 | +| commitCount | pull_request.commits | 此pr提交的commit数 | +| embeddedRemote | https://gitee.com/openeuler/embedded-ci.git | 运行脚本需要的功能库 | +| embeddedBranch | master | 运行脚本需要的功能库分支名 | +| node | xxxx | 运行任务的节点名 | +| giteeId | xxxx | 目标分支的管理者ID | +| jenkinsId | xxxx | jenkins的管理者ID,用于对一些jenkins任务做管理 | + +## jenkinsfile_ci + +该脚本用于CI的运行,主要由两个任务stage组成,一个是"init task",其主要作用是下载功能函数库"embedded-ci",另一个是"build task",其下分布5个并行的stage,每个stage会构建相应的OS镜像。具体构建的OS镜像不再展开细述,请直接参考stage名就可以看出。这里将对每个构建stage的流程做详细讲解: + +1. 下载yocto-meta-openeuler源码 +2. 生成随机数,为了后期日志文件名的命名 +3. 创建日志存放目录 +4. 执行OS构建任务,这里需要注意的是,OS构建应用的功能函数库中openeuler-image功能,该功能专门对openEuler Embedded的OS构建做了封装,详细参数请查看embedded-ci +5. 将OS二进制发布件发送到远程服务器 +6. 删除编译目录,这是由于每个jenkins节点在启动后会分配容量有限的空间,yocto本身的运行机制会产生大量的文件,会占用大量的空间,如果不进行删除,后续的编译任务将会由于空间不足而失败 + +>注意:运行节点调用的容器镜像为swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-ci-test + +其依赖的外部变量列表如下: + +| 变量名 | 变量值/默认值 | 说明 | +| --------------- | ------------------------------------------- | ---------------------------------------------- | +| embeddedRemote | https://gitee.com/openeuler/embedded-ci.git | 运行脚本需要的功能库 | +| embeddedBranch | master | 运行脚本需要的功能库分支名 | +| node | xxxx | 运行任务的节点名 | +| giteeId | xxxx | 目标分支的管理者ID | +| jenkinsId | xxxx | jenkins的管理者ID,用于对一些jenkins任务做管理 | +| repoNamespace | openeuler | openEuler 源码空间名 | +| repoName | yocto-meta-openeuler | openEuler源码仓名 | +| ciBranch | master | CI执行的源码分支名 | +| remoteIP | xxx | CI执行完二进制发布件发送的目标平台IP | +| remoteUname | xxx | CI执行完二进制发布件发送的目标平台用户名 | +| remoteID | xxx | CI执行完二进制发布件发送的目标平台登录密钥 | +| remoteDir | xxx | CI执行完二进制发布件发送到目标平台的 | +| mugenRemote | https://gitee.com/openeuler/mugen.git | openEuler 测试框架mugen仓 | +| mugenBranch | master | openEuler 测试框架mugen分支名 | +| commentRepoName | yocto-meta-openeuler | CI结果发送仓,结果以issue方式承载 | + +## jenkinsfile_ci_input + +该脚本用于CI失败的补偿任务,其作用是CI目前承担的OS构建任务非常多,当有一些不确定性的因素导致CI失败后需要重新编译,我们此时只需要编译失败的OS镜像即可,该脚本即用于此。该工程与CI工程总体上一致,唯一的区别是每个构建OS的stage由条件触发,这个条件是外部输入参数IMAGE_NAME是否与stage相等,如果相等则执行,否则放行,而IMAGE_NAME即为需要补偿构建的参数。 + +>注意:运行节点调用的容器镜像为swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-ci-test + +其依赖的外部变量列表如下: + +| 变量名 | 变量值/默认值 | 说明 | +| --------------- | ------------------------------------------- | ---------------------------------------------- | +| embeddedRemote | https://gitee.com/openeuler/embedded-ci.git | 运行脚本需要的功能库 | +| embeddedBranch | master | 运行脚本需要的功能库分支名 | +| node | xxxx | 运行任务的节点名 | +| giteeId | xxxx | 目标分支的管理者ID | +| jenkinsId | xxxx | jenkins的管理者ID,用于对一些jenkins任务做管理 | +| repoNamespace | openeuler | openEuler 源码空间名 | +| repoName | yocto-meta-openeuler | openEuler源码仓名 | +| ciBranch | master | CI执行的源码分支名 | +| remoteIP | xxx | CI执行完二进制发布件发送的目标平台IP | +| remoteUname | xxx | CI执行完二进制发布件发送的目标平台用户名 | +| remoteID | xxx | CI执行完二进制发布件发送的目标平台登录密钥 | +| remoteDir | xxx | CI执行完二进制发布件发送到目标平台的 | +| mugenRemote | https://gitee.com/openeuler/mugen.git | openEuler 测试框架mugen仓 | +| mugenBranch | master | openEuler 测试框架mugen分支名 | +| commentRepoName | yocto-meta-openeuler | CI结果发送仓,结果以issue方式承载 | +| IMAGE_NAME | xxx | 需要构建的OS镜像名 | + +## jenkinsfile_llvm_release + +该脚本应用于llvm toolchain版本发布,类似于门禁工程,需要由外部条件触发,这里的外部条件是在评论区输入"/llvm_toolchain_release"评论即可触发。llvm_toolchain版本发布stage流程如下: + +- check release + + 版本检测,llvm的版本发布需要由pr进行控制,并且对pr的格式有一定的要求,这里要求pr的标题一定是"版本升级到xxx",而该stage即为检测此pr是否是版本发布的pr,如果是则将env.is_release置为true,否则置为false,接下来下面所有的stage都是围绕着env.is_release为true来执行。 + +- download repo + + 下载相关代码仓,这里主要是两个,一个是功能函数库"embedded-ci",另一个是yocto-meta-openeuler源码,这里的源码版本为pr提出时的版本。 + +- download aarch64 chans + + 下载openeuler-aarch4的编译链,这是因为llvm的构建需要用到aarch64的编译链。 + +- prepare source + + 准备源码,这一步只是执行了./prepare.sh脚本,该脚本的作用是下载编译llvm需要的依赖库或者源码。 + +- build llvm toolchain + + 执行llvm 交叉编译链的编译,详细步骤不再细述。 + +- release llvm-toolchain + + llvm版本发布,该流程会调用功能函数库中create_release功能来进行二进制版本发布,而版本发布平台为gitee上openEuler 源码仓。 + +>注意:运行节点调用的容器镜像为swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-sdk-ci + +其依赖的外部变量列表如下: + +| 变量名 | 变量值/默认值 | 说明 | +| -------------------- | ------------------------------------------- | ---------------------------------------------- | +| embeddedRemote | https://gitee.com/openeuler/embedded-ci.git | 运行脚本需要的功能库 | +| embeddedBranch | master | 运行脚本需要的功能库分支名 | +| node | xxxx | 运行任务的节点名 | +| giteeId | xxxx | 目标分支的管理者ID | +| jenkinsId | xxxx | jenkins的管理者ID,用于对一些jenkins任务做管理 | +| giteePullRequestid | pull_request.number | 提交pr的ID号 | +| giteeSourceBranch | pull_request.head.ref | 提交pr的分支名 | +| giteeTargetBranch | pull_request.base.ref | 要合入的目标分支 | +| giteeSourceNamespace | pull_request.head.repo.namespace | 提交pr的namespace | +| giteeTargetNamespace | pull_request.base.repo.namespace | 要合入的目标namespace | +| giteeCommitter | pull_request.user.login | pr提交者 | +| comment | comment.body | 评论内容 | +| commitCount | pull_request.commits | 此pr提交的commit数 | +| pull_action | $.action | pr的行为,例如已合入,等待合入等 | +| pr_title | pull_request.title | pr标题 | + +## jenkinsfile_nativesdk_release + +该脚本应用于nativesdk版本发布,类似于门禁工程,需要由外部条件触发,这里的外部条件是在评论区输入"/nativesdk_release"评论即可触发。nativesdk版本发布stage流程如下: + +- check release + + 版本检测,nativesdk的版本发布需要由pr进行控制,并且对pr的格式有一定的要求,这里要求pr的标题一定是"版本升级到xxx",而该stage即为检测此pr是否是版本发布的pr,如果是则将env.is_release置为true,否则置为false,接下来下面所有的stage都是围绕着env.is_release为true来执行。 + +- download repo + + 下载相关代码仓,这里主要是两个,一个是功能函数库"embedded-ci",另一个是yocto-meta-openeuler源码,这里的源码版本为pr提出时的版本。 + +- build sdk + + 执行nativesdk的构建。 + +- release nativesdk + + nativesdk版本发布,该流程会调用功能函数库中create_release功能来进行二进制版本发布,而版本发布平台为gitee上openEuler 源码仓。 + +>注意:运行节点调用的容器镜像为swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-ci-test + +其依赖的外部变量列表如下: + +| 变量名 | 变量值/默认值 | 说明 | +| -------------------- | ------------------------------------------- | ---------------------------------------------- | +| embeddedRemote | https://gitee.com/openeuler/embedded-ci.git | 运行脚本需要的功能库 | +| embeddedBranch | master | 运行脚本需要的功能库分支名 | +| node | xxxx | 运行任务的节点名 | +| giteeId | xxxx | 目标分支的管理者ID | +| jenkinsId | xxxx | jenkins的管理者ID,用于对一些jenkins任务做管理 | +| giteePullRequestid | pull_request.number | 提交pr的ID号 | +| giteeSourceBranch | pull_request.head.ref | 提交pr的分支名 | +| giteeTargetBranch | pull_request.base.ref | 要合入的目标分支 | +| giteeSourceNamespace | pull_request.head.repo.namespace | 提交pr的namespace | +| giteeTargetNamespace | pull_request.base.repo.namespace | 要合入的目标namespace | +| giteeCommitter | pull_request.user.login | pr提交者 | +| comment | comment.body | 评论内容 | +| commitCount | pull_request.commits | 此pr提交的commit数 | +| pull_action | $.action | pr的行为,例如已合入,等待合入等 | +| pr_title | pull_request.title | pr标题 | + +## jenkinsfile_toolchain_release + +该脚本应用于gcc toolchain版本发布,类似于门禁工程,需要由外部条件触发,这里的外部条件是在评论区输入"/toolchain_release"评论即可触发。gcc_toolchain版本发布stage流程如下: + +- check release + + 版本检测,gcc的版本发布需要由pr进行控制,并且对pr的格式有一定的要求,这里要求pr的标题一定是"版本升级到xxx",而该stage即为检测此pr是否是版本发布的pr,如果是则将env.is_release置为true,否则置为false,接下来下面所有的stage都是围绕着env.is_release为true来执行。 + +- download repo + + 下载相关代码仓,这里主要是两个,一个是功能函数库"embedded-ci",另一个是yocto-meta-openeuler源码,这里的源码版本为pr提出时的版本。 + +- prepare source + + 准备源码,这一步执行了prepare.sh与update.sh脚本,该脚本的作用是下载编译gcc需要的依赖库或者源码。 + +- build toolchain + + 执行gcc交叉编译链的编译,详细步骤不再细述。 + +- package toolchain + + 对gcc编译产物进行打包。 + +- release gcc-toolchain + + gcc版本发布,该流程会调用功能函数库中create_release功能来进行二进制版本发布,而版本发布平台为gitee上openEuler 源码仓。 + +>注意:运行节点调用的容器镜像为swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-sdk-ci + +其依赖的外部变量列表如下: + +| 变量名 | 变量值/默认值 | 说明 | +| -------------------- | ------------------------------------------- | ---------------------------------------------- | +| embeddedRemote | https://gitee.com/openeuler/embedded-ci.git | 运行脚本需要的功能库 | +| embeddedBranch | master | 运行脚本需要的功能库分支名 | +| node | xxxx | 运行任务的节点名 | +| giteeId | xxxx | 目标分支的管理者ID | +| jenkinsId | xxxx | jenkins的管理者ID,用于对一些jenkins任务做管理 | +| giteePullRequestid | pull_request.number | 提交pr的ID号 | +| giteeSourceBranch | pull_request.head.ref | 提交pr的分支名 | +| giteeTargetBranch | pull_request.base.ref | 要合入的目标分支 | +| giteeSourceNamespace | pull_request.head.repo.namespace | 提交pr的namespace | +| giteeTargetNamespace | pull_request.base.repo.namespace | 要合入的目标namespace | +| giteeCommitter | pull_request.user.login | pr提交者 | +| comment | comment.body | 评论内容 | +| commitCount | pull_request.commits | 此pr提交的commit数 | +| pull_action | $.action | pr的行为,例如已合入,等待合入等 | +| pr_title | pull_request.title | pr标题 | + diff --git a/.oebuild/workflows/build_common.groovy b/.oebuild/workflows/build_common.groovy new file mode 100644 index 0000000000000000000000000000000000000000..8710e98d043d8f0d7362c87ebec4e01f83b4a201 --- /dev/null +++ b/.oebuild/workflows/build_common.groovy @@ -0,0 +1,614 @@ +STAGES_RES = [] + +def downloadEmbeddedCI(String remote_url, String branch){ + sh 'rm -rf embedded-ci' + sh "git clone ${remote_url} -b ${branch} -v embedded-ci --depth=1" +} + +def downloadYoctoWithBranch(String workspace, String namespace, String repo, String branch, Integer deepth){ + sh """ + python3 main.py clone_repo \ + -w ${workspace} \ + -r https://gitee.com/${namespace}/${repo} \ + -p ${repo} \ + -v ${branch} \ + -dp ${deepth} + """ +} + +def downloadYoctoWithPr(String workspace, String namespace, String repo, Integer prnum, Integer deepth){ + sh """ + python3 main.py clone_repo \ + -w ${workspace} \ + -r https://gitee.com/${namespace}/${repo} \ + -p ${repo} \ + -pr ${prnum} \ + -dp ${deepth} + """ +} + +def formatRes(String name, String action, String check_res, String log_path){ + return sh (script: """ + python3 main.py serial \ + -c name=${name} \ + -c action=${action} \ + -c result=${check_res} \ + -c log_path=${log_path} + """, returnStdout: true).trim() +} + +def deleteBuildDir(String build_dir){ + sh """ + rm -rf ${build_dir} + """ +} + +def getRandomStr(){ + return sh(script: """ + cat /proc/sys/kernel/random/uuid + """, returnStdout: true).trim() +} + +def mkdirOpeneulerLog(){ + def logdir = "openeuler/log" + sh "mkdir -p ${logdir}" + return logdir +} + +def getNowDatetime(){ + return sh(script: """ + date "+%Y%m%d%H%M%S" + """, returnStdout: true).trim() +} + +def uploadImageWithKey(String remote_ip, String remote_dir, String username, String remote_key, String local_dir){ + sh """ + python3 main.py put_to_dst \ + -t 0 \ + -ld ${local_dir} \ + -dd ${remote_dir} \ + -i ${remote_ip} \ + -u ${username} \ + -k ${remote_key} \ + -sign \ + -d + """ +} + +def putSStateCacheToDst(String local_dir, String dst_dir){ + sh """ + python3 main.py put_to_dst \ + -t 1 \ + -dd ${dst_dir} \ + -ld ${local_dir} + """ +} + +def handleAfterBuildImage(String stage_name, String arch, Integer build_res_code, String log_dir, String random_str, String image_date){ + def build_res = "failed" + def test_res = "failed" + def test_res_code = 1 + if (build_res_code == 0){ + build_res = "success" + if (putToRemote == true){ + // put the image to remote server + def remote_dir = remoteDir+"/${arch}/${stage_name}" + def local_dir = "${oebuildDir}/build/${stage_name}/output/${image_date}/" + uploadImageWithKey(remoteIP, remote_dir, remoteUname, remoteKey, local_dir) + } + if (saveSstateCache == true){ + // put sstate-cache to share disk + // Due to the current sstate-cache containing soft links pointing to files in + // sstate_origin_dir, we first copy it to a temporary folder (during copying, + // soft links are defaulted to copy the actual files they point to), then delete + // the source folder, and finally perform an mv operation. + def sstate_local_dir = "${oebuildDir}/build/${stage_name}/sstate-cache" + def sstate_dst_dir = "${shareDir}/${ciBranch}/sstate-cache/${stage_name}-temp" + putSStateCacheToDst(sstate_local_dir, sstate_dst_dir) + def sstate_origin_dir = "${shareDir}/${ciBranch}/sstate-cache/${stage_name}" + sh (script: """ + rm -rf ${sstate_origin_dir} + mv ${sstate_dst_dir} ${sstate_origin_dir} + """ + ) + } + // Test the build artifacts of the QEMU image and x86 image. + if(stage_name.contains("qemu") && stage_name.contains("x86-64") && !stage_name.contains("riscv")){ + test_res_code = sh (script: """ + python3 main.py utest \ + -target openeuler_image \ + -a ${arch} \ + -td ${oebuildDir}/build/${stage_name} \ + -tm ${mugenRemote} \ + -tb ${mugenBranch} > ${log_dir}/Test-${stage_name}-${random_str}.log + """, returnStatus: true) + if (test_res_code == 0){ + test_res = "success" + } + } + } + // Check the assignment + archiveArtifacts "${log_dir}/*.log" + STAGES_RES.push(formatRes(stage_name, "build", build_res, "artifact/${log_dir}/Build-${stage_name}-${random_str}.log")) + if (build_res_code == 0 && (stage_name.contains("qemu") && stage_name.contains("x86-64") && !stage_name.contains("riscv"))){ + STAGES_RES.push(formatRes(stage_name, "test", test_res, "artifact/${log_dir}/Test-${stage_name}-${random_str}.log")) + } +} + +def prepareSrcCode(workspace){ + sh """ + if [[ -f "${shareDir}/${ciBranch}/src.tar.gz" ]]; then + pushd ${workspace} + oebuild init oebuild_workspace + cd oebuild_workspace + rm -rf build + cp -f ${shareDir}/${ciBranch}/src.tar.gz . + tar zxf src.tar.gz + popd + fi + """ +} + +// dynamic invoke build image function +def dynamicBuild(image_name, image_date, log_dir, random_str){ + image_name = image_name.replace("-", "_") + "build_${image_name}"(image_date, log_dir, random_str) +} + +// Perform the compilation check for the ok3588 image. +def build_ok3588(image_date, log_dir, random_str){ + def stage_name = "ok3588" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p ok3588 \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the ok3568 image. +def build_ok3568(image_date, log_dir, random_str){ + def stage_name = "ok3568" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p ok3568 \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the qemu-aarch64-ros-mcs image. +def build_qemu_aarch64_ros_mcs(image_date, log_dir, random_str){ + def stage_name = "qemu-aarch64-ros-mcs" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p qemu-aarch64 \ + -f "openeuler-ros;openeuler-mcs;openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the qemu-aarch64-llvm image. +def build_qemu_aarch64_llvm(image_date, log_dir, random_str){ + def stage_name = "qemu-aarch64-llvm" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p qemu-aarch64 \ + -f "clang" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the raspberrypi4-64-llvm image. +def build_raspberrypi4_64_llvm(image_date, log_dir, random_str){ + def stage_name = "raspberrypi4-64-llvm" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p raspberrypi4-64 \ + -f "clang;openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the qemu-aarch64-kernel6 image. +def build_qemu_aarch64_kernel6(image_date, log_dir, random_str){ + def stage_name = "qemu-aarch64-kernel6" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p qemu-aarch64 \ + -f "kernel6;openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the raspberrypi4-64 image. +def build_raspberrypi4_64(image_date, log_dir, random_str){ + def stage_name = "raspberrypi4-64" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p raspberrypi4-64 \ + -f "openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the raspberrypi4-64-kernel6 image. +def build_raspberrypi4_64_kernel6(image_date, log_dir, random_str){ + def stage_name = "raspberrypi4-64-kernel6" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p raspberrypi4-64 \ + -f "kernel6;openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the qemu-aarch64-kernel6-llvm image. +def build_qemu_aarch64_kernel6_llvm(image_date, log_dir, random_str){ + def stage_name = "qemu-aarch64-kernel6-llvm" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p qemu-aarch64 \ + -f "kernel6;clang;openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d $stage_name > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the raspberrypi4-64-kernel6-llvm image. +def build_raspberrypi4_64_kernel6_llvm(image_date, log_dir, random_str){ + def stage_name = "raspberrypi4-64-kernel6-llvm" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p raspberrypi4-64 \ + -f "kernel6;clang;openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the raspberrypi4-64-rt-hmi image. +def build_raspberrypi4_64_rt_hmi(image_date, log_dir, random_str){ + def stage_name = "raspberrypi4-64-rt-hmi" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p raspberrypi4-64 \ + -f "openeuler-rt;hmi;openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the raspberrypi4-64-kernel6-rt-hmi image. +def build_raspberrypi4_64_kernel6_rt_hmi(image_date, log_dir, random_str){ + def stage_name = "raspberrypi4-64-kernel6-rt-hmi" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p raspberrypi4-64 \ + -f "openeuler-rt;hmi;kernel6;openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the hieulerpi1 image. +def build_hieulerpi1(image_date, log_dir, random_str){ + def stage_name = "hieulerpi1" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p hieulerpi1 \ + -f "openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date}} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the hieulerpi1-tiny image. +def build_hieulerpi1_tiny(image_date, log_dir, random_str){ + def stage_name = "hieulerpi1-tiny" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p hieulerpi1 \ + -i "openeuler-image-tiny" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the hieulerpi1-ros image. +def build_hieulerpi1_ros(image_date, log_dir, random_str){ + def stage_name = "hieulerpi1-ros" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p hieulerpi1 \ + -f "openeuler-ros;openeuler-container" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the qemu-arm image. +def build_qemu_arm(image_date, log_dir, random_str){ + def stage_name = "qemu-arm" + def arch = "arm" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm32le \ + -p qemu-arm \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the qemu-riscv64 image. +def build_qemu_riscv64(image_date, log_dir, random_str){ + def stage_name = "qemu-riscv64" + def arch = "riscv64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_riscv64 \ + -p qemu-riscv64 \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the x86-64-rt-hmi-ros-mcs image. +def build_x86_64_rt_hmi_ros_mcs(image_date, log_dir, random_str){ + def stage_name = "x86-64-rt-hmi-ros-mcs" + def arch = "x86-64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_x86_64 \ + -p x86-64 \ + -f "openeuler-rt;hmi;openeuler-ros;openeuler-mcs" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the x86-64-kernel6-rt-hmi-ros-mcs image. +def build_x86_64_kernel6_rt_hmi_ros_mcs(image_date, log_dir, random_str){ + def stage_name = "x86-64-kernel6-rt-hmi-ros-mcs" + def arch = "x86-64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_x86_64 \ + -p x86-64 \ + -f "kernel6;openeuler-rt;hmi;openeuler-ros;openeuler-mcs" \ + -i "openeuler-image;openeuler-image -c do_populate_sdk" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the qemu-aarch64 image. +def build_qemu_aarch64(image_date, log_dir, random_str){ + def stage_name = "qemu-aarch64" + def arch = "aarch64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p qemu-aarch64 \ + -f "openeuler-container" \ + -i "openeuler-image" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +//Perform the compilation check for the x86-64 image. +def build_x86_64(image_date, log_dir, random_str){ + def stage_name = "x86-64" + def arch = "x86-64" + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a ${arch} \ + -t /usr1/openeuler/gcc/openeuler_gcc_x86_64 \ + -p x86-64 \ + -i "openeuler-image" \ + -oe "\\-\\-no_layer" \ + -dt ${image_date} \ + -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + """, returnStatus: true) + handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + // delete build directory + deleteBuildDir(oebuildDir + "/build/" + stage_name) +} + +return this diff --git a/.oebuild/workflows/ci.yaml b/.oebuild/workflows/ci.yaml new file mode 100644 index 0000000000000000000000000000000000000000..fa9dac371bd36cbd0b1c17d434ad774be322a794 --- /dev/null +++ b/.oebuild/workflows/ci.yaml @@ -0,0 +1,103 @@ +build_list: + - arch: aarch64 + toolchain: openeuler_gcc_arm64le + board: +########################################## + - name: qemu + platform: qemu-aarch64 + directory: qemu-aarch64 + # feature: + # - name: openeuler-rt + bitbake: + - target: openeuler-image + - target: openeuler-image -c do_populate_sdk +########################################## + - name: qemu-ros + platform: qemu-aarch64 + directory: qemu-aarch64-ros + feature: + - name: openeuler-ros + bitbake: + - target: openeuler-image-ros + - target: openeuler-image-ros -c do_populate_sdk +########################################## + - name: raspberrypi4-64 + platform: raspberrypi4-64 + directory: raspberrypi4-64 + bitbake: + - target: openeuler-image + - target: openeuler-image -c do_populate_sdk +########################################## + - name: raspberrypi4-64-rt + platform: raspberrypi4-64 + directory: raspberrypi4-64-rt + feature: + - name: openeuler-rt + bitbake: + - target: openeuler-image + - target: openeuler-image -c do_populate_sdk +########################################## + - name: raspberrypi4-64-ros + platform: raspberrypi4-64 + directory: raspberrypi4-64-ros + feature: + - name: openeuler-ros + bitbake: + - target: openeuler-image-ros + - target: openeuler-image-ros -c do_populate_sdk +########################################## + - name: raspberrypi4-64-qt + platform: raspberrypi4-64 + directory: raspberrypi4-64-qt + feature: + - name: openeuler-qt + - name: systemd + bitbake: + - target: openeuler-image + - target: openeuler-image -c do_populate_sdk +########################################## + - name: ok3588 + platform: ok3588 + directory: ok3588 + bitbake: + - target: openeuler-image + - target: openeuler-image -c do_populate_sdk +########################################## + - arch: arm32 + toolchain: openeuler_gcc_arm32le + board: + - name: qemu + platform: qemu-arm + directory: qemu-arm32 + bitbake: + - target: openeuler-image + - target: openeuler-image -c do_populate_sdk +########################################## + - arch: x86-64 + toolchain: openeuler_gcc_x86_64 + board: + - name: qemu + platform: x86-64 + directory: x86-64 + bitbake: + - target: openeuler-image + - target: openeuler-image -c do_populate_sdk +########################################## + - name: qemu-rt + platform: x86-64 + directory: x86-64-rt + feature: + - name: openeuler-rt + bitbake: + - target: openeuler-image + - target: openeuler-image -c do_populate_sdk +########################################## + - arch: riscv64 + toolchain: openeuler_gcc_riscv64 + board: + - name: qemu + platform: qemu-riscv64 + directory: qemu-riscv64 + bitbake: + - target: openeuler-image + - target: openeuler-image -c do_populate_sdk diff --git a/.oebuild/workflows/gate.yaml b/.oebuild/workflows/gate.yaml new file mode 100644 index 0000000000000000000000000000000000000000..60faf347dccfc2f5b175d9ac0d34a56ae6b89b20 --- /dev/null +++ b/.oebuild/workflows/gate.yaml @@ -0,0 +1,36 @@ +code_check: +- name: commit_msg +build_check: +- arch: aarch64 + toolchain: openeuler_gcc_arm64le + board: + - name: qemu + platform: qemu-aarch64 + directory: qemu-aarch64 + image: + - name: openeuler-image + - name: openeuler-image-tiny +- arch: arm32 + toolchain: openeuler_gcc_arm32le + board: + - name: qemu + platform: qemu-arm + directory: qemu-arm32 + image: + - name: openeuler-image +- arch: x86-64 + toolchain: openeuler_gcc_x86_64 + board: + - name: qemu + platform: x86-64 + directory: x86-64 + image: + - name: openeuler-image + # - arch: riscv64 + # toolchain: openeuler_gcc_riscv64 + # board: + # - name: qemu + # platform: qemu-riscv64 + # directory: qemu-riscv64 + # image: + # - name: openeuler-image diff --git a/.oebuild/workflows/jenkinsfile_ci b/.oebuild/workflows/jenkinsfile_ci new file mode 100644 index 0000000000000000000000000000000000000000..43bdb213092aef403720d703bb9f89c2d5716788 --- /dev/null +++ b/.oebuild/workflows/jenkinsfile_ci @@ -0,0 +1,193 @@ +def BUILD_COM +def IMAGE_DATE = "" + +pipeline { + agent { node "${node}" } + environment { + PATH = "/home/jenkins/.local/bin:${env.PATH}" + } + stages { + stage("init task"){ + steps{ + script{ + BUILD_COM = load '.oebuild/workflows/build_common.groovy' + } + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + IMAGE_DATE = BUILD_COM.getNowDatetime() + } + } + } + } + stage("build task"){ + parallel { + stage("group1"){ + agent { node "${node}" } + steps { + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + file(credentialsId: remoteID, variable: 'remoteKey') + ]){ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + BUILD_COM.prepareSrcCode("/home/jenkins") + def random_str = BUILD_COM.getRandomStr() + def log_dir = BUILD_COM.mkdirOpeneulerLog() + + for (image_name in group1.split()){ + println "build ${image_name} ..." + BUILD_COM.dynamicBuild(image_name, IMAGE_DATE, log_dir, random_str) + } + } + } + } + } + } + stage("group2"){ + agent { node "${node}" } + steps { + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + file(credentialsId: remoteID, variable: 'remoteKey') + ]){ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + BUILD_COM.prepareSrcCode("/home/jenkins") + def random_str = BUILD_COM.getRandomStr() + def log_dir = BUILD_COM.mkdirOpeneulerLog() + + for (image_name in group2.split()){ + println "build ${image_name} ..." + BUILD_COM.dynamicBuild(image_name, IMAGE_DATE, log_dir, random_str) + } + } + } + } + } + } + stage("group3"){ + agent { node "${node}" } + steps { + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + file(credentialsId: remoteID, variable: 'remoteKey') + ]){ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + BUILD_COM.prepareSrcCode("/home/jenkins") + def random_str = BUILD_COM.getRandomStr() + def log_dir = BUILD_COM.mkdirOpeneulerLog() + + for (image_name in group3.split()){ + println "build ${image_name} ..." + BUILD_COM.dynamicBuild(image_name, IMAGE_DATE, log_dir, random_str) + } + } + } + } + } + } + stage("group4"){ + agent { node "${node}" } + steps { + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + file(credentialsId: remoteID, variable: 'remoteKey') + ]){ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + BUILD_COM.prepareSrcCode("/home/jenkins") + def random_str = BUILD_COM.getRandomStr() + def log_dir = BUILD_COM.mkdirOpeneulerLog() + + for (image_name in group4.split()){ + println "build ${image_name} ..." + BUILD_COM.dynamicBuild(image_name, IMAGE_DATE, log_dir, random_str) + } + } + } + } + } + } + stage("group5"){ + agent { node "${node}" } + steps { + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + file(credentialsId: remoteID, variable: 'remoteKey') + ]){ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + BUILD_COM.prepareSrcCode("/home/jenkins") + def random_str = BUILD_COM.getRandomStr() + def log_dir = BUILD_COM.mkdirOpeneulerLog() + + for (image_name in group5.split()){ + println "build ${image_name} ..." + BUILD_COM.dynamicBuild(image_name, IMAGE_DATE, log_dir, random_str) + } + } + } + } + } + } + } + } + } + post { + always { + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + string(credentialsId: "${giteeId}", variable: 'GITEETOKEN') + ]){ + def chks = "" + for (int i = 0; i < BUILD_COM.STAGES_RES.size(); ++i) { + chks = "${chks} -chk ${BUILD_COM.STAGES_RES[i]}" + } + sh """ + python3 main.py comment \ + -m ci \ + -o ${repoNamespace} \ + -p ${commentRepoName} \ + -b ${ciBranch} \ + -gt ${GITEETOKEN} \ + ${chks} + """ + } + } + } + } + } +} \ No newline at end of file diff --git a/.oebuild/workflows/jenkinsfile_ci_input b/.oebuild/workflows/jenkinsfile_ci_input new file mode 100644 index 0000000000000000000000000000000000000000..ea876da9a536c8bcde0c0d86103bc4d82a3f8187 --- /dev/null +++ b/.oebuild/workflows/jenkinsfile_ci_input @@ -0,0 +1,72 @@ +def BUILD_COM +def IMAGE_DATE = "" + +pipeline { + agent { node "${node}" } + environment { + PATH = "/home/jenkins/.local/bin:${env.PATH}" + } + stages { + stage("prepare environment"){ + steps { + script{ + BUILD_COM = load '.oebuild/workflows/build_common.groovy' + IMAGE_DATE = BUILD_COM.getNowDatetime() + } + dir('/home/jenkins/agent'){ + //下载embedded-ci代码 + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + dir('/home/jenkins/agent/embedded-ci'){ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + } + } + } + stage("build image"){ + steps { + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + file(credentialsId: remoteID, variable: 'remoteKey') + ]){ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + BUILD_COM.prepareSrcCode("/home/jenkins") + def random_str = BUILD_COM.getRandomStr() + def log_dir = BUILD_COM.mkdirOpeneulerLog() + + println "build ${imageName} ..." + BUILD_COM.dynamicBuild(imageName, IMAGE_DATE, log_dir, random_str) + } + } + } + } + } + } + post { + always { + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + string(credentialsId: "${giteeId}", variable: 'GITEETOKEN') + ]){ + def chks = "" + for (int i = 0; i < BUILD_COM.STAGES_RES.size(); ++i) { + chks = "${chks} -chk ${BUILD_COM.STAGES_RES[i]}" + } + sh """ + python3 main.py comment \ + -m ci \ + -o ${repoNamespace} \ + -p ${commentRepoName} \ + -b ${ciBranch} \ + -gt ${GITEETOKEN} \ + ${chks} + """ + } + } + } + } + } +} diff --git a/.oebuild/workflows/jenkinsfile_gate b/.oebuild/workflows/jenkinsfile_gate new file mode 100644 index 0000000000000000000000000000000000000000..cee9a7dc45051e06846aad9d64bc607fa21269ba --- /dev/null +++ b/.oebuild/workflows/jenkinsfile_gate @@ -0,0 +1,480 @@ +def downloadEmbeddedCI(){ + sh 'rm -rf embedded-ci' + sh "git clone ${embeddedRemote} -b ${embeddedBranch} -v embedded-ci --depth=1" +} + +def downloadYoctoWithPr(String workspace, String namespace, String repo, Integer prnum, Integer deepth){ + sh """ + python3 main.py clone_repo \ + -w ${workspace} \ + -r https://gitee.com/${namespace}/${repo} \ + -p ${repo} \ + -pr ${prnum} \ + -dp ${deepth} + """ +} + +def formatRes(String name, String action, String check_res, String log_path){ + return sh (script: """ + python3 main.py serial \ + -c name=$name \ + -c action=$action \ + -c result=$check_res \ + -c log_path=$log_path + """, returnStdout: true).trim() +} + +def getRandomStr(){ + return sh(script: """ + cat /proc/sys/kernel/random/uuid + """, returnStdout: true).trim() +} + +def mkdirOpeneulerLog(){ + def logdir = "openeuler/log" + sh "mkdir -p $logdir" + return logdir +} + +def prepare_srccode(workspace){ + sh """ + if [[ -f "$SHARE_DIR/$giteeTargetBranch/src.tar.gz" ]]; then + pushd ${workspace} + oebuild init oebuild_workspace + cd oebuild_workspace + rm -rf build + cp -f $SHARE_DIR/$giteeTargetBranch/src.tar.gz . + tar zxf src.tar.gz + popd + fi + """ +} + +def STAGES_RES = [] + +pipeline { + agent { node "${node}" } + environment { + PATH = "/home/jenkins/.local/bin:${env.PATH}" + } + stages { + stage("clone embedded-ci"){ + steps{ + dir('/home/jenkins/agent'){ + script{ + downloadEmbeddedCI() + } + } + } + } + stage("pre") { + steps { + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + string(credentialsId: "${giteeId}", variable: 'GITEETOKEN'), + usernamePassword(credentialsId: "${jenkinsId}", usernameVariable: 'JUSER',passwordVariable: 'JPASSWD')]){ + // 执行pre + sh """ + python3 main.py pre \ + -s $SHARE_DIR \ + -o $giteeTargetNamespace \ + -p $giteeRepoName \ + -pr $giteePullRequestid \ + -juser $JUSER \ + -jpwd $JPASSWD \ + -gt $GITEETOKEN + """ + // 执行pr_check + env.pr_check_result = sh (script: """ + python3 main.py pr_check \ + -o $giteeTargetNamespace \ + -p $giteeRepoName \ + -pr $giteePullRequestid \ + -gt $GITEETOKEN + """, returnStdout: true).trim() + } + } + } + } + } + stage("code check"){ + steps { + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([string(credentialsId: "${giteeId}", variable: 'GITEETOKEN')]){ + // 下载yocto源码 + downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), Integer.parseInt(commitCount)) + def randomStr = getRandomStr() + def logDir = mkdirOpeneulerLog() + // 执行commit检查 + def task_res_code = sh (script: """ + python3 main.py codecheck \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target commit_msg \ + -o $giteeTargetNamespace \ + -p $giteeRepoName \ + -gt $GITEETOKEN \ + -pr $giteePullRequestid > ${logDir}/${randomStr}.log + """, returnStatus: true) + def check_res = "" + if (task_res_code == 0){ + check_res = "success" + }else{ + check_res = "failed" + env.code_check_result = "failed" + } + // 对检查赋值 + // env.task_check_commit = formatRes("check", "commit_check", check_res, "xxx") + archiveArtifacts "${logDir}/*.log" + STAGES_RES.push(formatRes("check", "commit_check", check_res, "artifact/${logDir}/${randomStr}.log")) + } + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([string(credentialsId: "${giteeId}", variable: 'GITEETOKEN')]){ + // 执行scope检查 + def randomStr = getRandomStr() + def logDir = mkdirOpeneulerLog() + // 执行commit检查 + def task_res_code = sh (script: """ + python3 main.py codecheck \ + -target commit_scope \ + -o $giteeTargetNamespace \ + -p $giteeRepoName \ + -gt $GITEETOKEN \ + -pr $giteePullRequestid > ${logDir}/${randomStr}.log + """, returnStatus: true) + def check_res = "" + if (task_res_code == 0){ + check_res = "success" + }else{ + check_res = "failed" + env.code_check_result = "failed" + } + // 对检查赋值 + // env.task_check_scope = formatRes("check", "scope_check", check_res, "xxx") + archiveArtifacts "${logDir}/*.log" + STAGES_RES.push(formatRes("check", "scope_check", check_res, "artifact/${logDir}/${randomStr}.log")) + } + } + } + } + } + stage("check task"){ + when { + expression { + return env.code_check_result != "failed" + } + } + parallel { + stage("docs"){ + agent { node "${node}" } + when { + expression { + return env.pr_check_result.contains("docs") + } + } + steps{ + dir('/home/jenkins/agent'){ + script{ + downloadEmbeddedCI() + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + // 执行docs编译 + // 下载yocto源码 + downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) + def randomStr = getRandomStr() + def logDir = mkdirOpeneulerLog() + // 执行文档编译检查 + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_doc > ${logDir}/${randomStr}.log + """, returnStatus: true) + def check_res = "" + if (task_res_code == 0){ + check_res = "success" + }else{ + check_res = "failed" + } + // 对检查赋值 + // env.task_build_docs = formatRes("docs", "build", check_res, "xxx") + archiveArtifacts "${logDir}/*.log" + STAGES_RES.push(formatRes("docs", "build", check_res, "artifact/${logDir}/${randomStr}.log")) + } + } + } + } + stage("qemu-aarch64"){ + agent { node "${node}" } + when { + expression { + return env.pr_check_result.contains("code") + } + } + steps { + dir('/home/jenkins/agent'){ + script{ + downloadEmbeddedCI() + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + // 执行qemu_aarch64编译 + // 下载yocto源码 + downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) + prepare_srccode("/home/jenkins") + def randomStr = getRandomStr() + def logDir = mkdirOpeneulerLog() + // 执行镜像编译检查 + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a aarch64 \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p qemu-aarch64 \ + -i openeuler-image \ + -s_in "$SHARE_DIR/${giteeTargetBranch}/sstate-cache/qemu-aarch64" \ + -d qemu-aarch64 > ${logDir}/${randomStr}.log + """, returnStatus: true) + + def check_res = "" + if (task_res_code == 0){ + check_res = "success" + }else{ + check_res = "failed" + } + // 对检查赋值 + archiveArtifacts "${logDir}/*.log" + STAGES_RES.push(formatRes("qemu-aarch64", "build", check_res, "artifact/${logDir}/${randomStr}.log")) + } + } + } + } + stage("qemu-aarch64-tiny"){ + agent { node "${node}" } + when { + expression { + return env.pr_check_result.contains("code") + } + } + steps { + dir('/home/jenkins/agent'){ + script{ + downloadEmbeddedCI() + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + // 执行qemu_aarch64编译 + // 下载yocto源码 + downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) + prepare_srccode("/home/jenkins") + def randomStr = getRandomStr() + def logDir = mkdirOpeneulerLog() + // 执行镜像编译检查 + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a aarch64 \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p qemu-aarch64 \ + -i openeuler-image-tiny \ + -s_in "$SHARE_DIR/${giteeTargetBranch}/sstate-cache/qemu-aarch64" \ + -d qemu-aarch64-tiny > ${logDir}/${randomStr}.log + """, returnStatus: true) + + def check_res = "" + if (task_res_code == 0){ + check_res = "success" + }else{ + check_res = "failed" + } + // 对检查赋值 + archiveArtifacts "${logDir}/*.log" + STAGES_RES.push(formatRes("qemu-aarch64-tiny", "build", check_res, "artifact/${logDir}/${randomStr}.log")) + } + } + } + } + stage("qemu-arm"){ + agent { node "${node}" } + when { + expression { + return env.pr_check_result.contains("code") + } + } + steps { + dir('/home/jenkins/agent'){ + script{ + downloadEmbeddedCI() + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + // 执行qemu_arm编译 + // 下载yocto源码 + downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) + prepare_srccode("/home/jenkins") + def randomStr = getRandomStr() + def logDir = mkdirOpeneulerLog() + // 执行镜像编译检查 + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a arm \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm32le \ + -p qemu-arm \ + -i openeuler-image \ + -s_in "$SHARE_DIR/${giteeTargetBranch}/sstate-cache/qemu-arm" \ + -d qemu-arm32 > ${logDir}/${randomStr}.log + """, returnStatus: true) + + def check_res = "" + if (task_res_code == 0){ + check_res = "success" + }else{ + check_res = "failed" + } + // 对检查赋值 + archiveArtifacts "${logDir}/*.log" + STAGES_RES.push(formatRes("qemu-arm", "build", check_res, "artifact/${logDir}/${randomStr}.log")) + } + } + } + } + stage("x86-64"){ + agent { node "${node}" } + when { + expression { + return env.pr_check_result.contains("code") + } + } + steps { + dir('/home/jenkins/agent'){ + script{ + downloadEmbeddedCI() + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + // 执行qemu_arm编译 + // 下载yocto源码 + def randomStr = getRandomStr() + def logDir = mkdirOpeneulerLog() + downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) + prepare_srccode("/home/jenkins") + // 执行镜像编译检查 + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a x86_64 \ + -t /usr1/openeuler/gcc/openeuler_gcc_x86_64 \ + -p x86-64 \ + -i openeuler-image \ + -s_in "$SHARE_DIR/${giteeTargetBranch}/sstate-cache/x86-64" \ + -d qemu-x86-64 > ${logDir}/${randomStr}.log + """, returnStatus: true) + + def check_res = "" + if (task_res_code == 0){ + check_res = "success" + }else{ + check_res = "failed" + } + // 对检查赋值 + archiveArtifacts "${logDir}/*.log" + STAGES_RES.push(formatRes("qemu-x86", "build", check_res, "artifact/${logDir}/${randomStr}.log")) + } + } + } + } + stage("hieulerpi1"){ + agent { node "${node}" } + when { + expression { + return env.pr_check_result.contains("code") + } + } + steps { + dir('/home/jenkins/agent'){ + script{ + downloadEmbeddedCI() + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + // 执行hieulerpi1编译 + // 下载yocto源码 + downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) + prepare_srccode("/home/jenkins") + def randomStr = getRandomStr() + def logDir = mkdirOpeneulerLog() + // 执行镜像编译检查 + def task_res_code = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_image \ + -a aarch64 \ + -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ + -p hieulerpi1 \ + -i openeuler-image \ + -s_in "$SHARE_DIR/${giteeTargetBranch}/sstate-cache/hieulerpi1" \ + -d hieulerpi1 > ${logDir}/${randomStr}.log + """, returnStatus: true) + + def check_res = "" + if (task_res_code == 0){ + check_res = "success" + }else{ + check_res = "failed" + } + // 对检查赋值 + archiveArtifacts "${logDir}/*.log" + STAGES_RES.push(formatRes("hieulerpi1", "build", check_res, "artifact/${logDir}/${randomStr}.log")) + } + } + } + } + } + } + } + post { + always { + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + string(credentialsId: "${giteeId}", variable: 'GITEETOKEN'), + usernamePassword(credentialsId: "${jenkinsId}", usernameVariable: 'JUSER',passwordVariable: 'JPASSWD')]){ + if (currentBuild.result != 'ABORTED') { + def chks = "" + for (int i = 0; i < STAGES_RES.size(); ++i) { + chks = "${chks} -chk ${STAGES_RES[i]}" + } + + def duration_time = System.currentTimeMillis() - currentBuild.startTimeInMillis + sh """ + python3 main.py comment \ + -m gate \ + -o $giteeTargetNamespace \ + -p $giteeRepoName \ + -pr $giteePullRequestid \ + -gt $GITEETOKEN \ + -dt $duration_time \ + $chks + """ + } + } + } + } + } + } +} diff --git a/.oebuild/workflows/jenkinsfile_gate_cache b/.oebuild/workflows/jenkinsfile_gate_cache new file mode 100644 index 0000000000000000000000000000000000000000..9c06774eb391f10fa74e19021ad02293fce407fb --- /dev/null +++ b/.oebuild/workflows/jenkinsfile_gate_cache @@ -0,0 +1,140 @@ +// this jenkinsfile is for src code and gate sstate cache +def BUILD_COM +def IMAGE_DATE = "" + +pipeline { + agent { node "${node}" } + environment { + PATH = "/home/jenkins/.local/bin:${env.PATH}" + } + stages { + stage("init-task"){ + steps{ + script{ + BUILD_COM = load '.oebuild/workflows/build_common.groovy' + IMAGE_DATE = BUILD_COM.getNowDatetime() + } + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + } + } + } + stage("build task"){ + parallel { + stage("qemu-aarch64"){ + agent { node "${node}" } + steps { + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + BUILD_COM.prepareSrcCode("/home/jenkins") + def random_str = BUILD_COM.getRandomStr() + def log_dir = BUILD_COM.mkdirOpeneulerLog() + + BUILD_COM.build_qemu_aarch64(IMAGE_DATE, log_dir, random_str) + } + } + } + } + stage("qemu-arm"){ + agent { node "${node}" } + steps { + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + BUILD_COM.prepareSrcCode("/home/jenkins") + def random_str = BUILD_COM.getRandomStr() + def log_dir = BUILD_COM.mkdirOpeneulerLog() + + // 执行qemu-arm镜像编译检查 + BUILD_COM.build_qemu_arm(IMAGE_DATE, log_dir, random_str) + } + } + } + } + stage("x86-64"){ + agent { node "${node}" } + steps { + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + BUILD_COM.prepareSrcCode("/home/jenkins") + def random_str = BUILD_COM.getRandomStr() + def log_dir = BUILD_COM.mkdirOpeneulerLog() + + // 执行x86-64镜像编译检查 + BUILD_COM.build_x86_64(IMAGE_DATE, log_dir, random_str) + } + } + } + } + stage("hieulerpi1"){ + agent { node "${node}" } + steps { + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + //下载yocto-meta-openeuler代码 + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) + BUILD_COM.prepareSrcCode("/home/jenkins") + def random_str = BUILD_COM.getRandomStr() + def log_dir = BUILD_COM.mkdirOpeneulerLog() + + BUILD_COM.build_hieulerpi1(IMAGE_DATE, log_dir, random_str) + } + } + } + } + } + } + } + post { + always { + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([ + string(credentialsId: "${giteeId}", variable: 'GITEETOKEN') + ]){ + def chks = "" + for (int i = 0; i < BUILD_COM.STAGES_RES.size(); ++i) { + chks = "${chks} -chk ${BUILD_COM.STAGES_RES[i]}" + } + sh """ + python3 main.py comment \ + -m ci \ + -o ${repoNamespace} \ + -p ${commentRepoName} \ + -b ${ciBranch} \ + -gt ${GITEETOKEN} \ + ${chks} + """ + } + } + } + } + } +} diff --git a/.oebuild/workflows/jenkinsfile_llvm_release b/.oebuild/workflows/jenkinsfile_llvm_release new file mode 100644 index 0000000000000000000000000000000000000000..c6593caff73d34c98f380ae60b06420d1c5cf278 --- /dev/null +++ b/.oebuild/workflows/jenkinsfile_llvm_release @@ -0,0 +1,163 @@ +def downloadEmbeddedCI(){ + sh 'rm -rf embedded-ci' + sh "git clone ${embeddedRemote} -b ${embeddedBranch} -v embedded-ci --depth=1" +} + +def downloadYoctoWithPr(String workspace, String namespace, String repo, Integer prnum, Integer deepth){ + sh """ + python3 main.py clone_repo \ + -w ${workspace} \ + -r https://gitee.com/${namespace}/${repo} \ + -p ${repo} \ + -pr ${prnum} \ + -dp ${deepth} + """ +} + +def createReleaseAndUploadFile(String yaml_path, String file_dir, gitee_token){ + sh """ + python3 main.py create_release \ + -gt ${gitee_token} \ + -y ${yaml_path} \ + -f ${file_dir} + """ +} + +pipeline { + agent { node "${node}" } + environment { + PATH = "/home/jenkins/.local/bin:${env.PATH}" + } + stages { + stage("check release"){ + steps{ + script{ + // 检查是否版本发布pr,并且是否是指定人 + def ptitle = "$pr_title" + if (ptitle.contains("版本升级到")){ + env.is_release = "true" + }else{ + env.is_release = "failed" + } + } + } + } + stage("download repo"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir('/home/jenkins/agent'){ + script{ + // 下载embedded-ci源码 + downloadEmbeddedCI() + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + // 下载yocto源码 + downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), Integer.parseInt(commitCount)) + } + } + } + } + stage("download aarch64 chains"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir('/home/jenkins/agent'){ + script{ + // 下载aarch64-toolchains二进制编译链 + sh """ + wget https://gitee.com/openeuler/yocto-meta-openeuler/releases/download/toolchains-v0.1.5/1_openeuler_gcc_arm64le.tar.gz + wget https://gitee.com/openeuler/yocto-meta-openeuler/releases/download/toolchains-v0.1.5/2_openeuler_gcc_arm64le.tar.gz + wget https://gitee.com/openeuler/yocto-meta-openeuler/releases/download/toolchains-v0.1.5/3_openeuler_gcc_arm64le.tar.gz + wget https://gitee.com/openeuler/yocto-meta-openeuler/releases/download/toolchains-v0.1.5/4_openeuler_gcc_arm64le.tar.gz + """ + // 拼接二进制文件 + sh """ + cat 1_openeuler_gcc_arm64le.tar.gz 2_openeuler_gcc_arm64le.tar.gz 3_openeuler_gcc_arm64le.tar.gz 4_openeuler_gcc_arm64le.tar.gz > openeuler_gcc_arm64le.tar.gz + rm 1_openeuler_gcc_arm64le.tar.gz 2_openeuler_gcc_arm64le.tar.gz 3_openeuler_gcc_arm64le.tar.gz 4_openeuler_gcc_arm64le.tar.gz + """ + // 解压二进制文件 + sh """ + tar zxf openeuler_gcc_arm64le.tar.gz + """ + } + } + } + } + stage("prepare source"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir('/home/jenkins/agent/yocto-meta-openeuler/.oebuild/llvm-toolchain'){ + sh """ + ./prepare.sh + """ + } + } + } + stage("build llvm toolchain"){ + when { + expression { + return env.is_release == "true" + } + } + + steps{ + dir("/home/jenkins/agent/yocto-meta-openeuler/.oebuild/llvm-toolchain/open_source/llvm-project"){ + script{ + sh """ + ./build.sh -e -o -s -i -b release -I clang-llvm-17.0.6 + cd clang-llvm-17.0.6 + mkdir lib64 aarch64-openeuler-linux-gnu + cp -rf /home/jenkins/agent/openeuler_gcc_arm64le/lib64/gcc lib64/ + cp -rf /home/jenkins/agent/openeuler_gcc_arm64le/aarch64-openeuler-linux-gnu/include aarch64-openeuler-linux-gnu/ + cp -rf /home/jenkins/agent/openeuler_gcc_arm64le/aarch64-openeuler-linux-gnu/sysroot aarch64-openeuler-linux-gnu/ + cd bin + ln -sf ld.lld aarch64-openeuler-linux-gnu-ld + """ + } + } + dir("/home/jenkins/agent/yocto-meta-openeuler/.oebuild/llvm-toolchain/open_source"){ + script{ + sh """ + cd llvm-project + tar zcf clang-llvm-17.0.6.tar.gz clang-llvm-17.0.6 + mkdir output + mv clang-llvm-17.0.6.tar.gz output + """ + } + } + } + } + stage("release llvm-toolchain"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([string(credentialsId: "${giteeId}", variable: 'GITEETOKEN')]){ + pre_path = "/home/jenkins/agent/yocto-meta-openeuler/.oebuild/llvm-toolchain" + sdkYamlPath = "${pre_path}/release.yaml" + fileDir = "${pre_path}/open_source/llvm-project/output" + createReleaseAndUploadFile(sdkYamlPath, fileDir, "$GITEETOKEN") + } + } + } + } + } + } +} diff --git a/.oebuild/workflows/jenkinsfile_nativesdk_release b/.oebuild/workflows/jenkinsfile_nativesdk_release new file mode 100644 index 0000000000000000000000000000000000000000..0bc518884d8f88ab23bdf96d03b28b2fc621bc15 --- /dev/null +++ b/.oebuild/workflows/jenkinsfile_nativesdk_release @@ -0,0 +1,112 @@ +def downloadEmbeddedCI(){ + sh 'rm -rf embedded-ci' + sh "git clone ${embeddedRemote} -b ${embeddedBranch} -v embedded-ci --depth=1" +} + +def downloadYoctoWithPr(String workspace, String namespace, String repo, Integer prnum, Integer deepth){ + sh """ + python3 main.py clone_repo \ + -w ${workspace} \ + -r https://gitee.com/${namespace}/${repo} \ + -p ${repo} \ + -pr ${prnum} \ + -dp ${deepth} + """ +} + +def createReleaseAndUploadFile(String yaml_path, String file_dir, gitee_token){ + sh """ + python3 main.py create_release \ + -gt ${gitee_token} \ + -y ${yaml_path} \ + -f ${file_dir} + """ +} + +pipeline { + agent { node "${node}" } + environment { + PATH = "/home/jenkins/.local/bin:${env.PATH}" + } + stages { + stage("check release"){ + steps{ + script{ + // 检查是否版本发布pr,并且是否是指定人 + def ptitle = "$pr_title" + // def action = "$pull_action" + // print(action) + if (ptitle.contains("版本升级到")){ + env.is_release = "true" + }else{ + env.is_release = "failed" + } + } + } + } + stage("download repo"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir('/home/jenkins/agent'){ + script{ + // 下载embedded-ci源码 + downloadEmbeddedCI() + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + // 下载yocto源码 + downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), Integer.parseInt(commitCount)) + } + } + } + } + stage("build sdk"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir("/home/jenkins/agent"){ + script{ + // 构建sdk + sh """ + oebuild init workspace + cd workspace/src + ln -s /home/jenkins/agent/yocto-meta-openeuler yocto-meta-openeuler + oebuild generate -t /usr1/openeuler/gcc/openeuler_gcc_arm64le -n /opt/buildtools/nativesdk -b_in host -d nativesdk -sdk + """ + } + } + } + } + stage("release nativesdk"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir('/home/jenkins/agent'){ + script{ + downloadEmbeddedCI() + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([string(credentialsId: "${giteeId}", variable: 'GITEETOKEN')]){ + sdkYamlPath = "/home/jenkins/agent/yocto-meta-openeuler/.oebuild/nativesdk/release.yaml" + fileDir = "/home/jenkins/agent/workspace/build/nativesdk/tmp/deploy/sdk" + createReleaseAndUploadFile(sdkYamlPath, fileDir, "$GITEETOKEN") + } + } + } + } + } + } +} \ No newline at end of file diff --git a/.oebuild/workflows/jenkinsfile_src_update b/.oebuild/workflows/jenkinsfile_src_update new file mode 100644 index 0000000000000000000000000000000000000000..68da5001387928bded41b871e98f91e1a9c9f4dc --- /dev/null +++ b/.oebuild/workflows/jenkinsfile_src_update @@ -0,0 +1,34 @@ +// this jenkinsfile is for src code download + +pipeline { + agent { node "${node}" } + environment { + PATH = "/home/jenkins/.local/bin:${env.PATH}" + } + stages { + stage("update src"){ + steps{ + dir(SHARE_DIR + "/" + ciBranch){ + script{ + sh """ + oebuild init oebuild_workspace + cd oebuild_workspace + pushd src + if [ -d "yocto-meta-openeuler" ];then + cd yocto-meta-openeuler + git checkout master + git pull + else + git clone https://gitee.com/openeuler/yocto-meta-openeuler + fi + popd + oebuild manifest download + tar zcf src.tar.gz --exclude="src/yocto-meta-openeuler" src + mv src.tar.gz $SHARE_DIR/$ciBranch/src.tar.gz + """ + } + } + } + } + } +} \ No newline at end of file diff --git a/.oebuild/workflows/jenkinsfile_toolchain_release b/.oebuild/workflows/jenkinsfile_toolchain_release new file mode 100644 index 0000000000000000000000000000000000000000..2d99ec56d8796f4582c1dc2e04a46ec580ac6531 --- /dev/null +++ b/.oebuild/workflows/jenkinsfile_toolchain_release @@ -0,0 +1,168 @@ +def downloadEmbeddedCI(){ + sh 'rm -rf embedded-ci' + sh "git clone ${embeddedRemote} -b ${embeddedBranch} -v embedded-ci --depth=1" +} + +def downloadYoctoWithPr(String workspace, String namespace, String repo, Integer prnum, Integer deepth){ + sh """ + python3 main.py clone_repo \ + -w ${workspace} \ + -r https://gitee.com/${namespace}/${repo} \ + -p ${repo} \ + -pr ${prnum} \ + -dp ${deepth} + """ +} + +def createReleaseAndUploadFile(String yaml_path, String file_dir, gitee_token){ + sh """ + python3 main.py create_release \ + -gt ${gitee_token} \ + -y ${yaml_path} \ + -f ${file_dir} + """ +} + +pipeline { + agent { node "${node}" } + environment { + PATH = "/home/jenkins/.local/bin:${env.PATH}" + } + stages { + stage("check release"){ + steps{ + script{ + // 检查是否版本发布pr,并且是否是指定人 + def ptitle = "$pr_title" + if (ptitle.contains("版本升级到")){ + env.is_release = "true" + }else{ + env.is_release = "failed" + } + } + } + } + stage("download repo"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir('/home/jenkins/agent'){ + script{ + // 下载embedded-ci源码 + downloadEmbeddedCI() + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + // 下载yocto源码 + downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), Integer.parseInt(commitCount)) + } + } + } + } + stage("prepare source"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir('/home/jenkins/agent/yocto-meta-openeuler/.oebuild/cross-tools'){ + sh """ + ./prepare.sh + ./update.sh + """ + } + } + } + stage("build toolchain"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir("/home/jenkins/agent/yocto-meta-openeuler/.oebuild/cross-tools"){ + script{ + // 构建aarch64-toolchain + sh """ + cp config_aarch64 .config + ct-ng build + """ + // 构建arm32-toolchain + sh """ + cp config_arm32 .config + ct-ng build + """ + // 构建x86-64-toolchain + sh """ + cp config_x86_64 .config + ct-ng build + """ + // 构建riscv64-toolchain + sh """ + cp config_riscv64 .config + ct-ng build + """ + } + } + } + } + stage("package toolchain"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir("/home/jenkins/x-tools"){ + // 打包aarch64-toolchain + sh """ + mv aarch64-openeuler-linux-gnu openeuler_gcc_arm64le + tar czf openeuler_gcc_arm64le.tar.gz openeuler_gcc_arm64le + sudo rm -rf openeuler_gcc_arm64le + """ + // 打包arm32-toolchain + sh """ + mv arm-openeuler-linux-gnueabi openeuler_gcc_arm32le + tar czf openeuler_gcc_arm32le.tar.gz openeuler_gcc_arm32le + sudo rm -rf openeuler_gcc_arm32le + """ + // 打包x86-64-toolchain + sh """ + mv x86_64-openeuler-linux-gnu openeuler_gcc_x86_64 + tar czf openeuler_gcc_x86_64.tar.gz openeuler_gcc_x86_64 + sudo rm -rf openeuler_gcc_x86_64 + """ + // 打包riscv64-toolchain + sh """ + mv riscv64-openeuler-linux-gnu openeuler_gcc_riscv64 + tar czf openeuler_gcc_riscv64.tar.gz openeuler_gcc_riscv64 + sudo rm -rf openeuler_gcc_riscv64 + """ + } + } + } + stage("release gcc-toolchain"){ + when { + expression { + return env.is_release == "true" + } + } + steps{ + dir('/home/jenkins/agent/embedded-ci'){ + script{ + withCredentials([string(credentialsId: "${giteeId}", variable: 'GITEETOKEN')]){ + sdkYamlPath = "/home/jenkins/agent/yocto-meta-openeuler/.oebuild/cross-tools/release.yaml" + fileDir = "/home/jenkins/x-tools" + createReleaseAndUploadFile(sdkYamlPath, fileDir, "$GITEETOKEN") + } + } + } + } + } + } +} \ No newline at end of file diff --git a/bsp/meta-hisilicon/COPYING.MIT b/bsp/meta-hisilicon/COPYING.MIT new file mode 100644 index 0000000000000000000000000000000000000000..fb950dc69feb8afa93493747f33d6e1c02659b55 --- /dev/null +++ b/bsp/meta-hisilicon/COPYING.MIT @@ -0,0 +1,17 @@ +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. diff --git a/bsp/meta-hisilicon/README b/bsp/meta-hisilicon/README new file mode 100644 index 0000000000000000000000000000000000000000..7f48e6f4b0a05f7ed7b6bfe9945ee9113a369ccc --- /dev/null +++ b/bsp/meta-hisilicon/README @@ -0,0 +1,41 @@ +This README file contains information on the contents of the meta-hisilicon layer. + +Please see the corresponding sections below for details. + +Dependencies +============ + + URI: + branch: + + URI: + branch: + + . + . + . + +Patches +======= + +Please submit any patches against the meta-hisilicon layer to the xxxx mailing list (xxxx@zzzz.org) +and cc: the maintainer: + +Maintainer: XXX YYYYYY + +Table of Contents +================= + + I. Adding the meta-hisilicon layer to your build + II. Misc + + +I. Adding the meta-hisilicon layer to your build +================================================= + +Run 'bitbake-layers add-layer meta-hisilicon' + +II. Misc +======== + +--- replace with specific information about the meta-hisilicon layer --- diff --git a/bsp/meta-hisilicon/conf/layer.conf b/bsp/meta-hisilicon/conf/layer.conf new file mode 100644 index 0000000000000000000000000000000000000000..a95d8da8bf860aa21ddc69edc26c287528c77f16 --- /dev/null +++ b/bsp/meta-hisilicon/conf/layer.conf @@ -0,0 +1,23 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "hisilicon" +BBFILE_PATTERN_hisilicon := "^${LAYERDIR}/" +BBFILE_PRIORITY_hisilicon = "6" + +LAYERDEPENDS_hisilicon = "core" +LAYERSERIES_COMPAT_hisilicon = "kirkstone" + +# enable .bb under qt5-layer/ when exist meta-qt5 +BBFILES_DYNAMIC += " \ +qt5-layer:${LAYERDIR}/dynamic-layers/qt5-layer/recipes-*/*/*.bb \ +qt5-layer:${LAYERDIR}/dynamic-layers/qt5-layer/recipes-*/*/*.bbappend \ +ros2-layer:${LAYERDIR}/dynamic-layers/ros2-layer/recipes-*/*/*.bb \ +ros2-layer:${LAYERDIR}/dynamic-layers/ros2-layer/recipes-*/*/*.bbappend \ +" + +PREFERRED_PROVIDER_libboundscheck = "hieulerpi1-user-driver" diff --git a/bsp/meta-hisilicon/conf/machine/hi3093.conf b/bsp/meta-hisilicon/conf/machine/hi3093.conf new file mode 100644 index 0000000000000000000000000000000000000000..40e873815204f2958cbe9e4268303217a1ee1403 --- /dev/null +++ b/bsp/meta-hisilicon/conf/machine/hi3093.conf @@ -0,0 +1,4 @@ +require conf/machine/include/hi3093.inc + +# auto load module during startup +KERNEL_MODULE_AUTOLOAD = " ${@bb.utils.contains('MCS_FEATURES', 'openamp', 'mcs_km', '', d)} " diff --git a/bsp/meta-hisilicon/conf/machine/hieulerpi1.conf b/bsp/meta-hisilicon/conf/machine/hieulerpi1.conf new file mode 100644 index 0000000000000000000000000000000000000000..b92f07d58df392f61e5a1f62596e05a1cd62d08a --- /dev/null +++ b/bsp/meta-hisilicon/conf/machine/hieulerpi1.conf @@ -0,0 +1,29 @@ +require conf/machine/include/arm/armv8-2a/tune-cortexa55.inc +MACHINE_FEATURES += "efi pci" +MACHINEOVERRIDES =. "hieulerpi1:march64le:" +DEFAULTTUNE = "aarch64" + +require conf/multilib.conf +# currently, don't support 32 bit libs +MULTILIBS = "" + +ROOTFS_PACKAGE_ARCH = "aarch64" + +# set IMAGETYPE and dtb +KERNEL_IMAGETYPE = "Image" +# choose dtb file +KERNEL_DEVICETREE = "" +ENABLE_UART = "1" +# serial port enabled in hieulerpi1 +CMDLINE_SERIAL = "ttyAMA0,115200" +SERIAL_CONSOLES = "115200;ttyAMA0" + +# arm and arm64 both support -mlittle-endian so no +# need to consider compat32. +TUNE_CCARGS .= " -mlittle-endian" +IMAGE_INSTALL:append = " kernel-modules" + +# auto load module during startup +KERNEL_MODULE_AUTOLOAD = "" +USE_VT ?= "0" + diff --git a/bsp/meta-hisilicon/conf/machine/include/hi3093.inc b/bsp/meta-hisilicon/conf/machine/include/hi3093.inc new file mode 100644 index 0000000000000000000000000000000000000000..1e8799f4a3a7e9b9fee42a2aef8214414defb66f --- /dev/null +++ b/bsp/meta-hisilicon/conf/machine/include/hi3093.inc @@ -0,0 +1,34 @@ +require conf/machine/include/arm/armv8-2a/tune-cortexa55.inc +MACHINE_FEATURES += "efi pci vc4graphics" +MACHINEOVERRIDES =. "hi3093:march64le:" +DEFAULTTUNE = "aarch64" + +require conf/multilib.conf +# currently, don't support 32 bit libs +MULTILIBS = "" + +ROOTFS_PACKAGE_ARCH = "aarch64" + +# set IMAGETYPE and dtb +KERNEL_IMAGETYPE = "zImage" +# choose dtb file +KERNEL_DEVICETREE = "" +ENABLE_UART = "1" +# serial port enabled in hi3093 +CMDLINE_SERIAL = "ttyS0,115200" +SERIAL_CONSOLES = "115200;ttyS0" + +# arm and arm64 both support -mlittle-endian so no +# need to consider compat32. +TUNE_CCARGS .= " -mlittle-endian" +IMAGE_INSTALL:append = " kernel-modules" + +# auto load module during startup +KERNEL_MODULE_AUTOLOAD = "" +USE_VT ?= "0" + +# set MCS_FEATURES +# hi3093 only supports the "openamp" mechanism, +# and client os only supports uniproton +MCS_FEATURES = "openamp" +MCS_FEATURES := "${@bb.utils.contains('DISTRO_FEATURES', 'mcs', '${MCS_FEATURES}', '', d)}" diff --git a/bsp/meta-hisilicon/dynamic-layers/qt5-layer/recipes-qt/qt5/qtbase_%.bbappend b/bsp/meta-hisilicon/dynamic-layers/qt5-layer/recipes-qt/qt5/qtbase_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..e9e0825ae440237ee06d4fbabdc4a8f925972267 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/qt5-layer/recipes-qt/qt5/qtbase_%.bbappend @@ -0,0 +1,5 @@ +# not enable systemd +PACKAGECONFIG:remove = "udev libinput" + +# enable linuxfb platform +PACKAGECONFIG:append = " linuxfb" diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-core/images/image-hi3093.inc b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-core/images/image-hi3093.inc new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-msgs_1.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-msgs_1.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..2ccdf65c5efe2c678633be4c8e4188e575971b79 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-msgs_1.0.1.bb @@ -0,0 +1,77 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "A package containing orbbec camera messages definitions." +AUTHOR = "Joe Dong" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=dc598af4b0c94a75cbcc6b3d79c24b12" + +ROS_CN = "" +PV = "1.0.1" +ROS_BPN = "astra-camera-msgs" + +ROS_BUILD_DEPENDS = " \ + rosidl-default-generators \ + sensor-msgs \ + std-msgs \ + rosidl-adapter-native \ + ament-cmake-ros-native \ + python3-numpy-native \ + rosidl-generator-c-native \ + rosidl-generator-cpp-native \ + rosidl-typesupport-fastrtps-c-native \ + rosidl-typesupport-fastrtps-cpp-native \ + rosidl-typesupport-introspection-cpp-native \ + rosidl-typesupport-cpp-native \ + rosidl-generator-py-native \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + rosidl-default-runtime \ + sensor-msgs \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + rosidl-default-runtime \ + sensor-msgs \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_3rdparty_sensors" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/3d_camera/astra_camera/ros2_astra_camera/astra_camera_msgs \ +" +FILES:${PN} += "${datadir}" + +S = "${WORKDIR}/hieuler_3rdparty_sensors/3d_camera/astra_camera/ros2_astra_camera/astra_camera_msgs" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-raw_1.1.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-raw_1.1.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..b8606bb24752e4af31f3d1e22c5bba4c0a1c36d1 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-raw_1.1.0.bb @@ -0,0 +1,134 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "Joe Dong" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "1.1.0" +ROS_BPN = "astra-camera-raw" + +ROS_BUILD_DEPENDS = " \ + nlohmann-json \ + libuvc \ + glog \ + magic-enum \ + astra-camera-msgs \ + builtin-interfaces \ + camera-info-manager \ + class-loader \ + cv-bridge \ + image-geometry \ + image-publisher \ + image-transport \ + message-filters \ + rclcpp \ + rclcpp-components \ + sensor-msgs \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-msgs \ + tf2-ros \ + tf2-sensor-msgs \ + tf2-eigen \ + libeigen \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + eigen3-cmake-module-native \ +" + +ROS_EXPORT_DEPENDS = " \ + astra-camera-msgs \ + builtin-interfaces \ + camera-info-manager \ + class-loader \ + cv-bridge \ + image-geometry \ + image-publisher \ + image-transport \ + message-filters \ + rclcpp \ + rclcpp-components \ + sensor-msgs \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-msgs \ + tf2-ros \ + tf2-sensor-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = " \ + eigen3-cmake-module-native \ +" + +ROS_EXEC_DEPENDS = " \ + nlohmann-json \ + libuvc \ + glog \ + magic-enum \ + astra-camera-msgs \ + builtin-interfaces \ + camera-info-manager \ + class-loader \ + cv-bridge \ + image-geometry \ + image-publisher \ + image-transport \ + message-filters \ + rclcpp \ + rclcpp-components \ + sensor-msgs \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-msgs \ + tf2-ros \ + tf2-sensor-msgs \ + tf2-eigen \ + libeigen \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_3rdparty_sensors" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/3d_camera/astra_camera/ros2_astra_camera/astra_camera_raw \ + file://astra_camera_raw_fix.patch \ +" + +FILES:${PN} += "${datadir} ${libdir}/astra_camera_raw/* ${libdir}/OpenNI2/Drivers/*" +INSANE_SKIP:${PN}-dev += "staticdev arch dev-elf" + +# astra_camera is included in other pkg +do_install:append(){ + if [ -d ${D}${includedir}/astra_camera ]; then + rm -rf ${D}${includedir}/astra_camera + fi +} + +S = "${WORKDIR}/hieuler_3rdparty_sensors/3d_camera/astra_camera/ros2_astra_camera/astra_camera_raw" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/depth-image_0.1.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/depth-image_0.1.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..869691369f9a38c65d3ca158bdc4a4653f8e3576 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/depth-image_0.1.0.bb @@ -0,0 +1,88 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "The range package" +AUTHOR = "chen" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=13;endline=13;md5=2c00b8d2854109dbebef7818b4dae1e2" + +ROS_CN = "" +PV = "0.1.0" +ROS_BPN = "depth-image" + +ROS_BUILD_DEPENDS = " \ + camera-info-manager \ + cv-bridge \ + geometry-msgs \ + image-transport \ + nav-msgs \ + rclcpp \ + rclpy \ + sensor-msgs \ + serial \ + std-msgs \ + tf2 \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + camera-info-manager \ + cv-bridge \ + geometry-msgs \ + image-transport \ + nav-msgs \ + rclcpp \ + rclpy \ + sensor-msgs \ + serial \ + std-msgs \ + tf2 \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + camera-info-manager \ + cv-bridge \ + geometry-msgs \ + image-transport \ + nav-msgs \ + rclcpp \ + rclpy \ + sensor-msgs \ + serial \ + std-msgs \ + tf2 \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_3rdparty_sensors" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/2d_tof/ol_tof \ +" + +S = "${WORKDIR}/hieuler_3rdparty_sensors/2d_tof/ol_tof" +DISABLE_OPENEULER_SOURCE_MAP = "1" +FILES:${PN} += "${datadir} ${libdir}/depth_image/depth" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/files/astra_camera_raw_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/files/astra_camera_raw_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..a7e1b283a486eecc30b491f29ec278c19060b59b --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/files/astra_camera_raw_fix.patch @@ -0,0 +1,73 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -41,19 +44,24 @@ find_package(tf2_ros REQUIRED) + find_package(tf2_sensor_msgs REQUIRED) + find_package(PkgConfig REQUIRED) + +-pkg_search_module(LIBUVC REQUIRED libuvc) +-if (NOT LIBUVC_FOUND) +- message(FATAL_ERROR "libuvc is not found") +-endif () +-pkg_search_module(GLOG REQUIRED libglog) ++find_package(libuvc REQUIRED) ++find_package(glog REQUIRED) + +-if (NOT GLOG_FOUND) +- message(FATAL_ERROR "glog is not found") +-endif () ++#pkg_search_module(LIBUVC REQUIRED libuvc) ++#if (NOT LIBUVC_FOUND) ++# message(FATAL_ERROR "libuvc is not found") ++#endif () ++#pkg_search_module(GLOG REQUIRED libglog) ++ ++#if (NOT GLOG_FOUND) ++# message(FATAL_ERROR "glog is not found") ++#endif () + + +-execute_process(COMMAND uname -m OUTPUT_VARIABLE MACHINES) +-execute_process(COMMAND getconf LONG_BIT OUTPUT_VARIABLE MACHINES_BIT) ++#execute_process(COMMAND uname -m OUTPUT_VARIABLE MACHINES) ++#execute_process(COMMAND getconf LONG_BIT OUTPUT_VARIABLE MACHINES_BIT) ++set(MACHINES aarch64) ++set(MACHINES_BIT 64) + message(STATUS "ORRBEC Machine : ${MACHINES}") + message(STATUS "ORRBEC Machine Bits : ${MACHINES_BIT}") + +@@ -129,6 +137,8 @@ target_link_libraries(${PROJECT_NAME} + Eigen3::Eigen + ${GLOG_LIBRARIES} + ${LIBUVC_LIBRARIES} ++ -luvc ++ -lglog + -lOpenNI2 + -L${ORBBEC_OPENNI2_REDIST} + ) +@@ -157,6 +167,8 @@ target_link_libraries(${PROJECT_NAME}_node + ${GLOG_LIBRARIES} + ${LIBUVC_LIBRARIES} + -lOpenNI2 ++ -luvc ++ -lglog + -L${ORBBEC_OPENNI2_REDIST} + ${PROJECT_NAME} + ) +@@ -181,6 +193,8 @@ target_link_libraries(list_devices_node + Eigen3::Eigen + ${GLOG_LIBRARIES} + ${LIBUVC_LIBRARIES} ++ -luvc ++ -lglog + -lOpenNI2 + -L${ORBBEC_OPENNI2_REDIST} + ${PROJECT_NAME} +@@ -208,6 +222,8 @@ target_link_libraries(clean_shm_node + Eigen3::Eigen + ${GLOG_LIBRARIES} + ${LIBUVC_LIBRARIES} ++ -luvc ++ -lglog + -lOpenNI2 + -L${ORBBEC_OPENNI2_REDIST} + ${PROJECT_NAME} diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/fitxxx_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/fitxxx_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..c90ae7ce246b7013930860ab54edfae04210cc85 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/fitxxx_0.0.1.bb @@ -0,0 +1,68 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "ROS driver for fitxxx laser." +AUTHOR = "Zhigang Wu" +ROS_AUTHOR = "Zhigang Wu, " +HOMEPAGE = "http://" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=10;endline=10;md5=6502ff61cb1ae6c791640a0afbea6cf0" + +ROS_CN = "" +PV = "0.0.1" +ROS_BPN = "fitxxx" + +ROS_BUILD_DEPENDS = " \ + rclcpp \ + console-bridge \ + sensor-msgs \ + std-srvs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + rclcpp \ + console-bridge \ + sensor-msgs \ + std-srvs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + rclcpp \ + console-bridge \ + sensor-msgs \ + std-srvs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_3rdparty_sensors" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/lidar/fitxxx \ +" + +S = "${WORKDIR}/hieuler_3rdparty_sensors/lidar/fitxxx" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/imu-calib_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/imu-calib_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..8636da000a92279046e35fbe394f398bb9c60e4a --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/imu-calib_0.0.0.bb @@ -0,0 +1,68 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "Package for computing and applying IMU calibrations" +AUTHOR = "Daniel Koch" +ROS_AUTHOR = "Daniel Koch, " +SECTION = "devel" +LICENSE = "BSD" +LIC_FILES_CHKSUM = "file://package.xml;beginline=10;endline=10;md5=d566ef916e9dedc494f5f793a6690ba5" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "imu-calib" + +ROS_BUILD_DEPENDS = " \ + libeigen \ + rclcpp \ + sensor-msgs \ + yaml-cpp-vendor \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + libeigen \ + rclcpp \ + sensor-msgs \ + yaml-cpp-vendor \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + libeigen \ + rclcpp \ + sensor-msgs \ + yaml-cpp-vendor \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_3rdparty_sensors" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/imu/imu_process/imu_calib \ +" + +S = "${WORKDIR}/hieuler_3rdparty_sensors/imu/imu_process/imu_calib" +DISABLE_OPENEULER_SOURCE_MAP = "1" +FILES:${PN} += "${datadir} ${libdir}/imu_calib/*" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/lsm10-v2_2.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/lsm10-v2_2.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..e16596c40df2b471eb48cd0f808c155586edd1cc --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/lsm10-v2_2.0.0.bb @@ -0,0 +1,86 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "The lsm10_v2 package" +AUTHOR = "tongsky" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=2feaf30a620f46f06a4b016624acf46f" + +ROS_CN = "" +PV = "2.0.0" +ROS_BPN = "lsm10-v2" + +ROS_BUILD_DEPENDS = " \ + geometry-msgs \ + rclcpp \ + rclpy \ + rosidl-default-generators \ + rosidl-default-runtime \ + sensor-msgs \ + std-msgs \ + std-srvs \ + visualization-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ + rosidl-typesupport-fastrtps-cpp-native \ + rosidl-typesupport-fastrtps-c-native \ +" + +ROS_EXPORT_DEPENDS = " \ + geometry-msgs \ + rclcpp \ + rclpy \ + rosidl-default-generators \ + rosidl-default-runtime \ + sensor-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + geometry-msgs \ + rclcpp \ + rclpy \ + rosidl-default-generators \ + rosidl-default-runtime \ + sensor-msgs \ + std-msgs \ + std-srvs \ + visualization-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-cmake-gtest \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_3rdparty_sensors" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/lidar/ls_lidar \ +" + +S = "${WORKDIR}/hieuler_3rdparty_sensors/lidar/ls_lidar" +DISABLE_OPENEULER_SOURCE_MAP = "1" +FILES:${PN} += "${datadir} ${libdir}/lsm10_v2/*" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/serial-imu_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/serial-imu_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..90cd57a71c486d63746278e3930e8fd4b9dc807d --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/serial-imu_0.0.0.bb @@ -0,0 +1,70 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "serial imu data " +AUTHOR = "linux" +SECTION = "devel" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=08089942be34a90341784faa0455623f" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "serial-imu" + +ROS_BUILD_DEPENDS = " \ + rclcpp \ + sensor-msgs \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ + rosidl-typesupport-fastrtps-cpp-native \ + rosidl-typesupport-fastrtps-c-native \ +" + +ROS_EXPORT_DEPENDS = " \ + rclcpp \ + sensor-msgs \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + rclcpp \ + sensor-msgs \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_3rdparty_sensors" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/imu/imu_serial/hipnuc_imu \ +" + +S = "${WORKDIR}/hieuler_3rdparty_sensors/imu/imu_serial/hipnuc_imu" +FILES:${PN} += "${datadir} ${libdir}/serial_imu/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/sllidar-ros2_1.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/sllidar-ros2_1.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..f813a40d960839e9c07da3c92edd55732e3001c2 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/sllidar-ros2_1.0.1.bb @@ -0,0 +1,64 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = " The rplidar ros2 package, support rplidar A2/A1 and A3/S1 " +AUTHOR = "Slamtec ROS Maintainer" +SECTION = "devel" +LICENSE = "BSD" +LIC_FILES_CHKSUM = "file://package.xml;beginline=10;endline=10;md5=d566ef916e9dedc494f5f793a6690ba5" + +ROS_CN = "" +PV = "1.0.1" +ROS_BPN = "sllidar-ros2" + +ROS_BUILD_DEPENDS = " \ + rclcpp \ + sensor-msgs \ + std-srvs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + rclcpp \ + sensor-msgs \ + std-srvs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + rclcpp \ + sensor-msgs \ + std-srvs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_3rdparty_sensors" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/lidar/slamtec_lidar \ +" + +S = "${WORKDIR}/hieuler_3rdparty_sensors/lidar/slamtec_lidar" +FILES:${PN} += "${datadir} ${libdir}/sllidar_ros2/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/wr-ls-udp_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/wr-ls-udp_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..5ff02128c6ccb6cc9d2d6ee6bfe98de8e27c728f --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/wr-ls-udp_0.0.0.bb @@ -0,0 +1,70 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "xtark" +SECTION = "devel" +LICENSE = "MulanPSL-2.0 " +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "wr-ls-udp" + +ROS_BUILD_DEPENDS = " \ + diagnostic-updater \ + libusb1 \ + rclcpp \ + sensor-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + diagnostic-updater \ + libusb1 \ + rclcpp \ + sensor-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + diagnostic-updater \ + libusb1 \ + rclcpp \ + sensor-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_3rdparty_sensors" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/lidar/wr_ls_udp \ +" + +S = "${WORKDIR}/hieuler_3rdparty_sensors/lidar/wr_ls_udp" +FILES:${PN} += "${datadir} ${libdir}/wr_ls_udp/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/ydlidar-ros2-driver_%.bbappend b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/ydlidar-ros2-driver_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..7bad44427b42c67f7f9c3de51818fdf7ff520b3a --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/ydlidar-ros2-driver_%.bbappend @@ -0,0 +1,11 @@ +OPENEULER_LOCAL_NAME = "hieuler_3rdparty_sensors" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/lidar/eai_lidar \ +" + +S = "${WORKDIR}/hieuler_3rdparty_sensors/lidar/eai_lidar" + +SRC_URI:remove = " \ + file://00-ydlidar-ros2-driver-fix-error.patch \ +" + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter-msgs_0.1.2.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter-msgs_0.1.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..1f7d08fe187bcc1d6c29288002fb4caa1fced847 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter-msgs_0.1.2.bb @@ -0,0 +1,75 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "Package containing message types for costmap conversion" +AUTHOR = "Christoph Rösmann" +SECTION = "devel" +LICENSE = "BSD" +LIC_FILES_CHKSUM = "file://package.xml;beginline=9;endline=9;md5=d566ef916e9dedc494f5f793a6690ba5" + +ROS_CN = "" +PV = "0.1.2" +ROS_BPN = "costmap-converter-msgs" + +ROS_BUILD_DEPENDS = " \ + builtin-interfaces \ + geometry-msgs \ + rosidl-default-runtime \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + builtin-interfaces \ + geometry-msgs \ + rosidl-default-runtime \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + builtin-interfaces \ + geometry-msgs \ + rosidl-default-runtime \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "oee_archive" +OEE_ARCHIVE_SUBDIR = "costmap_converter" + +DISABLE_OPENEULER_SOURCE_MAP = "1" + +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/costmap_converter/costmap_converter-9565858.tar.gz \ +" + +S = "${WORKDIR}/costmap_converter/costmap_converter_msgs" + +FILES:${PN} += "${datadir}" + +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter_0.1.2.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter_0.1.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..14d000c089e5da6697120cc836e81515af96c978 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter_0.1.2.bb @@ -0,0 +1,87 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = " A ros package that includes plugins and nodes to convert occupied costmap2d cells to primitive types. " +AUTHOR = "Christoph Rösmann" +ROS_AUTHOR = "Otniel Rinaldo, Franz Albers, Christoph Rösmann, " +HOMEPAGE = "http://wiki.ros.org/costmap_converter" +SECTION = "devel" +LICENSE = "BSD" +LIC_FILES_CHKSUM = "file://package.xml;beginline=16;endline=16;md5=d566ef916e9dedc494f5f793a6690ba5" + +ROS_CN = "" +PV = "0.1.2" +ROS_BPN = "costmap-converter" + +ROS_BUILD_DEPENDS = " \ + class-loader \ + costmap-converter-msgs \ + cv-bridge \ + geometry-msgs \ + nav2-costmap-2d \ + pluginlib \ + rclcpp \ + tf2 \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + class-loader \ + costmap-converter-msgs \ + cv-bridge \ + geometry-msgs \ + nav2-costmap-2d \ + pluginlib \ + rclcpp \ + tf2 \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + class-loader \ + costmap-converter-msgs \ + cv-bridge \ + geometry-msgs \ + nav2-costmap-2d \ + pluginlib \ + rclcpp \ + tf2 \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-cmake-gtest \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "oee_archive" + +DISABLE_OPENEULER_SOURCE_MAP = "1" + +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/costmap_converter/costmap_converter-9565858.tar.gz \ +" + +S = "${WORKDIR}/costmap_converter/costmap_converter" + +FILES:${PN} += "${datadir}" + +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-local-planner_0.9.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-local-planner_0.9.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..b6daab0f510a6487cf4bbdfb073189e06a17cfc9 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-local-planner_0.9.1.bb @@ -0,0 +1,128 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = " The teb_local_planner package implements a plugin to the base_local_planner of the 2D navigation stack. The underlying method called Timed Elastic Band locally optimizes the robot's trajectory with respect to trajectory execution time, separation from obstacles and compliance with kinodynamic constraints at runtime. " +AUTHOR = "Christoph Rösmann" +ROS_AUTHOR = "Christoph Rösmann, " +HOMEPAGE = "http://wiki.ros.org/teb_local_planner" +SECTION = "devel" +LICENSE = "BSD" +LIC_FILES_CHKSUM = "file://package.xml;beginline=17;endline=17;md5=d566ef916e9dedc494f5f793a6690ba5" + +ROS_CN = "" +PV = "0.9.1" +ROS_BPN = "teb-local-planner" + +ROS_BUILD_DEPENDS = " \ + builtin-interfaces \ + costmap-converter \ + costmap-converter-msgs \ + dwb-critics \ + geometry-msgs \ + libg2o \ + nav2-bringup \ + nav2-core \ + nav2-costmap-2d \ + nav2-msgs \ + nav2-util \ + pluginlib \ + rclcpp \ + rclcpp-action \ + rclcpp-lifecycle \ + std-msgs \ + teb-msgs \ + tf2 \ + tf2-eigen \ + visualization-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + builtin-interfaces \ + costmap-converter \ + costmap-converter-msgs \ + dwb-critics \ + geometry-msgs \ + libg2o \ + nav2-bringup \ + nav2-core \ + nav2-costmap-2d \ + nav2-msgs \ + nav2-util \ + pluginlib \ + rclcpp \ + rclcpp-action \ + rclcpp-lifecycle \ + std-msgs \ + teb-msgs \ + tf2 \ + tf2-eigen \ + visualization-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + builtin-interfaces \ + costmap-converter \ + costmap-converter-msgs \ + dwb-critics \ + geometry-msgs \ + libg2o \ + nav2-bringup \ + nav2-core \ + nav2-costmap-2d \ + nav2-msgs \ + nav2-util \ + pluginlib \ + rclcpp \ + rclcpp-action \ + rclcpp-lifecycle \ + std-msgs \ + teb-msgs \ + tf2 \ + tf2-eigen \ + visualization-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-cmake-gtest \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "oee_archive" +OEE_ARCHIVE_SUBDIR = "teb_local_planner" + +DISABLE_OPENEULER_SOURCE_MAP = "1" + +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/teb_local_planner/teb_local_planner-630a22e.tar.gz \ +" + +S = "${WORKDIR}/teb_local_planner/teb_local_planner" + +DEPENDS += "ceres-solver" + +FILES:${PN} += "${datadir} ${libdir}/teb_local_planner/*.py" + +CXXFLAGS += " -Wno-error=deprecated -Wno-error=maybe-uninitialized -Wno-error=deprecated-declarations -Wno-error=format-security" + +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-msgs_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-msgs_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..43406a48b168b1ead3d32e552da4a07d079b2c3c --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-msgs_0.0.1.bb @@ -0,0 +1,78 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "A package containing message definitions for teb_local_planner." +AUTHOR = "Vinnam Kim" +SECTION = "devel" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=12c26a18c7f493fdc7e8a93b16b7c04f" + +ROS_CN = "" +PV = "0.0.1" +ROS_BPN = "teb-msgs" + +ROS_BUILD_DEPENDS = " \ + builtin-interfaces \ + costmap-converter-msgs \ + geometry-msgs \ + rosidl-default-runtime \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + builtin-interfaces \ + costmap-converter-msgs \ + geometry-msgs \ + rosidl-default-runtime \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + builtin-interfaces \ + costmap-converter-msgs \ + geometry-msgs \ + rosidl-default-runtime \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "oee_archive" +OEE_ARCHIVE_SUBDIR = "teb_local_planner" + +DISABLE_OPENEULER_SOURCE_MAP = "1" + +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/teb_local_planner/teb_local_planner-630a22e.tar.gz \ +" + +S = "${WORKDIR}/teb_local_planner/teb_msgs" + +FILES:${PN} += "${datadir}" + +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-interface_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-interface_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..7e958d26aa31758bd25c4b3449a27c6ebdcbca59 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-interface_0.0.0.bb @@ -0,0 +1,66 @@ +# hieuler_component_ai/sample/barcode_interface/barcode-interface_0.0.0.bb +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "root" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "barcode-interface" + +ROS_BUILD_DEPENDS = " \ + rosidl-default-runtime \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + rosidl-default-runtime \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + rosidl-default-runtime \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" +SRC_URI = " \ + file://hieuler_component_ai/sample/barcode_interface \ +" + +S = "${WORKDIR}/hieuler_component_ai/sample/barcode_interface" +FILES:${PN} += "${datadir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-node_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..54e9767a05b283cc98c5d447b44be09488cdcb12 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-node_0.0.0.bb @@ -0,0 +1,105 @@ +# hieuler_component_ai/sample/barcode_detection/demo_ros2/barcode_node/barcode-node_0.0.0.bb +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "root" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "barcode-node" + +ROS_BUILD_DEPENDS = " \ + builtin-interfaces \ + rosidl-default-runtime \ + rclcpp \ + barcode-interface \ + camera \ + mipi-camera \ + zxing \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ + rosidl-default-runtime \ + rosidl-adapter-native \ + ament-cmake-ros-native \ + rosidl-generator-c-native \ + rosidl-generator-cpp-native \ + rosidl-typesupport-fastrtps-c-native \ + rosidl-typesupport-fastrtps-cpp-native \ + rosidl-typesupport-introspection-cpp-native \ + rosidl-typesupport-cpp-native \ + rosidl-generator-py-native \ +" + +ROS_EXPORT_DEPENDS = " \ + rosidl-default-runtime \ + barcode-interface \ + camera \ + mipi-camera \ + zxing \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + builtin-interfaces \ + rosidl-default-runtime \ + rclcpp \ + barcode-interface \ + camera \ + mipi-camera \ + zxing \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" +SRC_URI = " \ + file://hieuler_component_ai/sample/barcode_detection/demo_ros2/barcode_node \ + file://hieuler_component_ai/sample/zxing/src/zxing-cpp-1.4.0.zip \ + file://hieuler_component_ai \ + file://barcode_node_fix.patch \ +" + +do_unpack:append() { + bb.build.exec_func('do_copy_zxing_source', d) +} + +do_copy_zxing_source() { + if [ ! -e ${WORKDIR}/hieuler_component_ai/sample/zxing/src/zxing-cpp-1.4.0/CMakeLists.txt ];then + mv ${WORKDIR}/zxing-cpp-1.4.0 ${WORKDIR}/hieuler_component_ai/sample/zxing/src + fi +} + +S = "${WORKDIR}/hieuler_component_ai/sample/barcode_detection/demo_ros2/barcode_node" +FILES:${PN} += "${datadir} ${libdir}/barcode_node/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/camera_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/camera_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..13e31580ab9b1c1b3867ddcb81716fafeefbd243 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/camera_0.0.0.bb @@ -0,0 +1,61 @@ +# hieuler_component_ai/sample/camera/camera_0.0.0.bb +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "camera" +AUTHOR = "root" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "camera" + +ROS_BUILD_DEPENDS = " \ + hieulerpi1-user-driver \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = "" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + hieulerpi1-user-driver \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" +SRC_URI = " \ + file://hieuler_component_ai/sample/camera \ + file://hieuler_component_ai \ + file://camera_fix.patch \ +" + +S = "${WORKDIR}/hieuler_component_ai/sample/camera" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/barcode_node_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/barcode_node_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..27ed40c816af08d7bb506f2fafd952dcd727e285 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/barcode_node_fix.patch @@ -0,0 +1,32 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -13,6 +13,7 @@ find_package(mipi_camera REQUIRED) + find_package(camera REQUIRED) + find_package(zxing REQUIRED) + find_package(barcode_interface REQUIRED) ++find_package(std_msgs REQUIRED) + + # uncomment the following section in order to fill in + # further dependencies manually. +@@ -22,10 +23,8 @@ set(AI_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../) + set(ZXING_ROOT ${AI_ROOT}/sample/zxing/src/zxing-cpp-1.4.0/core/src/) + set(COMMON_ROOT ${AI_ROOT}/component/common/) + set(BARCODE_ROOT ${AI_ROOT}/component/barcode_detection/) +-set(SDK_ROOT ${AI_ROOT}/../../3rdparty/platform/ss928/org/smp/a55_linux/) + link_directories( +- ${SDK_ROOT}/mpp/out/lib +- ${SDK_ROOT}/mpp/out/lib/svp_npu ++ ${CMAKE_SYSROOT}/usr/lib/svp_npu + ${AI_ROOT}/sample/mipi_camera/src/ffmpeglib/lib + ) + +--- a/package.xml ++++ b/package.xml +@@ -15,6 +15,7 @@ + camera + zxing + barcode_interface ++ std_msgs + + ament_cmake + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/camera_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/camera_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..d26795a7d3efff1dd03f382b2bf8c7b8528f1176 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/camera_fix.patch @@ -0,0 +1,18 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -13,7 +13,6 @@ find_package(ament_cmake REQUIRED) + # find_package( REQUIRED) + set(SRC_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/src) + set(AI_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../) +-set(SDK_ROOT ${AI_ROOT}/../../3rdparty/platform/ss928/org/smp/a55_linux/) + + add_compile_options(-fvisibility=hidden) + +@@ -71,7 +70,6 @@ target_link_libraries(camera + target_include_directories(camera PUBLIC + $ + $ +- $ + $ + $ + $ diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/gst_node_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/gst_node_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..b2b92cdeb72568bde89c3e11e95fda161f718961 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/gst_node_fix.patch @@ -0,0 +1,40 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -11,17 +11,16 @@ find_package(ament_cmake REQUIRED) + find_package(rclcpp REQUIRED) + find_package(mipi_camera REQUIRED) + find_package(camera REQUIRED) ++find_package(std_msgs REQUIRED) + # uncomment the following section in order to fill in + # further dependencies manually. + # find_package( REQUIRED) + + set(AI_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../) +-set(SDK_ROOT ${AI_ROOT}/../../3rdparty/platform/ss928/org/smp/a55_linux/) + set(GST_ROOT ${AI_ROOT}/component/gesture_detection/) + + link_directories( +- ${SDK_ROOT}/mpp/out/lib +- ${SDK_ROOT}/mpp/out/lib/npu/stub ++ ${CMAKE_SYSROOT}/usr/lib/npu/stub + ${GST_ROOT}/lib + ${AI_ROOT}/sample/camera/src/ffmpeglib/lib + ) +@@ -33,7 +32,6 @@ add_executable(gst_node + ${CMAKE_CURRENT_SOURCE_DIR}/../../../common/ivp_draw.cpp) + + target_include_directories(gst_node PUBLIC +- $ + $ + $ + $ +--- a/package.xml ++++ b/package.xml +@@ -12,6 +12,7 @@ + ament_lint_auto + ament_lint_common + mipi_camera ++ std_msgs + camera + + ament_cmake diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/mipi_camera_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/mipi_camera_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..ab7e58199d26f8e213ec871d41664fc413f16c6c --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/mipi_camera_fix.patch @@ -0,0 +1,18 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -13,7 +13,6 @@ find_package(ament_cmake REQUIRED) + # find_package( REQUIRED) + set(SRC_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/src) + set(AI_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../) +-set(SDK_ROOT ${AI_ROOT}/../../3rdparty/platform/ss928/org/smp/a55_linux/) + + add_compile_options(-fvisibility=hidden) + +@@ -70,7 +69,6 @@ target_link_libraries(mipi_camera + target_include_directories(mipi_camera PUBLIC + $ + $ +- $ + $ + $ + $ diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/object_node_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/object_node_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..4b347981eb1e1bd861b8b80c61ae8cf050e97d83 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/object_node_fix.patch @@ -0,0 +1,54 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -10,13 +10,13 @@ find_package(ament_cmake REQUIRED) + find_package(rclcpp REQUIRED) + find_package(mipi_camera REQUIRED) + find_package(zxing REQUIRED) ++find_package(std_msgs REQUIRED) + + # uncomment the following section in order to fill in + # further dependencies manually. + # find_package( REQUIRED) + + set(AI_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../) +-set(SDK_ROOT ${AI_ROOT}/../../3rdparty/platform/ss928/org/smp/a55_linux/) + set(PDFD_ROOT ${AI_ROOT}/component/body_detection/) + set(GST_ROOT ${AI_ROOT}/component/gesture_detection/) + set(ZXING_ROOT ${AI_ROOT}/sample/zxing/src/zxing-cpp-1.4.0/core/src/) +@@ -24,9 +24,8 @@ set(COMMON_ROOT ${AI_ROOT}/component/common/) + set(BARCODE_ROOT ${AI_ROOT}/component/barcode_detection/) + + link_directories( +- ${SDK_ROOT}/mpp/out/lib +- ${SDK_ROOT}/mpp/out/lib/svp_npu +- ${SDK_ROOT}/mpp/out/lib/npu/stub ++ ${CMAKE_SYSROOT}/usr/lib/svp_npu ++ ${CMAKE_SYSROOT}/usr/lib/npu/stub + ${AI_ROOT}/sample/mipi_camera/src/ffmpeglib/lib + ${PDFD_ROOT}/lib + ${GST_ROOT}/lib +@@ -49,7 +48,6 @@ add_executable(object_node + ${AI_ROOT}/sample/barcode_detection/sample_barcode.cpp) + + target_include_directories(object_node PUBLIC +- $ + $ + $ + $ +@@ -109,4 +107,4 @@ if(BUILD_TESTING) + set(ament_cmake_cpplint_FOUND TRUE) + ament_lint_auto_find_test_dependencies() + endif() +-ament_package() +\ No newline at end of file ++ament_package() +--- a/package.xml ++++ b/package.xml +@@ -10,6 +10,7 @@ + ament_cmake + mipi_camera + zxing ++ std_msgs + ament_lint_auto + ament_lint_common + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/pose_srv_node_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/pose_srv_node_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..28a39a702495c24dd14b0e59c7e30621dd339262 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/pose_srv_node_fix.patch @@ -0,0 +1,24 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -19,12 +19,10 @@ find_package(mipi_camera REQUIRED) + find_package(tf2_geometry_msgs REQUIRED) + + set(AI_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../) +-set(SDK_ROOT ${AI_ROOT}/../../3rdparty/platform/ss928/org/smp/a55_linux/) + set(PDFD_ROOT ${AI_ROOT}/component/body_detection/) + + link_directories( +- ${SDK_ROOT}/mpp/out/lib +- ${SDK_ROOT}/mpp/out/lib/svp_npu ++ ${CMAKE_SYSROOT}/usr/lib/svp_npu + ${AI_ROOT}/sample/mipi_camera/src/ffmpeglib/lib + ${PDFD_ROOT}/lib + ) +@@ -36,7 +34,6 @@ add_executable(pose_srv_node + ${CMAKE_CURRENT_SOURCE_DIR}/../../../common/ivp_draw.cpp) + + target_include_directories(pose_srv_node PUBLIC +- $ + $ + $ + $ diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/robot_det_node_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/robot_det_node_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..66ca565fd01d1e5dc6ab2092836d5d813cc2d813 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/files/robot_det_node_fix.patch @@ -0,0 +1,37 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -24,7 +24,6 @@ find_package(tf2 REQUIRED) + # find_package( REQUIRED) + + set(AI_ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../) +-set(SDK_ROOT ${AI_ROOT}/../../3rdparty/platform/ss928/org/smp/a55_linux/) + set(PDFD_ROOT ${AI_ROOT}/component/body_detection/) + set(GST_ROOT ${AI_ROOT}/component/gesture_detection/) + set(ZXING_ROOT ${AI_ROOT}/sample/zxing/src/zxing-cpp-1.4.0/core/src/) +@@ -32,9 +31,8 @@ set(COMMON_ROOT ${AI_ROOT}/component/common/) + set(BARCODE_ROOT ${AI_ROOT}/component/barcode_detection/) + + link_directories( +- ${SDK_ROOT}/mpp/out/lib +- ${SDK_ROOT}/mpp/out/lib/svp_npu +- ${SDK_ROOT}/mpp/out/lib/npu/stub ++ ${CMAKE_SYSROOT}/usr/lib/svp_npu ++ ${CMAKE_SYSROOT}//usr/lib/npu/stub + ${AI_ROOT}/sample/mipi_camera/src/ffmpeglib/lib + ${PDFD_ROOT}/lib + ${GST_ROOT}/lib +@@ -57,7 +55,6 @@ add_executable(robot_det_node + ${AI_ROOT}/sample/barcode_detection/sample_barcode.cpp) + + target_include_directories(robot_det_node PUBLIC +- $ + $ + $ + $ +@@ -122,4 +119,4 @@ if(BUILD_TESTING) + set(ament_cmake_cpplint_FOUND TRUE) + ament_lint_auto_find_test_dependencies() + endif() +-ament_package() +\ No newline at end of file ++ament_package() diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/gst-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/gst-node_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..d9545191139f77f7c2d109f0d521c29f4009c63d --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/gst-node_0.0.0.bb @@ -0,0 +1,72 @@ +# hieuler_component_ai/sample/gesture_detection/demo_ros2/gst_node/gst-node_0.0.0.bb +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "root" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "gst-node" + +ROS_BUILD_DEPENDS = " \ + camera \ + mipi-camera \ + rclcpp \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + camera \ + mipi-camera \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + camera \ + mipi-camera \ + rclcpp \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" +SRC_URI = " \ + file://hieuler_component_ai/sample/gesture_detection/demo_ros2/gst_node \ + file://hieuler_component_ai \ + file://gst_node_fix.patch \ +" + +S = "${WORKDIR}/hieuler_component_ai/sample/gesture_detection/demo_ros2/gst_node" +FILES:${PN} += "${datadir} ${libdir}/gst_node/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/mipi-camera_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/mipi-camera_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..134f4841e08d7fff1e173c8673c0bee92d7c8531 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/mipi-camera_0.0.0.bb @@ -0,0 +1,62 @@ +# hieuler_component_ai/sample/mipi_camera/mipi-camera_0.0.0.bb +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "mipi_camera" +AUTHOR = "root" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=cb6f918bd1dea882b1da6304139909bf" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "mipi-camera" + +ROS_BUILD_DEPENDS = " \ + hieulerpi1-user-driver \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = "" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + hieulerpi1-user-driver \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" +SRC_URI = " \ + file://hieuler_component_ai/sample/mipi_camera \ + file://hieuler_component_ai \ + file://mipi_camera_fix.patch \ +" + +S = "${WORKDIR}/hieuler_component_ai/sample/mipi_camera" +FILES:${PN} += "${datadir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/object-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/object-node_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..3d844ca4503ef64c1c2a1165c63c79e6dfda0be3 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/object-node_0.0.0.bb @@ -0,0 +1,83 @@ +# hieuler_component_ai/sample/object_detection/object_node/object-node_0.0.0.bb +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "root" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "object-node" + +ROS_BUILD_DEPENDS = " \ + mipi-camera \ + zxing \ + rclcpp \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + mipi-camera \ + zxing \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + mipi-camera \ + zxing \ + rclcpp \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" +SRC_URI = " \ + file://hieuler_component_ai/sample/object_detection/object_node \ + file://hieuler_component_ai/sample/zxing/src/zxing-cpp-1.4.0.zip \ + file://hieuler_component_ai \ + file://object_node_fix.patch \ +" + +do_unpack:append() { + bb.build.exec_func('do_copy_zxing_source', d) +} + +do_copy_zxing_source() { + if [ ! -e ${WORKDIR}/hieuler_component_ai/sample/zxing/src/zxing-cpp-1.4.0/CMakeLists.txt ];then + mv ${WORKDIR}/zxing-cpp-1.4.0 ${WORKDIR}/hieuler_component_ai/sample/zxing/src + fi +} + +S = "${WORKDIR}/hieuler_component_ai/sample/object_detection/object_node" +FILES:${PN} += "${datadir} ${libdir}/object_node/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/pose-srv-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/pose-srv-node_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..d2833f226fffc1b3aae596994ebc7e94fd508d93 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/pose-srv-node_0.0.0.bb @@ -0,0 +1,82 @@ +# hieuler_component_ai/sample/body_detection/demo_ros2/pose_srv_node/pose-srv-node_0.0.0.bb +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "pose-srv-node" + +ROS_BUILD_DEPENDS = " \ + camera \ + mipi-camera \ + rclcpp \ + sensor-msgs \ + std-msgs \ + tf2-geometry-msgs \ + nav2-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + camera \ + mipi-camera \ + rclcpp \ + sensor-msgs \ + std-msgs \ + tf2-geometry-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + camera \ + mipi-camera \ + rclcpp \ + sensor-msgs \ + std-msgs \ + tf2-geometry-msgs \ + nav2-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" +SRC_URI = " \ + file://hieuler_component_ai/sample/body_detection/demo_ros2/pose_srv_node \ + file://hieuler_component_ai \ + file://pose_srv_node_fix.patch \ +" + +S = "${WORKDIR}/hieuler_component_ai/sample/body_detection/demo_ros2/pose_srv_node" +FILES:${PN} += "${datadir} ${libdir}/pose_srv_node/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/robot-det-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/robot-det-node_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..c7a8a550660845f471ba32db4827c51305c127f4 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/robot-det-node_0.0.0.bb @@ -0,0 +1,94 @@ +# hieuler_component_ai/sample/robot_detection/robot_det_node/robot-det-node_0.0.0.bb +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "root" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "robot-det-node" + +ROS_BUILD_DEPENDS = " \ + nav2-msgs \ + barcode-interface \ + mipi-camera \ + sensor-msgs \ + std-msgs \ + tf2-geometry-msgs \ + zxing \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + nav2-msgs \ + barcode-interface \ + mipi-camera \ + sensor-msgs \ + std-msgs \ + tf2-geometry-msgs \ + zxing \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + nav2-msgs \ + barcode-interface \ + mipi-camera \ + sensor-msgs \ + std-msgs \ + tf2-geometry-msgs \ + zxing \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" +SRC_URI = " \ + file://hieuler_component_ai/sample/robot_detection/robot_det_node \ + file://hieuler_component_ai/sample/zxing/src/zxing-cpp-1.4.0.zip \ + file://hieuler_component_ai \ + file://robot_det_node_fix.patch \ +" + +do_unpack:append() { + bb.build.exec_func('do_copy_zxing_source', d) +} + +do_copy_zxing_source() { + if [ ! -e ${WORKDIR}/hieuler_component_ai/sample/zxing/src/zxing-cpp-1.4.0/CMakeLists.txt ];then + mv ${WORKDIR}/zxing-cpp-1.4.0 ${WORKDIR}/hieuler_component_ai/sample/zxing/src + fi +} + +S = "${WORKDIR}/hieuler_component_ai/sample/robot_detection/robot_det_node" +FILES:${PN} += "${datadir} ${libdir}/robot_det_node/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/zxing_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/zxing_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..bcca1475afe70f2b473341ee5ba860072e817576 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/zxing_0.0.0.bb @@ -0,0 +1,55 @@ +# hieuler_component_ai/sample/zxing/zxing_0.0.0.bb +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "root" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "zxing" + +ROS_BUILD_DEPENDS = "" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = "" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = "" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" +SRC_URI = " \ + file://hieuler_component_ai/sample/zxing \ +" + +S = "${WORKDIR}/hieuler_component_ai/sample/zxing" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/hieuler-teleop_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/hieuler-teleop_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..dfaea5a51e8de2ad39971106bb0fb978c02998df --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/hieuler-teleop_0.0.0.bb @@ -0,0 +1,61 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "ROS2 hieuler_teleop" +AUTHOR = "hieuler" +SECTION = "devel" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=10;endline=10;md5=3dce4ba60d7e51ec64f3c3dc18672dd3" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "hieuler_teleop" + +ROS_BUILD_DEPENDS = " \ + ros2-hieuler-robot \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + ros2-hieuler-robot \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + ros2-hieuler-robot \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ + boost \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_chassis" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/uart/keyboard \ +" + +S = "${WORKDIR}/hieuler_component_chassis/uart/keyboard" +FILES:${PN} += "${datadir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_python" + +inherit ros_${ROS_BUILD_TYPE} diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/robot-bringup_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/robot-bringup_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..8b59a6a0130b8f86f5253ffcff6a941091382df9 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/robot-bringup_0.0.0.bb @@ -0,0 +1,62 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "ROS2 robot_bringup for robot_control" +AUTHOR = "hieuler" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "robot-bringup" + +ROS_BUILD_DEPENDS = " \ + ros2-hieuler-robot \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + ros2-hieuler-robot \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + ros2-hieuler-robot \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ + boost \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_chassis" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/uart/robot_bringup \ +" + +S = "${WORKDIR}/hieuler_component_chassis/uart/robot_bringup" +FILES:${PN} += "${datadir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/ros2-hieuler-robot_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/ros2-hieuler-robot_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..0350cc9b89b8f999f3298d974330d4f1dfe75203 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/ros2-hieuler-robot_0.0.0.bb @@ -0,0 +1,107 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "ROS2 ros2_control_robot for control_robot" +AUTHOR = "control" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "ros2-hieuler-robot" + +ROS_BUILD_DEPENDS = " \ + ament-index-cpp \ + geometry-msgs \ + nav-msgs \ + nav2-msgs \ + rclcpp \ + rclcpp-action \ + rclpy \ + rosidl-default-runtime \ + sensor-msgs \ + serial \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-geometry-msgs \ + tf2-ros \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ + rosidl-typesupport-fastrtps-cpp-native \ + rosidl-typesupport-fastrtps-c-native \ +" + +ROS_EXPORT_DEPENDS = " \ + ament-index-cpp \ + geometry-msgs \ + nav-msgs \ + nav2-msgs \ + rclcpp \ + rclcpp-action \ + rclpy \ + rosidl-default-runtime \ + sensor-msgs \ + serial \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-geometry-msgs \ + tf2-ros \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + ament-index-cpp \ + geometry-msgs \ + nav-msgs \ + nav2-msgs \ + rclcpp \ + rclcpp-action \ + rclpy \ + rosidl-default-runtime \ + sensor-msgs \ + serial \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-geometry-msgs \ + tf2-ros \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ + boost \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_component_chassis" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/uart/hieuler \ +" + +S = "${WORKDIR}/hieuler_component_chassis/uart/hieuler" +FILES:${PN} += "${datadir} ${libdir}/ros2_hieuler_robot/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/serial_%.bbappend b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/serial_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..922eac473eeb49dc0c33083ca9159cee7b5b3b97 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/serial_%.bbappend @@ -0,0 +1,30 @@ +PV = "1.2.1" +LIC_FILES_CHKSUM = "file://package.xml;beginline=14;endline=14;md5=12c26a18c7f493fdc7e8a93b16b7c04f" + +ROS_BUILD_DEPENDS = " \ + rosidl-default-runtime \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + rosidl-default-runtime \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + rosidl-default-runtime \ +" + +OPENEULER_LOCAL_NAME = "hieuler_component_chassis" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/uart/serial_ros2 \ +" + +S = "${WORKDIR}/hieuler_component_chassis/uart/serial_ros2" + +DISABLE_OPENEULER_SOURCE_MAP = "1" diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depth-image-proc_%.bbappend b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depth-image-proc_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..7ae710f30584b127a175a2b5a77853917e2896b7 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depth-image-proc_%.bbappend @@ -0,0 +1,10 @@ +PV = "2.2.1" +OPENEULER_LOCAL_NAME = "hirobot_component_dtof" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/dtof_ros_demo/src/depth_image/depth_image_to_point_cloud \ +" + +S = "${WORKDIR}/hirobot_component_dtof/dtof_ros_demo/src/depth_image/depth_image_to_point_cloud" + +DISABLE_OPENEULER_SOURCE_MAP = "1" + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depthimage-to-laserscan_%.bbappend b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depthimage-to-laserscan_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..bcc6388a3faf42a1d310b55e696c623c6636f5d8 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depthimage-to-laserscan_%.bbappend @@ -0,0 +1,12 @@ +OPENEULER_LOCAL_NAME = "hirobot_component_dtof" + +PV = "2.3.1" + +SRC_URI = " \ + file://hirobot_component_dtof/dtof_ros_demo/src/depth_image/depthimage_to_laserscan \ +" + +S = "${WORKDIR}/hirobot_component_dtof/dtof_ros_demo/src/depth_image/depthimage_to_laserscan" + +DISABLE_OPENEULER_SOURCE_MAP = "1" + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/dtof-client-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/dtof-client-node_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..2879d249e1a54481a6af07922a8dff5a0beebf01 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/dtof-client-node_0.0.0.bb @@ -0,0 +1,85 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "dtof-client-node" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "dtof-client-node" + +ROS_BUILD_DEPENDS = " \ + pcl \ + rclcpp \ + std-msgs \ + sensor-msgs \ + camera-info-manager \ + cv-bridge \ + image-transport \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + pcl \ + rclcpp \ + std-msgs \ + sensor-msgs \ + camera-info-manager \ + cv-bridge \ + image-transport \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + pcl \ + rclcpp \ + std-msgs \ + sensor-msgs \ + camera-info-manager \ + cv-bridge \ + image-transport \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_dtof" +SRC_URI = " \ + file://hirobot_component_dtof/dtof_ros_demo/src/dtof_client_node \ +" + +S = "${WORKDIR}/hirobot_component_dtof/dtof_ros_demo/src/dtof_client_node" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + +do_compile:prepend() { + sed -i 's@#include "pcl_conversions/pcl_conversions.h"@@g' ${WORKDIR}/hirobot_component_dtof/dtof_ros_demo/src/dtof_client_node/src/dtof_client.hpp + sed -i 's@#include @#include @g' ${WORKDIR}/hirobot_component_dtof/dtof_ros_demo/src/dtof_client_node/src/dtof_client.hpp + sed -i 's@#include "camera_info_manager/visibility_control.h"@#include "camera_info_manager/camera_info_manager/visibility_control.h"@g' ${WORKDIR}/recipe-sysroot/usr/include/camera_info_manager/camera_info_manager/camera_info_manager.hpp + +} diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/dtof-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/dtof-node_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..65fc579070daed18a4bffb49230ae12783759a92 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/dtof-node_0.0.0.bb @@ -0,0 +1,64 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "dtof-node" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "dtof-node" + +ROS_BUILD_DEPENDS = " \ + rclcpp \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + rclcpp \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + rclcpp \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_dtof" +SRC_URI = " \ + file://hirobot_component_dtof/dtof_ros_demo/src/dtof_node \ +" + +S = "${WORKDIR}/hirobot_component_dtof/dtof_ros_demo/src/dtof_node" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/hirobot-description_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/hirobot-description_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..1f45b8fe8b25548d8725560abd2d583a3f8f3004 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/hirobot-description_0.0.1.bb @@ -0,0 +1,58 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = " 3D models of the HiRobot for simulation and visualization " +AUTHOR = "HiRobot" +SECTION = "devel" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=10;endline=10;md5=3dce4ba60d7e51ec64f3c3dc18672dd3" + +ROS_CN = "" +PV = "0.0.1" +ROS_BPN = "hirobot-description" + +ROS_BUILD_DEPENDS = " \ + urdf \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + urdf \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + urdf \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_dtof" +SRC_URI = " \ + file://hirobot_component_dtof/dtof_ros_demo/src/hirobot_description \ +" + +S = "${WORKDIR}/hirobot_component_dtof/dtof_ros_demo/src/hirobot_description" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/ai-demolib_0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/ai-demolib_0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..02e25af61f72dc6bf8976e040d4e30b1c336bb98 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/ai-demolib_0.1.bb @@ -0,0 +1,35 @@ +SUMMARY = "lib depneds from hieuler_component_ai app" +DESCRIPTION = "user lib for ai demo" +HOMEPAGE = "hipirobot/hieuler_component_ai" +LICENSE = "CLOSED" + +inherit ros_distro_humble + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" + +SRC_URI = " \ + file://hieuler_component_ai/component \ +" + +S = "${WORKDIR}/hieuler_component_ai/component" + +do_install:append() { + install -d ${D}${libdir} + install -d ${D}/res + cp -rf -P ${WORKDIR}/hieuler_component_ai/component/gesture_detection/lib/*so ${D}${libdir} + cp -rf -P ${WORKDIR}/hieuler_component_ai/component/body_detection/lib/*so ${D}${libdir} + cp -rf -P ${WORKDIR}/hieuler_component_ai/component/barcode_detection/res/* ${D}/res + cp -rf -P ${WORKDIR}/hieuler_component_ai/component/gesture_detection/res/* ${D}/res + cp -rf -P ${WORKDIR}/hieuler_component_ai/component/body_detection/res/* ${D}/res + +} + +FILES:${PN} += " \ + ${libdir}/*so* \ + /res/* \ +" + +FILES:${PN}-dev = "" + +EXCLUDE_FROM_SHLIBS = "1" +INSANE_SKIP:${PN} += "already-stripped dev-so" diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/encoder_decoder_demo_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/encoder_decoder_demo_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..c938fda2ac2e02a0371316a192bccee11e1e351f --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/encoder_decoder_demo_fix.patch @@ -0,0 +1,36 @@ +diff --git a/sample/encoder_decoder_demo/CMakeLists.txt b/sample/encoder_decoder_demo/CMakeLists.txt +index 956a46e..2d3c74f 100644 +--- a/sample/encoder_decoder_demo/CMakeLists.txt ++++ b/sample/encoder_decoder_demo/CMakeLists.txt +@@ -4,7 +4,7 @@ cmake_minimum_required(VERSION 3.0) + # 项目名称 + project(encoder_decoder_demo) + +-set(CMAKE_C_COMPILER aarch64-mix210-linux-gcc) ++#set(CMAKE_C_COMPILER aarch64-mix210-linux-gcc) + + # 添加可执行文件 + add_executable(encoder_decoder_demo hibot_bot_test.c) +@@ -19,14 +19,14 @@ target_include_directories(encoder_decoder_demo + + target_link_libraries(encoder_decoder_demo + PUBLIC +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib/libsecurec.so +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib/libss_dsp.so +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib/libss_mpi.so +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib/libss_dnvqe.so +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib/libss_upvqe.so +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib/libss_voice_engine.so +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib/libss_hdmi.so +- ${CMAKE_CURRENT_SOURCE_DIR}/lib/libhibot.so ++ securec ++ ss_dsp ++ ss_mpi ++ ss_dnvqe ++ ss_upvqe ++ ss_voice_engine ++ ss_hdmi ++ hibot + m + pthread + ) diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hibot_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hibot_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..28057077ac729cd38d983742658786df2da61ef4 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hibot_fix.patch @@ -0,0 +1,94 @@ +diff --git a/src/encoder_decoder/CMakeLists.txt b/src/encoder_decoder/CMakeLists.txt +index be0923e..2293cfe 100644 +--- a/src/encoder_decoder/CMakeLists.txt ++++ b/src/encoder_decoder/CMakeLists.txt +@@ -21,19 +21,17 @@ target_include_directories(encoder_decoder_object + ${CMAKE_CURRENT_SOURCE_DIR}/../../include/encoder_decoder/decoder + ${CMAKE_CURRENT_SOURCE_DIR}/../../include/encoder_decoder/decoder/hal + ${CMAKE_CURRENT_SOURCE_DIR}/../../include/encoder_decoder/hibot_comm +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/include + ) + + # Add the library directories for hw_calc + target_link_directories(encoder_decoder_object + PUBLIC +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib + ) + + # Link the hw_calc library to the external library + target_link_libraries(encoder_decoder_object + PUBLIC +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib/libss_mpi.so ++ ss_mpi + ) + + add_library(encoder_decoder STATIC $) +diff --git a/src/hw_calc/CMakeLists.txt b/src/hw_calc/CMakeLists.txt +index a3ea96b..7f757f4 100755 +--- a/src/hw_calc/CMakeLists.txt ++++ b/src/hw_calc/CMakeLists.txt +@@ -21,13 +21,11 @@ target_include_directories(hw_calc_object + PUBLIC + ${CMAKE_CURRENT_SOURCE_DIR}/../../include/hw_calc + ${CMAKE_CURRENT_SOURCE_DIR}/../../include/hw_calc/hal +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/include + ) + + # Add the library directories for hw_calc + target_link_directories(hw_calc_object + PUBLIC +- $ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib + ) + + +diff --git a/src/hwmgr/CMakeLists.txt b/src/hwmgr/CMakeLists.txt +index 3238b5c..568c0a8 100644 +--- a/src/hwmgr/CMakeLists.txt ++++ b/src/hwmgr/CMakeLists.txt +@@ -3,8 +3,7 @@ project(hwmgr) + + set(HWMGR_SRC ${CMAKE_CURRENT_SOURCE_DIR}/deamon/shm_mgr.c) + +-set(HWMGR_INC $ENV{SDK_PATH}/smp/a55_linux/mpp/out/include +- ${CMAKE_CURRENT_SOURCE_DIR}/../shm/include ++set(HWMGR_INC ${CMAKE_CURRENT_SOURCE_DIR}/../shm/include + ${CMAKE_CURRENT_SOURCE_DIR}/../../include/shm/shmbuffer + ${CMAKE_CURRENT_SOURCE_DIR}/../../include/shm/mgrbuffer + ${CMAKE_CURRENT_SOURCE_DIR}/../../include/hwmgr/deamon) +@@ -15,7 +14,6 @@ add_library(hwmgr_obj OBJECT ${HWMGR_SRC}) + target_include_directories(hwmgr_obj PUBLIC ${HWMGR_INC}) + + target_link_libraries(hwmgr_obj +- -L$ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib + -L${CMAKE_CURRENT_SOURCE_DIR}/../shm + ss_mpi + securec +@@ -31,4 +29,4 @@ add_library(hwmgr STATIC $) + # Use parameter to decide whether to compile the driver + if (${BUILD_DRIVER}) + add_subdirectory(driver) +-endif() +\ No newline at end of file ++endif() +diff --git a/src/shm/CMakeLists.txt b/src/shm/CMakeLists.txt +index e634408..c8113d7 100644 +--- a/src/shm/CMakeLists.txt ++++ b/src/shm/CMakeLists.txt +@@ -5,8 +5,7 @@ set(SHM_SRC ${CMAKE_CURRENT_SOURCE_DIR}/src/hal/shm_buffer_hal.c + ${CMAKE_CURRENT_SOURCE_DIR}/src/shmbuffer/shm_buffer.c + ${CMAKE_CURRENT_SOURCE_DIR}/src/mgrbuffer/mgr_buffer.c) + +-set(SHM_INC $ENV{SDK_PATH}/smp/a55_linux/mpp/out/include +- ${CMAKE_CURRENT_SOURCE_DIR}/include ++set(SHM_INC ${CMAKE_CURRENT_SOURCE_DIR}/include + ${CMAKE_CURRENT_SOURCE_DIR}/../../include/shm/shmbuffer + ${CMAKE_CURRENT_SOURCE_DIR}/../../include/shm/mgrbuffer) + +@@ -14,7 +13,6 @@ set(SHM_INC $ENV{SDK_PATH}/smp/a55_linux/mpp/out/include + add_library(shm_obj OBJECT ${SHM_SRC}) + target_include_directories(shm_obj PUBLIC ${SHM_INC}) + target_link_libraries(shm_obj +- -L$ENV{SDK_PATH}/smp/a55_linux/mpp/out/lib + ss_mpi + securec + ss_dnvqe diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hw_calc_demo_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hw_calc_demo_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..67a93f44fd42524ba70e0e5613167889129d8e86 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hw_calc_demo_fix.patch @@ -0,0 +1,21 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -32,8 +32,16 @@ ament_target_dependencies(hw_calc_demo + image_transport + image_geometry + ) +-target_link_libraries(hw_calc_demo +- ${CMAKE_CURRENT_SOURCE_DIR}/3rd/lib/libhibot.so ++ ++target_link_libraries(hw_calc_demo ++ hibot ++ securec ++ ss_dsp ++ ss_mpi ++ ss_dnvqe ++ ss_upvqe ++ ss_voice_engine ++ ss_hdmi + ) + + # Install targets diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hwmgr-driver-makefile b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hwmgr-driver-makefile new file mode 100644 index 0000000000000000000000000000000000000000..e7d0f3e4747f87c730a6fd877d632f87937731d7 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hwmgr-driver-makefile @@ -0,0 +1,14 @@ +obj-m := hwmgr_shm.o + +SRC := $(shell pwd) + +all: + $(MAKE) -C $(KERNEL_SRC) M=$(SRC) + +modules_install: + $(MAKE) -C $(KERNEL_SRC) M=$(SRC) modules_install + +clean: + rm -f *.o *~ core .depend .*.cmd *.ko *.mod.c *.mod + rm -f Module.markers Module.symvers modules.order + rm -rf .tmp_versions Modules.symvers diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hwmgr_demo_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hwmgr_demo_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..523424de7eaaaa1aa082206716e3d9259597988c --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/hwmgr_demo_fix.patch @@ -0,0 +1,51 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -9,23 +9,29 @@ add_compile_options(-std=c++17) + # find dependencies + find_package(ament_cmake REQUIRED) + find_package(rclcpp REQUIRED) +- +-set(DEPENDS_DIR ${CMAKE_CURRENT_SOURCE_DIR}/depends) +-execute_process(COMMAND insmod ${DEPENDS_DIR}/hwmgr_shm.ko) ++find_package(yaml-cpp REQUIRED) + + include_directories( + include + include/HiBot + ) + +-link_directories( +- ${DEPENDS_DIR} +-) + + add_executable(hwmgr + src/hwmgr_node.cpp + ) +-target_link_libraries(hwmgr hibot yaml-cpp) ++target_link_libraries(hwmgr ++ securec ++ yaml-cpp ++ hibot ++ ss_dsp ++ ss_mpi ++ ss_dnvqe ++ ss_upvqe ++ ss_voice_engine ++ ss_hdmi ++) ++ + ament_target_dependencies(hwmgr rclcpp) + + install( +@@ -41,11 +47,4 @@ install(DIRECTORY + launch config + DESTINATION share/${PROJECT_NAME}) + +-install(FILES +- ${DEPENDS_DIR}/libyaml-cpp.so.0.7 +- ${DEPENDS_DIR}/libyaml-cpp.so.0.7.0 +- ${DEPENDS_DIR}/libyaml-cpp.so +- ${DEPENDS_DIR}/libhibot.so +- DESTINATION lib) +- + ament_package() diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/test_recv_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/test_recv_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..7ec493fe2dfe5cba2540c5db8d9ec17c93ba8ee0 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/test_recv_fix.patch @@ -0,0 +1,27 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -19,7 +19,16 @@ link_directories( + ) + + add_executable(test_recv src/test_recv.cpp) +-target_link_libraries(test_recv hibot) ++target_link_libraries(test_recv ++ securec ++ ss_dsp ++ ss_mpi ++ ss_dnvqe ++ ss_upvqe ++ ss_voice_engine ++ ss_hdmi ++ hibot ++) + ament_target_dependencies(test_recv rclcpp shm_meta_info) + + install( +@@ -34,4 +43,4 @@ install( + FILES ../SHMBufferRosPkg/lib/libhibot.so + DESTINATION lib) + +-ament_package() +\ No newline at end of file ++ament_package() diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/test_send_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/test_send_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..8ce37ecc960a29b6314ca20c7fbd689ff862b69a --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/files/test_send_fix.patch @@ -0,0 +1,27 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -21,7 +21,16 @@ link_directories( + ) + + add_executable(test_send src/test_send.cpp) +-target_link_libraries(test_send hibot) ++target_link_libraries(test_send ++ securec ++ ss_dsp ++ ss_mpi ++ ss_dnvqe ++ ss_upvqe ++ ss_voice_engine ++ ss_hdmi ++ hibot ++) + ament_target_dependencies(test_send rclcpp shm_meta_info std_msgs) + + install( +@@ -36,4 +45,4 @@ install( + FILES ../SHMBufferRosPkg/lib/libhibot.so + DESTINATION lib) + +-ament_package() +\ No newline at end of file ++ament_package() diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/mipi-ffmpeglib_0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/mipi-ffmpeglib_0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..10ea594fc060b0b70811b77e699c986618ecc456 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_hibot/mipi-ffmpeglib_0.1.bb @@ -0,0 +1,28 @@ +SUMMARY = "lib depneds from mipi app" +DESCRIPTION = "user lib for mipi" +HOMEPAGE = "hipirobot/hieuler_component_ai" +LICENSE = "CLOSED" + +inherit ros_distro_humble + +OPENEULER_LOCAL_NAME = "hieuler_component_ai" + +SRC_URI = " \ + file://hieuler_component_ai/sample/camera/src/ffmpeglib/lib \ +" + +S = "${WORKDIR}/hieuler_component_ai/sample/camera/src/ffmpeglib/lib" + +do_install:append() { + install -d ${D}${libdir} + cp -rf -P ${WORKDIR}/hieuler_component_ai/sample/camera/src/ffmpeglib/lib/* ${D}${libdir} +} + +FILES:${PN} += " \ + ${libdir}/*so* \ +" + +FILES:${PN}-dev = "" + +EXCLUDE_FROM_SHLIBS = "1" +INSANE_SKIP:${PN} += "already-stripped dev-so" diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/depth-mini-seg_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/depth-mini-seg_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..ce7fb1277ee2969e2e0df0af1e0ee75ffcc872be --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/depth-mini-seg_0.0.0.bb @@ -0,0 +1,74 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "depth-mini-seg" + +ROS_BUILD_DEPENDS = " \ + pcl \ + pcl-conversions \ + rclcpp \ + std-msgs \ + tf2-geometry-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + pcl \ + pcl-conversions \ + rclcpp \ + std-msgs \ + tf2-geometry-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + pcl \ + pcl-conversions \ + rclcpp \ + std-msgs \ + tf2-geometry-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/depth_mini_seg \ + file://depth_mini_seg_fix.patch \ +" + +S = "${WORKDIR}/hirobot_component_navigation/depth_mini_seg" +FILES:${PN} += "${datadir} ${libdir}/depth_mini_seg/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/files/depth_mini_seg_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/files/depth_mini_seg_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..457013223ff825d18d6bc4c63a3571abbe56cf3d --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/files/depth_mini_seg_fix.patch @@ -0,0 +1,11 @@ +--- a/src/depth_mini_seg.cpp ++++ b/src/depth_mini_seg.cpp +@@ -7,7 +7,7 @@ + + #include + #include +-#include ++//#include + + #include + #include diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/files/hirobot_tof_plane_seg_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/files/hirobot_tof_plane_seg_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..c3b3ccf96743600c67d194ff30e0fb4d681994ba --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/files/hirobot_tof_plane_seg_fix.patch @@ -0,0 +1,20 @@ +--- a/src/hirobot_tof_plane_seg.cpp ++++ b/src/hirobot_tof_plane_seg.cpp +@@ -6,7 +6,7 @@ + #include + #include + #include +-#include ++//#include + #include "pcl_conversions/pcl_conversions.h" + + #include +@@ -21,7 +21,7 @@ + #include + #include + #include +-#include ++//#include + + + #define TRANSFORMATION_TYPE_X 0 diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/get-pose-msg_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/get-pose-msg_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..8c32674dcb2f489a23db9ba21cb00aa87cdd0edf --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/get-pose-msg_0.0.0.bb @@ -0,0 +1,73 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "get-pose-msg" + +ROS_BUILD_DEPENDS = " \ + rosidl-default-generators \ + rosidl-default-runtime \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ + rosidl-default-runtime \ + rosidl-adapter-native \ + ament-cmake-ros-native \ + python3-numpy-native \ + rosidl-generator-c-native \ + rosidl-generator-cpp-native \ + rosidl-typesupport-fastrtps-c-native \ + rosidl-typesupport-fastrtps-cpp-native \ + rosidl-typesupport-introspection-cpp-native \ + rosidl-typesupport-cpp-native \ + rosidl-generator-py-native \ +" + +ROS_EXPORT_DEPENDS = " \ + rosidl-default-generators \ + rosidl-default-runtime \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + rosidl-default-generators \ + rosidl-default-runtime \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/get_pose_msg \ +" + +S = "${WORKDIR}/hirobot_component_navigation/get_pose_msg" +FILES:${PN} += "${datadir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-base_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-base_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..b5bd563fa6acdffbee4b9bc4d0958a8c935364d9 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-base_0.0.1.bb @@ -0,0 +1,89 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = " Hirobot base node that include diff drive controller, odometry and tf node " +AUTHOR = "HiRobot" +SECTION = "devel" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=10;endline=10;md5=3dce4ba60d7e51ec64f3c3dc18672dd3" + +ROS_CN = "" +PV = "0.0.1" +ROS_BPN = "hirobot-base" + +ROS_BUILD_DEPENDS = " \ + geometry-msgs \ + hirobot-msgs \ + message-filters \ + nav-msgs \ + rclcpp \ + rcutils \ + sensor-msgs \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-ros \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + geometry-msgs \ + hirobot-msgs \ + message-filters \ + nav-msgs \ + rclcpp \ + rcutils \ + sensor-msgs \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-ros \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + geometry-msgs \ + hirobot-msgs \ + message-filters \ + nav-msgs \ + rclcpp \ + rcutils \ + sensor-msgs \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-ros \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/hirobot_base \ +" + +S = "${WORKDIR}/hirobot_component_navigation/hirobot_base" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-bringup_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-bringup_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..02bef86ce29ecdbc71c45024378a4ef5438e0aad --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-bringup_0.0.1.bb @@ -0,0 +1,67 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = " ROS 2 launch scripts for starting the HiRobot " +AUTHOR = "HiRobot" +SECTION = "devel" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=10;endline=10;md5=3dce4ba60d7e51ec64f3c3dc18672dd3" + +ROS_CN = "" +PV = "0.0.1" +ROS_BPN = "hirobot-bringup" + +ROS_BUILD_DEPENDS = " \ + hirobot-base \ + hirobot-description \ + hls-lfcd-lds-driver \ + robot-state-publisher \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + hirobot-base \ + hirobot-description \ + hls-lfcd-lds-driver \ + robot-state-publisher \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + hirobot-base \ + hirobot-description \ + hls-lfcd-lds-driver \ + robot-state-publisher \ + " + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/hirobot_bringup \ +" + +S = "${WORKDIR}/hirobot_component_navigation/hirobot_bringup" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-depth-camera_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-depth-camera_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..995d14595fe65da0580b0086bc66ef306d444fb7 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-depth-camera_0.0.0.bb @@ -0,0 +1,70 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "hirobot-depth-camera" + +ROS_BUILD_DEPENDS = " \ + pcl \ + pcl-conversions \ + rclcpp \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + pcl \ + pcl-conversions \ + rclcpp \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + pcl \ + pcl-conversions \ + rclcpp \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/hirobot_depth_camera \ +" + +S = "${WORKDIR}/hirobot_component_navigation/hirobot_depth_camera" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-description_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-description_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..a629e3ece071737713eee4f3319f238515461e03 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-description_0.0.1.bb @@ -0,0 +1,58 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = " 3D models of the HiRobot for simulation and visualization " +AUTHOR = "HiRobot" +SECTION = "devel" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=10;endline=10;md5=3dce4ba60d7e51ec64f3c3dc18672dd3" + +ROS_CN = "" +PV = "0.0.1" +ROS_BPN = "hirobot-description" + +ROS_BUILD_DEPENDS = " \ + urdf \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + urdf \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + urdf \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/hirobot_description \ +" + +S = "${WORKDIR}/hirobot_component_navigation/hirobot_description" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-get-goal-clear_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-get-goal-clear_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..44912e51892cffbde4b539b826a03d5ca273ab06 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-get-goal-clear_0.0.0.bb @@ -0,0 +1,75 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=cb6f918bd1dea882b1da6304139909bf" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "hirobot-get-goal-clear" + +ROS_BUILD_DEPENDS = " \ + get-pose-msg \ + rclcpp \ + std-msgs \ + tf2 \ + tf2-ros \ + nav2-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + get-pose-msg \ + rclcpp \ + std-msgs \ + tf2 \ + tf2-ros \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + get-pose-msg \ + rclcpp \ + std-msgs \ + tf2 \ + tf2-ros \ + nav2-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/hirobot_get_goal_clear \ +" + +S = "${WORKDIR}/hirobot_component_navigation/hirobot_get_goal_clear" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-goal-process_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-goal-process_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..13bee7f7ea6a8eae92f74b7d3b5e77053677da83 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-goal-process_0.0.0.bb @@ -0,0 +1,70 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "hirobot-goal-process" + +ROS_BUILD_DEPENDS = " \ + nav-msgs \ + rclcpp \ + std-msgs \ + tf2-ros \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + nav-msgs \ + rclcpp \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + nav-msgs \ + rclcpp \ + std-msgs \ + tf2-ros \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/hirobot_goal_process \ +" + +S = "${WORKDIR}/hirobot_component_navigation/hirobot_goal_process" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-msgs_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-msgs_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..ad96f8b19a03f57b7505e41171c066a141160683 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-msgs_0.0.1.bb @@ -0,0 +1,65 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "message for hirobot base" +AUTHOR = "HiRobot" +SECTION = "devel" +LICENSE = "BSD" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=d566ef916e9dedc494f5f793a6690ba5" + +ROS_CN = "" +PV = "0.0.1" +ROS_BPN = "hirobot-msgs" + +ROS_BUILD_DEPENDS = " \ + rosidl-default-runtime \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + rosidl-default-runtime \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + rosidl-default-runtime \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/hirobot_msgs \ +" + +S = "${WORKDIR}/hirobot_component_navigation/hirobot_msgs" +FILES:${PN} += "${datadir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-navigation2-teb_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-navigation2-teb_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..597d29a44c91cbeabc8cf5c720a1a033473bf1cf --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-navigation2-teb_0.0.1.bb @@ -0,0 +1,58 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = " ROS 2 launch scripts for navigation2 " +AUTHOR = "HiRobot" +SECTION = "devel" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=10;endline=10;md5=3dce4ba60d7e51ec64f3c3dc18672dd3" + +ROS_CN = "" +PV = "0.0.1" +ROS_BPN = "hirobot-navigation2-teb" + +ROS_BUILD_DEPENDS = " \ + nav2-bringup \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + nav2-bringup \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + nav2-bringup \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/hirobot_navigation2_teb \ +" + +S = "${WORKDIR}/hirobot_component_navigation/hirobot_navigation2_teb" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-tof-plane-seg_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-tof-plane-seg_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..a60fd62d9aab3a77e595ea8b22d3f80dc9c9618e --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-tof-plane-seg_0.0.0.bb @@ -0,0 +1,71 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "hirobot-tof-plane-seg" + +ROS_BUILD_DEPENDS = " \ + pcl \ + pcl-conversions \ + rclcpp \ + std-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + pcl \ + pcl-conversions \ + rclcpp \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + pcl \ + pcl-conversions \ + rclcpp \ + std-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/hirobot_tof_plane_seg \ + file://hirobot_tof_plane_seg_fix.patch \ +" + +S = "${WORKDIR}/hirobot_component_navigation/hirobot_tof_plane_seg" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/person-position-ack_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/person-position-ack_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..ca03af15b6e23649fc7adaffda3466963f9311d2 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/person-position-ack_0.0.0.bb @@ -0,0 +1,73 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "person-position-ack" + +ROS_BUILD_DEPENDS = " \ + get-pose-msg \ + rclcpp \ + std-msgs \ + tf2-geometry-msgs \ + nav2-msgs \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + get-pose-msg \ + rclcpp \ + std-msgs \ + tf2-geometry-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + get-pose-msg \ + rclcpp \ + std-msgs \ + tf2-geometry-msgs \ + nav2-msgs \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/person_position_ack \ +" + +S = "${WORKDIR}/hirobot_component_navigation/person_position_ack" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-charge-control_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-charge-control_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..468e225f520c25bca15552f45da4d8334d05b69a --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-charge-control_0.0.0.bb @@ -0,0 +1,80 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "robot-charge-control" + +ROS_BUILD_DEPENDS = " \ + barcode-interface \ + geometry-msgs \ + get-pose-msg \ + rclcpp \ + std-msgs \ + nav2-msgs \ + rclcpp-action \ + tf2-ros \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ +" + +ROS_EXPORT_DEPENDS = " \ + barcode-interface \ + geometry-msgs \ + get-pose-msg \ + rclcpp \ + std-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + barcode-interface \ + geometry-msgs \ + get-pose-msg \ + rclcpp \ + std-msgs \ + nav2-msgs \ + rclcpp-action \ + tf2-ros \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/robot_charge_control \ +" + +S = "${WORKDIR}/hirobot_component_navigation/robot_charge_control" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-init-pose_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-init-pose_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..bf6772239b4628e1fbc9fd0be11e9b6cf7f62d44 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-init-pose_0.0.0.bb @@ -0,0 +1,78 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "lx" +SECTION = "devel" +LICENSE = "CLOSED" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "robot-init-pose" + +ROS_BUILD_DEPENDS = " \ + action-msgs \ + geometry-msgs \ + lifecycle-msgs \ + nav2-msgs \ + nav2-simple-commander \ + rclpy \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + action-msgs \ + geometry-msgs \ + lifecycle-msgs \ + nav2-msgs \ + nav2-simple-commander \ + rclpy \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + action-msgs \ + geometry-msgs \ + lifecycle-msgs \ + nav2-msgs \ + nav2-simple-commander \ + rclpy \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-copyright \ + ament-flake8 \ + ament-pep257 \ + python3-pytest \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_navigation" +SRC_URI = " \ + file://hirobot_component_navigation/robot_init_pose \ +" + +S = "${WORKDIR}/hirobot_component_navigation/robot_init_pose" +FILES:${PN} += "${datadir} ${libdir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_python" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/frame-relationship_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/frame-relationship_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..71c6a6b8a0b386571ced0b2bc01aad91ed8d5645 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/frame-relationship_0.0.1.bb @@ -0,0 +1,67 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "A ROS2 package to find and publish frame relationship" +AUTHOR = "Your Name" +SECTION = "devel" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=9;endline=9;md5=12c26a18c7f493fdc7e8a93b16b7c04f" + +ROS_CN = "" +PV = "0.0.1" +ROS_BPN = "frame-relationship" + +ROS_BUILD_DEPENDS = " \ + geometry-msgs \ + rclcpp \ + tf2-ros \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + geometry-msgs \ + rclcpp \ + tf2-ros \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + geometry-msgs \ + rclcpp \ + tf2-ros \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_slam" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/frame_relationship \ +" + +S = "${WORKDIR}/hirobot_component_slam/frame_relationship" +FILES:${PN} += "${datadir} ${libdir}/frame_relationship/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/hirobot-cartographer_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/hirobot-cartographer_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..73a55ad75b2f2908b9360c969cd9652b7989ab42 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/hirobot-cartographer_0.0.1.bb @@ -0,0 +1,58 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = " ROS 2 launch scripts for cartographer " +AUTHOR = "HiRobot" +SECTION = "devel" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=10;endline=10;md5=3dce4ba60d7e51ec64f3c3dc18672dd3" + +ROS_CN = "" +PV = "0.0.1" +ROS_BPN = "hirobot-cartographer" + +ROS_BUILD_DEPENDS = " \ + cartographer-ros \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ +" + +ROS_EXPORT_DEPENDS = " \ + cartographer-ros \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + cartographer-ros \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hirobot_component_slam" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/hirobot_cartographer \ +" + +S = "${WORKDIR}/hirobot_component_slam/hirobot_cartographer" +FILES:${PN} += "${datadir}" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/astra-camera_1.0.2.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/astra-camera_1.0.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..d2679d45390e895a2f605b2ed1bc6ec0c0af5c98 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/astra-camera_1.0.2.bb @@ -0,0 +1,141 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "TODO: Package description" +AUTHOR = "Joe Dong" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "1.0.2" +ROS_BPN = "astra-camera" + +ROS_BUILD_DEPENDS = " \ + glog \ + libuvc \ + magic-enum \ + nlohmann-json \ + tf2-eigen \ + astra-camera-msgs \ + builtin-interfaces \ + class-loader \ + cv-bridge \ + image-geometry \ + image-publisher \ + image-transport \ + rclcpp \ + rclcpp-components \ + sensor-msgs \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-msgs \ + tf2-ros \ + tf2-sensor-msgs \ + libeigen \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-runtime \ + rosidl-adapter-native \ + ament-cmake-ros-native \ + python3-numpy-native \ + rosidl-generator-c-native \ + rosidl-generator-cpp-native \ + rosidl-typesupport-fastrtps-c-native \ + rosidl-typesupport-fastrtps-cpp-native \ + rosidl-typesupport-introspection-cpp-native \ + rosidl-typesupport-cpp-native \ + rosidl-generator-py-native \ +" + +ROS_EXPORT_DEPENDS = " \ + astra-camera-msgs \ + builtin-interfaces \ + class-loader \ + cv-bridge \ + image-geometry \ + image-publisher \ + image-transport \ + rclcpp \ + rclcpp-components \ + sensor-msgs \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-msgs \ + tf2-ros \ + tf2-sensor-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = " \ + eigen3-cmake-module-native \ +" + +ROS_EXEC_DEPENDS = " \ + libuvc \ + glog \ + magic-enum \ + nlohmann-json \ + tf2-eigen \ + astra-camera-msgs \ + builtin-interfaces \ + class-loader \ + cv-bridge \ + image-geometry \ + image-publisher \ + image-transport \ + rclcpp \ + rclcpp-components \ + sensor-msgs \ + std-msgs \ + std-srvs \ + tf2 \ + tf2-msgs \ + tf2-ros \ + tf2-sensor-msgs \ + libeigen \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = "" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "hieuler_dsp_sample" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/depth_to_laser_without_ground/arm_code/ros2_astra_camera/astra_camera \ + file://astra_camera_fix.patch \ +" +# openni is included in other pkg +do_install:append(){ + if [ -e ${D}${libdir}/libOpenNI2.so ]; then + rm -f ${D}${libdir}/libOpenNI2.so + fi + if [ -e ${D}${libdir}/OpenNI2/Drivers/liborbbec.so ]; then + rm -rf ${D}${libdir}/OpenNI2 + fi + if [ -e ${D}/usr/include/openni2/openni2_redist/x64/OpenNI2/Drivers/liborbbec.so ]; then + rm -rf ${D}/usr/include/openni2 + fi +} + +S = "${WORKDIR}/hieuler_dsp_sample/depth_to_laser_without_ground/arm_code/ros2_astra_camera/astra_camera" +FILES:${PN} += "${datadir} ${libdir}/astra_camera/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/dsp-bin_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/dsp-bin_0.0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..5c5713147d65ffd028f052886ecc44ee7d2f780f --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/dsp-bin_0.0.1.bb @@ -0,0 +1,24 @@ +SUMMARY = "dsp_bin" +DESCRIPTION = "dsp_bin from hipirobot hieuler_dsp_sample" +HOMEPAGE = "hipirobot/hieuler_dsp_sample.git" +LICENSE = "CLOSED" + +OPENEULER_LOCAL_NAME = "hieuler_dsp_sample" + +SRC_URI = " \ + file://hieuler_dsp_sample/depth_to_laser_without_ground \ +" + +S = "${WORKDIR}/hieuler_dsp_sample/depth_to_laser_without_ground" + +do_install:append() { + install -d ${D}/root/ + cp -rf -P ${S}/dsp_bin ${D}/root/ +} + +FILES:${PN} = " \ + /root/dsp_bin \ +" + +INSANE_SKIP:${PN} += "already-stripped dev-deps" + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/files/astra_camera_fix.patch b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/files/astra_camera_fix.patch new file mode 100644 index 0000000000000000000000000000000000000000..7dc79cef02fe1e0bbc98ed857a013e63d1bf28f3 --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/files/astra_camera_fix.patch @@ -0,0 +1,15 @@ +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -44,8 +47,10 @@ set(MPI_DIR_LIB + set(MPI_DIR_INCLUDED_DIRS + "${CMAKE_CURRENT_SOURCE_DIR}/3rd/mpi/include/") + +-execute_process(COMMAND uname -m OUTPUT_VARIABLE MACHINES) +-execute_process(COMMAND getconf LONG_BIT OUTPUT_VARIABLE MACHINES_BIT) ++#execute_process(COMMAND uname -m OUTPUT_VARIABLE MACHINES) ++#execute_process(COMMAND getconf LONG_BIT OUTPUT_VARIABLE MACHINES_BIT) ++set(MACHINES aarch64) ++set(MACHINES_BIT 64) + message(STATUS "ORRBEC Machine : ${MACHINES}") + message(STATUS "ORRBEC Machine Bits : ${MACHINES_BIT}") + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/eulercar/ros2-nearlink-robot_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/eulercar/ros2-nearlink-robot_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..665965167608ee1002bb2cdf1cbcd3f91633956e --- /dev/null +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/eulercar/ros2-nearlink-robot_0.0.0.bb @@ -0,0 +1,73 @@ +# +# Generated by ros2recipe.py +# +# Copyright openeuler + +inherit ros_distro_humble +inherit ros_superflore_generated + +DESCRIPTION = "ROS2 ros2_nearlink_robot for control_robot" +AUTHOR = "eulercar" +SECTION = "devel" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://package.xml;beginline=8;endline=8;md5=782925c2d55d09052e1842a0b4886802" + +ROS_CN = "" +PV = "0.0.0" +ROS_BPN = "ros2-nearlink-robot" + +ROS_BUILD_DEPENDS = " \ + rclcpp \ + std-msgs \ + tf2-geometry-msgs \ + hieulerpi1-user-driver \ +" + +ROS_BUILDTOOL_DEPENDS = " \ + ament-cmake-native \ + rosidl-default-generators-native \ + rosidl-typesupport-fastrtps-cpp-native \ + rosidl-typesupport-fastrtps-c-native \ +" + +ROS_EXPORT_DEPENDS = " \ + ament-index-cpp \ + rclcpp \ + std-msgs \ + tf2-geometry-msgs \ +" + +ROS_BUILDTOOL_EXPORT_DEPENDS = "" + +ROS_EXEC_DEPENDS = " \ + rclcpp \ + std-msgs \ + tf2-geometry-msgs \ + hieulerpi1-user-driver \ +" + +# Currently informational only -- see http://www.ros.org/reps/rep-0149.html#dependency-tags. +ROS_TEST_DEPENDS = " \ + ament-lint-auto \ + ament-lint-common \ + boost \ +" + +DEPENDS = "${ROS_BUILD_DEPENDS} ${ROS_BUILDTOOL_DEPENDS}" +# Bitbake doesn't support the "export" concept, so build them as if we needed them to build this package (even though we actually +# don't) so that they're guaranteed to have been staged should this package appear in another's DEPENDS. +DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" + +RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" + +OPENEULER_LOCAL_NAME = "eulercar" +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/sle_control \ +" + +S = "${WORKDIR}/eulercar/sle_control" +FILES:${PN} += "${datadir} ${libdir}/ros2_nearlink_robot/*" +DISABLE_OPENEULER_SOURCE_MAP = "1" +ROS_BUILD_TYPE = "ament_cmake" + +inherit ros_${ROS_BUILD_TYPE} diff --git a/bsp/meta-hisilicon/recipes-bsp/atf/atf-hi3093_2.7.bb b/bsp/meta-hisilicon/recipes-bsp/atf/atf-hi3093_2.7.bb new file mode 100644 index 0000000000000000000000000000000000000000..cb8a3f46bda4e046df631c6d2b7f622a35168e01 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/atf/atf-hi3093_2.7.bb @@ -0,0 +1,53 @@ +SUMMARY = "ARM Trusted Firmware for hi3093" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://licenses/LICENSE.MIT;md5=57d76440fc5c9183c79d1747d18d2410" + +inherit kernel-arch + +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +SRC_URI = " \ + file://mpu_solution/open_source/arm-trusted-firmware-2.7 \ + file://fix-undefined-reference-to-pthread.patch \ +" + +S = "${WORKDIR}/mpu_solution/open_source/arm-trusted-firmware-2.7" + +export CFLAGS=" -O2 -pipe -g -feliminate-unused-debug-types " +export CXXFLAGS=" -O2 -pipe -g -feliminate-unused-debug-types " +export LDFLAGS=" --no-warn-rwx-segments -Wl,-O1 -Wl,--hash-style=gnu -Wl,--as-needed -Wl,--build-id=sha1 -Wl,-z,noexecstack -Wl,-z,relro,-z,now" +export CPPFLAGS="" + +do_configure:prepend() { + # ref mpu_solution/build/build_atf/build_atf.sh: cp $ATF_PRIV_PATH/* $ATF_VER_PATH/ -rf + cp -rf ${S}/plat/hisilicon/hibmc/* ${S}/ + + # ref mpu_solution/build/build_atf/build_atf.sh: + LINE_194_CONTENT=`cat Makefile | sed -n '194p'` + sed -i '195i LDFLAGS:=--no-warn-rwx-segments' Makefile + + # fix pedantic error: + sed -i 's#-Wall -Werror -pedantic##g' tools/fiptool/Makefile +} + +EXTRA_OEMAKE="CROSS_COMPILE=${TARGET_PREFIX}" + +do_compile:append() { + oe_runmake VERSION_MAJOR=013 VERSION_MINOR= VERSION_SVN=69275 DEBUG=0 UMPTE_BOARD=0 CHIP_VERIFY_BOARD=0 FVP_TSP_RAM_LOCATION=tdram FVP_SHARED_DATA_LOCATION=tdram PLAT=Hi1711 ARCH=aarch64 CROSS_COMPILE=${TARGET_PREFIX} TFCFG_COMPILE_PRODUCT=Hi1711 bl31 fip +} + +do_install:append() { + install -d ${D}/boot/ + install ${B}/build/Hi1711/release/bl31.bin ${D}/boot/ + install ${B}/build/Hi1711/release/bl31/bl31.dump ${D}/boot/ + install ${B}/build/Hi1711/release/bl31/bl31.map ${D}/boot/ +} + +# export /boot dir for u-boot pack +SYSROOT_DIRS += "/boot" +SYSROOT_PREPROCESS_FUNCS += "additional_populate_sysroot" +additional_populate_sysroot() { + sysroot_stage_dir ${D}/boot ${SYSROOT_DESTDIR}/boot +} + +FILES:${PN} += "/boot/*" diff --git a/bsp/meta-hisilicon/recipes-bsp/atf/files/fix-undefined-reference-to-pthread.patch b/bsp/meta-hisilicon/recipes-bsp/atf/files/fix-undefined-reference-to-pthread.patch new file mode 100644 index 0000000000000000000000000000000000000000..95bad4e173080f2c90b036ef511ad7f547aa5b88 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/atf/files/fix-undefined-reference-to-pthread.patch @@ -0,0 +1,11 @@ +--- a/tools/fiptool/Makefile ++++ b/tools/fiptool/Makefile +@@ -29,7 +29,7 @@ endif + # directory. However, for a local build of OpenSSL, the built binaries are + # located under the main project directory (i.e.: ${OPENSSL_DIR}, not + # ${OPENSSL_DIR}/lib/). +-LDLIBS := -L${OPENSSL_DIR}/lib -L${OPENSSL_DIR} -lcrypto ++LDLIBS := -L${OPENSSL_DIR}/lib -L${OPENSSL_DIR} -lcrypto -lpthread -ldl + + ifeq (${V},0) + Q := @ diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/S90autorun b/bsp/meta-hisilicon/recipes-bsp/ss928/files/S90autorun new file mode 100644 index 0000000000000000000000000000000000000000..67f4b54167fee8f40a025381f00f16670da86a10 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/S90autorun @@ -0,0 +1,121 @@ +#!/bin/sh + +cp /lib64/ld-linux-aarch64.so.1 /lib/ + +#Before loading the wifi driver, the relevant pins must be set first +#UART5 +bspmm 0x102F0100 0x1204 +bspmm 0x102F0104 0x1204 +bspmm 0x102F0108 0x1204 +bspmm 0x102F010C 0x1204 +#SDIO1 +bspmm 0x102F0054 0x1101 +bspmm 0x102F0050 0x1101 +bspmm 0x102F0040 0x1101 +bspmm 0x102F0044 0x1101 +bspmm 0x102F0048 0x1101 +bspmm 0x102F004C 0x1101 +#GPIO +bspmm 0x10230048 0x1200 +bspmm 0x10230044 0x1200 +bspmm 0x10230040 0x1200 +bspmm 0x1023003C 0x1200 +bspmm 0x102F00F4 0x1201 + +cd /ko + +bash ./load_ss928v100 -i -total 8192 -osmem 4096 + + +echo 47 > /sys/class/gpio/export +echo out >/sys/class/gpio/gpio47/direction +echo 1 > /sys/class/gpio/gpio47/value + +#echo 72 > /sys/class/gpio/export +#echo out >/sys/class/gpio/gpio72/direction +#echo 0 > /sys/class/gpio/gpio72/value + + +bspmm 0x0102F00F0 0x1201 #GPIO9_5 +bspmm 0x0102F0110 0x1201 #GPIO10_5 + + +#SDIO LEVEL TO 3.3v +bspmm 0x102e0010 0x11 + + +#GPIO7_1 GPIO7_2 GPIO6_6 +bspmm 0x0102F0094 0x1201 +bspmm 0x0102F0098 0x1201 +bspmm 0x0102F0088 0x1201 +bspmm 0x0102F0084 0x1201 +bspmm 0x0102F0080 0x1201 + +echo 57 > /sys/class/gpio/export +echo out >/sys/class/gpio/gpio57/direction +echo 1 > /sys/class/gpio/gpio57/value + +echo 58 > /sys/class/gpio/export +echo out >/sys/class/gpio/gpio58/direction +echo 1 > /sys/class/gpio/gpio58/value + +echo 54 > /sys/class/gpio/export +echo out >/sys/class/gpio/gpio54/direction +echo 1 > /sys/class/gpio/gpio54/value + +#GPIO6_2 1-> 928 HDMIout 0->loop hdmiout +echo 50 > /sys/class/gpio/export +echo out >/sys/class/gpio/gpio50/direction +echo 1 > /sys/class/gpio/gpio50/value + +#UART2 MUX +bspmm 0x0102F0070 0x1201 +bspmm 0x0102F0074 0x1201 +bspmm 0x0102F0078 0x1200 #RS232 +bspmm 0x0102F007C 0x1200 #RS232 + +#UART1 MUX +bspmm 0x0102F0060 0x1201 +bspmm 0x0102F0064 0x1201 +bspmm 0x0102F006C 0x1200 #RS232 +bspmm 0x0102F0068 0x1200 #RS232 + +#UART3 MUX +bspmm 0x0102f012c 0x00001201 +bspmm 0x0102f0130 0x00001201 +bspmm 0x0102f00D0 0x00001200 #RS485 + +#UART4 MUX +bspmm 0x0102f0134 0x00001201 +bspmm 0x0102f0138 0x00001201 + +#RTC 生成1秒脉冲 +i2c_write 0 0x64 0xd 0x44 + +#mipi GPIO config +bspmm 0x102f0150 0x1100 +bspmm 0x102f0160 0x1100 + +echo 97 > /sys/class/gpio/export +echo out > /sys/class/gpio/gpio97/direction +echo 1 > /sys/class/gpio/gpio97/value + +echo 101 > /sys/class/gpio/export +echo out > /sys/class/gpio/gpio101/direction +echo 1 > /sys/class/gpio/gpio101/value + +#wait for chip to start and complete +sleep 1 +res=`i2c_read 4 0xd0 0xa9 0xa9 1 1 |grep error` +if [ -z "$res" ]; then + echo "start config rohm" + bash /etc/init.d/rohm_400M.sh > /dev/null + echo "config rohm success" +fi + +echo 46 > /sys/class/gpio/export +echo out >/sys/class/gpio/gpio46/direction +echo 0 > /sys/class/gpio/gpio46/value +echo 'nameserver 8.8.8.8' >> /etc/resolv.conf +# ifconfig eth0 192.168.0.22 netmask 255.255.255.0 +# route -n add default gw 192.168.0.1 diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/hieulerpi1-user-driver.pc.in b/bsp/meta-hisilicon/recipes-bsp/ss928/files/hieulerpi1-user-driver.pc.in new file mode 100644 index 0000000000000000000000000000000000000000..197d24a5d852dd9d71da889e464e60709f512ac1 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/hieulerpi1-user-driver.pc.in @@ -0,0 +1,12 @@ +prefix=@prefix@ +exec_prefix=@exec_prefix@ +libdir=@libdir@ +includedir=@includedir@ + +Name: hieulerpi1-user-driver +Description: library from SS928V100_SDK +Version: @VERSION@ +Requires: +Requires.private: +Libs: -L${libdir} +Cflags: -I${includedir} -I${includedir}/npu -I${includedir}/svp_npu diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/i2c_soft/Makefile b/bsp/meta-hisilicon/recipes-bsp/ss928/files/i2c_soft/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..e03e2d866b053da46e345df1bc72054d5d58c7dd --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/i2c_soft/Makefile @@ -0,0 +1,9 @@ +KERNEL_DIR := $(KERNEL_SRC) +PWD := $(shell pwd) +obj-m := i2c_soft.o + +default: + $(MAKE) -C $(KERNEL_DIR) M=$(PWD) modules + +clean: + $(MAKE) -C $(KERNEL_DIR) M=$(PWD) clean diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/i2c_soft/i2c_soft.c b/bsp/meta-hisilicon/recipes-bsp/ss928/files/i2c_soft/i2c_soft.c new file mode 100644 index 0000000000000000000000000000000000000000..deb944e2fb59cc7eab207f234fc8dcc052a96a29 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/i2c_soft/i2c_soft.c @@ -0,0 +1,374 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +#define I2C_DEBUG(fmt,...) printk(KERN_INFO "[SOFT I2C]: "fmt,##__VA_ARGS__) +#define I2C_INFO(fmt,...) printk(KERN_INFO "[SOFT I2C]: "fmt,##__VA_ARGS__) + +struct soft_i2c_dev { + struct device *dev; + struct i2c_adapter adap; + + //gpio + int gpio_scl; + int gpio_sda; + + struct mutex lock; + unsigned int freq; + unsigned int T_ns; +}; + +#define delay_ns(T_ns) ndelay(T_ns); + + +static void iic_start(struct soft_i2c_dev* i2c_dev) +{ + gpio_direction_output(i2c_dev->gpio_sda,1); + gpio_direction_output(i2c_dev->gpio_scl,1); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_set_value(i2c_dev->gpio_sda,0); //开始信号 + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_set_value(i2c_dev->gpio_scl,0); // 拉低时钟等待开始 + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 +} + +static void iic_stop(struct soft_i2c_dev* i2c_dev) +{ + gpio_direction_output(i2c_dev->gpio_sda,0); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_direction_output(i2c_dev->gpio_scl,1); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_direction_output(i2c_dev->gpio_sda,1); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 +} + + +/** + * @brief 等待ACK,ACK返回1,NACK返回0 +*/ +static uint8_t iic_wait_ack(struct soft_i2c_dev* i2c_dev) +{ + uint8_t i = 0; + uint8_t rack = 0; +#define WAIT_TIMES 5 + unsigned int dt = i2c_dev->T_ns/(WAIT_TIMES*2); + + gpio_direction_input(i2c_dev->gpio_sda); // 主机释放SDA线 + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_direction_output(i2c_dev->gpio_scl,1); + + for(i = 0;i < WAIT_TIMES;i++){ + delay_ns(dt); + if(gpio_get_value(i2c_dev->gpio_sda)==0){ + rack = 1; + break; + } + } + + gpio_direction_output(i2c_dev->gpio_scl,0); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + + if(rack == 0){ // NOACK stop + iic_stop(i2c_dev); + } + + return rack; +} + +static void iic_ack(struct soft_i2c_dev* i2c_dev) +{ + gpio_direction_output(i2c_dev->gpio_sda,0); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_direction_output(i2c_dev->gpio_scl,1); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_direction_output(i2c_dev->gpio_scl,0); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_direction_input(i2c_dev->gpio_sda); // 主机释放SDA线 + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 +} + +void iic_nack(struct soft_i2c_dev* i2c_dev) +{ + gpio_direction_output(i2c_dev->gpio_sda,1); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_direction_output(i2c_dev->gpio_scl,1); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_direction_output(i2c_dev->gpio_scl,0); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 +} + +/** + * @brief IIC发送一个字节 + * @param data: 要发送的数据 + * @retval 无 + */ +uint8_t iic_send_byte(struct soft_i2c_dev* i2c_dev,uint8_t data) +{ + uint8_t t; + + for (t = 0; t < 8; t++) + { + gpio_direction_output(i2c_dev->gpio_sda,(data & 0x80) >> 7); /* 高位先发送 */ + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_direction_output(i2c_dev->gpio_scl,1); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + gpio_direction_output(i2c_dev->gpio_scl,0); + data <<= 1; /* 左移1位,用于下一次发送 */ + } + return iic_wait_ack(i2c_dev); +} + +/** + * @brief IIC读取一个字节 + * @param ack: ack=1时,发送ack; ack=0时,发送nack + * @retval 接收到的数据 + */ +uint8_t iic_read_byte(struct soft_i2c_dev* i2c_dev) +{ + uint8_t i, receive = 0; + + gpio_direction_input(i2c_dev->gpio_sda); + for (i = 0; i < 8; i++ ) /* 接收1个字节数据 */ + { + receive <<= 1; /* 高位先输出,所以先收到的数据位要左移 */ + gpio_direction_output(i2c_dev->gpio_scl,1); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + + if (gpio_get_value(i2c_dev->gpio_sda)) + receive++; + + gpio_direction_output(i2c_dev->gpio_scl,0); + delay_ns(i2c_dev->T_ns/2);// 等待半个时钟周期 + } + + return receive; +} + +static void iic_release(struct soft_i2c_dev* i2c_dev) +{ + gpio_direction_input(i2c_dev->gpio_scl); + gpio_direction_input(i2c_dev->gpio_sda); +} + + +static u32 soft_i2c_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C; +} + +static int _soft_i2c_transfer(struct soft_i2c_dev* i2c_dev,struct i2c_msg *msgs) +{ + int i = 0; + uint16_t flag_support = I2C_M_RD; + + // 检查flag有效性 + if((msgs->flags&(~flag_support))){ + printk("unsupport falg 0x%04x",msgs->flags&(~flag_support)); + //return -1;//包含不支持的标识 + } + + //发送设备地址 + iic_start(i2c_dev); + if(iic_send_byte(i2c_dev,msgs->addr<<1|(msgs->flags&I2C_M_RD?1:0))==0){ + iic_release(i2c_dev); + return -1; + } + if(msgs->flags&I2C_M_RD){//读模式 + for(i=0;ilen;i++){ + msgs->buf[i] = iic_read_byte(i2c_dev); + if(i != (msgs->len-1)) + iic_ack(i2c_dev); + } + iic_nack(i2c_dev); + } + else{ // 写模式 + for(i=0;ilen;i++){ + if(iic_send_byte(i2c_dev,msgs->buf[i])==0){ + iic_release(i2c_dev); + return -1; + } + } + } + + iic_stop(i2c_dev); + return 0; +} + +// static void _showMsg(struct i2c_msg *msg) +// { +// int i; +// printk( +// "\taddr:0x%02x\n" +// "\tflag:0x%04x\n" +// "\t len:%u\n" +// "\t buf:", +// msg->addr, +// msg->flags, +// msg->len +// ); +// for(i = 0;ilen;i++){ +// printk("%02x ",msg->buf[i]); +// } +// printk("\n"); +// } + +static int soft_i2c_xfer(struct i2c_adapter *adap,struct i2c_msg *msgs, int num) +{ + struct soft_i2c_dev *i2c = i2c_get_adapdata(adap); + int i; + int status = -EINVAL; + + //printk("soft_i2c_xfer\n"); + if (msgs == NULL || (num <= 0)) { + dev_err(i2c->dev, "msgs == NULL || num <= 0, Invalid argument!\n"); + return -EINVAL; + } + + // for(i=0;ilock); + + // printk("Msg Get Mutex\n"); + for(i = 0;i < num;i++){ + status = _soft_i2c_transfer(i2c,msgs+i); + if(status){ + mutex_unlock(&i2c->lock); + return -1; + } + } + + mutex_unlock(&i2c->lock); + return i; +} +//Algorithm +static const struct i2c_algorithm soft_i2c_algo = { + .master_xfer = soft_i2c_xfer, + .functionality = soft_i2c_func, +}; + +static int soft_i2c_init_adap(struct i2c_adapter* const adap, struct soft_i2c_dev* const i2c, + struct platform_device* const pdev) +{ + int status; + + i2c_set_adapdata(adap, i2c); + adap->owner = THIS_MODULE; + strlcpy(adap->name, "soft-i2c", sizeof(adap->name)); + adap->dev.parent = &pdev->dev; + adap->dev.of_node = pdev->dev.of_node; + adap->algo = &soft_i2c_algo; + + /* Add the i2c adapter */ + status = i2c_add_adapter(adap); + if (status) + dev_err(i2c->dev, "failed to add bus to i2c core\n"); + + return status; +} + +int soft_i2c_probe(struct platform_device *pdev) +{ + int ret = 0; + int status; + struct i2c_adapter *adap = NULL; + struct soft_i2c_dev *i2c; + + i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL); + if (i2c == NULL){ + I2C_INFO("nomem\n"); + ret = -ENOMEM; + goto ERR_NOMEM; + } + + platform_set_drvdata(pdev, i2c); + i2c->dev = &pdev->dev; + mutex_init(&i2c->lock); + + i2c->gpio_scl = of_get_named_gpio(pdev->dev.of_node,"gpio-scl",0); + if (!gpio_is_valid(i2c->gpio_scl)) { + I2C_INFO("not found gpio-scl\n"); + ret = -ENODEV; + goto ERR_NOCLK; + } + if (gpio_request(i2c->gpio_scl, "soft_scl") != 0) { + I2C_INFO("gpio-scl busy\n"); + ret = -ENODEV; + goto ERR_NOCLK; + } + gpio_direction_input(i2c->gpio_scl); + + i2c->gpio_sda = of_get_named_gpio(pdev->dev.of_node,"gpio-sda",0); + if (!gpio_is_valid(i2c->gpio_sda)) { + I2C_INFO("not found gpio-sda\n"); + ret = -ENODEV; + goto ERR_NOSDA; + } + if (gpio_request(i2c->gpio_sda, "soft_sda") != 0) { + I2C_INFO("gpio-sda busy\n"); + ret = -ENODEV; + goto ERR_NOSDA; + } + gpio_direction_input(i2c->gpio_sda); + + if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", &i2c->freq)) { + dev_warn(&pdev->dev, "Failed to read custom property\n"); + i2c->freq = 1000000; //default 1M + } + dev_info(&pdev->dev,"freq:%u",i2c->freq); + + i2c->T_ns = 1000000000 / i2c->freq; + + adap = &i2c->adap; + status = soft_i2c_init_adap(adap, i2c, pdev); + if(status!=0){ + ret = status; + goto ERR_INITADAP; + } + + return 0; + +ERR_INITADAP: + gpio_free(i2c->gpio_sda); +ERR_NOSDA: + gpio_free(i2c->gpio_scl); +ERR_NOCLK: +ERR_NOMEM: + return ret; +} + +int soft_i2c_remove(struct platform_device *pdev) +{ + struct soft_i2c_dev *i2c = platform_get_drvdata(pdev); + + mutex_destroy(&i2c->lock); + gpio_free(i2c->gpio_sda); + gpio_free(i2c->gpio_scl); + i2c_del_adapter(&i2c->adap); + + return 0; +} + +static const struct of_device_id soft_i2c_match[] = { + { .compatible = "i2c,soft" }, + {}, +}; +static struct platform_driver soft_i2c_driver = { + .driver = { + .name = "soft-i2c", + .of_match_table = soft_i2c_match, + }, + .probe = soft_i2c_probe, + .remove = soft_i2c_remove, +}; + +module_platform_driver(soft_i2c_driver); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("soft i2c driver"); \ No newline at end of file diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/mcu_tool/mcu_tool.c b/bsp/meta-hisilicon/recipes-bsp/ss928/files/mcu_tool/mcu_tool.c new file mode 100644 index 0000000000000000000000000000000000000000..821b8bb40d56fe23c7520c3a1b6d74060e9c1c0d --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/mcu_tool/mcu_tool.c @@ -0,0 +1,224 @@ +/** + * Copyright (c) 2024 Ebaina + * hieuler u-boot is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR + * FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ +#include +#include +#include +#include +#include +#include +#include + +enum gpio_type{ + GPIO_SYS_RSTN_IN, + GPIO_NEARLINK_EN, + GPIO_LED, + GPIO_CFG1, + GPIO_CFG2, + GPIO_CFG3, + + GPIO_TYPE_NUM, +}; + +void show_msg(struct i2c_msg* msg) +{ + printf("\tADDR:0x%02x\n",msg->addr); + printf("\tRW:%c\n",(msg->flags==0)?'W':'R'); + printf("\tLEN:0x%x\n",msg->len); + printf("\tDATA:"); + for(int i=0;ilen;i++){ + printf("%02x ",msg->buf[i]); + } + printf("\n"); +} +void show_msg_list(struct i2c_msg* msg,int len) +{ + for(int i=0;i='0'&&value[i]<='7') + { data += value[i] - '0'; continue; } + + if((odh==FLAG_DEC||odh==FLAG_HEX)&&value[i]>='8'&&value[i]<='9') + { data += value[i] - '0'; continue; } + + if((odh==FLAG_HEX)&&value[i]>='a'&&value[i]<='f') + { data += value[i] - 'a' + 10; continue; } + + if((odh==FLAG_HEX)&&value[i]>='A'&&value[i]<='F') + { data += value[i] - 'A' + 10; continue; } + + break; + } + + if(value[i]) + data /= times[odh]; + + return data; +} + +unsigned long atoi_auto(char* value) +{ + unsigned long data = 0; + + if(value==NULL) + return 0; + + if(value[0]=='0'){ + if(value[1]=='x') + data = atoi(value+2,FLAG_HEX); + else + data = atoi(value+1,FLAG_OCT); + } + else if(value[0]>='0'&&value[0]<='9'){ + data = atoi(value,FLAG_DEC); + } + + return data; +} + +void show_help() +{ + printf( +"\tmcu [args]\n" +"\n" +"\t:\n" +"\t\tled \n" +"\t\tnearlink(nl) \n" +"\t\temperature(t)\n" +"\t\tvoltage(v)\n\n" + ); +} + +enum ARGS { + ARGS_SELF, + ARGS_I2C_DEV, + ARGS_I2C_ADDR, + ARGS_OPT, +}; + +int send_msg(int i2c_dev,struct i2c_msg* msgs,int msg_num) +{ + struct i2c_rdwr_ioctl_data ioctl_data; + ioctl_data.msgs = msgs; + ioctl_data.nmsgs = msg_num; + + return ioctl(i2c_dev, I2C_RDWR, &ioctl_data) < 0; +} + +int main(int argc,char*argv[]) +{ + if(argc<=3){ + show_help(); + return 0; + } + int i2c_addr = atoi_auto(argv[ARGS_I2C_ADDR]); + int ret; + + struct i2c_rdwr_ioctl_data ioctl_data; + int i2c_dev = open(argv[ARGS_I2C_DEV], O_RDWR); + if (i2c_dev < 0) { + printf("Failed to open I2C device:<%s>",argv[ARGS_I2C_DEV]); + return 1; + } + + if(!strcmp(argv[ARGS_OPT],"led")) { + struct i2c_msg msg; + char buffer[4] = {0x03,0x00,0x02,0x01}; + msg.buf = buffer; + msg.addr = i2c_addr; + msg.flags = 0; + msg.len = 4; + if(!strcmp(argv[ARGS_OPT+1],"off")) + buffer[3] = 0x00; + if(send_msg(i2c_dev,&msg,1)) + goto error; + } + else if( + (!strcmp(argv[ARGS_OPT],"nearlink")) || + (!strcmp(argv[ARGS_OPT],"nl"))) { + struct i2c_msg msg; + char buffer[4] = {0x03,0x00,0x01,0x01}; + msg.buf = buffer; + msg.addr = i2c_addr; + msg.flags = 0; + msg.len = 4; + if(!strcmp(argv[ARGS_OPT+1],"off")) + buffer[3] = 0x00; + if(send_msg(i2c_dev,&msg,1)) + goto error; + } + else if( + (!strcmp(argv[ARGS_OPT],"temperature")) || + (!strcmp(argv[ARGS_OPT],"t"))) { + char buffer[6] = {0x01,0x01}; + struct i2c_msg msgs[2]; + msgs[0].addr = i2c_addr; + msgs[0].buf = buffer; + msgs[0].flags = 0; + msgs[0].len = 2; + msgs[1].addr = i2c_addr; + msgs[1].buf = buffer + 2; + msgs[1].flags = I2C_M_RD; + msgs[1].len = 4; + if(send_msg(i2c_dev,msgs,2)) + goto error; + float* data = (float*)(msgs[1].buf); + printf("%f\n",*data); + } + else if( + (!strcmp(argv[ARGS_OPT],"voltage")) || + (!strcmp(argv[ARGS_OPT],"v"))) { + char buffer[6] = {0x01,0x02}; + struct i2c_msg msgs[2]; + msgs[0].addr = i2c_addr; + msgs[0].buf = buffer; + msgs[0].flags = 0; + msgs[0].len = 2; + msgs[1].addr = i2c_addr; + msgs[1].buf = buffer + 2; + msgs[1].flags = I2C_M_RD; + msgs[1].len = 4; + if(send_msg(i2c_dev,msgs,2)) + goto error; + float* data = (float*)(msgs[1].buf); + printf("%f\n",*data); + } + + close(i2c_dev); + return 0; + +error: + printf("ERROR:%d\n",ret); + close(i2c_dev); + return -1; +} \ No newline at end of file diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/rohm_400M.sh b/bsp/meta-hisilicon/recipes-bsp/ss928/files/rohm_400M.sh new file mode 100644 index 0000000000000000000000000000000000000000..62fda4f8b2a2b47c73e6d677cfe288f219dfaf1b --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/rohm_400M.sh @@ -0,0 +1,536 @@ +#!/bin/sh +# init SOC mipi rx +pre_vo + +# ROHM RM84 TM41 512M config +i2c_write 4 0xd0 0x0007 0x00 1 1 +i2c_write 4 0xd0 0x000E 0x80 1 1 +usleep 5000 +i2c_write 4 0xd0 0x0005 0x03 1 1 +i2c_write 4 0xd0 0x000F 0x01 1 1 +i2c_write 4 0xd0 0x0010 0x00 1 1 +i2c_write 4 0xd0 0x0011 0x00 1 1 +i2c_write 4 0xd0 0x0012 0x00 1 1 +i2c_write 4 0xd0 0x0013 0x00 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+DESCRIPTION = "Some pre-compiled ko and initscripts for hieulerpi1" +SECTION = "base" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +DEPENDS = "update-rc.d-native" + +OPENEULER_LOCAL_NAME = "HiEuler-driver" + +RT_SUFFIX = "${@bb.utils.contains('DISTRO_FEATURES', 'preempt-rt', '-rt', '', d)}" + +SRC_URI = " \ + file://HiEuler-driver/drivers/ko${RT_SUFFIX}.tar.gz \ + file://HiEuler-driver/drivers/ko-extra.tar.gz \ + file://HiEuler-driver/drivers/btools \ + file://HiEuler-driver/drivers/S90AutoRun \ + file://HiEuler-driver/drivers/pinmux.sh \ + file://HiEuler-driver/drivers/env.tar.gz \ + file://HiEuler-driver/drivers/can-tools.tar.gz \ + file://HiEuler-driver/drivers/ws73.tar.gz \ + file://HiEuler-driver/mcu \ +" + +S = "${WORKDIR}/HiEuler-driver/drivers" + +INSANE_SKIP:${PN} += "already-stripped" +FILES:${PN} = "${sysconfdir} /usr/bin /ko /vendor /usr/sbin /firmware ${libdir}" + +do_install () { + install -d ${D}/usr/bin + install -d ${D}${libdir} + install -d ${D}/firmware + install -d ${D}${sysconfdir}/init.d + install -d ${D}${sysconfdir}/rc5.d + + install -m 0755 ${WORKDIR}/HiEuler-driver/drivers/btools ${D}/usr/bin/ + ln -s /usr/bin/btools ${D}/usr/bin/bspmm + ln -s /usr/bin/btools ${D}/usr/bin/i2c_read + ln -s /usr/bin/btools ${D}/usr/bin/i2c_write + install -m 0755 ${WORKDIR}/ko-extra/pre_vo ${D}/usr/bin/ + + cp -r ${WORKDIR}/ko ${D}/ + cp -f ${WORKDIR}/ko-extra/ch343.ko ${D}/ko + + #for mipi, use load_ss928v100 from ko-extra + cp -f ${WORKDIR}/ko-extra/load_ss928v100 ${D}/ko + + # install wifi-1102a firmware + # cp -f ${WORKDIR}/wifi-1102a-tools/plat.ko ${D}/ko + # cp -f ${WORKDIR}/wifi-1102a-tools/wifi.ko ${D}/ko + # install -m 0755 ${WORKDIR}/wifi-1102a-tools/start_wifi ${D}/usr/bin/ + # install -d ${D}/vendor + # cp -rf ${WORKDIR}/wifi-1102a-tools/vendor/* ${D}/vendor + + install -m 0755 ${S}/S90AutoRun ${D}${sysconfdir}/init.d/ + install -m 0755 ${S}/pinmux.sh ${D}${sysconfdir}/init.d/ + update-rc.d -r ${D} S90AutoRun start 90 5 . + update-rc.d -r ${D} pinmux.sh start 90 5 . + + install -m 0755 ${WORKDIR}/env/fw_env.config ${D}/etc/ + install -m 0755 ${WORKDIR}/env/fw_printenv ${D}/usr/bin/ + install -m 0755 ${WORKDIR}/env/fw_setenv ${D}/usr/bin/ + + cp -r ${WORKDIR}/can-tools/canutils/sbin ${D}/usr/ + cp -r ${WORKDIR}/can-tools/canutils/bin/* ${D}/usr/bin/ + cp -r ${WORKDIR}/can-tools/libsocketcan/lib/* ${D}${libdir} + + install -m 0755 ${WORKDIR}/HiEuler-driver/mcu/load_riscv ${D}/usr/sbin + install -m 0755 ${WORKDIR}/HiEuler-driver/mcu/virt-tty ${D}/usr/sbin + install -m 0755 ${WORKDIR}/HiEuler-driver/mcu/LiteOS.bin ${D}/firmware + + install -d ${D}${sysconfdir}/ws73 + cp ${WORKDIR}/ws73/firmware/* ${D}${sysconfdir}/ws73/ + cp ${WORKDIR}/ws73/ko/* ${D}/ko/ + cp ${WORKDIR}/ws73/config/* ${D}${sysconfdir}/ +} + +INHIBIT_PACKAGE_STRIP = "1" +INHIBIT_SYSROOT_STRIP = "1" diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/hieulerpi1-user-driver_2.0.2.2.bb b/bsp/meta-hisilicon/recipes-bsp/ss928/hieulerpi1-user-driver_2.0.2.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..fc643630ae604c7432c030759fbfc3b89c6dfe35 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/hieulerpi1-user-driver_2.0.2.2.bb @@ -0,0 +1,79 @@ +SUMMARY = "hirobot user driver bin package" +DESCRIPTION = "user lib and headers repack from SS928V100_SDK" +HOMEPAGE = "https://gitee.com/HiEuler/hardware_driver" +LICENSE = "CLOSED" + +inherit pkgconfig + +# This driver library is depended by many ROS packages, +# using the "lib" directory instead of the "lib64" directory +# for ros feature +python roslike_libdir_set() { + if bb.utils.contains('DISTRO_FEATURES', 'ros', True, False, d): + old_pkg_config = d.getVar("PKG_CONFIG_SYSROOT_DIR") + d.getVar('libdir') + "/pkgconfig" + pn = e.data.getVar("PN") + if pn.endswith("-native"): + return + d.setVar('libdir', d.getVar('libdir').replace('64', '')) + d.setVar('baselib', d.getVar('baselib').replace('64', '')) + d.appendVar("PKG_CONFIG_PATH", old_pkg_config) +} + +addhandler roslike_libdir_set +roslike_libdir_set[eventmask] = "bb.event.RecipePreFinalise" + +OPENEULER_LOCAL_NAME = "HiEuler-driver" + +SRC_URI = " \ + file://HiEuler-driver/drivers/lib.tar.gz \ + file://HiEuler-driver/drivers/include.tar.gz \ + file://hieulerpi1-user-driver.pc.in \ +" + +S = "${WORKDIR}" + +do_install:append() { + install -d ${D}${libdir} + install -d ${D}/usr/include + cp -rf -P ${WORKDIR}/lib/* ${D}${libdir} + cp -rf -P ${WORKDIR}/include/* ${D}/usr/include/ + cd ${D}${libdir} + ln -s libsecurec.so libboundscheck.so + cd - + sed \ + -e s#@VERSION@#${PV}# \ + -e s#@prefix@#${prefix}# \ + -e s#@exec_prefix@#${exec_prefix}# \ + -e s#@libdir@#${libdir}# \ + -e s#@includedir@#${includedir}# \ + ${WORKDIR}/hieulerpi1-user-driver.pc.in > ${WORKDIR}/hieulerpi1-user-driver.pc + + install -d ${D}${libdir}/pkgconfig + install -m 0644 ${WORKDIR}/hieulerpi1-user-driver.pc ${D}${libdir}/pkgconfig/ + +} + +# hieulerpi1-user-driver provides libboundscheck.so +PROVIDES += "libboundscheck" +RPROVIDES:${PN} += "libboundscheck" + +FILES:${PN} += " \ + ${libdir}/*so* \ + ${libdir}/npu/*so* \ + ${libdir}/svp_npu/*so* \ + ${libdir}/npu/stub/*so* \ + ${libdir}/stub/*so* \ +" + +FILES:${PN}-dev = " \ + ${includedir} \ + ${libdir}/pkgconfig \ +" + +FILES:${PN}-staticdev += " \ + ${libdir}/npu/*a \ + ${libdir}/svp_npu/*a \ +" + +EXCLUDE_FROM_SHLIBS = "1" +INSANE_SKIP:${PN} += "already-stripped dev-so" diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/i2c-soft_0.1.bb b/bsp/meta-hisilicon/recipes-bsp/ss928/i2c-soft_0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..0b4c43cd9ef1950268058906a1fa5c678c17723d --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/i2c-soft_0.1.bb @@ -0,0 +1,25 @@ +SUMMARY = "soft i2c driver" +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://i2c_soft.c;beginline=373;endline=373;md5=787eb329e3eac3e58f47744d2cf33699" + +SRC_URI = " \ + file://i2c_soft/i2c_soft.c \ + file://i2c_soft/Makefile \ +" + +S = "${WORKDIR}/i2c_soft" + +inherit module + +do_compile() { + oe_runmake +} + +do_install() { + install -d ${D}/ko + install -m 644 ${S}/i2c_soft.ko ${D}/ko +} + +FILES:${PN} = " /ko/i2c_soft.ko " + +INHIBIT_PACKAGE_STRIP = "1" diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/mcu-tool_0.1.bb b/bsp/meta-hisilicon/recipes-bsp/ss928/mcu-tool_0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..9ff498adc83e4d945462810167ac427ad0ffb14c --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/mcu-tool_0.1.bb @@ -0,0 +1,22 @@ +SUMMARY = "mcu tool" +LICENSE = "MulanPSL-2.0" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/MulanPSL-2.0;md5=74b1b7a7ee537a16390ed514498bf23c" + +SRC_URI = " \ + file://mcu_tool/mcu_tool.c \ +" + +S = "${WORKDIR}/mcu_tool" + +do_compile() { + ${CC} ${S}/mcu_tool.c -o ${S}/mcu_tool +} + +do_install() { + install -d ${D}/sbin + install -m 755 ${S}/mcu_tool ${D}/sbin +} + +FILES:${PN} = " /sbin/mcu_tool " + +INHIBIT_PACKAGE_STRIP = "1" diff --git a/bsp/meta-hisilicon/recipes-bsp/u-boot/files/0001-riscv-fix-build-with-binutils-2.38.patch b/bsp/meta-hisilicon/recipes-bsp/u-boot/files/0001-riscv-fix-build-with-binutils-2.38.patch new file mode 100644 index 0000000000000000000000000000000000000000..3598329b99d98c5686c2ff6136340f01f55ee02f --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/u-boot/files/0001-riscv-fix-build-with-binutils-2.38.patch @@ -0,0 +1,40 @@ +From 26a7f6b1e4c5f715c03e59a623f0d620498b92cf Mon Sep 17 00:00:00 2001 +From: Khem Raj +Date: Sun, 13 Feb 2022 21:11:31 -0800 +Subject: [PATCH] riscv: fix build with binutils 2.38 + +From version 2.38, binutils default to ISA spec version 20191213. This +means that the csr read/write (csrr*/csrw*) instructions and fence.i +instruction has separated from the `I` extension, become two standalone +extensions: Zicsr and Zifencei. + +The fix is to specify those extensions explicitely in -march. However as +older binutils version do not support this, we first need to detect +that. + +Fixes +arch/riscv/lib/cache.c: Assembler messages: +arch/riscv/lib/cache.c:12: Error: unrecognized opcode `fence.i' + +Upstream-Status: Submitted [] +Signed-off-by: Khem Raj +--- + arch/riscv/Makefile | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/arch/riscv/Makefile ++++ b/arch/riscv/Makefile +@@ -28,7 +28,12 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y) + CMODEL = medany + endif + +-ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C) -mabi=$(ABI) \ ++# Newer binutils versions default to ISA spec version 20191213 which moves some ++# instructions from the I extension to the Zicsr and Zifencei extensions. ++toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C)_zicsr_zifencei) ++zicsr_zifencei-$(toolchain-need-zicsr-zifencei) := _zicsr_zifencei ++ ++ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C)$(zicsr_zifencei-y) -mabi=$(ABI) \ + -mcmodel=$(CMODEL) + + PLATFORM_CPPFLAGS += $(ARCH_FLAGS) diff --git a/bsp/meta-hisilicon/recipes-bsp/u-boot/files/0001-riscv32-Use-double-float-ABI-for-rv32.patch b/bsp/meta-hisilicon/recipes-bsp/u-boot/files/0001-riscv32-Use-double-float-ABI-for-rv32.patch new file mode 100644 index 0000000000000000000000000000000000000000..0bf1bef2c99c664a90f87867fcdacef1e34e6c8e --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/u-boot/files/0001-riscv32-Use-double-float-ABI-for-rv32.patch @@ -0,0 +1,44 @@ +From 66dfe0fa886f6289add06d1af8642ce2b5302852 Mon Sep 17 00:00:00 2001 +From: Khem Raj +Date: Tue, 9 Feb 2021 16:40:12 -0800 +Subject: [PATCH] riscv32: Use double-float ABI for rv32 + +So it can use libgcc built with OE toolchain +Fixes +error: "can't link hard-float modules with soft-float modules" + +Signed-off-by: Khem Raj +Upstream-Status: Inappropriate [embedded specific] +--- + arch/riscv/Makefile | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/arch/riscv/Makefile ++++ b/arch/riscv/Makefile +@@ -5,11 +5,15 @@ + + ifeq ($(CONFIG_ARCH_RV64I),y) + ARCH_BASE = rv64im +- ABI = lp64 ++ ABI = lp64d ++ ARCH_D = d ++ ARCH_F = f + endif + ifeq ($(CONFIG_ARCH_RV32I),y) + ARCH_BASE = rv32im +- ABI = ilp32 ++ ABI = ilp32d ++ ARCH_D = d ++ ARCH_F = f + endif + ifeq ($(CONFIG_RISCV_ISA_A),y) + ARCH_A = a +@@ -24,7 +28,7 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y) + CMODEL = medany + endif + +-ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \ ++ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C) -mabi=$(ABI) \ + -mcmodel=$(CMODEL) + + PLATFORM_CPPFLAGS += $(ARCH_FLAGS) diff --git a/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-common.inc b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-common.inc new file mode 100644 index 0000000000000000000000000000000000000000..d7fd3c7227f0313da1862cdd96b13e6c590e60db --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-common.inc @@ -0,0 +1,24 @@ +HOMEPAGE = "http://www.denx.de/wiki/U-Boot/WebHome" +DESCRIPTION = "U-Boot, a boot loader for Embedded boards based on PowerPC, \ +ARM, MIPS and several other processors, which can be installed in a boot \ +ROM and used to initialize and test the hardware or to download and run \ +application code." +SECTION = "bootloaders" +DEPENDS += "flex-native bison-native" + +LICENSE = "GPL-2.0-or-later" +LIC_FILES_CHKSUM = "file://Licenses/README;md5=2ca5f2c35c8cc335f0a19756634782f1" +PE = "1" + +# We use the revision in order to avoid having to fetch it from the +# repo during parse +SRCREV = "e092e3250270a1016c877da7bdd9384f14b1321e" + +SRC_URI = "git://source.denx.de/u-boot/u-boot.git;protocol=https;branch=master" + +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" + +inherit pkgconfig + +do_configure[cleandirs] = "${B}" diff --git a/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-configure.inc b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-configure.inc new file mode 100644 index 0000000000000000000000000000000000000000..04e0894752f48e1bb68db759e69c526dcaf62c01 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-configure.inc @@ -0,0 +1,39 @@ +# This provides the logic for creating the desired u-boot config, +# accounting for any *.cfg files added to SRC_URI. It's separated +# from u-boot.inc for use by recipes that need u-boot properly +# configured but aren't doing a full build of u-boot itself (such as +# its companion tools). + +inherit uboot-config cml1 + +DEPENDS += "kern-tools-native" + +do_configure () { + if [ -n "${UBOOT_CONFIG}" ]; then + unset i j + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ]; then + oe_runmake -C ${S} O=${B}/${config} ${config} + if [ -n "${@' '.join(find_cfgs(d))}" ]; then + merge_config.sh -m -O ${B}/${config} ${B}/${config}/.config ${@" ".join(find_cfgs(d))} + oe_runmake -C ${S} O=${B}/${config} oldconfig + fi + fi + done + unset j + done + unset i + DEVTOOL_DISABLE_MENUCONFIG=true + else + if [ -n "${UBOOT_MACHINE}" ]; then + oe_runmake -C ${S} O=${B} ${UBOOT_MACHINE} + else + oe_runmake -C ${S} O=${B} oldconfig + fi + merge_config.sh -m .config ${@" ".join(find_cfgs(d))} + cml1_do_configure + fi +} diff --git a/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-emmc_2022.07.bb b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-emmc_2022.07.bb new file mode 100644 index 0000000000000000000000000000000000000000..6e68cc45579cc700fafa87894a4cea8eb459df95 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-emmc_2022.07.bb @@ -0,0 +1,59 @@ +# ref: u-boot_2022.07.bb fomr meta-openembedded +require u-boot-common.inc +require u-boot.inc +DEPENDS += "bc-native dtc-native python3-setuptools-native" + + +PV = "2022.07" + +UBOOT_MACHINE = "hi3093_euler_defconfig" +DEPENDS += "atf-hi3093" + +SRC_URI = " \ + file://mpu_solution/open_source/u-boot/u-boot \ + file://mpu_solution/src/real_time/baremetal/common/hi309x_baremetal.h \ + file://mpu_solution/build/build_sign \ + file://mpu_solution/build/version_5.10 \ +" + +S = "${WORKDIR}/mpu_solution/open_source/u-boot/u-boot" + +do_configure:prepend() { + cp ${WORKDIR}/mpu_solution/src/real_time/baremetal/common/hi309x_baremetal.h ${S}/include/configs/hi309x_memmap.h +} + +do_compile:append() { + ${HOST_PREFIX}objdump -D u-boot > u-boot.dump + mkdir -p pack + cp -f u-boot.bin u-boot.map u-boot.dump System.map pack + cp -f ${WORKDIR}/recipe-sysroot/boot/bl31.bin pack + pushd pack + BLOCKSIZE=1024 + UBOOT_CNT=440 + ATF_CNT=64 + UBOOT_BIN=u-boot.bin + ATF_BIN=bl31.bin + dd if=$ATF_BIN of=$UBOOT_BIN bs=$BLOCKSIZE count=$ATF_CNT seek=$UBOOT_CNT + cp -rf u-boot.bin ${WORKDIR}/mpu_solution/build/build_sign + pushd ${WORKDIR}/mpu_solution/build/build_sign + echo hi3093 > rsacert.cer + export KERNEL_VERSION_MAIN="5.10" + sh prepare_code_sign_data u-boot.bin + sh generate_sign_image u-boot_rsa_4096.cfg + popd + cp -f ${WORKDIR}/mpu_solution/build/build_sign/u-boot_rsa_4096.bin ./ + popd +} + +do_install() { + install -d ${D}/boot + install -m 644 ${B}/pack/u-boot.bin ${D}/boot + install -m 644 ${B}/pack/System.map ${D}/boot + install -m 644 ${B}/pack/u-boot.map ${D}/boot + install -m 644 ${B}/pack/u-boot.dump ${D}/boot + install -m 644 ${B}/pack/u-boot_rsa_4096.bin ${D}/boot +} + +do_deploy:append() { + install -m 644 ${D}/boot/u-boot_rsa_4096.bin ${DEPLOYDIR}/ +} diff --git a/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-sfc_2022.07.bb b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-sfc_2022.07.bb new file mode 100644 index 0000000000000000000000000000000000000000..93feda3f08a33caa559ead161bb1546ad255943d --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-sfc_2022.07.bb @@ -0,0 +1,34 @@ +# ref: u-boot_2022.07.bb +require u-boot-common.inc +require u-boot.inc +DEPENDS += "bc-native dtc-native python3-setuptools-native" + + +PV = "2022.07" + +UBOOT_MACHINE = "hi3093_sfc_defconfig" +DEPENDS += "atf-hi3093" + +SRC_URI = " \ + file://mpu_solution/open_source/u-boot/u-boot \ + file://mpu_solution/src/real_time/baremetal/common/hi309x_baremetal.h \ +" + +S = "${WORKDIR}/mpu_solution/open_source/u-boot/u-boot" + +do_configure:prepend() { + cp ${WORKDIR}/mpu_solution/src/real_time/baremetal/common/hi309x_baremetal.h ${S}/include/configs/hi309x_memmap.h +} + +do_compile:append() { + ${HOST_PREFIX}objdump -D u-boot > u-boot.dump +} + +do_install() { + install -d ${D}/boot + install -m 644 ${B}/u-boot.bin ${D}/boot/u-boot-sfc.bin +} + +do_deploy() { + install -m 644 ${D}/boot/u-boot-sfc.bin ${DEPLOYDIR}/ +} diff --git a/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot.inc b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot.inc new file mode 100644 index 0000000000000000000000000000000000000000..5705e5835b2135c5127e2d800bd4cf938cf2d351 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot.inc @@ -0,0 +1,343 @@ +SUMMARY = "Universal Boot Loader for embedded devices" +PROVIDES = "virtual/bootloader" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS += "${@bb.utils.contains('UBOOT_ENV_SUFFIX', 'scr', 'u-boot-mkimage-native', '', d)}" + +inherit uboot-config uboot-extlinux-config uboot-sign deploy python3native kernel-arch + +DEPENDS += "swig-native" + +EXTRA_OEMAKE = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${TARGET_PREFIX}gcc ${TOOLCHAIN_OPTIONS}" V=1' +EXTRA_OEMAKE += 'HOSTCC="${BUILD_CC} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}"' +EXTRA_OEMAKE += 'STAGING_INCDIR=${STAGING_INCDIR_NATIVE} STAGING_LIBDIR=${STAGING_LIBDIR_NATIVE}' + +PACKAGECONFIG ??= "openssl" +# u-boot will compile its own tools during the build, with specific +# configurations (aka when CONFIG_FIT_SIGNATURE is enabled) openssl is needed as +# a host build dependency. +PACKAGECONFIG[openssl] = ",,openssl-native" + +# Allow setting an additional version string that will be picked up by the +# u-boot build system and appended to the u-boot version. If the .scmversion +# file already exists it will not be overwritten. +UBOOT_LOCALVERSION ?= "" + +require u-boot-configure.inc + +do_savedefconfig() { + bbplain "Saving defconfig to:\n${B}/defconfig" + oe_runmake -C ${B} savedefconfig +} +do_savedefconfig[nostamp] = "1" +addtask savedefconfig after do_configure + +do_compile () { + if [ "${@bb.utils.filter('DISTRO_FEATURES', 'ld-is-gold', d)}" ]; then + sed -i 's/$(CROSS_COMPILE)ld$/$(CROSS_COMPILE)ld.bfd/g' ${S}/config.mk + fi + + unset LDFLAGS + unset CFLAGS + unset CPPFLAGS + + if [ ! -e ${B}/.scmversion -a ! -e ${S}/.scmversion ] + then + echo ${UBOOT_LOCALVERSION} > ${B}/.scmversion + echo ${UBOOT_LOCALVERSION} > ${S}/.scmversion + fi + + if [ -n "${UBOOT_CONFIG}" -o -n "${UBOOT_DELTA_CONFIG}" ] + then + unset i j k + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + oe_runmake -C ${S} O=${B}/${config} ${UBOOT_MAKE_TARGET} + for binary in ${UBOOT_BINARIES}; do + k=$(expr $k + 1); + if [ $k -eq $i ]; then + cp ${B}/${config}/${binary} ${B}/${config}/${UBOOT_BINARYNAME}-${type}.${UBOOT_SUFFIX} + fi + done + + # Generate the uboot-initial-env + if [ -n "${UBOOT_INITIAL_ENV}" ]; then + oe_runmake -C ${S} O=${B}/${config} u-boot-initial-env + cp ${B}/${config}/u-boot-initial-env ${B}/${config}/u-boot-initial-env-${type} + fi + + unset k + fi + done + unset j + done + unset i + else + oe_runmake -C ${S} O=${B} ${UBOOT_MAKE_TARGET} + + # Generate the uboot-initial-env + if [ -n "${UBOOT_INITIAL_ENV}" ]; then + oe_runmake -C ${S} O=${B} u-boot-initial-env + fi + fi + + if [ -n "${UBOOT_ENV}" ] && [ "${UBOOT_ENV_SUFFIX}" = "scr" ] + then + ${UBOOT_MKIMAGE} -C none -A ${UBOOT_ARCH} -T script -d ${WORKDIR}/${UBOOT_ENV_SRC} ${WORKDIR}/${UBOOT_ENV_BINARY} + fi +} + +do_install () { + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -D -m 644 ${B}/${config}/${UBOOT_BINARYNAME}-${type}.${UBOOT_SUFFIX} ${D}/boot/${UBOOT_BINARYNAME}-${type}-${PV}-${PR}.${UBOOT_SUFFIX} + ln -sf ${UBOOT_BINARYNAME}-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${D}/boot/${UBOOT_BINARY}-${type} + ln -sf ${UBOOT_BINARYNAME}-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${D}/boot/${UBOOT_BINARY} + + # Install the uboot-initial-env + if [ -n "${UBOOT_INITIAL_ENV}" ]; then + install -D -m 644 ${B}/${config}/u-boot-initial-env-${type} ${D}/${sysconfdir}/${UBOOT_INITIAL_ENV}-${MACHINE}-${type}-${PV}-${PR} + ln -sf ${UBOOT_INITIAL_ENV}-${MACHINE}-${type}-${PV}-${PR} ${D}/${sysconfdir}/${UBOOT_INITIAL_ENV}-${MACHINE}-${type} + ln -sf ${UBOOT_INITIAL_ENV}-${MACHINE}-${type}-${PV}-${PR} ${D}/${sysconfdir}/${UBOOT_INITIAL_ENV}-${type} + ln -sf ${UBOOT_INITIAL_ENV}-${MACHINE}-${type}-${PV}-${PR} ${D}/${sysconfdir}/${UBOOT_INITIAL_ENV} + fi + fi + done + unset j + done + unset i + else + install -D -m 644 ${B}/${UBOOT_BINARY} ${D}/boot/${UBOOT_IMAGE} + ln -sf ${UBOOT_IMAGE} ${D}/boot/${UBOOT_BINARY} + + # Install the uboot-initial-env + if [ -n "${UBOOT_INITIAL_ENV}" ]; then + install -D -m 644 ${B}/u-boot-initial-env ${D}/${sysconfdir}/${UBOOT_INITIAL_ENV}-${MACHINE}-${PV}-${PR} + ln -sf ${UBOOT_INITIAL_ENV}-${MACHINE}-${PV}-${PR} ${D}/${sysconfdir}/${UBOOT_INITIAL_ENV}-${MACHINE} + ln -sf ${UBOOT_INITIAL_ENV}-${MACHINE}-${PV}-${PR} ${D}/${sysconfdir}/${UBOOT_INITIAL_ENV} + fi + fi + + if [ -n "${UBOOT_ELF}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${UBOOT_ELF} ${D}/boot/u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${D}/boot/${UBOOT_BINARY}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${D}/boot/${UBOOT_BINARY} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${UBOOT_ELF} ${D}/boot/${UBOOT_ELF_IMAGE} + ln -sf ${UBOOT_ELF_IMAGE} ${D}/boot/${UBOOT_ELF_BINARY} + fi + fi + + if [ -e ${WORKDIR}/fw_env.config ] ; then + install -d ${D}${sysconfdir} + install -m 644 ${WORKDIR}/fw_env.config ${D}${sysconfdir}/fw_env.config + fi + + if [ -n "${SPL_BINARY}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${SPL_BINARY} ${D}/boot/${SPL_BINARYNAME}-${type}-${PV}-${PR}${SPL_DELIMITER}${SPL_SUFFIX} + ln -sf ${SPL_BINARYNAME}-${type}-${PV}-${PR}${SPL_DELIMITER}${SPL_SUFFIX} ${D}/boot/${SPL_BINARYFILE}-${type} + ln -sf ${SPL_BINARYNAME}-${type}-${PV}-${PR}${SPL_DELIMITER}${SPL_SUFFIX} ${D}/boot/${SPL_BINARYFILE} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${SPL_BINARY} ${D}/boot/${SPL_IMAGE} + ln -sf ${SPL_IMAGE} ${D}/boot/${SPL_BINARYFILE} + fi + fi + + if [ -n "${UBOOT_ENV}" ] + then + install -m 644 ${WORKDIR}/${UBOOT_ENV_BINARY} ${D}/boot/${UBOOT_ENV_IMAGE} + ln -sf ${UBOOT_ENV_IMAGE} ${D}/boot/${UBOOT_ENV_BINARY} + fi + + if [ "${UBOOT_EXTLINUX}" = "1" ] + then + install -Dm 0644 ${UBOOT_EXTLINUX_CONFIG} ${D}/${UBOOT_EXTLINUX_INSTALL_DIR}/${UBOOT_EXTLINUX_CONF_NAME} + fi +} + +PACKAGE_BEFORE_PN += "${PN}-env ${PN}-extlinux" + +RPROVIDES:${PN}-env += "u-boot-default-env" +ALLOW_EMPTY:${PN}-env = "1" +FILES:${PN}-env = " \ + ${@ '${sysconfdir}/${UBOOT_INITIAL_ENV}*' if d.getVar('UBOOT_INITIAL_ENV') else ''} \ + ${sysconfdir}/fw_env.config \ +" + +FILES:${PN}-extlinux = "${UBOOT_EXTLINUX_INSTALL_DIR}/${UBOOT_EXTLINUX_CONF_NAME}" +RDEPENDS:${PN} += "${@bb.utils.contains('UBOOT_EXTLINUX', '1', '${PN}-extlinux', '', d)}" + +FILES:${PN} = "/boot ${datadir}" +RDEPENDS:${PN} += "${PN}-env" + +do_deploy () { + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -D -m 644 ${B}/${config}/${UBOOT_BINARYNAME}-${type}.${UBOOT_SUFFIX} ${DEPLOYDIR}/${UBOOT_BINARYNAME}-${type}-${PV}-${PR}.${UBOOT_SUFFIX} + cd ${DEPLOYDIR} + ln -sf ${UBOOT_BINARYNAME}-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_SYMLINK}-${type} + ln -sf ${UBOOT_BINARYNAME}-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_SYMLINK} + ln -sf ${UBOOT_BINARYNAME}-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_BINARY}-${type} + ln -sf ${UBOOT_BINARYNAME}-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_BINARY} + + # Deploy the uboot-initial-env + if [ -n "${UBOOT_INITIAL_ENV}" ]; then + install -D -m 644 ${B}/${config}/u-boot-initial-env-${type} ${DEPLOYDIR}/${UBOOT_INITIAL_ENV}-${MACHINE}-${type}-${PV}-${PR} + cd ${DEPLOYDIR} + ln -sf ${UBOOT_INITIAL_ENV}-${MACHINE}-${type}-${PV}-${PR} ${UBOOT_INITIAL_ENV}-${MACHINE}-${type} + ln -sf ${UBOOT_INITIAL_ENV}-${MACHINE}-${type}-${PV}-${PR} ${UBOOT_INITIAL_ENV}-${type} + fi + fi + done + unset j + done + unset i + else + install -D -m 644 ${B}/${UBOOT_BINARY} ${DEPLOYDIR}/${UBOOT_IMAGE} + + cd ${DEPLOYDIR} + rm -f ${UBOOT_BINARY} ${UBOOT_SYMLINK} + ln -sf ${UBOOT_IMAGE} ${UBOOT_SYMLINK} + ln -sf ${UBOOT_IMAGE} ${UBOOT_BINARY} + + # Deploy the uboot-initial-env + if [ -n "${UBOOT_INITIAL_ENV}" ]; then + install -D -m 644 ${B}/u-boot-initial-env ${DEPLOYDIR}/${UBOOT_INITIAL_ENV}-${MACHINE}-${PV}-${PR} + cd ${DEPLOYDIR} + ln -sf ${UBOOT_INITIAL_ENV}-${MACHINE}-${PV}-${PR} ${UBOOT_INITIAL_ENV}-${MACHINE} + ln -sf ${UBOOT_INITIAL_ENV}-${MACHINE}-${PV}-${PR} ${UBOOT_INITIAL_ENV} + fi + fi + + if [ -e ${WORKDIR}/fw_env.config ] ; then + install -D -m 644 ${WORKDIR}/fw_env.config ${DEPLOYDIR}/fw_env.config-${MACHINE}-${PV}-${PR} + cd ${DEPLOYDIR} + ln -sf fw_env.config-${MACHINE}-${PV}-${PR} fw_env.config-${MACHINE} + ln -sf fw_env.config-${MACHINE}-${PV}-${PR} fw_env.config + fi + + if [ -n "${UBOOT_ELF}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${UBOOT_ELF} ${DEPLOYDIR}/u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_BINARY}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_BINARY} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_SYMLINK}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_SYMLINK} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${UBOOT_ELF} ${DEPLOYDIR}/${UBOOT_ELF_IMAGE} + ln -sf ${UBOOT_ELF_IMAGE} ${DEPLOYDIR}/${UBOOT_ELF_BINARY} + ln -sf ${UBOOT_ELF_IMAGE} ${DEPLOYDIR}/${UBOOT_ELF_SYMLINK} + fi + fi + + + if [ -n "${SPL_BINARY}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${SPL_BINARY} ${DEPLOYDIR}/${SPL_BINARYNAME}-${type}-${PV}-${PR}${SPL_DELIMITER}${SPL_SUFFIX} + rm -f ${DEPLOYDIR}/${SPL_BINARYFILE} ${DEPLOYDIR}/${SPL_SYMLINK} + ln -sf ${SPL_BINARYNAME}-${type}-${PV}-${PR}${SPL_DELIMITER}${SPL_SUFFIX} ${DEPLOYDIR}/${SPL_BINARYFILE}-${type} + ln -sf ${SPL_BINARYNAME}-${type}-${PV}-${PR}${SPL_DELIMITER}${SPL_SUFFIX} ${DEPLOYDIR}/${SPL_BINARYFILE} + ln -sf ${SPL_BINARYNAME}-${type}-${PV}-${PR}${SPL_DELIMITER}${SPL_SUFFIX} ${DEPLOYDIR}/${SPL_SYMLINK}-${type} + ln -sf ${SPL_BINARYNAME}-${type}-${PV}-${PR}${SPL_DELIMITER}${SPL_SUFFIX} ${DEPLOYDIR}/${SPL_SYMLINK} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${SPL_BINARY} ${DEPLOYDIR}/${SPL_IMAGE} + rm -f ${DEPLOYDIR}/${SPL_BINARYNAME} ${DEPLOYDIR}/${SPL_SYMLINK} + ln -sf ${SPL_IMAGE} ${DEPLOYDIR}/${SPL_BINARYNAME} + ln -sf ${SPL_IMAGE} ${DEPLOYDIR}/${SPL_SYMLINK} + fi + fi + + + if [ -n "${UBOOT_ENV}" ] + then + install -m 644 ${WORKDIR}/${UBOOT_ENV_BINARY} ${DEPLOYDIR}/${UBOOT_ENV_IMAGE} + rm -f ${DEPLOYDIR}/${UBOOT_ENV_BINARY} ${DEPLOYDIR}/${UBOOT_ENV_SYMLINK} + ln -sf ${UBOOT_ENV_IMAGE} ${DEPLOYDIR}/${UBOOT_ENV_BINARY} + ln -sf ${UBOOT_ENV_IMAGE} ${DEPLOYDIR}/${UBOOT_ENV_SYMLINK} + fi + + if [ "${UBOOT_EXTLINUX}" = "1" ] + then + install -m 644 ${UBOOT_EXTLINUX_CONFIG} ${DEPLOYDIR}/${UBOOT_EXTLINUX_SYMLINK} + ln -sf ${UBOOT_EXTLINUX_SYMLINK} ${DEPLOYDIR}/${UBOOT_EXTLINUX_CONF_NAME}-${MACHINE} + ln -sf ${UBOOT_EXTLINUX_SYMLINK} ${DEPLOYDIR}/${UBOOT_EXTLINUX_CONF_NAME} + fi + + if [ -n "${UBOOT_DTB}" ] + then + install -m 644 ${B}/arch/${UBOOT_ARCH}/dts/${UBOOT_DTB_BINARY} ${DEPLOYDIR}/ + fi +} + +addtask deploy before do_build after do_compile diff --git a/bsp/meta-hisilicon/recipes-connectivity/hostapd/files/patch-hostapd-for-wifi.patch b/bsp/meta-hisilicon/recipes-connectivity/hostapd/files/patch-hostapd-for-wifi.patch new file mode 100644 index 0000000000000000000000000000000000000000..2ddc35e2fb3d8b27a3433fc76fdb3eac030d4042 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-connectivity/hostapd/files/patch-hostapd-for-wifi.patch @@ -0,0 +1,164 @@ +From 9b49438f44e8d5f8707fa32164e92ed0babfdac8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=E5=94=AF?= <2530308275@qq.com> +Date: Fri, 26 Jan 2024 06:34:46 +0000 +Subject: [PATCH] patch hostapd for wifi + +--- + src/drivers/driver_nl80211.c | 2 +- + src/drivers/driver_nl80211.h | 4 +- + src/drivers/driver_nl80211_android.c | 101 +++++++++++++++++++++++++-- + 3 files changed, 99 insertions(+), 8 deletions(-) + +diff --git a/src/drivers/driver_nl80211.c b/src/drivers/driver_nl80211.c +index aec179a..6f9d9e0 100644 +--- a/src/drivers/driver_nl80211.c ++++ b/src/drivers/driver_nl80211.c +@@ -12198,8 +12198,8 @@ const struct wpa_driver_ops wpa_driver_nl80211_ops = { + #ifdef ANDROID_P2P + .set_noa = wpa_driver_set_p2p_noa, + .get_noa = wpa_driver_get_p2p_noa, +- .set_ap_wps_ie = wpa_driver_set_ap_wps_p2p_ie, + #endif /* ANDROID_P2P */ ++ .set_ap_wps_ie = wpa_driver_set_ap_wps_p2p_ie, + #ifdef ANDROID + #ifndef ANDROID_LIB_STUB + .driver_cmd = wpa_driver_nl80211_driver_cmd, +diff --git a/src/drivers/driver_nl80211.h b/src/drivers/driver_nl80211.h +index 80d4564..1eff456 100644 +--- a/src/drivers/driver_nl80211.h ++++ b/src/drivers/driver_nl80211.h +@@ -311,11 +311,11 @@ extern int wpa_driver_nl80211_driver_event(struct wpa_driver_nl80211_data *drv, + int wpa_driver_set_p2p_noa(void *priv, u8 count, int start, int duration); + int wpa_driver_get_p2p_noa(void *priv, u8 *buf, size_t len); + int wpa_driver_set_p2p_ps(void *priv, int legacy_ps, int opp_ps, int ctwindow); ++#endif /* ANDROID_P2P */ ++#endif /* ANDROID */ + int wpa_driver_set_ap_wps_p2p_ie(void *priv, const struct wpabuf *beacon, + const struct wpabuf *proberesp, + const struct wpabuf *assocresp); +-#endif /* ANDROID_P2P */ +-#endif /* ANDROID */ + + + /* driver_nl80211_scan.c */ +diff --git a/src/drivers/driver_nl80211_android.c b/src/drivers/driver_nl80211_android.c +index 9431a12..e42c99e 100644 +--- a/src/drivers/driver_nl80211_android.c ++++ b/src/drivers/driver_nl80211_android.c +@@ -170,17 +170,108 @@ int wpa_driver_set_p2p_ps(void *priv, int legacy_ps, int opp_ps, int ctwindow) + return -1; + } + ++#endif /* ANDROID_LIB_STUB */ ++#endif /* ANDROID_P2P */ ++ ++int wpa_driver_nl80211_driver_cmd(void *priv, char *cmd, char *buf, ++ size_t buf_len) ++{ ++ struct i802_bss *bss = priv; ++ struct wpa_driver_nl80211_data *drv = bss->drv; ++ struct ifreq ifr; ++ android_wifi_priv_cmd priv_cmd; ++ int ret = 0; ++#if 0 ++ if (bss->ifindex <= 0 && bss->wdev_id > 0) { ++ /* DRIVER CMD received on the DEDICATED P2P Interface which doesn't ++ * have an NETDEVICE associated with it. So we have to re-route the ++ * command to the parent NETDEVICE ++ */ ++ struct wpa_supplicant *wpa_s = (struct wpa_supplicant *)(drv->ctx); ++ ++ wpa_printf(MSG_DEBUG, "Re-routing DRIVER cmd to parent iface"); ++ if (wpa_s && wpa_s->parent) { ++ /* Update the nl80211 pointers corresponding to parent iface */ ++ bss = wpa_s->parent->drv_priv; ++ drv = bss->drv; ++ wpa_printf(MSG_DEBUG, "Re-routing command to iface: %s" ++ " cmd (%s)", bss->ifname, cmd); ++ } ++ } ++#endif ++ os_memcpy(buf, cmd, strlen(cmd) + 1); ++ memset(&ifr, 0, sizeof(ifr)); ++ memset(&priv_cmd, 0, sizeof(priv_cmd)); ++ os_strlcpy(ifr.ifr_name, bss->ifname, IFNAMSIZ); ++ priv_cmd.buf = buf; ++ priv_cmd.used_len = buf_len; ++ priv_cmd.total_len = buf_len; ++ ifr.ifr_data = (void *)&priv_cmd; ++ ++ if ((ret = ioctl(drv->global->ioctl_sock, SIOCDEVPRIVATE + 1, &ifr)) < 0) { ++ wpa_printf(MSG_ERROR, "%s: failed to issue private command: %s", __func__, cmd); ++ wpa_driver_send_hang_msg(drv); ++ } else { ++ drv_errors = 0; ++ ret = 0; ++ if ((os_strcasecmp(cmd, "LINKSPEED") == 0) || ++ (os_strcasecmp(cmd, "RSSI") == 0) || ++ (os_strcasecmp(cmd, "GETBAND") == 0) || ++ (os_strncasecmp(cmd, "WLS_BATCHING", 12) == 0)) ++ ret = strlen(buf); ++ wpa_printf(MSG_DEBUG, "%s %s len = %d, %zu", __func__, buf, ret, strlen(buf)); ++ } ++ return ret; ++} + + int wpa_driver_set_ap_wps_p2p_ie(void *priv, const struct wpabuf *beacon, + const struct wpabuf *proberesp, + const struct wpabuf *assocresp) + { +- return 0; +-} +- +-#endif /* ANDROID_LIB_STUB */ +-#endif /* ANDROID_P2P */ ++ char *buf; ++ const struct wpabuf *ap_wps_p2p_ie = NULL; ++ char *_cmd = "SET_AP_WPS_P2P_IE"; ++ char *pbuf; ++ int ret = 0; ++ int i, buf_len; ++ struct cmd_desc { ++ int cmd; ++ const struct wpabuf *src; ++ } cmd_arr[] = { ++ {0x1, beacon}, ++ {0x2, proberesp}, ++ {0x4, assocresp}, ++ {-1, NULL} ++ }; ++ ++ wpa_printf(MSG_DEBUG, "%s: Entry", __func__); ++ for (i = 0; cmd_arr[i].cmd != -1; i++) { ++ ap_wps_p2p_ie = cmd_arr[i].src; ++ if (ap_wps_p2p_ie) { ++ buf_len = strlen(_cmd) + 3 + wpabuf_len(ap_wps_p2p_ie); ++ buf = os_zalloc(buf_len); ++ if (NULL == buf) { ++ wpa_printf(MSG_ERROR, "%s: Out of memory", ++ __func__); ++ ret = -1; ++ break; ++ } ++ } else { ++ continue; ++ } ++ pbuf = buf; ++ pbuf += snprintf(pbuf, buf_len - wpabuf_len(ap_wps_p2p_ie), ++ "%s %d",_cmd, cmd_arr[i].cmd); ++ *pbuf++ = '\0'; ++ os_memcpy(pbuf, wpabuf_head(ap_wps_p2p_ie), wpabuf_len(ap_wps_p2p_ie)); ++ ret = wpa_driver_nl80211_driver_cmd(priv, buf, buf, buf_len); ++ os_free(buf); ++ if (ret < 0) ++ break; ++ } + ++ return ret; ++} + + int android_nl_socket_set_nonblocking(struct nl_sock *handle) + { +-- +2.17.1 + diff --git a/bsp/meta-hisilicon/recipes-connectivity/hostapd/hostapd_%.bbappend b/bsp/meta-hisilicon/recipes-connectivity/hostapd/hostapd_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..07d0e6cd33da10b1cadfadae4d333e9d658ecbbf --- /dev/null +++ b/bsp/meta-hisilicon/recipes-connectivity/hostapd/hostapd_%.bbappend @@ -0,0 +1,22 @@ +# main bb: yocto-meta-openembedded/meta-oe/recipes-connectivity/hostapd/hostapd_2.10.bb +# baseline: yocto-meta-openeuler/meta-openeuler/recipes-connectivity/hostapd/hostapd_%.bbappend + +FILESEXTRAPATHS:prepend := "${THISDIR}/files/:" + +SRC_URI:append = " \ + file://patch-hostapd-for-wifi.patch \ +" + +# patch for wifi +do_configure:append() { + pushd ${S}/hostapd + sed -i "s/#CONFIG_IEEE80211AX=y/CONFIG_IEEE80211AX=y/g" .config + sed -i "s/#CONFIG_WEP=y/CONFIG_WEP=y/g" .config + sed -i "s/#CONFIG_WPS=y/CONFIG_WPS=y/g" .config + sed -i "s/#CONFIG_ACS=y/CONFIG_ACS=y/g" .config + sed -i "s/#CONFIG_OWE=y/CONFIG_OWE=y/g" .config + echo "CONFIG_SAE=y" >> .config + popd + echo "DRV_OBJS += ../src/drivers/driver_nl80211_android.o" >> ${S}/src/drivers/drivers.mak +} + diff --git a/bsp/meta-hisilicon/recipes-connectivity/wpa-supplicant/files/patch-wpa_supplicant-for-wifi.patch b/bsp/meta-hisilicon/recipes-connectivity/wpa-supplicant/files/patch-wpa_supplicant-for-wifi.patch new file mode 100644 index 0000000000000000000000000000000000000000..0ffcea73a30c586c74e7ad6698b98bb6b89f9ab8 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-connectivity/wpa-supplicant/files/patch-wpa_supplicant-for-wifi.patch @@ -0,0 +1,4344 @@ +From 1306085974d08a0ba9098e0d60d174e230fc2f7f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=E5=94=AF?= <2530308275@qq.com> +Date: Fri, 26 Jan 2024 06:42:13 +0000 +Subject: [PATCH] patch wpa_supplicant for wifi + +--- + src/common/defs.h | 32 + + src/common/ieee802_11_defs.h | 5 + + src/common/wpa_common.c | 31 + + src/common/wpa_common.h | 11 +- + src/drivers/driver.h | 4 + + src/drivers/driver_nl80211.c | 30 +- + src/drivers/driver_nl80211.h | 6 +- + src/drivers/driver_nl80211_android.c | 112 +++- + src/drivers/drivers.mak | 4 + + src/drivers/nl80211_copy.h | 3 + + src/l2_packet/l2_packet.h | 6 + + src/p2p/p2p.c | 58 +- + src/utils/os.h | 4 +- + src/utils/wpa_debug.c | 109 +++- + src/utils/wpabuf.h | 20 + + wpa_supplicant/Makefile | 17 + + wpa_supplicant/Makefile.orig | 7 +- + wpa_supplicant/config.c | 108 +++- + wpa_supplicant/config.h | 4 + + wpa_supplicant/config_file.c | 35 ++ + wpa_supplicant/config_ssid.h | 30 +- + wpa_supplicant/ctrl_iface.c | 173 ++++- + wpa_supplicant/defconfig | 15 + + wpa_supplicant/events.c | 93 +++ + wpa_supplicant/wapi/hash.h | 81 +++ + wpa_supplicant/wapi/types.h | 99 +++ + wpa_supplicant/wapi/wai_asn1.h | 73 +++ + wpa_supplicant/wapi/wai_call_back.h | 63 ++ + wpa_supplicant/wapi/wai_cert.h | 237 +++++++ + wpa_supplicant/wapi/wai_ec.h | 123 ++++ + wpa_supplicant/wapi/wai_lib.h | 84 +++ + wpa_supplicant/wapi/wai_rxtx.h | 137 ++++ + wpa_supplicant/wapi/wai_sm.h | 287 +++++++++ + wpa_supplicant/wapi/wapi.c | 907 +++++++++++++++++++++++++++ + wpa_supplicant/wapi/wapi.h | 207 ++++++ + wpa_supplicant/wpa_supplicant.c | 153 ++++- + wpa_supplicant/wpa_supplicant_i.h | 3 + + 37 files changed, 3319 insertions(+), 52 deletions(-) + create mode 100644 wpa_supplicant/wapi/hash.h + create mode 100644 wpa_supplicant/wapi/types.h + create mode 100644 wpa_supplicant/wapi/wai_asn1.h + create mode 100644 wpa_supplicant/wapi/wai_call_back.h + create mode 100644 wpa_supplicant/wapi/wai_cert.h + create mode 100644 wpa_supplicant/wapi/wai_ec.h + create mode 100644 wpa_supplicant/wapi/wai_lib.h + create mode 100644 wpa_supplicant/wapi/wai_rxtx.h + create mode 100644 wpa_supplicant/wapi/wai_sm.h + create mode 100644 wpa_supplicant/wapi/wapi.c + create mode 100644 wpa_supplicant/wapi/wapi.h + +diff --git a/src/common/defs.h b/src/common/defs.h +index f43bdb5..514f355 100644 +--- a/src/common/defs.h ++++ b/src/common/defs.h +@@ -210,6 +210,38 @@ static inline int wpa_alg_bip(enum wpa_alg alg) + alg == WPA_ALG_BIP_GMAC_256 || + alg == WPA_ALG_BIP_CMAC_256; + } ++enum wpa_cipher { ++ CIPHER_NONE, ++ CIPHER_WEP40, ++ CIPHER_TKIP, ++ CIPHER_CCMP, ++ CIPHER_WEP104, ++ CIPHER_GCMP, ++#ifdef CONFIG_WAPI ++ CIPHER_SMS4 ++#endif ++ ++}; ++ ++enum wpa_key_mgmt { ++ KEY_MGMT_802_1X, ++ KEY_MGMT_PSK, ++ KEY_MGMT_NONE, ++ KEY_MGMT_802_1X_NO_WPA, ++ KEY_MGMT_WPA_NONE, ++ KEY_MGMT_FT_802_1X, ++ KEY_MGMT_FT_PSK, ++ KEY_MGMT_802_1X_SHA256, ++ KEY_MGMT_PSK_SHA256, ++ KEY_MGMT_WPS, ++ KEY_MGMT_SAE, ++ KEY_MGMT_FT_SAE, ++#ifdef CONFIG_WAPI ++ KEY_MGMT_WAPI_PSK, ++ KEY_MGMT_WAPI_CERT, ++#endif ++ KEY_MGMT_CCKM ++}; + + /** + * enum wpa_states - wpa_supplicant state +diff --git a/src/common/ieee802_11_defs.h b/src/common/ieee802_11_defs.h +index 928b535..f319a05 100644 +--- a/src/common/ieee802_11_defs.h ++++ b/src/common/ieee802_11_defs.h +@@ -323,6 +323,7 @@ + #define WLAN_EID_RSNI 65 + #define WLAN_EID_MEASUREMENT_PILOT_TRANSMISSION 66 + #define WLAN_EID_BSS_AVAILABLE_ADM_CAPA 67 ++#define WLAN_EID_WAPI 68 + #define WLAN_EID_BSS_AC_ACCESS_DELAY 68 /* note: also used by WAPI */ + #define WLAN_EID_TIME_ADVERTISEMENT 69 + #define WLAN_EID_RRM_ENABLED_CAPABILITIES 70 +@@ -1799,6 +1800,10 @@ enum plink_action_field { + + #define VENDOR_HT_CAPAB_OUI_TYPE 0x33 /* 00-90-4c:0x33 */ + ++#ifdef CONFIG_WAPI ++#define WLAN_AKM_SUITE_WAPI_PSK 0x000FAC11 ++#define WLAN_AKM_SUITE_WAPI_CERT 0x000FAC12 ++#endif + + /* IEEE 802.11v - WNM Action field values */ + enum wnm_action { +diff --git a/src/common/wpa_common.c b/src/common/wpa_common.c +index b78db05..4c4e293 100644 +--- a/src/common/wpa_common.c ++++ b/src/common/wpa_common.c +@@ -2394,6 +2394,12 @@ const char * wpa_key_mgmt_txt(int key_mgmt, int proto) + return "DPP"; + case WPA_KEY_MGMT_PASN: + return "PASN"; ++#ifdef CONFIG_WAPI ++ case WPA_KEY_MGMT_WAPI_PSK: ++ return "WAPI-PSK"; ++ case WPA_KEY_MGMT_WAPI_CERT: ++ return "WAPI-CERT"; ++#endif + default: + return "UNKNOWN"; + } +@@ -2758,6 +2764,11 @@ int wpa_pick_pairwise_cipher(int ciphers, int none_allowed) + return WPA_CIPHER_TKIP; + if (none_allowed && (ciphers & WPA_CIPHER_NONE)) + return WPA_CIPHER_NONE; ++#ifdef CONFIG_WAPI ++ if (ciphers & WPA_CIPHER_SMS4) ++ return WPA_CIPHER_SMS4; ++#endif ++ + return -1; + } + +@@ -2776,6 +2787,10 @@ int wpa_pick_group_cipher(int ciphers) + return WPA_CIPHER_GTK_NOT_USED; + if (ciphers & WPA_CIPHER_TKIP) + return WPA_CIPHER_TKIP; ++#ifdef CONFIG_WAPI ++ if (ciphers & WPA_CIPHER_SMS4) ++ return WPA_CIPHER_SMS4; ++#endif + return -1; + } + +@@ -2830,6 +2845,10 @@ int wpa_parse_cipher(const char *value) + val |= WPA_CIPHER_BIP_GMAC_256; + else if (os_strcmp(start, "BIP-CMAC-256") == 0) + val |= WPA_CIPHER_BIP_CMAC_256; ++#ifdef CONFIG_WAPI ++ else if (os_strcmp(start, "SMS4") == 0) ++ val |= WPA_CIPHER_SMS4; ++#endif + else { + os_free(buf); + return -1; +@@ -2921,6 +2940,18 @@ int wpa_write_ciphers(char *start, char *end, int ciphers, const char *delim) + pos += ret; + } + ++#ifdef CONFIG_WAPI ++ if (ciphers & WPA_CIPHER_SMS4) { ++ ret = os_snprintf(pos, end - pos, "%sSMS4", ++ pos == start ? "" : " "); ++ if (ret < 0 || ret >= end - pos) { ++ end[-1] = '\0'; ++ return -1; ++ } ++ pos += ret; ++ } ++#endif ++ + return pos - start; + } + +diff --git a/src/common/wpa_common.h b/src/common/wpa_common.h +index c28c55d..fee9a72 100644 +--- a/src/common/wpa_common.h ++++ b/src/common/wpa_common.h +@@ -33,7 +33,15 @@ WPA_CIPHER_GCMP_256 | WPA_CIPHER_CCMP_256) + (WPA_CIPHER_CCMP | WPA_CIPHER_GCMP | \ + WPA_CIPHER_GCMP_256 | WPA_CIPHER_CCMP_256 | \ + WPA_CIPHER_GTK_NOT_USED) +-#else /* CONFIG_NO_TKIP */ ++#elif defined CONFIG_WAPI ++#define WPA_ALLOWED_PAIRWISE_CIPHERS \ ++(WPA_CIPHER_CCMP | WPA_CIPHER_GCMP | WPA_CIPHER_TKIP | WPA_CIPHER_NONE | \ ++WPA_CIPHER_GCMP_256 | WPA_CIPHER_CCMP_256 | WPA_CIPHER_SMS4) ++#define WPA_ALLOWED_GROUP_CIPHERS \ ++(WPA_CIPHER_CCMP | WPA_CIPHER_GCMP | WPA_CIPHER_TKIP | \ ++WPA_CIPHER_GCMP_256 | WPA_CIPHER_CCMP_256 | \ ++WPA_CIPHER_GTK_NOT_USED | WPA_CIPHER_SMS4) ++#else + #define WPA_ALLOWED_PAIRWISE_CIPHERS \ + (WPA_CIPHER_CCMP | WPA_CIPHER_GCMP | WPA_CIPHER_TKIP | WPA_CIPHER_NONE | \ + WPA_CIPHER_GCMP_256 | WPA_CIPHER_CCMP_256) +@@ -42,6 +50,7 @@ WPA_CIPHER_GCMP_256 | WPA_CIPHER_CCMP_256) + WPA_CIPHER_GCMP_256 | WPA_CIPHER_CCMP_256 | \ + WPA_CIPHER_GTK_NOT_USED) + #endif /* CONFIG_NO_TKIP */ ++ + #define WPA_ALLOWED_GROUP_MGMT_CIPHERS \ + (WPA_CIPHER_AES_128_CMAC | WPA_CIPHER_BIP_GMAC_128 | WPA_CIPHER_BIP_GMAC_256 | \ + WPA_CIPHER_BIP_CMAC_256) +diff --git a/src/drivers/driver.h b/src/drivers/driver.h +index d3312a3..c9f81ba 100644 +--- a/src/drivers/driver.h ++++ b/src/drivers/driver.h +@@ -33,6 +33,10 @@ + #define HOSTAPD_CHAN_HT40PLUS 0x00000010 + #define HOSTAPD_CHAN_HT40MINUS 0x00000020 + #define HOSTAPD_CHAN_HT40 0x00000040 ++#ifdef CONFIG_WAPI ++#define SSID_MAX_WAPI_IE_LEN 100 ++#endif ++ + #define HOSTAPD_CHAN_SURVEY_LIST_INITIALIZED 0x00000080 + + #define HOSTAPD_CHAN_DFS_UNKNOWN 0x00000000 +diff --git a/src/drivers/driver_nl80211.c b/src/drivers/driver_nl80211.c +index aec179a..312153b 100644 +--- a/src/drivers/driver_nl80211.c ++++ b/src/drivers/driver_nl80211.c +@@ -3368,8 +3368,11 @@ static int wpa_driver_nl80211_set_key(struct i802_bss *bss, + key_flag == KEY_FLAG_PAIRWISE_RX ? + NL80211_KEY_NO_TX : NL80211_KEY_SET_TX)) + goto fail; +- } else if ((key_flag & KEY_FLAG_GROUP_MASK) == +- KEY_FLAG_GROUP_RX) { ++ } else if ((key_flag & KEY_FLAG_GROUP_MASK) == KEY_FLAG_GROUP_RX ++#ifdef CONFIG_WAPI ++ && alg != WPA_ALG_SMS4 ++#endif ++ ) { + wpa_printf(MSG_DEBUG, " RSN IBSS RX GTK"); + if (nla_put_u32(key_msg, NL80211_KEY_TYPE, + NL80211_KEYTYPE_GROUP)) +@@ -6175,6 +6178,10 @@ static int nl80211_connect_common(struct wpa_driver_nl80211_data *drv, + ver |= NL80211_WPA_VERSION_1; + if (params->wpa_proto & WPA_PROTO_RSN) + ver |= NL80211_WPA_VERSION_2; ++#ifdef CONFIG_WAPI ++ else if (params->wpa_ie[0] == WLAN_EID_WAPI) ++ ver = NL80211_WAPI_VERSION_1; ++#endif + + wpa_printf(MSG_DEBUG, " * WPA Versions 0x%x", ver); + if (nla_put_u32(msg, NL80211_ATTR_WPA_VERSIONS, ver)) +@@ -6221,7 +6228,12 @@ static int nl80211_connect_common(struct wpa_driver_nl80211_data *drv, + params->key_mgmt_suite == WPA_KEY_MGMT_FT_FILS_SHA256 || + params->key_mgmt_suite == WPA_KEY_MGMT_FT_FILS_SHA384 || + params->key_mgmt_suite == WPA_KEY_MGMT_OWE || +- params->key_mgmt_suite == WPA_KEY_MGMT_DPP) { ++ params->key_mgmt_suite == WPA_KEY_MGMT_DPP ++#ifdef CONFIG_WAPI ++ || params->key_mgmt_suite == WPA_KEY_MGMT_WAPI_PSK ++ || params->key_mgmt_suite == WPA_KEY_MGMT_WAPI_CERT ++#endif ++ ) { + int mgmt = RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X; + + switch (params->key_mgmt_suite) { +@@ -6279,6 +6291,14 @@ static int nl80211_connect_common(struct wpa_driver_nl80211_data *drv, + case WPA_KEY_MGMT_DPP: + mgmt = RSN_AUTH_KEY_MGMT_DPP; + break; ++#ifdef CONFIG_WAPI ++ case WPA_KEY_MGMT_WAPI_PSK: ++ mgmt = WLAN_AKM_SUITE_WAPI_PSK; ++ break; ++ case WPA_KEY_MGMT_WAPI_CERT: ++ mgmt = WLAN_AKM_SUITE_WAPI_CERT; ++ break; ++#endif + case WPA_KEY_MGMT_PSK: + default: + mgmt = RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X; +@@ -12198,8 +12218,10 @@ const struct wpa_driver_ops wpa_driver_nl80211_ops = { + #ifdef ANDROID_P2P + .set_noa = wpa_driver_set_p2p_noa, + .get_noa = wpa_driver_get_p2p_noa, +- .set_ap_wps_ie = wpa_driver_set_ap_wps_p2p_ie, + #endif /* ANDROID_P2P */ ++#if defined CONNECTIVITY_SET_P2P_IE_PATCH || defined ANDROID_P2P ++ .set_ap_wps_ie = wpa_driver_set_ap_wps_p2p_ie, ++#endif + #ifdef ANDROID + #ifndef ANDROID_LIB_STUB + .driver_cmd = wpa_driver_nl80211_driver_cmd, +diff --git a/src/drivers/driver_nl80211.h b/src/drivers/driver_nl80211.h +index 80d4564..ca4fa5d 100644 +--- a/src/drivers/driver_nl80211.h ++++ b/src/drivers/driver_nl80211.h +@@ -311,11 +311,13 @@ extern int wpa_driver_nl80211_driver_event(struct wpa_driver_nl80211_data *drv, + int wpa_driver_set_p2p_noa(void *priv, u8 count, int start, int duration); + int wpa_driver_get_p2p_noa(void *priv, u8 *buf, size_t len); + int wpa_driver_set_p2p_ps(void *priv, int legacy_ps, int opp_ps, int ctwindow); ++#endif /* ANDROID_P2P */ ++#endif /* ANDROID */ ++#if defined CONNECTIVITY_SET_P2P_IE_PATCH || defined ANDROID || defined ANDROID_P2P + int wpa_driver_set_ap_wps_p2p_ie(void *priv, const struct wpabuf *beacon, + const struct wpabuf *proberesp, + const struct wpabuf *assocresp); +-#endif /* ANDROID_P2P */ +-#endif /* ANDROID */ ++#endif + + + /* driver_nl80211_scan.c */ +diff --git a/src/drivers/driver_nl80211_android.c b/src/drivers/driver_nl80211_android.c +index 9431a12..0ca3d17 100644 +--- a/src/drivers/driver_nl80211_android.c ++++ b/src/drivers/driver_nl80211_android.c +@@ -19,7 +19,9 @@ + #include "utils/common.h" + #include "driver_nl80211.h" + #include "android_drv.h" +- ++#ifdef CONNECTIVITY_SET_P2P_IE_PATCH ++#include "wpa_supplicant_i.h" ++#endif + + typedef struct android_wifi_priv_cmd { + char *buf; +@@ -170,17 +172,117 @@ int wpa_driver_set_p2p_ps(void *priv, int legacy_ps, int opp_ps, int ctwindow) + return -1; + } + ++#endif /* ANDROID_LIB_STUB */ ++#endif /* ANDROID_P2P */ ++ ++#ifdef CONNECTIVITY_SET_P2P_IE_PATCH ++int wpa_driver_nl80211_driver_cmd(void *priv, char *cmd, char *buf, ++ size_t buf_len) ++{ ++ struct i802_bss *bss = priv; ++ struct wpa_driver_nl80211_data *drv = bss->drv; ++ struct ifreq ifr; ++ android_wifi_priv_cmd priv_cmd; ++ int ret = 0; ++ ++ if (bss->ifindex <= 0 && bss->wdev_id > 0) { ++ /* DRIVER CMD received on the DEDICATED P2P Interface which doesn't ++ * have an NETDEVICE associated with it. So we have to re-route the ++ * command to the parent NETDEVICE ++ */ ++ struct wpa_supplicant *wpa_s = (struct wpa_supplicant *)(drv->ctx); ++ ++ wpa_printf(MSG_DEBUG, "Re-routing DRIVER cmd to parent iface"); ++ if (wpa_s && wpa_s->parent) { ++ /* Update the nl80211 pointers corresponding to parent iface */ ++ bss = wpa_s->parent->drv_priv; ++ drv = bss->drv; ++ wpa_printf(MSG_DEBUG, "Re-routing command to iface: %s" ++ " cmd (%s)", bss->ifname, cmd); ++ } ++ } ++ os_memcpy(buf, cmd, strlen(cmd) + 1); ++ memset(&ifr, 0, sizeof(ifr)); ++ memset(&priv_cmd, 0, sizeof(priv_cmd)); ++ os_strlcpy(ifr.ifr_name, bss->ifname, IFNAMSIZ); ++ priv_cmd.buf = buf; ++ priv_cmd.used_len = buf_len; ++ priv_cmd.total_len = buf_len; ++ ifr.ifr_data = (void *)&priv_cmd; ++ ++ if ((ret = ioctl(drv->global->ioctl_sock, SIOCDEVPRIVATE + 1, &ifr)) < 0) { ++ wpa_printf(MSG_ERROR, "%s: failed to issue private command: %s", __func__, cmd); ++ wpa_driver_send_hang_msg(drv); ++ } else { ++ drv_errors = 0; ++ ret = 0; ++ if ((os_strcasecmp(cmd, "LINKSPEED") == 0) || ++ (os_strcasecmp(cmd, "RSSI") == 0) || ++ (os_strcasecmp(cmd, "GETBAND") == 0) || ++ (os_strncasecmp(cmd, "WLS_BATCHING", 12) == 0)) ++ ret = strlen(buf); ++ wpa_printf(MSG_DEBUG, "%s %s len = %d, %zu", __func__, buf, ret, strlen(buf)); ++ } ++ return ret; ++} ++ ++int wpa_driver_set_ap_wps_p2p_ie(void *priv, const struct wpabuf *beacon, ++ const struct wpabuf *proberesp, ++ const struct wpabuf *assocresp) ++{ ++ char *buf; ++ const struct wpabuf *ap_wps_p2p_ie = NULL; ++ char *_cmd = "SET_AP_WPS_P2P_IE"; ++ char *pbuf; ++ int ret = 0; ++ int i, buf_len; ++ struct cmd_desc { ++ int cmd; ++ const struct wpabuf *src; ++ } cmd_arr[] = { ++ {0x1, beacon}, ++ {0x2, proberesp}, ++ {0x4, assocresp}, ++ {-1, NULL} ++ }; ++ ++ wpa_printf(MSG_DEBUG, "%s: Entry", __func__); ++ for (i = 0; cmd_arr[i].cmd != -1; i++) { ++ ap_wps_p2p_ie = cmd_arr[i].src; ++ if (ap_wps_p2p_ie) { ++ buf_len = strlen(_cmd) + 3 + wpabuf_len(ap_wps_p2p_ie); ++ buf = os_zalloc(buf_len); ++ if (NULL == buf) { ++ wpa_printf(MSG_ERROR, "%s: Out of memory", ++ __func__); ++ ret = -1; ++ break; ++ } ++ } else { ++ continue; ++ } ++ pbuf = buf; ++ pbuf += snprintf(pbuf, buf_len - wpabuf_len(ap_wps_p2p_ie), ++ "%s %d",_cmd, cmd_arr[i].cmd); ++ *pbuf++ = '\0'; ++ os_memcpy(pbuf, wpabuf_head(ap_wps_p2p_ie), wpabuf_len(ap_wps_p2p_ie)); ++ ret = wpa_driver_nl80211_driver_cmd(priv, buf, buf, buf_len); ++ os_free(buf); ++ if (ret < 0) ++ break; ++ } ++ ++ return ret; ++} + ++#elif defined(ANDROID_P2P) && defined(ANDROID_LIB_STUB) + int wpa_driver_set_ap_wps_p2p_ie(void *priv, const struct wpabuf *beacon, + const struct wpabuf *proberesp, + const struct wpabuf *assocresp) + { + return 0; + } +- +-#endif /* ANDROID_LIB_STUB */ +-#endif /* ANDROID_P2P */ +- ++#endif + + int android_nl_socket_set_nonblocking(struct nl_sock *handle) + { +diff --git a/src/drivers/drivers.mak b/src/drivers/drivers.mak +index a03d4a0..9904af9 100644 +--- a/src/drivers/drivers.mak ++++ b/src/drivers/drivers.mak +@@ -42,6 +42,10 @@ endif + + ifdef CONFIG_DRIVER_NL80211 + DRV_CFLAGS += -DCONFIG_DRIVER_NL80211 ++ifdef CONNECTIVITY_SET_P2P_IE_PATCH ++DRV_CFLAGS += -I$(abspath ../wpa_supplicant/) ++DRV_OBJS += ../src/drivers/driver_nl80211_android.o ++endif + DRV_OBJS += ../src/drivers/driver_nl80211.o + DRV_OBJS += ../src/drivers/driver_nl80211_capa.o + DRV_OBJS += ../src/drivers/driver_nl80211_event.o +diff --git a/src/drivers/nl80211_copy.h b/src/drivers/nl80211_copy.h +index f962c06..23639b9 100644 +--- a/src/drivers/nl80211_copy.h ++++ b/src/drivers/nl80211_copy.h +@@ -4757,6 +4757,9 @@ enum nl80211_wpa_versions { + NL80211_WPA_VERSION_1 = 1 << 0, + NL80211_WPA_VERSION_2 = 1 << 1, + NL80211_WPA_VERSION_3 = 1 << 2, ++#ifdef CONFIG_WAPI ++ NL80211_WAPI_VERSION_1 = 1 << 7, ++#endif + }; + + /** +diff --git a/src/l2_packet/l2_packet.h b/src/l2_packet/l2_packet.h +index 6a86280..df00200 100644 +--- a/src/l2_packet/l2_packet.h ++++ b/src/l2_packet/l2_packet.h +@@ -29,6 +29,12 @@ struct l2_packet_data; + #pragma pack(push, 1) + #endif /* _MSC_VER */ + ++#ifdef CONFIG_WAPI ++#ifndef ETH_P_WAI ++#define ETH_P_WAI 0x88b4 ++#endif ++#endif ++ + struct l2_ethhdr { + u8 h_dest[ETH_ALEN]; + u8 h_source[ETH_ALEN]; +diff --git a/src/p2p/p2p.c b/src/p2p/p2p.c +index 598a449..9cc72bb 100644 +--- a/src/p2p/p2p.c ++++ b/src/p2p/p2p.c +@@ -249,6 +249,21 @@ void p2p_go_neg_failed(struct p2p_data *p2p, int status) + p2p->cfg->go_neg_completed(p2p->cfg->cb_ctx, &res); + } + ++#ifdef CONNECTIVITY_SINGLE_VAP_PATCH ++static int p2p_get_group_flag(struct p2p_data *p2p) ++{ ++ size_t i; ++ struct p2p_group *group; ++ ++ for (i = 0; i < p2p->num_groups; i++) { ++ group = p2p->groups[i]; ++ if (os_memcmp(p2p_group_get_interface_addr(group), ++ p2p->cfg->dev_addr, ETH_ALEN) == 0) ++ return 1; ++ } ++ return 0; ++} ++#endif + + static void p2p_listen_in_find(struct p2p_data *p2p, int dev_disc) + { +@@ -287,7 +302,14 @@ static void p2p_listen_in_find(struct p2p_data *p2p, int dev_disc) + p2p_set_timeout(p2p, 0, 0); + return; + } +- ++#ifdef CONNECTIVITY_SINGLE_VAP_PATCH ++ /* If the functions as the GO, no listening is required.*/ ++ if (p2p_get_group_flag(p2p) == 1) { ++ p2p_dbg(p2p, "p2p_listen_in_find go no response"); ++ p2p_set_timeout(p2p, 0, 0); ++ return; ++ } ++#endif + ies = p2p_build_probe_resp_ies(p2p, NULL, 0); + if (ies == NULL) + return; +@@ -335,8 +357,16 @@ int p2p_listen(struct p2p_data *p2p, unsigned int timeout) + p2p_dbg(p2p, "p2p_scan running - delay start of listen state"); + p2p->start_after_scan = P2P_AFTER_SCAN_LISTEN; + return 0; +- } ++ } + ++#ifdef CONNECTIVITY_SINGLE_VAP_PATCH ++ /* If the functions as the GO, no listening is required.*/ ++ if (p2p_get_group_flag(p2p) == 1) { ++ p2p_dbg(p2p, "p2p_listen go no response"); ++ p2p_set_state(p2p, P2P_LISTEN_ONLY); ++ return 0; ++ } ++#endif + ies = p2p_build_probe_resp_ies(p2p, NULL, 0); + if (ies == NULL) + return -1; +@@ -2241,8 +2271,19 @@ struct wpabuf * p2p_build_probe_resp_ies(struct p2p_data *p2p, + + /* P2P IE */ + len = p2p_buf_add_ie_hdr(buf); ++#ifdef CONNECTIVITY_SINGLE_VAP_PATCH ++ u8 group_capab = 0; ++ if (p2p->num_groups > 0) { ++ group_capab |= P2P_GROUP_CAPAB_GROUP_OWNER; ++ } ++ p2p_buf_add_capability(buf, p2p->dev_capab & ++ ~P2P_DEV_CAPAB_CLIENT_DISCOVERABILITY, group_capab); ++ p2p_dbg(p2p, "p2p_build_probe_resp_ies:num_group:%ld.group_capab:%x", ++ p2p->num_groups, group_capab); ++#else + p2p_buf_add_capability(buf, p2p->dev_capab & + ~P2P_DEV_CAPAB_CLIENT_DISCOVERABILITY, 0); ++#endif + if (p2p->ext_listen_interval) + p2p_buf_add_ext_listen_timing(buf, p2p->ext_listen_period, + p2p->ext_listen_interval); +@@ -3573,10 +3614,23 @@ void p2p_scan_ie(struct p2p_data *p2p, struct wpabuf *ies, const u8 *dev_id, + + if (dev_id) + p2p_buf_add_device_id(ies, dev_id); ++#ifdef CONNECTIVITY_SINGLE_VAP_PATCH ++ /* If as GO, change probe_req listening channel to AP networking */ ++ if (p2p_get_group_flag(p2p) == 1) { ++ p2p_buf_add_listen_channel(ies, p2p->cfg->country, ++ p2p->op_reg_class, p2p->op_channel); ++ } else { ++ if (p2p->cfg->reg_class && p2p->cfg->channel) { ++ p2p_buf_add_listen_channel(ies, p2p->cfg->country, ++ p2p->cfg->reg_class, p2p->cfg->channel); ++ } ++ } ++#else + if (p2p->cfg->reg_class && p2p->cfg->channel) + p2p_buf_add_listen_channel(ies, p2p->cfg->country, + p2p->cfg->reg_class, + p2p->cfg->channel); ++#endif + if (p2p->ext_listen_interval) + p2p_buf_add_ext_listen_timing(ies, p2p->ext_listen_period, + p2p->ext_listen_interval); +diff --git a/src/utils/os.h b/src/utils/os.h +index 21ba5c3..4f8a8b9 100644 +--- a/src/utils/os.h ++++ b/src/utils/os.h +@@ -8,7 +8,9 @@ + + #ifndef OS_H + #define OS_H +- ++#ifdef CONFIG_WAPI ++#include ++#endif + typedef long os_time_t; + + /** +diff --git a/src/utils/wpa_debug.c b/src/utils/wpa_debug.c +index a338a20..856f504 100644 +--- a/src/utils/wpa_debug.c ++++ b/src/utils/wpa_debug.c +@@ -26,6 +26,9 @@ static FILE *wpa_debug_tracing_file = NULL; + #define WPAS_TRACE_PFX "wpas <%d>: " + #endif /* CONFIG_DEBUG_LINUX_TRACING */ + ++#ifdef CONNECTIVITY_LOG_PATCH ++#include ++#endif /* CONNECTIVITY_LOG_PATCH */ + + int wpa_debug_level = MSG_INFO; + int wpa_debug_show_keys = 0; +@@ -206,6 +209,23 @@ void wpa_debug_close_linux_tracing(void) + * + * Note: New line '\n' is added to the end of the text when printing to stdout. + */ ++#ifdef CONNECTIVITY_LOG_PATCH ++static char *last_path = NULL; ++ ++/* 定义log 文件大小,修改大小为300k */ ++unsigned long g_wpa_debug_log_file_size = (300 * 1024); ++unsigned long wpa_debug_get_file_size(const char *path) ++{ ++ unsigned long filesize = -1; ++ struct stat statbuff; ++ if(stat(path, &statbuff) < 0) { ++ return filesize; ++ } else { ++ filesize = statbuff.st_size; ++ } ++ return filesize; ++} ++ + void wpa_printf(int level, const char *fmt, ...) + { + va_list ap; +@@ -222,8 +242,41 @@ void wpa_printf(int level, const char *fmt, ...) + va_start(ap, fmt); + vsyslog(syslog_priority(level), fmt, ap); + va_end(ap); +- } ++ } else { + #endif /* CONFIG_DEBUG_SYSLOG */ ++#ifdef CONFIG_DEBUG_FILE ++ if (out_file) { ++ va_start(ap, fmt); ++ /* 如果log 文件大于规定大小,则将log 文件备份为 last_path.tar.gz */ ++ /* 然后重新从头开始记录log 到last_path 中 */ ++ /* 例如原来的log 文件名为hostapd.log, 备份为hostapd.log.tar.gz */ ++ /* 重新重头开始记录log 到hostapd.log 中 */ ++ unsigned long filesize; ++ filesize = wpa_debug_get_file_size(last_path); ++ ++ if ((filesize != -1) && ++ (filesize > g_wpa_debug_log_file_size)) { ++ /* 备份log 文件 */ ++ char cmd[128]; ++ ++ /* 清空原log.tar.gz 文件内容,直接压缩覆盖 */ ++ snprintf(cmd, sizeof(cmd), "tar zcvf %s.tar.gz %s", ++ last_path, last_path); ++ system(cmd); ++ /* 清空原log 文件内容 */ ++ snprintf(cmd, sizeof(cmd), "rm %s", last_path); ++ system(cmd); ++ snprintf(cmd, sizeof(cmd), "touch %s", last_path); ++ system(cmd); ++ /* 重新打开log 文件 */ ++ if (wpa_debug_reopen_file() < 0) { ++ printf("%s[%d]: wpa_debug_reopen_file failed!\r\n", ++ __func__, __LINE__); ++ } ++ } ++ va_end(ap); ++ } ++#endif /* CONFIG_DEBUG_FILE */ + wpa_debug_print_timestamp(); + #ifdef CONFIG_DEBUG_FILE + if (out_file) { +@@ -240,6 +293,9 @@ void wpa_printf(int level, const char *fmt, ...) + va_end(ap); + } + #endif /* CONFIG_ANDROID_LOG */ ++#ifdef CONFIG_DEBUG_SYSLOG ++ } ++#endif /* CONFIG_DEBUG_SYSLOG */ + } + + #ifdef CONFIG_DEBUG_LINUX_TRACING +@@ -253,7 +309,55 @@ void wpa_printf(int level, const char *fmt, ...) + } + #endif /* CONFIG_DEBUG_LINUX_TRACING */ + } ++#else ++void wpa_printf(int level, const char *fmt, ...) ++{ ++ va_list ap; ++ ++ if (level >= wpa_debug_level) { ++#ifdef CONFIG_ANDROID_LOG ++ va_start(ap, fmt); ++ __android_log_vprint(wpa_to_android_level(level), ++ ANDROID_LOG_NAME, fmt, ap); ++ va_end(ap); ++#else /* CONFIG_ANDROID_LOG */ ++#ifdef CONFIG_DEBUG_SYSLOG ++ if (wpa_debug_syslog) { ++ va_start(ap, fmt); ++ vsyslog(syslog_priority(level), fmt, ap); ++ va_end(ap); ++ } ++#endif /* CONFIG_DEBUG_SYSLOG */ ++ wpa_debug_print_timestamp(); ++#ifdef CONFIG_DEBUG_FILE ++ if (out_file) { ++ va_start(ap, fmt); ++ vfprintf(out_file, fmt, ap); ++ fprintf(out_file, "\n"); ++ va_end(ap); ++ } ++#endif /* CONFIG_DEBUG_FILE */ ++ if (!wpa_debug_syslog && !out_file) { ++ va_start(ap, fmt); ++ vprintf(fmt, ap); ++ printf("\n"); ++ va_end(ap); ++ } ++#endif /* CONFIG_ANDROID_LOG */ ++ } + ++#ifdef CONFIG_DEBUG_LINUX_TRACING ++ if (wpa_debug_tracing_file != NULL) { ++ va_start(ap, fmt); ++ fprintf(wpa_debug_tracing_file, WPAS_TRACE_PFX, level); ++ vfprintf(wpa_debug_tracing_file, fmt, ap); ++ fprintf(wpa_debug_tracing_file, "\n"); ++ fflush(wpa_debug_tracing_file); ++ va_end(ap); ++ } ++#endif /* CONFIG_DEBUG_LINUX_TRACING */ ++} ++#endif + + static void _wpa_hexdump(int level, const char *title, const u8 *buf, + size_t len, int show, int only_syslog) +@@ -520,10 +624,11 @@ void wpa_hexdump_ascii_key(int level, const char *title, const void *buf, + _wpa_hexdump_ascii(level, title, buf, len, wpa_debug_show_keys); + } + +- ++#ifndef CONNECTIVITY_LOG_PATCH + #ifdef CONFIG_DEBUG_FILE + static char *last_path = NULL; + #endif /* CONFIG_DEBUG_FILE */ ++#endif /* CONNECTIVITY_LOG_PATCH */ + + int wpa_debug_reopen_file(void) + { +diff --git a/src/utils/wpabuf.h b/src/utils/wpabuf.h +index eb1db80..0db8f4f 100644 +--- a/src/utils/wpabuf.h ++++ b/src/utils/wpabuf.h +@@ -188,4 +188,24 @@ static inline void wpabuf_put_str(struct wpabuf *dst, const char *str) + wpabuf_put_data(dst, str, os_strlen(str)); + } + ++#ifdef CONFIG_WAPI ++static inline void wpabuf_reset(struct wpabuf *buf) ++{ ++ buf->used = 0; ++} ++ ++static inline void * wpabuf_free_keep_extdata(struct wpabuf *buf) ++{ ++ void* ext_data; ++ ++ if (NULL == buf) { ++ return NULL; ++ } ++ ext_data = buf->buf; ++ os_free(buf); ++ ++ return ext_data; ++} ++#endif ++ + #endif /* WPABUF_H */ +diff --git a/wpa_supplicant/Makefile b/wpa_supplicant/Makefile +index a0d9ae1..b5ab39b 100644 +--- a/wpa_supplicant/Makefile ++++ b/wpa_supplicant/Makefile +@@ -1882,7 +1882,24 @@ endif + ifdef CONFIG_NO_TKIP + CFLAGS += -DCONFIG_NO_TKIP + endif ++ifdef CONNECTIVITY_SET_P2P_IE_PATCH ++CFLAGS += -DCONNECTIVITY_SET_P2P_IE_PATCH ++endif ++ ++ifdef CONNECTIVITY_SINGLE_VAP_PATCH ++CFLAGS += -DCONNECTIVITY_SINGLE_VAP_PATCH ++endif + ++ifdef CONNECTIVITY_LOG_PATCH ++CFLAGS += -DCONNECTIVITY_LOG_PATCH ++endif ++ ++ifdef CONFIG_WAPI ++CFLAGS += -DCONFIG_WAPI ++CFLAGS += -I$(abspath wapi) ++CFLAGS += -I$(abspath ../src/drivers) ++OBJS += wapi/wapi.o ++endif + dynamic_eap_methods: $(EAPDYN) + + _OBJS_VAR := OBJS_priv +diff --git a/wpa_supplicant/config.c b/wpa_supplicant/config.c +index bf062b0..89801de 100644 +--- a/wpa_supplicant/config.c ++++ b/wpa_supplicant/config.c +@@ -568,12 +568,21 @@ static int wpa_config_parse_psk(const struct parse_data *data, + len = pos - value; + else + len = os_strlen(value); ++#ifdef CONFIG_WAPI ++ if (len < 8 || len > 64) { ++ wpa_printf(MSG_ERROR, "Line %d: Invalid passphrase " ++ "length %lu (expected: 8..64) '%s'.", ++ line, (unsigned long) len, value); ++ return -1; ++ } ++#else + if (len < 8 || len > 63) { + wpa_printf(MSG_ERROR, "Line %d: Invalid passphrase " + "length %lu (expected: 8..63) '%s'.", + line, (unsigned long) len, value); + return -1; + } ++#endif + wpa_hexdump_ascii_key(MSG_MSGDUMP, "PSK (ASCII passphrase)", + (u8 *) value, len); + if (has_ctrl_char((u8 *) value, len)) { +@@ -643,7 +652,12 @@ static char * wpa_config_write_psk(const struct parse_data *data, + os_strlen(ssid->passphrase)); + + if (ssid->psk_set) ++#ifdef CONFIG_WAPI ++ return wpa_config_write_string_hex(ssid->psk, (ssid->psk_set==1) ? PMK_LEN : ssid->psk_set); ++#else ++ + return wpa_config_write_string_hex(ssid->psk, PMK_LEN); ++#endif + + return NULL; + } +@@ -679,6 +693,12 @@ static int wpa_config_parse_proto(const struct parse_data *data, + val |= WPA_PROTO_RSN; + else if (os_strcmp(start, "OSEN") == 0) + val |= WPA_PROTO_OSEN; ++#ifdef CONFIG_WAPI ++ else if (os_strcmp(start, "WAPI") == 0) { ++ val |= WPA_PROTO_WAPI; ++ wpa_printf(MSG_DEBUG, "WAPI network\n"); ++ } ++#endif + else { + wpa_printf(MSG_ERROR, "Line %d: invalid proto '%s'", + line, start); +@@ -740,6 +760,17 @@ static char * wpa_config_write_proto(const struct parse_data *data, + return buf; + pos += ret; + } ++#ifdef CONFIG_WAPI ++ if (ssid->proto & WPA_PROTO_WAPI) { ++ ret = os_snprintf(pos, end - pos, "%sWAPI", ++ pos == buf ? "" : " "); ++ if (ret < 0 || ret >= end - pos) { ++ wpa_printf(MSG_ERROR, "%s:%d, snprintf failed, ret=%d", __func__, __LINE__, ret); ++ return buf; ++ } ++ pos += ret; ++ } ++#endif + + if (pos == buf) { + os_free(buf); +@@ -783,6 +814,13 @@ static int wpa_config_parse_key_mgmt(const struct parse_data *data, + val |= WPA_KEY_MGMT_NONE; + else if (os_strcmp(start, "WPA-NONE") == 0) + val |= WPA_KEY_MGMT_WPA_NONE; ++#ifdef CONFIG_WAPI ++ else if (os_strcmp(start, "WAPI-PSK") == 0) ++ val |= WPA_KEY_MGMT_WAPI_PSK; ++ else if (os_strcmp(start, "WAPI-CERT") == 0) ++ val |= WPA_KEY_MGMT_WAPI_CERT; ++#endif ++ + #ifdef CONFIG_IEEE80211R + else if (os_strcmp(start, "FT-PSK") == 0) + val |= WPA_KEY_MGMT_FT_PSK; +@@ -927,6 +965,32 @@ static char * wpa_config_write_key_mgmt(const struct parse_data *data, + pos += ret; + } + ++#ifdef CONFIG_WAPI ++ if (ssid->key_mgmt & WPA_KEY_MGMT_WAPI_PSK) { ++ ret = os_snprintf(pos, end - pos, "%sWAPI-PSK", ++ pos == buf ? "" : " "); ++ ++ if (os_snprintf_error(end - pos, ret)) { ++ end[-1] = '\0'; ++ wpa_printf(MSG_ERROR, "%s:%d, snprintf failed, ret=%d", __func__, __LINE__, ret); ++ return buf; ++ } ++ pos += ret; ++ } ++ ++ if (ssid->key_mgmt & WPA_KEY_MGMT_WAPI_CERT) { ++ ret = os_snprintf(pos, end - pos, "%sWAPI-CERT", ++ pos == buf ? "" : " "); ++ ++ if (os_snprintf_error(end - pos, ret)) { ++ end[-1] = '\0'; ++ wpa_printf(MSG_ERROR, "%s:%d, snprintf failed, ret=%d", __func__, __LINE__, ret); ++ return buf; ++ } ++ pos += ret; ++ } ++#endif ++ + #ifdef CONFIG_IEEE80211R + if (ssid->key_mgmt & WPA_KEY_MGMT_FT_PSK) { + ret = os_snprintf(pos, end - pos, "%sFT-PSK", +@@ -2509,6 +2573,12 @@ static const struct parse_data ssid_fields[] = { + { STRe(openssl_ciphers, openssl_ciphers) }, + { INTe(erp, erp) }, + #endif /* IEEE8021X_EAPOL */ ++#ifdef CONFIG_WAPI ++ { STR(wapi_as_cert)}, ++ { STR(wapi_user_cert)}, ++ { INT(psk_key_type)}, ++ { INT(cert_index)}, ++#endif + #ifdef CONFIG_WEP + { FUNC_KEY(wep_key0) }, + { FUNC_KEY(wep_key1) }, +@@ -2823,6 +2893,11 @@ void wpa_config_free_ssid(struct wpa_ssid *ssid) + #ifdef CONFIG_HT_OVERRIDES + os_free(ssid->ht_mcs); + #endif /* CONFIG_HT_OVERRIDES */ ++#ifdef CONFIG_WAPI ++ os_free(ssid->wapi_as_cert); ++ os_free(ssid->wapi_user_cert); ++#endif ++ + #ifdef CONFIG_MESH + os_free(ssid->mesh_basic_rates); + #endif /* CONFIG_MESH */ +@@ -2967,7 +3042,9 @@ void wpa_config_free(struct wpa_config *config) + #endif /* CONFIG_MBO */ + os_free(config->dpp_name); + os_free(config->dpp_mud_url); +- ++#ifdef CONFIG_WAPI ++ os_free(config->wapi_type); ++#endif + os_free(config); + } + +@@ -3191,6 +3268,25 @@ int wpa_config_set(struct wpa_ssid *ssid, const char *var, const char *value, + } + ret = -1; + } ++ ++#ifdef CONFIG_WAPI ++ else{ ++ if(os_strncmp(var, "wep_key", os_strlen("wep_key")) != 0 ++ && os_strcmp(var, "psk") != 0 ++ && os_strcmp(var, "password") != 0) { ++ wpa_printf(MSG_EXCESSIVE, "parse(%s, %s) succeeded\n", var, value); ++ } ++ ++ if (os_strcmp(var, "wapi_as_cert")==0) { ++ wpa_printf(MSG_EXCESSIVE, "ssid->wapi_as_cert=%s\n", ++ ssid->wapi_as_cert); ++ } ++ if (os_strcmp(var, "wapi_user_cert")==0) { ++ wpa_printf(MSG_EXCESSIVE, "ssid->wapi_user_cert=%s\n", ++ ssid->wapi_user_cert); ++ } ++ } ++#endif + #ifdef CONFIG_SAE + if (os_strcmp(var, "ssid") == 0 || + os_strcmp(var, "psk") == 0 || +@@ -3399,6 +3495,13 @@ char * wpa_config_get_no_key(struct wpa_ssid *ssid, const char *var) + */ + void wpa_config_update_psk(struct wpa_ssid *ssid) + { ++#ifdef CONFIG_WAPI ++ /* Don't update for WAPI */ ++ if (((ssid->proto & WPA_PROTO_WAPI) == WPA_PROTO_WAPI) ++ && (ssid->key_mgmt & (WPA_KEY_MGMT_WAPI_PSK|WPA_KEY_MGMT_WAPI_CERT))) ++ return; ++#endif ++ + #ifndef CONFIG_NO_PBKDF2 + pbkdf2_sha1(ssid->passphrase, ssid->ssid, ssid->ssid_len, 4096, + ssid->psk, PMK_LEN); +@@ -5124,6 +5227,9 @@ static const struct global_parse_data global_fields[] = { + { STR_RANGE(device_name, 0, WPS_DEV_NAME_MAX_LEN), + CFG_CHANGED_DEVICE_NAME }, + { STR_RANGE(manufacturer, 0, 64), CFG_CHANGED_WPS_STRING }, ++#ifdef CONFIG_WAPI ++ { STR_RANGE(wapi_type, 0, 64), CFG_CHANGED_WPS_STRING }, ++#endif + { STR_RANGE(model_name, 0, 32), CFG_CHANGED_WPS_STRING }, + { STR_RANGE(model_number, 0, 32), CFG_CHANGED_WPS_STRING }, + { STR_RANGE(serial_number, 0, 32), CFG_CHANGED_WPS_STRING }, +diff --git a/wpa_supplicant/config.h b/wpa_supplicant/config.h +index d22ef05..0f35727 100644 +--- a/wpa_supplicant/config.h ++++ b/wpa_supplicant/config.h +@@ -720,6 +720,10 @@ struct wpa_config { + */ + char *model_name; + ++#ifdef CONFIG_WAPI ++ char *wapi_type; ++#endif ++ + /** + * model_number - Model Number (WPS) + * Additional device description (up to 32 ASCII characters) +diff --git a/wpa_supplicant/config_file.c b/wpa_supplicant/config_file.c +index 6db5010..f9d821a 100644 +--- a/wpa_supplicant/config_file.c ++++ b/wpa_supplicant/config_file.c +@@ -24,12 +24,30 @@ + #include "eap_peer/eap_methods.h" + #include "eap_peer/eap.h" + #include "utils/config.h" ++#ifdef CONFIG_WAPI ++struct wpa_supplicant; ++#include "drivers/driver.h" ++#include "utils/list.h" ++#include "bss.h" ++#include "wapi/wapi.h" ++#endif + + + static int wpa_config_validate_network(struct wpa_ssid *ssid, int line) + { + int errors = 0; + ++#ifdef CONFIG_WAPI ++ if (ssid->key_mgmt & (WPA_KEY_MGMT_WAPI_PSK|WPA_KEY_MGMT_WAPI_CERT)) { ++ if (ssid->group_cipher!=WPA_CIPHER_SMS4) { ++ ssid->group_cipher = WPA_CIPHER_SMS4; ++ } ++ if (ssid->pairwise_cipher!=WPA_CIPHER_SMS4) { ++ ssid->pairwise_cipher = WPA_CIPHER_SMS4; ++ } ++ } ++#endif ++ + if (ssid->passphrase) { + if (ssid->psk_set) { + wpa_printf(MSG_ERROR, "Line %d: both PSK and " +@@ -679,6 +697,19 @@ static void wpa_config_write_network(FILE *f, struct wpa_ssid *ssid) + write_proto(f, ssid); + write_key_mgmt(f, ssid); + INT_DEF(bg_scan_period, DEFAULT_BG_SCAN_PERIOD); ++#ifdef CONFIG_WAPI ++ if ( ssid->key_mgmt == WPA_KEY_MGMT_WAPI_PSK ) { ++ /* WAPI PSK network */ ++ INT(psk_key_type); ++ } ++ if ( ssid->key_mgmt == WPA_KEY_MGMT_WAPI_CERT ) { ++ /* WAPI CERT network */ ++ INT(cert_index); ++ STR(wapi_as_cert); ++ STR(wapi_user_cert); ++ } ++#endif ++ + write_pairwise(f, ssid); + write_group(f, ssid); + write_group_mgmt(f, ssid); +@@ -1138,6 +1169,10 @@ static void wpa_config_write_global(FILE *f, struct wpa_config *config) + fprintf(f, "model_number=%s\n", config->model_number); + if (config->serial_number) + fprintf(f, "serial_number=%s\n", config->serial_number); ++#ifdef CONFIG_WAPI ++ if (config->wapi_type) ++ fprintf(f, "wapi_type=%s\n", config->wapi_type); ++#endif + { + char _buf[WPS_DEV_TYPE_BUFSIZE], *buf; + buf = wps_dev_type_bin2str(config->device_type, +diff --git a/wpa_supplicant/config_ssid.h b/wpa_supplicant/config_ssid.h +index 724534d..d9086b1 100644 +--- a/wpa_supplicant/config_ssid.h ++++ b/wpa_supplicant/config_ssid.h +@@ -17,8 +17,19 @@ + #define DEFAULT_EAP_WORKAROUND ((unsigned int) -1) + #define DEFAULT_EAPOL_FLAGS (EAPOL_FLAG_REQUIRE_KEY_UNICAST | \ + EAPOL_FLAG_REQUIRE_KEY_BROADCAST) +-#define DEFAULT_PROTO (WPA_PROTO_WPA | WPA_PROTO_RSN) + #define DEFAULT_KEY_MGMT (WPA_KEY_MGMT_PSK | WPA_KEY_MGMT_IEEE8021X) ++ ++#ifdef CONFIG_WAPI ++#define DEFAULT_PROTO (WPA_PROTO_WPA | WPA_PROTO_RSN | WPA_PROTO_WAPI) ++#ifdef CONFIG_NO_TKIP ++#define DEFAULT_PAIRWISE (WPA_CIPHER_CCMP | WPA_CIPHER_SMS4) ++#define DEFAULT_GROUP (WPA_CIPHER_CCMP | WPA_CIPHER_SMS4) ++#else ++#define DEFAULT_PAIRWISE (WPA_CIPHER_CCMP | WPA_CIPHER_TKIP | WPA_CIPHER_SMS4) ++#define DEFAULT_GROUP (WPA_CIPHER_CCMP | WPA_CIPHER_TKIP | WPA_CIPHER_SMS4) ++#endif ++#else ++#define DEFAULT_PROTO (WPA_PROTO_WPA | WPA_PROTO_RSN) + #ifdef CONFIG_NO_TKIP + #define DEFAULT_PAIRWISE (WPA_CIPHER_CCMP) + #define DEFAULT_GROUP (WPA_CIPHER_CCMP) +@@ -26,8 +37,15 @@ + #define DEFAULT_PAIRWISE (WPA_CIPHER_CCMP | WPA_CIPHER_TKIP) + #define DEFAULT_GROUP (WPA_CIPHER_CCMP | WPA_CIPHER_TKIP) + #endif /* CONFIG_NO_TKIP */ ++#endif + #define DEFAULT_FRAGMENT_SIZE 1398 + ++ ++#ifdef CONFIG_WAPI ++#define WAPI_KEY_TYPE_ASCII 0 ++#define WAPI_KEY_TYPE_HEX 1 ++#endif ++ + #define DEFAULT_BG_SCAN_PERIOD -1 + #define DEFAULT_MESH_MAX_RETRIES 2 + #define DEFAULT_MESH_RETRY_TIMEOUT 40 +@@ -193,7 +211,11 @@ struct wpa_ssid { + /** + * psk - WPA pre-shared key (256 bits) + */ ++#ifdef CONFIG_WAPI ++ u8 psk[64]; ++#else + u8 psk[32]; ++#endif + + /** + * psk_set - Whether PSK field is configured +@@ -845,6 +867,12 @@ struct wpa_ssid { + * dereferences since it may not be updated in all cases. + */ + void *parent_cred; ++#ifdef CONFIG_WAPI ++ char *wapi_as_cert; ++ char *wapi_user_cert; ++ int cert_index; ++ int psk_key_type; ++#endif + + #ifdef CONFIG_MACSEC + /** +diff --git a/wpa_supplicant/ctrl_iface.c b/wpa_supplicant/ctrl_iface.c +index bcd67fc..ab07fc2 100644 +--- a/wpa_supplicant/ctrl_iface.c ++++ b/wpa_supplicant/ctrl_iface.c +@@ -2755,6 +2755,90 @@ static char * wpa_supplicant_cipher_txt(char *pos, char *end, int cipher) + return pos; + } + ++#ifdef CONFIG_WAPI ++ ++#define WAPI_OUI ((int)0x00721400) ++ ++typedef enum _WAPI_AKM ++{ ++ WAPI_AKML_RESV = 0, ++ WAPI_AKML_CERT, ++ WAPI_AKML_PSK ++}WAPI_AKM; ++ ++ ++#define WAPI_AKM_PSK ((WAPI_AKML_PSK << 24) | WAPI_OUI) ++ ++#define WAPI_AKM_CERT ((WAPI_AKML_CERT << 24) | WAPI_OUI) ++ ++ ++#define WAPIIE_ELEMENT_ID_LEN 1 ++#define WAPIIE_LENGHTH_LEN 1 ++#define WAPIIE_VERSION_LEN 2 ++#define WAPIIE_AKM_CNT_LEN 2 ++#define WAPIIE_AKM_SUIT_LEN 4 ++ ++#define WAPIIE_AKM_SUIT_PSK 0x00147202 ++#define WAPIIE_AKM_SUIT_CERT 0x00147201 ++#define MY_GET32(p) ((((*p) << 24) & 0xff000000) | (((*(p+1)) << 16) & 0xff0000) | (((*(p+2)) << 8)& 0xff00) | ((*(p+3)) & 0xff)) ++ ++static char * wpa_supplicant_wapi_ie_txt(char *pos, char *end, const u8 *ie, size_t ie_len) ++{ ++ int i, ret; ++ u8 *ie_hdr = (u8 *)ie, *p_akm_auit_cnt, *p_akm; ++ u16 akm_suit_cnt = 0; ++ ++ char *old_pos = pos; ++ ++ #define WAPI_HEAD_LEN (WAPIIE_ELEMENT_ID_LEN + WAPIIE_LENGHTH_LEN + WAPIIE_VERSION_LEN + 2) ++ if (ie_len < WAPI_HEAD_LEN) { ++ /* ensure ie_len much more length */ ++ wpa_printf(MSG_ERROR,"ie_len is too short,ie_len=%zu(<6)", ie_len); ++ return old_pos; ++ } ++ ++ p_akm_auit_cnt = ie_hdr + (WAPIIE_ELEMENT_ID_LEN + WAPIIE_LENGHTH_LEN + WAPIIE_VERSION_LEN); ++ akm_suit_cnt = ((*p_akm_auit_cnt) | ((*(p_akm_auit_cnt + 1)) << 8 & 0xff00)) & 0xffff; ++ ++ wpa_printf(MSG_DEBUG,"wpa_supplicant_wapi_ie_txt,ie_len=%zu,akm_suit_cnt=%d", ie_len, akm_suit_cnt); ++ ++ if (2 < akm_suit_cnt) { ++ wpa_printf(MSG_ERROR,"akm_suit_cnt(%d > 2) is error.", akm_suit_cnt); ++ return old_pos; ++ } ++ if((size_t)(WAPI_HEAD_LEN + akm_suit_cnt * 4) > ie_len) { ++ wpa_printf(MSG_ERROR,"ie_len(%zu) is short,the right len should more than:%d", ++ ie_len, (WAPI_HEAD_LEN + akm_suit_cnt * 4)); ++ return old_pos; ++ } ++ ++ p_akm = (p_akm_auit_cnt + WAPIIE_AKM_CNT_LEN); ++ for (i = 0; i < akm_suit_cnt; i++) { ++ if (WAPIIE_AKM_SUIT_PSK == MY_GET32(p_akm)) { ++ ret = os_snprintf(pos, end - pos, "[WAPI-PSK]");/*lint !e732*/ ++ if (os_snprintf_error(end - pos, ret)) {/*lint !e732*/ ++ wpa_printf(MSG_ERROR, "%s:%d, snprintf failed, ret=%d", __func__, __LINE__, ret); ++ return pos; ++ } ++ pos += ret; ++ } else if (WAPIIE_AKM_SUIT_CERT == MY_GET32(p_akm)) { ++ ret = os_snprintf(pos, end - pos, "[WAPI-CERT]");/*lint !e732*/ ++ if (os_snprintf_error(end - pos, ret)) {/*lint !e732*/ ++ wpa_printf(MSG_ERROR, "%s:%d, snprintf failed, ret=%d", __func__, __LINE__, ret); ++ return pos; ++ } ++ pos += ret; ++ } ++ else { ++ wpa_printf(MSG_ERROR,"unknow wpai akm_suit"); ++ return old_pos; ++ } ++ ++ p_akm += WAPIIE_AKM_SUIT_LEN; ++ } ++ return pos; ++} ++#endif + + static char * wpa_supplicant_ie_txt(char *pos, char *end, const char *proto, + const u8 *ie, size_t ie_len) +@@ -2992,6 +3076,9 @@ static int wpa_supplicant_ctrl_iface_scan_result( + char *pos, *end; + int ret; + const u8 *ie, *ie2, *osen_ie, *p2p, *mesh, *owe, *rsnxe; ++#ifdef CONFIG_WAPI ++ const u8 *ie3; ++#endif + + mesh = wpa_bss_get_ie(bss, WLAN_EID_MESH_ID); + p2p = wpa_bss_get_vendor_ie(bss, P2P_IE_VENDOR_TYPE); +@@ -3018,18 +3105,26 @@ static int wpa_supplicant_ctrl_iface_scan_result( + pos = wpa_supplicant_ie_txt(pos, end, mesh ? "RSN" : "WPA2", + ie2, 2 + ie2[1]); + } +- rsnxe = wpa_bss_get_ie(bss, WLAN_EID_RSNX); +- if (ieee802_11_rsnx_capab(rsnxe, WLAN_RSNX_CAPAB_SAE_H2E)) { +- ret = os_snprintf(pos, end - pos, "[SAE-H2E]"); +- if (os_snprintf_error(end - pos, ret)) +- return -1; +- pos += ret; ++#ifdef CONFIG_WAPI ++ ie3 = wpa_bss_get_ie(bss, WLAN_EID_WAPI); /*TODO: confirm*/ ++ if (ie3) { ++ pos = wpa_supplicant_wapi_ie_txt(pos, end, ie3, 2 + ie3[1]); + } +- if (ieee802_11_rsnx_capab(rsnxe, WLAN_RSNX_CAPAB_SAE_PK)) { +- ret = os_snprintf(pos, end - pos, "[SAE-PK]"); +- if (os_snprintf_error(end - pos, ret)) +- return -1; +- pos += ret; ++#endif ++ rsnxe = wpa_bss_get_ie(bss, WLAN_EID_RSNX); ++ if (rsnxe && rsnxe[1] >= 1) { ++ if (rsnxe[2] & BIT(WLAN_RSNX_CAPAB_SAE_H2E)) { ++ ret = os_snprintf(pos, end - pos, "[SAE-H2E]"); ++ if (os_snprintf_error(end - pos, ret)) ++ return -1; ++ pos += ret; ++ } ++ if (rsnxe[2] & BIT(WLAN_RSNX_CAPAB_SAE_PK)) { ++ ret = os_snprintf(pos, end - pos, "[SAE-PK]"); ++ if (os_snprintf_error(end - pos, ret)) ++ return -1; ++ pos += ret; ++ } + } + osen_ie = wpa_bss_get_vendor_ie(bss, OSEN_IE_VENDOR_TYPE); + if (osen_ie) +@@ -3044,7 +3139,11 @@ static int wpa_supplicant_ctrl_iface_scan_result( + pos += ret; + } + pos = wpa_supplicant_wps_ie_txt(wpa_s, pos, end, bss); +- if (!ie && !ie2 && !osen_ie && (bss->caps & IEEE80211_CAP_PRIVACY)) { ++ if (!ie && !ie2 && !osen_ie && ++#ifdef CONFIG_WAPI ++ !ie3 && ++#endif ++ (bss->caps & IEEE80211_CAP_PRIVACY)) { + ret = os_snprintf(pos, end - pos, "[WEP]"); + if (os_snprintf_error(end - pos, ret)) + return -1; +@@ -4161,6 +4260,9 @@ static int ctrl_iface_get_capability_key_mgmt(int res, bool strict, + if (strict) + return 0; + len = os_strlcpy(buf, "WPA-PSK WPA-EAP IEEE8021X WPA-NONE " ++#ifdef CONFIG_WAPI ++ "WAPI-PSK " ++#endif + "NONE", buflen); + if (len >= buflen) + return -1; +@@ -4205,6 +4307,16 @@ static int ctrl_iface_get_capability_key_mgmt(int res, bool strict, + return pos - buf; + pos += ret; + } ++#ifdef CONFIG_WAPI ++ if (capa->key_mgmt & WPA_DRIVER_CAPA_KEY_MGMT_WAPI_PSK) { ++ ret = os_snprintf(pos, end - pos, " WAPI-PSK"); ++ if (os_snprintf_error(end - pos, ret)) { ++ wpa_printf(MSG_ERROR, "%s:%d, snprintf failed, ret=%d", __func__, __LINE__, ret); ++ return pos - buf; ++ } ++ pos += ret; ++ } ++#endif + + if (key_mgmt & WPA_DRIVER_CAPA_KEY_MGMT_WAPI_PSK) { + ret = os_snprintf(pos, end - pos, " WAPI-PSK"); +@@ -4952,6 +5064,9 @@ static int print_bss_info(struct wpa_supplicant *wpa_s, struct wpa_bss *bss, + int ret; + char *pos, *end; + const u8 *ie, *ie2, *osen_ie, *mesh, *owe, *rsnxe; ++#ifdef CONFIG_WAPI ++ const u8 *ie3; ++#endif + + pos = buf; + end = buf + buflen; +@@ -5071,18 +5186,27 @@ static int print_bss_info(struct wpa_supplicant *wpa_s, struct wpa_bss *bss, + pos = wpa_supplicant_ie_txt(pos, end, + mesh ? "RSN" : "WPA2", ie2, + 2 + ie2[1]); ++ ++#ifdef CONFIG_WAPI ++ ie3 = wpa_bss_get_ie(bss, WLAN_EID_WAPI); ++ if (ie3) ++ pos = wpa_supplicant_wapi_ie_txt(pos, end, ie3, 2 + ie3[1]); ++#endif ++ + rsnxe = wpa_bss_get_ie(bss, WLAN_EID_RSNX); +- if (ieee802_11_rsnx_capab(rsnxe, WLAN_RSNX_CAPAB_SAE_H2E)) { +- ret = os_snprintf(pos, end - pos, "[SAE-H2E]"); +- if (os_snprintf_error(end - pos, ret)) +- return -1; +- pos += ret; +- } +- if (ieee802_11_rsnx_capab(rsnxe, WLAN_RSNX_CAPAB_SAE_PK)) { +- ret = os_snprintf(pos, end - pos, "[SAE-PK]"); +- if (os_snprintf_error(end - pos, ret)) +- return -1; +- pos += ret; ++ if (rsnxe && rsnxe[1] >= 1) { ++ if (rsnxe[2] & BIT(WLAN_RSNX_CAPAB_SAE_H2E)) { ++ ret = os_snprintf(pos, end - pos, "[SAE-H2E]"); ++ if (os_snprintf_error(end - pos, ret)) ++ return -1; ++ pos += ret; ++ } ++ if (rsnxe[2] & BIT(WLAN_RSNX_CAPAB_SAE_PK)) { ++ ret = os_snprintf(pos, end - pos, "[SAE-PK]"); ++ if (os_snprintf_error(end - pos, ret)) ++ return -1; ++ pos += ret; ++ } + } + osen_ie = wpa_bss_get_vendor_ie(bss, OSEN_IE_VENDOR_TYPE); + if (osen_ie) +@@ -5099,6 +5223,9 @@ static int print_bss_info(struct wpa_supplicant *wpa_s, struct wpa_bss *bss, + } + pos = wpa_supplicant_wps_ie_txt(wpa_s, pos, end, bss); + if (!ie && !ie2 && !osen_ie && ++#ifdef CONFIG_WAPI ++ !ie3 && ++#endif + (bss->caps & IEEE80211_CAP_PRIVACY)) { + ret = os_snprintf(pos, end - pos, "[WEP]"); + if (os_snprintf_error(end - pos, ret)) +diff --git a/wpa_supplicant/defconfig b/wpa_supplicant/defconfig +index a4719db..6c1f8a3 100644 +--- a/wpa_supplicant/defconfig ++++ b/wpa_supplicant/defconfig +@@ -474,6 +474,9 @@ CONFIG_DEBUG_SYSLOG=y + # IEEE 802.11ac (Very High Throughput) support (mainly for AP mode) + CONFIG_IEEE80211AC=y + ++# IEEE 802.11ax support (mainly for AP mode) ++#CONFIG_IEEE80211AX=y ++ + # Wireless Network Management (IEEE Std 802.11v-2011) + # Note: This is experimental and not complete implementation. + #CONFIG_WNM=y +@@ -633,3 +636,15 @@ CONFIG_DPP2=y + # design is still subject to change. As such, this should not yet be enabled in + # production use. + #CONFIG_PASN=y ++ ++# Implementation of Complement Function (wpa_driver_set_ap_wps_p2p_ie) ++#CONNECTIVITY_SET_P2P_IE_PATCH=y ++ ++# patch for P2P single VAP ++#CONNECTIVITY_SINGLE_VAP_PATCH=y ++ ++#patch for wpa log ++#CONNECTIVITY_LOG_PATCH=y ++ ++#patch for wapi ++#CONFIG_WAPI=y +diff --git a/wpa_supplicant/events.c b/wpa_supplicant/events.c +index f55e184..a6034e0 100644 +--- a/wpa_supplicant/events.c ++++ b/wpa_supplicant/events.c +@@ -51,6 +51,9 @@ + #include "wmm_ac.h" + #include "dpp_supplicant.h" + ++#ifdef CONFIG_WAPI ++#include "wapi/wapi.h" ++#endif + + #define MAX_OWE_TRANSITION_BSS_SELECT_COUNT 5 + +@@ -252,7 +255,14 @@ static int wpa_supplicant_select_config(struct wpa_supplicant *wpa_s) + wpa_supplicant_update_current_bss(wpa_s); + + wpa_supplicant_rsn_supp_set_config(wpa_s, wpa_s->current_ssid); ++#ifdef CONFIG_WAPI ++ /* WAPI do WAPI's EAP process */ ++ if (WPA_PROTO_WAPI != wpa_s->current_ssid->proto) { ++#endif + wpa_supplicant_initiate_eapol(wpa_s); ++#ifdef CONFIG_WAPI ++ } ++#endif + if (old_ssid != wpa_s->current_ssid) + wpas_notify_network_changed(wpa_s); + +@@ -322,6 +332,10 @@ void wpa_supplicant_mark_disassoc(struct wpa_supplicant *wpa_s) + + if (bssid_changed) + wpas_notify_bssid_changed(wpa_s); ++#ifdef CONFIG_WAPI ++ if ((wpa_s->key_mgmt != WPA_KEY_MGMT_WAPI_PSK) && ++ (wpa_s->key_mgmt != WPA_KEY_MGMT_WAPI_CERT)) { ++#endif + + eapol_sm_notify_portEnabled(wpa_s->eapol, false); + eapol_sm_notify_portValid(wpa_s->eapol, false); +@@ -329,6 +343,10 @@ void wpa_supplicant_mark_disassoc(struct wpa_supplicant *wpa_s) + wpa_s->key_mgmt == WPA_KEY_MGMT_OWE || + wpa_s->key_mgmt == WPA_KEY_MGMT_DPP || wpa_s->drv_authorized_port) + eapol_sm_notify_eap_success(wpa_s->eapol, false); ++#ifdef CONFIG_WAPI ++ } ++#endif ++ + wpa_s->drv_authorized_port = 0; + wpa_s->ap_ies_from_associnfo = 0; + wpa_s->current_ssid = NULL; +@@ -549,6 +567,12 @@ static int wpa_supplicant_match_privacy(struct wpa_bss *bss, + if (ssid->key_mgmt & WPA_KEY_MGMT_OSEN) + privacy = 1; + ++#ifdef CONFIG_WAPI ++ /*this codes for fixing wapi issue after CL935256*/ ++ if (ssid->key_mgmt & (WPA_KEY_MGMT_WAPI_PSK|WPA_KEY_MGMT_WAPI_CERT)) ++ privacy = 1; ++#endif ++ + if (bss->caps & IEEE80211_CAP_PRIVACY) + return privacy; + return !privacy; +@@ -566,6 +590,9 @@ static int wpa_supplicant_ssid_bss_match(struct wpa_supplicant *wpa_s, + #ifdef CONFIG_WEP + int wep_ok; + #endif /* CONFIG_WEP */ ++#ifdef CONFIG_WAPI ++ const u8 *wapi_ie; ++#endif + + ret = wpas_wps_ssid_bss_match(wpa_s, ssid, bss); + if (ret >= 0) +@@ -728,6 +755,20 @@ static int wpa_supplicant_ssid_bss_match(struct wpa_supplicant *wpa_s, + " selected based on WPA IE"); + return 1; + } ++#ifdef CONFIG_WAPI ++ /* ѡRSN WPAѡWAPI */ ++ wapi_ie = wpa_bss_get_ie(bss, WLAN_EID_WAPI); ++ while ((ssid->proto & WPA_PROTO_WAPI) && wapi_ie) { ++ proto_match++; ++ /* WAPIԪ */ ++ if (wapi_parse_wapi_ie(wapi_ie, 2 + wapi_ie[1], &ie)) { ++ wpa_dbg(wpa_s, MSG_DEBUG, " skip WAPI IE - parse failed"); ++ break; ++ } ++ ++ return 1; ++ } /* end while wapi */ ++#endif + + if ((ssid->key_mgmt & WPA_KEY_MGMT_IEEE8021X_NO_WPA) && !wpa_ie && + !rsn_ie) { +@@ -1146,6 +1187,9 @@ static bool wpa_scan_res_ok(struct wpa_supplicant *wpa_s, struct wpa_ssid *ssid, + u8 rsnxe_capa = 0; + #endif /* CONFIG_SAE */ + const u8 *ie; ++#ifdef CONFIG_WAPI ++ u8 wapi_ie_len; ++#endif + + ie = wpa_bss_get_vendor_ie(bss, WPA_IE_VENDOR_TYPE); + wpa = ie && ie[1]; +@@ -1154,6 +1198,18 @@ static bool wpa_scan_res_ok(struct wpa_supplicant *wpa_s, struct wpa_ssid *ssid, + if (ie && wpa_parse_wpa_ie_rsn(ie, 2 + ie[1], &data) == 0 && + (data.key_mgmt & WPA_KEY_MGMT_OSEN)) + rsn_osen = true; ++#ifdef CONFIG_WAPI ++ /* ȡWAPIϢԪ */ ++ ie = wpa_bss_get_ie(bss, WLAN_EID_WAPI); ++ wapi_ie_len = ie ? ie[1] : 0; ++ ++ if ( 0 != wapi_ie_len ) { ++ wpa_dbg(wpa_s, MSG_DEBUG, " : " MACSTR " supports WAPI! wapi_ie_len=%u", ++ MAC2STR(bss->bssid),wapi_ie_len); ++ } ++ /* wpa/wpa2ʱ֤wpa_supplicant_ssid_bss_match*/ ++ wpa = wpa || wapi_ie_len > 0; ++#endif + ie = wpa_bss_get_vendor_ie(bss, OSEN_IE_VENDOR_TYPE); + osen = ie != NULL; + +@@ -1477,6 +1533,9 @@ struct wpa_ssid * wpa_scan_res_match(struct wpa_supplicant *wpa_s, + u8 wpa_ie_len, rsn_ie_len; + const u8 *ie; + struct wpa_ssid *ssid; ++#ifdef CONFIG_WAPI ++ u8 wapi_ie_len; ++#endif /* CONFIG_WAPI */ + int osen; + const u8 *match_ssid; + size_t match_ssid_len; +@@ -1487,6 +1546,16 @@ struct wpa_ssid * wpa_scan_res_match(struct wpa_supplicant *wpa_s, + + ie = wpa_bss_get_ie(bss, WLAN_EID_RSN); + rsn_ie_len = ie ? ie[1] : 0; ++#ifdef CONFIG_WAPI ++ /* ȡWAPIϢԪ */ ++ ie = wpa_bss_get_ie(bss, WLAN_EID_WAPI); ++ wapi_ie_len = ie ? ie[1] : 0; ++ ++ if ( 0 != wapi_ie_len ) { ++ wpa_dbg(wpa_s, MSG_DEBUG, "%d: " MACSTR " supports WAPI! wapi_ie_len=%u", ++ i, MAC2STR(bss->bssid),wapi_ie_len); ++ } ++#endif + + ie = wpa_bss_get_vendor_ie(bss, OSEN_IE_VENDOR_TYPE); + osen = ie != NULL; +@@ -3358,6 +3427,15 @@ static void wpa_supplicant_event_assoc(struct wpa_supplicant *wpa_s, + wpa_supplicant_scard_init(wpa_s, wpa_s->current_ssid); + } + wpa_sm_notify_assoc(wpa_s->wpa, bssid); ++#ifdef CONFIG_WAPI ++ if ((wpa_s->key_mgmt == WPA_KEY_MGMT_WAPI_PSK) ++ || (wpa_s->key_mgmt == WPA_KEY_MGMT_WAPI_CERT)) { ++ wapi_supplicant_event(wpa_s,EVENT_ASSOC,data); ++ wpas_wps_notify_assoc(wpa_s, bssid); ++ return; ++ } ++ /* 802.11iȫ EAP */ ++#endif /* CONFIG_WAPI */ + if (wpa_s->l2) + l2_packet_notify_auth_start(wpa_s->l2); + +@@ -3557,6 +3635,13 @@ static void wpa_supplicant_event_disassoc(struct wpa_supplicant *wpa_s, + return; + } + ++#ifdef CONFIG_WAPI ++ if (wpa_s->key_mgmt == WPA_KEY_MGMT_WAPI_PSK || ++ wpa_s->key_mgmt == WPA_KEY_MGMT_WAPI_CERT) { ++ wapi_supplicant_event(wpa_s, EVENT_DISASSOC, NULL); ++ } ++#endif ++ + bssid = wpa_s->bssid; + if (is_zero_ether_addr(bssid)) + bssid = wpa_s->pending_bssid; +@@ -3929,6 +4014,14 @@ wpa_supplicant_event_interface_status(struct wpa_supplicant *wpa_s, + if (!any_interfaces(wpa_s->global->ifaces)) + eloop_terminate(); + #endif /* CONFIG_TERMINATE_ONLASTIF */ ++ ++#ifdef CONFIG_WAPI ++ if(NULL != wpa_s->pst_wapi) { ++ l2_packet_deinit(wpa_s->pst_wapi->pst_wapi_l2); ++ wpa_s->pst_wapi->pst_wapi_l2 = NULL; ++ } ++#endif ++ + break; + } + } +diff --git a/wpa_supplicant/wapi/hash.h b/wpa_supplicant/wapi/hash.h +new file mode 100644 +index 0000000..06c0386 +--- /dev/null ++++ b/wpa_supplicant/wapi/hash.h +@@ -0,0 +1,81 @@ ++/* ++ * Copyright (c) CompanyNameMagicTag. 2023-2023. All rights reserved. ++ * 文 件 名 : hash.h ++ * 作 者 : CompanyName ++ * 生成日期 : 2023年1月11日 ++ * 功能描述 : hash相关接口定义 ++ */ ++ ++ ++ ++#ifndef __WAPI_HASH_H__ ++#define __WAPI_HASH_H__ ++ ++#ifdef __cplusplus ++#if __cplusplus ++extern "C" { ++#endif ++#endif ++ ++ ++/* ++ * 1 Other Header File Including ++ */ ++ ++ ++ ++#include "types.h" ++#include "wai_lib.h" ++/* ++ * 2 Macro Definition ++ */ ++ ++ ++/* ++ * 3 Enum Type Definition ++ */ ++ ++ ++/* ++ * 4 Global Variable Declaring ++ */ ++ ++ ++ ++/* ++ * 5 Message Header Definition ++ */ ++ ++ ++/* ++ * 6 Message Definition ++ */ ++ ++ ++/* ++ * 7 STRUCT Type Definition ++ */ ++ ++ ++/* ++ * 8 UNION Type Definition ++ */ ++ ++ ++/* ++ * 9 OTHERS Definition ++ */ ++ ++ ++/* ++ * 10 Function Declare ++ */ ++ ++ ++#ifdef __cplusplus ++#if __cplusplus ++} ++#endif ++#endif ++ ++#endif /* end of Hash */ +diff --git a/wpa_supplicant/wapi/types.h b/wpa_supplicant/wapi/types.h +new file mode 100644 +index 0000000..72bdf01 +--- /dev/null ++++ b/wpa_supplicant/wapi/types.h +@@ -0,0 +1,99 @@ ++/* ++ * Copyright (c) CompanyNameMagicTag. 2023-2023. All rights reserved. ++ * 文 件 名 : type.h ++ * 作 者 : CompanyName ++ * 生成日期 : 2023年1月11日 ++ * 功能描述 : 基本类型定义 ++ */ ++ ++ ++#ifndef __TYPES_H__ ++#define __TYPES_H__ ++ ++#ifdef __cplusplus ++#if __cplusplus ++extern "C" { ++#endif ++#endif ++ ++ ++/* ++ * 1 Other Header File Including ++ */ ++ ++ ++/* ++ * 2 Macro Definition ++ */ ++#define WAPI_SUCCESS 0 ++#define WAPI_FAILED -1 ++#define WAIFAILED -2 ++ ++#ifdef WAPI_STUB ++#ifndef STATIC ++#define STATIC ++#endif ++#else /* WAPI_STUB */ ++#ifndef STATIC ++#define STATIC static ++#endif ++#endif /* WAPI_STUB */ ++ ++typedef unsigned char uint8; ++typedef unsigned short uint16; ++typedef unsigned int uint32; ++typedef char int8; ++typedef short int16; ++typedef int int32; ++ ++ ++ ++ ++ ++/* ++ * 3 Enum Type Definition ++ */ ++ ++ ++/* ++ * 4 Global Variable Declaring ++ */ ++ ++ ++/* ++ * 5 Message Header Definition ++ */ ++ ++ ++/* ++ * 6 Message Definition ++ */ ++ ++ ++/* ++ * 7 STRUCT Type Definition ++ */ ++ ++ ++/* ++ * 8 UNION Type Definition ++ */ ++ ++ ++/* ++ * 9 OTHERS Definition ++ */ ++ ++ ++/* ++ * 10 Function Declare ++ */ ++ ++ ++#ifdef __cplusplus ++#if __cplusplus ++} ++#endif ++#endif ++ ++#endif /* end of types.h */ +diff --git a/wpa_supplicant/wapi/wai_asn1.h b/wpa_supplicant/wapi/wai_asn1.h +new file mode 100644 +index 0000000..4265731 +--- /dev/null ++++ b/wpa_supplicant/wapi/wai_asn1.h +@@ -0,0 +1,73 @@ ++/* ++ * ASN.1 DER parsing ++ * Copyright (c) 2006, Jouni Malinen ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Alternatively, this software may be distributed under the terms of BSD ++ * license. ++ * ++ * See README and COPYING for more details. ++ */ ++ ++#ifndef ASN1_H ++#define ASN1_H ++ ++ ++#define ASN1_TAG_EOC 0x00 /* not used with DER */ ++#define ASN1_TAG_BOOLEAN 0x01 ++#define ASN1_TAG_INTEGER 0x02 ++#define ASN1_TAG_BITSTRING 0x03 ++#define ASN1_TAG_OCTETSTRING 0x04 ++#define ASN1_TAG_NULL 0x05 ++#define ASN1_TAG_OID 0x06 ++#define ASN1_TAG_OBJECT_DESCRIPTOR 0x07 /* not yet parsed */ ++#define ASN1_TAG_EXTERNAL 0x08 /* not yet parsed */ ++#define ASN1_TAG_REAL 0x09 /* not yet parsed */ ++#define ASN1_TAG_ENUMERATED 0x0A /* not yet parsed */ ++#define ASN1_TAG_UTF8STRING 0x0C /* not yet parsed */ ++#define ANS1_TAG_RELATIVE_OID 0x0D ++#define ASN1_TAG_SEQUENCE 0x10 /* shall be constructed */ ++#define ASN1_TAG_SET 0x11 ++#define ASN1_TAG_NUMERICSTRING 0x12 /* not yet parsed */ ++#define ASN1_TAG_PRINTABLESTRING 0x13 ++#define ASN1_TAG_TG1STRING 0x14 /* not yet parsed */ ++#define ASN1_TAG_VIDEOTEXSTRING 0x15 /* not yet parsed */ ++#define ASN1_TAG_IA5STRING 0x16 ++#define ASN1_TAG_UTCTIME 0x17 ++#define ASN1_TAG_GENERALIZEDTIME 0x18 /* not yet parsed */ ++#define ASN1_TAG_GRAPHICSTRING 0x19 /* not yet parsed */ ++#define ASN1_TAG_VISIBLESTRING 0x1A ++#define ASN1_TAG_GENERALSTRING 0x1B /* not yet parsed */ ++#define ASN1_TAG_UNIVERSALSTRING 0x1C /* not yet parsed */ ++#define ASN1_TAG_BMPSTRING 0x1D /* not yet parsed */ ++ ++#define ASN1_CLASS_UNIVERSAL 0 ++#define ASN1_CLASS_APPLICATION 1 ++#define ASN1_CLASS_CONTEXT_SPECIFIC 2 ++#define ASN1_CLASS_PRIVATE 3 ++ ++ ++struct asn1_hdr { ++ const unsigned char *payload; ++ unsigned char identifier, class, constructed; ++ unsigned int tag, length; ++}; ++ ++#define ASN1_MAX_OID_LEN 20 ++struct asn1_oid { ++ unsigned long oid[ASN1_MAX_OID_LEN]; ++ unsigned int len; ++}; ++ ++ ++int asn1_get_next(const unsigned char *buf, unsigned int len, struct asn1_hdr *hdr); ++int asn1_parse_oid(const unsigned char *buf, unsigned int len, struct asn1_oid *oid); ++int asn1_get_oid(const unsigned char *buf, unsigned int len, struct asn1_oid *oid, ++ const unsigned char **next); ++void asn1_oid_to_str(struct asn1_oid *oid, char *buf, unsigned int len); ++unsigned long asn1_bit_string_to_long(const unsigned char *buf, unsigned int len); ++ ++#endif /* ASN1_H */ +diff --git a/wpa_supplicant/wapi/wai_call_back.h b/wpa_supplicant/wapi/wai_call_back.h +new file mode 100644 +index 0000000..ff551a3 +--- /dev/null ++++ b/wpa_supplicant/wapi/wai_call_back.h +@@ -0,0 +1,63 @@ ++/* ++ * Copyright (c) CompanyNameMagicTag. 2023-2023. All rights reserved. ++ * 文 件 名 : wai_call_back.h ++ * 作 者 : CompanyName ++ * 生成日期 : 2023年1月11日 ++ * 功能描述 : wai_call_back接口定义 ++ */ ++ ++#ifndef __WAPI_CALL_BACK_H__ ++#define __WAPI_CALL_BACK_H__ ++ ++#ifdef __cplusplus ++#if __cplusplus ++extern "C" { ++#endif ++#endif ++ ++struct wapi_iface_funcs_stru { ++ unsigned char *(*base64_decode)(const unsigned char *src, size_t len, ++ size_t *out_len); ++ int (*eloop_cancel_timeout)(eloop_timeout_handler handler, ++ void *eloop_data, void *user_data); ++ int (*eloop_register_timeout)(unsigned int secs, unsigned int usecs, ++ eloop_timeout_handler handler, ++ void *eloop_data, void *user_data); ++ int (*l2_packet_send)(struct l2_packet_data *l2, const u8 *dst_addr, ++ u16 proto, const u8 *buf, size_t len); ++ int (*os_mktime)(int year, int month, int day, int hour, int min, ++ int sec, os_time_t *t); ++ void *(*os_zalloc)(size_t size); ++ int (*os_get_random)(unsigned char *buf, size_t len); ++ void *(*wpabuf_put)(struct wpabuf *buf, size_t len); ++ void (*wpabuf_put_u8)(struct wpabuf *buf, u8 data); ++ void (*wpabuf_put_be16)(struct wpabuf *buf, u16 data); ++ void (*wpabuf_put_data)(struct wpabuf *buf, const void *data, ++ size_t len); ++ void (*wpabuf_put_buf)(struct wpabuf *dst,const struct wpabuf *src); ++ struct wpabuf *(*wpabuf_alloc)(size_t len); ++ void (*wpabuf_free)(struct wpabuf *buf); ++ struct wpabuf *(*wpabuf_alloc_ext_data)(u8 *data, size_t len); ++ int (*__android_log_vprint)(int prio, const char *tag, const char *fmt, ++ va_list ap); ++ void (*wpa_hexdump_ascii)(int level, const char *title, const void *buf, ++ size_t len); ++ void (*wpa_supplicant_set_state)(struct wpa_supplicant *wpa_s, ++ enum wpa_states state); ++ void (*wpa_supplicant_deauthenticate)(struct wpa_supplicant *wpa_s, ++ int reason_code); ++ void (*wpa_supplicant_cancel_auth_timeout)(struct wpa_supplicant *wpa_s); ++ void (*wapi_notify_wrong_msg)(struct wpa_supplicant *pst_wpa); ++ ++}; ++ ++__attribute__((visibility ("default"))) int wapi_iface_funcs_init( ++ struct wapi_iface_funcs_stru *wapi_iface_call_back); ++ ++#ifdef __cplusplus ++#if __cplusplus ++} ++#endif ++#endif ++ ++#endif /* end of wai_call_back.h */ +diff --git a/wpa_supplicant/wapi/wai_cert.h b/wpa_supplicant/wapi/wai_cert.h +new file mode 100644 +index 0000000..a8b95fb +--- /dev/null ++++ b/wpa_supplicant/wapi/wai_cert.h +@@ -0,0 +1,237 @@ ++/* ++ * Copyright (c) CompanyNameMagicTag. 2023-2023. All rights reserved. ++ * 文 件 名 : wai_cert.h ++ * 作 者 : CompanyName ++ * 生成日期 : 2023年1月11日 ++ * 功能描述 : wai_cert对应头文件,证书相关接口 ++ */ ++ ++#ifndef __WAI_CERT_H__ ++#define __WAI_CERT_H__ ++ ++#ifdef __cplusplus ++#if __cplusplus ++extern "C" { ++#endif ++#endif ++ ++ ++/* ++ * 1 Other Header File Including ++ */ ++#include "types.h" ++#include "wai_asn1.h" ++ ++ ++/* ++ * 2 Macro Definition ++ */ ++ ++#define LENGTH_OF_VALIDATE 8 ++#define LENGTH_OF_PBKEY_VALUE 49 ++#define MIN_LENGTH_OF_ID 6 ++#define MAX_LENGTH_OF_ID 256 ++#define MAX_OID_LEN 20 ++ ++#define MAX_BYTE_DATA_LEN 256 ++#define WAPI_CERT_X509_V3 2 ++#define WAPI_CERT_MAX_NAME_ATTRIBUTES 20 ++ ++#define WAPI_CERT_ISSUE_ID 0 ++#define WAPI_CERT_SUBJECT_ID 1 ++ ++#define WAPI_CERT_SIGN_LEN 48 ++#define WAPI_CERT_SIGN_HALF_LEN 24 ++ ++/* ++ * 3 Enum Type Definition ++ */ ++ ++ ++/* ++ * 4 Global Variable Declaring ++ */ ++ ++ ++/* ++ * 5 Message Header Definition ++ */ ++ ++ ++/* ++ * 6 Message Definition ++ */ ++ ++ ++/* ++ * 7 STRUCT Type Definition ++ */ ++ ++ ++struct wapi_cert_algorithm_identifier { ++ struct asn1_oid st_oid; ++}; ++ ++struct wapi_cert_name_attr { ++ enum wapi_cert_name_attr_type { ++ WAPI_CERT_NAME_ATTR_NOT_USED, ++ WAPI_CERT_NAME_ATTR_DC, ++ WAPI_CERT_NAME_ATTR_CN, ++ WAPI_CERT_NAME_ATTR_C, ++ WAPI_CERT_NAME_ATTR_L, ++ WAPI_CERT_NAME_ATTR_ST, ++ WAPI_CERT_NAME_ATTR_O, ++ WAPI_CERT_NAME_ATTR_OU ++ } em_type; ++ int8 *pc_value; ++}; ++ ++struct wapi_cert_name { ++ struct wapi_cert_name_attr st_attr[WAPI_CERT_MAX_NAME_ATTRIBUTES]; ++ uint32 ul_num_attr; ++ int8 *pc_email; /* emailAddress */ ++ ++ /* from alternative name extension */ ++ int8 *pc_alt_email; /* rfc822Name */ ++ int8 *pc_dns; /* dNSName */ ++ int8 *pc_uri; /* uniformResourceIdentifier */ ++ uint8 *puc_ip; /* iPAddress */ ++ uint32 ul_ip_len; /* IPv4: 4, IPv6: 16 */ ++ struct asn1_oid st_rid; /* registeredID */ ++}; ++ ++typedef struct _id_stru ++{ ++ uint8 uc_length; ++ uint8 *pauc_cont; ++}id_stru; ++ ++typedef struct _tlv_stru ++{ ++ uint8 uc_type; ++ uint16 us_length; ++ uint8 auc_value[MAX_OID_LEN]; ++}tlv_stru; ++ ++typedef struct _public_key_stru ++{ ++ uint16 us_length; ++ uint8 uc_flag; ++ tlv_stru st_param; ++ uint8 auc_value[LENGTH_OF_PBKEY_VALUE]; ++}pbkey_stru; ++ ++typedef struct _sign_alg_stru ++{ ++ uint8 uc_flag; ++ uint16 us_param_length; ++ uint32 auc_param[MAX_OID_LEN]; ++}sign_alg_stru; ++ ++typedef struct _cert_stru ++{ ++ uint16 us_version; ++ id_stru st_serial_num; ++ sign_alg_stru st_sign_alg; ++ id_stru st_issuer; ++ uint32 ul_not_before_time; ++ uint32 ul_not_after_time; ++ id_stru st_subject; ++ pbkey_stru st_subject_key; ++ sign_alg_stru st_sign_val_alg; ++ uint32 us_sign_length; ++ uint8 *puc_sign_val; ++}cert_stru; ++ ++typedef struct _wapi_cert_private_key ++{ ++ uint8 uc_tVersion; ++ uint8 uc_lVersion; ++ uint8 uc_vVersion; ++ uint8 uc_verpad; ++ ++ uint8 uc_tPrivateKey; ++ uint8 uc_lPrivateKey; ++ uint8 auc_prikeypad[2]; ++ uint8 auc_vPrivateKey[MAX_BYTE_DATA_LEN]; ++ ++ uint8 uc_tSPrivateKeyAlgorithm; ++ uint8 uc_lSPrivateKeyAlgorithm; ++ uint8 uc_tOID; ++ uint8 uc_lOID; ++ uint8 auc_vOID[MAX_BYTE_DATA_LEN]; ++ ++ uint8 uc_tSPubkey; ++ uint8 uc_lSPubkey; ++ uint8 uc_tPubkey; ++ uint8 uc_lPubkey; ++ uint8 uc_vPubkey[MAX_BYTE_DATA_LEN]; ++}wapi_cert_private_key; ++ ++typedef struct _cert_stru_ext { ++ uint16 us_version; ++ unsigned long ulong_serial_number; ++ struct wapi_cert_algorithm_identifier st_signature; ++ ++ struct wapi_cert_name st_issuer; ++ struct wapi_cert_name st_subject; ++ ++ uint8 *puc_serial_number; ++ uint32 ul_serial_number_len; ++ uint8 *puc_issuer_str; ++ uint32 ul_issuer_str_len; ++ uint8 *puc_subject_str; ++ uint32 ul_subject_str_len; ++ ++ os_time_t long_not_before; ++ os_time_t long_not_after; ++ ++ struct wapi_cert_algorithm_identifier st_public_key_alg; ++ uint8 *puc_public_key; ++ uint32 ul_public_key_len; ++ struct wapi_cert_algorithm_identifier st_signature_alg; ++ uint8 *puc_sign_value; ++ uint32 ul_sign_value_len; ++ ++ const uint8 *puc_cert_start; ++ uint32 ul_cert_len; ++ const uint8 *puc_tbs_cert_start; ++ uint32 ul_tbs_cert_len; ++}cert_stru_ext; ++ ++/* ++ * 8 UNION Type Definition ++ */ ++ ++ ++/* ++ * 9 OTHERS Definition ++ */ ++ ++ ++/* ++ * 10 Function Declare ++ */ ++ ++extern uint8 *wapi_cert_get_certificate_buf(uint8 *puc_cert_buf, ++ uint32 ul_cert_buf_len, ++ size_t *pul_der_len); ++extern __attribute__((visibility ("default"))) cert_stru *wapi_cert_parse_certificate( ++ uint8 *puc_cert_buf, uint32 ul_cert_buf_len); ++extern __attribute__((visibility ("default"))) int32 wapi_cert_parse_ecprivkey( ++ uint8 *puc_cert_buf, uint32 ul_cert_buf_len, ++ uint8 *puc_priv_key_buf, uint32 *pul_priv_key_len); ++extern __attribute__((visibility ("default"))) int32 wapi_cert_verify_certificate( ++ uint8 *puc_cert_buf, uint32 ul_cert_buf_len, ++ uint8 *puc_asu_pubkey, uint32 ul_asu_pubkey_len); ++extern __attribute__((visibility ("default"))) void wapi_cert_free_certificate( ++ cert_stru *pst_cert); ++ ++ ++#ifdef __cplusplus ++#if __cplusplus ++} ++#endif ++#endif ++ ++#endif /* end of wai_cert.h */ +diff --git a/wpa_supplicant/wapi/wai_ec.h b/wpa_supplicant/wapi/wai_ec.h +new file mode 100644 +index 0000000..7cc75c2 +--- /dev/null ++++ b/wpa_supplicant/wapi/wai_ec.h +@@ -0,0 +1,123 @@ ++/* ++ * Copyright (c) CompanyNameMagicTag. 2023-2023. All rights reserved. ++ * 文 件 名 : wai_ec.h ++ * 作 者 : CompanyName ++ * 生成日期 : 2023年1月11日 ++ * 功能描述 : wai_ec对应头文件 ++ */ ++ ++ ++#ifndef __WAI_EC_H__ ++#define __WAI_EC_H__ ++ ++#ifdef __cplusplus ++#if __cplusplus ++extern "C" { ++#endif ++#endif ++ ++ ++/* ++ * 1 Other Header File Including ++ */ ++#include "types.h" ++#include ++#include ++#include ++ ++/* ++ * 2 Macro Definition ++ */ ++ ++ ++ ++/* ++ * 3 Enum Type Definition ++ */ ++ ++ ++/* ++ * 4 Global Variable Declaring ++ */ ++ ++ ++/* ++ * 5 Message Header Definition ++ */ ++ ++ ++/* ++ * 6 Message Definition ++ */ ++ ++ ++/* ++ * 7 STRUCT Type Definition ++ */ ++ ++typedef struct { ++ int32 l_field_type; ++ uint32 ul_seed_len; ++ uint32 ul_param_len; ++ uint32 ul_cofactor; ++} WAPI_EC_CURVE_DATA; ++ ++ ++/* ++ * 8 UNION Type Definition ++ */ ++ ++ ++/* ++ * 9 OTHERS Definition ++ */ ++ ++#define DGST_TO_SIGN_LENTH 32 ++ ++#define RANDOM_HEX_LENTH 16 ++ ++#define WAPI_CERT_PUBKEY_LEN 49 ++ ++#define WAPI_CERT_SIGN_LEN 48 ++#define WAPI_CERT_SIGN_R_LEN 24 ++#define WAPI_CERT_SIGN_S_LEN 24 ++ ++#define BN2OCT_STRING_LENTH 24 ++#define ECDH_SHAREKEY_LENTH 24 ++ ++ ++/* ++ * 10 Function Declare ++ */ ++int32 wapi_generate_temp_keygroup(uint8 *puc_asue_pubkey, ++ uint32 *pul_asue_pubkey_len, ++ uint8 *puc_asue_privkey, ++ uint32 *pul_asue_privkey_len); ++ ++int32 wapi_ecc192_sign(const uint8 *puc_digest, uint32 ul_digest_length, ++ uint8 *puc_priv_key, uint32 ul_priv_key_len, ++ uint8 *puc_sign_string, uint32 *pul_sign_length); ++ ++int32 wapi_ecc192_verify_signature(const uint8 *puc_digest, ++ uint32 ul_digest_length, uint8 *puc_signature, ++ uint32 ul_signature_len, uint8 *puc_pub_key, ++ uint32 ul_pub_key_len); ++ ++int32 __attribute__((visibility ("default"))) wapi_ecc192_verify_keygroup( ++ uint8 *puc_pub_key, uint32 ul_pub_key_len, ++ uint8 *puc_priv_key, uint32 ul_priv_key_len); ++ ++int32 wapi_ecdh_compute_key(uint8 *puc_asue_priv_key, ++ uint32 ul_asue_priv_key_len, uint8 *puc_ae_pub_key, ++ uint32 ul_ae_pub_key_len, uint8 *puc_sharekey, ++ uint32 *pul_sharekey_len); ++ ++ ++#ifdef __cplusplus ++#if __cplusplus ++} ++#endif ++#endif ++ ++#endif /* end of wai_ec.h */ ++ +diff --git a/wpa_supplicant/wapi/wai_lib.h b/wpa_supplicant/wapi/wai_lib.h +new file mode 100644 +index 0000000..3f9ca1a +--- /dev/null ++++ b/wpa_supplicant/wapi/wai_lib.h +@@ -0,0 +1,84 @@ ++/* ++ * Copyright (c) CompanyNameMagicTag. 2023-2023. All rights reserved. ++ * 文 件 名 : wai_lib.h ++ * 作 者 : CompanyName ++ * 生成日期 : 2023年1月11日 ++ * 功能描述 : lib库包含 ++ */ ++ ++#ifndef __WAI_LIB_H__ ++#define __WAI_LIB_H__ ++ ++#ifdef __cplusplus ++#if __cplusplus ++extern "C" { ++#endif ++#endif ++ ++ ++/* ++ * 1 Other Header File Including ++ */ ++#include ++#include ++#include ++ ++ ++/* ++ * 2 Macro Definition ++ */ ++#define ECDSA_F_ECDSA_DO_SIGN 101 ++#define BN_is_zero(a) ((a)->top == 0) ++#define BN_is_negative(a) ((a)->neg != 0) ++#define BN_CTX_POOL_SIZE 16 ++#define NID_X9_62_prime_field 406 ++ ++ ++/* ++ * 3 Enum Type Definition ++ */ ++ ++ ++/* ++ * 4 Global Variable Declaring ++ */ ++ ++ ++/* ++ * 5 Message Header Definition ++ */ ++ ++ ++/* ++ * 6 Message Definition ++ */ ++ ++ ++/* ++ * 7 STRUCT Type Definition ++ */ ++ ++ ++/* ++ * 8 UNION Type Definition ++ */ ++ ++ ++/* ++ * 9 OTHERS Definition ++ */ ++ ++ ++/* ++ * 10 Function Declare ++ */ ++ ++ ++#ifdef __cplusplus ++#if __cplusplus ++} ++#endif ++#endif ++ ++#endif /* end of wai_lib.h */ ++ +diff --git a/wpa_supplicant/wapi/wai_rxtx.h b/wpa_supplicant/wapi/wai_rxtx.h +new file mode 100644 +index 0000000..e6f24e2 +--- /dev/null ++++ b/wpa_supplicant/wapi/wai_rxtx.h +@@ -0,0 +1,137 @@ ++/* ++ * Copyright (c) CompanyNameMagicTag. 2023-2023. All rights reserved. ++ * 文 件 名 : wai_rxtx.h ++ * 作 者 : CompanyName ++ * 生成日期 : 2023年1月11日 ++ * 功能描述 : tx rx相关接口 ++ */ ++ ++ ++#ifndef __WAI_RXTX_H__ ++#define __WAI_RXTX_H__ ++ ++#ifdef __cplusplus ++#if __cplusplus ++extern "C" { ++#endif ++#endif ++ ++ ++/* ++ * 1 Other Header File Including ++ */ ++#include "types.h" ++#include "wpabuf.h" ++ ++ ++/* ++ * 2 Macro Definition ++ */ ++ ++#define WAI_FRAME_MAX_SIZE (32*1024 - sizeof(struct wpabuf)) ++#define WAI_FRAME_INIT_SIZE (4096 - sizeof(struct wpabuf)) ++ ++ ++#ifndef MIN ++#define MIN(x,y) ((x)<(y)?(x):(y)) ++#endif ++ ++#define WAI_VERSION 1 ++#define WAI_TYPE 1 ++ ++/* ++ * 3 Enum Type Definition ++ */ ++ ++ ++ ++/* ++ * 4 Global Variable Declaring ++ */ ++ ++ ++/* ++ * 5 Message Header Definition ++ */ ++ ++ ++/* ++ * 6 Message Definition ++ */ ++ ++ ++/* ++ * 7 STRUCT Type Definition ++ */ ++ ++#ifdef WIN32 ++#define __attribute__(x) ++#pragma pack(1) ++#endif ++typedef struct _wai_hdr_stru { ++ ++ uint8 auVersion[2]; ++ uint8 ucType; ++ uint8 ucSubtype; ++ uint8 auReserve[2]; ++ uint8 auLength[2]; ++ uint8 auFrameSeq[2]; ++ uint8 ucFragSeq; ++ uint8 ucMoreFrag; ++} __attribute__((packed)) wai_hdr_stru; ++#ifdef WIN32 ++#pragma pack( ) ++#endif ++ ++#define ETH_MTU 1500UL ++#define WAI_MTU (ETH_MTU - sizeof(wai_hdr_stru)) ++ ++/* ++ * 8 UNION Type Definition ++ */ ++ ++ ++/* ++ * 9 OTHERS Definition ++ */ ++ ++ ++/* ++ * 10 Function Declare ++ */ ++ ++ ++STATIC void wai_defrag_firstfrag(struct wapi_supplicant_stru *pst_wapi, ++ struct wpabuf *pst_waibuf, uint16 usFrameSeq, ++ uint8 ucFragSeq); ++STATIC struct wpabuf *wai_defrag_nextfrag(struct wapi_supplicant_stru *pst_wapi, ++ struct wpabuf *pst_waibuf, ++ uint16 usFrameSeq, uint8 ucFragSeq, ++ uint8 ucMoreFrag); ++STATIC struct wpabuf *wai_defrag_nonfrag(struct wapi_supplicant_stru *pst_wapi, ++ struct wpabuf *pst_waibuf, ++ uint16 usFrameSeq); ++STATIC struct wpabuf *wai_defrag(struct wpa_supplicant *pst_wpa, ++ struct wpabuf *pst_waibuf); ++ ++STATIC int32 wai_copy2fragbuf(struct wapi_supplicant_stru *pst_wapi, ++ struct wpabuf *pst_newfrag, uint32 ul_1stfrag); ++STATIC int32 wai_check_valid_frame(struct wpa_supplicant *pst_wpa, ++ const uint8 *pauc_src_mac, ++ const uint8 *pauc_buf, uint32 ul_datalen); ++ ++extern __attribute__((visibility ("default"))) void wai_rx_packet(void *pv_ctx, ++ const uint8 *pauc_src_mac, const uint8 *pauc_buf, uint32 ul_datalen); ++extern int32 wai_tx_packet(struct wpa_supplicant *pst_wpa, ++ const uint8 *pauc_buf, uint32 ul_datalen); ++extern int32 __attribute__((visibility ("default"))) wai_cleanup_fragbuf( ++ struct wapi_supplicant_stru *pst_wapi); ++ ++ ++#ifdef __cplusplus ++#if __cplusplus ++} ++#endif ++#endif ++ ++#endif /* end of wai_rxtx.h */ +diff --git a/wpa_supplicant/wapi/wai_sm.h b/wpa_supplicant/wapi/wai_sm.h +new file mode 100644 +index 0000000..b657b0c +--- /dev/null ++++ b/wpa_supplicant/wapi/wai_sm.h +@@ -0,0 +1,287 @@ ++/* ++ * Copyright (c) CompanyNameMagicTag. 2023-2023. All rights reserved. ++ * 文 件 名 : wai_sm.h ++ * 作 者 : CompanyName ++ * 生成日期 : 2023年1月11日 ++ * 功能描述 : wai_sm头文件,状态机相关 ++ */ ++ ++ ++#ifndef __WAI_SM_H__ ++#define __WAI_SM_H__ ++ ++#ifdef __cplusplus ++#if __cplusplus ++extern "C" { ++#endif ++#endif ++ ++ ++/* ++ * 1 Other Header File Including ++ */ ++#include "types.h" ++#include "wai_cert.h" ++#include "wpa_supplicant_i.h" ++ ++/* ++ * 2 Macro Definition ++ */ ++#define WAI_FLAG_BK_UPDATE BIT(0) ++#define WAI_FLAG_PRE_AUTH BIT(1) ++#define WAI_FLAG_CERT_REQ BIT(2) ++#define WAI_FLAG_OPT_FIELD BIT(3) ++#define WAI_FLAG_USK_UPDATE BIT(4) ++#define WAI_FLAG_STAKEY_NEG BIT(5) ++#define WAI_FLAG_STAKEY_DEL BIT(6) ++#define WAI_FLAG_RESERVED BIT(7) ++ ++ ++#define MAX_CERT_BUFF_SIZE 2048 ++#define CERT_X509V3 1 ++#define CERT_GBW 2 ++ ++#define ECDH_PARAM_FLAG_OID 1 ++ ++#define WAI_USK_NUMBER 2 ++ ++#define MAX_KEYDATA_SIZE 256 ++#define SERIAL_NUM_SIZE 4 ++ ++/* ֶγȶ */ ++#define WAI_AUTH_ID_SIZE 32 ++#define WAI_FLAG_SIZE 1 ++#define WAI_ID_FLAG_SIZE 2 ++#define WAI_ID_LENGTH_SIZE 2 ++#define WAI_LOCAL_MAX_ID_SIZE 3048 ++#define WAI_CERT_FLAG_SIZE 2 ++#define WAI_CERT_LENGTH_SIZE 2 ++#define WAI_ECDHPARAM_FLAG_SIZE 1 ++#define WAI_ECDHPARAM_LENGTH_SIZE 2 ++#define WAI_CHALLENGE_SIZE 32 ++#define WAI_ACCESS_RESULT_SIZE 1 ++#define WAI_KEY_LENGTH_SIZE 1 ++#define WAI_ATTRIB_TYPE_SIZE 1 ++#define WAI_ATTRIB_LENGTH_SIZE 2 ++#define WAI_BKID_SIZE 16 ++#define WAI_BK_SIZE 16 ++#define WAI_ADDID_SIZE 12 ++#define WAI_USKID_SIZE 1 ++#define WAI_MSKID_SIZE 1 ++#define WAI_MSK_ANNO_ID_SIZE 16 ++#define WAI_IV_LEN 16 ++#define WAI_DATA_SERIAL_NUMBER 16 ++#define WAI_MIC_SIZE 20 ++#define WAI_MSK_SIZE 32 ++#define WAI_NMK_SIZE 16 ++#define WAI_MAX_TX_COUNT 3 ++ ++#define WAI_SIGN_PARA_TYPE_SIZE 1 ++#define WAI_SIGN_PARA_LEN 2 ++#define WAI_SIGN_VALUE_LEN 2 ++#define WAI_SIGN_ALG_LEN 2 ++#define WAI_SIGN_ALG_ID 1 ++#define WAI_SIGN_ALG_PARA_ID_LEN 1 ++#define WAI_SIGN_ALG_PARA_VALUE_LEN 2 ++ ++#define WAPI_IE_ID_SIZE 1 ++#define WAPI_IE_LENGTH_SIZE 1 ++#define WAPI_IE_MIN_SIZE 16 ++#define WAPI_IE_MAX_SIZE 255 ++#define WAI_SUBKEY_SIZE 16 ++#define ECDH_KEY_SIZE 24 ++ ++#define WAI_BK_DERIVATION_SIZE 48 ++#define WAI_USK_DERIVATION_SIZE 96 ++#define MAX_SIGNATURE_SIZE 1024 ++ ++ ++#define WAIATTRIB_TYPE_SIGNATURE 1 ++#define WAIATTRIB_TYPE_VERIFY_RST 2 ++#define WAIATTRIB_TYPE_IDENT_LIST 3 ++ ++#define WAPIRC_CERT_FAILED 32 ++ ++#define WAI_BK_TXT "base key expansion for key and additional nonce" ++#define WAI_USK_TEXT "pairwise key expansion for unicast and additional keys and nonce" ++#define WAI_MSK_TEXT "multicast or station key expansion for station unicast and multicast and broadcast" ++#define WAI_PSK_TEXT "preshared key expansion for authentication and key negotiation" ++ ++ ++/* ++ * 3 Enum Type Definition ++ */ ++ ++typedef enum { ++ WAISM_INIT = 0, ++ WAISM_ALREADY_ASSOC, ++ WAISM_ACCESSAUTH_REQ, ++ WAISM_ACCESSAUTH_RES, ++ WAISM_USKNEG_RES, ++ WAISM_USKNEG_CONFIRM, ++ WAISM_FINSHED ++} wai_state_enum; ++ ++typedef enum _wai_frame_enum { ++ WAI_PREAUTH_START = 1, ++ WAI_STAKEY_REQUEST = 2, ++ WAI_AUTH_ACTIVE = 3, ++ WAI_ACCESS_AUTH_REQUEST = 4, ++ WAI_ACCESS_AUTH_RESPONSE = 5, ++ WAI_CERT_AUTH_REQUEST = 6, ++ WAI_CERT_AUTH_RESPONSE = 7, ++ WAI_USK_NEGOTIATION_REQUEST = 8, ++ WAI_USK_NEGOTIATION_RESPONSE = 9, ++ WAI_USK_NEGOTIATION_CONFIRM = 10, ++ WAI_MSK_ANNOUNCEMENT = 11, ++ WAI_MSK_ANNOUNCEMENT_RESPONSE = 12, ++ WAI_SUBTYPE_MAX = 13 ++} wai_frame_enum; ++ ++ ++ ++ ++ ++/* ++ * 4 Global Variable Declaring ++ */ ++ ++ ++/* ++ * 5 Message Header Definition ++ */ ++ ++ ++/* ++ * 6 Message Definition ++ */ ++ ++ ++/* ++ * 7 STRUCT Type Definition ++ */ ++ ++struct wpa_supplicant; ++typedef int32 (*wai_dispose_func)(struct wpa_supplicant *pst_wpa, ++ const uint8 *pauc_payload, ++ uint32 ul_payload_len); ++typedef struct _wai_sm_stru { ++ wai_dispose_func wai_dispose_func[WAI_SUBTYPE_MAX+1]; ++} wai_sm_stru; ++ ++typedef struct _value_string_stru { ++ uint32 ul_value; ++ const char *str; ++} value_string_stru; ++ ++typedef struct _signature_stru { ++ uint8 *pauc_ident; ++ uint16 us_ident_len; ++ uint8 *pauc_alg; ++ uint16 us_alg_len; ++ uint8 *pauc_sign_value; ++ uint16 us_sign_value_len; ++} signature_stru; ++ ++typedef struct _cert_verify_result_stru { ++ uint8 *pauc_N1; ++ uint8 *pauc_N2; ++ uint8 uc_result1; ++ uint8 *pauc_cert1; ++ uint32 ul_cert1_len; ++ uint8 uc_result2; ++ uint8 *pauc_cert2; ++ uint32 ul_cert2_len; ++} cert_verify_result_stru; ++ ++typedef struct _wai_attrib_descriptor_stru { ++ uint8 uc_attrib_type; ++ uint16 us_attrib_length; ++ union { ++ signature_stru st_signature; ++ cert_verify_result_stru st_cert_verify_result; ++ } un_attrib; ++} wai_attrib_descriptor_stru; ++ ++/* BKSA struct */ ++typedef struct _wapi_bksa_stru { ++ uint8 auc_bkid[WAI_BKID_SIZE]; ++ uint8 auc_bk[WAI_BK_SIZE]; ++ uint8 auc_ae_mac[ETH_ALEN]; ++ uint8 auc_asue_mac[ETH_ALEN]; ++ uint32 ul_akmp; ++} wapi_bksa_stru; ++ ++typedef struct _wapi_usk_stru { ++ uint8 auc_uek[WAI_SUBKEY_SIZE]; ++ uint8 auc_uck[WAI_SUBKEY_SIZE]; ++ uint8 auc_mak[WAI_SUBKEY_SIZE]; ++ uint8 auc_kek[WAI_SUBKEY_SIZE]; ++} wapi_usk_stru; ++ ++ ++/* USKSA struct */ ++typedef struct _wapi_usksa_stru { ++ uint8 uc_uskid; ++ wapi_usk_stru st_usk[2]; ++ int32 ul_ucast_suite; ++ uint8 auc_ae_mac[ETH_ALEN]; ++ uint8 auc_asue_mac[ETH_ALEN]; ++} wapi_usksa_stru; ++ ++/* MSKSA struct */ ++typedef struct _wapi_msksa_stru { ++ uint8 uc_direction; ++ uint8 uc_mskid; ++ uint8 auc_msk[WAI_MSK_SIZE]; ++ uint8 auc_msk_ann_id[WAI_IV_LEN]; ++ int32 uc_ucast_suite; ++ uint8 auc_ae_mac[ETH_ALEN]; ++} wapi_msksa_stru; ++ ++ ++typedef struct _wai_auth_req_param_stru { ++ const uint8 *pauc_authid; ++ cert_stru *pst_ae_cert; ++ cert_stru *pst_asue_cert; ++ uint8 *pauc_ecdh; ++ uint16 us_ecdh_len; ++} wai_authreq_param_stru; ++ ++ ++/* ++ * 8 UNION Type Definition ++ */ ++ ++ ++/* ++ * 9 OTHERS Definition ++ */ ++ ++ ++/* ++ * 10 Function Declare ++ */ ++struct wapi_supplicant_stru; ++int32 wai_certauth_bk_derivation(struct wapi_supplicant_stru *pst_wapi, ++ uint8 *pauc_ae_pubkey, uint8 uc_ae_pubkey_len, ++ uint8 *pauc_nae); ++int32 wai_usk_derivation(struct wapi_supplicant_stru *pst_wapi, ++ uint8 *pauc_usk_nae); ++int32 wai_msk_derivation(uint8 *pauc_msk_nmk, uint32 ul_nmk_len, ++ uint8 *pauc_out_bk, uint32 ul_outkey_len); ++__attribute__((visibility ("default"))) int32 wai_psk_derivation( ++ uint8 *pauc_password, uint32 ul_ps_len, uint8 *pauc_out_bk); ++void wai_tx_timeout(void *eloop_ctx, void *timeout_ctx); ++int32 wai_sm_process(struct wpa_supplicant *pst_wpa, ++ struct wpabuf *pst_waibuf); ++wai_sm_stru * get_wai_sm(); ++ ++ ++#ifdef __cplusplus ++#if __cplusplus ++} ++#endif ++#endif ++ ++#endif /* end of wai_sm.h */ +diff --git a/wpa_supplicant/wapi/wapi.c b/wpa_supplicant/wapi/wapi.c +new file mode 100644 +index 0000000..69b4dc9 +--- /dev/null ++++ b/wpa_supplicant/wapi/wapi.c +@@ -0,0 +1,907 @@ ++/* ++ * Copyright (c) CompanyNameMagicTag. 2023-2023. All rights reserved. ++ * 文 件 名 : wapi.c ++ * 作 者 : CompanyName ++ * 生成日期 : 2023年1月11日 ++ * 功能描述 : wapi主文件 ++ */ ++ ++ ++ ++#ifdef __cplusplus ++#if __cplusplus ++extern "C" { ++#endif ++#endif ++ ++ ++/* ++ * 1 Header File Including ++ */ ++#include "utils/includes.h" ++#include "utils/common.h" ++#include "utils/os.h" /* for os_funcs etc */ ++#include "utils/eloop.h" ++#include "utils/base64.h" ++#include "wpa_supplicant_i.h" /* for wpa_supplicant */ ++#include "utils/wpabuf.h" ++#include "l2_packet/l2_packet.h" /* for L2 functions */ ++#include "common/wpa_common.h" /* for wpa_ie_data */ ++#include "common/defs.h" ++#include "common/wpa_ctrl.h" ++#include "driver_i.h" ++#include "driver.h" ++#include "bss.h" ++ ++ ++ ++#include "types.h" ++#include "wapi.h" ++#include "wai_rxtx.h" ++#include "hash.h" ++#include "wai_ec.h" ++#include "wai_cert.h" ++#include "wai_call_back.h" ++#ifdef ANDROID ++#include ++#define KEYSTORE_MESSAGE_SIZE 65535 ++#endif ++#ifdef CONFIG_ANDROID_LOG ++#include ++#endif ++#include ++ ++/* ++ * 2 Global Variable Definition ++ */ ++int32 wapi_event_process(struct wapi_supplicant_stru *pst_wapi, ++ conn_status_enum en_action, uint8* puc_assoc_ie, ++ int32 uc_assoc_ie_len); ++static int32 wapi_psk_derivate(struct wpa_supplicant *pst_wpa, ++ struct wpa_ssid *pst_ssid); ++static int32 wapi_read_cert(const char *pc_cert_file, uint8 *puc_cert_buf, ++ uint32 *pul_buf_len); ++ ++static int32 wapi_config_associate_parm(struct wpa_supplicant *pst_wpa, ++ struct wpa_bss *pst_bss, ++ struct wpa_ssid *pst_ssid, ++ struct wpa_driver_associate_params *pst_params); ++int32 wapi_init_ie(struct wpa_supplicant *pst_wpa); ++static int32 wapi_cert_parse(struct wpa_supplicant *pst_wpa); ++void wapi_notify_wrong_msg(struct wpa_supplicant *pst_wpa); ++int wapi_deinit_dlhandle(void); ++ ++/* wapiлȡӣڴ˽ṹĺ */ ++struct wapi_iface_dll_cb_stru { ++ void *dl_handle; ++ int (*wapi_iface_funcs_init)(struct wapi_iface_funcs_stru * wapi_iface_cb); ++ void (*wai_rx_packet)(void *pv_ctx, const uint8 *pauc_src_mac, ++ const uint8 *pauc_buf,uint32 ul_datalen); ++ void (*wapi_cert_free_certificate)(cert_stru *pst_cert); ++ int32 (*wai_cleanup_fragbuf)(struct wapi_supplicant_stru *pst_wapi); ++ int32 (*wapi_cert_parse_ecprivkey)(uint8 *puc_cert_buf, ++ uint32 ul_cert_buf_len, ++ uint8 *puc_priv_key_buf, ++ uint32 *pul_priv_key_len); ++ cert_stru *(*wapi_cert_parse_certificate)(uint8 *puc_cert_buf, ++ uint32 ul_cert_buf_len); ++ int32 (*wapi_ecc192_verify_keygroup)(uint8 *puc_pub_key, ++ uint32 ul_pub_key_len, ++ uint8 *puc_priv_key, ++ uint32 ul_priv_key_len); ++ int32 (*wapi_cert_verify_certificate)(uint8 *puc_cert_buf, ++ uint32 ul_cert_buf_len, ++ uint8 *puc_asu_pubkey, ++ uint32 ul_asu_pubkey_len); ++ int32 (*wai_psk_derivation)(uint8 *pauc_password, uint32 ul_ps_len, ++ uint8 *pauc_out_bk); ++ int32 (*KD_HMAC_SHA256)(const uint8 *pauc_data, ++ uint32 ul_datalen, ++ const uint8 *pauc_key, ++ uint32 ul_keylen, ++ uint8 *pauc_out, ++ uint32 ul_out_len); ++}; ++struct wapi_iface_dll_cb_stru wapi_iface_dll_cb; ++ ++/* ++ * 3 Function Definition ++ */ ++void wapi_supplicant_init(struct wpa_supplicant *pst_wpa) ++{ ++} ++ ++void wapi_supplicant_deinit(struct wpa_supplicant *pst_wpa) ++{ ++} ++ ++int32 wapi_init_iface(struct wpa_supplicant *pst_wpa) ++{ ++ struct wapi_supplicant_stru *pst_wapi = NULL; ++ uint32 ul_loop; ++ ++ if (pst_wpa == NULL) { ++ wpa_printf(MSG_WARNING,"wpa struct is null"); ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi = (struct wapi_supplicant_stru *)os_zalloc(sizeof(struct wapi_supplicant_stru)); ++ if (pst_wapi == NULL) { ++ wpa_printf(MSG_WARNING,"Malloc wapi_s memory failed"); ++ ++ return WAPI_FAILED; ++ } ++ ++ for (ul_loop = 0; ul_loop < 20; ul_loop++) { ++ pst_wapi->pst_wapi_l2 = l2_packet_init( ++ pst_wpa->ifname, ++ wpa_drv_get_mac_addr(pst_wpa), ++ ETH_TYPE_WAI, ++ wapi_iface_dll_cb.wai_rx_packet, ++ pst_wpa, ++ 0); ++ ++ wpa_printf(MSG_DEBUG,"Initial WAPI L2 packet"); ++ if (pst_wapi->pst_wapi_l2 != NULL) ++ break; ++ os_sleep(3, 0); ++ } /* end for */ ++ ++ if (pst_wapi->pst_wapi_l2 == NULL) { ++ wpa_printf(MSG_WARNING,"Failed to initialize L2 initerface"); ++ os_free(pst_wapi); ++ ++ return WAPI_FAILED; ++ } ++ ++ if (l2_packet_get_own_addr(pst_wapi->pst_wapi_l2, ++ pst_wapi->auc_own_mac) != 0) { ++ wpa_printf(MSG_WARNING,"Failed to get own L2 address"); ++ l2_packet_deinit(pst_wapi->pst_wapi_l2); ++ os_free(pst_wapi); ++ ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi->en_state = WAISM_INIT; ++ pst_wapi->us_nextframeseq = 1; ++ pst_wapi->uc_nextfragseq = 0; ++ pst_wpa->pst_wapi = pst_wapi; ++ pst_wapi->pst_wpa = pst_wpa; ++ pst_wapi->st_usksa.uc_uskid =0; ++ pst_wapi->st_msksa.uc_mskid =0; ++ ++ wpa_printf(MSG_DEBUG,"wapi iface init sucess"); ++ ++ return WAPI_SUCCESS; ++} ++ ++int32 wapi_deinit_iface(struct wpa_supplicant* pst_wpa) ++{ ++ struct wapi_supplicant_stru *pst_wapi = NULL; ++ ++ if (NULL == pst_wpa) { ++ wpa_printf(MSG_WARNING,"wapi deinit iface! pst_wpa struct is null"); ++ return WAPI_FAILED; ++ } ++ ++ if (NULL == pst_wpa->pst_wapi) { ++ wpa_printf(MSG_WARNING,"wapi deinit iface!pst_wapi struct is null"); ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi = pst_wpa->pst_wapi; ++ if (NULL != pst_wapi->pst_wapi_l2) { ++ l2_packet_deinit(pst_wapi->pst_wapi_l2); ++ pst_wapi->pst_wapi_l2 = NULL; ++ } ++ ++ if (NULL != pst_wapi->pst_ae_cert) { ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_wapi->pst_ae_cert); ++ pst_wapi->pst_ae_cert = NULL; ++ } ++ ++ if(NULL != pst_wapi->pst_asue_cert) { ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_wapi->pst_asue_cert); ++ pst_wapi->pst_asue_cert = NULL; ++ } ++ ++ if(NULL != pst_wapi->pst_as_cert) { ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_wapi->pst_as_cert); ++ pst_wapi->pst_as_cert = NULL; ++ } ++ ++ wapi_iface_dll_cb.wai_cleanup_fragbuf(pst_wapi); ++ ++ if (NULL != pst_wapi->pst_tx_framebuf) { ++ wpabuf_free(pst_wapi->pst_tx_framebuf); ++ pst_wapi->pst_tx_framebuf = NULL; ++ } ++ wapi_deinit_dlhandle(); ++ os_free(pst_wapi); ++ pst_wpa->pst_wapi = NULL; ++ ++ return WAPI_SUCCESS; ++} ++ ++int32 wapi_parse_wapi_ie(const uint8 *pauc_wapi_ie, uint32 ul_ie_len, struct wpa_ie_data *pst_ie_data) ++{ ++ /* TODO */ ++ return 0; ++} ++ ++int32 wapi_supplicant_event_assoc(struct wpa_supplicant *pst_wpa, ++ struct wpa_bss *pst_bss, ++ struct wpa_ssid *pst_ssid, ++ struct wpa_driver_associate_params *pst_params) ++ ++{ ++ struct wapi_supplicant_stru *pst_wapi = NULL; ++#ifdef ANDROID ++ int32 l_result; ++ int32 l_length; ++ uint8_t *pvalue = NULL; ++#endif ++ ++ if ((NULL == pst_wpa) || (NULL == pst_wpa->pst_wapi) || ++ (NULL == pst_bss) || (NULL == pst_ssid) || (NULL == pst_params)) { ++ wpa_printf(MSG_WARNING, "null pointer, pst_wpa=%p, pst_bss=%p, pst_ssid=%p,pst_params=%p,", ++ pst_wpa, pst_bss, pst_ssid, pst_params); ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi = pst_wpa->pst_wapi; ++ ++ os_memcpy(pst_wapi->auc_own_mac, pst_wpa->own_addr, ETH_ALEN); ++ ++ os_memcpy(pst_wapi->auc_addid, pst_bss->bssid, ETH_ALEN); ++ os_memcpy(&pst_wapi->auc_addid[ETH_ALEN], pst_wapi->auc_own_mac, ETH_ALEN); ++ ++ if(WPA_KEY_MGMT_WAPI_PSK & (unsigned int)(pst_wpa->key_mgmt)) { ++ pst_wapi->en_auth_type = AUTH_TYPE_WAPI_PSK; ++ pst_params->key_mgmt_suite = KEY_MGMT_WAPI_PSK; ++ ++ if( WAPI_SUCCESS != wapi_psk_derivate(pst_wpa,pst_ssid) ) { ++ wpa_printf(MSG_WARNING,"fail to derivate psk"); ++ wapi_notify_wrong_msg(pst_wpa); ++ return WAPI_FAILED; ++ } ++ } ++ else if(WPA_KEY_MGMT_WAPI_CERT & (unsigned int)(pst_wpa->key_mgmt)) { ++#ifdef ANDROID ++ pst_wapi->en_auth_type = AUTH_TYPE_WAPI_CERT; ++ pst_params->key_mgmt_suite = KEY_MGMT_WAPI_CERT; ++ if (pst_ssid->wapi_as_cert && strncmp("keystore://", pst_ssid->wapi_as_cert, 11) == 0) { ++ l_length = (int32)keystore_get(&pst_ssid->wapi_as_cert[11], strlen(pst_ssid->wapi_as_cert)-11, &pvalue); ++ ++ if ( WAPI_FAILED == l_length ) { ++ wpa_printf(MSG_ERROR,"%s: Could not open %s\n", __FUNCTION__, pst_ssid->wapi_as_cert); ++ wapi_notify_wrong_msg(pst_wpa); ++ return WAPI_FAILED; ++ } ++ ++ os_memcpy(pst_wapi->auc_as_certfile,pvalue,l_length); ++ pst_wapi->ul_as_certfile_len = (uint32)l_length; ++ free(pvalue); ++ pvalue = NULL; ++ } else { ++ l_result = wapi_read_cert((int8 *)pst_ssid->wapi_as_cert, ++ pst_wapi->auc_as_certfile, ++ &(pst_wapi->ul_as_certfile_len)); ++ if ( WAPI_FAILED == l_result) { ++ wpa_printf(MSG_ERROR,"ERROR wapi_read_cert,pst_ssid->wapi_as_cert: %s", pst_ssid->wapi_as_cert); ++ wapi_notify_wrong_msg(pst_wpa); ++ return WAPI_FAILED; ++ } ++ } ++ ++ if (pst_ssid->wapi_user_cert && strncmp("keystore://", pst_ssid->wapi_user_cert, 11) == 0) { ++ memset(pst_wapi->auc_user_certfile, 0, 2048); ++ l_length = (int32)keystore_get(&pst_ssid->wapi_user_cert[11], strlen(pst_ssid->wapi_user_cert)-11, &pvalue); ++ ++ if ( WAPI_FAILED == l_length ) { ++ wpa_printf(MSG_ERROR, "%s: Could not open %s\n", __FUNCTION__, pst_ssid->wapi_user_cert); ++ wapi_notify_wrong_msg(pst_wpa); ++ return WAPI_FAILED; ++ } ++ ++ os_memcpy(pst_wapi->auc_user_certfile,pvalue,l_length); ++ ++ pst_wapi->ul_user_certfile_len = (uint32)l_length; ++ free(pvalue); ++ pvalue = NULL; ++ ++ } else { ++ l_result = wapi_read_cert((int8 *)pst_ssid->wapi_user_cert, ++ pst_wapi->auc_user_certfile, ++ &(pst_wapi->ul_user_certfile_len)); ++ if ( WAPI_FAILED == l_result ) { ++ wpa_printf(MSG_ERROR, "ERROR wapi_read_cert,pst_ssid->wapi_user_cert: %s\n", pst_ssid->wapi_user_cert); ++ wapi_notify_wrong_msg(pst_wpa); ++ return WAPI_FAILED; ++ } ++ } ++ if( WAPI_SUCCESS != wapi_cert_parse(pst_wpa)) { ++ wpa_printf(MSG_WARNING,"wapi_cert_parse fail"); ++ wapi_notify_wrong_msg(pst_wpa); ++ return WAPI_FAILED; ++ } ++#endif ++ } else { /* no WAPI */ ++ pst_wpa->pst_wapi->en_auth_type= AUTH_TYPE_NONE_WAPI; ++ } ++ ++ if( WAPI_SUCCESS != wapi_init_ie(pst_wpa) ) { ++ wpa_printf(MSG_WARNING,"fail to init ie"); ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_wapi->pst_asue_cert); ++ pst_wapi->pst_asue_cert = NULL; ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_wapi->pst_as_cert); ++ pst_wapi->pst_as_cert = NULL; ++ return WAPI_FAILED; ++ } ++ ++ if( WAPI_SUCCESS != wapi_config_associate_parm(pst_wpa,pst_bss,pst_ssid,pst_params)) { ++ wpa_printf(MSG_WARNING,"fail to configurate associating param"); ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_wapi->pst_asue_cert); ++ pst_wapi->pst_asue_cert = NULL; ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_wapi->pst_as_cert); ++ pst_wapi->pst_as_cert = NULL; ++ return WAPI_FAILED; ++ } ++ ++ return WAPI_SUCCESS; ++} ++ ++int32 wapi_supplicant_event_disassoc(struct wpa_supplicant *pst_wpa,uint16 us_reason) ++{ ++ struct wapi_supplicant_stru *pst_wapi = NULL; ++ uint8 auc_bssid[ETH_ALEN]; ++ ++ if ((NULL == pst_wpa) || (NULL == pst_wpa->pst_wapi)) ++ { ++ wpa_printf(MSG_WARNING,"pst_wpa or pst_wpa->pst_wapi is null"); ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi = pst_wpa->pst_wapi; ++ ++ wpa_drv_get_bssid(pst_wpa, auc_bssid); ++ ++ memcpy(pst_wapi->auc_own_mac, pst_wpa->own_addr, ETH_ALEN); ++ memcpy(pst_wapi->auc_bssid,auc_bssid,ETH_ALEN); ++ ++ pst_wapi->en_state = WAISM_INIT; ++ wpa_printf(MSG_DEBUG,"WAI_Msg_Input success"); ++ ++ return WAPI_SUCCESS; ++} ++ ++int32 wapi_supplicant_event(struct wpa_supplicant *pst_wpa, ++ enum wpa_event_type en_event, ++ void *data) ++{ ++ struct wapi_supplicant_stru *pst_wapi = NULL; ++ uint8 auc_bssid[ETH_ALEN]; ++ ++ if ((NULL == pst_wpa) || (NULL == pst_wpa->pst_wapi)) ++ { ++ wpa_printf(MSG_WARNING,"null pointer, pst_wpa=%p", pst_wpa); ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi = pst_wpa->pst_wapi; ++ ++ switch (en_event) { ++ case EVENT_ASSOC: ++ { ++ wpa_drv_get_bssid(pst_wpa, auc_bssid); ++ memcpy(pst_wapi->auc_own_mac, pst_wpa->own_addr, ETH_ALEN); ++ memcpy(pst_wapi->auc_bssid,auc_bssid,ETH_ALEN); ++ ++ if(pst_wapi->uc_wapi_ie_len) { ++ wpa_printf(MSG_DEBUG,"start to call wapi_event_process function\n"); ++ wapi_event_process(pst_wapi,CONN_ASSOC, pst_wapi->auc_wapi_ie,pst_wapi->uc_wapi_ie_len); ++ } else { ++ wpa_printf(MSG_DEBUG,"start to call wapi_event_process function, wapi ie len is 0.\n"); ++ } ++ break; ++ } ++ case EVENT_DISASSOC: ++ pst_wapi->en_state = WAISM_INIT; ++ break; ++ default: ++ wpa_printf(MSG_DEBUG,"event is unknown"); ++ break; ++ } ++ ++ return WAPI_SUCCESS; ++} ++ ++static int32 wapi_drv_get_bssid(struct wpa_supplicant *pst_wpa, uint8 *puc_bssid) ++{ ++ if (pst_wpa->driver->get_bssid) { ++ return pst_wpa->driver->get_bssid(pst_wpa->drv_priv, puc_bssid); ++ } ++ return WAPI_FAILED; ++} ++ ++static int32 wapi_read_cert(const char *pc_cert_file, uint8 *puc_cert_buf, uint32 *pul_buf_len) ++{ ++ FILE *file = NULL; ++ int32 l_id = 0; ++ char real_path[PATH_MAX] = {0}; ++ ++ if (NULL == pc_cert_file) ++ { ++ wpa_printf(MSG_ERROR, "Error: pc_cert_file is null certificate"); ++ return WAPI_FAILED; ++ } ++ ++ if (strlen(pc_cert_file) > PATH_MAX || realpath(pc_cert_file, real_path) == NULL) { ++ wpa_printf(MSG_ERROR, "Error: convert pc_cert_file to real path failed"); ++ return WAPI_FAILED; ++ } ++ ++ file = fopen((int8 *)real_path, "rb"); ++ if (NULL == file) ++ { ++ wpa_printf(MSG_ERROR,"Open file: %s Error", real_path); ++ perror("Open cert file Error"); ++ return WAPI_FAILED; ++ } ++ ++ while (!feof(file)) ++ { ++ puc_cert_buf[l_id++] = (uint8)fgetc(file); ++ if (l_id >= MAX_CERT_BUFF_SIZE) { ++ wpa_printf(MSG_ERROR,"cert buf too small, buf_len = %d, i = %d", MAX_CERT_BUFF_SIZE, l_id); ++ fclose(file); ++ return WAPI_FAILED; ++ } ++ } ++ ++ *pul_buf_len = (uint32)l_id; ++ fclose(file); ++ return WAPI_SUCCESS; ++ ++} ++ ++static int32 wapi_cert_parse(struct wpa_supplicant *pst_wpa) ++{ ++ struct wapi_supplicant_stru *pst_wapi = NULL; ++ cert_stru *pst_asue_cert = NULL; ++ cert_stru *pst_as_cert = NULL; ++ int32 l_ret; ++ if ((NULL == pst_wpa) || (NULL == pst_wpa->pst_wapi)) ++ { ++ wpa_printf(MSG_WARNING,"pst_wapi is null"); ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi = pst_wpa->pst_wapi; ++ ++ l_ret = wapi_iface_dll_cb.wapi_cert_parse_ecprivkey(pst_wapi->auc_user_certfile, ++ pst_wapi->ul_user_certfile_len, ++ pst_wapi->auc_asue_cert_privkey, ++ &pst_wapi->ul_asue_cert_privkey_len); ++ if( WAPI_FAILED == l_ret ) ++ { ++ wpa_printf(MSG_WARNING,"wapi_certificate_parse_privkey fail"); ++ return WAPI_FAILED; ++ } ++ ++ pst_asue_cert = wapi_iface_dll_cb.wapi_cert_parse_certificate(pst_wapi->auc_user_certfile, ++ pst_wapi->ul_user_certfile_len); ++ if( NULL == pst_asue_cert ) ++ { ++ wpa_printf(MSG_WARNING,"parse wapi asue certificate fail"); ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi->pst_asue_cert = pst_asue_cert; ++ ++ pst_as_cert =wapi_iface_dll_cb.wapi_cert_parse_certificate(pst_wapi->auc_as_certfile, ++ pst_wapi->ul_as_certfile_len); ++ if( NULL == pst_as_cert ) ++ { ++ wpa_printf(MSG_WARNING,"parse wapi ae certificate fail"); ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_asue_cert); ++ pst_wapi->pst_asue_cert = NULL; ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi->pst_as_cert = pst_as_cert; ++ ++ l_ret = wapi_iface_dll_cb.wapi_ecc192_verify_keygroup(pst_wapi->pst_asue_cert->st_subject_key.auc_value, ++ pst_wapi->pst_asue_cert->st_subject_key.us_length, ++ pst_wapi->auc_asue_cert_privkey, ++ pst_wapi->ul_asue_cert_privkey_len); ++ if( WAPI_FAILED == l_ret) ++ { ++ wpa_printf(MSG_WARNING,"wapi_ecc192_verify_keygroup fail"); ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_asue_cert); ++ pst_wapi->pst_asue_cert = NULL; ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_as_cert); ++ pst_wapi->pst_as_cert = NULL; ++ return WAPI_FAILED; ++ } ++ ++ l_ret = wapi_iface_dll_cb.wapi_cert_verify_certificate(pst_wapi->auc_user_certfile, ++ pst_wapi->ul_user_certfile_len, ++ pst_wapi->pst_as_cert->st_subject_key.auc_value, ++ pst_wapi->pst_as_cert->st_subject_key.us_length); ++ if( WAPI_FAILED == l_ret) ++ { ++ wpa_printf(MSG_WARNING,"verify ause certificate fail"); ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_asue_cert); ++ pst_wapi->pst_asue_cert = NULL; ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_as_cert); ++ pst_wapi->pst_as_cert = NULL; ++ ++ return WAPI_FAILED; ++ } ++ ++ l_ret = wapi_iface_dll_cb.wapi_cert_verify_certificate(pst_wapi->auc_as_certfile, ++ pst_wapi->ul_as_certfile_len, ++ pst_wapi->pst_as_cert->st_subject_key.auc_value, ++ pst_wapi->pst_as_cert->st_subject_key.us_length); ++ if( WAPI_FAILED == l_ret) ++ { ++ wpa_printf(MSG_WARNING,"verify as certificate fail"); ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_asue_cert); ++ pst_wapi->pst_asue_cert = NULL; ++ wapi_iface_dll_cb.wapi_cert_free_certificate(pst_as_cert); ++ pst_wapi->pst_as_cert = NULL; ++ ++ return WAPI_FAILED; ++ } ++ ++ return WAPI_SUCCESS; ++} ++ ++static int32 wapi_psk_derivate(struct wpa_supplicant *pst_wpa,struct wpa_ssid *pst_ssid) ++{ ++ struct wapi_supplicant_stru *pst_wapi = NULL; ++ size_t l_len; ++ int32 l_ret; ++ int32 psk_len; ++ uint8 auc_buff[128]; ++ ++ if ((NULL == pst_wpa) || (NULL == pst_wpa->pst_wapi)) ++ { ++ wpa_printf(MSG_WARNING,"pst_wapi is null"); ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi = pst_wpa->pst_wapi; ++ ++ if (pst_ssid->passphrase == NULL && !pst_ssid->psk_set) ++ { ++ wpa_printf(MSG_ERROR," WAPI PSK passphrase %p psk_set %d\n",pst_ssid->passphrase, pst_ssid->psk_set); ++ return WAPI_FAILED; ++ } ++ ++ ++ if (pst_ssid->psk_set) ++ { ++ pst_wapi->st_auth_psk_type.ul_key_length= (uint32)pst_ssid->psk_set; ++ os_memset(pst_wapi->st_auth_psk_type.uc_key_val, 0, sizeof(pst_wapi->st_auth_psk_type.uc_key_val)); ++ os_memcpy(pst_wapi->st_auth_psk_type.uc_key_val, pst_ssid->psk, pst_ssid->psk_set); ++ } ++ else ++ { ++ l_len = os_strlen(pst_ssid->passphrase); ++ pst_wapi->st_auth_psk_type.ul_key_length = (uint32)l_len; ++ os_memset(pst_wapi->st_auth_psk_type.uc_key_val, 0, sizeof(pst_wapi->st_auth_psk_type.uc_key_val)); ++ os_memcpy(pst_wapi->st_auth_psk_type.uc_key_val, pst_ssid->passphrase, l_len); ++ } ++ ++ os_memset(pst_wapi->uc_bk,0,WAI_BK_SIZE); ++ os_memset(auc_buff,0,128); ++ ++ if ( KEY_TYPE_ASCII == pst_ssid->psk_key_type) ++ { ++ l_ret = wapi_iface_dll_cb.wai_psk_derivation((uint8*)pst_wapi->st_auth_psk_type.uc_key_val, ++ pst_wapi->st_auth_psk_type.ul_key_length, pst_wapi->uc_bk); ++ } ++ else ++ { ++ if (pst_wapi->st_auth_psk_type.ul_key_length % 2) ++ { ++ wpa_printf(MSG_WARNING,"ul_key_length mod 2 is not zero"); ++ return WAPI_FAILED; ++ } ++ ++ psk_len = (int32)(pst_wapi->st_auth_psk_type.ul_key_length / 2); ++ if (hexstr2bin((const char *)(pst_wapi->st_auth_psk_type.uc_key_val), auc_buff, psk_len) || ++ pst_wapi->st_auth_psk_type.uc_key_val[psk_len * 2] != '\0') ++ { ++ wpa_printf(MSG_ERROR, "Invalid PSK "); ++ return WAPI_FAILED; ++ } ++ ++ l_ret = wapi_iface_dll_cb.wai_psk_derivation(auc_buff, (uint32)psk_len, ++ pst_wapi->uc_bk); ++ ++ } ++ ++ return l_ret; ++ ++} ++ ++static int32 wapi_config_associate_parm(struct wpa_supplicant *pst_wpa, ++ struct wpa_bss *pst_bss, ++ struct wpa_ssid *pst_ssid, ++ struct wpa_driver_associate_params *pst_params) ++{ ++ uint8 *puc_wapi_ie; ++ uint8 *puc_ie_ssid; ++ enum wpa_cipher en_cipher_pairwise; ++ enum wpa_cipher en_cipher_group; ++ en_cipher_pairwise = WPA_CIPHER_NONE; ++ en_cipher_group = WPA_CIPHER_NONE; ++ ++ if(pst_bss){ ++ puc_ie_ssid =(uint8 *)wpa_bss_get_ie(pst_bss, 0); /* WLAN_EID_SSID */ ++ pst_params->ssid = puc_ie_ssid+2; ++ pst_params->ssid_len=puc_ie_ssid[1]; ++ pst_params->bssid=pst_bss->bssid; ++ ++ puc_wapi_ie=(uint8 *)wpa_bss_get_ie(pst_bss, 68); /* WLAN_EID_WAPI */ ++ if(puc_wapi_ie) ++ { ++ pst_wpa->pst_wapi->uc_wapi_ie_len = puc_wapi_ie[1]+2; ++ if(puc_wapi_ie[1]) ++ { ++ os_memcpy(pst_wpa->pst_wapi->auc_wapi_ie,puc_wapi_ie,puc_wapi_ie[1]+2); ++ } ++ pst_wpa->pst_wapi->auc_wapi_ie[1] += 2; ++ pst_wpa->pst_wapi->uc_wapi_ie_len += 2; ++ pst_wpa->pst_wapi->auc_wapi_ie[pst_wpa->pst_wapi->uc_wapi_ie_len - 2] = 0; ++ pst_wpa->pst_wapi->auc_wapi_ie[pst_wpa->pst_wapi->uc_wapi_ie_len - 1] = 0; ++ } ++ ++ pst_params->freq.freq = pst_bss->freq; ++ }else{ ++ pst_params->ssid=pst_ssid->ssid; ++ pst_params->ssid_len=pst_ssid->ssid_len; ++ puc_wapi_ie=NULL; ++ } ++ ++ pst_params->mode = 0; /* Modes of operation: Let the driver decides */ ++ pst_params->wpa_ie_len=(pst_wpa->pst_wapi->uc_wapi_ie_len); ++ pst_params->wpa_ie=pst_wpa->pst_wapi->auc_wapi_ie; ++ ++ pst_params->pairwise_suite = en_cipher_pairwise; ++ pst_params->group_suite = en_cipher_group; ++ ++ if (!os_memcmp(pst_wpa->bssid, "\x00\x00\x00\x00\x00\x00", ETH_ALEN)) { ++ if(wpa_drv_associate(pst_wpa, pst_params)) { ++ wpa_printf(MSG_WARNING,"wapi_supplicant_associate failed\n"); ++ wpas_connection_failed(pst_wpa, pst_wpa->pending_bssid); ++ wpa_supplicant_set_state(pst_wpa, WPA_DISCONNECTED); ++ os_memset(pst_wpa->pending_bssid, 0, ETH_ALEN); ++ pst_wpa->current_bss = NULL; ++ pst_wpa->current_ssid = NULL; ++ ++ return WAPI_FAILED; ++ } ++ wpa_supplicant_req_auth_timeout(pst_wpa, 10, 0);/* Timeout for IEEE 802.11 authentication and association */ ++ } ++ ++ return WAPI_SUCCESS; ++} ++ ++int32 wapi_init_ie(struct wpa_supplicant *pst_wpa) ++{ ++ struct wapi_supplicant_stru *pst_wapi = NULL; ++ uint8 auc_wapi_ie[] = { ++ 0x44, 0x16, 0x01, 0x00, 0x01, 0x00, 0x00, 0x14, ++ 0x72, 0x01, 0x01, 0x00, 0x00, 0x14, 0x72, 0x01, ++ 0x00, 0x14, 0x72, 0x01, 0x00, 0x00, 0x00, 0x00 ++ };/* little endian*/ ++ ++ ++ if ((NULL == pst_wpa) || (NULL == pst_wpa->pst_wapi)) ++ { ++ wpa_printf(MSG_WARNING,"pst_wapi is null"); ++ return WAPI_FAILED; ++ } ++ ++ pst_wapi = pst_wpa->pst_wapi; ++ ++ os_memset(pst_wapi->auc_assoc_wapi_ie, 0, sizeof(pst_wapi->auc_assoc_wapi_ie)); ++ pst_wapi->uc_assoc_wapi_ie_len = 0; ++ ++ if (AUTH_TYPE_NONE_WAPI == pst_wapi->en_auth_type) ++ { ++ wpa_printf(MSG_DEBUG,"open, needn't set wapi-ie"); ++ return WAPI_SUCCESS; ++ } ++ ++ if (AUTH_TYPE_WAPI_PSK == pst_wapi->en_auth_type) ++ { ++ auc_wapi_ie[9] = 2; ++ } ++ ++ os_memcpy(pst_wapi->auc_assoc_wapi_ie, auc_wapi_ie, sizeof(auc_wapi_ie)); ++ pst_wapi->uc_assoc_wapi_ie_len = sizeof(auc_wapi_ie); ++ ++ return WAPI_SUCCESS; ++} ++ ++int32 wapi_event_process(struct wapi_supplicant_stru *pst_wapi, conn_status_enum en_action,uint8* puc_assoc_ie, int32 uc_assoc_ie_len) ++{ ++ uint8 auc_ann_id[] = { ++ 0x5c, 0x36, 0x5c,0x36,0x5c,0x36,0x5c,0x36, ++ 0x5c,0x36,0x5c,0x36,0x5c,0x36,0x5c,0x35 ++ }; ++ ++ if ((NULL == pst_wapi) || (NULL == puc_assoc_ie)) ++ { ++ wpa_printf(MSG_WARNING,"param is null"); ++ return WAPI_FAILED; ++ } ++ ++ if (CONN_ASSOC == en_action) { ++ ++ if (AUTH_TYPE_WAPI_PSK == pst_wapi->en_auth_type) ++ { ++ uint8 uc_bkid[WAI_BKID_SIZE] = {0}; ++ ++ wapi_iface_dll_cb.KD_HMAC_SHA256(pst_wapi->auc_addid, WAI_ADDID_SIZE, ++ pst_wapi->uc_bk, WAI_BK_SIZE, uc_bkid, WAI_BKID_SIZE); ++ ++ ++ os_memcpy(pst_wapi->st_bksa.auc_bk, pst_wapi->uc_bk, WAI_BK_SIZE); ++ os_memcpy(pst_wapi->st_bksa.auc_bkid, uc_bkid, WAI_BKID_SIZE); ++ os_memcpy(pst_wapi->st_bksa.auc_ae_mac,pst_wapi->auc_bssid,ETH_ALEN); ++ os_memcpy(pst_wapi->st_bksa.auc_asue_mac,pst_wapi->auc_own_mac,ETH_ALEN); ++ /* akmp todo */ ++ } ++ ++ if (AUTH_TYPE_NONE_WAPI != pst_wapi->en_auth_type) ++ { ++ if (uc_assoc_ie_len >= (int32)sizeof(pst_wapi->auc_wapi_ie)-1) ++ uc_assoc_ie_len = (int32)sizeof(pst_wapi->auc_wapi_ie)-1; ++ ++ os_memcpy(pst_wapi->auc_wapi_ie, puc_assoc_ie, uc_assoc_ie_len); ++ pst_wapi->uc_wapi_ie_len = uc_assoc_ie_len; ++ } ++ ++ ++ pst_wapi->us_nextframeseq = 1; ++ pst_wapi->uc_nextfragseq = 0; ++ pst_wapi->us_txframe_seq =0; ++ memcpy(pst_wapi->st_msksa.auc_msk_ann_id, auc_ann_id, WAI_IV_LEN); ++ pst_wapi->st_usksa.uc_uskid = 0; /* uskid */ ++ ++ pst_wapi->en_state = WAISM_ALREADY_ASSOC; ++ ++ }else if (CONN_DISASSOC == en_action){ ++ pst_wapi->en_state = WAISM_INIT; ++ } ++ ++ return WAPI_SUCCESS; ++ ++} ++ ++static void wapi_notify_handler(void *eloop_ctx, void *timeout_ctx) ++{ ++ struct wpa_supplicant *pst_wpa = eloop_ctx; ++ wpa_msg(pst_wpa, MSG_ERROR, "WPA: pre-shared key may be incorrect"); ++ wpa_msg(pst_wpa, MSG_WARNING, WPA_EVENT_DISCONNECTED "- Disconnect event - remove keys"); ++} ++ ++void wapi_notify_wrong_msg(struct wpa_supplicant *pst_wpa) ++{ ++ if(NULL == pst_wpa) ++ { ++ wpa_printf(MSG_WARNING,"pst_wpa is null"); ++ return; ++ } ++ if(pst_wpa) { ++ /* Give some time for GUI to update current network id ++ * before we noitfy wrong psk message ++ */ ++ eloop_cancel_timeout(wapi_notify_handler, pst_wpa, NULL); ++ eloop_register_timeout(0, 200000, wapi_notify_handler, pst_wpa, NULL); ++ } ++} ++ ++int wapi_init_dlhandle(void ) ++{ ++ const char *dlerr = NULL; ++ ++ if(wapi_iface_dll_cb.dl_handle) ++ { ++ wpa_printf(MSG_ERROR,"WAPI LIB is already opened"); ++ return 0; ++ } ++ ++ dlerr = dlerror(); /* clear the last error. */ ++ ++ wpa_printf(MSG_INFO,"dlopen LIBWAPIPATH is %s", LIBWAPI_PATH); ++ wapi_iface_dll_cb.dl_handle = dlopen(LIBWAPI_PATH, RTLD_LAZY); ++ ++ dlerr = dlerror(); ++ wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wai_rx_packet, "wai_rx_packet"); ++ wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wapi_iface_funcs_init, "wapi_iface_funcs_init"); ++ wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wapi_cert_free_certificate, "wapi_cert_free_certificate"); ++ wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wai_cleanup_fragbuf, "wai_cleanup_fragbuf"); ++ //wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wapi_ecc_deinit_dlhandle, "wapi_ecc_deinit_dlhandle"); ++ wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wai_psk_derivation, "wai_psk_derivation"); ++ wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wapi_cert_parse_ecprivkey, "wapi_cert_parse_ecprivkey"); ++ wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wapi_cert_verify_certificate, "wapi_cert_verify_certificate"); ++ wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wapi_ecc192_verify_keygroup, "wapi_ecc192_verify_keygroup"); ++ wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wapi_cert_parse_certificate, "wapi_cert_parse_certificate"); ++ //wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.wapi_crypto_init_dlhandle, "wapi_crypto_init_dlhandle"); ++ ++ //wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.HMAC_SHA256, "HMAC_SHA256"); ++ wapi_get_func_from_dl(wapi_iface_dll_cb.dl_handle, wapi_iface_dll_cb.KD_HMAC_SHA256, "KD_HMAC_SHA256"); ++ ++ return 0; ++} ++int wapi_deinit_dlhandle(void) ++{ ++ if(NULL == wapi_iface_dll_cb.dl_handle) ++ { ++ wpa_printf(MSG_ERROR,"WAPI LIB is already closed!"); ++ return 0; ++ } ++ ++ dlclose(wapi_iface_dll_cb.dl_handle); ++ wapi_iface_dll_cb.dl_handle = NULL; ++ os_memset(&wapi_iface_dll_cb, 0, sizeof(wapi_iface_dll_cb)); ++ return 0; ++} ++ ++int32 wapi_call_back_init() ++ ++{ ++ struct wapi_iface_funcs_stru wapi_cb; ++ ++ ++ wpa_printf(MSG_ERROR,"wapi_call_back_init enter!"); ++ wapi_cb.base64_decode=base64_decode; ++ wapi_cb.eloop_cancel_timeout=eloop_cancel_timeout; ++ wapi_cb.eloop_register_timeout=eloop_register_timeout; ++ wapi_cb.l2_packet_send=l2_packet_send; ++ wapi_cb.os_mktime=os_mktime; ++ wapi_cb.os_zalloc=os_zalloc; ++ wapi_cb.os_get_random=os_get_random; ++ wapi_cb.wpabuf_put=wpabuf_put; ++ wapi_cb.wpabuf_put_u8=wpabuf_put_u8; ++ wapi_cb.wpabuf_put_be16=wpabuf_put_be16; ++ wapi_cb.wpabuf_put_data=wpabuf_put_data; ++ wapi_cb.wpabuf_put_buf=wpabuf_put_buf; ++ wapi_cb.wpabuf_alloc=wpabuf_alloc; ++ wapi_cb.wpabuf_free=wpabuf_free; ++ wapi_cb.wpabuf_alloc_ext_data=wpabuf_alloc_ext_data; ++#ifdef ANDROID ++ wapi_cb.__android_log_vprint=__android_log_vprint; ++#endif ++ wapi_cb.wpa_hexdump_ascii=wpa_hexdump_ascii; ++ wapi_cb.wpa_supplicant_set_state=wpa_supplicant_set_state; ++ wapi_cb.wpa_supplicant_deauthenticate=wpa_supplicant_deauthenticate; ++ wapi_cb.wpa_supplicant_cancel_auth_timeout=wpa_supplicant_cancel_auth_timeout; ++ wapi_cb.wapi_notify_wrong_msg=wapi_notify_wrong_msg; ++ ++ if(wapi_iface_dll_cb.wapi_iface_funcs_init(&wapi_cb)) ++ { ++ wpa_printf(MSG_ERROR, "wapi_iface_funcs_init fail"); ++ return -WAPI_FAILED; ++ } ++ return WAPI_SUCCESS; ++ ++ ++} ++ ++ ++ ++#ifdef __cplusplus ++ #if __cplusplus ++ } ++ #endif ++#endif ++ +diff --git a/wpa_supplicant/wapi/wapi.h b/wpa_supplicant/wapi/wapi.h +new file mode 100644 +index 0000000..c4af09f +--- /dev/null ++++ b/wpa_supplicant/wapi/wapi.h +@@ -0,0 +1,207 @@ ++/* ++ * Copyright (c) CompanyNameMagicTag. 2023-2023. All rights reserved. ++ * 文 件 名 : wapi.h ++ * 作 者 : CompanyName ++ * 生成日期 : 2023年1月11日 ++ * 功能描述 : wapi对应头文件 ++ */ ++ ++#ifndef __WAPI_H__ ++#define __WAPI_H__ ++ ++#ifdef __cplusplus ++#if __cplusplus ++extern "C" { ++#endif ++#endif ++ ++ ++/* ++ * 1 Other Header File Including ++ */ ++#include "common/wpa_common.h" ++#include "drivers/driver.h" ++#include "types.h" ++#include "wai_sm.h" /* for wai_state_enum */ ++ ++ ++/* ++ * 2 Macro Definition ++ */ ++#define ETH_TYPE_WAI 0x88B4 ++ ++#define wapi_get_func_from_dl(dl_handle, fun, fun_name) do{\ ++fun= dlsym(dl_handle, fun_name);\ ++ dlerr = dlerror();\ ++ if ((dlerr != NULL) || (NULL == fun))\ ++ {\ ++ wpa_printf(MSG_INFO,"dlsym %s failed,error is %s", fun_name, dlerr);\ ++ dlclose(dl_handle);\ ++ dl_handle = NULL;\ ++ dlerr = dlerror();\ ++ if (dlerr != NULL)\ ++ {\ ++ wpa_printf(MSG_INFO,"dlclose failed,error is %s", dlerr);\ ++ }\ ++ return -1;\ ++ }\ ++}while(0); ++ ++#if defined(__LP64__) ++#define LIBWAPI_PATH "/vendor/lib64/libwifi_wapi_hisi.so" ++#else ++#define LIBWAPI_PATH "/lib/libwifi_wapi.so" ++#endif ++ ++ ++ ++/* ++ * 3 Enum Type Definition ++ */ ++ ++ ++/* ++ * 4 Global Variable Declaring ++ */ ++ ++ ++/* ++ * 5 Message Header Definition ++ */ ++ ++ ++/* ++ * 6 Message Definition ++ */ ++ ++ ++/* ++ * 7 STRUCT Type Definition ++ */ ++struct wpa_supplicant; ++struct l2_packet_data; ++struct wpabuf; ++struct wpa_ie_data; ++struct wpa_bss; ++struct wpa_driver_associate_params; ++ ++typedef enum _auth_type_enum{ ++ AUTH_TYPE_NONE_WAPI = 0, /* no WAPI */ ++ AUTH_TYPE_WAPI_CERT, /* Certificate */ ++ AUTH_TYPE_WAPI_PSK /* Pre-PSK */ ++}auth_type_enum; ++ ++typedef enum { ++ KEY_TYPE_ASCII = 0, /* ascii */ ++ KEY_TYPE_HEX /* HEX */ ++}key_type_enum; ++ ++typedef enum { ++ CONN_ASSOC = 0, ++ CONN_DISASSOC ++}conn_status_enum; ++ ++ ++/* Pre-PSK */ ++typedef struct _auth_type_psk_stru{ ++ key_type_enum en_key_type; /* Pre-PSK: Key type */ ++ uint32 ul_key_length; /* Pre-PSK: key length */ ++ uint8 uc_key_val[128]; /* Pre-PSK: value */ ++}auth_type_psk_stru; ++ ++ ++ ++/* wapi ؽṹ */ ++struct wapi_supplicant_stru ++{ ++ struct wpa_supplicant *pst_wpa; ++ struct l2_packet_data *pst_wapi_l2; ++ ++ wai_state_enum en_state; ++ ++ struct wpabuf *pst_fragbuf; ++ uint16 us_nextframeseq; ++ uint8 uc_nextfragseq; ++ uint16 us_txframe_seq; ++ ++ uint8 auc_own_mac[ETH_ALEN]; ++ uint8 auc_bssid[ETH_ALEN]; ++ ++ uint8 auc_wapi_ie[WAPI_IE_MAX_SIZE]; ++ int32 uc_wapi_ie_len; ++ uint8 auc_assoc_wapi_ie[WAPI_IE_MAX_SIZE]; ++ int32 uc_assoc_wapi_ie_len; ++ ++ uint8 uc_wai_flag; ++ uint8 auc_next_authid[WAI_AUTH_ID_SIZE]; ++ ++ uint8 auc_bk_nasue[WAI_CHALLENGE_SIZE]; ++ uint8 auc_usk_nasue[WAI_CHALLENGE_SIZE]; ++ uint8 auc_usk_next_nae[WAI_CHALLENGE_SIZE]; ++ ++ uint8 auc_asue_pubkey[MAX_KEYDATA_SIZE]; ++ uint32 ul_asue_pubkey_len; ++ uint8 auc_asue_privkey[MAX_KEYDATA_SIZE]; ++ uint32 ul_asue_privkey_len; ++ uint8 auc_asue_cert_privkey[MAX_KEYDATA_SIZE]; ++ uint32 ul_asue_cert_privkey_len; ++ ++ cert_stru *pst_asue_cert; ++ cert_stru *pst_ae_cert; ++ cert_stru *pst_as_cert; ++ ++ uint8 auc_as_certfile[2048]; ++ uint32 ul_as_certfile_len; ++ uint8 auc_user_certfile[2048]; ++ uint32 ul_user_certfile_len; ++ ++ wapi_bksa_stru st_bksa; ++ wapi_usksa_stru st_usksa; ++ wapi_msksa_stru st_msksa; ++ ++ uint8 auc_addid[WAI_ADDID_SIZE]; /* ADDID( MAC || MAC ) */ ++ ++ auth_type_enum en_auth_type; ++ auth_type_psk_stru st_auth_psk_type; ++ ++ struct wpabuf *pst_tx_framebuf; ++ uint32 ul_tx_count; ++ ++ uint8 uc_bk[WAI_BK_SIZE]; ++ ++}; ++ ++/* ++ * 8 UNION Type Definition ++ */ ++ ++ ++/* ++ * 9 OTHERS Definition ++ */ ++ ++ ++/* ++ * 10 Function Declare ++ */ ++ ++int32 wapi_deinit_iface(struct wpa_supplicant* pst_wpa); ++int32 wapi_init_iface(struct wpa_supplicant* pst_wpa); ++int32 wapi_parse_wapi_ie(const uint8 *pauc_wapi_ie, uint32 ul_ie_len, struct wpa_ie_data *pst_ie_data ); ++void wapi_supplicant_deinit(struct wpa_supplicant *pst_wpa); ++void wapi_supplicant_init(struct wpa_supplicant *pst_wpa); ++int32 wapi_supplicant_event_assoc(struct wpa_supplicant *pst_wpa,struct wpa_bss *pst_bss, ++ struct wpa_ssid *pst_ssid, struct wpa_driver_associate_params *pst_params); ++int32 wapi_supplicant_event_disassoc(struct wpa_supplicant *pst_wpa,uint16 us_reason); ++int32 wapi_supplicant_event(struct wpa_supplicant *pst_wpa, enum wpa_event_type en_event,void *data); ++void wapi_notify_wrong_msg(struct wpa_supplicant *pst_wpa); ++int32 wapi_call_back_init(); ++int wapi_init_dlhandle(void ); ++ ++#ifdef __cplusplus ++ #if __cplusplus ++ } ++ #endif ++#endif ++ ++#endif /* end of wapi.h */ +diff --git a/wpa_supplicant/wpa_supplicant.c b/wpa_supplicant/wpa_supplicant.c +index d37a994..be0a56f 100644 +--- a/wpa_supplicant/wpa_supplicant.c ++++ b/wpa_supplicant/wpa_supplicant.c +@@ -69,6 +69,10 @@ + #include "ap/hostapd.h" + #endif /* CONFIG_MESH */ + ++#ifdef CONFIG_WAPI ++#include "wapi/wapi.h" /* for wapi_supplicant_init etc */ ++#endif /* CONFIG_WAPI */ ++ + const char *const wpa_supplicant_version = + "wpa_supplicant v" VERSION_STR "\n" + "Copyright (c) 2003-2022, Jouni Malinen and contributors"; +@@ -223,6 +227,16 @@ static void wpa_supplicant_timeout(void *eloop_ctx, void *timeout_ctx) + bssid = wpa_s->pending_bssid; + wpa_msg(wpa_s, MSG_INFO, "Authentication with " MACSTR " timed out.", + MAC2STR(bssid)); ++ ++#ifdef CONFIG_WAPI ++ if (wpa_s->wpa_state > WPA_ASSOCIATING && ++ (wpa_s->key_mgmt == WPA_KEY_MGMT_PSK || ++ wpa_s->key_mgmt == WPA_KEY_MGMT_WAPI_PSK || ++ wpa_s->key_mgmt == WPA_KEY_MGMT_WAPI_CERT)) { ++ wpa_msg(wpa_s, MSG_INFO, "WPA: 4-Way Handshake failed - " ++ "pre-shared key may be incorrect"); ++ } ++#endif + wpa_bssid_ignore_add(wpa_s, bssid); + wpa_sm_notify_disassoc(wpa_s->wpa); + wpa_supplicant_deauthenticate(wpa_s, WLAN_REASON_DEAUTH_LEAVING); +@@ -1192,7 +1206,15 @@ int wpa_supplicant_reload_configuration(struct wpa_supplicant *wpa_s) + */ + eapol_sm_notify_eap_success(wpa_s->eapol, false); + } ++#ifdef CONFIG_WAPI ++ if ((wpa_s->key_mgmt != WPA_KEY_MGMT_WAPI_PSK) && ++ (wpa_s->key_mgmt != WPA_KEY_MGMT_WAPI_CERT)) { ++#endif ++ + eapol_sm_notify_config(wpa_s->eapol, NULL, NULL); ++#ifdef CONFIG_WAPI ++ } ++#endif + wpa_sm_set_config(wpa_s->wpa, NULL); + wpa_sm_pmksa_cache_flush(wpa_s->wpa, NULL); + wpa_sm_set_fast_reauth(wpa_s->wpa, wpa_s->conf->fast_reauth); +@@ -1398,6 +1420,26 @@ int wpa_supplicant_set_suites(struct wpa_supplicant *wpa_s, + wpa_dbg(wpa_s, MSG_DEBUG, "RSN: using OSEN (within RSN)"); + proto = WPA_PROTO_RSN; + #endif /* CONFIG_HS20 */ ++#ifdef CONFIG_WAPI ++ } else if (((ssid->proto & WPA_PROTO_WAPI) || ++ (ssid->key_mgmt & (WPA_KEY_MGMT_WAPI_PSK | WPA_KEY_MGMT_WAPI_CERT))) && ++ (bss && wpa_bss_get_ie(bss, WLAN_EID_WAPI))) { ++ wpa_dbg(wpa_s, MSG_DEBUG, "WAPI: input proto:%x, key_mgmt:%x, group:%x, pairwise:%x", ++ ssid->proto, ssid->key_mgmt, ++ ssid->group_cipher, ssid->pairwise_cipher); ++ if (ssid->proto != WPA_PROTO_WAPI) { ++ ssid->proto = WPA_PROTO_WAPI; ++ } ++ ++ ssid->pairwise_cipher = ssid->group_cipher = WPA_CIPHER_SMS4; ++ ++ os_memset(&ie, 0, sizeof(ie)); ++ ie.proto = WPA_PROTO_WAPI; ++ ie.pairwise_cipher = ie.group_cipher = WPA_CIPHER_SMS4; ++ ie.key_mgmt = WPA_KEY_MGMT_WAPI_PSK | WPA_KEY_MGMT_WAPI_CERT; ++ wpa_msg(wpa_s, MSG_DEBUG, "WPA: using WAPI"); ++ proto = WPA_PROTO_WAPI; ++#endif + } else if (bss) { + wpa_msg(wpa_s, MSG_WARNING, "WPA: Failed to select WPA/RSN"); + wpa_dbg(wpa_s, MSG_DEBUG, +@@ -1440,6 +1482,10 @@ int wpa_supplicant_set_suites(struct wpa_supplicant *wpa_s, + proto = WPA_PROTO_OSEN; + else if (ssid->proto & WPA_PROTO_RSN) + proto = WPA_PROTO_RSN; ++#ifdef CONFIG_WAPI ++ else if (ssid->proto & WPA_PROTO_WAPI) ++ proto = WPA_PROTO_WAPI; ++#endif + else + proto = WPA_PROTO_WPA; + if (wpa_supplicant_suites_from_ai(wpa_s, ssid, &ie) < 0) { +@@ -1653,6 +1699,14 @@ int wpa_supplicant_set_suites(struct wpa_supplicant *wpa_s, + wpa_s->key_mgmt = WPA_KEY_MGMT_OWE; + wpa_dbg(wpa_s, MSG_DEBUG, "RSN: using KEY_MGMT OWE"); + #endif /* CONFIG_OWE */ ++#ifdef CONFIG_WAPI ++ } else if (sel & WPA_KEY_MGMT_WAPI_PSK) { ++ wpa_s->key_mgmt = WPA_KEY_MGMT_WAPI_PSK; ++ wpa_msg(wpa_s, MSG_DEBUG, "WPA: using KEY_MGMT WAPI-PSK"); ++ } else if (sel & WPA_KEY_MGMT_WAPI_CERT) { ++ wpa_s->key_mgmt = WPA_KEY_MGMT_WAPI_CERT; ++ wpa_msg(wpa_s, MSG_DEBUG, "WPA: using KEY_MGMT WAPI-CERT"); ++#endif + } else { + wpa_msg(wpa_s, MSG_WARNING, "WPA: Failed to select " + "authenticated key management type"); +@@ -1726,11 +1780,16 @@ int wpa_supplicant_set_suites(struct wpa_supplicant *wpa_s, + wpa_sm_set_param(wpa_s->wpa, WPA_PARAM_EXT_KEY_ID, 0); + wpa_sm_set_param(wpa_s->wpa, WPA_PARAM_USE_EXT_KEY_ID, 0); + } +- +- if (wpa_sm_set_assoc_wpa_ie_default(wpa_s->wpa, wpa_ie, wpa_ie_len)) { +- wpa_msg(wpa_s, MSG_WARNING, "WPA: Failed to generate WPA IE"); +- return -1; ++#ifdef CONFIG_WAPI ++ if (proto != WPA_PROTO_WAPI) { ++#endif ++ if (wpa_sm_set_assoc_wpa_ie_default(wpa_s->wpa, wpa_ie, wpa_ie_len)) { ++ wpa_msg(wpa_s, MSG_WARNING, "WPA: Failed to generate WPA IE"); ++ return -1; ++ } ++#ifdef CONFIG_WAPI + } ++#endif + + wpa_s->rsnxe_len = sizeof(wpa_s->rsnxe); + if (wpa_sm_set_assoc_rsnxe_default(wpa_s->wpa, wpa_s->rsnxe, +@@ -3024,6 +3083,17 @@ static u8 * wpas_populate_assoc_ies( + params->wps = WPS_MODE_OPEN; + wpa_s->wpa_proto = 0; + #endif /* CONFIG_WPS */ ++#ifdef CONFIG_WAPI ++ } else if (ssid->key_mgmt & (WPA_KEY_MGMT_WAPI_PSK | WPA_KEY_MGMT_WAPI_CERT)) { ++ wpa_ie_len = max_wpa_ie_len; ++ wpa_dbg(wpa_s, MSG_DEBUG, "wpas_start_assoc_cb::set wapi"); ++ if (ssid->passphrase) ++ { ++ ssid->psk_set = 0; ++ wpa_dbg(wpa_s, MSG_DEBUG, "wpas_start_assoc_cb::wapi set passphrase, clear psk_set to 0."); ++ } ++ wpa_supplicant_set_suites(wpa_s, bss, ssid, wpa_ie, &wpa_ie_len); ++#endif + } else { + wpa_supplicant_set_non_wpa_policy(wpa_s, ssid); + wpa_ie_len = 0; +@@ -3141,6 +3211,11 @@ static u8 * wpas_populate_assoc_ies( + else + wpa_drv_get_ext_capa(wpa_s, WPA_IF_STATION); + ++#ifdef CONFIG_WAPI ++ if (ssid->key_mgmt & (WPA_KEY_MGMT_WAPI_PSK | WPA_KEY_MGMT_WAPI_CERT)) { ++ wpa_printf(MSG_INFO, "wapi associate,ignore this extended capabilities ie."); ++ } else { ++#endif + if (!bss || wpa_bss_get_ie(bss, WLAN_EID_EXT_CAPAB)) { + u8 ext_capab[18]; + int ext_capab_len; +@@ -3157,6 +3232,9 @@ static u8 * wpas_populate_assoc_ies( + os_memcpy(pos, ext_capab, ext_capab_len); + } + } ++#ifdef CONFIG_WAPI ++ } ++#endif + + #ifdef CONFIG_HS20 + if (is_hs20_network(wpa_s, ssid, bss)) { +@@ -3947,6 +4025,23 @@ static void wpas_start_assoc_cb(struct wpa_radio_work *work, int deinit) + else + params.uapsd = -1; + ++#ifdef CONFIG_WAPI ++ if (ssid->key_mgmt & (WPA_KEY_MGMT_WAPI_PSK | WPA_KEY_MGMT_WAPI_CERT)) { ++ params.drop_unencrypted = 0; ++ if (0 != wapi_supplicant_event_assoc(wpa_s, bss, ssid, ¶ms)) { ++ wpa_printf(MSG_ERROR,"wapi_supplicant_event_assoc fail,now disassociate"); ++ wpa_supplicant_deauthenticate(wpa_s, 15); ++ return; ++ } ++ old_ssid = wpa_s->current_ssid; ++ wpa_s->current_ssid = ssid; ++ wpa_s->current_bss = bss; ++ if (old_ssid != wpa_s->current_ssid) ++ wpas_notify_network_changed(wpa_s); ++ return; ++ } ++#endif ++ + #ifdef CONFIG_HT_OVERRIDES + os_memset(&htcaps, 0, sizeof(htcaps)); + os_memset(&htcaps_mask, 0, sizeof(htcaps_mask)); +@@ -4091,7 +4186,14 @@ static void wpa_supplicant_clear_connection(struct wpa_supplicant *wpa_s, + old_ssid = wpa_s->current_ssid; + wpa_supplicant_mark_disassoc(wpa_s); + wpa_sm_set_config(wpa_s->wpa, NULL); +- eapol_sm_notify_config(wpa_s->eapol, NULL, NULL); ++#ifdef CONFIG_WAPI ++ if (wpa_s->key_mgmt != WPA_KEY_MGMT_WAPI_PSK && ++ wpa_s->key_mgmt != WPA_KEY_MGMT_WAPI_CERT) { ++#endif ++ eapol_sm_notify_config(wpa_s->eapol, NULL, NULL); ++#ifdef CONFIG_WAPI ++ } ++#endif + if (old_ssid != wpa_s->current_ssid) + wpas_notify_network_changed(wpa_s); + +@@ -4168,6 +4270,12 @@ void wpa_supplicant_deauthenticate(struct wpa_supplicant *wpa_s, + if (zero_addr) + addr = NULL; + } ++#ifdef CONFIG_WAPI ++ if (wpa_s->key_mgmt == WPA_KEY_MGMT_WAPI_PSK || ++ wpa_s->key_mgmt == WPA_KEY_MGMT_WAPI_CERT) { ++ wapi_supplicant_event_disassoc(wpa_s, reason_code); ++ } ++#endif + + wpa_supplicant_clear_connection(wpa_s, addr); + } +@@ -5289,7 +5397,9 @@ int wpa_supplicant_driver_init(struct wpa_supplicant *wpa_s) + + if (wpa_supplicant_update_mac_addr(wpa_s) < 0) + return -1; +- ++#ifdef CONFIG_WAPI ++ wapi_supplicant_init(wpa_s); ++#endif + wpa_dbg(wpa_s, MSG_DEBUG, "Own MAC address: " MACSTR, + MAC2STR(wpa_s->own_addr)); + os_memcpy(wpa_s->perm_addr, wpa_s->own_addr, ETH_ALEN); +@@ -6554,6 +6664,11 @@ static int wpa_supplicant_init_iface(struct wpa_supplicant *wpa_s, + iface->ctrl_interface ? iface->ctrl_interface : "N/A", + iface->bridge_ifname ? iface->bridge_ifname : "N/A"); + ++#ifdef CONFIG_WAPI ++ if (NULL != strstr(wpa_s->ifname, "wlan")) { ++ wpa_s->pst_wapi = NULL; ++ } ++#endif + if (iface->confname) { + #ifdef CONFIG_BACKEND_FILE + wpa_s->confname = os_rel2abs_path(iface->confname); +@@ -6744,6 +6859,15 @@ static int wpa_supplicant_init_iface(struct wpa_supplicant *wpa_s, + if (wpa_s->max_remain_on_chan == 0) + wpa_s->max_remain_on_chan = 1000; + ++#ifdef CONFIG_WAPI ++ if (NULL != strstr(wpa_s->ifname, "wlan0")) { ++ wpa_msg(wpa_s, MSG_DEBUG, "wapi iface %s init! ", wpa_s->ifname); ++ if (wapi_init_dlhandle()|| wapi_call_back_init()||wapi_init_iface(wpa_s)) { ++ return -1; ++ } ++ } ++#endif ++ + /* + * Only take p2p_mgmt parameters when P2P Device is supported. + * Doing it here as it determines whether l2_packet_init() will be done +@@ -6832,8 +6956,8 @@ static int wpa_supplicant_init_iface(struct wpa_supplicant *wpa_s, + } + + if ((!(wpa_s->drv_flags & WPA_DRIVER_FLAGS_DEDICATED_P2P_DEVICE) || +- wpa_s->p2p_mgmt) && +- wpas_p2p_init(wpa_s->global, wpa_s) < 0) { ++ wpa_s->p2p_mgmt) && ++ wpas_p2p_init(wpa_s->global, wpa_s) < 0) { + wpa_msg(wpa_s, MSG_ERROR, "Failed to init P2P"); + return -1; + } +@@ -6909,6 +7033,9 @@ static void wpa_supplicant_deinit_iface(struct wpa_supplicant *wpa_s, + { + struct wpa_global *global = wpa_s->global; + struct wpa_supplicant *iface, *prev; ++#ifdef CONFIG_WAPI ++ int rst = 0; ++#endif + + if (wpa_s == wpa_s->parent) + wpas_p2p_group_remove(wpa_s, "*"); +@@ -6949,6 +7076,12 @@ static void wpa_supplicant_deinit_iface(struct wpa_supplicant *wpa_s, + } + + wpa_supplicant_cleanup(wpa_s); ++#ifdef CONFIG_WAPI ++ if(NULL != strstr(wpa_s->ifname, "wlan0")) { ++ rst = wapi_deinit_iface(wpa_s); ++ wpa_msg(wpa_s, MSG_DEBUG, "wapi iface %s deinit! rst=%d ", wpa_s->ifname, rst); ++ } ++#endif + wpas_p2p_deinit_iface(wpa_s); + + wpas_ctrl_radio_work_flush(wpa_s); +@@ -7524,6 +7657,10 @@ void wpa_supplicant_deinit(struct wpa_global *global) + + eloop_destroy(); + ++#ifdef CONFIG_WAPI ++ wapi_supplicant_deinit(global->ifaces); ++#endif ++ + if (global->params.pid_file) { + os_daemonize_terminate(global->params.pid_file); + os_free(global->params.pid_file); +diff --git a/wpa_supplicant/wpa_supplicant_i.h b/wpa_supplicant/wpa_supplicant_i.h +index 8bb8672..d49f718 100644 +--- a/wpa_supplicant/wpa_supplicant_i.h ++++ b/wpa_supplicant/wpa_supplicant_i.h +@@ -717,6 +717,9 @@ struct wpa_supplicant { + const void *binder_object_key; + #endif /* CONFIG_CTRL_IFACE_BINDER */ + char bridge_ifname[16]; ++#ifdef CONFIG_WAPI ++ struct wapi_supplicant_stru *pst_wapi; ++#endif /* CONFIG_WAPI */ + + char *confname; + char *confanother; +-- +2.17.1 + diff --git a/bsp/meta-hisilicon/recipes-connectivity/wpa-supplicant/wpa-supplicant_%.bbappend b/bsp/meta-hisilicon/recipes-connectivity/wpa-supplicant/wpa-supplicant_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..ceca3e9df147d4f6e64ecc07d5eb6f221bc8dc55 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-connectivity/wpa-supplicant/wpa-supplicant_%.bbappend @@ -0,0 +1,25 @@ +# baseline: yocto-meta-openeuler/meta-openeuler/recipes-connectivity/wpa-supplicant/wpa-supplicant_%.bbappend + +FILESEXTRAPATHS:prepend := "${THISDIR}/files/:" + +# apply source package in openeuler +SRC_URI:prepend = " \ + file://patch-wpa_supplicant-for-wifi.patch \ +" + +# patch for wifi +do_configure:append() { + pushd ${S}/wpa_supplicant + cp defconfig .config + sed -i "s/CONFIG_CTRL_IFACE_DBUS_NEW=y/#CONFIG_CTRL_IFACE_DBUS_NEW=y/g" .config + sed -i "s/CONFIG_CTRL_IFACE_DBUS_INTRO=y/#CONFIG_CTRL_IFACE_DBUS_INTRO=y/g" .config + sed -i "s/#CONFIG_IEEE80211AX=y/CONFIG_IEEE80211AX=y/g" .config + sed -i "s/#CONNECTIVITY_SET_P2P_IE_PATCH=y/CONNECTIVITY_SET_P2P_IE_PATCH=y/g" .config + sed -i "s/#CONNECTIVITY_SINGLE_VAP_PATCH=y/CONNECTIVITY_SINGLE_VAP_PATCH=y/g" .config + sed -i "s/#CONNECTIVITY_LOG_PATCH=y/CONNECTIVITY_LOG_PATCH=y/g" .config + sed -i "s/#CONFIG_WEP=y/CONFIG_WEP=y/g" .config + sed -i "s/#CONFIG_OWE=y/CONFIG_OWE=y/g" .config + sed -i "s/#CONFIG_ROAM_EXTRA_SUPPORT=y/CONFIG_ROAM_EXTRA_SUPPORT=y/g" .config + popd +} + diff --git a/bsp/meta-hisilicon/recipes-containers/kubeedge/kubeedge_%.bbappend b/bsp/meta-hisilicon/recipes-containers/kubeedge/kubeedge_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..7f4a8a1570d085a564a3d385c259121fa8d3b0b8 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-containers/kubeedge/kubeedge_%.bbappend @@ -0,0 +1,6 @@ +# since in hieulerpi1's kernel, we previously add the crc32c module +# into the kernel image, we do not need to add it to the rootfs +# as a seperate module. +RDEPENDS:edgecore:remove = " \ + kernel-module-libcrc32c \ +" \ No newline at end of file diff --git a/bsp/meta-hisilicon/recipes-core/busybox/busybox_%.bbappend b/bsp/meta-hisilicon/recipes-core/busybox/busybox_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..c8801f6441ab3f691a1232b0508181784812f4a3 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/busybox/busybox_%.bbappend @@ -0,0 +1,5 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files/:" + +SRC_URI:append = " \ + file://devmem.cfg \ +" diff --git a/bsp/meta-hisilicon/recipes-core/busybox/files/devmem.cfg b/bsp/meta-hisilicon/recipes-core/busybox/files/devmem.cfg new file mode 100644 index 0000000000000000000000000000000000000000..174a3f2030123ef1e857670dfd6fe322135b3a30 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/busybox/files/devmem.cfg @@ -0,0 +1 @@ +CONFIG_DEVMEM=y diff --git a/bsp/meta-hisilicon/recipes-core/device_sample/device-sample_0.0.0.bb b/bsp/meta-hisilicon/recipes-core/device_sample/device-sample_0.0.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..ee181f3020866049475303af271ce9686df20030 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/device_sample/device-sample_0.0.0.bb @@ -0,0 +1,40 @@ +SUMMARY = "hieuler device sample" +DESCRIPTION = "device samples of hieulerpi" +HOMEPAGE = "https://gitee.com/HiEuler/externed_device_sample" +LICENSE = "CLOSED" + +inherit pkgconfig + +OPENEULER_LOCAL_NAME = "externed_device_sample" + +SRC_URI = " \ + file://HiEuler-driver/drivers/lib.tar.gz \ + file://HiEuler-driver/drivers/include.tar.gz \ + file://externed_device_sample \ +" + +S = "${WORKDIR}" + +do_compile:prepend () { + rm -rf ${S}/externed_device_sample/mpp/out + mkdir -p ${S}/externed_device_sample/mpp/out + cp -r -P ${WORKDIR}/lib ${S}/externed_device_sample/mpp/out/ + cp -r -P ${WORKDIR}/include ${S}/externed_device_sample/mpp/out/ +} + +do_compile () { + pushd externed_device_sample + oe_runmake + popd +} + +do_install () { + install -d ${D}/root/ + cp -r externed_device_sample/output ${D}/root/device_sample +} + +FILES:${PN} = " \ + /root/device_sample \ +" + +INSANE_SKIP:${PN} += "already-stripped" diff --git a/bsp/meta-hisilicon/recipes-core/images/bsp-hi3093.inc b/bsp/meta-hisilicon/recipes-core/images/bsp-hi3093.inc new file mode 100644 index 0000000000000000000000000000000000000000..0150b47d1c4d53387f381325328e7b96a9637f07 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/bsp-hi3093.inc @@ -0,0 +1,4 @@ +# add bsp depends here, should use for all images(tiny, standard, etc) + +IMAGE_INSTALL:append = " \ +" diff --git a/bsp/meta-hisilicon/recipes-core/images/bsp-hieulerpi1.inc b/bsp/meta-hisilicon/recipes-core/images/bsp-hieulerpi1.inc new file mode 100644 index 0000000000000000000000000000000000000000..a2c05ac3a2b0fa14f5aa4dd99a6d2b546564402b --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/bsp-hieulerpi1.inc @@ -0,0 +1,8 @@ +# add bsp depends here, should use for all images(tiny, standard, etc) + +IMAGE_INSTALL:append = " \ +hieulerpi1-tf-a \ +hieulerpi1-bsp-pkg \ +i2c-soft \ +mcu-tool \ +" diff --git a/bsp/meta-hisilicon/recipes-core/images/hi3093.inc b/bsp/meta-hisilicon/recipes-core/images/hi3093.inc new file mode 100644 index 0000000000000000000000000000000000000000..63a7b121abdf21c7d38e638d2ea826e1d13afcda --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/hi3093.inc @@ -0,0 +1,4 @@ +# ref: openeuler-image-common.inc require recipes-core/images/${MACHINE}.inc + +# not add special code here, it is also used by inirtd-boot for live image +# you can add common code here diff --git a/bsp/meta-hisilicon/recipes-core/images/hieulerpi1.inc b/bsp/meta-hisilicon/recipes-core/images/hieulerpi1.inc new file mode 100644 index 0000000000000000000000000000000000000000..930506c150151668f417bcda0cf5f572c084342f --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/hieulerpi1.inc @@ -0,0 +1,23 @@ +delete_unneeded_from_rootfs() { + set -x + test -d "${OUTPUT_DIR}" || mkdir -p "${OUTPUT_DIR}" + rm -rf "${OUTPUT_DIR}"/* + cd "${IMAGE_ROOTFS}" + cp -r boot/* "${OUTPUT_DIR}" + # just need the boot dir, others in boot are not needed to reduce the size of image. + rm -rf ./boot/* + cd - + set +x +} +IMAGE_PREPROCESS_COMMAND += "delete_unneeded_from_rootfs;" + +copy_928_distro() { + set -x + for IMAGETYPE in ${IMAGE_FSTYPES} + do + rm -f "${OUTPUT_DIR}"/${IMAGE_NAME}${IMAGE_NAME_SUFFIX%.rootfs}.*${IMAGETYPE} + cp -fp ${IMGDEPLOYDIR}/${IMAGE_NAME}${IMAGE_NAME_SUFFIX%.rootfs}.*${IMAGETYPE} ${OUTPUT_DIR}/ + done + set +x +} +IMAGE_POSTPROCESS_COMMAND += "copy_928_distro;" diff --git a/bsp/meta-hisilicon/recipes-core/images/image-early-config-hi3093.inc b/bsp/meta-hisilicon/recipes-core/images/image-early-config-hi3093.inc new file mode 100644 index 0000000000000000000000000000000000000000..43922ad6c6dd9df824d2bb3a4cc2b86dd7f1a486 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/image-early-config-hi3093.inc @@ -0,0 +1,12 @@ +# This file should only be referenced by openeuler-image for customizing early configuration at the image level +# ref: meta-openeuler/recipes-core/images/openeuler-image.bb: +# line 0 | include recipes-core/images/image-early-config-${MACHINE}.inc +# line 1 | require openeuler-image-common.inc + +IMAGE_FSTYPES = "${@bb.utils.contains("DISTRO_FEATURES", "mpu_solution", " ext4 live cpio.gz ", " cpio.gz ", d)}" +INITRD_IMAGE_LIVE = "initrd-boot" + +IMAGE_ROOTFS_SIZE = "387072" + +IMAGE_FSTYPES:remove = "iso" +IMAGE_FSTYPES_DEBUGFS = "cpio.gz" diff --git a/bsp/meta-hisilicon/recipes-core/images/image-early-config-hieulerpi1.inc b/bsp/meta-hisilicon/recipes-core/images/image-early-config-hieulerpi1.inc new file mode 100644 index 0000000000000000000000000000000000000000..2448cc6736d4ae0c7ec8a876bba6df1baa6432be --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/image-early-config-hieulerpi1.inc @@ -0,0 +1,8 @@ +# This file should only be referenced by openeuler-image for customizing early configuration at the image level +# ref: meta-openeuler/recipes-core/images/openeuler-image.bb: +# line 0 | include recipes-core/images/image-early-config-${MACHINE}.inc +# line 1 | require openeuler-image-common.inc + +IMAGE_FSTYPES = "ext4" +IMAGE_FSTYPES:remove = "iso" +IMAGE_FSTYPES_DEBUGFS = "cpio.gz" diff --git a/bsp/meta-hisilicon/recipes-core/images/image-hi3093.inc b/bsp/meta-hisilicon/recipes-core/images/image-hi3093.inc new file mode 100644 index 0000000000000000000000000000000000000000..469ce4f80db54edd2960cc8fd922b204c83c7e0f --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/image-hi3093.inc @@ -0,0 +1,75 @@ +# This file should be included in openeuler-image.bbappend, openeuler-image-ros.bbappend, etc. +# diff from ${MACHINE}.inc, it shoud not include by live image + +require ${@bb.utils.contains("DISTRO_FEATURES", "mpu_solution", "pack-hi3093.inc", "recipes-core/images/qemu.inc", d)} +require recipes-core/images/bsp-${MACHINE}.inc + +DEPENDS:append = "${@bb.utils.contains("DISTRO_FEATURES", "mpu_solution", " signtools-hi3093 u-boot-emmc ", "", d)}" + +# too large for hhi3093 emmc +IMAGE_INSTALL:remove = " \ +packagegroup-isulad \ +packagegroup-dsoftbus \ +" + +# note, these modules form 3093 bsp not release now: +# * kernel-module-sol-drv +# * kernel-module-ddrc-drv +# * kernel-module-virtual-usb-device +# * kernel-module-kcs-drv +# * kernel-module-p80-drv +# * kernel-module-cdev-veth-drv +# * kernel-module-physmap-1711 +# * kernel-module-edma-drv +# * kernel-module-ipmb-drv +# * kernel-module-sys-info-drv +# * kernel-module-mctp-drv +# * kernel-module-vce-drv +# * kernel-module-efuse-drv +# * kernel-module-efuse_drv-user-def-uds +# * kernel-module-hi-can +# * kernel-module-wdi-drv +# * kernel-module-bt-drv +# * kernel-module-djtag-drv +IMAGE_INSTALL += " \ +${@bb.utils.contains("DISTRO_FEATURES", "mpu_solution", " \ + packagegroup-bsp-deps \ + imagetools-hi3093 \ + bootfile \ + kernel-module-dboot-drv \ + kernel-module-gpio-drv \ + kernel-module-mmc-block \ + kernel-module-mmc-core \ + kernel-module-emmc-drv \ + kernel-module-sdio-drv \ + kernel-module-bmcrtc-drv \ + kernel-module-hw-lock-drv \ + kernel-module-log-drv \ + kernel-module-uart-drv \ + kernel-module-hitimer-drv \ + kernel-module-peci-drv \ + kernel-module-watchdog-drv \ + kernel-module-ksecurec \ + kernel-module-msg-scm3-drv \ + kernel-module-localbus-drv \ + kernel-module-spi-drv \ + kernel-module-uartconnect-drv \ + kernel-module-trng-drv \ + kernel-module-pci-fix-drv \ + kernel-module-adc-drv \ + kernel-module-pcie-hisi02-drv \ + kernel-module-sfc0-drv \ + kernel-module-sfc1-drv \ + kernel-module-udc-core \ + kernel-module-mdio-drv \ + kernel-module-i2c-drv \ + kernel-module-comm-drv \ + kernel-module-gmac-drv \ + kernel-module-pwm-drv \ + kernel-module-devmem-drv \ + kernel-module-configfs \ + kernel-module-usb-drv \ + kernel-module-libcomposite \ + kernel-module-dwc3 \ + kernel-module-usb-common \ +", "", d)}" diff --git a/bsp/meta-hisilicon/recipes-core/images/image-hieulerpi1.inc b/bsp/meta-hisilicon/recipes-core/images/image-hieulerpi1.inc new file mode 100644 index 0000000000000000000000000000000000000000..22b616ba749844640058917b86a3e20135c863cc --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/image-hieulerpi1.inc @@ -0,0 +1,74 @@ +# This file should be included in openeuler-image.bbappend, openeuler-image-ros.bbappend, etc. +# diff from ${MACHINE}.inc, it should not be included in live image + +require recipes-core/images/bsp-${MACHINE}.inc + +# all app and tools +IMAGE_INSTALL += " \ +wpa-supplicant \ +v4l-utils \ +hostapd \ +hieulerpi1-user-driver \ +bluez5 \ +device-sample \ +" + +# add related packages for ros +IMAGE_INSTALL += " \ +${@bb.utils.contains("DISTRO_FEATURES", "ros", " \ +ai-demolib \ +mipi-ffmpeglib \ +object-node \ +gst-node \ +pose-srv-node \ +robot-det-node \ +robot-localization \ +joint-state-publisher \ +astra-camera-msgs \ +astra-camera-raw \ +depth-image \ +fitxxx \ +imu-calib \ +lsm10-v2 \ +serial-imu \ +sllidar-ros2 \ +wr-ls-udp \ +ydlidar-ros2-driver \ +frame-relationship \ +hirobot-cartographer \ +costmap-converter \ +costmap-converter-msgs \ +teb-local-planner \ +teb-msgs \ +barcode-interface \ +barcode-node \ +camera \ +mipi-camera \ +zxing \ +astra-camera \ +dsp-bin \ +depth-mini-seg \ +get-pose-msg \ +hirobot-base \ +hirobot-bringup \ +hirobot-depth-camera \ +hirobot-description \ +hirobot-get-goal-clear \ +hirobot-goal-process \ +hirobot-msgs \ +hirobot-navigation2-teb \ +hirobot-tof-plane-seg \ +person-position-ack \ +robot-charge-control \ +robot-init-pose \ +robot-bringup \ +ros2-hieuler-robot \ +hieuler-teleop \ +serial \ +ros2-nearlink-robot \ +depth-image-proc \ +depthimage-to-laserscan \ +dtof-client-node \ +dtof-node \ +hirobot-description \ +", "", d)}" diff --git a/bsp/meta-hisilicon/recipes-core/images/imagetools-hi3093.bb b/bsp/meta-hisilicon/recipes-core/images/imagetools-hi3093.bb new file mode 100644 index 0000000000000000000000000000000000000000..76f5eba7f956139b85ba0666875d228dff51dc78 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/imagetools-hi3093.bb @@ -0,0 +1,29 @@ +SUMMARY = "hi3093 image tools" +LICENSE = "CLOSED" + +SRC_URI = " \ + file://mpu_solution/build/build_fs \ + file://mpu_solution/tools/coremsg \ +" + +S = "${WORKDIR}/mpu_solution/tools/coremsg" + +EXTRA_OEMAKE="CROSS_COMPILE=${TARGET_PREFIX}" + +do_configure() { +} + +do_install() { + install -d ${D}/tools-tmp + install -d ${D}/tools-tmp/bin + install -m 744 ${S}/coremsg ${D}/tools-tmp/bin + install -m 744 ${WORKDIR}/mpu_solution/build/build_fs/init ${D}/tools-tmp + install -m 644 ${WORKDIR}/mpu_solution/build/build_fs/hi3093_init.sh ${D}/tools-tmp + install -m 644 ${WORKDIR}/mpu_solution/build/build_fs/hi3093_upgrade.sh ${D}/tools-tmp + install -m 644 ${WORKDIR}/mpu_solution/build/build_fs/link_emmc_devs ${D}/tools-tmp +} + +FILES:${PN} += "/tools-tmp" + +INHIBIT_PACKAGE_STRIP = "1" +INHIBIT_SYSROOT_STRIP = "1" diff --git a/bsp/meta-hisilicon/recipes-core/images/imagetools-sfc-hi3093.bb b/bsp/meta-hisilicon/recipes-core/images/imagetools-sfc-hi3093.bb new file mode 100644 index 0000000000000000000000000000000000000000..aee4c6858c79963bbf250e5dc0c002e9687631a2 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/imagetools-sfc-hi3093.bb @@ -0,0 +1,23 @@ +SUMMARY = "hi3093 image tools" +LICENSE = "CLOSED" + +SRC_URI = " \ + file://mpu_solution/tools/emmc_divide \ +" + +S = "${WORKDIR}/mpu_solution/tools/emmc_divide" + +EXTRA_OEMAKE="CROSS_COMPILE=${TARGET_PREFIX}" + +do_configure() { +} + +do_install() { + install -d ${D}/tools-tmp-sfc + install -m 744 ${S}/emmc_divide ${D}/tools-tmp-sfc +} + +FILES:${PN} += "/tools-tmp-sfc" + +INHIBIT_PACKAGE_STRIP = "1" +INHIBIT_SYSROOT_STRIP = "1" diff --git a/bsp/meta-hisilicon/recipes-core/images/initrd-boot.bb b/bsp/meta-hisilicon/recipes-core/images/initrd-boot.bb new file mode 100644 index 0000000000000000000000000000000000000000..a55a9fd45403e49b3e9655b991e85ce24ff67d7c --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/initrd-boot.bb @@ -0,0 +1,79 @@ +# no host package +TOOLCHAIN_HOST_TASK = "" + +SUMMARY = "Simple initramfs image. Mostly used for live images" + +# we want a non systemd init manager, packagegroup-core-boot-live is for it. +VIRTUAL-RUNTIME_base-utils = "packagegroup-core-boot-live" +PACKAGE_INSTALL = " \ + ${VIRTUAL-RUNTIME_base-utils} \ + base-passwd \ + ${ROOTFS_BOOTSTRAP_INSTALL} \ + packagegroup-kernel-modules \ + imagetools-hi3093 \ + kernel-module-ksecurec \ + kernel-module-log-drv \ + kernel-module-comm-drv \ + kernel-module-mdio-drv \ + kernel-module-msg-scm3-drv \ + kernel-module-usb-common \ + kernel-module-udc-core \ + kernel-module-configfs \ + kernel-module-libcomposite \ + kernel-module-usb-drv \ + kernel-module-dwc3 \ + kernel-module-hw-lock-drv \ + kernel-module-mmc-core \ + kernel-module-mmc-block \ + kernel-module-emmc-drv \ + kernel-module-sdio-drv \ + kernel-module-localbus-drv \ + kernel-module-devmem-drv \ + glib-2.0 \ + libpcre2 \ + libtirpc \ + readline \ + ncurses-dev \ +" + +export IMAGE_BASENAME = "initrd-boot" + +IMAGE_FSTYPES = "cpio.gz" +IMAGE_FSTYPES_DEBUGFS = "cpio.gz" + +# make install or nologin when using busybox-inittab +set_permissions_from_rootfs:append() { + cd "${IMAGE_ROOTFS}" + if [ -e ./etc/inittab ];then + sed -i "s#respawn:/sbin/getty.*#respawn:-/bin/sh#g" ./etc/inittab + mkdir -p ./mnt/newroot + + if [ -d ./tools-tmp ];then + cp -f ./tools-tmp/init ./init + cp -f ./tools-tmp/bin/* ./bin + rm -rf ./tools-tmp + fi + + rm -f ./linuxrc || true + rm -f ./usr/sbin/grub* || true + + if [ -d ./lib/modules/hi3093 ];then + mkdir -p ./lib/net + mv ./lib/modules/hi3093/* ./lib/net + fi + + dels="./usr/lib64/grub ./boot ./usr/bin ./usr/games ./usr/include ./usr/lib ./usr/libexec ./usr/share ./lib/depmod.d ./lib/modprobe.d ./lib/modules ./opt" + for dird in $dels + do + if [ -d $dird ];then + rm -rf $dird + fi + done + + fi + + cd - +} + +IMAGE_FEATURES:append = " empty-root-password" +require recipes-core/images/openeuler-image-common.inc diff --git a/bsp/meta-hisilicon/recipes-core/images/openeuler-container-os.bbappend b/bsp/meta-hisilicon/recipes-core/images/openeuler-container-os.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..8b12cfcc0e479fb1642dc6a9c6ebb542e9a1da5c --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/openeuler-container-os.bbappend @@ -0,0 +1,6 @@ +require recipes-core/images/bsp-${MACHINE}.inc + +# we need to manually resize the hieulerpi to use the full sdcard +IMAGE_INSTALL += " \ + e2fsprogs-resize2fs \ +" diff --git a/bsp/meta-hisilicon/recipes-core/images/openeuler-image-tiny.bbappend b/bsp/meta-hisilicon/recipes-core/images/openeuler-image-tiny.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..6645f24e865c9134e13f5a5c1dcee822b11e6561 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/openeuler-image-tiny.bbappend @@ -0,0 +1 @@ +require recipes-core/images/bsp-${MACHINE}.inc diff --git a/bsp/meta-hisilicon/recipes-core/images/openeuler-image.bbappend b/bsp/meta-hisilicon/recipes-core/images/openeuler-image.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..dac2e55b8822d7b5cb3511029573eb6d00b9889c --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/openeuler-image.bbappend @@ -0,0 +1 @@ +require recipes-core/images/image-${MACHINE}.inc diff --git a/bsp/meta-hisilicon/recipes-core/images/pack-hi3093.inc b/bsp/meta-hisilicon/recipes-core/images/pack-hi3093.inc new file mode 100644 index 0000000000000000000000000000000000000000..b3291cb8e351e6a6557ff82f7c90d46e41d83e04 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/pack-hi3093.inc @@ -0,0 +1,49 @@ +make_boot_intrd() { + set -x + test -d "${OUTPUT_DIR}" || mkdir -p "${OUTPUT_DIR}" + rm -rf "${OUTPUT_DIR}"/* + cd "${IMAGE_ROOTFS}" + if [ -d ./tools-tmp ];then + cp -f ./tools-tmp/bin/* ./bin + cp -f ./tools-tmp/hi3093_init.sh ./ + cp -f ./tools-tmp/hi3093_upgrade.sh ./ + cp -f ./tools-tmp/link_emmc_devs ./ + rm -rf ./tools-tmp + fi + cp -fp ./boot/zImage ${OUTPUT_DIR}/ || true + rm -f ./boot/Image* || true + rm -f ./boot/zImage* || true + rm -f ./boot/vmlinux* || true + cp -f ${DEPLOY_DIR_IMAGE}/${INITRD_IMAGE_LIVE}*rootfs.cpio.gz ./boot/initrd_boot.cpio.gz + cd - + set +x +} +IMAGE_PREPROCESS_COMMAND:append = "make_boot_intrd;" + +sign_copy_distro_3093() { + set -x + cd ${WORKDIR}/recipe-sysroot/signtools/build_sign + EXT4CMS_FILE="Hi3093_ext4fs_cms.bin" + EXT4_TARGET_BIN="Hi3093_ext4fs.img" + if [ -e ${EXT4CMS_FILE} ]; then + rm Hi3093_ext4fs_cms.bin + rm Hi3093_ext4fs.img + rm Hi3093_ext4fs.img.g1.cms + rm Hi3093_ext4fs.img.g2.cms + rm crldata_g1.crl + fi + cp -fp ${IMGDEPLOYDIR}/${IMAGE_NAME}${IMAGE_NAME_SUFFIX%.rootfs}.*ext4 ${EXT4_TARGET_BIN} + echo "Hi3093" >> Hi3093_ext4fs.img.g1.cms + echo "Hi3093" >> Hi3093_ext4fs.img.g2.cms + echo "Hi3093" >> crldata_g1.crl + export KERNEL_VERSION_MAIN="5.10" + ./generate_sign_image rootfs_cms.cfg + dd if=Hi3093_ext4fs_cms.img of=Hi3093_ext4fs_cms.bin bs=1k count=36 + cp -fp ${EXT4_TARGET_BIN} ${OUTPUT_DIR}/ + cp -fp Hi3093_ext4fs_cms.bin ${OUTPUT_DIR}/ + cp -fp ${DEPLOY_DIR_IMAGE}/u-boot_rsa_4096.bin ${OUTPUT_DIR}/ + cp -fp ${IMGDEPLOYDIR}/${IMAGE_NAME}${IMAGE_NAME_SUFFIX%.rootfs}.*cpio.gz ${OUTPUT_DIR}/ + cd - + set +x +} +IMAGE_POSTPROCESS_COMMAND:append = "sign_copy_distro_3093;" diff --git a/bsp/meta-hisilicon/recipes-core/images/signtools-hi3093.bb b/bsp/meta-hisilicon/recipes-core/images/signtools-hi3093.bb new file mode 100644 index 0000000000000000000000000000000000000000..8d9cf6338830bbe3e518fbb681082c4524987e72 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/signtools-hi3093.bb @@ -0,0 +1,26 @@ +SUMMARY = "hi3093 sign tools" +LICENSE = "CLOSED" + +SRC_URI = " \ + file://mpu_solution/build/build_sign \ + file://mpu_solution/build/version_5.10 \ +" + +S = "${WORKDIR}/mpu_solution/build" + +do_install() { + install -d ${D}/signtools + cp -rf ${S}/* ${D}/signtools +} + +# export /signtools dir +SYSROOT_DIRS += "/signtools" +SYSROOT_PREPROCESS_FUNCS += "additional_populate_sysroot" +additional_populate_sysroot() { + sysroot_stage_dir ${D}/signtools ${SYSROOT_DESTDIR}/signtools +} + +FILES:${PN} += "/signtools" + +INHIBIT_PACKAGE_STRIP = "1" +INHIBIT_SYSROOT_STRIP = "1" diff --git a/bsp/meta-hisilicon/recipes-core/packagegroups/packagegroup-base.bbappend b/bsp/meta-hisilicon/recipes-core/packagegroups/packagegroup-base.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..eb5768b8be0d7f22865d60d2abcf7ac1c84e6787 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/packagegroups/packagegroup-base.bbappend @@ -0,0 +1,8 @@ +RDEPENDS:packagegroup-base:append = " \ +e2fsprogs-resize2fs \ +" + +RDEPENDS:packagegroup-base:append:hieulerpi1 = " \ +hieulerpi1-tf-a \ +hieulerpi1-bsp-pkg \ +" diff --git a/bsp/meta-hisilicon/recipes-core/watchdog/3093-watchdog.bb b/bsp/meta-hisilicon/recipes-core/watchdog/3093-watchdog.bb new file mode 100644 index 0000000000000000000000000000000000000000..df87d603ce7c26addf066932803e634436394fce --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/watchdog/3093-watchdog.bb @@ -0,0 +1,22 @@ +DESCRIPTION = "Close Hi3093 Watchdog" +SECTION = "base" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +DEPENDS = " update-rc.d-native" + +SRC_URI = "file://close_wdog.sh \ + " + +#INITSCRIPT_NAME = "close_wdog.sh" +#INITSCRIPT_PARAMS = "start 16 5 ." + +FILES:${PN} = "${sysconfdir}" + +do_install () { + install -d ${D}${sysconfdir}/init.d + install -d ${D}${sysconfdir}/rc5.d + + install -m 0755 ${WORKDIR}/close_wdog.sh ${D}${sysconfdir}/init.d/ + update-rc.d -r ${D} close_wdog.sh start 90 5 . +} diff --git a/bsp/meta-hisilicon/recipes-core/watchdog/files/close_wdog.sh b/bsp/meta-hisilicon/recipes-core/watchdog/files/close_wdog.sh new file mode 100644 index 0000000000000000000000000000000000000000..7343039bf12eb3927920434dfc1c96b9336ba70a --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/watchdog/files/close_wdog.sh @@ -0,0 +1,4 @@ +devmem 0x08768C00 w 0x1acce551 +devmem 0x08768C00 +devmem 0x08768008 w 0 +devmem 0x08768008 diff --git a/bsp/meta-hisilicon/recipes-graphics/mesa/mesa_%.bbappend b/bsp/meta-hisilicon/recipes-graphics/mesa/mesa_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..04f39580b54a2c6d37c815bfbe07d04fc7864fb4 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-graphics/mesa/mesa_%.bbappend @@ -0,0 +1 @@ +PACKAGECONFIG:append:hi1711 = " gallium vc4 v3d kmsro ${@bb.utils.contains('DISTRO_FEATURES', 'x11 opengl', 'x11 dri3', '', d)}" diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/adc-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/adc-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..7ab48043a318f5ab36166dc42081a803f2d8ced9 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/adc-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "adc" +KO_NAME = "adc_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-adc-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/bmcrtc-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/bmcrtc-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..7aecc61c5a8d5f41b870427f3b964638a01d3405 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/bmcrtc-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "bmcrtc" +KO_NAME = "bmcrtc_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-bmcrtc-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/bt-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/bt-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..f830b8bd4a79aba748008afeb36e80228f46647e --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/bt-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "bt" +KO_NAME = "bt_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-bt-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/comm-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/comm-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..77103d9f58d73d2af2723407fec8c3a87d0b73c3 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/comm-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "comm" +KO_NAME = "comm_drv.ko" +PREV_DEPEND += " ksecurec log-hi3093 " +RPROVIDES:${PN} += "kernel-module-comm-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/dboot-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/dboot-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..c497ce1f87494ee8443edc2c06f2b342987c36b4 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/dboot-hi3093_16.1.10.2.bb @@ -0,0 +1,7 @@ +KO_DIR_NAME = "dboot" +KO_NAME = "dboot_drv.ko" +PREV_DEPEND += "uart-hi3093" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-dboot-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/ddrc-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/ddrc-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..f33131891312bd36635f7ab6ca6e8e0cdbb4a4d6 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/ddrc-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "ddrc" +KO_NAME = "ddrc_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-ddrc-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/devmem-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/devmem-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..9c0b8769dc3abd749ed215336c8f59af639e3bc7 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/devmem-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "devmem" +KO_NAME = "devmem_drv.ko" +PREV_DEPEND += " " +RPROVIDES:${PN} += "kernel-module-devmem-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/djtag-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/djtag-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..ea40a5e12b57909e1f330bd3cab009577c6eeadd --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/djtag-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "djtag" +KO_NAME = "djtag_drv.ko" +PREV_DEPEND += " comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-djtag-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/edma-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/edma-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..b53fcde1aff7c3631d2d05230967d2969da379c2 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/edma-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "edma" +KO_NAME = "edma_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec sys-info-hi3093 " +RPROVIDES:${PN} += "kernel-module-edma-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/efuse-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/efuse-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..b6e915124d620ce5b8a8af98f0a22ec77ae9401a --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/efuse-hi3093_16.1.10.2.bb @@ -0,0 +1,7 @@ +KO_DIR_NAME = "efuse" +KO_NAME = "efuse_drv/efuse_drv.ko efuse_drv_user_def_uds/efuse_drv_user_def_uds.ko" +PREV_DEPEND += " log-hi3093 djtag-hi3093 comm-hi3093 trng-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-efuse-drv " +RPROVIDES:${PN} += "kernel-module-efuse_drv-user-def-uds " + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/gmac-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/gmac-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..a3e2620ecda1554f6fef48f01b9a2f65962d5c59 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/gmac-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "gmac" +KO_NAME = "gmac_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 mdio-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-gmac-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/gpio-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/gpio-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..c39c61e96603f88131c47c401e600110672b7d93 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/gpio-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "gpio" +KO_NAME = "gpio_drv.ko" +PREV_DEPEND += " comm-hi3093 log-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-gpio-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/hisi-can-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/hisi-can-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..2d304eb294a011555ee808ca6e97ff9f27475499 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/hisi-can-hi3093_16.1.10.2.bb @@ -0,0 +1,7 @@ +KO_DIR_NAME = "hisi_can" +KO_NAME = "hi_can.ko" +PREV_DEPEND += " ksecurec log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-hi-can" +RPROVIDES:${PN} += "kernel-module-can-dev-${KERNEL_VERSION} " + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/hw-lock-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/hw-lock-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..5312f316be56308d7b8a20443bd8295d0dbe4c22 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/hw-lock-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "hw_lock" +KO_NAME = "hw_lock_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-hw-lock-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/i2c-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/i2c-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..354c70f1438d626e73cb952698d0cc75d6522aa5 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/i2c-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "i2c" +KO_NAME = "i2c_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-i2c-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/ipmb-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/ipmb-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..5e2554cbdb02694795afa0cb31020c83ca951b56 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/ipmb-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "ipmb" +KO_NAME = "ipmb_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-ipmb-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/kcs-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/kcs-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..d8c2a9ba4da7f19fece74d21709aca9cdf8f8b39 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/kcs-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "kcs" +KO_NAME = "kcs_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-kcs-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/ksecurec_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/ksecurec_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..fc797303e41ed690bdf13de3023a1d4190eb15b6 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/ksecurec_16.1.10.2.bb @@ -0,0 +1,38 @@ +SUMMARY = "securec modules recipes" +LICENSE = "CLOSED" + +SRC_URI = " \ + file://mpu_solution/platform/securec \ + file://mpu_solution/src/non_real_time/adapter_for_hi3093/securec_5.10_makefile \ + file://mpu_solution/src/non_real_time/drivers \ +" + +S = "${WORKDIR}/mpu_solution/platform/securec/src" + +inherit module + +export SDK_ROOT="${WORKDIR}/mpu_solution/src/non_real_time/drivers" +export KERNEL_PATH="${KERNEL_SRC}" +export SDK_VERSION="${PV}" +export SRC_DIR="${WORKDIR}/mpu_solution/src" +export SECUREC_PATH="${WORKDIR}/mpu_solution/platform/securec" + +do_configure:prepend() { + cp -f ${WORKDIR}/mpu_solution/src/non_real_time/adapter_for_hi3093/securec_5.10_makefile ${WORKDIR}/mpu_solution/platform/securec/src/Makefile + sed -i 's#-Werror##g' ${WORKDIR}/mpu_solution/src/non_real_time/drivers/Makefile.cfg +} + +do_compile() { + oe_runmake +} + +do_install() { + install -d ${D}/lib/modules/hi3093 + install -m 644 ${S}/ksecurec.ko ${D}/lib/modules/hi3093 + if [ -d "${STAGING_KERNEL_DIR}" ];then + cat ${S}/Module.symvers >> ${STAGING_KERNEL_DIR}/Module.symvers + cat ${S}/Module.symvers >> ${STAGING_KERNEL_BUILDDIR}/Module.symvers + fi +} + +RPROVIDES:${PN} += "kernel-module-ksecurec" diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/localbus-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/localbus-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..8e6bd94c9922273ac4ab95a004b3821364dbfee1 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/localbus-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "local_bus" +KO_NAME = "localbus_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-localbus-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/log-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/log-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..7a8458ddf18f20d6ab38bca08aad8b2d0f3c3bda --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/log-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "log" +KO_NAME = "log_drv.ko" +PREV_DEPEND += "ksecurec" +RPROVIDES:${PN} += "kernel-module-log-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/mctp-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/mctp-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..0ace33458093b1fd2d9f038c30f1a0c9e50472f4 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/mctp-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "mctp" +KO_NAME = "mctp_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-mctp-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/mdio-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/mdio-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..546a4c974d261d8f4a91a8e1d53428ebca40a37f --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/mdio-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "mdio" +KO_NAME = "mdio_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-mdio-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/modules-hi3093.inc b/bsp/meta-hisilicon/recipes-kernel/hi3093/modules-hi3093.inc new file mode 100644 index 0000000000000000000000000000000000000000..a3b0f18ac42b6970abc8e809e1695039b8b8f936 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/modules-hi3093.inc @@ -0,0 +1,42 @@ +SUMMARY = "${KO_DIR_NAME}" +LICENSE = "CLOSED" + +SRC_URI = " \ + file://mpu_solution/src \ +" + +DEPENDS += " ${PREV_DEPEND} " + +S = "${WORKDIR}/mpu_solution/src/non_real_time/drivers/${KO_DIR_NAME}" + +inherit module + +export SDK_ROOT="${WORKDIR}/mpu_solution/src/non_real_time/drivers" +export KERNEL_PATH="${STAGING_KERNEL_DIR}" +export SDK_VERSION="${PV}" +export SRC_DIR="${WORKDIR}/mpu_solution/src" +export SECUREC_PATH="${WORKDIR}/mpu_solution/platform/securec" +export KERNEL_VERSION_MAIN="5.10" + +do_configure:prepend() { + sed -i "s#M='${KO_DIR_NAME}'#M=\$\{PWD\}#g" ${S}/Makefile + sed -i 's#M="${KO_DIR_NAME}"#M=\$\{PWD\}#g' ${S}/Makefile + sed -i 's#-Werror##g' ${S}/../Makefile.cfg +} + +do_compile() { + oe_runmake +} + +do_install() { + install -d ${D}/lib/modules/hi3093 + for KON in "${KO_NAME}" + do + install -m 644 ${S}/${KON} ${D}/lib/modules/hi3093 + done + if [ -d "${STAGING_KERNEL_DIR}" ];then + cat ${S}/Module.symvers >> ${STAGING_KERNEL_DIR}/Module.symvers + cat ${S}/Module.symvers >> ${STAGING_KERNEL_BUILDDIR}/Module.symvers + fi +} + diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/msg-scm3-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/msg-scm3-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..2755775d336e120c00905d5b3fedeb5e6332fd51 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/msg-scm3-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "msg_scm3" +KO_NAME = "msg_scm3_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-msg-scm3-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/norflash-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/norflash-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..98872aa11aaffb89f789d217ccf59e237d9c61e1 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/norflash-hi3093_16.1.10.2.bb @@ -0,0 +1,8 @@ +KO_DIR_NAME = "norflash_1711" +KO_NAME = "physmap_1711.ko" +PREV_DEPEND += " log-hi3093 " +RPROVIDES:${PN} += "kernel-module-physmap-1711" +RPROVIDES:${PN} += "kernel-module-chipreg-${KERNEL_VERSION} " +RPROVIDES:${PN} += "kernel-module-map-funcs-${KERNEL_VERSION} " + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/p80-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/p80-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..795b5bda000b2ca4a7b09d3a43f596f9112419d6 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/p80-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "p80" +KO_NAME = "p80_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-p80-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/packagegroup-bsp-deps.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/packagegroup-bsp-deps.bb new file mode 100644 index 0000000000000000000000000000000000000000..90097a593a5fbf580c28e3fb5d03c0103c1c7081 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/packagegroup-bsp-deps.bb @@ -0,0 +1,16 @@ +SUMMARY = "bsp modules deps" +PR = "r1" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +inherit packagegroup + +PACKAGES = "${PN}" + +RDEPENDS:${PN} += " \ + kernel-module-mtd \ + kernel-module-chipreg \ + kernel-module-map-funcs \ + kernel-module-can-dev \ +" + diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/pcie-fix-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/pcie-fix-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..de2f0f15019e42501f55172653f7b76cd24776be --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/pcie-fix-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "pcie_fix" +KO_NAME = "pci_fix_drv.ko" +PREV_DEPEND += " log-hi3093 ksecurec comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-pci-fix-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/pcie-host-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/pcie-host-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..190f1b69064b249cb84356307d57bccd5e107a90 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/pcie-host-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "pcie_host" +KO_NAME = "pcie_hisi02_drv.ko" +PREV_DEPEND += " comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-pcie-hisi02-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/peci-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/peci-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..c21afedf6f46febe92da7558b56fbf22deca4c95 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/peci-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "peci" +KO_NAME = "peci_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-peci-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/pwm-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/pwm-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..b36d7bedc9a8422daf469c3f5c3655bf3d6ddbd8 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/pwm-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "pwm" +KO_NAME = "pwm_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-pwm-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/sdio-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/sdio-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..1a38c9ea37e78de2541a2eb643f0394fd7cc8f83 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/sdio-hi3093_16.1.10.2.bb @@ -0,0 +1,14 @@ +KO_DIR_NAME = "sdio" +KO_NAME = "mmc_block.ko emmc/emmc_drv.ko mmc_core.ko sdio/sdio_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec hw-lock-hi3093 " + +require modules-hi3093.inc + +do_configure:prepend() { + sed -i "s#^MMC_OPEN_SOURCE_DIR=.*#MMC_OPEN_SOURCE_DIR=${STAGING_KERNEL_DIR}/drivers/mmc#g" ${S}/Makefile +} + +RPROVIDES:${PN} += "kernel-module-mmc-block " +RPROVIDES:${PN} += "kernel-module-mmc-core " +RPROVIDES:${PN} += "kernel-module-emmc-drv " +RPROVIDES:${PN} += "kernel-module-sdio-drv " diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/sdio-sfc-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/sdio-sfc-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..8379c99ba0222108147d90b7c417253bdb3825c6 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/sdio-sfc-hi3093_16.1.10.2.bb @@ -0,0 +1,19 @@ +KO_DIR_NAME = "sdio" +KO_NAME = "mmc_block.ko emmc/emmc_drv.ko mmc_core.ko sdio/sdio_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec hw-lock-hi3093 " + +require modules-hi3093.inc + +SRC_URI += " \ + file://mpu_solution/src/patches/openEuler/emmc_sfc.patch;patchdir=${S}/../ \ +" + +do_configure:prepend() { + sed -i "s#^MMC_OPEN_SOURCE_DIR=.*#MMC_OPEN_SOURCE_DIR=${STAGING_KERNEL_DIR}/drivers/mmc#g" ${S}/Makefile +} + +RPROVIDES:${PN} += "kernel-module-mmc-block " +RPROVIDES:${PN} += "kernel-module-mmc-core " +RPROVIDES:${PN} += "kernel-module-emmc-drv " +RPROVIDES:${PN} += "kernel-module-sdio-drv " + diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc0-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc0-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..23669170966027a6d903ff729220c02d4c3c8176 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc0-hi3093_16.1.10.2.bb @@ -0,0 +1,14 @@ +KO_DIR_NAME = "sfccom" +KO_NAME = "sfc0/sfc0_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec hw-lock-hi3093 sfc1-hi3093 " +RPROVIDES:${PN} += "kernel-module-sfc0-drv " +RPROVIDES:${PN} += "kernel-module-mtd-${KERNEL_VERSION} " + +require modules-hi3093.inc + +# the Makefile is not standardized, the sfc1 module, which belongs to the +# sfccomm component, should be compiled first before sfc0, so we make split here. +do_configure:append() { + sed -i '/sfc1/d' ${S}/Makefile +} + diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc1-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc1-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..ab51bf050030eacbd3b87942b3688a7bd633b2e6 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc1-hi3093_16.1.10.2.bb @@ -0,0 +1,13 @@ +KO_DIR_NAME = "sfccom" +KO_NAME = "sfc1/sfc1_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec hw-lock-hi3093 " +RPROVIDES:${PN} += "kernel-module-sfc1-drv " + +require modules-hi3093.inc + +# the Makefile is not standardized, the sfc1 module, which belongs to the +# sfccomm component, should be compiled first before sfc0, so we make split here. +do_configure:append() { + sed -i '/sfc0/d' ${S}/Makefile +} + diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/sol-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/sol-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..13c23d2f4c51ac212f28fe6c963bb5cec3f75148 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/sol-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "sol" +KO_NAME = "sol_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-sol-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/spi-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/spi-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..18ff5f7a302df0244d5747d6c4f319b13abacb92 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/spi-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "spi" +KO_NAME = "spi_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-spi-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/sys-info-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/sys-info-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..c50fb59bfb82f977a778ebfdc2fc97fa0b84eead --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/sys-info-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "sys_info" +KO_NAME = "sys_info_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-sys-info-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/timer-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/timer-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..efd1b43a25517ab49dde5e52a897110048c9de0c --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/timer-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "timer" +KO_NAME = "hitimer_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-hitimer-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/trng-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/trng-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..4da4a05ec40a203ea7f01876f00f10d401c150f0 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/trng-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "trng" +KO_NAME = "trng_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-trng-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/uart-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/uart-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..b74450e1cb690087eda6983165b3dd88c714096d --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/uart-hi3093_16.1.10.2.bb @@ -0,0 +1,7 @@ +KO_DIR_NAME = "uart" +KO_NAME = "uart_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-uart-drv " +RPROVIDES:${PN} += "kernel-module-uart-core-${KERNEL_VERSION} " + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/uartconnect-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/uartconnect-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..8cde92e32553f35e2a815e741fdef47498827194 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/uartconnect-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "uart_connect" +KO_NAME = "uartconnect_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-uartconnect-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/usb-core-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/usb-core-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..e7f39917315adbf90881f41b2df6574c03b192db --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/usb-core-hi3093_16.1.10.2.bb @@ -0,0 +1,11 @@ +KO_DIR_NAME = "usb_core" +KO_NAME = "udc-core.ko" +PREV_DEPEND += "log-hi3093" + +require modules-hi3093.inc + +do_configure:prepend() { + sed -i "s#^USB_OPEN_SOURCE_DIR=.*#USB_OPEN_SOURCE_DIR=${STAGING_KERNEL_DIR}/drivers/usb#g" ${S}/Makefile +} + +RPROVIDES:${PN} += "kernel-module-udc-core" diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/usb-device-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/usb-device-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..818c67ef1adbfdc6bde0bdf29192f690a4caac2e --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/usb-device-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "usb_device" +KO_NAME = "virtual_usb_device.ko" +PREV_DEPEND += " log-hi3093 usb-core-hi3093 usb-hi3093 comm-hi3093 usb-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-virtual-usb-device" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/usb-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/usb-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..68b588b2a688e3960ca9361d767f1ea49c60d676 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/usb-hi3093_16.1.10.2.bb @@ -0,0 +1,20 @@ +KO_DIR_NAME = "usb" +KO_NAME = "configfs.ko usb_drv.ko libcomposite.ko dwc3.ko usb-common.ko" +PREV_DEPEND += " usb-core-hi3093 comm-hi3093 ksecurec " + +require modules-hi3093.inc + +do_configure:prepend() { + # fix kernel source link + sed -i "s#^USB_OPEN_SOURCE_DIR=.*#USB_OPEN_SOURCE_DIR=${STAGING_KERNEL_DIR}/drivers/usb#g" ${S}/Makefile + sed -i "s#^CONFIGFS_OPEN_SOURCE_DIR=.*#CONFIGFS_OPEN_SOURCE_DIR=${STAGING_KERNEL_DIR}/fs/configfs#g" ${S}/Makefile + + # fix usb_drv.h: No such file or directory + sed -i "s#^ccflags-y += -DCONFIG_USB_DWC3_DUAL_ROLE=1.*#ccflags-y += -DCONFIG_USB_DWC3_DUAL_ROLE=1 -I${S} -I${S}/dwc3 #g" ${S}/Makefile +} + +RPROVIDES:${PN} += "kernel-module-configfs " +RPROVIDES:${PN} += "kernel-module-usb-drv " +RPROVIDES:${PN} += "kernel-module-libcomposite " +RPROVIDES:${PN} += "kernel-module-dwc3 " +RPROVIDES:${PN} += "kernel-module-usb-common " diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/vce-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/vce-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..2500f631e852b863afcc082f6f372934ca4a0ffb --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/vce-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "vce" +KO_NAME = "vce_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-vce-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/virtual-cdev-veth-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/virtual-cdev-veth-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..5106135587eb721b9224d8346b313a2c19b588e3 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/virtual-cdev-veth-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "virtual_cdev_veth" +KO_NAME = "cdev_veth_drv.ko" +PREV_DEPEND += " edma-hi3093 log-hi3093 comm-hi3093 ksecurec " +RPROVIDES:${PN} += "kernel-module-cdev-veth-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/watchdog-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/watchdog-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..a8960a517844111161a45a3d3c3a5915a22b2211 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/watchdog-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "watchdog" +KO_NAME = "watchdog_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 timer-hi3093 " +RPROVIDES:${PN} += "kernel-module-watchdog-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/wdi-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/wdi-hi3093_16.1.10.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..ab754548dcbc7181091c5f37be31bcdf2a4565f8 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/wdi-hi3093_16.1.10.2.bb @@ -0,0 +1,6 @@ +KO_DIR_NAME = "wdi" +KO_NAME = "wdi_drv.ko" +PREV_DEPEND += " log-hi3093 comm-hi3093 " +RPROVIDES:${PN} += "kernel-module-wdi-drv" + +require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/config/hi3093/defconfig b/bsp/meta-hisilicon/recipes-kernel/linux/files/config/hi3093/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..87935ba9f800da1afe8a28279890269d1e8976e6 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/config/hi3093/defconfig @@ -0,0 +1,3985 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.10.0 Kernel Configuration +# +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +# CONFIG_NO_HZ_IDLE is not set +CONFIG_NO_HZ_FULL=y +CONFIG_CONTEXT_TRACKING=y +# CONFIG_CONTEXT_TRACKING_FORCE is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +CONFIG_PREEMPTION=y + +# +# CPU/Task time and stats accounting +# +CONFIG_VIRT_CPU_ACCOUNTING=y +CONFIG_VIRT_CPU_ACCOUNTING_GEN=y +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +CONFIG_PREEMPT_RCU=y +CONFIG_RCU_EXPERT=y +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_FANOUT=64 +CONFIG_RCU_FANOUT_LEAF=16 +# CONFIG_RCU_FAST_NO_HZ is not set +# CONFIG_RCU_BOOST is not set +CONFIG_RCU_NOCB_CPU=y +# CONFIG_TASKS_TRACE_RCU_READ_MB is not set +# end of RCU Subsystem + +# CONFIG_IKCONFIG is not set +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_KMEM=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +# CONFIG_QOS_SCHED is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +# CONFIG_CGROUP_PIDS is not set +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_DEBUG=y +# CONFIG_CGROUP_FILES is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +# CONFIG_TIME_NS is not set +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +# CONFIG_RD_ZSTD is not set +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +# CONFIG_IO_URING is not set +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +# CONFIG_KCMP is not set +# CONFIG_RSEQ is not set +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +CONFIG_DEBUG_PERF_USE_VMALLOC=y +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_SLAB_MERGE_DEFAULT is not set +CONFIG_SLAB_FREELIST_RANDOM=y +CONFIG_SLAB_FREELIST_HARDENED=y +CONFIG_SHUFFLE_PAGE_ALLOCATOR=y +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_HAS_CPU_RELAX=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PHYTIUM is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_S32 is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +CONFIG_HAVE_LIVEPATCH_WO_FTRACE=y + +# +# Enable Livepatch +# +CONFIG_LIVEPATCH=y +CONFIG_LIVEPATCH_WO_FTRACE=y +CONFIG_LIVEPATCH_STOP_MACHINE_CONSISTENCY=y +# CONFIG_LIVEPATCH_STACK is not set +CONFIG_LIVEPATCH_RESTRICT_KPROBE=y +# end of Enable Livepatch + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_845719=y +# CONFIG_ARM64_ERRATUM_843419 is not set +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_ERRATUM_1418040=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +# CONFIG_CAVIUM_ERRATUM_23154 is not set +# CONFIG_CAVIUM_ERRATUM_27456 is not set +# CONFIG_CAVIUM_ERRATUM_30115 is not set +# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set +# CONFIG_FUJITSU_ERRATUM_010001 is not set +# CONFIG_HISILICON_ERRATUM_1980005 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set +# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +# CONFIG_HISILICON_HIP08_RU_PREFETCH_DEFAULT_OFF is not set +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y +# CONFIG_ARM64_VA_BITS_48 is not set +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_SCHED_MC is not set +# CONFIG_SCHED_CLUSTER is not set +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=64 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM64_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_NUMA is not set +CONFIG_HZ_100=y +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=100 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_LLC_128_LINE_SIZE=y +CONFIG_ARCH_HAS_FILTER_PGPROT=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set +CONFIG_CRASH_DUMP=y +# CONFIG_ARM64_CPU_PARK is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +# CONFIG_UNMAP_KERNEL_AT_EL0 is not set +# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set +# CONFIG_ARM64_PMEM_LEGACY is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +# CONFIG_ARM64_TAGGED_ADDR_ABI is not set +CONFIG_AARCH32_EL0=y +CONFIG_KUSER_HELPERS=y +# CONFIG_ARMV8_DEPRECATED is not set + +# +# ARMv8.1 architectural features +# +# CONFIG_ARM64_HW_AFDBM is not set +# CONFIG_ARM64_PAN is not set +CONFIG_AS_HAS_LSE_ATOMICS=y +# CONFIG_ARM64_USE_LSE_ATOMICS is not set +# CONFIG_ARM64_VHE is not set +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +# CONFIG_ARM64_PMEM is not set +# CONFIG_ARM64_RAS_EXTN is not set +# CONFIG_ARM64_CNP is not set +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +# CONFIG_ARM64_AMU_EXTN is not set +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +# CONFIG_ARM64_BTI is not set +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +# CONFIG_ARCH_RANDOM is not set +CONFIG_ARM64_AS_HAS_MTE=y +# end of ARMv8.5 architectural features + +# +# ARMv8.6 architectural features +# +CONFIG_ARM64_TWED=y +# end of ARMv8.6 architectural features + +# +# ARMv8.7 architectural features +# +# end of ARMv8.7 architectural features + +# CONFIG_ARM64_SVE is not set +# CONFIG_ARM64_MODULE_PLTS is not set +# CONFIG_ARM64_PSEUDO_NMI is not set +# CONFIG_RELOCATABLE is not set +# CONFIG_RANDOMIZE_BASE is not set +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +# CONFIG_ASCEND_FEATURES is not set +# end of Kernel Features + +# +# Boot options +# +CONFIG_CMDLINE="" +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y +# end of Boot options + +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_CPU_PM=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set + +# +# ARM CPU Idle Drivers +# +# CONFIG_ARM_CPUIDLE is not set +# CONFIG_ARM_PSCI_CPUIDLE is not set +# end of ARM CPU Idle Drivers + +CONFIG_HALTPOLL_CPUIDLE=y +# end of CPU Idle + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +# CONFIG_ARM_SCMI_PROTOCOL is not set +# CONFIG_ARM_SDE_INTERFACE is not set +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_DMIID is not set +# CONFIG_DMI_SYSFS is not set +# CONFIG_FW_CFG_SYSFS is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +# CONFIG_EFI_FAKE_MEMMAP is not set +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ARMSTUB_DTB_LOADER=y +# CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER is not set +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_EFI_EARLYCON=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +# CONFIG_ARM_SMCCC_SOC_ID is not set + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_ARCH_SUPPORTS_ACPI=y +# CONFIG_ACPI is not set +# CONFIG_VIRTUALIZATION is not set +# CONFIG_ARM64_CRYPTO is not set +CONFIG_SELFDECOMPRESS_ZIMAGE=y + +# +# zImage support selfdecompre features +# +# CONFIG_SELFDECOMPRESS_ZIMAGE_GZIP is not set +CONFIG_SELFDECOMPRESS_ZIMAGE_XZ=y +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZ4 is not set +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZMA is not set +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZO is not set +# CONFIG_ZIMAGE_2M_TEXT_OFFSET is not set +# end of zImage support selfdecompre features + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_QUICK_KEXEC is not set +CONFIG_ARCH_WANT_RESERVE_CRASH_KERNEL=y +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_UPROBES=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_ASM_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +# CONFIG_BLK_DEBUG_FS is not set +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +# end of Partition Types + +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=m +# CONFIG_MQ_IOSCHED_KYBER is not set +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +# CONFIG_SPARSEMEM_VMEMMAP is not set +CONFIG_HAVE_FAST_GUP=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_MEMORY_HOTPLUG=y +CONFIG_MEMORY_HOTPLUG_SPARSE=y +# CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE is not set +# CONFIG_MEMORY_HOTREMOVE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_COMPACTION=y +# CONFIG_PAGE_REPORTING is not set +CONFIG_MIGRATION=y +# CONFIG_HUGE_VMALLOC_DEFAULT_ENABLED is not set +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +# CONFIG_HWPOISON_INJECT is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_MEMCG_QOS=y +# CONFIG_CMA is not set +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +CONFIG_ZSMALLOC=m +# CONFIG_ZSMALLOC_STAT is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# CONFIG_PIN_MEMORY is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_NET_INGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=m +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=m +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +# CONFIG_IP_PNP is not set +CONFIG_NET_IPIP=m +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +CONFIG_SYN_COOKIES=y +# CONFIG_NET_IPVTI is not set +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=m +CONFIG_INET_TCP_DIAG=m +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +CONFIG_NETLABEL=y +# CONFIG_MPTCP is not set +CONFIG_NETWORK_SECMARK=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_SECMARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=m +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_MASQUERADE is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=m +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +# CONFIG_IP_NF_TARGET_MASQUERADE is not set +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +# CONFIG_IP_NF_MANGLE is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +# CONFIG_NF_LOG_IPV6 is not set +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +# CONFIG_IP6_NF_MANGLE is not set +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +# CONFIG_IP6_NF_TARGET_MASQUERADE is not set +# CONFIG_IP6_NF_TARGET_NPT is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +CONFIG_TIPC=m +CONFIG_TIPC_MEDIA_UDP=y +# CONFIG_TIPC_CRYPTO is not set +# CONFIG_TIPC_DIAG is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +# CONFIG_BRIDGE is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +# CONFIG_VLAN_8021Q_MVRP is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=m +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +# end of CAN Device Drivers + +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_CERTIFICATION_ONUS=y +# CONFIG_CFG80211_REQUIRE_SIGNED_REGDB is not set +# CONFIG_CFG80211_REG_CELLULAR_HINTS is not set +# CONFIG_CFG80211_REG_RELAX_NO_IR is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_CRDA_SUPPORT is not set +CONFIG_CFG80211_WEXT=y +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_WEP=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_CRYPT_TKIP=m +# CONFIG_LIB80211_DEBUG is not set +# CONFIG_MAC80211 is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_FAILOVER=y +# CONFIG_ETHTOOL_NETLINK is not set +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI_PCIE=y +CONFIG_PCIEAER=y +# CONFIG_PCIEAER_INJECT is not set +# CONFIG_PCIE_ECRC is not set +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_DPC is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_STUB is not set +CONFIG_PCI_ECAM=y +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_XILINX is not set +# CONFIG_PCI_XGENE is not set +# CONFIG_PCIE_ALTERA is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set + +# +# DesignWare PCI Core Support +# +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCIE_HISI_STB is not set +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCI_J721E_HOST is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +# CONFIG_PREVENT_FIRMWARE_BUILD is not set + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +# CONFIG_FW_LOADER_COMPRESS is not set +# CONFIG_FW_CACHE is not set +# end of Firmware loader + +CONFIG_ALLOW_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +CONFIG_ARM_CCI=y +CONFIG_ARM_CCI400_COMMON=y +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_MOXTET is not set +# CONFIG_HISILICON_LPC is not set +# CONFIG_SIMPLE_PM_BUS is not set +# CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_MHI_BUS is not set +# end of Bus devices + +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set +CONFIG_MTD=m +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=m +CONFIG_MTD_OF_PARTS=m +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=m +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=m +CONFIG_MTD_CFI_ADV_OPTIONS=y +# CONFIG_MTD_CFI_NOSWAP is not set +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +CONFIG_MTD_CFI_LE_BYTE_SWAP=y +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +CONFIG_MTD_MAP_BANK_WIDTH_16=y +CONFIG_MTD_MAP_BANK_WIDTH_32=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_AMDSTD=m +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=m +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=m +# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_PHYSMAP_VERSATILE is not set +# CONFIG_MTD_PHYSMAP_GEMINI is not set +# CONFIG_MTD_PHYSMAP_GPIO_ADDR is not set +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +CONFIG_MTD_PHRAM=m +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +CONFIG_MTD_NAND_CORE=m +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_NAND_ECC_SW_HAMMING=m +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set +CONFIG_MTD_RAW_NAND=m +# CONFIG_MTD_NAND_ECC_SW_BCH is not set + +# +# Raw/parallel NAND flash controllers +# +# CONFIG_MTD_NAND_DENALI_PCI is not set +# CONFIG_MTD_NAND_DENALI_DT is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_HISI504 is not set +# CONFIG_MTD_NAND_MXIC is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_CADENCE is not set +# CONFIG_MTD_NAND_ARASAN is not set + +# +# Misc +# +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +CONFIG_MTD_NAND_ECC=y +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +# CONFIG_MTD_SPI_NOR is not set +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_FASTMAP=y +# CONFIG_MTD_UBI_GLUEBI is not set +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +CONFIG_CDROM=m +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +CONFIG_ZRAM=m +# CONFIG_ZRAM_WRITEBACK is not set +# CONFIG_ZRAM_MEMORY_TRACKING is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=30720 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# +# Altera FPGA firmware download module (requires I2C) +# +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=m +CONFIG_RAID_ATTRS=m +CONFIG_SCSI=m +CONFIG_SCSI_DMA=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +# CONFIG_CHR_DEV_ST is not set +CONFIG_BLK_DEV_SR=m +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_HISI_SAS is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +CONFIG_SCSI_VIRTIO=m +CONFIG_SCSI_DH=y +CONFIG_SCSI_DH_RDAC=m +CONFIG_SCSI_DH_HP_SW=m +CONFIG_SCSI_DH_EMC=m +CONFIG_SCSI_DH_ALUA=m +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=m +CONFIG_SATA_HOST=y +CONFIG_ATA_VERBOSE_ERROR=y +# CONFIG_ATA_FORCE is not set +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=m +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=m +# CONFIG_AHCI_CEVA is not set +# CONFIG_AHCI_QORIQ is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_ZHAOXIN is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_UNSTRIPED is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=m +CONFIG_NET_CORE=y +CONFIG_BONDING=m +# CONFIG_DUMMY is not set +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_IPVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=m +# CONFIG_TUN_VNET_CROSS_LE is not set +# CONFIG_VETH is not set +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# Distributed Switch Architecture drivers +# +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +CONFIG_NET_VENDOR_CADENCE=y +# CONFIG_MACB is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_GOOGLE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +CONFIG_NET_VENDOR_NETSWIFT=y +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETERION is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_VENDOR_PACKET_ENGINES is not set +# CONFIG_NET_VENDOR_PENSANDO is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLIB=m +CONFIG_SWPHY=y +CONFIG_FIXED_PHY=m + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MARVELL_10G_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_RENESAS_PHY is not set +# CONFIG_ROCKCHIP_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=m +CONFIG_MDIO_BUS=m +CONFIG_OF_MDIO=m +CONFIG_MDIO_DEVRES=m +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +# CONFIG_MDIO_THUNDER is not set + +# +# MDIO Multiplexers +# +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +# CONFIG_PCS_XPCS is not set +# end of PCS device drivers + +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# Host-side USB support is needed for USB Network Adapter support +# +CONFIG_USB_NET_DRIVERS=m +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_RTL8152 is not set +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +# CONFIG_WLAN_VENDOR_ADMTEK is not set +# CONFIG_WLAN_VENDOR_ATH is not set +# CONFIG_WLAN_VENDOR_ATMEL is not set +# CONFIG_WLAN_VENDOR_BROADCOM is not set +# CONFIG_WLAN_VENDOR_CISCO is not set +# CONFIG_WLAN_VENDOR_INTEL is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +CONFIG_HOSTAP=m +# CONFIG_HOSTAP_FIRMWARE is not set +# CONFIG_HOSTAP_PLX is not set +# CONFIG_HOSTAP_PCI is not set +# CONFIG_HERMES is not set +# CONFIG_PRISM54 is not set +# CONFIG_WLAN_VENDOR_MARVELL is not set +# CONFIG_WLAN_VENDOR_MEDIATEK is not set +# CONFIG_WLAN_VENDOR_MICROCHIP is not set +# CONFIG_WLAN_VENDOR_RALINK is not set +# CONFIG_WLAN_VENDOR_REALTEK is not set +# CONFIG_WLAN_VENDOR_RSI is not set +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +# CONFIG_WLAN_VENDOR_ZYDAS is not set +# CONFIG_WLAN_VENDOR_QUANTENNA is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_ISDN is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +# CONFIG_VT is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_LDISC_AUTOLOAD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +# CONFIG_SERIAL_8250_16550A_VARIANTS is not set +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +# CONFIG_SERIAL_8250_EXAR is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +CONFIG_HVC_DRIVER=y +# CONFIG_HVC_DCC is not set +# CONFIG_SERIAL_DEV_BUS is not set +# CONFIG_TTY_PRINTK is not set +CONFIG_VIRTIO_CONSOLE=m +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +# CONFIG_HW_RANDOM_VIRTIO is not set +# CONFIG_HW_RANDOM_HISI is not set +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +# CONFIG_RAW_DRIVER is not set +CONFIG_DEVPORT=y +# CONFIG_TCG_TPM is not set +# CONFIG_XILLYBUS is not set +# end of Character devices + +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set + +# +# I2C support +# +CONFIG_I2C=m +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=m +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_HIX5HD2 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_HISI is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +# CONFIG_SPI_MEM is not set + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +# CONFIG_PPS is not set + +# +# PTP clock support +# +# CONFIG_PTP_1588_CLOCK is not set + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# end of PTP clock support + +CONFIG_PINCTRL=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_MCP23S08 is not set +# CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_STMFX is not set +# CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +# CONFIG_GPIO_CDEV_V1 is not set +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_CADENCE is not set +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +# CONFIG_GPIO_MB86S7X is not set +CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_W1 is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_HISI is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +# CONFIG_SYSCON_REBOOT_MODE is not set +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_CHARGER_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_BD99954 is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +# CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED is not set +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_MFD_HI655X_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RK808 is not set +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_STMFX is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +# CONFIG_DRM is not set + +# +# ARM devices +# +# end of ARM devices + +# +# Frame buffer Devices +# +# CONFIG_FB is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set +# end of Backlight & LCD device support +# end of Graphics support + +# CONFIG_SOUND is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=m +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=m +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +CONFIG_USB_DYNAMIC_MINORS=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_MON=m + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=m +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=m +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=m +# CONFIG_USB_XHCI_HISTB is not set +CONFIG_USB_EHCI_HCD=m +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=m +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=m +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=m +CONFIG_USB_OHCI_HCD_PCI=m +CONFIG_USB_OHCI_HCD_PLATFORM=m +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +# end of USB Physical Layer drivers + +# CONFIG_USB_GADGET is not set +# CONFIG_TYPEC is not set +# CONFIG_USB_ROLE_SWITCH is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_SYSTOHC is not set +# CONFIG_RTC_DEBUG is not set +# CONFIG_RTC_NVMEM is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +# CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=m + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +CONFIG_RTC_DRV_PL031=y +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_DMADEVICES is not set + +# +# DMABUF options +# +# CONFIG_SYNC_FILE is not set +# CONFIG_DMABUF_HEAPS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +CONFIG_UIO=m +# CONFIG_UIO_CIF is not set +# CONFIG_UIO_PDRV_GENIRQ is not set +# CONFIG_UIO_DMEM_GENIRQ is not set +# CONFIG_UIO_AEC is not set +# CONFIG_UIO_SERCOS3 is not set +# CONFIG_UIO_PCI_GENERIC is not set +# CONFIG_UIO_NETX is not set +# CONFIG_UIO_PRUSS is not set +# CONFIG_UIO_MF624 is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +# CONFIG_VIRTIO_BALLOON is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VDPA is not set +# CONFIG_VHOST_MENU is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +# CONFIG_STAGING is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX9485 is not set +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_CLK_QORIQ is not set +# CONFIG_COMMON_CLK_XGENE is not set +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +# CONFIG_COMMON_CLK_HI3516CV300 is not set +# CONFIG_COMMON_CLK_HI3519 is not set +# CONFIG_COMMON_CLK_HI3660 is not set +# CONFIG_COMMON_CLK_HI3670 is not set +# CONFIG_COMMON_CLK_HI3798CV200 is not set +CONFIG_COMMON_CLK_HI6220=y +# CONFIG_RESET_HISI is not set +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_ARM64_ERRATUM_858921=y +CONFIG_ARM_TIMER_SP804=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +# CONFIG_MAILBOX is not set +# CONFIG_IOMMU_SUPPORT is not set + +# +# Rpmsg drivers +# +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +# CONFIG_FSL_RCPM is not set +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +# CONFIG_PM_DEVFREQ is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +# CONFIG_IIO is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +# CONFIG_PWM is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_AL_FIC is not set +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_TI_SYSCON is not set +CONFIG_COMMON_RESET_HI3660=y +CONFIG_COMMON_RESET_HI6220=y + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_XGENE is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_FSL_IMX8MQ_USB is not set +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set +# CONFIG_PHY_HI6220_USB is not set +# CONFIG_PHY_HI3660_USB is not set +# CONFIG_PHY_HISTB_COMBPHY is not set +# CONFIG_PHY_HISI_INNO_USB2 is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_CCI_PMU=y +CONFIG_ARM_CCI400_PMU=y +# CONFIG_ARM_CCI5xx_PMU is not set +CONFIG_ARM_CCN=y +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +# end of Performance monitor support + +CONFIG_RAS=y +# CONFIG_USB4 is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# end of Android + +# +# Vendor Hooks +# +# CONFIG_VENDOR_HOOKS is not set +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +CONFIG_DAX=y +# CONFIG_NVMEM is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +# CONFIG_TEE is not set +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=m +CONFIG_EXT2_FS_XATTR=y +# CONFIG_EXT2_FS_POSIX_ACL is not set +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=m +# CONFIG_EXT3_FS_POSIX_ACL is not set +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +CONFIG_FS_DAX=y +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +# CONFIG_MANDATORY_FILE_LOCKING is not set +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +CONFIG_QUOTA_TREE=m +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=m +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=m +CONFIG_AUTOFS_FS=m +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +CONFIG_VIRTIO_FS=m +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +CONFIG_FSCACHE=m +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_OBJECT_LIST is not set +# CONFIG_CACHEFILES is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_VMCORE=y +# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_INODE64 is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +# CONFIG_CONFIGFS_FS is not set +# CONFIG_EFIVAR_FS is not set +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_FS_POSIX_ACL=y +CONFIG_JFFS2_FS_SECURITY=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +CONFIG_UBIFS_FS=m +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_FS_ZSTD is not set +# CONFIG_UBIFS_ATIME_SUPPORT is not set +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_SECURITY=y +# CONFIG_UBIFS_FS_AUTHENTICATION is not set +CONFIG_CRAMFS=m +# CONFIG_CRAMFS_BLOCKDEV is not set +# CONFIG_CRAMFS_MTD is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=m +# CONFIG_NFS_V2 is not set +CONFIG_NFS_V3=m +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=m +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +# CONFIG_NFS_V4_2 is not set +CONFIG_PNFS_FILE_LAYOUT=m +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +# CONFIG_NFS_FSCACHE is not set +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +CONFIG_NFSD=m +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +# CONFIG_NFSD_BLOCKLAYOUT is not set +# CONFIG_NFSD_SCSILAYOUT is not set +# CONFIG_NFSD_FLEXFILELAYOUT is not set +# CONFIG_NFSD_V4_SECURITY_LABEL is not set +CONFIG_GRACE_PERIOD=m +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS2 is not set +CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set +# CONFIG_CIFS_XATTR is not set +CONFIG_CIFS_DEBUG=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set +# CONFIG_CIFS_DFS_UPCALL is not set +# CONFIG_CIFS_FSCACHE is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +CONFIG_9P_FS_POSIX_ACL=y +# CONFIG_9P_FS_SECURITY is not set +# CONFIG_EULER_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=m +# CONFIG_UNICODE is not set +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +CONFIG_SECURITY_DMESG_RESTRICT=y +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_LSM_MMAP_MIN_ADDR=32768 +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +CONFIG_HARDENED_USERCOPY=y +CONFIG_HARDENED_USERCOPY_FALLBACK=y +# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +# CONFIG_SECURITY_SELINUX_DISABLE is not set +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 +CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 +CONFIG_SECURITY_SMACK=y +# CONFIG_SECURITY_SMACK_BRINGUP is not set +# CONFIG_SECURITY_SMACK_NETFILTER is not set +# CONFIG_SECURITY_SMACK_APPEND_SIGNALS is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +CONFIG_SECURITY_YAMA=y +# CONFIG_SECURITY_SAFESETID is not set +# CONFIG_SECURITY_LOCKDOWN_LSM is not set +# CONFIG_INTEGRITY is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options + +CONFIG_SECURITY_BOOT_INIT=y +# end of Security options + +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=m +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Public-key cryptography +# +# CONFIG_CRYPTO_RSA is not set +# CONFIG_CRYPTO_DH is not set +# CONFIG_CRYPTO_ECDH is not set +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +# CONFIG_CRYPTO_CURVE25519 is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_SEQIV is not set +CONFIG_CRYPTO_ECHAINIV=m + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_HMAC=m +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_XXHASH is not set +# CONFIG_CRYPTO_BLAKE2B is not set +# CONFIG_CRYPTO_BLAKE2S is not set +# CONFIG_CRYPTO_CRCT10DIF is not set +CONFIG_CRYPTO_GHASH=m +# CONFIG_CRYPTO_POLY1305 is not set +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=m +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_LZO=m +# CONFIG_CRYPTO_842 is not set +CONFIG_CRYPTO_LZ4=m +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DRBG_MENU=m +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=m +CONFIG_CRYPTO_JITTERENTROPY=m +CONFIG_CRYPTO_USER_API=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +CONFIG_CRYPTO_HASH_INFO=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=m +CONFIG_CRYPTO_LIB_ARC4=m +# CONFIG_CRYPTO_LIB_CHACHA is not set +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_DES=m +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA256=m +# CONFIG_CRYPTO_HW is not set +# CONFIG_ASYMMETRIC_KEY_TYPE is not set + +# +# Certificates for signature checking +# +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y +# CONFIG_INDIRECT_PIO is not set +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +CONFIG_LZ4_COMPRESS=m +CONFIG_LZ4_DECOMPRESS=m +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +# CONFIG_DMA_API_DEBUG is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +# CONFIG_IRQ_POLL is not set +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=m +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +CONFIG_FONT_8x16=y +CONFIG_FONT_AUTOSELECT=y +CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set +# CONFIG_SYMBOLIC_ERRNAME is not set +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_BTF is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +# CONFIG_MAGIC_SYSRQ_SERIAL is not set +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +# end of Generic Kernel Debugging Instruments + +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_MISC is not set + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_PAGE_REF is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_DEBUG_KMEMLEAK=y +CONFIG_DEBUG_KMEMLEAK_MEM_POOL_SIZE=2000 +# CONFIG_DEBUG_KMEMLEAK_TEST is not set +CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y +# CONFIG_DEBUG_KMEMLEAK_AUTO_SCAN is not set +CONFIG_DEBUG_STACK_USAGE=y +CONFIG_SCHED_STACK_END_CHECK=y +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +CONFIG_PANIC_ON_OOPS=y +CONFIG_PANIC_ON_OOPS_VALUE=1 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_LOCKUP_DETECTOR=y +CONFIG_SOFTLOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 + +# +# ARM64 NMI watchdog configuration +# +# end of ARM64 NMI watchdog configuration + +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +# CONFIG_SCHEDSTATS is not set +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set +# CONFIG_DEBUG_PREEMPT is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +CONFIG_DEBUG_ATOMIC_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y + +# +# Debug kernel data structures +# +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +CONFIG_DEBUG_SG=y +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=65 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_RCU_STRICT_GRACE_PERIOD is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACER_MAX_TRACE=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_BOOTTIME_TRACING is not set +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_PREEMPT_TRACER is not set +CONFIG_SCHED_TRACER=y +# CONFIG_HWLAT_TRACER is not set +# CONFIG_OSNOISE_TRACER is not set +# CONFIG_TIMERLAT_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +CONFIG_TRACER_SNAPSHOT=y +# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set +CONFIG_BRANCH_PROFILE_NONE=y +CONFIG_KPROBE_EVENTS=y +CONFIG_UPROBE_EVENTS=y +CONFIG_DYNAMIC_EVENTS=y +CONFIG_PROBE_EVENTS=y +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +CONFIG_IO_STRICT_DEVMEM=y +CONFIG_FUNCTION_ERROR_INJECTION=y +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093.dts b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093.dts new file mode 100644 index 0000000000000000000000000000000000000000..a5e2950e2db4ac624f28d61e9ec5024fb2a0cea1 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093.dts @@ -0,0 +1,752 @@ +/** + * dtsi file for Hisilicon Hi3093 Product Board + * + * Copyright (c) Hisilicon Technologies Co., Ltd. 2021-2031. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + * + */ +/dts-v1/; + +/ { + #address-cells = <0x2>; + #size-cells = <0x2>; + model = "Hisilicon Hi1711 ASIC"; + compatible = "hisilicon, hi1711_asic"; + interrupt-parent = <&gic>; + + aliases { + serial0 = &uart0; + }; + + chosen { + bootargs = "console=ttyS0,115200n8N earlycon=uart8250,mmio32,0x08710000 initrd=${initrd_load_addr},${initrd_size} rdinit=/sbin/init rw ekbox=0x20000$0x84be0000 kbox_mem=0x2e0000@0x84900000 swift_irqsoff_enable ramdisk_size=655360 quiet"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x40000000>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x000>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x100>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x200>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x300>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + }; + + cpu_extra_info { + compatible = "cpu_info,extra_info"; + cpu_desc = "1711"; + }; + + gic: interrupt-controller@24000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + interrupt-controller; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + reg = <0x0 0x24000000 0x0 0x10000>, /*GICD*/ + <0x0 0x24040000 0x0 0x80000>; /*GICR (cpu0-cpu3)*/ + interrupts = <0x1 0x9 0xff04>; + }; + + rtos_softdog { + compatible = "rtos-wtd-config"; + softdog-enable = <1>; + }; + + fiq_glue@0x2000B000 { + compatible = "arm,hisi_fiq"; + fiq_source = "GIC"; + fiq_type = "1-N"; + dead_loop = <1>; + need_invalid_cache = <1>; + fiq_nums = <1>; + interrupts = <0 109 3>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0xc0000000>; + }; + + + timer { + compatible = "arm,armv8-timer"; + interrupts = <0x1 0xd 0xff08>, + <0x1 0xe 0xff08>, + <0x1 0xb 0xff08>, + <0x1 0xa 0xff08>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0x1 0x7 0x4>; + }; + + bmcrtc: rtc@0 { + compatible = "hisilicon,bmcrtc"; + reg = <0x0 0x0875A000 0x0 0x1000>; + }; + + reboot_handler@0 { + compatible = "hisilicon,hisi-reboot"; + reg = <0x0 0x08740000 0x0 0x1000>; + reboot-offset = <0x148>; + reboot-value = <0x8>; + }; + + mmc@08630000 { + compatible = "hisilicon,hi1711-emmc"; + reg = <0x0 0x08630000 0x0 0x1000>, + <0x0 0x0871D000 0x0 0x1000>; + interrupts = <0x0 136 0x4>, + <0x0 42 0x4>; + }; + + sdio@08610000 { + compatible = "hisilicon,hi1711-sdio"; + reg = <0x0 0x08610000 0x0 0x1000>; + interrupts = <0x0 138 0x4>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + hi1711_refclk: refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + uart0: uart@08710000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x08710000 0x0 0x1000>;/*UART2*/ + reg-io-width = <4>; + reg-shift = <2>; + clock-frequency = <100000000>; + clock-names = "apb_pclk"; + interrupts = <0 58 4>; + current-speed = <0x1c200>; + }; + + uart_core: uart_core { + compatible = "hisilicon,hisi-uart-core"; + reg = <0x0 0x0871D000 0x0 0x1000>; + clock-frequency = <100000000>; + }; + + uart1: uart@08711000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x08711000 0x0 0x1000>;/*UART3*/ + interrupts = <0 59 4>; + port-no = <3>; + }; + + uart2: uart@08743000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x08743000 0x0 0x1000>;/*UART4*/ + interrupts = <0 60 4>; + port-no = <4>; + }; + + uart3: uart@08744000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x08744000 0x0 0x1000>;/*UART5*/ + interrupts = <0 61 4>; + port-no = <5>; + }; + + uart4: uart@0875D000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x0875D000 0x0 0x1000>;/*UART6*/ + interrupts = <0 62 4>; + port-no = <6>; + }; + + uart5: uart@0875E000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x0875E000 0x0 0x1000>;/*UART7*/ + interrupts = <0 63 4>; + port-no = <7>; + }; + + timer0@08700000 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x0>; + reg = <0x0 0x08700000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 143 4>; + }; + + timer1@08700040 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x1>; + reg = <0x0 0x08700040 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 144 4>; + }; + + timer2@08702000 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x2>; + reg = <0x0 0x08702000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 145 4>; + }; + + timer3@08702040 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x3>; + reg = <0x0 0x08702040 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 146 4>; + }; + + timer4@08704000 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x4>; + reg = <0x0 0x08704000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 147 4>; + }; + + timer5@08704040 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x5>; + reg = <0x0 0x08704040 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 148 4>; + }; + + m3test@08740100 { + compatible = "hisilicon,hisi-m3test"; + interrupts = <0 227 4>; + }; + + comm@08740000 { + compatible = "hisilicon, hi1711-comm"; + interrupts = <0 43 4>, /* cpll_dlock_int */ + <0 44 4>, /* pll0_dlock_int */ + <0 45 4>, /* pll1_dlock_int */ + <0 46 4>, /* pll2_dlock_int */ + <0 219 4>, /* dac_cable_int */ + <0 179 4>, /* host_rst_pos_int */ + <0 224 4>, /* host_rst_fall_int */ + <0 180 4>, /* pcie0_rst_pos_int */ + <0 212 4>, /* pcie0_rst_fall_int */ + <0 181 4>, /* pcie1_rst_pos_int */ + <0 220 4>, /* pcie1_rst_fall_int */ + <0 41 4>, /* hp_ecc_err_int */ + <0 42 4>; /* lp_ecc_err_int */ + }; + + gpio@2001e000 { + compatible = "hisilicon,hi1711-gpio"; + reg = <0x0 0x0874a000 0x0 0x5000>; + interrupts = <0x0 149 0x4>, /*-32*/ + <0x0 150 0x4>, + <0x0 151 0x4>, + <0x0 152 0x4>, + <0x0 153 0x4>; + }; + + i2c@2000d000 { + compatible = "hisilicon,hi1711-i2c"; + reg = <0x0 0x08707000 0x0 0x1000>, + <0x0 0x08708000 0x0 0x1000>, + <0x0 0x08709000 0x0 0x1000>, + <0x0 0x0870a000 0x0 0x1000>, + <0x0 0x0870b000 0x0 0x1000>, + <0x0 0x0870c000 0x0 0x1000>, + <0x0 0x0870d000 0x0 0x1000>, + <0x0 0x0870e000 0x0 0x1000>, + <0x0 0x08750000 0x0 0x1000>, + <0x0 0x08751000 0x0 0x1000>, + <0x0 0x08752000 0x0 0x1000>, + <0x0 0x08753000 0x0 0x1000>, + <0x0 0x08754000 0x0 0x1000>, + <0x0 0x08755000 0x0 0x1000>, + <0x0 0x08756000 0x0 0x1000>, + <0x0 0x08757000 0x0 0x1000>, + <0x0 0x08745000 0x0 0x1000>, + <0x0 0x0876e000 0x0 0x1000>;/*0-15 i2creg ,16 ioconfig-T,17 ioconfig-R*/ + interrupts = <0x0 72 0x4>, + <0x0 73 0x4>, + <0x0 74 0x4>, + <0x0 75 0x4>, + <0x0 76 0x4>, + <0x0 77 0x4>, + <0x0 78 0x4>, + <0x0 79 0x4>, + <0x0 80 0x4>, + <0x0 81 0x4>, + <0x0 82 0x4>, + <0x0 83 0x4>, + <0x0 84 0x4>, + <0x0 85 0x4>, + <0x0 86 0x4>, + <0x0 87 0x4>;/*0-15*/ + }; + + smbus@0x08707000 { + compatible = "hisilicon,hi1711-smbus"; + reg = <0x0 0x08707000 0x0 0x1000>, + <0x0 0x08708000 0x0 0x1000>, + <0x0 0x08709000 0x0 0x1000>, + <0x0 0x0870a000 0x0 0x1000>, + <0x0 0x0870b000 0x0 0x1000>, + <0x0 0x0870c000 0x0 0x1000>, + <0x0 0x0870d000 0x0 0x1000>, + <0x0 0x0870e000 0x0 0x1000>, + <0x0 0x08750000 0x0 0x1000>, + <0x0 0x08751000 0x0 0x1000>, + <0x0 0x08752000 0x0 0x1000>, + <0x0 0x08753000 0x0 0x1000>, + <0x0 0x08754000 0x0 0x1000>, + <0x0 0x08755000 0x0 0x1000>, + <0x0 0x08756000 0x0 0x1000>, + <0x0 0x08757000 0x0 0x1000>, + <0x0 0x08745000 0x0 0x1000>, + <0x0 0x08740000 0x0 0x1000>;/*0-15 smbusreg ,16 ioconfig,17 sysctrl*/ + interrupts = <0x0 72 0x4>, + <0x0 73 0x4>, + <0x0 74 0x4>, + <0x0 75 0x4>, + <0x0 76 0x4>, + <0x0 77 0x4>, + <0x0 78 0x4>, + <0x0 79 0x4>, + <0x0 80 0x4>, + <0x0 81 0x4>, + <0x0 82 0x4>, + <0x0 83 0x4>, + <0x0 84 0x4>, + <0x0 85 0x4>, + <0x0 86 0x4>, + <0x0 87 0x4>;/*0-15*/ + }; + + sfc0@8640000 { + compatible = "hisilicon,hi1711-sfc0"; + reg = <0x0 0x08640000 0x0 0x8000>, + <0x0 0x60000000 0x0 0x10000000>;/*0 sfc0 reg,1 sfc0 cs0 cs1 buf 256MB*/ + sfccsid = <3>;/*cs0 used bit0, cs1 bit1*/ + busid = <0>; + use_hw_lock = <1>;/*0-not use, 1-use*/ + hw_lock_id = <4>; + interrupts = <0x0 159 0x4>; + }; + + sfc1@8600000 { + compatible = "hisilicon,hi1711-sfc1"; + reg = <0x0 0x08600000 0x0 0x8000>, + <0x0 0x70000000 0x0 0x10000000>;/*0 sfc1 reg,1 sfc1 cs0 cs1 buf 256MB*/ + sfccsid = <3>;/*cs0 used bit0, cs1 bit1*/ + busid = <1>; + use_hw_lock = <1>;/*0-not use, 1-use*/ + hw_lock_id = <5>; + interrupts = <0x0 112 0x4>; + }; + + spi0@08713000 { + compatible = "hisilicon,hisi-spi"; + ctlid = /bits/ 32 <0x0>; /*controler not use*/ + reg = <0x0 0x08713000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0: FPGA freq, 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 114 4>; + }; + + spi1@08713000 { + compatible = "hisilicon,hisi-spi"; + ctlid = /bits/ 32 <0x1>; /*not use*/ + reg = <0x0 0x08715000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0: FPGA freq, 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 139 4>; + }; + + pwm@08759000{ + compatible = "hisilicon, hi1711-pwm"; + reg = <0x0 0x08759000 0x0 0x1000>, + <0x0 0x08745000 0x0 0x1000>;/*reg0,reg1,io config*/ + interrupts = <0 115 4>, + <0 141 4>; /*147-32,173-32*/ + }; + + ipmb@0x8716000{ + compatible = "hisilicon,hi1711-ipmb"; + reg = <0x0 0x8716000 0x0 0x1000>, + <0x0 0x8717000 0x0 0x1000>, + <0x0 0x8718000 0x0 0x1000>, + <0x0 0x8719000 0x0 0x1000>; + interrupts = <0 132 4>, + <0 133 4>, + <0 134 4>, + <0 135 4>; /*(164-167)-32*/ + }; + + peci@08746000{ + compatible = "hisilicon, hi1711-peci"; + reg = <0x0 0x0876b000 0x0 0x1000>, + <0x0 0x08746000 0x0 0x1000>; + interrupts = <0 37 4>, + <0 127 4>; + }; + + dmac@08714000{ + compatible = "hisilicon, hi1711-dmac"; + reg = <0x0 0x08714000 0x0 0x1000>; + interrupts = <0 116 4>; + }; + + norflash@30000000{ + compatible = "hisilicon, physmap-norflash"; + reg = <0x0 0x30000000 0x0 0x08000000>; + flash-no = <1>; + flash_width = <2>; + }; + + cpld@08748000{ + compatible = "hisilicon, hi1711-cpld"; + reg = <0x0 0x08748000 0x0 0x1000>, + <0x0 0x08749000 0x0 0x1000>, + <0x0 0x40000000 0x0 0x1000>; + interrupts = <0 128 4>, + <0 129 4>; + }; + + watchdog@08763000{ + compatible = "hisilicon, hi1711-watchdog"; + reg = <0x0 0x08763000 0x0 0x1000>, + <0x0 0x08764000 0x0 0x1000>, + <0x0 0x08765000 0x0 0x1000>, + <0x0 0x08766000 0x0 0x1000>, + <0x0 0x08767000 0x0 0x1000>, + <0x0 0x08768000 0x0 0x1000>; + }; + + kcs@0x08722000{ + compatible = "hisilicon, hi1711-kcs"; + reg = <0x0 0x08722000 0x0 0x1000>, + <0x0 0x08723000 0x0 0x1000>, + <0x0 0x08724000 0x0 0x1000>, + <0x0 0x08725000 0x0 0x1000>, + <0x0 0x08732000 0x0 0x1000>, + <0x0 0x08733000 0x0 0x1000>, + <0x0 0x08734000 0x0 0x1000>, + <0x0 0x08735000 0x0 0x1000>; + interrupts = <0 120 4>, + <0 121 4>, + <0 122 4>, + <0 123 4>, + <0 88 4>, + <0 89 4>, + <0 90 4>, + <0 91 4>; + }; + + wdi@08726000{ + compatible = "hisilicon, hi1711-wdi"; + reg = <0x0 0x08726000 0x0 0x1000>, + <0x0 0x08736000 0x0 0x1000>; + }; + + bt@08727000{ + compatible = "hisilicon, hi1711-bt"; + reg = <0x0 0x08727000 0x0 0x1000>, + <0x0 0x08728000 0x0 0x1000>, + <0x0 0x08737000 0x0 0x1000>, + <0x0 0x08738000 0x0 0x1000>; + interrupts = <0 124 4>, + <0 125 4>, + <0 92 4>, + <0 93 4>; + }; + + sol@0872c000{ + compatible = "hisilicon, hi1711-sol"; + reg = <0x0 0x0872c000 0x0 0x1000>, + <0x0 0x0873c000 0x0 0x1000>, + <0x0 0x08710800 0x0 0x1000>, + <0x0 0x08711800 0x0 0x1000>, + <0x0 0x08743800 0x0 0x1000>; + interrupts = <0 130 4>, + <0 96 4>, + <0 64 4>, + <0 65 4>, + <0 66 4>; + }; + + p80@08721000{ + compatible = "hisilicon, hi1711-p80"; + reg = <0x0 0x08721000 0x0 0x1000>, + <0x0 0x08731000 0x0 0x1000>; + }; + + mailbox@08729000{ + compatible = "hisilicon, hi1711-mailbox"; + reg = <0x0 0x08729000 0x0 0x1000>, + <0x0 0x08739000 0x0 0x1000>; + interrupts = <0 126 4>, + <0 94 4>; + }; + + sgpio@08761000{ + compatible = "hisilicon, hi1711-sgpio"; + reg = <0x0 0x08761000 0x0 0x1000>, + <0x0 0x08762000 0x0 0x1000>; + interrupts = <0 48 4>, + <0 49 4>; + }; + + adc@08769000{ + compatible = "hisilicon, hi1711-adc"; + reg = <0x0 0x08769000 0x0 0x1000>, + <0x0 0x0876a000 0x0 0x1000>; + interrupts = <0 35 4>, + <0 36 4>; + }; + + localbus@08712000{ + compatible = "hisilicon, hi1711-localbus"; + reg = <0x0 0x8712000 0x0 0x1000>; + interrupts = <0x0 111 0x4>; + }; + + espi@08730000{ + compatible = "hisilicon, hi1711-espi"; + reg = <0x0 0x08730000 0x0 0x1000>; + interrupts = <0 97 4>, + <0 100 4>; + }; + + canbus@08741000{ + compatible = "hisilicon, hi1711-canbus"; + reg = <0x0 0x08741000 0x0 0x1000>, + <0x0 0x08742000 0x0 0x1000>; + interrupts = <0 118 4>, + <0 119 4>; + }; + + mdio@08747000{ + compatible = "hisilicon, hi1711-mdio"; + reg = <0x0 0x08747000 0x0 0x1000>; + interrupts = <0x0 137 0x4>; + }; + + gmac@cd000000 { + compatible = "hisilicon, hi1711_gmac_net"; + reg = <0x0 0xcd00000 0x0 0x1000>, + <0x0 0xcd01000 0x0 0x1000>, + <0x0 0xcd02000 0x0 0x1000>, + <0x0 0xcd03000 0x0 0x1000>; + interrupts = <0x0 52 0x4>, + <0x0 53 0x4>, + <0x0 54 0x4>, + <0x0 55 0x4>; + phy_addr = <0x07000302>; + }; + + usb2_0: usb2_0@08800000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x08800000 0x0 0x10000>, + <0x0 0x08b00000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 187 0x4>; + dr_mode = "peripheral"; + controller_index = "0"; + }; + + dwc3@08800000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08800000 0x0 0x10000>; + interrupts = <0x0 184 0x4>; + maximum-speed = "high-speed"; + dr_mode = "peripheral"; + }; + + usb2_1: usb2_1@08900000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x08900000 0x0 0x10000>, + <0x0 0x08b02000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 188 0x4>; + dr_mode = "peripheral"; + controller_index = "1"; + }; + + dwc3@08900000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08900000 0x0 0x10000>; + interrupts = <0x0 185 0x4>; + maximum-speed = "high-speed"; + dr_mode = "peripheral"; + }; + + usb2_2: usb2_2@08a00000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x08a00000 0x0 0x10000>, + <0x0 0x08b04000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 189 0x4>; + dr_mode = "otg"; + controller_index = "2"; + }; + + dwc3@08a00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08a00000 0x0 0x10000>; + interrupts = <0x0 186 0x4>; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + + usb3: usb3@0cc00000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x0cc00000 0x0 0x10000>, + <0x0 0x0cd06000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 191 0x4>; + dr_mode = "otg"; + controller_index = "3"; + }; + + dwc3@0cc00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x0cc00000 0x0 0x10000>, + <0x0 0x0cd06000 0x0 0x2000>; + interrupts = <0x0 190 0x4>; + maximum-speed = "super-speed"; + dr_mode = "otg"; + }; + + ddrc@08780000 { + compatible = "hisilicon, hi1711-ddrc"; + reg = <0x0 0x08780000 0x0 0x10000>; + interrupts = <0x0 200 0x4>, + <0x0 201 0x4>; + }; + + trng@0876c000 { + compatible = "hisilicon, hi1711-trng"; + reg = <0x0 0x0876c000 0x0 0x10000>; + interrupts = <0x0 39 0x4>; + }; + + pci_fix@08B21000 { + compatible = "hisilicon,hi1711-pci_fix"; + reg = <0x0 0xCD0C000 0x0 0x100>,/*HI1711_HP_SUB_BASE*/ + <0x0 0x8B20000 0x0 0x100>,/*HI1711_HOST_SUBSYS_BASE*/ + <0x0 0x8B21000 0x0 0x100>,/*HI1711_PCI0_MISC_BASE*/ + <0x0 0xCD0E000 0x0 0x100>,/*HI1711_PCI1_MISC_BASE*/ + <0x0 0x8B10000 0x0 0x1000>,/*HI1711_PCI0_DM_BASE*/ + <0x0 0xCD10000 0x0 0x1000>,/*HI1711_PCI1_DM_BASE*/ + <0x0 0x8B06000 0x0 0x1000>,/*HI1711_PCI0_PCS_BASE*/ + <0x0 0xCD08000 0x0 0x1000>;/*HI1711_PCI1_PCS_BASE*/ + interrupts = <0x0 208 0x4>,/*PCIE0 linkdown irq*/ + <0x0 216 0x4>;/*PCIE1 linkdown irq*/ + }; + + bmc_driver@CD10000 { + compatible = "hisilicon,hi1711-bmc_driver"; + reg = <0x0 0xCD10000 0x0 0x1000>,/*HI1711_PCI1_DM_BASE*/ + <0x0 0xCD0E000 0x0 0x1000>; + interrupts = <0x0 218 0x4>;/*pcie1 edma irq*/ + }; + + bmc_vnet_driver@CD10000 { + compatible = "hisilicon,hi1711-bmc_vnet_driver"; + reg = <0x0 0xCD10000 0x0 0x1000>,/*HI1711_PCI1_DM_BASE*/ + <0x0 0xCD0E000 0x0 0x1000>; + interrupts = <0x0 131 0x4>;/*h2b_edma_int*/ + }; + + mctp@1C00A000{ + compatible = "hisilicon,hi1711-mctp_driver"; + reg = <0x0 0xcd05000 0x0 0x100>; + interrupts = <0x0 117 0x4>;/*mctp irq*/ + }; + + vce@08b0c000{ + compatible = "hisilicon,hi1711-vce_driver"; + reg = <0x0 0x08b0c000 0x0 0x4000>; + interrupts = <0x0 113 0x4>;/*vce irq*/ + }; + + pci_rst_int@08740000 { + compatible = "hisilicon,hi1711-pcie_rst_driver"; + interrupts = <0x0 220 0x4>, + <0x0 212 0x4>, + <0x0 181 0x4>, + <0x0 180 0x4>; + }; + + hwlock@08740000 { + compatible = "hisilicon,hi1711-hwlock"; + interrupts = <0x0 38 0x4>; + }; + + pcie@0xCD0E000 { + compatible = "hisilicon,hip-pcie"; + reg = <0 0xCD0E000 0 0x100>, <0 0x0CD10000 0 0x1000>, + <0 0xCD08000 0 0x2000>, <0 0x23D00000 0 0x200000>; + reg-names = "misc", "rc_dbi", "pcs", "config"; + interrupts = <0x0 216 0x4>,//PCIE1 linkdown irq// + <0x0 221 0x4>;//PCIE1 msi(intb) irq// + bus-range = <0x0 0xff>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x02000000 0 0x1C000000 0x0 0x1C000000 0 0x7c00000>, + <0x01000000 0 0x0 0 0x23C00000 0 0x100000>; + num-lanes = <1>; + port-id = <0>; + status = "ok"; + }; + + msg_scm3@08740000 { + compatible = "hisilicon, hi1711-msg_scm3"; + interrupts = <0 225 4>;/*inter core communication from secure M3*/ + }; + }; +}; + diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_2with2.dts b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_2with2.dts new file mode 100644 index 0000000000000000000000000000000000000000..5e293a0e78e0a29586c18cf4d71e6a420788e60d --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_2with2.dts @@ -0,0 +1,796 @@ +/** + * dtsi file for Hisilicon Hi3093 Product Board + * + * Copyright (c) Hisilicon Technologies Co., Ltd. 2021-2031. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + * + */ +/dts-v1/; + +/ { + #address-cells = <0x2>; + #size-cells = <0x2>; + model = "Hisilicon Hi1711 ASIC"; + compatible = "hisilicon, hi1711_asic"; + interrupt-parent = <&gic>; + + aliases { + serial0 = &uart0; + }; + + chosen { + bootargs = "console=ttyS0,115200n8N earlycon=uart8250,mmio32,0x08710000 initrd=${initrd_load_addr},${initrd_size} rdinit=/sbin/init rw ekbox=0x20000$0x84be0000 kbox_mem=0x2e0000@0x84900000 swift_irqsoff_enable ramdisk_size=655360 quiet maxcpus=2"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x40000000>; + }; + + reserved-memory { + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + + client_os_reserved: client_os_reserved@93000000 { + reg = <0x00 0x93000000 0x00 0x4000000>; + no-map; + }; + + client_os_dma_memory_region: client_os-dma-memory@90000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x90000000 0x00 0x3000000>; + no-map; + }; + }; + + mcs-remoteproc { + compatible = "oe,mcs_remoteproc"; + memory-region = <&client_os_dma_memory_region>, + <&client_os_reserved>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x000>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x100>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x200>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x300>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + }; + + cpu_extra_info { + compatible = "cpu_info,extra_info"; + cpu_desc = "1711"; + }; + + gic: interrupt-controller@24000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + interrupt-controller; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + reg = <0x0 0x24000000 0x0 0x10000>, /*GICD*/ + <0x0 0x24040000 0x0 0x80000>; /*GICR (cpu0-cpu3)*/ + interrupts = <0x1 0x9 0xff04>; + }; + + rtos_softdog { + compatible = "rtos-wtd-config"; + softdog-enable = <1>; + }; + + fiq_glue@0x2000B000 { + compatible = "arm,hisi_fiq"; + fiq_source = "GIC"; + fiq_type = "1-N"; + dead_loop = <1>; + need_invalid_cache = <1>; + fiq_nums = <1>; + interrupts = <0 109 3>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0xc0000000>; + }; + + + timer { + compatible = "arm,armv8-timer"; + interrupts = <0x1 0xd 0xff08>, + <0x1 0xe 0xff08>, + <0x1 0xb 0xff08>, + <0x1 0xa 0xff08>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0x1 0x7 0x4>; + }; + + bmcrtc: rtc@0 { + compatible = "hisilicon,bmcrtc"; + reg = <0x0 0x0875A000 0x0 0x1000>; + }; + + reboot_handler@0 { + compatible = "hisilicon,hisi-reboot"; + reg = <0x0 0x08740000 0x0 0x1000>; + reboot-offset = <0x148>; + reboot-value = <0x8>; + }; + + mmc@08630000 { + compatible = "hisilicon,hi1711-emmc"; + reg = <0x0 0x08630000 0x0 0x1000>, + <0x0 0x0871D000 0x0 0x1000>; + interrupts = <0x0 136 0x4>, + <0x0 42 0x4>; + }; + + sdio@08610000 { + compatible = "hisilicon,hi1711-sdio"; + reg = <0x0 0x08610000 0x0 0x1000>; + interrupts = <0x0 138 0x4>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + hi1711_refclk: refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + uart0: uart0@08710000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x08710000 0x0 0x1000>;/*UART2*/ + reg-io-width = <4>; + reg-shift = <2>; + clock-frequency = <100000000>; + clock-names = "apb_pclk"; + interrupts = <0 58 4>; + current-speed = <0x1c200>; + domain=<0x0>; + }; + + uart_core: uart_core { + compatible = "hisilicon,hisi-uart-core"; + reg = <0x0 0x0871D000 0x0 0x1000>; + clock-frequency = <100000000>; + domain=<0x0>; + }; + + uart1: uart1@08711000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x08711000 0x0 0x1000>;/*UART3*/ + interrupts = <0 59 4>; + port-no = <3>; + domain=<0x0>; + }; + + uart2: uart2@08743000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x08743000 0x0 0x1000>;/*UART4*/ + interrupts = <0 60 4>; + port-no = <4>; + domain=<0x1>; + }; + + uart3: uart3@08744000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x08744000 0x0 0x1000>;/*UART5*/ + interrupts = <0 61 4>; + port-no = <5>; + domain=<0x1>; + }; + + uart4: uart4@0875D000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x0875D000 0x0 0x1000>;/*UART6*/ + interrupts = <0 62 4>; + port-no = <6>; + domain=<0x1>; + }; + + uart5: uart5@0875E000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x0875E000 0x0 0x1000>;/*UART7*/ + interrupts = <0 63 4>; + port-no = <7>; + domain=<0x0>; + }; + + timer0@08700000 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x0>; + reg = <0x0 0x08700000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 143 4>; + domain=<0x0>; + }; + + timer1@08700040 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x1>; + reg = <0x0 0x08700040 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 144 4>; + domain=<0x0>; + }; + + timer2@08702000 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x2>; + reg = <0x0 0x08702000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 145 4>; + domain=<0x0>; + }; + + timer3@08702040 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x3>; + reg = <0x0 0x08702040 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 146 4>; + domain=<0x1>; + }; + + timer4@08704000 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x4>; + reg = <0x0 0x08704000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 147 4>; + domain=<0x1>; + }; + + timer5@08704040 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x5>; + reg = <0x0 0x08704040 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 148 4>; + domain=<0x1>; + }; + + m3test@08740100 { + compatible = "hisilicon,hisi-m3test"; + interrupts = <0 227 4>; + }; + + comm@08740000 { + compatible = "hisilicon, hi1711-comm"; + interrupts = <0 43 4>, /* cpll_dlock_int */ + <0 44 4>, /* pll0_dlock_int */ + <0 45 4>, /* pll1_dlock_int */ + <0 46 4>, /* pll2_dlock_int */ + <0 219 4>, /* dac_cable_int */ + <0 179 4>, /* host_rst_pos_int */ + <0 224 4>, /* host_rst_fall_int */ + <0 180 4>, /* pcie0_rst_pos_int */ + <0 212 4>, /* pcie0_rst_fall_int */ + <0 181 4>, /* pcie1_rst_pos_int */ + <0 220 4>, /* pcie1_rst_fall_int */ + <0 41 4>, /* hp_ecc_err_int */ + <0 42 4>; /* lp_ecc_err_int */ + }; + + gpio@2001e000 { + compatible = "hisilicon,hi1711-gpio"; + reg = <0x0 0x0874a000 0x0 0x5000>; + interrupts = <0x0 149 0x4>, /*-32*/ + <0x0 150 0x4>, + <0x0 151 0x4>, + <0x0 152 0x4>, + <0x0 153 0x4>; + domain=<0x1 0x1 0x1 0x1 0x0>; + }; + + i2c@2000d000 { + compatible = "hisilicon,hi1711-i2c"; + reg = <0x0 0x08707000 0x0 0x1000>, + <0x0 0x08708000 0x0 0x1000>, + <0x0 0x08709000 0x0 0x1000>, + <0x0 0x0870a000 0x0 0x1000>, + <0x0 0x0870b000 0x0 0x1000>, + <0x0 0x0870c000 0x0 0x1000>, + <0x0 0x0870d000 0x0 0x1000>, + <0x0 0x0870e000 0x0 0x1000>, + <0x0 0x08750000 0x0 0x1000>, + <0x0 0x08751000 0x0 0x1000>, + <0x0 0x08752000 0x0 0x1000>, + <0x0 0x08753000 0x0 0x1000>, + <0x0 0x08754000 0x0 0x1000>, + <0x0 0x08755000 0x0 0x1000>, + <0x0 0x08756000 0x0 0x1000>, + <0x0 0x08757000 0x0 0x1000>, + <0x0 0x08745000 0x0 0x1000>, + <0x0 0x0876e000 0x0 0x1000>;/*0-15 i2creg ,16 ioconfig-T,17 ioconfig-R*/ + interrupts = <0x0 72 0x4>, + <0x0 73 0x4>, + <0x0 74 0x4>, + <0x0 75 0x4>, + <0x0 76 0x4>, + <0x0 77 0x4>, + <0x0 78 0x4>, + <0x0 79 0x4>, + <0x0 80 0x4>, + <0x0 81 0x4>, + <0x0 82 0x4>, + <0x0 83 0x4>, + <0x0 84 0x4>, + <0x0 85 0x4>, + <0x0 86 0x4>, + <0x0 87 0x4>;/*0-15*/ + domain=<0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1>; + }; + + smbus@0x08707000 { + compatible = "hisilicon,hi1711-smbus"; + reg = <0x0 0x08707000 0x0 0x1000>, + <0x0 0x08708000 0x0 0x1000>, + <0x0 0x08709000 0x0 0x1000>, + <0x0 0x0870a000 0x0 0x1000>, + <0x0 0x0870b000 0x0 0x1000>, + <0x0 0x0870c000 0x0 0x1000>, + <0x0 0x0870d000 0x0 0x1000>, + <0x0 0x0870e000 0x0 0x1000>, + <0x0 0x08750000 0x0 0x1000>, + <0x0 0x08751000 0x0 0x1000>, + <0x0 0x08752000 0x0 0x1000>, + <0x0 0x08753000 0x0 0x1000>, + <0x0 0x08754000 0x0 0x1000>, + <0x0 0x08755000 0x0 0x1000>, + <0x0 0x08756000 0x0 0x1000>, + <0x0 0x08757000 0x0 0x1000>, + <0x0 0x08745000 0x0 0x1000>, + <0x0 0x08740000 0x0 0x1000>;/*0-15 smbusreg ,16 ioconfig,17 sysctrl*/ + interrupts = <0x0 72 0x4>, + <0x0 73 0x4>, + <0x0 74 0x4>, + <0x0 75 0x4>, + <0x0 76 0x4>, + <0x0 77 0x4>, + <0x0 78 0x4>, + <0x0 79 0x4>, + <0x0 80 0x4>, + <0x0 81 0x4>, + <0x0 82 0x4>, + <0x0 83 0x4>, + <0x0 84 0x4>, + <0x0 85 0x4>, + <0x0 86 0x4>, + <0x0 87 0x4>;/*0-15*/ + }; + + sfc0@8640000 { + compatible = "hisilicon,hi1711-sfc0"; + reg = <0x0 0x08640000 0x0 0x8000>, + <0x0 0x60000000 0x0 0x10000000>;/*0 sfc0 reg,1 sfc0 cs0 cs1 buf 256MB*/ + sfccsid = <3>;/*cs0 used bit0, cs1 bit1*/ + busid = <0>; + use_hw_lock = <1>;/*0-not use, 1-use*/ + hw_lock_id = <4>; + interrupts = <0x0 159 0x4>; + }; + + sfc1@8600000 { + compatible = "hisilicon,hi1711-sfc1"; + reg = <0x0 0x08600000 0x0 0x8000>, + <0x0 0x70000000 0x0 0x10000000>;/*0 sfc1 reg,1 sfc1 cs0 cs1 buf 256MB*/ + sfccsid = <3>;/*cs0 used bit0, cs1 bit1*/ + busid = <1>; + use_hw_lock = <1>;/*0-not use, 1-use*/ + hw_lock_id = <5>; + interrupts = <0x0 112 0x4>; + }; + + spi0@08713000 { + compatible = "hisilicon,hisi-spi"; + ctlid = /bits/ 32 <0x0>; /*controler not use*/ + reg = <0x0 0x08713000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0: FPGA freq, 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 114 4>; + domain = <0x0>; + }; + + spi1@08713000 { + compatible = "hisilicon,hisi-spi"; + ctlid = /bits/ 32 <0x1>; /*not use*/ + reg = <0x0 0x08715000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0: FPGA freq, 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 139 4>; + domain = <0x1>; + }; + + pwm@08759000{ + compatible = "hisilicon, hi1711-pwm"; + reg = <0x0 0x08759000 0x0 0x1000>, + <0x0 0x08745000 0x0 0x1000>;/*reg0,reg1,io config*/ + interrupts = <0 115 4>, + <0 141 4>; /*147-32,173-32*/ + }; + + ipmb@0x8716000{ + compatible = "hisilicon,hi1711-ipmb"; + reg = <0x0 0x8716000 0x0 0x1000>, + <0x0 0x8717000 0x0 0x1000>, + <0x0 0x8718000 0x0 0x1000>, + <0x0 0x8719000 0x0 0x1000>; + interrupts = <0 132 4>, + <0 133 4>, + <0 134 4>, + <0 135 4>; /*(164-167)-32*/ + }; + + peci@08746000{ + compatible = "hisilicon, hi1711-peci"; + reg = <0x0 0x0876b000 0x0 0x1000>, + <0x0 0x08746000 0x0 0x1000>; + interrupts = <0 37 4>, + <0 127 4>; + }; + + dmac@08714000{ + compatible = "hisilicon, hi1711-dmac"; + reg = <0x0 0x08714000 0x0 0x1000>; + interrupts = <0 116 4>; + channel=<0x0 0x7>; + }; + + norflash@30000000{ + compatible = "hisilicon, physmap-norflash"; + reg = <0x0 0x30000000 0x0 0x08000000>; + flash-no = <1>; + flash_width = <2>; + }; + + cpld@08748000{ + compatible = "hisilicon, hi1711-cpld"; + reg = <0x0 0x08748000 0x0 0x1000>, + <0x0 0x08749000 0x0 0x1000>, + <0x0 0x40000000 0x0 0x1000>; + interrupts = <0 128 4>, + <0 129 4>; + }; + + watchdog@08763000{ + compatible = "hisilicon, hi1711-watchdog"; + reg = <0x0 0x08763000 0x0 0x1000>, + <0x0 0x08764000 0x0 0x1000>, + <0x0 0x08765000 0x0 0x1000>, + <0x0 0x08766000 0x0 0x1000>, + <0x0 0x08767000 0x0 0x1000>, + <0x0 0x08768000 0x0 0x1000>; + domain = <0x0 0x0 0x1 0x1 0x1>; + }; + + kcs@0x08722000{ + compatible = "hisilicon, hi1711-kcs"; + reg = <0x0 0x08722000 0x0 0x1000>, + <0x0 0x08723000 0x0 0x1000>, + <0x0 0x08724000 0x0 0x1000>, + <0x0 0x08725000 0x0 0x1000>, + <0x0 0x08732000 0x0 0x1000>, + <0x0 0x08733000 0x0 0x1000>, + <0x0 0x08734000 0x0 0x1000>, + <0x0 0x08735000 0x0 0x1000>; + interrupts = <0 120 4>, + <0 121 4>, + <0 122 4>, + <0 123 4>, + <0 88 4>, + <0 89 4>, + <0 90 4>, + <0 91 4>; + }; + + wdi@08726000{ + compatible = "hisilicon, hi1711-wdi"; + reg = <0x0 0x08726000 0x0 0x1000>, + <0x0 0x08736000 0x0 0x1000>; + }; + + bt@08727000{ + compatible = "hisilicon, hi1711-bt"; + reg = <0x0 0x08727000 0x0 0x1000>, + <0x0 0x08728000 0x0 0x1000>, + <0x0 0x08737000 0x0 0x1000>, + <0x0 0x08738000 0x0 0x1000>; + interrupts = <0 124 4>, + <0 125 4>, + <0 92 4>, + <0 93 4>; + }; + + sol@0872c000{ + compatible = "hisilicon, hi1711-sol"; + reg = <0x0 0x0872c000 0x0 0x1000>, + <0x0 0x0873c000 0x0 0x1000>, + <0x0 0x08710800 0x0 0x1000>, + <0x0 0x08711800 0x0 0x1000>, + <0x0 0x08743800 0x0 0x1000>; + interrupts = <0 130 4>, + <0 96 4>, + <0 64 4>, + <0 65 4>, + <0 66 4>; + }; + + p80@08721000{ + compatible = "hisilicon, hi1711-p80"; + reg = <0x0 0x08721000 0x0 0x1000>, + <0x0 0x08731000 0x0 0x1000>; + }; + + mailbox@08729000{ + compatible = "hisilicon, hi1711-mailbox"; + reg = <0x0 0x08729000 0x0 0x1000>, + <0x0 0x08739000 0x0 0x1000>; + interrupts = <0 126 4>, + <0 94 4>; + }; + + sgpio@08761000{ + compatible = "hisilicon, hi1711-sgpio"; + reg = <0x0 0x08761000 0x0 0x1000>, + <0x0 0x08762000 0x0 0x1000>; + interrupts = <0 48 4>, + <0 49 4>; + }; + + adc@08769000{ + compatible = "hisilicon, hi1711-adc"; + reg = <0x0 0x08769000 0x0 0x1000>, + <0x0 0x0876a000 0x0 0x1000>; + interrupts = <0 35 4>, + <0 36 4>; + }; + + localbus@08712000{ + compatible = "hisilicon, hi1711-localbus"; + reg = <0x0 0x8712000 0x0 0x1000>; + interrupts = <0x0 111 0x4>; + domain=<0x1>; + }; + + espi@08730000{ + compatible = "hisilicon, hi1711-espi"; + reg = <0x0 0x08730000 0x0 0x1000>; + interrupts = <0 97 4>, + <0 100 4>; + }; + + canbus@08741000{ + compatible = "hisilicon, hi1711-canbus"; + reg = <0x0 0x08741000 0x0 0x1000>, + <0x0 0x08742000 0x0 0x1000>; + interrupts = <0 118 4>, + <0 119 4>; + }; + + mdio@08747000{ + compatible = "hisilicon, hi1711-mdio"; + reg = <0x0 0x08747000 0x0 0x1000>; + interrupts = <0x0 137 0x4>; + }; + + gmac@cd000000 { + compatible = "hisilicon, hi1711_gmac_net"; + reg = <0x0 0xcd00000 0x0 0x1000>, + <0x0 0xcd01000 0x0 0x1000>, + <0x0 0xcd02000 0x0 0x1000>, + <0x0 0xcd03000 0x0 0x1000>; + interrupts = <0x0 52 0x4>, + <0x0 53 0x4>, + <0x0 54 0x4>, + <0x0 55 0x4>; + phy_addr = <0x07000302>; + domain=<0x1 0x0 0x0 0x1>; + }; + + usb2_0: usb2_0@08800000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x08800000 0x0 0x10000>, + <0x0 0x08b00000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 187 0x4>; + dr_mode = "peripheral"; + controller_index = "0"; + }; + + dwc3@08800000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08800000 0x0 0x10000>; + interrupts = <0x0 184 0x4>; + maximum-speed = "high-speed"; + dr_mode = "peripheral"; + }; + + usb2_1: usb2_1@08900000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x08900000 0x0 0x10000>, + <0x0 0x08b02000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 188 0x4>; + dr_mode = "peripheral"; + controller_index = "1"; + }; + + dwc3@08900000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08900000 0x0 0x10000>; + interrupts = <0x0 185 0x4>; + maximum-speed = "high-speed"; + dr_mode = "peripheral"; + }; + + usb2_2: usb2_2@08a00000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x08a00000 0x0 0x10000>, + <0x0 0x08b04000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 189 0x4>; + dr_mode = "otg"; + controller_index = "2"; + }; + + dwc3@08a00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08a00000 0x0 0x10000>; + interrupts = <0x0 186 0x4>; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + + usb3: usb3@0cc00000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x0cc00000 0x0 0x10000>, + <0x0 0x0cd06000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 191 0x4>; + dr_mode = "otg"; + controller_index = "3"; + }; + + dwc3@0cc00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x0cc00000 0x0 0x10000>, + <0x0 0x0cd06000 0x0 0x2000>; + interrupts = <0x0 190 0x4>; + maximum-speed = "super-speed"; + dr_mode = "otg"; + }; + + ddrc@08780000 { + compatible = "hisilicon, hi1711-ddrc"; + reg = <0x0 0x08780000 0x0 0x10000>; + interrupts = <0x0 200 0x4>, + <0x0 201 0x4>; + }; + + trng@0876c000 { + compatible = "hisilicon, hi1711-trng"; + reg = <0x0 0x0876c000 0x0 0x10000>; + interrupts = <0x0 39 0x4>; + }; + + pci_fix@08B21000 { + compatible = "hisilicon,hi1711-pci_fix"; + reg = <0x0 0xCD0C000 0x0 0x100>,/*HI1711_HP_SUB_BASE*/ + <0x0 0x8B20000 0x0 0x100>,/*HI1711_HOST_SUBSYS_BASE*/ + <0x0 0x8B21000 0x0 0x100>,/*HI1711_PCI0_MISC_BASE*/ + <0x0 0xCD0E000 0x0 0x100>,/*HI1711_PCI1_MISC_BASE*/ + <0x0 0x8B10000 0x0 0x1000>,/*HI1711_PCI0_DM_BASE*/ + <0x0 0xCD10000 0x0 0x1000>,/*HI1711_PCI1_DM_BASE*/ + <0x0 0x8B06000 0x0 0x1000>,/*HI1711_PCI0_PCS_BASE*/ + <0x0 0xCD08000 0x0 0x1000>;/*HI1711_PCI1_PCS_BASE*/ + interrupts = <0x0 208 0x4>,/*PCIE0 linkdown irq*/ + <0x0 216 0x4>;/*PCIE1 linkdown irq*/ + }; + + bmc_driver@CD10000 { + compatible = "hisilicon,hi1711-bmc_driver"; + reg = <0x0 0xCD10000 0x0 0x1000>,/*HI1711_PCI1_DM_BASE*/ + <0x0 0xCD0E000 0x0 0x1000>; + interrupts = <0x0 218 0x4>;/*pcie1 edma irq*/ + }; + + bmc_vnet_driver@CD10000 { + compatible = "hisilicon,hi1711-bmc_vnet_driver"; + reg = <0x0 0xCD10000 0x0 0x1000>,/*HI1711_PCI1_DM_BASE*/ + <0x0 0xCD0E000 0x0 0x1000>; + interrupts = <0x0 131 0x4>;/*h2b_edma_int*/ + }; + + mctp@1C00A000{ + compatible = "hisilicon,hi1711-mctp_driver"; + reg = <0x0 0xcd05000 0x0 0x100>; + interrupts = <0x0 117 0x4>;/*mctp irq*/ + }; + + vce@08b0c000{ + compatible = "hisilicon,hi1711-vce_driver"; + reg = <0x0 0x08b0c000 0x0 0x4000>; + interrupts = <0x0 113 0x4>;/*vce irq*/ + }; + + pci_rst_int@08740000 { + compatible = "hisilicon,hi1711-pcie_rst_driver"; + interrupts = <0x0 220 0x4>, + <0x0 212 0x4>, + <0x0 181 0x4>, + <0x0 180 0x4>; + }; + + hwlock@08740000 { + compatible = "hisilicon,hi1711-hwlock"; + interrupts = <0x0 38 0x4>; + }; + + pcie@0xCD0E000 { + compatible = "hisilicon,hip-pcie"; + reg = <0 0xCD0E000 0 0x100>, <0 0x0CD10000 0 0x1000>, + <0 0xCD08000 0 0x2000>, <0 0x23D00000 0 0x200000>; + reg-names = "misc", "rc_dbi", "pcs", "config"; + interrupts = <0x0 216 0x4>,//PCIE1 linkdown irq// + <0x0 221 0x4>;//PCIE1 msi(intb) irq// + bus-range = <0x0 0xff>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x02000000 0 0x1C000000 0x0 0x1C000000 0 0x7c00000>, + <0x01000000 0 0x0 0 0x23C00000 0 0x100000>; + num-lanes = <1>; + port-id = <0>; + status = "ok"; + }; + + msg_scm3@08740000 { + compatible = "hisilicon, hi1711-msg_scm3"; + interrupts = <0 225 4>;/*inter core communication from secure M3*/ + }; + }; +}; + diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_3with1.dts b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_3with1.dts new file mode 100644 index 0000000000000000000000000000000000000000..05f384f15b8e9e6d89bc96b6a21aacf6c3925d75 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_3with1.dts @@ -0,0 +1,796 @@ +/** + * dtsi file for Hisilicon Hi3093 Product Board + * + * Copyright (c) Hisilicon Technologies Co., Ltd. 2021-2031. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + * + */ +/dts-v1/; + +/ { + #address-cells = <0x2>; + #size-cells = <0x2>; + model = "Hisilicon Hi1711 ASIC"; + compatible = "hisilicon, hi1711_asic"; + interrupt-parent = <&gic>; + + aliases { + serial0 = &uart0; + }; + + chosen { + bootargs = "console=ttyS0,115200n8N earlycon=uart8250,mmio32,0x08710000 initrd=${initrd_load_addr},${initrd_size} rdinit=/sbin/init rw ekbox=0x20000$0x84be0000 kbox_mem=0x2e0000@0x84900000 swift_irqsoff_enable ramdisk_size=655360 quiet maxcpus=3"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x40000000>; + }; + + reserved-memory { + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + + client_os_reserved: client_os_reserved@93000000 { + reg = <0x00 0x93000000 0x00 0x4000000>; + no-map; + }; + + client_os_dma_memory_region: client_os-dma-memory@90000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x90000000 0x00 0x3000000>; + no-map; + }; + }; + + mcs-remoteproc { + compatible = "oe,mcs_remoteproc"; + memory-region = <&client_os_dma_memory_region>, + <&client_os_reserved>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x000>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x100>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x200>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x300>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x9807fff8>; + }; + }; + + cpu_extra_info { + compatible = "cpu_info,extra_info"; + cpu_desc = "1711"; + }; + + gic: interrupt-controller@24000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + interrupt-controller; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + reg = <0x0 0x24000000 0x0 0x10000>, /*GICD*/ + <0x0 0x24040000 0x0 0x80000>; /*GICR (cpu0-cpu3)*/ + interrupts = <0x1 0x9 0xff04>; + }; + + rtos_softdog { + compatible = "rtos-wtd-config"; + softdog-enable = <1>; + }; + + fiq_glue@0x2000B000 { + compatible = "arm,hisi_fiq"; + fiq_source = "GIC"; + fiq_type = "1-N"; + dead_loop = <1>; + need_invalid_cache = <1>; + fiq_nums = <1>; + interrupts = <0 109 3>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0xc0000000>; + }; + + + timer { + compatible = "arm,armv8-timer"; + interrupts = <0x1 0xd 0xff08>, + <0x1 0xe 0xff08>, + <0x1 0xb 0xff08>, + <0x1 0xa 0xff08>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0x1 0x7 0x4>; + }; + + bmcrtc: rtc@0 { + compatible = "hisilicon,bmcrtc"; + reg = <0x0 0x0875A000 0x0 0x1000>; + }; + + reboot_handler@0 { + compatible = "hisilicon,hisi-reboot"; + reg = <0x0 0x08740000 0x0 0x1000>; + reboot-offset = <0x148>; + reboot-value = <0x8>; + }; + + mmc@08630000 { + compatible = "hisilicon,hi1711-emmc"; + reg = <0x0 0x08630000 0x0 0x1000>, + <0x0 0x0871D000 0x0 0x1000>; + interrupts = <0x0 136 0x4>, + <0x0 42 0x4>; + }; + + sdio@08610000 { + compatible = "hisilicon,hi1711-sdio"; + reg = <0x0 0x08610000 0x0 0x1000>; + interrupts = <0x0 138 0x4>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + hi1711_refclk: refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + uart0: uart0@08710000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x08710000 0x0 0x1000>;/*UART2*/ + reg-io-width = <4>; + reg-shift = <2>; + clock-frequency = <100000000>; + clock-names = "apb_pclk"; + interrupts = <0 58 4>; + current-speed = <0x1c200>; + domain=<0x0>; + }; + + uart_core: uart_core { + compatible = "hisilicon,hisi-uart-core"; + reg = <0x0 0x0871D000 0x0 0x1000>; + clock-frequency = <100000000>; + domain=<0x0>; + }; + + uart1: uart1@08711000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x08711000 0x0 0x1000>;/*UART3*/ + interrupts = <0 59 4>; + port-no = <3>; + domain=<0x0>; + }; + + uart2: uart2@08743000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x08743000 0x0 0x1000>;/*UART4*/ + interrupts = <0 60 4>; + port-no = <4>; + domain=<0x1>; + }; + + uart3: uart3@08744000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x08744000 0x0 0x1000>;/*UART5*/ + interrupts = <0 61 4>; + port-no = <5>; + domain=<0x1>; + }; + + uart4: uart4@0875D000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x0875D000 0x0 0x1000>;/*UART6*/ + interrupts = <0 62 4>; + port-no = <6>; + domain=<0x1>; + }; + + uart5: uart5@0875E000 { + compatible = "hisilicon,hisi-uart"; + reg = <0x0 0x0875E000 0x0 0x1000>;/*UART7*/ + interrupts = <0 63 4>; + port-no = <7>; + domain=<0x0>; + }; + + timer0@08700000 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x0>; + reg = <0x0 0x08700000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 143 4>; + domain=<0x0>; + }; + + timer1@08700040 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x1>; + reg = <0x0 0x08700040 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 144 4>; + domain=<0x0>; + }; + + timer2@08702000 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x2>; + reg = <0x0 0x08702000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 145 4>; + domain=<0x0>; + }; + + timer3@08702040 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x3>; + reg = <0x0 0x08702040 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 146 4>; + domain=<0x1>; + }; + + timer4@08704000 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x4>; + reg = <0x0 0x08704000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 147 4>; + domain=<0x1>; + }; + + timer5@08704040 { + compatible = "hisilicon,hisi-timer"; + ids = /bits/ 32 <0x5>; + reg = <0x0 0x08704040 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0:use main oscillator freq/64 1: use main scillator freq 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 148 4>; + domain=<0x1>; + }; + + m3test@08740100 { + compatible = "hisilicon,hisi-m3test"; + interrupts = <0 227 4>; + }; + + comm@08740000 { + compatible = "hisilicon, hi1711-comm"; + interrupts = <0 43 4>, /* cpll_dlock_int */ + <0 44 4>, /* pll0_dlock_int */ + <0 45 4>, /* pll1_dlock_int */ + <0 46 4>, /* pll2_dlock_int */ + <0 219 4>, /* dac_cable_int */ + <0 179 4>, /* host_rst_pos_int */ + <0 224 4>, /* host_rst_fall_int */ + <0 180 4>, /* pcie0_rst_pos_int */ + <0 212 4>, /* pcie0_rst_fall_int */ + <0 181 4>, /* pcie1_rst_pos_int */ + <0 220 4>, /* pcie1_rst_fall_int */ + <0 41 4>, /* hp_ecc_err_int */ + <0 42 4>; /* lp_ecc_err_int */ + }; + + gpio@2001e000 { + compatible = "hisilicon,hi1711-gpio"; + reg = <0x0 0x0874a000 0x0 0x5000>; + interrupts = <0x0 149 0x4>, /*-32*/ + <0x0 150 0x4>, + <0x0 151 0x4>, + <0x0 152 0x4>, + <0x0 153 0x4>; + domain=<0x1 0x1 0x1 0x1 0x0>; + }; + + i2c@2000d000 { + compatible = "hisilicon,hi1711-i2c"; + reg = <0x0 0x08707000 0x0 0x1000>, + <0x0 0x08708000 0x0 0x1000>, + <0x0 0x08709000 0x0 0x1000>, + <0x0 0x0870a000 0x0 0x1000>, + <0x0 0x0870b000 0x0 0x1000>, + <0x0 0x0870c000 0x0 0x1000>, + <0x0 0x0870d000 0x0 0x1000>, + <0x0 0x0870e000 0x0 0x1000>, + <0x0 0x08750000 0x0 0x1000>, + <0x0 0x08751000 0x0 0x1000>, + <0x0 0x08752000 0x0 0x1000>, + <0x0 0x08753000 0x0 0x1000>, + <0x0 0x08754000 0x0 0x1000>, + <0x0 0x08755000 0x0 0x1000>, + <0x0 0x08756000 0x0 0x1000>, + <0x0 0x08757000 0x0 0x1000>, + <0x0 0x08745000 0x0 0x1000>, + <0x0 0x0876e000 0x0 0x1000>;/*0-15 i2creg ,16 ioconfig-T,17 ioconfig-R*/ + interrupts = <0x0 72 0x4>, + <0x0 73 0x4>, + <0x0 74 0x4>, + <0x0 75 0x4>, + <0x0 76 0x4>, + <0x0 77 0x4>, + <0x0 78 0x4>, + <0x0 79 0x4>, + <0x0 80 0x4>, + <0x0 81 0x4>, + <0x0 82 0x4>, + <0x0 83 0x4>, + <0x0 84 0x4>, + <0x0 85 0x4>, + <0x0 86 0x4>, + <0x0 87 0x4>;/*0-15*/ + domain=<0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1>; + }; + + smbus@0x08707000 { + compatible = "hisilicon,hi1711-smbus"; + reg = <0x0 0x08707000 0x0 0x1000>, + <0x0 0x08708000 0x0 0x1000>, + <0x0 0x08709000 0x0 0x1000>, + <0x0 0x0870a000 0x0 0x1000>, + <0x0 0x0870b000 0x0 0x1000>, + <0x0 0x0870c000 0x0 0x1000>, + <0x0 0x0870d000 0x0 0x1000>, + <0x0 0x0870e000 0x0 0x1000>, + <0x0 0x08750000 0x0 0x1000>, + <0x0 0x08751000 0x0 0x1000>, + <0x0 0x08752000 0x0 0x1000>, + <0x0 0x08753000 0x0 0x1000>, + <0x0 0x08754000 0x0 0x1000>, + <0x0 0x08755000 0x0 0x1000>, + <0x0 0x08756000 0x0 0x1000>, + <0x0 0x08757000 0x0 0x1000>, + <0x0 0x08745000 0x0 0x1000>, + <0x0 0x08740000 0x0 0x1000>;/*0-15 smbusreg ,16 ioconfig,17 sysctrl*/ + interrupts = <0x0 72 0x4>, + <0x0 73 0x4>, + <0x0 74 0x4>, + <0x0 75 0x4>, + <0x0 76 0x4>, + <0x0 77 0x4>, + <0x0 78 0x4>, + <0x0 79 0x4>, + <0x0 80 0x4>, + <0x0 81 0x4>, + <0x0 82 0x4>, + <0x0 83 0x4>, + <0x0 84 0x4>, + <0x0 85 0x4>, + <0x0 86 0x4>, + <0x0 87 0x4>;/*0-15*/ + }; + + sfc0@8640000 { + compatible = "hisilicon,hi1711-sfc0"; + reg = <0x0 0x08640000 0x0 0x8000>, + <0x0 0x60000000 0x0 0x10000000>;/*0 sfc0 reg,1 sfc0 cs0 cs1 buf 256MB*/ + sfccsid = <3>;/*cs0 used bit0, cs1 bit1*/ + busid = <0>; + use_hw_lock = <1>;/*0-not use, 1-use*/ + hw_lock_id = <4>; + interrupts = <0x0 159 0x4>; + }; + + sfc1@8600000 { + compatible = "hisilicon,hi1711-sfc1"; + reg = <0x0 0x08600000 0x0 0x8000>, + <0x0 0x70000000 0x0 0x10000000>;/*0 sfc1 reg,1 sfc1 cs0 cs1 buf 256MB*/ + sfccsid = <3>;/*cs0 used bit0, cs1 bit1*/ + busid = <1>; + use_hw_lock = <1>;/*0-not use, 1-use*/ + hw_lock_id = <5>; + interrupts = <0x0 112 0x4>; + }; + + spi0@08713000 { + compatible = "hisilicon,hisi-spi"; + ctlid = /bits/ 32 <0x0>; /*controler not use*/ + reg = <0x0 0x08713000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0: FPGA freq, 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 114 4>; + domain = <0x0>; + }; + + spi1@08713000 { + compatible = "hisilicon,hisi-spi"; + ctlid = /bits/ 32 <0x1>; /*not use*/ + reg = <0x0 0x08715000 0x0 0x1000>; + clock-sel = /bits/ 32 <2>; /*0: FPGA freq, 2(or any other value): use bus clock(apb 100mhz)*/ + interrupts = <0 139 4>; + domain = <0x1>; + }; + + pwm@08759000{ + compatible = "hisilicon, hi1711-pwm"; + reg = <0x0 0x08759000 0x0 0x1000>, + <0x0 0x08745000 0x0 0x1000>;/*reg0,reg1,io config*/ + interrupts = <0 115 4>, + <0 141 4>; /*147-32,173-32*/ + }; + + ipmb@0x8716000{ + compatible = "hisilicon,hi1711-ipmb"; + reg = <0x0 0x8716000 0x0 0x1000>, + <0x0 0x8717000 0x0 0x1000>, + <0x0 0x8718000 0x0 0x1000>, + <0x0 0x8719000 0x0 0x1000>; + interrupts = <0 132 4>, + <0 133 4>, + <0 134 4>, + <0 135 4>; /*(164-167)-32*/ + }; + + peci@08746000{ + compatible = "hisilicon, hi1711-peci"; + reg = <0x0 0x0876b000 0x0 0x1000>, + <0x0 0x08746000 0x0 0x1000>; + interrupts = <0 37 4>, + <0 127 4>; + }; + + dmac@08714000{ + compatible = "hisilicon, hi1711-dmac"; + reg = <0x0 0x08714000 0x0 0x1000>; + interrupts = <0 116 4>; + channel=<0x0 0x7>; + }; + + norflash@30000000{ + compatible = "hisilicon, physmap-norflash"; + reg = <0x0 0x30000000 0x0 0x08000000>; + flash-no = <1>; + flash_width = <2>; + }; + + cpld@08748000{ + compatible = "hisilicon, hi1711-cpld"; + reg = <0x0 0x08748000 0x0 0x1000>, + <0x0 0x08749000 0x0 0x1000>, + <0x0 0x40000000 0x0 0x1000>; + interrupts = <0 128 4>, + <0 129 4>; + }; + + watchdog@08763000{ + compatible = "hisilicon, hi1711-watchdog"; + reg = <0x0 0x08763000 0x0 0x1000>, + <0x0 0x08764000 0x0 0x1000>, + <0x0 0x08765000 0x0 0x1000>, + <0x0 0x08766000 0x0 0x1000>, + <0x0 0x08767000 0x0 0x1000>, + <0x0 0x08768000 0x0 0x1000>; + domain = <0x0 0x0 0x1 0x1 0x1>; + }; + + kcs@0x08722000{ + compatible = "hisilicon, hi1711-kcs"; + reg = <0x0 0x08722000 0x0 0x1000>, + <0x0 0x08723000 0x0 0x1000>, + <0x0 0x08724000 0x0 0x1000>, + <0x0 0x08725000 0x0 0x1000>, + <0x0 0x08732000 0x0 0x1000>, + <0x0 0x08733000 0x0 0x1000>, + <0x0 0x08734000 0x0 0x1000>, + <0x0 0x08735000 0x0 0x1000>; + interrupts = <0 120 4>, + <0 121 4>, + <0 122 4>, + <0 123 4>, + <0 88 4>, + <0 89 4>, + <0 90 4>, + <0 91 4>; + }; + + wdi@08726000{ + compatible = "hisilicon, hi1711-wdi"; + reg = <0x0 0x08726000 0x0 0x1000>, + <0x0 0x08736000 0x0 0x1000>; + }; + + bt@08727000{ + compatible = "hisilicon, hi1711-bt"; + reg = <0x0 0x08727000 0x0 0x1000>, + <0x0 0x08728000 0x0 0x1000>, + <0x0 0x08737000 0x0 0x1000>, + <0x0 0x08738000 0x0 0x1000>; + interrupts = <0 124 4>, + <0 125 4>, + <0 92 4>, + <0 93 4>; + }; + + sol@0872c000{ + compatible = "hisilicon, hi1711-sol"; + reg = <0x0 0x0872c000 0x0 0x1000>, + <0x0 0x0873c000 0x0 0x1000>, + <0x0 0x08710800 0x0 0x1000>, + <0x0 0x08711800 0x0 0x1000>, + <0x0 0x08743800 0x0 0x1000>; + interrupts = <0 130 4>, + <0 96 4>, + <0 64 4>, + <0 65 4>, + <0 66 4>; + }; + + p80@08721000{ + compatible = "hisilicon, hi1711-p80"; + reg = <0x0 0x08721000 0x0 0x1000>, + <0x0 0x08731000 0x0 0x1000>; + }; + + mailbox@08729000{ + compatible = "hisilicon, hi1711-mailbox"; + reg = <0x0 0x08729000 0x0 0x1000>, + <0x0 0x08739000 0x0 0x1000>; + interrupts = <0 126 4>, + <0 94 4>; + }; + + sgpio@08761000{ + compatible = "hisilicon, hi1711-sgpio"; + reg = <0x0 0x08761000 0x0 0x1000>, + <0x0 0x08762000 0x0 0x1000>; + interrupts = <0 48 4>, + <0 49 4>; + }; + + adc@08769000{ + compatible = "hisilicon, hi1711-adc"; + reg = <0x0 0x08769000 0x0 0x1000>, + <0x0 0x0876a000 0x0 0x1000>; + interrupts = <0 35 4>, + <0 36 4>; + }; + + localbus@08712000{ + compatible = "hisilicon, hi1711-localbus"; + reg = <0x0 0x8712000 0x0 0x1000>; + interrupts = <0x0 111 0x4>; + domain=<0x1>; + }; + + espi@08730000{ + compatible = "hisilicon, hi1711-espi"; + reg = <0x0 0x08730000 0x0 0x1000>; + interrupts = <0 97 4>, + <0 100 4>; + }; + + canbus@08741000{ + compatible = "hisilicon, hi1711-canbus"; + reg = <0x0 0x08741000 0x0 0x1000>, + <0x0 0x08742000 0x0 0x1000>; + interrupts = <0 118 4>, + <0 119 4>; + }; + + mdio@08747000{ + compatible = "hisilicon, hi1711-mdio"; + reg = <0x0 0x08747000 0x0 0x1000>; + interrupts = <0x0 137 0x4>; + }; + + gmac@cd000000 { + compatible = "hisilicon, hi1711_gmac_net"; + reg = <0x0 0xcd00000 0x0 0x1000>, + <0x0 0xcd01000 0x0 0x1000>, + <0x0 0xcd02000 0x0 0x1000>, + <0x0 0xcd03000 0x0 0x1000>; + interrupts = <0x0 52 0x4>, + <0x0 53 0x4>, + <0x0 54 0x4>, + <0x0 55 0x4>; + phy_addr = <0x07000302>; + domain=<0x1 0x0 0x0 0x1>; + }; + + usb2_0: usb2_0@08800000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x08800000 0x0 0x10000>, + <0x0 0x08b00000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 187 0x4>; + dr_mode = "peripheral"; + controller_index = "0"; + }; + + dwc3@08800000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08800000 0x0 0x10000>; + interrupts = <0x0 184 0x4>; + maximum-speed = "high-speed"; + dr_mode = "peripheral"; + }; + + usb2_1: usb2_1@08900000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x08900000 0x0 0x10000>, + <0x0 0x08b02000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 188 0x4>; + dr_mode = "peripheral"; + controller_index = "1"; + }; + + dwc3@08900000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08900000 0x0 0x10000>; + interrupts = <0x0 185 0x4>; + maximum-speed = "high-speed"; + dr_mode = "peripheral"; + }; + + usb2_2: usb2_2@08a00000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x08a00000 0x0 0x10000>, + <0x0 0x08b04000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 189 0x4>; + dr_mode = "otg"; + controller_index = "2"; + }; + + dwc3@08a00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08a00000 0x0 0x10000>; + interrupts = <0x0 186 0x4>; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + + usb3: usb3@0cc00000 { + compatible = "hisilicon, hi1711-usb"; + reg = <0x0 0x0cc00000 0x0 0x10000>, + <0x0 0x0cd06000 0x0 0x2000>, + <0x0 0x0cd0c000 0x0 0x100>; + interrupts = <0x0 191 0x4>; + dr_mode = "otg"; + controller_index = "3"; + }; + + dwc3@0cc00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x0cc00000 0x0 0x10000>, + <0x0 0x0cd06000 0x0 0x2000>; + interrupts = <0x0 190 0x4>; + maximum-speed = "super-speed"; + dr_mode = "otg"; + }; + + ddrc@08780000 { + compatible = "hisilicon, hi1711-ddrc"; + reg = <0x0 0x08780000 0x0 0x10000>; + interrupts = <0x0 200 0x4>, + <0x0 201 0x4>; + }; + + trng@0876c000 { + compatible = "hisilicon, hi1711-trng"; + reg = <0x0 0x0876c000 0x0 0x10000>; + interrupts = <0x0 39 0x4>; + }; + + pci_fix@08B21000 { + compatible = "hisilicon,hi1711-pci_fix"; + reg = <0x0 0xCD0C000 0x0 0x100>,/*HI1711_HP_SUB_BASE*/ + <0x0 0x8B20000 0x0 0x100>,/*HI1711_HOST_SUBSYS_BASE*/ + <0x0 0x8B21000 0x0 0x100>,/*HI1711_PCI0_MISC_BASE*/ + <0x0 0xCD0E000 0x0 0x100>,/*HI1711_PCI1_MISC_BASE*/ + <0x0 0x8B10000 0x0 0x1000>,/*HI1711_PCI0_DM_BASE*/ + <0x0 0xCD10000 0x0 0x1000>,/*HI1711_PCI1_DM_BASE*/ + <0x0 0x8B06000 0x0 0x1000>,/*HI1711_PCI0_PCS_BASE*/ + <0x0 0xCD08000 0x0 0x1000>;/*HI1711_PCI1_PCS_BASE*/ + interrupts = <0x0 208 0x4>,/*PCIE0 linkdown irq*/ + <0x0 216 0x4>;/*PCIE1 linkdown irq*/ + }; + + bmc_driver@CD10000 { + compatible = "hisilicon,hi1711-bmc_driver"; + reg = <0x0 0xCD10000 0x0 0x1000>,/*HI1711_PCI1_DM_BASE*/ + <0x0 0xCD0E000 0x0 0x1000>; + interrupts = <0x0 218 0x4>;/*pcie1 edma irq*/ + }; + + bmc_vnet_driver@CD10000 { + compatible = "hisilicon,hi1711-bmc_vnet_driver"; + reg = <0x0 0xCD10000 0x0 0x1000>,/*HI1711_PCI1_DM_BASE*/ + <0x0 0xCD0E000 0x0 0x1000>; + interrupts = <0x0 131 0x4>;/*h2b_edma_int*/ + }; + + mctp@1C00A000{ + compatible = "hisilicon,hi1711-mctp_driver"; + reg = <0x0 0xcd05000 0x0 0x100>; + interrupts = <0x0 117 0x4>;/*mctp irq*/ + }; + + vce@08b0c000{ + compatible = "hisilicon,hi1711-vce_driver"; + reg = <0x0 0x08b0c000 0x0 0x4000>; + interrupts = <0x0 113 0x4>;/*vce irq*/ + }; + + pci_rst_int@08740000 { + compatible = "hisilicon,hi1711-pcie_rst_driver"; + interrupts = <0x0 220 0x4>, + <0x0 212 0x4>, + <0x0 181 0x4>, + <0x0 180 0x4>; + }; + + hwlock@08740000 { + compatible = "hisilicon,hi1711-hwlock"; + interrupts = <0x0 38 0x4>; + }; + + pcie@0xCD0E000 { + compatible = "hisilicon,hip-pcie"; + reg = <0 0xCD0E000 0 0x100>, <0 0x0CD10000 0 0x1000>, + <0 0xCD08000 0 0x2000>, <0 0x23D00000 0 0x200000>; + reg-names = "misc", "rc_dbi", "pcs", "config"; + interrupts = <0x0 216 0x4>,//PCIE1 linkdown irq// + <0x0 221 0x4>;//PCIE1 msi(intb) irq// + bus-range = <0x0 0xff>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x02000000 0 0x1C000000 0x0 0x1C000000 0 0x7c00000>, + <0x01000000 0 0x0 0 0x23C00000 0 0x100000>; + num-lanes = <1>; + port-id = <0>; + status = "ok"; + }; + + msg_scm3@08740000 { + compatible = "hisilicon, hi1711-msg_scm3"; + interrupts = <0 225 4>;/*inter core communication from secure M3*/ + }; + }; +}; + diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/ss928-pi.dts b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/ss928-pi.dts new file mode 100644 index 0000000000000000000000000000000000000000..fd2be0549be2e6922ec01807598b57b7e0f118d0 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/ss928-pi.dts @@ -0,0 +1,1168 @@ +/dts-v1/; + +/memreserve/ 0x0000000052fff000 0x0000000001a02000; +/ { + #address-cells = <0x2>; + #size-cells = <0x2>; + interrupt-parent = <0x1>; + model = "Vendor SS928V100 DEMO Board"; + compatible = "vendor,ss928v100"; + + interrupt-controller@12400000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <0x3>; + #address-cells = <0x0>; + interrupt-controller; + reg = <0x0 0x12400000 0x0 0x10000 0x0 0x12440000 0x0 0x140000>; + phandle = <0x1>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0x1 0x17 0xf04>; + }; + + clock0 { + compatible = "vendor,ss928v100_clock", "syscon"; + #clock-cells = <0x1>; + #reset-cells = <0x2>; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x0 0x11010000 0x0 0x44a0>; + phandle = <0x5>; + }; + + smmu_npu@14040000 { + compatible = "arm,smmu-v3"; + reg = <0x0 0x14040000 0x0 0x40000>; + interrupts = <0x0 0x7d 0x4>; + interrupt-names = "combined"; + #iommu-cells = <0x1>; + vendor,broken-prefetch-cmd; + phandle = <0x2>; + }; + + svm_npu@14020000 { + compatible = "vendor,svm"; + crg-base = <0x11010000>; + crg-size = <0x10000>; + npu_crg_6560 = <0x6680>; + ranges; + #size-cells = <0x2>; + #address-cells = <0x2>; + + svm_aicore { + reg = <0x0 0x14020000 0x0 0x10000>; + iommus = <0x2 0x1>; + dma-can-stall; + pasid-num-bits = <0x10>; + }; + }; + + smmu_pqp@0x15410000 { + compatible = "arm,smmu-v3"; + reg = <0x0 0x15410000 0x0 0x40000>; + interrupts = <0x0 0xb9 0x4>; + interrupt-names = "combined"; + #iommu-cells = <0x1>; + vendor,broken-prefetch-cmd; + phandle = <0x3>; + }; + + svm_pqp@15400000 { + compatible = "vendor,svm"; + ranges; + #size-cells = <0x2>; + #address-cells = <0x2>; + crg-base = <0x11010000>; + crg-size = <0x10000>; + pqp_crg_6592 = <0x6700>; + + svm_aicore { + reg = <0x0 0x15400000 0x0 0x10000>; + iommus = <0x3 0x1>; + dma-can-stall; + pasid-num-bits = <0x10>; + }; + + svm_hwts { + iommus = <0x3 0x2>; + dma-can-stall; + pasid-bits = <0x10>; + vendor,smmu_bypass; + }; + }; + + firmware { + + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + ipcm@11031000 { + compatible = "vendor,ipcm-interrupt"; + interrupt-parent = <0x1>; + interrupts = <0x0 0x1a 0x4 0x0 0x1b 0x4>; + reg = <0x0 0x11031000 0x0 0x1000>; + status = "okay"; + }; + + soc { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "simple-bus"; + device_type = "soc"; + ranges = <0x0 0x0 0x0 0xffffffff>; + + clk_3m { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <0x2dc6c0>; + phandle = <0x4>; + }; + + clk_20m { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <0x1312d00>; + phandle = <0x8>; + }; + + amba { + compatible = "arm,amba-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; + + arm-timer { + compatible = "arm,armv8-timer"; + interrupts = <0x1 0xd 0xf04 0x1 0xe 0xf04>; + clock-frequency = <0x16e3600>; + always-on; + }; + + timer@11000000 { + compatible = "vendor,bsp_sp804"; + reg = <0x11000000 0x1000 0x11001000 0x1000 0x11002000 0x1000 0x11003000 0x1000 0x11004000 0x1000>; + interrupts = <0x0 0x5 0x4 0x0 0x6 0x4 0x0 0x7 0x4 0x0 0x8 0x4>; + clocks = <0x4>; + clock-names = "apb_pclk"; + }; + + uart@11040000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x11040000 0x1000>; + interrupts = <0x0 0x38 0x4>; + clocks = <0x5 0x5b>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + uart@11041000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x11041000 0x1000>; + interrupts = <0x0 0x39 0x4>; + clocks = <0x5 0x5c>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + uart@11042000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x11042000 0x1000>; + interrupts = <0x0 0x3a 0x4>; + clocks = <0x5 0x5d>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + uart@11043000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x11043000 0x1000>; + interrupts = <0x0 0x3b 0x4>; + clocks = <0x5 0x5e>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + uart@11044000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x11044000 0x1000>; + interrupts = <0x0 0x3c 0x4>; + clocks = <0x5 0x5f>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + uart@11045000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x11045000 0x1000>; + interrupts = <0x0 0x3d 0x4>; + clocks = <0x5 0x60>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + i2c@11060000 { + compatible = "vendor,i2c"; + reg = <0x11060000 0x1000>; + clocks = <0x5 0x32>; + clock-frequency = <0x186a0>; + status = "okay"; + #address-cells = <0x1>; + #size-cells = <0x0>; + + pcf8563@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; + + tca9535@20 { + compatible = "i2c,tca9535"; + reg = <0x20>; + id = <0x1>; + }; + }; + + i2c@11061000 { + compatible = "vendor,i2c"; + reg = <0x11061000 0x1000>; + clocks = <0x5 0x33>; + clock-frequency = <0x186a0>; + status = "okay"; + }; + + i2c@11062000 { + compatible = "vendor,i2c"; + reg = <0x11062000 0x1000>; + clocks = <0x5 0x34>; + clock-frequency = <0x186a0>; + status = "okay"; + }; + + i2c@11063000 { + compatible = "vendor,i2c"; + reg = <0x11063000 0x1000>; + clocks = <0x5 0x35>; + clock-frequency = <0x186a0>; + status = "okay"; + }; + + i2c@11064000 { + compatible = "vendor,i2c"; + reg = <0x11064000 0x1000>; + clocks = <0x5 0x36>; + clock-frequency = <0x186a0>; + status = "okay"; + }; + + i2c@11065000 { + compatible = "vendor,i2c"; + reg = <0x11065000 0x1000>; + clocks = <0x5 0x37>; + clock-frequency = <0x186a0>; + status = "okay"; + }; + + i2c@0 { + compatible = "i2c,soft"; + reg = <0x0 0x0>; + #address-cells = <0x1>; + #size-cells = <0x0>; + gpio-scl = <0x6 0x7 0x0>; + gpio-sda = <0x6 0x6 0x0>; + clock-frequency = <0xf4240>; + status = "okay"; + }; + + i2c@1 { + compatible = "i2c,soft"; + reg = <0x1 0x0>; + #address-cells = <0x1>; + #size-cells = <0x0>; + gpio-scl = <0x7 0x2 0x0>; + gpio-sda = <0x7 0x0 0x0>; + clock-frequency = <0xf4240>; + status = "okay"; + }; + + spi@11070000 { + compatible = "arm,pl022", "arm,primecell"; + arm,primecell-periphid = <0x800022>; + reg = <0x11070000 0x1000>; + interrupts = <0x0 0x44 0x4>; + clocks = <0x5 0x3e>; + clock-names = "apb_pclk"; + #address-cells = <0x1>; + spi,slave_mode = <0x0>; + #size-cells = <0x0>; + status = "okay"; + num-cs = <0x1>; + + can@0 { + compatible = "microchip,mcp2515"; + reg = <0x0>; + clocks = <0x8>; + spi-max-frequency = <0x1e8480>; + interrupt-parent = <0x9>; + interrupts = <0x2 0x2>; + status = "okay"; + }; + }; + + spi@11071000 { + compatible = "arm,pl022", "arm,primecell"; + arm,primecell-periphid = <0x800022>; + reg = <0x11071000 0x1000 0x110d2100 0x4>; + interrupts = <0x0 0x45 0x4>; + clocks = <0x5 0x3f>; + clock-names = "apb_pclk"; + #address-cells = <0x1>; + spi,slave_mode = <0x0>; + #size-cells = <0x0>; + status = "okay"; + num-cs = <0x2>; + spi_cs_sb = <0x2>; + spi_cs_mask_bit = <0x4>; + + spidev@0 { + compatible = "rohm,dh2228fv"; + reg = <0x0>; + pl022,interface = <0x0>; + pl022,com-mode = <0x0>; + spi-max-frequency = <0x17d7840>; + }; + + spidev@1 { + compatible = "rohm,dh2228fv"; + reg = <0x1>; + pl022,interface = <0x0>; + pl022,com-mode = <0x0>; + spi-max-frequency = <0x17d7840>; + }; + }; + + spi@11073000 { + compatible = "arm,pl022", "arm,primecell"; + arm,primecell-periphid = <0x800022>; + reg = <0x11073000 0x1000>; + interrupts = <0x0 0x46 0x4>; + clocks = <0x5 0x40>; + clock-names = "apb_pclk"; + #address-cells = <0x1>; + spi,slave_mode = <0x0>; + #size-cells = <0x0>; + status = "okay"; + num-cs = <0x1>; + + spidev@0 { + compatible = "rohm,dh2228fv"; + reg = <0x0>; + pl022,interface = <0x0>; + pl022,com-mode = <0x0>; + spi-max-frequency = <0x17d7840>; + }; + }; + + spi@11074000 { + compatible = "arm,pl022", "arm,primecell"; + arm,primecell-periphid = <0x800022>; + reg = <0x11074000 0x1000>; + interrupts = <0x0 0x47 0x4>; + clocks = <0x5 0x41>; + clock-names = "apb_pclk"; + spi,slave_mode = <0x0>; + #address-cells = <0x1>; + #size-cells = <0x0>; + status = "okay"; + num-cs = <0x1>; + + spidev@0 { + compatible = "rohm,dh2228fv"; + reg = <0x0>; + pl022,interface = <0x0>; + pl022,com-mode = <0x0>; + spi-max-frequency = <0x17d7840>; + }; + }; + + gpio_chip@11090000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x11090000 0x1000>; + interrupts = <0x0 0x49 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11091000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x11091000 0x1000>; + interrupts = <0x0 0x4a 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + phandle = <0x6>; + }; + + gpio_chip@11092000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x11092000 0x1000>; + interrupts = <0x0 0x4b 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + phandle = <0x7>; + }; + + gpio_chip@11093000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x11093000 0x1000>; + interrupts = <0x0 0x4c 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11094000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x11094000 0x1000>; + interrupts = <0x0 0x4d 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + interrupt-controller; + #interrupt-cells = <0x2>; + phandle = <0x9>; + }; + + gpio_chip@11095000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x11095000 0x1000>; + interrupts = <0x0 0x4e 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11096000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x11096000 0x1000>; + interrupts = <0x0 0x4f 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11097000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x11097000 0x1000>; + interrupts = <0x0 0x50 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11098000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x11098000 0x1000>; + interrupts = <0x0 0x51 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11099000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x11099000 0x1000>; + interrupts = <0x0 0x52 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109A000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x1109a000 0x1000>; + interrupts = <0x0 0x53 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109B000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x1109b000 0x1000>; + interrupts = <0x0 0x54 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109C000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x1109c000 0x1000>; + interrupts = <0x0 0x55 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109D000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x1109d000 0x1000>; + interrupts = <0x0 0x56 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109E000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x1109e000 0x1000>; + interrupts = <0x0 0x57 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109F000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x1109f000 0x1000>; + interrupts = <0x0 0x58 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@110a0000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x110a0000 0x1000>; + interrupts = <0x0 0x59 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@110a1000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0x110a1000 0x1000>; + interrupts = <0x0 0x5a 0x4>; + #gpio-cells = <0x2>; + clocks = <0x5 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + }; + + misc-controller@11024000 { + compatible = "vendor,miscctrl", "syscon"; + reg = <0x11024000 0x5000>; + }; + + ioconfig0@10230000 { + compatible = "vendor,ioconfig", "syscon"; + reg = <0x10230000 0x10000>; + phandle = <0xc>; + }; + + ioconfig1@102f0000 { + compatible = "vendor,ioconfig", "syscon"; + reg = <0x102f0000 0x10000>; + phandle = <0xd>; + }; + + flash-memory-controller@10000000 { + compatible = "vendor,fmc"; + reg = <0x10000000 0x1000 0xf000000 0x1000000>; + reg-names = "control", "memory"; + clocks = <0x5 0x5a>; + max-dma-size = <0x2000>; + #address-cells = <0x1>; + #size-cells = <0x0>; + + spi_nor_controller { + compatible = "vendor,fmc-spi-nor"; + assigned-clocks = <0x5 0x5a>; + assigned-clock-rates = <0x16e3600>; + #address-cells = <0x1>; + #size-cells = <0x0>; + + sfc { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <0x9896800>; + m25p,fast-read; + }; + }; + + spi_nand_controller { + compatible = "vendor,fmc-spi-nand"; + assigned-clocks = <0x5 0x5a>; + assigned-clock-rates = <0x16e3600>; + #address-cells = <0x1>; + #size-cells = <0x0>; + + nand { + compatible = "jedec,spi-nand"; + reg = <0x0>; + spi-max-frequency = <0x9896800>; + }; + }; + + parallel-nand-controller { + compatible = "vendor,fmc-nand"; + assigned-clocks = <0x5 0x5a>; + assigned-clock-rates = <0xbebc200>; + #address-cells = <0x1>; + #size-cells = <0x0>; + + nand { + compatible = "jedec,nand"; + reg = <0x0>; + nand-max-frequency = <0xbebc200>; + }; + }; + }; + + mdio@102903c0 { + compatible = "vendor,gemac-mdio"; + reg = <0x102903c0 0x20>; + clocks = <0x5 0x65>; + resets = <0x5 0x37cc 0x0>; + reset-names = "phy_reset"; + #address-cells = <0x1>; + #size-cells = <0x0>; + + ethernet-phy@1 { + reg = <0x1>; + phandle = <0xa>; + }; + }; + + mdio@102a03c0 { + compatible = "vendor,gemac-mdio"; + reg = <0x102a03c0 0x20>; + clocks = <0x5 0x67>; + resets = <0x5 0x380c 0x0>; + reset-names = "phy_reset"; + #address-cells = <0x1>; + #size-cells = <0x0>; + + ethernet-phy@1 { + reg = <0x1>; + phandle = <0xb>; + }; + }; + + ethernet@10290000 { + compatible = "vendor,gmac-v5"; + reg = <0x10290000 0x1000 0x1029300c 0x4>; + interrupts = <0x0 0x65 0x4 0x0 0x66 0x4 0x0 0x67 0x4 0x0 0x68 0x4>; + clocks = <0x5 0x65 0x5 0x66>; + clock-names = "gmac_clk", "macif_clk"; + resets = <0x5 0x37c4 0x0 0x5 0x37c0 0x0>; + reset-names = "port_reset", "macif_reset"; + mac-address = [00 00 00 00 00 00]; + phy-handle = <0xa>; + phy-mode = "rgmii"; + }; + + ethernet@102a0000 { + compatible = "vendor,gmac-v5"; + reg = <0x102a0000 0x1000 0x102a300c 0x4>; + interrupts = <0x0 0x69 0x4 0x0 0x6a 0x4 0x0 0x6b 0x4 0x0 0x6c 0x4>; + clocks = <0x5 0x67 0x5 0x68>; + clock-names = "gmac_clk", "macif_clk"; + resets = <0x5 0x3804 0x0 0x5 0x3800 0x0>; + reset-names = "port_reset", "macif_reset"; + mac-address = [00 00 00 00 00 00]; + phy-handle = <0xb>; + phy-mode = "rgmii"; + }; + + phy3 { + compatible = "vendor,usb-phy"; + reg = <0x11010000 0x10000 0x11024000 0x5000 0x11020000 0x4000>; + phyid = <0x0>; + }; + + xhci_0@0x10300000 { + compatible = "generic-xhci"; + reg = <0x10300000 0x10000>; + interrupts = <0x0 0x78 0x4>; + usb2-lpm-disable; + }; + + xhci_1@0x10320000 { + compatible = "generic-xhci"; + reg = <0x10320000 0x10000>; + interrupts = <0x0 0x79 0x4>; + usb2-lpm-disable; + }; + + eMMC@0x10020000 { + compatible = "vendor,sdhci"; + reg = <0x10020000 0x1000>; + interrupts = <0x0 0x5f 0x4>; + clocks = <0x5 0x61>; + clock-names = "mmc_clk"; + resets = <0x5 0x34c0 0x10 0x5 0x34c4 0x1>; + reset-names = "crg_reset", "dll_reset"; + max-frequency = <0xbebc200>; + crg_regmap = <0x5>; + non-removable; + iocfg_regmap = <0xc>; + bus-width = <0x8>; + cap-mmc-highspeed; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + cap-mmc-hw-reset; + no-sdio; + no-sd; + devid = <0x0>; + status = "okay"; + }; + + SDIO@0x10030000 { + compatible = "vendor,sdhci"; + reg = <0x10030000 0x1000>; + interrupts = <0x0 0x5b 0x4>; + clocks = <0x5 0x62>; + clock-names = "mmc_clk"; + resets = <0x5 0x35c0 0x10 0x5 0x35c4 0x1>; + reset-names = "crg_reset", "dll_reset"; + max-frequency = <0xbebc200>; + crg_regmap = <0x5>; + iocfg_regmap = <0xd>; + bus-width = <0x4>; + cap-sd-highspeed; + sd-uhs-sdr104; + sd-uhs-sdr50; + full-pwr-cycle; + disable-wp; + no-emmc; + no-sdio; + devid = <0x1>; + status = "okay"; + }; + + SDIO1@0x10040000 { + compatible = "vendor,sdhci"; + reg = <0x10040000 0x1000>; + interrupts = <0x0 0x5c 0x4>; + clocks = <0x5 0x63>; + clock-names = "mmc_clk"; + resets = <0x5 0x36c0 0x10 0x5 0x36c4 0x1>; + reset-names = "crg_reset", "dll_reset"; + max-frequency = <0xbebc200>; + crg_regmap = <0x5>; + non-removable; + iocfg_regmap = <0xd>; + bus-width = <0x4>; + cap-sd-highspeed; + no-emmc; + no-sd; + devid = <0x2>; + status = "okay"; + }; + + pcie@0x103d0000 { + device_type = "pci"; + compatible = "vendor,pcie"; + #size-cells = <0x2>; + #address-cells = <0x3>; + #interrupt-cells = <0x1>; + bus-range = <0x0 0xff>; + reg = <0x0 0x103d0000 0x0 0x2000>; + ranges = <0x2000000 0x0 0x30000000 0x30000000 0x0 0x10000000>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x6f 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x70 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x71 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x72 0x4>; + pcie_controller = <0x0>; + dev_mem_size = <0x10000000>; + dev_conf_size = <0x10000000>; + sys_ctrl_base = <0x11020000>; + pcie_dbi_base = <0x103d0000>; + ep_conf_base = <0x20000000>; + pcie_clk_rest_reg = <0x3a40>; + status = "okay"; + }; + + pcie_mcc@0x0 { + compatible = "vendor,pcie_mcc"; + interrupts = <0x0 0x6f 0x4 0x0 0x70 0x4 0x0 0x71 0x4 0x0 0x72 0x4 0x0 0x73 0x4 0x0 0x0 0x4>; + }; + + edma-controller@10280000 { + compatible = "vendor,edmacv310"; + reg = <0x10280000 0x1000 0x102e0024 0x4>; + reg-names = "dmac", "dma_peri_channel_req_sel"; + interrupts = <0x0 0x62 0x4>; + clocks = <0x5 0x45 0x5 0x46>; + clock-names = "apb_pclk", "axi_aclk"; + #clock-cells = <0x2>; + resets = <0x5 0x2a80 0x0>; + reset-names = "dma-reset"; + dma-requests = <0x20>; + dma-channels = <0x8>; + devid = <0x0>; + #dma-cells = <0x2>; + status = "disabled"; + }; + + sys@11010000 { + compatible = "vendor,sys"; + reg = <0x11014500 0xbb00 0x11020000 0x4000 0x11130000 0x10000 0x11024000 0x5000>; + reg-names = "crg", "sys", "ddr", "misc"; + }; + + mipi_rx@0x173c0000 { + compatible = "vendor,mipi_rx"; + reg = <0x173c0000 0x10000>; + reg-names = "mipi_rx"; + interrupts = <0x0 0x9a 0x4>; + interrupt-names = "mipi_rx"; + }; + + vi@0x17400000 { + compatible = "vendor,vi"; + reg = <0x17400000 0x200000 0x17800000 0x40000 0x17840000 0x40000>; + reg-names = "vi_cap0", "vi_proc0", "vi_proc1"; + interrupts = <0x0 0x9b 0x4 0x0 0x9c 0x4 0x0 0x9d 0x4>; + interrupt-names = "vi_cap0", "vi_proc0", "vi_proc1"; + }; + + vpss@0x17900000 { + compatible = "vendor,vpss"; + reg = <0x17900000 0x10000>; + reg-names = "vpss0"; + interrupts = <0x0 0x9e 0x4>; + interrupt-names = "vpss0"; + }; + + vo@0x17A00000 { + compatible = "vendor,vo"; + reg = <0x17a00000 0x40000>; + reg-names = "vo"; + interrupts = <0x0 0xa0 0x4>; + interrupt-names = "vo"; + }; + + gfbg@0x17A00000 { + compatible = "vendor,gfbg"; + reg = <0x17a00000 0x40000>; + reg-names = "gfbg"; + interrupts = <0x0 0xa1 0x4>; + interrupt-names = "gfbg"; + }; + + hdmi@0x17B40000 { + compatible = "vendor,hdmi"; + reg = <0x17b40000 0x20000 0x17bc0000 0x10000>; + reg-names = "hdmi0", "phy"; + interrupts = <0x0 0xa3 0x4 0x0 0xa4 0x4 0x0 0xa5 0x4>; + interrupt-names = "tx_aon", "tx_sec", "tx_pwd"; + }; + + mipi_tx@0x17A80000 { + compatible = "vendor,mipi_tx"; + reg = <0x17a80000 0x10000>; + reg-names = "mipi_tx"; + interrupts = <0x0 0xa6 0x4>; + interrupt-names = "mipi_tx"; + }; + + vgs@0x17240000 { + compatible = "vendor,vgs"; + reg = <0x17240000 0x10000 0x17250000 0x10000>; + reg-names = "vgs0", "vgs1"; + interrupts = <0x0 0xaa 0x4 0x0 0xab 0x4>; + interrupt-names = "vgs0", "vgs1"; + }; + + vdh@0x17100000 { + compatible = "vendor,vdh"; + reg = <0x17100000 0x10000>; + reg-names = "vdh_scd"; + interrupts = <0x0 0xae 0x4 0x0 0xaf 0x4 0x0 0xb1 0x4 0x0 0xb2 0x4>; + interrupt-names = "vdh_bsp", "vdh_pxp", "scd", "vdh_mdma"; + }; + + gdc@0x172c0000 { + compatible = "vendor,gdc"; + reg = <0x172c0000 0x10000>; + reg-names = "gdc"; + interrupts = <0x0 0xb3 0x4>; + interrupt-names = "gdc"; + }; + + tde@0x17280000 { + compatible = "vendor,tde"; + reg = <0x17280000 0x10000>; + reg-names = "tde"; + interrupts = <0x0 0xb4 0x4>; + interrupt-names = "tde_osr_isr"; + }; + + jpegd@0x17180000 { + compatible = "vendor,jpegd"; + reg = <0x17180000 0x10000>; + reg-names = "jpegd"; + interrupts = <0x0 0xb6 0x4>; + interrupt-names = "jpegd"; + }; + + venc@0x17140000 { + compatible = "vendor,vedu"; + reg = <0x17140000 0x10000 0x171c0000 0x10000>; + reg-names = "vedu0", "jpge"; + interrupts = <0x0 0xb7 0x4 0x0 0xb5 0x4>; + interrupt-names = "vedu0", "jpge"; + }; + + npu@0x14000000 { + compatible = "vendor,npu"; + reg = <0x14000000 0x100000 0x14100000 0x200000 0x14300000 0x200000 0x17150000 0x10000 0x11010000 0x10000>; + reg-names = "npu_top", "npu_htws", "npu_aicore", "npu_peri", "crg"; + interrupts = <0x0 0x80 0x4 0x0 0x81 0x4 0x0 0x82 0x4 0x0 0x83 0x4 0x0 0x84 0x4 0x0 0x85 0x4 0x0 0x86 0x4 0x0 0x87 0x4 0x0 0x88 0x4>; + interrupt-names = "hwts_dfx", "hwts_normal_s", "hwts_debug_s", "hwts_error_s", "hwts_normal_ns", "hwts_debug_ns", "hwts_error_ns", "hwts_aicpu_s", "hwts_aicpu_ns"; + }; + + pqp@0x15000000 { + compatible = "vendor,pqp"; + reg = <0x15000000 0x10000>; + reg-names = "pqp"; + interrupts = <0x0 0xbe 0x4 0x0 0xbf 0x4>; + interrupt-names = "pqp_ns", "pqp_s"; + }; + + svp_npu@0x15000000 { + compatible = "vendor,svp_npu"; + reg = <0x15000000 0x10000>; + reg-names = "svp_npu"; + interrupts = <0x0 0xbe 0x4 0x0 0xbf 0x4>; + interrupt-names = "svp_npu_ns", "svp_npu_s"; + }; + + ive@0x17000000 { + compatible = "vendor,ive"; + reg = <0x17000000 0x10000>; + reg-names = "ive"; + interrupts = <0x0 0xc0 0x4>; + interrupt-names = "ive"; + }; + + mau@0x17030000 { + compatible = "vendor,mau"; + reg = <0x17030000 0x10000>; + reg-names = "mau0"; + interrupts = <0x0 0xc4 0x4>; + interrupt-names = "mau0"; + }; + + dpu_rect@0x17030000 { + compatible = "vendor,dpu_rect"; + reg = <0x17030000 0x10000>; + reg-names = "dpu_rect"; + interrupts = <0x0 0xc1 0x4>; + interrupt-names = "rect"; + }; + + dpu_match@0x17030000 { + compatible = "vendor,dpu_match"; + reg = <0x17030000 0x10000>; + reg-names = "dpu_match"; + interrupts = <0x0 0xc2 0x4>; + interrupt-names = "match"; + }; + + dsp@0x16110000 { + compatible = "vendor,dsp"; + reg = <0x16110000 0x20000 0x16310000 0x20000>; + reg-names = "dsp0", "dsp1"; + }; + + avs@0x17930000 { + compatible = "vendor,avs"; + reg = <0x17930000 0x10000>; + reg-names = "avs"; + interrupts = <0x0 0x8a 0x4>; + interrupt-names = "avs"; + }; + + aiao@17c00000 { + compatible = "vendor,aiao"; + reg = <0x17c00000 0x10000 0x17c40000 0x10000>; + reg-names = "aiao", "acodec"; + interrupts = <0x0 0xa2 0x4>; + interrupt-names = "AIO"; + }; + + cipher@0x10100000 { + compatible = "vendor,cipher"; + reg = <0x10100000 0x10000>; + reg-names = "cipher"; + interrupts = <0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4 0x0 0x2c 0x4>; + interrupt-names = "nsec_spacc", "sec_spacc", "nsec_pke", "sec_pke"; + }; + + klad@0x10110000 { + compatible = "vendor,klad"; + reg = <0x10110000 0x1000>; + reg-names = "klad"; + interrupts = <0x0 0x2e 0x4 0x0 0x2f 0x4 0x0 0x30 0x4 0x0 0x31 0x4>; + interrupt-names = "nsec_rkp", "sec_rkp", "nsec_klad", "sec_klad"; + }; + + otp@0x10120000 { + compatible = "vendor,otp"; + reg = <0x10120000 0x1000>; + reg-names = "otp"; + }; + + adc@0x11080000 { + compatible = "vendor,lsadc"; + reg = <0x11080000 0x1000>; + reg-names = "lsadc"; + interrupts = <0x0 0x48 0x4>; + interrupt-names = "lsadc"; + clocks = <0x5 0x78>; + clock-names = "lsadc-clk"; + resets = <0x5 0x46c0 0x0>; + reset-names = "lsadc-crg"; + status = "okay"; + }; + + ir@0x110F0000 { + compatible = "vendor,ir"; + reg = <0x110f0000 0x10000>; + reg-names = "ir"; + interrupts = <0x0 0x37 0x4>; + interrupt-names = "ir"; + }; + + wdg@0x11030000 { + compatible = "vendor,wdg"; + reg = <0x11030000 0x1000>; + reg-names = "wdg0"; + interrupts = <0x0 0x3 0x4>; + interrupt-names = "wdg"; + }; + + pwm@0x1102D000 { + compatible = "vendor,pwm"; + reg = <0x110b0000 0x1000 0x1102d000 0x1000>; + reg-names = "pwm0", "pwm1"; + clocks = <0x5 0x79 0x5 0x7a>; + clock-names = "pwm0", "pwm1"; + resets = <0x5 0x4588 0x0 0x5 0x4590 0x0>; + reset-names = "pwm0", "pwm1"; + status = "okay"; + }; + }; + + aliases { + serial0 = "/soc/amba/uart@11040000"; + serial1 = "/soc/amba/uart@11041000"; + serial2 = "/soc/amba/uart@11042000"; + serial3 = "/soc/amba/uart@11043000"; + serial4 = "/soc/amba/uart@11044000"; + serial5 = "/soc/amba/uart@11045000"; + i2c0 = "/soc/amba/i2c@11060000"; + i2c1 = "/soc/amba/i2c@11061000"; + i2c2 = "/soc/amba/i2c@11062000"; + i2c3 = "/soc/amba/i2c@11063000"; + i2c4 = "/soc/amba/i2c@11064000"; + i2c5 = "/soc/amba/i2c@11065000"; + spi0 = "/soc/amba/spi@11070000"; + spi1 = "/soc/amba/spi@11071000"; + spi2 = "/soc/amba/spi@11073000"; + spi3 = "/soc/amba/spi@11074000"; + gpio0 = "/soc/amba/gpio_chip@11090000"; + gpio1 = "/soc/amba/gpio_chip@11091000"; + gpio2 = "/soc/amba/gpio_chip@11092000"; + gpio3 = "/soc/amba/gpio_chip@11093000"; + gpio4 = "/soc/amba/gpio_chip@11094000"; + gpio5 = "/soc/amba/gpio_chip@11095000"; + gpio6 = "/soc/amba/gpio_chip@11096000"; + gpio7 = "/soc/amba/gpio_chip@11097000"; + gpio8 = "/soc/amba/gpio_chip@11098000"; + gpio9 = "/soc/amba/gpio_chip@11099000"; + gpio10 = "/soc/amba/gpio_chip@1109A000"; + gpio11 = "/soc/amba/gpio_chip@1109B000"; + gpio12 = "/soc/amba/gpio_chip@1109C000"; + gpio13 = "/soc/amba/gpio_chip@1109D000"; + gpio14 = "/soc/amba/gpio_chip@1109E000"; + gpio15 = "/soc/amba/gpio_chip@1109F000"; + gpio16 = "/soc/amba/gpio_chip@110a0000"; + gpio17 = "/soc/amba/gpio_chip@110a1000"; + }; + + chosen { + bootargs = "earlycon=pl011,0x11040000 mem=512M console=ttyAMA0,115200 clk_ignore_unused root=/dev/mtdblock2 rootfstype=yaffs2 rw mtdparts=bspnand:1M(boot),9M(kernel),32M(rootfs),1M(this_bootargs_string_is_reserved_for_bootargs_form_uboot!!!_it_must_be_longer_than_bootargs_form_uboot!!!_this_bootargs_string_is_reserved_for_bootargs_form_uboot!!!_it_must_be_longer_than_bootargs_form_uboot!!!_this_bootargs_string_is_reserved_for_bootargs_form_uboot!!!_it_must_be_longer_than_bootargs_form_uboot!!!_this_bootargs_string_is_reserved_for_bootargs_form_uboot!!!_it_must_be_longer_than_bootargs_form_uboot!!!_this_bootargs_string_is_reserved_for_bootargs_form_uboot!!!_it_must_be_longer_than_bootargs_form_uboot!!!)"; + linux,initrd-start = <0x60000040>; + linux,initrd-end = <0x61000000>; + }; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu@0 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu@1 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x0 0x100>; + enable-method = "psci"; + }; + + cpu@2 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x0 0x200>; + enable-method = "psci"; + }; + + cpu@3 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x0 0x300>; + enable-method = "psci"; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x50000000 0x1 0xf0000000>; + }; +}; diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/patch/0001-apply-preempt-RT-patch-b88a0de01.patch b/bsp/meta-hisilicon/recipes-kernel/linux/files/patch/0001-apply-preempt-RT-patch-b88a0de01.patch new file mode 100644 index 0000000000000000000000000000000000000000..a9b0c5a57812a6c87beb02cd21493c75826d804b --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/patch/0001-apply-preempt-RT-patch-b88a0de01.patch @@ -0,0 +1,26151 @@ +From d110274a605c45ff7b4f5377aa8af494a2c34f85 Mon Sep 17 00:00:00 2001 +From: fanglinxu +Date: Tue, 9 Apr 2024 14:34:07 +0800 +Subject: [PATCH] fixaaaa + +Signed-off-by: fanglinxu +--- + .../Expedited-Grace-Periods.rst | 4 +- + .../RCU/Design/Requirements/Requirements.rst | 26 +- + Documentation/RCU/checklist.rst | 2 +- + Documentation/RCU/rcubarrier.rst | 6 +- + Documentation/RCU/stallwarn.rst | 4 +- + Documentation/RCU/whatisRCU.rst | 10 +- + .../admin-guide/kernel-parameters.txt | 11 + + Documentation/driver-api/io-mapping.rst | 92 +- + arch/Kconfig | 8 +- + arch/alpha/include/asm/kmap_types.h | 15 - + arch/alpha/include/asm/spinlock_types.h | 4 - + arch/arc/Kconfig | 1 + + arch/arc/include/asm/highmem.h | 26 +- + arch/arc/include/asm/kmap_types.h | 14 - + arch/arc/mm/highmem.c | 54 +- + arch/arm/Kconfig | 6 +- + arch/arm/include/asm/fixmap.h | 4 +- + arch/arm/include/asm/hardirq.h | 11 +- + arch/arm/include/asm/highmem.h | 34 +- + arch/arm/include/asm/irq.h | 2 + + arch/arm/include/asm/kmap_types.h | 10 - + arch/arm/include/asm/spinlock_types.h | 4 - + arch/arm/include/asm/thread_info.h | 5 +- + arch/arm/kernel/asm-offsets.c | 1 + + arch/arm/kernel/entry-armv.S | 19 +- + arch/arm/kernel/signal.c | 3 +- + arch/arm/kernel/smp.c | 2 - + arch/arm/mm/Makefile | 1 - + arch/arm/mm/cache-feroceon-l2.c | 6 +- + arch/arm/mm/cache-xsc3l2.c | 4 +- + arch/arm/mm/fault.c | 3 + + arch/arm/mm/highmem.c | 121 -- + arch/arm64/Kconfig | 3 + + arch/arm64/include/asm/hardirq.h | 7 +- + arch/arm64/include/asm/preempt.h | 28 +- + arch/arm64/include/asm/spinlock_types.h | 4 - + arch/arm64/include/asm/thread_info.h | 8 +- + arch/arm64/kernel/asm-offsets.c | 1 + + arch/arm64/kernel/entry.S | 13 +- + arch/arm64/kernel/fpsimd.c | 14 +- + arch/arm64/kernel/ipi_nmi.c | 2 - + arch/arm64/kernel/signal.c | 2 +- + arch/arm64/kvm/arm.c | 6 +- + arch/csky/Kconfig | 1 + + arch/csky/include/asm/fixmap.h | 4 +- + arch/csky/include/asm/highmem.h | 6 +- + arch/csky/mm/highmem.c | 75 +- + arch/hexagon/include/asm/spinlock_types.h | 4 - + arch/ia64/include/asm/kmap_types.h | 13 - + arch/ia64/include/asm/spinlock_types.h | 4 - + arch/ia64/kernel/time.c | 20 +- + arch/microblaze/Kconfig | 1 + + arch/microblaze/include/asm/fixmap.h | 4 +- + arch/microblaze/include/asm/highmem.h | 6 +- + arch/microblaze/mm/Makefile | 1 - + arch/microblaze/mm/highmem.c | 78 - + arch/microblaze/mm/init.c | 6 - + arch/mips/Kconfig | 1 + + arch/mips/include/asm/fixmap.h | 4 +- + arch/mips/include/asm/highmem.h | 6 +- + arch/mips/include/asm/kmap_types.h | 13 - + arch/mips/kernel/crash_dump.c | 42 +- + arch/mips/mm/highmem.c | 77 - + arch/mips/mm/init.c | 4 - + arch/nds32/Kconfig.cpu | 1 + + arch/nds32/include/asm/fixmap.h | 4 +- + arch/nds32/include/asm/highmem.h | 22 +- + arch/nds32/mm/Makefile | 1 - + arch/nds32/mm/highmem.c | 48 - + arch/openrisc/mm/init.c | 1 - + arch/openrisc/mm/ioremap.c | 1 - + arch/parisc/include/asm/hardirq.h | 1 - + arch/parisc/include/asm/kmap_types.h | 13 - + arch/powerpc/Kconfig | 4 + + arch/powerpc/include/asm/cmpxchg.h | 2 +- + arch/powerpc/include/asm/fixmap.h | 4 +- + arch/powerpc/include/asm/highmem.h | 7 +- + arch/powerpc/include/asm/kmap_types.h | 13 - + .../include/asm/simple_spinlock_types.h | 2 +- + arch/powerpc/include/asm/spinlock_types.h | 4 - + arch/powerpc/include/asm/stackprotector.h | 4 + + arch/powerpc/include/asm/thread_info.h | 17 +- + arch/powerpc/kernel/asm-offsets.c | 1 + + arch/powerpc/kernel/entry_32.S | 23 +- + arch/powerpc/kernel/exceptions-64e.S | 16 +- + arch/powerpc/kernel/irq.c | 2 + + arch/powerpc/kernel/misc_32.S | 2 + + arch/powerpc/kernel/misc_64.S | 2 + + arch/powerpc/kernel/nvram_64.c | 12 +- + arch/powerpc/kernel/syscall_64.c | 10 +- + arch/powerpc/kernel/time.c | 56 +- + arch/powerpc/kernel/traps.c | 8 +- + arch/powerpc/kernel/watchdog.c | 5 - + arch/powerpc/kexec/crash.c | 3 - + arch/powerpc/kvm/Kconfig | 1 + + arch/powerpc/mm/Makefile | 1 - + arch/powerpc/mm/highmem.c | 67 - + arch/powerpc/mm/mem.c | 7 - + arch/powerpc/platforms/powernv/opal-kmsg.c | 3 +- + arch/powerpc/platforms/pseries/iommu.c | 31 +- + arch/powerpc/xmon/xmon.c | 6 +- + arch/s390/Kconfig | 1 + + arch/s390/include/asm/spinlock_types.h | 4 - + arch/s390/include/asm/vtime.h | 1 - + arch/s390/kernel/vtime.c | 51 +- + arch/sh/include/asm/fixmap.h | 8 - + arch/sh/include/asm/hardirq.h | 14 +- + arch/sh/include/asm/kmap_types.h | 15 - + arch/sh/include/asm/spinlock_types.h | 4 - + arch/sh/kernel/irq.c | 4 +- + arch/sh/kernel/traps.c | 2 +- + arch/sh/mm/init.c | 8 - + arch/sparc/Kconfig | 1 + + arch/sparc/include/asm/highmem.h | 8 +- + arch/sparc/include/asm/kmap_types.h | 11 - + arch/sparc/include/asm/vaddrs.h | 4 +- + arch/sparc/kernel/irq_64.c | 2 + + arch/sparc/mm/Makefile | 3 - + arch/sparc/mm/highmem.c | 115 -- + arch/sparc/mm/srmmu.c | 2 - + arch/um/include/asm/fixmap.h | 1 - + arch/um/include/asm/hardirq.h | 17 +- + arch/um/include/asm/kmap_types.h | 13 - + arch/um/kernel/kmsg_dump.c | 13 +- + arch/x86/Kconfig | 3 + + arch/x86/crypto/aesni-intel_glue.c | 22 +- + arch/x86/crypto/cast5_avx_glue.c | 21 +- + arch/x86/crypto/glue_helper.c | 26 +- + arch/x86/include/asm/fixmap.h | 5 +- + arch/x86/include/asm/fpu/api.h | 24 +- + arch/x86/include/asm/highmem.h | 13 +- + arch/x86/include/asm/iomap.h | 13 +- + arch/x86/include/asm/kmap_types.h | 13 - + arch/x86/include/asm/paravirt_types.h | 1 - + arch/x86/include/asm/preempt.h | 37 +- + arch/x86/include/asm/signal.h | 13 + + arch/x86/include/asm/stackprotector.h | 8 +- + arch/x86/include/asm/thread_info.h | 11 + + arch/x86/kernel/crash_dump_32.c | 48 +- + arch/x86/kernel/fpu/core.c | 12 + + arch/x86/kernel/irq_32.c | 2 + + arch/x86/kernel/irq_64.c | 2 + + arch/x86/kvm/x86.c | 8 + + arch/x86/mm/highmem_32.c | 59 - + arch/x86/mm/init_32.c | 15 - + arch/x86/mm/iomap_32.c | 57 +- + arch/xtensa/Kconfig | 1 + + arch/xtensa/include/asm/fixmap.h | 4 +- + arch/xtensa/include/asm/highmem.h | 12 +- + arch/xtensa/include/asm/spinlock_types.h | 4 - + arch/xtensa/mm/highmem.c | 46 +- + block/blk-mq.c | 124 +- + crypto/cryptd.c | 15 +- + drivers/atm/eni.c | 2 +- + drivers/block/zram/zram_drv.c | 36 + + drivers/block/zram/zram_drv.h | 1 + + drivers/char/tpm/tpm-dev-common.c | 1 - + drivers/char/tpm/tpm_tis.c | 29 +- + drivers/firewire/ohci.c | 4 +- + drivers/firmware/efi/efi.c | 5 +- + drivers/gpu/drm/i915/display/intel_sprite.c | 15 +- + .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 7 +- + drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 5 +- + drivers/gpu/drm/i915/gt/intel_engine_pm.c | 8 +- + drivers/gpu/drm/i915/i915_gem.c | 40 +- + drivers/gpu/drm/i915/i915_irq.c | 2 + + drivers/gpu/drm/i915/i915_trace.h | 6 +- + drivers/gpu/drm/i915/selftests/i915_gem.c | 4 +- + drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 8 +- + .../drm/nouveau/nvkm/subdev/devinit/fbmem.h | 8 +- + drivers/gpu/drm/qxl/qxl_image.c | 18 +- + drivers/gpu/drm/qxl/qxl_ioctl.c | 27 +- + drivers/gpu/drm/qxl/qxl_object.c | 12 +- + drivers/gpu/drm/qxl/qxl_object.h | 4 +- + drivers/gpu/drm/qxl/qxl_release.c | 4 +- + drivers/gpu/drm/radeon/radeon_display.c | 2 + + drivers/gpu/drm/ttm/ttm_bo_util.c | 20 +- + drivers/gpu/drm/vmwgfx/vmwgfx_blit.c | 30 +- + drivers/hv/hyperv_vmbus.h | 1 + + drivers/hv/vmbus_drv.c | 8 +- + drivers/leds/trigger/Kconfig | 1 + + drivers/md/raid5.c | 7 +- + drivers/md/raid5.h | 1 + + drivers/mtd/mtdoops.c | 5 +- + drivers/net/ethernet/chelsio/cxgb/common.h | 6 +- + drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 54 +- + drivers/net/ethernet/chelsio/cxgb/sge.c | 53 +- + drivers/net/ethernet/chelsio/cxgb/sge.h | 3 +- + drivers/net/ethernet/chelsio/cxgb/subr.c | 64 +- + drivers/net/ethernet/dlink/sundance.c | 2 +- + drivers/net/ethernet/jme.c | 10 +- + drivers/net/ethernet/jme.h | 2 +- + drivers/net/wireless/ath/ath9k/beacon.c | 2 +- + drivers/pci/controller/pci-hyperv.c | 2 +- + drivers/scsi/fcoe/fcoe.c | 16 +- + drivers/scsi/fcoe/fcoe_ctlr.c | 4 +- + drivers/scsi/libfc/fc_exch.c | 4 +- + drivers/tty/serial/8250/8250.h | 47 +- + drivers/tty/serial/8250/8250_core.c | 17 +- + drivers/tty/serial/8250/8250_fsl.c | 9 + + drivers/tty/serial/8250/8250_ingenic.c | 7 + + drivers/tty/serial/8250/8250_mtk.c | 29 +- + drivers/tty/serial/8250/8250_port.c | 92 +- + drivers/tty/serial/amba-pl011.c | 17 +- + drivers/tty/serial/omap-serial.c | 12 +- + drivers/tty/tty_buffer.c | 4 +- + fs/afs/dir_silly.c | 2 +- + fs/aio.c | 3 +- + fs/btrfs/ctree.h | 1 - + fs/cifs/readdir.c | 2 +- + fs/dcache.c | 39 +- + fs/eventfd.c | 8 +- + fs/fscache/internal.h | 1 - + fs/fscache/main.c | 6 - + fs/fscache/object.c | 13 +- + fs/fuse/readdir.c | 2 +- + fs/inode.c | 2 +- + fs/namei.c | 4 +- + fs/namespace.c | 8 +- + fs/nfs/dir.c | 4 +- + fs/nfs/unlink.c | 4 +- + fs/proc/array.c | 4 +- + fs/proc/base.c | 3 +- + fs/proc/proc_sysctl.c | 2 +- + fs/pstore/platform.c | 5 +- + include/asm-generic/Kbuild | 2 +- + include/asm-generic/hardirq.h | 6 +- + include/asm-generic/kmap_size.h | 12 + + include/asm-generic/kmap_types.h | 11 - + include/asm-generic/preempt.h | 3 + + include/linux/blkdev.h | 2 +- + include/linux/bottom_half.h | 8 +- + include/linux/console.h | 11 + + include/linux/cpuhotplug.h | 1 + + include/linux/cpumask.h | 6 + + include/linux/dcache.h | 4 +- + include/linux/debug_locks.h | 3 +- + include/linux/delay.h | 6 + + include/linux/entry-common.h | 3 +- + include/linux/eventfd.h | 11 +- + include/linux/fs.h | 2 +- + include/linux/hardirq.h | 7 +- + include/linux/highmem-internal.h | 222 +++ + include/linux/highmem.h | 294 ++- + include/linux/interrupt.h | 34 +- + include/linux/io-mapping.h | 28 +- + include/linux/irq_cpustat.h | 28 - + include/linux/irq_work.h | 8 + + include/linux/irqdesc.h | 1 + + include/linux/irqflags.h | 23 +- + include/linux/kernel.h | 26 +- + include/linux/kmsg_dump.h | 52 +- + include/linux/local_lock_internal.h | 111 +- + include/linux/mm_types.h | 4 + + include/linux/mutex.h | 34 +- + include/linux/mutex_rt.h | 130 ++ + include/linux/nfs_xdr.h | 2 +- + include/linux/notifier.h | 6 +- + include/linux/pid.h | 1 + + include/linux/preempt.h | 192 +- + include/linux/printk.h | 30 +- + include/linux/rbtree.h | 27 +- + include/linux/rbtree_type.h | 31 + + include/linux/rcupdate.h | 10 +- + include/linux/rtmutex.h | 46 +- + include/linux/rwlock_rt.h | 109 ++ + include/linux/rwlock_types.h | 4 + + include/linux/rwlock_types_rt.h | 56 + + include/linux/rwsem-rt.h | 70 + + include/linux/rwsem.h | 12 + + include/linux/sched.h | 123 +- + include/linux/sched/hotplug.h | 2 + + include/linux/sched/mm.h | 11 + + include/linux/sched/rt.h | 8 - + include/linux/sched/wake_q.h | 13 +- + include/linux/serial_8250.h | 5 + + include/linux/shmem_fs.h | 2 +- + include/linux/signal.h | 1 + + include/linux/skbuff.h | 7 + + include/linux/smp.h | 3 + + include/linux/spinlock.h | 12 +- + include/linux/spinlock_api_smp.h | 4 +- + include/linux/spinlock_rt.h | 155 ++ + include/linux/spinlock_types.h | 92 +- + include/linux/spinlock_types_nort.h | 39 + + include/linux/spinlock_types_raw.h | 65 + + include/linux/spinlock_types_rt.h | 38 + + include/linux/spinlock_types_up.h | 2 +- + include/linux/stop_machine.h | 5 + + include/linux/thread_info.h | 12 +- + include/linux/trace_events.h | 65 +- + include/linux/u64_stats_sync.h | 42 +- + include/linux/vmstat.h | 4 + + include/linux/vtime.h | 42 +- + include/linux/wait.h | 1 + + include/linux/ww_mutex.h | 8 + + include/net/gen_stats.h | 11 +- + include/net/net_seq_lock.h | 15 + + include/net/netns/xfrm.h | 2 +- + include/net/sch_generic.h | 27 +- + include/trace/events/sched.h | 12 + + init/Kconfig | 7 +- + kernel/Kconfig.locks | 2 +- + kernel/Kconfig.preempt | 7 + + kernel/cgroup/cpuset.c | 86 +- + kernel/cgroup/rstat.c | 5 +- + kernel/cpu.c | 9 +- + kernel/debug/kdb/kdb_main.c | 10 +- + kernel/entry/common.c | 14 +- + kernel/exit.c | 2 +- + kernel/fork.c | 28 +- + kernel/futex/core.c | 87 +- + kernel/irq/handle.c | 8 + + kernel/irq/manage.c | 16 +- + kernel/irq/spurious.c | 8 + + kernel/irq_work.c | 134 +- + kernel/kexec_core.c | 1 - + kernel/ksysfs.c | 12 + + kernel/kthread.c | 16 +- + kernel/locking/Makefile | 10 +- + kernel/locking/lockdep.c | 2 + + kernel/locking/mutex-rt.c | 224 +++ + kernel/locking/rtmutex-debug.c | 102 - + kernel/locking/rtmutex-debug.h | 11 - + kernel/locking/rtmutex.c | 939 +++++++-- + kernel/locking/rtmutex.h | 7 - + kernel/locking/rtmutex_common.h | 36 +- + kernel/locking/rwlock-rt.c | 334 ++++ + kernel/locking/rwsem-rt.c | 317 +++ + kernel/locking/rwsem.c | 6 + + kernel/locking/spinlock.c | 7 + + kernel/locking/spinlock_debug.c | 5 + + kernel/notifier.c | 12 +- + kernel/panic.c | 32 +- + kernel/printk/Makefile | 1 - + kernel/printk/internal.h | 4 - + kernel/printk/printk.c | 1708 +++++++++-------- + kernel/printk/printk_safe.c | 349 +--- + kernel/ptrace.c | 32 +- + kernel/rcu/Kconfig | 4 +- + kernel/rcu/tree.c | 4 +- + kernel/rcu/update.c | 4 +- + kernel/sched/core.c | 1276 +++++++++--- + kernel/sched/cpudeadline.c | 4 +- + kernel/sched/cpupri.c | 4 +- + kernel/sched/cputime.c | 36 +- + kernel/sched/deadline.c | 47 +- + kernel/sched/fair.c | 16 +- + kernel/sched/features.h | 8 + + kernel/sched/rt.c | 83 +- + kernel/sched/sched.h | 72 +- + kernel/sched/swait.c | 1 + + kernel/signal.c | 105 +- + kernel/smp.c | 14 +- + kernel/softirq.c | 431 ++++- + kernel/stop_machine.c | 27 +- + kernel/time/hrtimer.c | 30 + + kernel/time/tick-sched.c | 2 +- + kernel/time/timer.c | 8 +- + kernel/trace/trace.c | 93 +- + kernel/trace/trace.h | 19 - + kernel/trace/trace_events.c | 2 + + kernel/trace/trace_output.c | 19 +- + kernel/workqueue.c | 8 +- + lib/Kconfig.debug | 2 +- + lib/bug.c | 1 + + lib/cpumask.c | 18 + + lib/debugobjects.c | 5 +- + lib/dump_stack.c | 2 + + lib/irq_poll.c | 5 + + lib/locking-selftest.c | 51 + + lib/nmi_backtrace.c | 6 - + lib/scatterlist.c | 2 +- + lib/smp_processor_id.c | 5 + + lib/test_lockup.c | 16 + + mm/Kconfig | 5 +- + mm/highmem.c | 262 ++- + mm/memcontrol.c | 67 +- + mm/page_alloc.c | 180 +- + mm/shmem.c | 31 +- + mm/slab.c | 90 +- + mm/slab.h | 2 +- + mm/slub.c | 148 +- + mm/vmalloc.c | 13 +- + mm/vmstat.c | 12 + + mm/workingset.c | 5 +- + mm/z3fold.c | 17 +- + mm/zsmalloc.c | 85 +- + net/Kconfig | 2 +- + net/core/dev.c | 33 +- + net/core/gen_estimator.c | 6 +- + net/core/gen_stats.c | 12 +- + net/core/sock.c | 6 +- + net/sched/sch_api.c | 2 +- + net/sched/sch_generic.c | 10 + + net/sunrpc/svc_xprt.c | 4 +- + net/xfrm/xfrm_state.c | 3 +- + 397 files changed, 8930 insertions(+), 4789 deletions(-) + delete mode 100644 arch/alpha/include/asm/kmap_types.h + delete mode 100644 arch/arc/include/asm/kmap_types.h + delete mode 100644 arch/arm/include/asm/kmap_types.h + delete mode 100644 arch/arm/mm/highmem.c + delete mode 100644 arch/ia64/include/asm/kmap_types.h + delete mode 100644 arch/microblaze/mm/highmem.c + delete mode 100644 arch/mips/include/asm/kmap_types.h + delete mode 100644 arch/nds32/mm/highmem.c + delete mode 100644 arch/parisc/include/asm/kmap_types.h + delete mode 100644 arch/powerpc/include/asm/kmap_types.h + delete mode 100644 arch/powerpc/mm/highmem.c + delete mode 100644 arch/sh/include/asm/kmap_types.h + delete mode 100644 arch/sparc/include/asm/kmap_types.h + delete mode 100644 arch/sparc/mm/highmem.c + delete mode 100644 arch/um/include/asm/kmap_types.h + delete mode 100644 arch/x86/include/asm/kmap_types.h + create mode 100644 include/asm-generic/kmap_size.h + delete mode 100644 include/asm-generic/kmap_types.h + create mode 100644 include/linux/highmem-internal.h + delete mode 100644 include/linux/irq_cpustat.h + create mode 100644 include/linux/mutex_rt.h + create mode 100644 include/linux/rbtree_type.h + create mode 100644 include/linux/rwlock_rt.h + create mode 100644 include/linux/rwlock_types_rt.h + create mode 100644 include/linux/rwsem-rt.h + create mode 100644 include/linux/spinlock_rt.h + create mode 100644 include/linux/spinlock_types_nort.h + create mode 100644 include/linux/spinlock_types_raw.h + create mode 100644 include/linux/spinlock_types_rt.h + create mode 100644 include/net/net_seq_lock.h + create mode 100644 kernel/locking/mutex-rt.c + create mode 100644 kernel/locking/rwlock-rt.c + create mode 100644 kernel/locking/rwsem-rt.c + +diff --git a/Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.rst b/Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.rst +index 72f0f6fbd..6f89cf1e5 100644 +--- a/Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.rst ++++ b/Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.rst +@@ -38,7 +38,7 @@ sections. + RCU-preempt Expedited Grace Periods + =================================== + +-``CONFIG_PREEMPT=y`` kernels implement RCU-preempt. ++``CONFIG_PREEMPTION=y`` kernels implement RCU-preempt. + The overall flow of the handling of a given CPU by an RCU-preempt + expedited grace period is shown in the following diagram: + +@@ -112,7 +112,7 @@ things. + RCU-sched Expedited Grace Periods + --------------------------------- + +-``CONFIG_PREEMPT=n`` kernels implement RCU-sched. The overall flow of ++``CONFIG_PREEMPTION=n`` kernels implement RCU-sched. The overall flow of + the handling of a given CPU by an RCU-sched expedited grace period is + shown in the following diagram: + +diff --git a/Documentation/RCU/Design/Requirements/Requirements.rst b/Documentation/RCU/Design/Requirements/Requirements.rst +index 1ae79a10a..17d38480e 100644 +--- a/Documentation/RCU/Design/Requirements/Requirements.rst ++++ b/Documentation/RCU/Design/Requirements/Requirements.rst +@@ -78,7 +78,7 @@ RCU treats a nested set as one big RCU read-side critical section. + Production-quality implementations of ``rcu_read_lock()`` and + ``rcu_read_unlock()`` are extremely lightweight, and in fact have + exactly zero overhead in Linux kernels built for production use with +-``CONFIG_PREEMPT=n``. ++``CONFIG_PREEMPTION=n``. + + This guarantee allows ordering to be enforced with extremely low + overhead to readers, for example: +@@ -1182,7 +1182,7 @@ and has become decreasingly so as memory sizes have expanded and memory + costs have plummeted. However, as I learned from Matt Mackall's + `bloatwatch `__ efforts, memory + footprint is critically important on single-CPU systems with +-non-preemptible (``CONFIG_PREEMPT=n``) kernels, and thus `tiny ++non-preemptible (``CONFIG_PREEMPTION=n``) kernels, and thus `tiny + RCU `__ + was born. Josh Triplett has since taken over the small-memory banner + with his `Linux kernel tinification `__ +@@ -1498,7 +1498,7 @@ limitations. + + Implementations of RCU for which ``rcu_read_lock()`` and + ``rcu_read_unlock()`` generate no code, such as Linux-kernel RCU when +-``CONFIG_PREEMPT=n``, can be nested arbitrarily deeply. After all, there ++``CONFIG_PREEMPTION=n``, can be nested arbitrarily deeply. After all, there + is no overhead. Except that if all these instances of + ``rcu_read_lock()`` and ``rcu_read_unlock()`` are visible to the + compiler, compilation will eventually fail due to exhausting memory, +@@ -1771,7 +1771,7 @@ implementation can be a no-op. + + However, once the scheduler has spawned its first kthread, this early + boot trick fails for ``synchronize_rcu()`` (as well as for +-``synchronize_rcu_expedited()``) in ``CONFIG_PREEMPT=y`` kernels. The ++``synchronize_rcu_expedited()``) in ``CONFIG_PREEMPTION=y`` kernels. The + reason is that an RCU read-side critical section might be preempted, + which means that a subsequent ``synchronize_rcu()`` really does have to + wait for something, as opposed to simply returning immediately. +@@ -2010,7 +2010,7 @@ the following: + 5 rcu_read_unlock(); + 6 do_something_with(v, user_v); + +-If the compiler did make this transformation in a ``CONFIG_PREEMPT=n`` kernel ++If the compiler did make this transformation in a ``CONFIG_PREEMPTION=n`` kernel + build, and if ``get_user()`` did page fault, the result would be a quiescent + state in the middle of an RCU read-side critical section. This misplaced + quiescent state could result in line 4 being a use-after-free access, +@@ -2289,10 +2289,10 @@ decides to throw at it. + + The Linux kernel is used for real-time workloads, especially in + conjunction with the `-rt +-patchset `__. The ++patchset `__. The + real-time-latency response requirements are such that the traditional + approach of disabling preemption across RCU read-side critical sections +-is inappropriate. Kernels built with ``CONFIG_PREEMPT=y`` therefore use ++is inappropriate. Kernels built with ``CONFIG_PREEMPTION=y`` therefore use + an RCU implementation that allows RCU read-side critical sections to be + preempted. This requirement made its presence known after users made it + clear that an earlier `real-time +@@ -2414,7 +2414,7 @@ includes ``rcu_read_lock_bh()``, ``rcu_read_unlock_bh()``, + ``call_rcu_bh()``, ``rcu_barrier_bh()``, and + ``rcu_read_lock_bh_held()``. However, the update-side APIs are now + simple wrappers for other RCU flavors, namely RCU-sched in +-CONFIG_PREEMPT=n kernels and RCU-preempt otherwise. ++CONFIG_PREEMPTION=n kernels and RCU-preempt otherwise. + + Sched Flavor (Historical) + ~~~~~~~~~~~~~~~~~~~~~~~~~ +@@ -2432,11 +2432,11 @@ not have this property, given that any point in the code outside of an + RCU read-side critical section can be a quiescent state. Therefore, + *RCU-sched* was created, which follows “classic” RCU in that an + RCU-sched grace period waits for pre-existing interrupt and NMI +-handlers. In kernels built with ``CONFIG_PREEMPT=n``, the RCU and ++handlers. In kernels built with ``CONFIG_PREEMPTION=n``, the RCU and + RCU-sched APIs have identical implementations, while kernels built with +-``CONFIG_PREEMPT=y`` provide a separate implementation for each. ++``CONFIG_PREEMPTION=y`` provide a separate implementation for each. + +-Note well that in ``CONFIG_PREEMPT=y`` kernels, ++Note well that in ``CONFIG_PREEMPTION=y`` kernels, + ``rcu_read_lock_sched()`` and ``rcu_read_unlock_sched()`` disable and + re-enable preemption, respectively. This means that if there was a + preemption attempt during the RCU-sched read-side critical section, +@@ -2599,10 +2599,10 @@ userspace execution also delimit tasks-RCU read-side critical sections. + + The tasks-RCU API is quite compact, consisting only of + ``call_rcu_tasks()``, ``synchronize_rcu_tasks()``, and +-``rcu_barrier_tasks()``. In ``CONFIG_PREEMPT=n`` kernels, trampolines ++``rcu_barrier_tasks()``. In ``CONFIG_PREEMPTION=n`` kernels, trampolines + cannot be preempted, so these APIs map to ``call_rcu()``, + ``synchronize_rcu()``, and ``rcu_barrier()``, respectively. In +-``CONFIG_PREEMPT=y`` kernels, trampolines can be preempted, and these ++``CONFIG_PREEMPTION=y`` kernels, trampolines can be preempted, and these + three APIs are therefore implemented by separate functions that check + for voluntary context switches. + +diff --git a/Documentation/RCU/checklist.rst b/Documentation/RCU/checklist.rst +index 2efed9926..7ed495604 100644 +--- a/Documentation/RCU/checklist.rst ++++ b/Documentation/RCU/checklist.rst +@@ -214,7 +214,7 @@ over a rather long period of time, but improvements are always welcome! + the rest of the system. + + 7. As of v4.20, a given kernel implements only one RCU flavor, +- which is RCU-sched for PREEMPT=n and RCU-preempt for PREEMPT=y. ++ which is RCU-sched for PREEMPTION=n and RCU-preempt for PREEMPTION=y. + If the updater uses call_rcu() or synchronize_rcu(), + then the corresponding readers my use rcu_read_lock() and + rcu_read_unlock(), rcu_read_lock_bh() and rcu_read_unlock_bh(), +diff --git a/Documentation/RCU/rcubarrier.rst b/Documentation/RCU/rcubarrier.rst +index f64f4413a..3b4a24877 100644 +--- a/Documentation/RCU/rcubarrier.rst ++++ b/Documentation/RCU/rcubarrier.rst +@@ -9,7 +9,7 @@ RCU (read-copy update) is a synchronization mechanism that can be thought + of as a replacement for read-writer locking (among other things), but with + very low-overhead readers that are immune to deadlock, priority inversion, + and unbounded latency. RCU read-side critical sections are delimited +-by rcu_read_lock() and rcu_read_unlock(), which, in non-CONFIG_PREEMPT ++by rcu_read_lock() and rcu_read_unlock(), which, in non-CONFIG_PREEMPTION + kernels, generate no code whatsoever. + + This means that RCU writers are unaware of the presence of concurrent +@@ -329,10 +329,10 @@ Answer: This cannot happen. The reason is that on_each_cpu() has its last + to smp_call_function() and further to smp_call_function_on_cpu(), + causing this latter to spin until the cross-CPU invocation of + rcu_barrier_func() has completed. This by itself would prevent +- a grace period from completing on non-CONFIG_PREEMPT kernels, ++ a grace period from completing on non-CONFIG_PREEMPTION kernels, + since each CPU must undergo a context switch (or other quiescent + state) before the grace period can complete. However, this is +- of no use in CONFIG_PREEMPT kernels. ++ of no use in CONFIG_PREEMPTION kernels. + + Therefore, on_each_cpu() disables preemption across its call + to smp_call_function() and also across the local call to +diff --git a/Documentation/RCU/stallwarn.rst b/Documentation/RCU/stallwarn.rst +index c9ab6af4d..e97d1b487 100644 +--- a/Documentation/RCU/stallwarn.rst ++++ b/Documentation/RCU/stallwarn.rst +@@ -25,7 +25,7 @@ warnings: + + - A CPU looping with bottom halves disabled. + +-- For !CONFIG_PREEMPT kernels, a CPU looping anywhere in the kernel ++- For !CONFIG_PREEMPTION kernels, a CPU looping anywhere in the kernel + without invoking schedule(). If the looping in the kernel is + really expected and desirable behavior, you might need to add + some calls to cond_resched(). +@@ -44,7 +44,7 @@ warnings: + result in the ``rcu_.*kthread starved for`` console-log message, + which will include additional debugging information. + +-- A CPU-bound real-time task in a CONFIG_PREEMPT kernel, which might ++- A CPU-bound real-time task in a CONFIG_PREEMPTION kernel, which might + happen to preempt a low-priority task in the middle of an RCU + read-side critical section. This is especially damaging if + that low-priority task is not permitted to run on any other CPU, +diff --git a/Documentation/RCU/whatisRCU.rst b/Documentation/RCU/whatisRCU.rst +index fb3ff76c3..3b2b1479f 100644 +--- a/Documentation/RCU/whatisRCU.rst ++++ b/Documentation/RCU/whatisRCU.rst +@@ -684,7 +684,7 @@ Quick Quiz #1: + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + This section presents a "toy" RCU implementation that is based on + "classic RCU". It is also short on performance (but only for updates) and +-on features such as hotplug CPU and the ability to run in CONFIG_PREEMPT ++on features such as hotplug CPU and the ability to run in CONFIG_PREEMPTION + kernels. The definitions of rcu_dereference() and rcu_assign_pointer() + are the same as those shown in the preceding section, so they are omitted. + :: +@@ -740,7 +740,7 @@ Quick Quiz #2: + Quick Quiz #3: + If it is illegal to block in an RCU read-side + critical section, what the heck do you do in +- PREEMPT_RT, where normal spinlocks can block??? ++ CONFIG_PREEMPT_RT, where normal spinlocks can block??? + + :ref:`Answers to Quick Quiz <8_whatisRCU>` + +@@ -1094,7 +1094,7 @@ Quick Quiz #2: + overhead is **negative**. + + Answer: +- Imagine a single-CPU system with a non-CONFIG_PREEMPT ++ Imagine a single-CPU system with a non-CONFIG_PREEMPTION + kernel where a routing table is used by process-context + code, but can be updated by irq-context code (for example, + by an "ICMP REDIRECT" packet). The usual way of handling +@@ -1121,10 +1121,10 @@ Answer: + Quick Quiz #3: + If it is illegal to block in an RCU read-side + critical section, what the heck do you do in +- PREEMPT_RT, where normal spinlocks can block??? ++ CONFIG_PREEMPT_RT, where normal spinlocks can block??? + + Answer: +- Just as PREEMPT_RT permits preemption of spinlock ++ Just as CONFIG_PREEMPT_RT permits preemption of spinlock + critical sections, it permits preemption of RCU + read-side critical sections. It also permits + spinlocks blocking while in RCU read-side critical +diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt +index 71567aa7e..ee4911a95 100644 +--- a/Documentation/admin-guide/kernel-parameters.txt ++++ b/Documentation/admin-guide/kernel-parameters.txt +@@ -4397,6 +4397,10 @@ + value, meaning that RCU_SOFTIRQ is used by default. + Specify rcutree.use_softirq=0 to use rcuc kthreads. + ++ But note that CONFIG_PREEMPT_RT=y kernels disable ++ this kernel boot parameter, forcibly setting it ++ to zero. ++ + rcutree.rcu_fanout_exact= [KNL] + Disable autobalancing of the rcu_node combining + tree. This is used by rcutorture, and might +@@ -4775,6 +4779,13 @@ + only normal grace-period primitives. No effect + on CONFIG_TINY_RCU kernels. + ++ But note that CONFIG_PREEMPT_RT=y kernels enables ++ this kernel boot parameter, forcibly setting ++ it to the value one, that is, converting any ++ post-boot attempt at an expedited RCU grace ++ period to instead use normal non-expedited ++ grace-period processing. ++ + rcupdate.rcu_task_ipi_delay= [KNL] + Set time in jiffies during which RCU tasks will + avoid sending IPIs, starting with the beginning +diff --git a/Documentation/driver-api/io-mapping.rst b/Documentation/driver-api/io-mapping.rst +index a966239f0..a7830c594 100644 +--- a/Documentation/driver-api/io-mapping.rst ++++ b/Documentation/driver-api/io-mapping.rst +@@ -20,78 +20,64 @@ A mapping object is created during driver initialization using:: + mappable, while 'size' indicates how large a mapping region to + enable. Both are in bytes. + +-This _wc variant provides a mapping which may only be used +-with the io_mapping_map_atomic_wc or io_mapping_map_wc. ++This _wc variant provides a mapping which may only be used with ++io_mapping_map_local_wc() or io_mapping_map_wc(). + +-With this mapping object, individual pages can be mapped either atomically +-or not, depending on the necessary scheduling environment. Of course, atomic +-maps are more efficient:: ++With this mapping object, individual pages can be mapped either temporarily ++or long term, depending on the requirements. Of course, temporary maps are ++more efficient. + +- void *io_mapping_map_atomic_wc(struct io_mapping *mapping, +- unsigned long offset) ++ void *io_mapping_map_local_wc(struct io_mapping *mapping, ++ unsigned long offset) + +-'offset' is the offset within the defined mapping region. +-Accessing addresses beyond the region specified in the +-creation function yields undefined results. Using an offset +-which is not page aligned yields an undefined result. The +-return value points to a single page in CPU address space. ++'offset' is the offset within the defined mapping region. Accessing ++addresses beyond the region specified in the creation function yields ++undefined results. Using an offset which is not page aligned yields an ++undefined result. The return value points to a single page in CPU address ++space. + +-This _wc variant returns a write-combining map to the +-page and may only be used with mappings created by +-io_mapping_create_wc ++This _wc variant returns a write-combining map to the page and may only be ++used with mappings created by io_mapping_create_wc() + +-Note that the task may not sleep while holding this page +-mapped. ++Temporary mappings are only valid in the context of the caller. The mapping ++is not guaranteed to be globaly visible. + +-:: ++io_mapping_map_local_wc() has a side effect on X86 32bit as it disables ++migration to make the mapping code work. No caller can rely on this side ++effect. + +- void io_mapping_unmap_atomic(void *vaddr) ++Nested mappings need to be undone in reverse order because the mapping ++code uses a stack for keeping track of them:: + +-'vaddr' must be the value returned by the last +-io_mapping_map_atomic_wc call. This unmaps the specified +-page and allows the task to sleep once again. ++ addr1 = io_mapping_map_local_wc(map1, offset1); ++ addr2 = io_mapping_map_local_wc(map2, offset2); ++ ... ++ io_mapping_unmap_local(addr2); ++ io_mapping_unmap_local(addr1); + +-If you need to sleep while holding the lock, you can use the non-atomic +-variant, although they may be significantly slower. ++The mappings are released with:: + +-:: ++ void io_mapping_unmap_local(void *vaddr) ++ ++'vaddr' must be the value returned by the last io_mapping_map_local_wc() ++call. This unmaps the specified mapping and undoes eventual side effects of ++the mapping function. ++ ++If you need to sleep while holding a mapping, you can use the regular ++variant, although this may be significantly slower:: + + void *io_mapping_map_wc(struct io_mapping *mapping, + unsigned long offset) + +-This works like io_mapping_map_atomic_wc except it allows +-the task to sleep while holding the page mapped. ++This works like io_mapping_map_local_wc() except it has no side effects and ++the pointer is globaly visible. + +- +-:: ++The mappings are released with:: + + void io_mapping_unmap(void *vaddr) + +-This works like io_mapping_unmap_atomic, except it is used +-for pages mapped with io_mapping_map_wc. ++Use for pages mapped with io_mapping_map_wc(). + + At driver close time, the io_mapping object must be freed:: + + void io_mapping_free(struct io_mapping *mapping) +- +-Current Implementation +-====================== +- +-The initial implementation of these functions uses existing mapping +-mechanisms and so provides only an abstraction layer and no new +-functionality. +- +-On 64-bit processors, io_mapping_create_wc calls ioremap_wc for the whole +-range, creating a permanent kernel-visible mapping to the resource. The +-map_atomic and map functions add the requested offset to the base of the +-virtual address returned by ioremap_wc. +- +-On 32-bit processors with HIGHMEM defined, io_mapping_map_atomic_wc uses +-kmap_atomic_pfn to map the specified page in an atomic fashion; +-kmap_atomic_pfn isn't really supposed to be used with device pages, but it +-provides an efficient mapping for this usage. +- +-On 32-bit processors without HIGHMEM defined, io_mapping_map_atomic_wc and +-io_mapping_map_wc both use ioremap_wc, a terribly inefficient function which +-performs an IPI to inform all processors about the new mapping. This results +-in a significant performance penalty. +diff --git a/arch/Kconfig b/arch/Kconfig +index b0319fa3c..32694b49d 100644 +--- a/arch/Kconfig ++++ b/arch/Kconfig +@@ -50,6 +50,7 @@ config OPROFILE + tristate "OProfile system profiling" + depends on PROFILING + depends on HAVE_OPROFILE ++ depends on !PREEMPT_RT + select RING_BUFFER + select RING_BUFFER_ALLOW_SWAP + help +@@ -683,6 +684,12 @@ config HAVE_TIF_NOHZ + config HAVE_VIRT_CPU_ACCOUNTING + bool + ++config HAVE_VIRT_CPU_ACCOUNTING_IDLE ++ bool ++ help ++ Architecture has its own way to account idle CPU time and therefore ++ doesn't implement vtime_account_idle(). ++ + config ARCH_HAS_SCALED_CPUTIME + bool + +@@ -697,7 +704,6 @@ config HAVE_VIRT_CPU_ACCOUNTING_GEN + some 32-bit arches may require multiple accesses, so proper + locking is needed to protect against concurrent accesses. + +- + config HAVE_IRQ_TIME_ACCOUNTING + bool + help +diff --git a/arch/alpha/include/asm/kmap_types.h b/arch/alpha/include/asm/kmap_types.h +deleted file mode 100644 +index 651714b45..000000000 +--- a/arch/alpha/include/asm/kmap_types.h ++++ /dev/null +@@ -1,15 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef _ASM_KMAP_TYPES_H +-#define _ASM_KMAP_TYPES_H +- +-/* Dummy header just to define km_type. */ +- +-#ifdef CONFIG_DEBUG_HIGHMEM +-#define __WITH_KM_FENCE +-#endif +- +-#include +- +-#undef __WITH_KM_FENCE +- +-#endif +diff --git a/arch/alpha/include/asm/spinlock_types.h b/arch/alpha/include/asm/spinlock_types.h +index 1d5716bc0..6883bc952 100644 +--- a/arch/alpha/include/asm/spinlock_types.h ++++ b/arch/alpha/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef _ALPHA_SPINLOCK_TYPES_H + #define _ALPHA_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + volatile unsigned int lock; + } arch_spinlock_t; +diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig +index 0a89cc9de..d8804001d 100644 +--- a/arch/arc/Kconfig ++++ b/arch/arc/Kconfig +@@ -507,6 +507,7 @@ config LINUX_RAM_BASE + config HIGHMEM + bool "High Memory Support" + select ARCH_DISCONTIGMEM_ENABLE ++ select KMAP_LOCAL + help + With ARC 2G:2G address split, only upper 2G is directly addressable by + kernel. Enable this to potentially allow access to rest of 2G and PAE +diff --git a/arch/arc/include/asm/highmem.h b/arch/arc/include/asm/highmem.h +index 6e5eafb3a..a6b8e2c35 100644 +--- a/arch/arc/include/asm/highmem.h ++++ b/arch/arc/include/asm/highmem.h +@@ -9,17 +9,29 @@ + #ifdef CONFIG_HIGHMEM + + #include +-#include ++#include ++ ++#define FIXMAP_SIZE PGDIR_SIZE ++#define PKMAP_SIZE PGDIR_SIZE + + /* start after vmalloc area */ + #define FIXMAP_BASE (PAGE_OFFSET - FIXMAP_SIZE - PKMAP_SIZE) +-#define FIXMAP_SIZE PGDIR_SIZE /* only 1 PGD worth */ +-#define KM_TYPE_NR ((FIXMAP_SIZE >> PAGE_SHIFT)/NR_CPUS) +-#define FIXMAP_ADDR(nr) (FIXMAP_BASE + ((nr) << PAGE_SHIFT)) ++ ++#define FIX_KMAP_SLOTS (KM_MAX_IDX * NR_CPUS) ++#define FIX_KMAP_BEGIN (0UL) ++#define FIX_KMAP_END ((FIX_KMAP_BEGIN + FIX_KMAP_SLOTS) - 1) ++ ++#define FIXADDR_TOP (FIXMAP_BASE + (FIX_KMAP_END << PAGE_SHIFT)) ++ ++/* ++ * This should be converted to the asm-generic version, but of course this ++ * is needlessly different from all other architectures. Sigh - tglx ++ */ ++#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) ++#define __virt_to_fix(x) (((FIXADDR_TOP - ((x) & PAGE_MASK))) >> PAGE_SHIFT) + + /* start after fixmap area */ + #define PKMAP_BASE (FIXMAP_BASE + FIXMAP_SIZE) +-#define PKMAP_SIZE PGDIR_SIZE + #define LAST_PKMAP (PKMAP_SIZE >> PAGE_SHIFT) + #define LAST_PKMAP_MASK (LAST_PKMAP - 1) + #define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) +@@ -29,11 +41,13 @@ + + extern void kmap_init(void); + ++#define arch_kmap_local_post_unmap(vaddr) \ ++ local_flush_tlb_kernel_range(vaddr, vaddr + PAGE_SIZE) ++ + static inline void flush_cache_kmaps(void) + { + flush_cache_all(); + } +- + #endif + + #endif +diff --git a/arch/arc/include/asm/kmap_types.h b/arch/arc/include/asm/kmap_types.h +deleted file mode 100644 +index fecf7851e..000000000 +--- a/arch/arc/include/asm/kmap_types.h ++++ /dev/null +@@ -1,14 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0-only */ +-/* +- * Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com) +- */ +- +-#ifndef _ASM_KMAP_TYPES_H +-#define _ASM_KMAP_TYPES_H +- +-/* +- * We primarily need to define KM_TYPE_NR here but that in turn +- * is a function of PGDIR_SIZE etc. +- * To avoid circular deps issue, put everything in asm/highmem.h +- */ +-#endif +diff --git a/arch/arc/mm/highmem.c b/arch/arc/mm/highmem.c +index 1b9f473c6..c79912a6b 100644 +--- a/arch/arc/mm/highmem.c ++++ b/arch/arc/mm/highmem.c +@@ -36,9 +36,8 @@ + * This means each only has 1 PGDIR_SIZE worth of kvaddr mappings, which means + * 2M of kvaddr space for typical config (8K page and 11:8:13 traversal split) + * +- * - fixmap anyhow needs a limited number of mappings. So 2M kvaddr == 256 PTE +- * slots across NR_CPUS would be more than sufficient (generic code defines +- * KM_TYPE_NR as 20). ++ * - The fixed KMAP slots for kmap_local/atomic() require KM_MAX_IDX slots per ++ * CPU. So the number of CPUs sharing a single PTE page is limited. + * + * - pkmap being preemptible, in theory could do with more than 256 concurrent + * mappings. However, generic pkmap code: map_new_virtual(), doesn't traverse +@@ -47,48 +46,6 @@ + */ + + extern pte_t * pkmap_page_table; +-static pte_t * fixmap_page_table; +- +-void *kmap_atomic_high_prot(struct page *page, pgprot_t prot) +-{ +- int idx, cpu_idx; +- unsigned long vaddr; +- +- cpu_idx = kmap_atomic_idx_push(); +- idx = cpu_idx + KM_TYPE_NR * smp_processor_id(); +- vaddr = FIXMAP_ADDR(idx); +- +- set_pte_at(&init_mm, vaddr, fixmap_page_table + idx, +- mk_pte(page, prot)); +- +- return (void *)vaddr; +-} +-EXPORT_SYMBOL(kmap_atomic_high_prot); +- +-void kunmap_atomic_high(void *kv) +-{ +- unsigned long kvaddr = (unsigned long)kv; +- +- if (kvaddr >= FIXMAP_BASE && kvaddr < (FIXMAP_BASE + FIXMAP_SIZE)) { +- +- /* +- * Because preemption is disabled, this vaddr can be associated +- * with the current allocated index. +- * But in case of multiple live kmap_atomic(), it still relies on +- * callers to unmap in right order. +- */ +- int cpu_idx = kmap_atomic_idx(); +- int idx = cpu_idx + KM_TYPE_NR * smp_processor_id(); +- +- WARN_ON(kvaddr != FIXMAP_ADDR(idx)); +- +- pte_clear(&init_mm, kvaddr, fixmap_page_table + idx); +- local_flush_tlb_kernel_range(kvaddr, kvaddr + PAGE_SIZE); +- +- kmap_atomic_idx_pop(); +- } +-} +-EXPORT_SYMBOL(kunmap_atomic_high); + + static noinline pte_t * __init alloc_kmap_pgtable(unsigned long kvaddr) + { +@@ -108,10 +65,9 @@ void __init kmap_init(void) + { + /* Due to recursive include hell, we can't do this in processor.h */ + BUILD_BUG_ON(PAGE_OFFSET < (VMALLOC_END + FIXMAP_SIZE + PKMAP_SIZE)); ++ BUILD_BUG_ON(LAST_PKMAP > PTRS_PER_PTE); ++ BUILD_BUG_ON(FIX_KMAP_SLOTS > PTRS_PER_PTE); + +- BUILD_BUG_ON(KM_TYPE_NR > PTRS_PER_PTE); + pkmap_page_table = alloc_kmap_pgtable(PKMAP_BASE); +- +- BUILD_BUG_ON(LAST_PKMAP > PTRS_PER_PTE); +- fixmap_page_table = alloc_kmap_pgtable(FIXMAP_BASE); ++ alloc_kmap_pgtable(FIXMAP_BASE); + } +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 400d53736..220c116cd 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -31,6 +31,7 @@ config ARM + select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX + select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7 + select ARCH_SUPPORTS_ATOMIC_RMW ++ select ARCH_SUPPORTS_RT if HAVE_POSIX_CPU_TIMERS_TASK_WORK + select ARCH_USE_BUILTIN_BSWAP + select ARCH_USE_CMPXCHG_LOCKREF + select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU +@@ -66,7 +67,7 @@ config ARM + select HARDIRQS_SW_RESEND + select HAVE_ARCH_AUDITSYSCALL if AEABI && !OABI_COMPAT + select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6 +- select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU ++ select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU && !PREEMPT_RT + select HAVE_ARCH_KFENCE if MMU + select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU + select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL +@@ -109,6 +110,7 @@ config ARM + select HAVE_PERF_EVENTS + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP ++ select HAVE_PREEMPT_LAZY + select MMU_GATHER_RCU_TABLE_FREE if SMP && ARM_LPAE + select HAVE_REGS_AND_STACK_ACCESS_API + select HAVE_RSEQ +@@ -124,6 +126,7 @@ config ARM + select OLD_SIGSUSPEND3 + select PCI_SYSCALL if PCI + select PERF_USE_VMALLOC ++ select HAVE_POSIX_CPU_TIMERS_TASK_WORK if !KVM + select RTC_LIB + select SET_FS + select SYS_SUPPORTS_APM_EMULATION +@@ -1520,6 +1523,7 @@ config HAVE_ARCH_PFN_VALID + config HIGHMEM + bool "High Memory Support" + depends on MMU ++ select KMAP_LOCAL + help + The address space of ARM processors is only 4 Gigabytes large + and it has to accommodate user address space, kernel address +diff --git a/arch/arm/include/asm/fixmap.h b/arch/arm/include/asm/fixmap.h +index 9575b4040..707068f85 100644 +--- a/arch/arm/include/asm/fixmap.h ++++ b/arch/arm/include/asm/fixmap.h +@@ -7,14 +7,14 @@ + #define FIXADDR_TOP (FIXADDR_END - PAGE_SIZE) + + #include +-#include ++#include + + enum fixed_addresses { + FIX_EARLYCON_MEM_BASE, + __end_of_permanent_fixed_addresses, + + FIX_KMAP_BEGIN = __end_of_permanent_fixed_addresses, +- FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS) - 1, ++ FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_MAX_IDX * NR_CPUS) - 1, + + /* Support writing RO kernel text via kprobes, jump labels, etc. */ + FIX_TEXT_POKE0, +diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h +index b95848ed2..706efafbf 100644 +--- a/arch/arm/include/asm/hardirq.h ++++ b/arch/arm/include/asm/hardirq.h +@@ -2,16 +2,11 @@ + #ifndef __ASM_HARDIRQ_H + #define __ASM_HARDIRQ_H + +-#include +-#include + #include + +-typedef struct { +- unsigned int __softirq_pending; +-} ____cacheline_aligned irq_cpustat_t; +- +-#include /* Standard mappings for irq_cpustat_t above */ +- + #define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 ++#define ack_bad_irq ack_bad_irq ++ ++#include + + #endif /* __ASM_HARDIRQ_H */ +diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h +index 31811be38..b22dffa8c 100644 +--- a/arch/arm/include/asm/highmem.h ++++ b/arch/arm/include/asm/highmem.h +@@ -2,7 +2,8 @@ + #ifndef _ASM_HIGHMEM_H + #define _ASM_HIGHMEM_H + +-#include ++#include ++#include + + #define PKMAP_BASE (PAGE_OFFSET - PMD_SIZE) + #define LAST_PKMAP PTRS_PER_PTE +@@ -46,19 +47,32 @@ extern pte_t *pkmap_page_table; + + #ifdef ARCH_NEEDS_KMAP_HIGH_GET + extern void *kmap_high_get(struct page *page); +-#else ++ ++static inline void *arch_kmap_local_high_get(struct page *page) ++{ ++ if (IS_ENABLED(CONFIG_DEBUG_HIGHMEM) && !cache_is_vivt()) ++ return NULL; ++ return kmap_high_get(page); ++} ++#define arch_kmap_local_high_get arch_kmap_local_high_get ++ ++#else /* ARCH_NEEDS_KMAP_HIGH_GET */ + static inline void *kmap_high_get(struct page *page) + { + return NULL; + } +-#endif ++#endif /* !ARCH_NEEDS_KMAP_HIGH_GET */ + +-/* +- * The following functions are already defined by +- * when CONFIG_HIGHMEM is not set. +- */ +-#ifdef CONFIG_HIGHMEM +-extern void *kmap_atomic_pfn(unsigned long pfn); +-#endif ++#define arch_kmap_local_post_map(vaddr, pteval) \ ++ local_flush_tlb_kernel_page(vaddr) ++ ++#define arch_kmap_local_pre_unmap(vaddr) \ ++do { \ ++ if (cache_is_vivt()) \ ++ __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE); \ ++} while (0) ++ ++#define arch_kmap_local_post_unmap(vaddr) \ ++ local_flush_tlb_kernel_page(vaddr) + + #endif +diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h +index 54b0180c8..36d040c68 100644 +--- a/arch/arm/include/asm/irq.h ++++ b/arch/arm/include/asm/irq.h +@@ -31,6 +31,8 @@ void handle_IRQ(unsigned int, struct pt_regs *); + void init_IRQ(void); + + #ifdef CONFIG_SMP ++#include ++ + extern bool arch_trigger_cpumask_backtrace(const cpumask_t *mask, + bool exclude_self); + #define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace +diff --git a/arch/arm/include/asm/kmap_types.h b/arch/arm/include/asm/kmap_types.h +deleted file mode 100644 +index 5590940ee..000000000 +--- a/arch/arm/include/asm/kmap_types.h ++++ /dev/null +@@ -1,10 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef __ARM_KMAP_TYPES_H +-#define __ARM_KMAP_TYPES_H +- +-/* +- * This is the "bare minimum". AIO seems to require this. +- */ +-#define KM_TYPE_NR 16 +- +-#endif +diff --git a/arch/arm/include/asm/spinlock_types.h b/arch/arm/include/asm/spinlock_types.h +index 597695864..a37c08039 100644 +--- a/arch/arm/include/asm/spinlock_types.h ++++ b/arch/arm/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef __ASM_SPINLOCK_TYPES_H + #define __ASM_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + #define TICKET_SHIFT 16 + + typedef struct { +diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h +index 16bcc6f36..ac682026a 100644 +--- a/arch/arm/include/asm/thread_info.h ++++ b/arch/arm/include/asm/thread_info.h +@@ -55,6 +55,7 @@ struct cpu_context_save { + struct thread_info { + unsigned long flags; /* low level flags */ + int preempt_count; /* 0 => preemptable, <0 => bug */ ++ int preempt_lazy_count; /* 0 => preemptable, <0 => bug */ + mm_segment_t addr_limit; /* address limit */ + struct task_struct *task; /* main task structure */ + __u32 cpu; /* cpu */ +@@ -145,6 +146,7 @@ extern int vfp_restore_user_hwstate(struct user_vfp *, + #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ + #define TIF_UPROBE 3 /* breakpointed or singlestepping */ + #define TIF_NOTIFY_SIGNAL 4 /* signal notifications exist */ ++#define TIF_NEED_RESCHED_LAZY 7 + #define TIF_PATCH_PENDING 8 /* pending live patching update */ + + #define TIF_USING_IWMMXT 17 +@@ -159,6 +161,7 @@ extern int vfp_restore_user_hwstate(struct user_vfp *, + #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) + #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) + #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) ++#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) + #define _TIF_UPROBE (1 << TIF_UPROBE) + #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) + #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) +@@ -176,7 +179,7 @@ extern int vfp_restore_user_hwstate(struct user_vfp *, + * Change these and you break ASM code in entry-common.S + */ + #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ +- _TIF_NOTIFY_RESUME | _TIF_UPROBE | \ ++ _TIF_NOTIFY_RESUME | _TIF_UPROBE | _TIF_NEED_RESCHED_LAZY | \ + _TIF_NOTIFY_SIGNAL) + + #endif /* __KERNEL__ */ +diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c +index 70993af22..024c65c3a 100644 +--- a/arch/arm/kernel/asm-offsets.c ++++ b/arch/arm/kernel/asm-offsets.c +@@ -43,6 +43,7 @@ int main(void) + BLANK(); + DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); + DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); ++ DEFINE(TI_PREEMPT_LAZY, offsetof(struct thread_info, preempt_lazy_count)); + DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); + DEFINE(TI_TASK, offsetof(struct thread_info, task)); + DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); +diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S +index 4332e5950..efb2d0755 100644 +--- a/arch/arm/kernel/entry-armv.S ++++ b/arch/arm/kernel/entry-armv.S +@@ -207,11 +207,18 @@ __irq_svc: + + #ifdef CONFIG_PREEMPTION + ldr r8, [tsk, #TI_PREEMPT] @ get preempt count +- ldr r0, [tsk, #TI_FLAGS] @ get flags + teq r8, #0 @ if preempt count != 0 ++ bne 1f @ return from exeption ++ ldr r0, [tsk, #TI_FLAGS] @ get flags ++ tst r0, #_TIF_NEED_RESCHED @ if NEED_RESCHED is set ++ blne svc_preempt @ preempt! ++ ++ ldr r8, [tsk, #TI_PREEMPT_LAZY] @ get preempt lazy count ++ teq r8, #0 @ if preempt lazy count != 0 + movne r0, #0 @ force flags to 0 +- tst r0, #_TIF_NEED_RESCHED ++ tst r0, #_TIF_NEED_RESCHED_LAZY + blne svc_preempt ++1: + #endif + + svc_exit r5, irq = 1 @ return from exception +@@ -226,8 +233,14 @@ svc_preempt: + 1: bl preempt_schedule_irq @ irq en/disable is done inside + ldr r0, [tsk, #TI_FLAGS] @ get new tasks TI_FLAGS + tst r0, #_TIF_NEED_RESCHED ++ bne 1b ++ tst r0, #_TIF_NEED_RESCHED_LAZY + reteq r8 @ go again +- b 1b ++ ldr r0, [tsk, #TI_PREEMPT_LAZY] @ get preempt lazy count ++ teq r0, #0 @ if preempt lazy count != 0 ++ beq 1b ++ ret r8 @ go again ++ + #endif + + __und_fault: +diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c +index a3a38d0a4..f04ccf19a 100644 +--- a/arch/arm/kernel/signal.c ++++ b/arch/arm/kernel/signal.c +@@ -649,7 +649,8 @@ do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall) + */ + trace_hardirqs_off(); + do { +- if (likely(thread_flags & _TIF_NEED_RESCHED)) { ++ if (likely(thread_flags & (_TIF_NEED_RESCHED | ++ _TIF_NEED_RESCHED_LAZY))) { + schedule(); + } else { + if (unlikely(!user_mode(regs))) +diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c +index d94e39a21..44383bfbf 100644 +--- a/arch/arm/kernel/smp.c ++++ b/arch/arm/kernel/smp.c +@@ -671,9 +671,7 @@ static void do_handle_IPI(int ipinr) + break; + + case IPI_CPU_BACKTRACE: +- printk_nmi_enter(); + nmi_cpu_backtrace(get_irq_regs()); +- printk_nmi_exit(); + break; + + default: +diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile +index 4536159bc..3510503bc 100644 +--- a/arch/arm/mm/Makefile ++++ b/arch/arm/mm/Makefile +@@ -21,7 +21,6 @@ KASAN_SANITIZE_physaddr.o := n + obj-$(CONFIG_DEBUG_VIRTUAL) += physaddr.o + + obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o +-obj-$(CONFIG_HIGHMEM) += highmem.o + obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o + obj-$(CONFIG_ARM_PV_FIXUP) += pv-fixup-asm.o + +diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c +index 10f909744..fd9e3e740 100644 +--- a/arch/arm/mm/cache-feroceon-l2.c ++++ b/arch/arm/mm/cache-feroceon-l2.c +@@ -49,9 +49,9 @@ static inline unsigned long l2_get_va(unsigned long paddr) + * we simply install a virtual mapping for it only for the + * TLB lookup to occur, hence no need to flush the untouched + * memory mapping afterwards (note: a cache flush may happen +- * in some circumstances depending on the path taken in kunmap_atomic). ++ * in some circumstances depending on the path taken in kunmap_local). + */ +- void *vaddr = kmap_atomic_pfn(paddr >> PAGE_SHIFT); ++ void *vaddr = kmap_local_pfn(paddr >> PAGE_SHIFT); + return (unsigned long)vaddr + (paddr & ~PAGE_MASK); + #else + return __phys_to_virt(paddr); +@@ -61,7 +61,7 @@ static inline unsigned long l2_get_va(unsigned long paddr) + static inline void l2_put_va(unsigned long vaddr) + { + #ifdef CONFIG_HIGHMEM +- kunmap_atomic((void *)vaddr); ++ kunmap_local((void *)vaddr); + #endif + } + +diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c +index 581473165..f34845da3 100644 +--- a/arch/arm/mm/cache-xsc3l2.c ++++ b/arch/arm/mm/cache-xsc3l2.c +@@ -59,7 +59,7 @@ static inline void l2_unmap_va(unsigned long va) + { + #ifdef CONFIG_HIGHMEM + if (va != -1) +- kunmap_atomic((void *)va); ++ kunmap_local((void *)va); + #endif + } + +@@ -75,7 +75,7 @@ static inline unsigned long l2_map_va(unsigned long pa, unsigned long prev_va) + * in place for it. + */ + l2_unmap_va(prev_va); +- va = (unsigned long)kmap_atomic_pfn(pa >> PAGE_SHIFT); ++ va = (unsigned long)kmap_local_pfn(pa >> PAGE_SHIFT); + } + return va + (pa_offset >> (32 - PAGE_SHIFT)); + #else +diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c +index 91965fb04..d34166682 100644 +--- a/arch/arm/mm/fault.c ++++ b/arch/arm/mm/fault.c +@@ -430,6 +430,9 @@ do_translation_fault(unsigned long addr, unsigned int fsr, + if (addr < TASK_SIZE) + return do_page_fault(addr, fsr, regs); + ++ if (interrupts_enabled(regs)) ++ local_irq_enable(); ++ + if (user_mode(regs)) + goto bad_area; + +diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c +deleted file mode 100644 +index 187fab227..000000000 +--- a/arch/arm/mm/highmem.c ++++ /dev/null +@@ -1,121 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0-only +-/* +- * arch/arm/mm/highmem.c -- ARM highmem support +- * +- * Author: Nicolas Pitre +- * Created: september 8, 2008 +- * Copyright: Marvell Semiconductors Inc. +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include "mm.h" +- +-static inline void set_fixmap_pte(int idx, pte_t pte) +-{ +- unsigned long vaddr = __fix_to_virt(idx); +- pte_t *ptep = virt_to_kpte(vaddr); +- +- set_pte_ext(ptep, pte, 0); +- local_flush_tlb_kernel_page(vaddr); +-} +- +-static inline pte_t get_fixmap_pte(unsigned long vaddr) +-{ +- pte_t *ptep = virt_to_kpte(vaddr); +- +- return *ptep; +-} +- +-void *kmap_atomic_high_prot(struct page *page, pgprot_t prot) +-{ +- unsigned int idx; +- unsigned long vaddr; +- void *kmap; +- int type; +- +-#ifdef CONFIG_DEBUG_HIGHMEM +- /* +- * There is no cache coherency issue when non VIVT, so force the +- * dedicated kmap usage for better debugging purposes in that case. +- */ +- if (!cache_is_vivt()) +- kmap = NULL; +- else +-#endif +- kmap = kmap_high_get(page); +- if (kmap) +- return kmap; +- +- type = kmap_atomic_idx_push(); +- +- idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); +- vaddr = __fix_to_virt(idx); +-#ifdef CONFIG_DEBUG_HIGHMEM +- /* +- * With debugging enabled, kunmap_atomic forces that entry to 0. +- * Make sure it was indeed properly unmapped. +- */ +- BUG_ON(!pte_none(get_fixmap_pte(vaddr))); +-#endif +- /* +- * When debugging is off, kunmap_atomic leaves the previous mapping +- * in place, so the contained TLB flush ensures the TLB is updated +- * with the new mapping. +- */ +- set_fixmap_pte(idx, mk_pte(page, prot)); +- +- return (void *)vaddr; +-} +-EXPORT_SYMBOL(kmap_atomic_high_prot); +- +-void kunmap_atomic_high(void *kvaddr) +-{ +- unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; +- int idx, type; +- +- if (kvaddr >= (void *)FIXADDR_START) { +- type = kmap_atomic_idx(); +- idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); +- +- if (cache_is_vivt()) +- __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE); +-#ifdef CONFIG_DEBUG_HIGHMEM +- BUG_ON(vaddr != __fix_to_virt(idx)); +- set_fixmap_pte(idx, __pte(0)); +-#else +- (void) idx; /* to kill a warning */ +-#endif +- kmap_atomic_idx_pop(); +- } else if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) { +- /* this address was obtained through kmap_high_get() */ +- kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)])); +- } +-} +-EXPORT_SYMBOL(kunmap_atomic_high); +- +-void *kmap_atomic_pfn(unsigned long pfn) +-{ +- unsigned long vaddr; +- int idx, type; +- struct page *page = pfn_to_page(pfn); +- +- preempt_disable(); +- pagefault_disable(); +- if (!PageHighMem(page)) +- return page_address(page); +- +- type = kmap_atomic_idx_push(); +- idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); +- vaddr = __fix_to_virt(idx); +-#ifdef CONFIG_DEBUG_HIGHMEM +- BUG_ON(!pte_none(get_fixmap_pte(vaddr))); +-#endif +- set_fixmap_pte(idx, pfn_pte(pfn, kmap_prot)); +- +- return (void *)vaddr; +-} +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 9a238d088..e5e3c447c 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -78,6 +78,7 @@ config ARM64 + select ARCH_SUPPORTS_ATOMIC_RMW + select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 && (GCC_VERSION >= 50000 || CC_IS_CLANG) + select ARCH_SUPPORTS_NUMA_BALANCING ++ select ARCH_SUPPORTS_RT if HAVE_POSIX_CPU_TIMERS_TASK_WORK + select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT + select ARCH_WANT_DEFAULT_BPF_JIT + select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT +@@ -182,6 +183,7 @@ config ARM64 + select HAVE_PERF_EVENTS + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP ++ select HAVE_PREEMPT_LAZY + select HAVE_REGS_AND_STACK_ACCESS_API + select HAVE_FUNCTION_ARG_ACCESS_API + select HAVE_FUTEX_CMPXCHG if FUTEX +@@ -205,6 +207,7 @@ config ARM64 + select PCI_DOMAINS_GENERIC if PCI + select PCI_ECAM if (ACPI && PCI) + select PCI_SYSCALL if PCI ++ select HAVE_POSIX_CPU_TIMERS_TASK_WORK if !KVM + select POWER_RESET + select POWER_SUPPLY + select SPARSE_IRQ +diff --git a/arch/arm64/include/asm/hardirq.h b/arch/arm64/include/asm/hardirq.h +index 5ffa4bacd..cbfa7b6f2 100644 +--- a/arch/arm64/include/asm/hardirq.h ++++ b/arch/arm64/include/asm/hardirq.h +@@ -13,11 +13,8 @@ + #include + #include + +-typedef struct { +- unsigned int __softirq_pending; +-} ____cacheline_aligned irq_cpustat_t; +- +-#include /* Standard mappings for irq_cpustat_t above */ ++#define ack_bad_irq ack_bad_irq ++#include + + #define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 + +diff --git a/arch/arm64/include/asm/preempt.h b/arch/arm64/include/asm/preempt.h +index e83f0982b..7a5770d82 100644 +--- a/arch/arm64/include/asm/preempt.h ++++ b/arch/arm64/include/asm/preempt.h +@@ -70,17 +70,43 @@ static inline bool __preempt_count_dec_and_test(void) + * interrupt occurring between the non-atomic READ_ONCE/WRITE_ONCE + * pair. + */ +- return !pc || !READ_ONCE(ti->preempt_count); ++ if (!pc || !READ_ONCE(ti->preempt_count)) ++ return true; ++#ifdef CONFIG_PREEMPT_LAZY ++ if ((pc & ~PREEMPT_NEED_RESCHED)) ++ return false; ++ if (current_thread_info()->preempt_lazy_count) ++ return false; ++ return test_thread_flag(TIF_NEED_RESCHED_LAZY); ++#else ++ return false; ++#endif + } + + static inline bool should_resched(int preempt_offset) + { ++#ifdef CONFIG_PREEMPT_LAZY ++ u64 pc = READ_ONCE(current_thread_info()->preempt_count); ++ if (pc == preempt_offset) ++ return true; ++ ++ if ((pc & ~PREEMPT_NEED_RESCHED) != preempt_offset) ++ return false; ++ ++ if (current_thread_info()->preempt_lazy_count) ++ return false; ++ return test_thread_flag(TIF_NEED_RESCHED_LAZY); ++#else + u64 pc = READ_ONCE(current_thread_info()->preempt_count); + return pc == preempt_offset; ++#endif + } + + #ifdef CONFIG_PREEMPTION + void preempt_schedule(void); ++#ifdef CONFIG_PREEMPT_RT ++void preempt_schedule_lock(void); ++#endif + #define __preempt_schedule() preempt_schedule() + void preempt_schedule_notrace(void); + #define __preempt_schedule_notrace() preempt_schedule_notrace() +diff --git a/arch/arm64/include/asm/spinlock_types.h b/arch/arm64/include/asm/spinlock_types.h +index 18782f0c4..6672b0535 100644 +--- a/arch/arm64/include/asm/spinlock_types.h ++++ b/arch/arm64/include/asm/spinlock_types.h +@@ -5,10 +5,6 @@ + #ifndef __ASM_SPINLOCK_TYPES_H + #define __ASM_SPINLOCK_TYPES_H + +-#if !defined(__LINUX_SPINLOCK_TYPES_H) && !defined(__ASM_SPINLOCK_H) +-# error "please don't include this file directly" +-#endif +- + #include + #include + +diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h +index dd8d27ea7..6464a3224 100644 +--- a/arch/arm64/include/asm/thread_info.h ++++ b/arch/arm64/include/asm/thread_info.h +@@ -27,6 +27,7 @@ struct thread_info { + #ifdef CONFIG_ARM64_SW_TTBR0_PAN + u64 ttbr0; /* saved TTBR0_EL1 */ + #endif ++ int preempt_lazy_count; /* 0 => preemptable, <0 => bug */ + union { + u64 preempt_count; /* 0 => preemptible, <0 => bug */ + struct { +@@ -70,6 +71,7 @@ void arch_release_task_struct(struct task_struct *tsk); + #define TIF_UPROBE 4 /* uprobe breakpoint or singlestep */ + #define TIF_MTE_ASYNC_FAULT 5 /* MTE Asynchronous Tag Check Fault */ + #define TIF_NOTIFY_SIGNAL 6 /* signal notifications exist */ ++#define TIF_NEED_RESCHED_LAZY 7 + #define TIF_SYSCALL_TRACE 8 /* syscall trace active */ + #define TIF_SYSCALL_AUDIT 9 /* syscall auditing */ + #define TIF_SYSCALL_TRACEPOINT 10 /* syscall tracepoint for ftrace */ +@@ -102,6 +104,7 @@ void arch_release_task_struct(struct task_struct *tsk); + #define _TIF_32BIT (1 << TIF_32BIT) + #define _TIF_SVE (1 << TIF_SVE) + #define _TIF_MTE_ASYNC_FAULT (1 << TIF_MTE_ASYNC_FAULT) ++#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) + #define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL) + #define _TIF_32BIT_AARCH64 (1 << TIF_32BIT_AARCH64) + #define _TIF_PATCH_PENDING (1 << TIF_PATCH_PENDING) +@@ -109,9 +112,12 @@ void arch_release_task_struct(struct task_struct *tsk); + + #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ + _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \ +- _TIF_UPROBE | _TIF_MTE_ASYNC_FAULT | \ ++ _TIF_UPROBE | _TIF_MTE_ASYNC_FAULT | _TIF_NEED_RESCHED_LAZY |\ + _TIF_NOTIFY_SIGNAL) + ++ ++#define _TIF_NEED_RESCHED_MASK (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY) ++ + #define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ + _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \ + _TIF_SYSCALL_EMU) +diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c +index 5f59e24c9..4f522206c 100644 +--- a/arch/arm64/kernel/asm-offsets.c ++++ b/arch/arm64/kernel/asm-offsets.c +@@ -31,6 +31,7 @@ int main(void) + DEFINE(TSK_TI_CPU, offsetof(struct task_struct, thread_info.cpu)); + DEFINE(TSK_TI_FLAGS, offsetof(struct task_struct, thread_info.flags)); + DEFINE(TSK_TI_PREEMPT, offsetof(struct task_struct, thread_info.preempt_count)); ++ DEFINE(TSK_TI_PREEMPT_LAZY, offsetof(struct task_struct, thread_info.preempt_lazy_count)); + #ifdef CONFIG_ARM64_SW_TTBR0_PAN + DEFINE(TSK_TI_TTBR0, offsetof(struct task_struct, thread_info.ttbr0)); + #endif +diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S +index 64145bfab..4cdbba720 100644 +--- a/arch/arm64/kernel/entry.S ++++ b/arch/arm64/kernel/entry.S +@@ -521,9 +521,18 @@ alternative_if ARM64_HAS_IRQ_PRIO_MASKING + orr x24, x24, x0 + alternative_else_nop_endif + #endif +- cbnz x24, 1f // preempt count != 0 || NMI return path +- bl arm64_preempt_schedule_irq // irq en/disable is done inside ++ ++ cbz x24, 1f // (need_resched + count) == 0 ++ cbnz w24, 2f // count != 0 ++ ++ ldr w24, [tsk, #TSK_TI_PREEMPT_LAZY] // get preempt lazy count ++ cbnz w24, 2f // preempt lazy count != 0 ++ ++ ldr x0, [tsk, #TSK_TI_FLAGS] // get flags ++ tbz x0, #TIF_NEED_RESCHED_LAZY, 2f // needs rescheduling? + 1: ++ bl arm64_preempt_schedule_irq // irq en/disable is done inside ++2: + #endif + + mov x0, sp +diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c +index 5335a6bd1..84520f116 100644 +--- a/arch/arm64/kernel/fpsimd.c ++++ b/arch/arm64/kernel/fpsimd.c +@@ -226,6 +226,16 @@ static void sve_free(struct task_struct *task) + __sve_free(task); + } + ++static void *sve_free_atomic(struct task_struct *task) ++{ ++ void *sve_state = task->thread.sve_state; ++ ++ WARN_ON(test_tsk_thread_flag(task, TIF_SVE)); ++ ++ task->thread.sve_state = NULL; ++ return sve_state; ++} ++ + /* + * TIF_SVE controls whether a task can use SVE without trapping while + * in userspace, and also the way a task's FPSIMD/SVE state is stored +@@ -1022,6 +1032,7 @@ void fpsimd_thread_switch(struct task_struct *next) + void fpsimd_flush_thread(void) + { + int vl, supported_vl; ++ void *mem = NULL; + + if (!system_supports_fpsimd()) + return; +@@ -1034,7 +1045,7 @@ void fpsimd_flush_thread(void) + + if (system_supports_sve()) { + clear_thread_flag(TIF_SVE); +- sve_free(current); ++ mem = sve_free_atomic(current); + + /* + * Reset the task vector length as required. +@@ -1068,6 +1079,7 @@ void fpsimd_flush_thread(void) + } + + put_cpu_fpsimd_context(); ++ kfree(mem); + } + + /* +diff --git a/arch/arm64/kernel/ipi_nmi.c b/arch/arm64/kernel/ipi_nmi.c +index 9a8f7c256..c0753dcdb 100644 +--- a/arch/arm64/kernel/ipi_nmi.c ++++ b/arch/arm64/kernel/ipi_nmi.c +@@ -35,9 +35,7 @@ void arm64_send_nmi(cpumask_t *mask) + + static void ipi_cpu_backtrace(void *info) + { +- printk_safe_enter(); + nmi_cpu_backtrace(get_irq_regs()); +- printk_safe_exit(); + } + + static DEFINE_PER_CPU(call_single_data_t, cpu_backtrace_csd) = +diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c +index 17cb54d1e..7f4a03453 100644 +--- a/arch/arm64/kernel/signal.c ++++ b/arch/arm64/kernel/signal.c +@@ -694,7 +694,7 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, + unsigned long thread_flags) + { + do { +- if (thread_flags & _TIF_NEED_RESCHED) { ++ if (thread_flags & _TIF_NEED_RESCHED_MASK) { + /* Unmask Debug and SError for the next task */ + local_daif_restore(DAIF_PROCCTX_NOIRQ); + +diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c +index bc5a91d17..b757d28ab 100644 +--- a/arch/arm64/kvm/arm.c ++++ b/arch/arm64/kvm/arm.c +@@ -855,7 +855,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) + * involves poking the GIC, which must be done in a + * non-preemptible context. + */ +- preempt_disable(); ++ migrate_disable(); + + kvm_pmu_flush_hwstate(vcpu); + +@@ -879,7 +879,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) + kvm_timer_sync_user(vcpu); + kvm_vgic_sync_hwstate(vcpu); + local_irq_enable(); +- preempt_enable(); ++ migrate_enable(); + continue; + } + +@@ -958,7 +958,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) + /* Exit types that need handling before we can be preempted */ + handle_exit_early(vcpu, ret); + +- preempt_enable(); ++ migrate_enable(); + + /* + * The ARMv8 architecture doesn't give the hypervisor +diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig +index 7bf0a617e..c9f2533cc 100644 +--- a/arch/csky/Kconfig ++++ b/arch/csky/Kconfig +@@ -286,6 +286,7 @@ config NR_CPUS + config HIGHMEM + bool "High Memory Support" + depends on !CPU_CK610 ++ select KMAP_LOCAL + default y + + config FORCE_MAX_ZONEORDER +diff --git a/arch/csky/include/asm/fixmap.h b/arch/csky/include/asm/fixmap.h +index 81f9477d5..4b589cc20 100644 +--- a/arch/csky/include/asm/fixmap.h ++++ b/arch/csky/include/asm/fixmap.h +@@ -8,7 +8,7 @@ + #include + #ifdef CONFIG_HIGHMEM + #include +-#include ++#include + #endif + + enum fixed_addresses { +@@ -17,7 +17,7 @@ enum fixed_addresses { + #endif + #ifdef CONFIG_HIGHMEM + FIX_KMAP_BEGIN, +- FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS) - 1, ++ FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_MAX_IDX * NR_CPUS) - 1, + #endif + __end_of_fixed_addresses + }; +diff --git a/arch/csky/include/asm/highmem.h b/arch/csky/include/asm/highmem.h +index 14645e3d5..1f4ed3f4c 100644 +--- a/arch/csky/include/asm/highmem.h ++++ b/arch/csky/include/asm/highmem.h +@@ -9,7 +9,7 @@ + #include + #include + #include +-#include ++#include + #include + + /* undef for production */ +@@ -32,10 +32,12 @@ extern pte_t *pkmap_page_table; + + #define ARCH_HAS_KMAP_FLUSH_TLB + extern void kmap_flush_tlb(unsigned long addr); +-extern void *kmap_atomic_pfn(unsigned long pfn); + + #define flush_cache_kmaps() do {} while (0) + ++#define arch_kmap_local_post_map(vaddr, pteval) kmap_flush_tlb(vaddr) ++#define arch_kmap_local_post_unmap(vaddr) kmap_flush_tlb(vaddr) ++ + extern void kmap_init(void); + + #endif /* __KERNEL__ */ +diff --git a/arch/csky/mm/highmem.c b/arch/csky/mm/highmem.c +index 89c10800a..4161df3c6 100644 +--- a/arch/csky/mm/highmem.c ++++ b/arch/csky/mm/highmem.c +@@ -9,8 +9,6 @@ + #include + #include + +-static pte_t *kmap_pte; +- + unsigned long highstart_pfn, highend_pfn; + + void kmap_flush_tlb(unsigned long addr) +@@ -19,67 +17,7 @@ void kmap_flush_tlb(unsigned long addr) + } + EXPORT_SYMBOL(kmap_flush_tlb); + +-void *kmap_atomic_high_prot(struct page *page, pgprot_t prot) +-{ +- unsigned long vaddr; +- int idx, type; +- +- type = kmap_atomic_idx_push(); +- idx = type + KM_TYPE_NR*smp_processor_id(); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +-#ifdef CONFIG_DEBUG_HIGHMEM +- BUG_ON(!pte_none(*(kmap_pte - idx))); +-#endif +- set_pte(kmap_pte-idx, mk_pte(page, prot)); +- flush_tlb_one((unsigned long)vaddr); +- +- return (void *)vaddr; +-} +-EXPORT_SYMBOL(kmap_atomic_high_prot); +- +-void kunmap_atomic_high(void *kvaddr) +-{ +- unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; +- int idx; +- +- if (vaddr < FIXADDR_START) +- return; +- +-#ifdef CONFIG_DEBUG_HIGHMEM +- idx = KM_TYPE_NR*smp_processor_id() + kmap_atomic_idx(); +- +- BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); +- +- pte_clear(&init_mm, vaddr, kmap_pte - idx); +- flush_tlb_one(vaddr); +-#else +- (void) idx; /* to kill a warning */ +-#endif +- kmap_atomic_idx_pop(); +-} +-EXPORT_SYMBOL(kunmap_atomic_high); +- +-/* +- * This is the same as kmap_atomic() but can map memory that doesn't +- * have a struct page associated with it. +- */ +-void *kmap_atomic_pfn(unsigned long pfn) +-{ +- unsigned long vaddr; +- int idx, type; +- +- pagefault_disable(); +- +- type = kmap_atomic_idx_push(); +- idx = type + KM_TYPE_NR*smp_processor_id(); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +- set_pte(kmap_pte-idx, pfn_pte(pfn, PAGE_KERNEL)); +- flush_tlb_one(vaddr); +- +- return (void *) vaddr; +-} +- +-static void __init kmap_pages_init(void) ++void __init kmap_init(void) + { + unsigned long vaddr; + pgd_t *pgd; +@@ -96,14 +34,3 @@ static void __init kmap_pages_init(void) + pte = pte_offset_kernel(pmd, vaddr); + pkmap_page_table = pte; + } +- +-void __init kmap_init(void) +-{ +- unsigned long vaddr; +- +- kmap_pages_init(); +- +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN); +- +- kmap_pte = pte_offset_kernel((pmd_t *)pgd_offset_k(vaddr), vaddr); +-} +diff --git a/arch/hexagon/include/asm/spinlock_types.h b/arch/hexagon/include/asm/spinlock_types.h +index 19d233497..de72fb230 100644 +--- a/arch/hexagon/include/asm/spinlock_types.h ++++ b/arch/hexagon/include/asm/spinlock_types.h +@@ -8,10 +8,6 @@ + #ifndef _ASM_SPINLOCK_TYPES_H + #define _ASM_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + volatile unsigned int lock; + } arch_spinlock_t; +diff --git a/arch/ia64/include/asm/kmap_types.h b/arch/ia64/include/asm/kmap_types.h +deleted file mode 100644 +index 5c268cf7c..000000000 +--- a/arch/ia64/include/asm/kmap_types.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef _ASM_IA64_KMAP_TYPES_H +-#define _ASM_IA64_KMAP_TYPES_H +- +-#ifdef CONFIG_DEBUG_HIGHMEM +-#define __WITH_KM_FENCE +-#endif +- +-#include +- +-#undef __WITH_KM_FENCE +- +-#endif /* _ASM_IA64_KMAP_TYPES_H */ +diff --git a/arch/ia64/include/asm/spinlock_types.h b/arch/ia64/include/asm/spinlock_types.h +index 6e345fefc..681408d68 100644 +--- a/arch/ia64/include/asm/spinlock_types.h ++++ b/arch/ia64/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef _ASM_IA64_SPINLOCK_TYPES_H + #define _ASM_IA64_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + volatile unsigned int lock; + } arch_spinlock_t; +diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c +index 7abc5f37b..733e0e332 100644 +--- a/arch/ia64/kernel/time.c ++++ b/arch/ia64/kernel/time.c +@@ -138,12 +138,8 @@ void vtime_account_kernel(struct task_struct *tsk) + struct thread_info *ti = task_thread_info(tsk); + __u64 stime = vtime_delta(tsk); + +- if ((tsk->flags & PF_VCPU) && !irq_count()) ++ if (tsk->flags & PF_VCPU) + ti->gtime += stime; +- else if (hardirq_count()) +- ti->hardirq_time += stime; +- else if (in_serving_softirq()) +- ti->softirq_time += stime; + else + ti->stime += stime; + } +@@ -156,6 +152,20 @@ void vtime_account_idle(struct task_struct *tsk) + ti->idle_time += vtime_delta(tsk); + } + ++void vtime_account_softirq(struct task_struct *tsk) ++{ ++ struct thread_info *ti = task_thread_info(tsk); ++ ++ ti->softirq_time += vtime_delta(tsk); ++} ++ ++void vtime_account_hardirq(struct task_struct *tsk) ++{ ++ struct thread_info *ti = task_thread_info(tsk); ++ ++ ti->hardirq_time += vtime_delta(tsk); ++} ++ + #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ + + static irqreturn_t +diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig +index 33925ffed..7f6ca0ab4 100644 +--- a/arch/microblaze/Kconfig ++++ b/arch/microblaze/Kconfig +@@ -155,6 +155,7 @@ config XILINX_UNCACHED_SHADOW + config HIGHMEM + bool "High memory support" + depends on MMU ++ select KMAP_LOCAL + help + The address space of Microblaze processors is only 4 Gigabytes large + and it has to accommodate user address space, kernel address +diff --git a/arch/microblaze/include/asm/fixmap.h b/arch/microblaze/include/asm/fixmap.h +index 0379ce522..e6e9288bf 100644 +--- a/arch/microblaze/include/asm/fixmap.h ++++ b/arch/microblaze/include/asm/fixmap.h +@@ -20,7 +20,7 @@ + #include + #ifdef CONFIG_HIGHMEM + #include +-#include ++#include + #endif + + #define FIXADDR_TOP ((unsigned long)(-PAGE_SIZE)) +@@ -47,7 +47,7 @@ enum fixed_addresses { + FIX_HOLE, + #ifdef CONFIG_HIGHMEM + FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ +- FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * num_possible_cpus()) - 1, ++ FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_MAX_IDX * num_possible_cpus()) - 1, + #endif + __end_of_fixed_addresses + }; +diff --git a/arch/microblaze/include/asm/highmem.h b/arch/microblaze/include/asm/highmem.h +index 284ca8fb5..4418633fb 100644 +--- a/arch/microblaze/include/asm/highmem.h ++++ b/arch/microblaze/include/asm/highmem.h +@@ -25,7 +25,6 @@ + #include + #include + +-extern pte_t *kmap_pte; + extern pte_t *pkmap_page_table; + + /* +@@ -52,6 +51,11 @@ extern pte_t *pkmap_page_table; + + #define flush_cache_kmaps() { flush_icache(); flush_dcache(); } + ++#define arch_kmap_local_post_map(vaddr, pteval) \ ++ local_flush_tlb_page(NULL, vaddr); ++#define arch_kmap_local_post_unmap(vaddr) \ ++ local_flush_tlb_page(NULL, vaddr); ++ + #endif /* __KERNEL__ */ + + #endif /* _ASM_HIGHMEM_H */ +diff --git a/arch/microblaze/mm/Makefile b/arch/microblaze/mm/Makefile +index 1b16875ce..8ced71100 100644 +--- a/arch/microblaze/mm/Makefile ++++ b/arch/microblaze/mm/Makefile +@@ -6,4 +6,3 @@ + obj-y := consistent.o init.o + + obj-$(CONFIG_MMU) += pgtable.o mmu_context.o fault.o +-obj-$(CONFIG_HIGHMEM) += highmem.o +diff --git a/arch/microblaze/mm/highmem.c b/arch/microblaze/mm/highmem.c +deleted file mode 100644 +index 92e089041..000000000 +--- a/arch/microblaze/mm/highmem.c ++++ /dev/null +@@ -1,78 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* +- * highmem.c: virtual kernel memory mappings for high memory +- * +- * PowerPC version, stolen from the i386 version. +- * +- * Used in CONFIG_HIGHMEM systems for memory pages which +- * are not addressable by direct kernel virtual addresses. +- * +- * Copyright (C) 1999 Gerhard Wichert, Siemens AG +- * Gerhard.Wichert@pdb.siemens.de +- * +- * +- * Redesigned the x86 32-bit VM architecture to deal with +- * up to 16 Terrabyte physical memory. With current x86 CPUs +- * we now support up to 64 Gigabytes physical RAM. +- * +- * Copyright (C) 1999 Ingo Molnar +- * +- * Reworked for PowerPC by various contributors. Moved from +- * highmem.h by Benjamin Herrenschmidt (c) 2009 IBM Corp. +- */ +- +-#include +-#include +- +-/* +- * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap +- * gives a more generic (and caching) interface. But kmap_atomic can +- * be used in IRQ contexts, so in some (very limited) cases we need +- * it. +- */ +-#include +- +-void *kmap_atomic_high_prot(struct page *page, pgprot_t prot) +-{ +- +- unsigned long vaddr; +- int idx, type; +- +- type = kmap_atomic_idx_push(); +- idx = type + KM_TYPE_NR*smp_processor_id(); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +-#ifdef CONFIG_DEBUG_HIGHMEM +- BUG_ON(!pte_none(*(kmap_pte-idx))); +-#endif +- set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot)); +- local_flush_tlb_page(NULL, vaddr); +- +- return (void *) vaddr; +-} +-EXPORT_SYMBOL(kmap_atomic_high_prot); +- +-void kunmap_atomic_high(void *kvaddr) +-{ +- unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; +- int type; +- unsigned int idx; +- +- if (vaddr < __fix_to_virt(FIX_KMAP_END)) +- return; +- +- type = kmap_atomic_idx(); +- +- idx = type + KM_TYPE_NR * smp_processor_id(); +-#ifdef CONFIG_DEBUG_HIGHMEM +- BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); +-#endif +- /* +- * force other mappings to Oops if they'll try to access +- * this pte without first remap it +- */ +- pte_clear(&init_mm, vaddr, kmap_pte-idx); +- local_flush_tlb_page(NULL, vaddr); +- +- kmap_atomic_idx_pop(); +-} +-EXPORT_SYMBOL(kunmap_atomic_high); +diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c +index 4a0c30ced..498eaa4d3 100644 +--- a/arch/microblaze/mm/init.c ++++ b/arch/microblaze/mm/init.c +@@ -49,17 +49,11 @@ unsigned long lowmem_size; + EXPORT_SYMBOL(min_low_pfn); + EXPORT_SYMBOL(max_low_pfn); + +-#ifdef CONFIG_HIGHMEM +-pte_t *kmap_pte; +-EXPORT_SYMBOL(kmap_pte); +- + static void __init highmem_init(void) + { + pr_debug("%x\n", (u32)PKMAP_BASE); + map_page(PKMAP_BASE, 0, 0); /* XXX gross */ + pkmap_page_table = virt_to_kpte(PKMAP_BASE); +- +- kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN)); + } + + static void highmem_setup(void) +diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig +index 896a29df1..1b3593d53 100644 +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -2727,6 +2727,7 @@ config WAR_MIPS34K_MISSED_ITLB + config HIGHMEM + bool "High Memory Support" + depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA ++ select KMAP_LOCAL + + config CPU_SUPPORTS_HIGHMEM + bool +diff --git a/arch/mips/include/asm/fixmap.h b/arch/mips/include/asm/fixmap.h +index 743535be7..beea14761 100644 +--- a/arch/mips/include/asm/fixmap.h ++++ b/arch/mips/include/asm/fixmap.h +@@ -17,7 +17,7 @@ + #include + #ifdef CONFIG_HIGHMEM + #include +-#include ++#include + #endif + + /* +@@ -52,7 +52,7 @@ enum fixed_addresses { + #ifdef CONFIG_HIGHMEM + /* reserved pte's for temporary kernel mappings */ + FIX_KMAP_BEGIN = FIX_CMAP_END + 1, +- FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, ++ FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_MAX_IDX * NR_CPUS) - 1, + #endif + __end_of_fixed_addresses + }; +diff --git a/arch/mips/include/asm/highmem.h b/arch/mips/include/asm/highmem.h +index 9f021cf51..1716181ea 100644 +--- a/arch/mips/include/asm/highmem.h ++++ b/arch/mips/include/asm/highmem.h +@@ -24,7 +24,7 @@ + #include + #include + #include +-#include ++#include + + /* declarations for highmem.c */ + extern unsigned long highstart_pfn, highend_pfn; +@@ -48,11 +48,11 @@ extern pte_t *pkmap_page_table; + + #define ARCH_HAS_KMAP_FLUSH_TLB + extern void kmap_flush_tlb(unsigned long addr); +-extern void *kmap_atomic_pfn(unsigned long pfn); + + #define flush_cache_kmaps() BUG_ON(cpu_has_dc_aliases) + +-extern void kmap_init(void); ++#define arch_kmap_local_post_map(vaddr, pteval) local_flush_tlb_one(vaddr) ++#define arch_kmap_local_post_unmap(vaddr) local_flush_tlb_one(vaddr) + + #endif /* __KERNEL__ */ + +diff --git a/arch/mips/include/asm/kmap_types.h b/arch/mips/include/asm/kmap_types.h +deleted file mode 100644 +index 16665dc24..000000000 +--- a/arch/mips/include/asm/kmap_types.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef _ASM_KMAP_TYPES_H +-#define _ASM_KMAP_TYPES_H +- +-#ifdef CONFIG_DEBUG_HIGHMEM +-#define __WITH_KM_FENCE +-#endif +- +-#include +- +-#undef __WITH_KM_FENCE +- +-#endif +diff --git a/arch/mips/kernel/crash_dump.c b/arch/mips/kernel/crash_dump.c +index 01b2bd95b..9aba83e1e 100644 +--- a/arch/mips/kernel/crash_dump.c ++++ b/arch/mips/kernel/crash_dump.c +@@ -5,8 +5,6 @@ + #include + #include + +-static void *kdump_buf_page; +- + /** + * copy_oldmem_page - copy one page from "oldmem" + * @pfn: page frame number to be copied +@@ -17,51 +15,25 @@ static void *kdump_buf_page; + * @userbuf: if set, @buf is in user address space, use copy_to_user(), + * otherwise @buf is in kernel address space, use memcpy(). + * +- * Copy a page from "oldmem". For this page, there is no pte mapped ++ * Copy a page from "oldmem". For this page, there might be no pte mapped + * in the current kernel. +- * +- * Calling copy_to_user() in atomic context is not desirable. Hence first +- * copying the data to a pre-allocated kernel page and then copying to user +- * space in non-atomic context. + */ +-ssize_t copy_oldmem_page(unsigned long pfn, char *buf, +- size_t csize, unsigned long offset, int userbuf) ++ssize_t copy_oldmem_page(unsigned long pfn, char *buf, size_t csize, ++ unsigned long offset, int userbuf) + { + void *vaddr; + + if (!csize) + return 0; + +- vaddr = kmap_atomic_pfn(pfn); ++ vaddr = kmap_local_pfn(pfn); + + if (!userbuf) { +- memcpy(buf, (vaddr + offset), csize); +- kunmap_atomic(vaddr); ++ memcpy(buf, vaddr + offset, csize); + } else { +- if (!kdump_buf_page) { +- pr_warn("Kdump: Kdump buffer page not allocated\n"); +- +- return -EFAULT; +- } +- copy_page(kdump_buf_page, vaddr); +- kunmap_atomic(vaddr); +- if (copy_to_user(buf, (kdump_buf_page + offset), csize)) +- return -EFAULT; ++ if (copy_to_user(buf, vaddr + offset, csize)) ++ csize = -EFAULT; + } + + return csize; + } +- +-static int __init kdump_buf_page_init(void) +-{ +- int ret = 0; +- +- kdump_buf_page = kmalloc(PAGE_SIZE, GFP_KERNEL); +- if (!kdump_buf_page) { +- pr_warn("Kdump: Failed to allocate kdump buffer page\n"); +- ret = -ENOMEM; +- } +- +- return ret; +-} +-arch_initcall(kdump_buf_page_init); +diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c +index 5fec7f45d..57e2f08f0 100644 +--- a/arch/mips/mm/highmem.c ++++ b/arch/mips/mm/highmem.c +@@ -8,8 +8,6 @@ + #include + #include + +-static pte_t *kmap_pte; +- + unsigned long highstart_pfn, highend_pfn; + + void kmap_flush_tlb(unsigned long addr) +@@ -17,78 +15,3 @@ void kmap_flush_tlb(unsigned long addr) + flush_tlb_one(addr); + } + EXPORT_SYMBOL(kmap_flush_tlb); +- +-void *kmap_atomic_high_prot(struct page *page, pgprot_t prot) +-{ +- unsigned long vaddr; +- int idx, type; +- +- type = kmap_atomic_idx_push(); +- idx = type + KM_TYPE_NR*smp_processor_id(); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +-#ifdef CONFIG_DEBUG_HIGHMEM +- BUG_ON(!pte_none(*(kmap_pte - idx))); +-#endif +- set_pte(kmap_pte-idx, mk_pte(page, prot)); +- local_flush_tlb_one((unsigned long)vaddr); +- +- return (void*) vaddr; +-} +-EXPORT_SYMBOL(kmap_atomic_high_prot); +- +-void kunmap_atomic_high(void *kvaddr) +-{ +- unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; +- int type __maybe_unused; +- +- if (vaddr < FIXADDR_START) +- return; +- +- type = kmap_atomic_idx(); +-#ifdef CONFIG_DEBUG_HIGHMEM +- { +- int idx = type + KM_TYPE_NR * smp_processor_id(); +- +- BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); +- +- /* +- * force other mappings to Oops if they'll try to access +- * this pte without first remap it +- */ +- pte_clear(&init_mm, vaddr, kmap_pte-idx); +- local_flush_tlb_one(vaddr); +- } +-#endif +- kmap_atomic_idx_pop(); +-} +-EXPORT_SYMBOL(kunmap_atomic_high); +- +-/* +- * This is the same as kmap_atomic() but can map memory that doesn't +- * have a struct page associated with it. +- */ +-void *kmap_atomic_pfn(unsigned long pfn) +-{ +- unsigned long vaddr; +- int idx, type; +- +- preempt_disable(); +- pagefault_disable(); +- +- type = kmap_atomic_idx_push(); +- idx = type + KM_TYPE_NR*smp_processor_id(); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +- set_pte(kmap_pte-idx, pfn_pte(pfn, PAGE_KERNEL)); +- flush_tlb_one(vaddr); +- +- return (void*) vaddr; +-} +- +-void __init kmap_init(void) +-{ +- unsigned long kmap_vstart; +- +- /* cache the first kmap pte */ +- kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN); +- kmap_pte = virt_to_kpte(kmap_vstart); +-} +diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c +index 07e84a774..bc80893e5 100644 +--- a/arch/mips/mm/init.c ++++ b/arch/mips/mm/init.c +@@ -36,7 +36,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -402,9 +401,6 @@ void __init paging_init(void) + + pagetable_init(); + +-#ifdef CONFIG_HIGHMEM +- kmap_init(); +-#endif + #ifdef CONFIG_ZONE_DMA + max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN; + #endif +diff --git a/arch/nds32/Kconfig.cpu b/arch/nds32/Kconfig.cpu +index f88a12fdf..c10759952 100644 +--- a/arch/nds32/Kconfig.cpu ++++ b/arch/nds32/Kconfig.cpu +@@ -157,6 +157,7 @@ config HW_SUPPORT_UNALIGNMENT_ACCESS + config HIGHMEM + bool "High Memory Support" + depends on MMU && !CPU_CACHE_ALIASING ++ select KMAP_LOCAL + help + The address space of Andes processors is only 4 Gigabytes large + and it has to accommodate user address space, kernel address +diff --git a/arch/nds32/include/asm/fixmap.h b/arch/nds32/include/asm/fixmap.h +index 5a4bf11e5..2fa09a2de 100644 +--- a/arch/nds32/include/asm/fixmap.h ++++ b/arch/nds32/include/asm/fixmap.h +@@ -6,7 +6,7 @@ + + #ifdef CONFIG_HIGHMEM + #include +-#include ++#include + #endif + + enum fixed_addresses { +@@ -14,7 +14,7 @@ enum fixed_addresses { + FIX_KMAP_RESERVED, + FIX_KMAP_BEGIN, + #ifdef CONFIG_HIGHMEM +- FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS), ++ FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_MAX_IDX * NR_CPUS) - 1, + #endif + FIX_EARLYCON_MEM_BASE, + __end_of_fixed_addresses +diff --git a/arch/nds32/include/asm/highmem.h b/arch/nds32/include/asm/highmem.h +index fe986d0e6..16159a871 100644 +--- a/arch/nds32/include/asm/highmem.h ++++ b/arch/nds32/include/asm/highmem.h +@@ -5,7 +5,6 @@ + #define _ASM_HIGHMEM_H + + #include +-#include + #include + + /* +@@ -45,11 +44,22 @@ extern pte_t *pkmap_page_table; + extern void kmap_init(void); + + /* +- * The following functions are already defined by +- * when CONFIG_HIGHMEM is not set. ++ * FIXME: The below looks broken vs. a kmap_atomic() in task context which ++ * is interupted and another kmap_atomic() happens in interrupt context. ++ * But what do I know about nds32. -- tglx + */ +-#ifdef CONFIG_HIGHMEM +-extern void *kmap_atomic_pfn(unsigned long pfn); +-#endif ++#define arch_kmap_local_post_map(vaddr, pteval) \ ++ do { \ ++ __nds32__tlbop_inv(vaddr); \ ++ __nds32__mtsr_dsb(vaddr, NDS32_SR_TLB_VPN); \ ++ __nds32__tlbop_rwr(pteval); \ ++ __nds32__isb(); \ ++ } while (0) ++ ++#define arch_kmap_local_pre_unmap(vaddr) \ ++ do { \ ++ __nds32__tlbop_inv(vaddr); \ ++ __nds32__isb(); \ ++ } while (0) + + #endif +diff --git a/arch/nds32/mm/Makefile b/arch/nds32/mm/Makefile +index 897ecaf5c..14fb2e8eb 100644 +--- a/arch/nds32/mm/Makefile ++++ b/arch/nds32/mm/Makefile +@@ -3,7 +3,6 @@ obj-y := extable.o tlb.o fault.o init.o mmap.o \ + mm-nds32.o cacheflush.o proc.o + + obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o +-obj-$(CONFIG_HIGHMEM) += highmem.o + + ifdef CONFIG_FUNCTION_TRACER + CFLAGS_REMOVE_proc.o = $(CC_FLAGS_FTRACE) +diff --git a/arch/nds32/mm/highmem.c b/arch/nds32/mm/highmem.c +deleted file mode 100644 +index 4284cd59e..000000000 +--- a/arch/nds32/mm/highmem.c ++++ /dev/null +@@ -1,48 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-// Copyright (C) 2005-2017 Andes Technology Corporation +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-void *kmap_atomic_high_prot(struct page *page, pgprot_t prot) +-{ +- unsigned int idx; +- unsigned long vaddr, pte; +- int type; +- pte_t *ptep; +- +- type = kmap_atomic_idx_push(); +- +- idx = type + KM_TYPE_NR * smp_processor_id(); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +- pte = (page_to_pfn(page) << PAGE_SHIFT) | prot; +- ptep = pte_offset_kernel(pmd_off_k(vaddr), vaddr); +- set_pte(ptep, pte); +- +- __nds32__tlbop_inv(vaddr); +- __nds32__mtsr_dsb(vaddr, NDS32_SR_TLB_VPN); +- __nds32__tlbop_rwr(pte); +- __nds32__isb(); +- return (void *)vaddr; +-} +-EXPORT_SYMBOL(kmap_atomic_high_prot); +- +-void kunmap_atomic_high(void *kvaddr) +-{ +- if (kvaddr >= (void *)FIXADDR_START) { +- unsigned long vaddr = (unsigned long)kvaddr; +- pte_t *ptep; +- kmap_atomic_idx_pop(); +- __nds32__tlbop_inv(vaddr); +- __nds32__isb(); +- ptep = pte_offset_kernel(pmd_off_k(vaddr), vaddr); +- set_pte(ptep, 0); +- } +-} +-EXPORT_SYMBOL(kunmap_atomic_high); +diff --git a/arch/openrisc/mm/init.c b/arch/openrisc/mm/init.c +index 5e88c351e..f3fa02b88 100644 +--- a/arch/openrisc/mm/init.c ++++ b/arch/openrisc/mm/init.c +@@ -33,7 +33,6 @@ + #include + #include + #include +-#include + #include + #include + #include +diff --git a/arch/openrisc/mm/ioremap.c b/arch/openrisc/mm/ioremap.c +index a978590d8..5aed97a18 100644 +--- a/arch/openrisc/mm/ioremap.c ++++ b/arch/openrisc/mm/ioremap.c +@@ -15,7 +15,6 @@ + #include + #include + #include +-#include + #include + #include + #include +diff --git a/arch/parisc/include/asm/hardirq.h b/arch/parisc/include/asm/hardirq.h +index 7f7039516..fad29aa6f 100644 +--- a/arch/parisc/include/asm/hardirq.h ++++ b/arch/parisc/include/asm/hardirq.h +@@ -32,7 +32,6 @@ typedef struct { + DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); + + #define __ARCH_IRQ_STAT +-#define __IRQ_STAT(cpu, member) (irq_stat[cpu].member) + #define inc_irq_stat(member) this_cpu_inc(irq_stat.member) + #define __inc_irq_stat(member) __this_cpu_inc(irq_stat.member) + #define ack_bad_irq(irq) WARN(1, "unexpected IRQ trap at vector %02x\n", irq) +diff --git a/arch/parisc/include/asm/kmap_types.h b/arch/parisc/include/asm/kmap_types.h +deleted file mode 100644 +index 3e70b5cd1..000000000 +--- a/arch/parisc/include/asm/kmap_types.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef _ASM_KMAP_TYPES_H +-#define _ASM_KMAP_TYPES_H +- +-#ifdef CONFIG_DEBUG_HIGHMEM +-#define __WITH_KM_FENCE +-#endif +- +-#include +- +-#undef __WITH_KM_FENCE +- +-#endif +diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig +index ed06e0c32..a0cf63581 100644 +--- a/arch/powerpc/Kconfig ++++ b/arch/powerpc/Kconfig +@@ -146,6 +146,7 @@ config PPC + select ARCH_MIGHT_HAVE_PC_SERIO + select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX + select ARCH_SUPPORTS_ATOMIC_RMW ++ select ARCH_SUPPORTS_RT if HAVE_POSIX_CPU_TIMERS_TASK_WORK + select ARCH_USE_BUILTIN_BSWAP + select ARCH_USE_CMPXCHG_LOCKREF if PPC64 + select ARCH_USE_QUEUED_RWLOCKS if PPC_QUEUED_SPINLOCKS +@@ -234,6 +235,7 @@ config PPC + select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI && !HAVE_HARDLOCKUP_DETECTOR_ARCH + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP ++ select HAVE_PREEMPT_LAZY + select MMU_GATHER_RCU_TABLE_FREE + select MMU_GATHER_PAGE_SIZE + select HAVE_REGS_AND_STACK_ACCESS_API +@@ -241,6 +243,7 @@ config PPC + select HAVE_SYSCALL_TRACEPOINTS + select HAVE_VIRT_CPU_ACCOUNTING + select HAVE_IRQ_TIME_ACCOUNTING ++ select HAVE_POSIX_CPU_TIMERS_TASK_WORK if !KVM + select HAVE_RSEQ + select IOMMU_HELPER if PPC64 + select IRQ_DOMAIN +@@ -414,6 +417,7 @@ menu "Kernel options" + config HIGHMEM + bool "High memory support" + depends on PPC32 ++ select KMAP_LOCAL + + source "kernel/Kconfig.hz" + +diff --git a/arch/powerpc/include/asm/cmpxchg.h b/arch/powerpc/include/asm/cmpxchg.h +index cf091c4c2..7371f7e23 100644 +--- a/arch/powerpc/include/asm/cmpxchg.h ++++ b/arch/powerpc/include/asm/cmpxchg.h +@@ -5,7 +5,7 @@ + #ifdef __KERNEL__ + #include + #include +-#include ++#include + + #ifdef __BIG_ENDIAN + #define BITOFF_CAL(size, off) ((sizeof(u32) - size - off) * BITS_PER_BYTE) +diff --git a/arch/powerpc/include/asm/fixmap.h b/arch/powerpc/include/asm/fixmap.h +index 897cc6875..a832aeafe 100644 +--- a/arch/powerpc/include/asm/fixmap.h ++++ b/arch/powerpc/include/asm/fixmap.h +@@ -20,7 +20,7 @@ + #include + #ifdef CONFIG_HIGHMEM + #include +-#include ++#include + #endif + + #ifdef CONFIG_PPC64 +@@ -61,7 +61,7 @@ enum fixed_addresses { + FIX_EARLY_DEBUG_BASE = FIX_EARLY_DEBUG_TOP+(ALIGN(SZ_128K, PAGE_SIZE)/PAGE_SIZE)-1, + #ifdef CONFIG_HIGHMEM + FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ +- FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, ++ FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_MAX_IDX * NR_CPUS) - 1, + #endif + #ifdef CONFIG_PPC_8xx + /* For IMMR we need an aligned 512K area */ +diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h +index 104026f7d..80a5ae771 100644 +--- a/arch/powerpc/include/asm/highmem.h ++++ b/arch/powerpc/include/asm/highmem.h +@@ -24,12 +24,10 @@ + #ifdef __KERNEL__ + + #include +-#include + #include + #include + #include + +-extern pte_t *kmap_pte; + extern pte_t *pkmap_page_table; + + /* +@@ -60,6 +58,11 @@ extern pte_t *pkmap_page_table; + + #define flush_cache_kmaps() flush_cache_all() + ++#define arch_kmap_local_post_map(vaddr, pteval) \ ++ local_flush_tlb_page(NULL, vaddr) ++#define arch_kmap_local_post_unmap(vaddr) \ ++ local_flush_tlb_page(NULL, vaddr) ++ + #endif /* __KERNEL__ */ + + #endif /* _ASM_HIGHMEM_H */ +diff --git a/arch/powerpc/include/asm/kmap_types.h b/arch/powerpc/include/asm/kmap_types.h +deleted file mode 100644 +index c8fa182d4..000000000 +--- a/arch/powerpc/include/asm/kmap_types.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0-or-later */ +-#ifndef _ASM_POWERPC_KMAP_TYPES_H +-#define _ASM_POWERPC_KMAP_TYPES_H +- +-#ifdef __KERNEL__ +- +-/* +- */ +- +-#define KM_TYPE_NR 16 +- +-#endif /* __KERNEL__ */ +-#endif /* _ASM_POWERPC_KMAP_TYPES_H */ +diff --git a/arch/powerpc/include/asm/simple_spinlock_types.h b/arch/powerpc/include/asm/simple_spinlock_types.h +index 0f3cdd8fa..d45561e9e 100644 +--- a/arch/powerpc/include/asm/simple_spinlock_types.h ++++ b/arch/powerpc/include/asm/simple_spinlock_types.h +@@ -2,7 +2,7 @@ + #ifndef _ASM_POWERPC_SIMPLE_SPINLOCK_TYPES_H + #define _ASM_POWERPC_SIMPLE_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H ++#if !defined(__LINUX_SPINLOCK_TYPES_H) && !defined(__LINUX_RT_MUTEX_H) + # error "please don't include this file directly" + #endif + +diff --git a/arch/powerpc/include/asm/spinlock_types.h b/arch/powerpc/include/asm/spinlock_types.h +index c5d742f18..cc6922a01 100644 +--- a/arch/powerpc/include/asm/spinlock_types.h ++++ b/arch/powerpc/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef _ASM_POWERPC_SPINLOCK_TYPES_H + #define _ASM_POWERPC_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + #ifdef CONFIG_PPC_QUEUED_SPINLOCKS + #include + #include +diff --git a/arch/powerpc/include/asm/stackprotector.h b/arch/powerpc/include/asm/stackprotector.h +index 1c8460e23..b1653c160 100644 +--- a/arch/powerpc/include/asm/stackprotector.h ++++ b/arch/powerpc/include/asm/stackprotector.h +@@ -24,7 +24,11 @@ static __always_inline void boot_init_stack_canary(void) + unsigned long canary; + + /* Try to get a semi random initial value. */ ++#ifdef CONFIG_PREEMPT_RT ++ canary = (unsigned long)&canary; ++#else + canary = get_random_canary(); ++#endif + canary ^= mftb(); + canary ^= LINUX_VERSION_CODE; + canary &= CANARY_MASK; +diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h +index f4f4564c6..5b7e9bb9f 100644 +--- a/arch/powerpc/include/asm/thread_info.h ++++ b/arch/powerpc/include/asm/thread_info.h +@@ -54,6 +54,8 @@ + struct thread_info { + int preempt_count; /* 0 => preemptable, + <0 => BUG */ ++ int preempt_lazy_count; /* 0 => preemptable, ++ <0 => BUG */ + #ifdef CONFIG_SMP + unsigned int cpu; + #endif +@@ -107,11 +109,12 @@ void arch_setup_new_exec(void); + #define TIF_SINGLESTEP 8 /* singlestepping active */ + #define TIF_NOHZ 9 /* in adaptive nohz mode */ + #define TIF_SECCOMP 10 /* secure computing */ +-#define TIF_RESTOREALL 11 /* Restore all regs (implies NOERROR) */ +-#define TIF_NOERROR 12 /* Force successful syscall return */ ++ ++#define TIF_NEED_RESCHED_LAZY 11 /* lazy rescheduling necessary */ ++#define TIF_SYSCALL_TRACEPOINT 12 /* syscall tracepoint instrumentation */ ++ + #define TIF_NOTIFY_RESUME 13 /* callback before returning to user */ + #define TIF_UPROBE 14 /* breakpointed or single-stepping */ +-#define TIF_SYSCALL_TRACEPOINT 15 /* syscall tracepoint instrumentation */ + #define TIF_EMULATE_STACK_STORE 16 /* Is an instruction emulation + for stack store? */ + #define TIF_MEMDIE 17 /* is terminating due to OOM killer */ +@@ -120,6 +123,9 @@ void arch_setup_new_exec(void); + #endif + #define TIF_POLLING_NRFLAG 19 /* true if poll_idle() is polling TIF_NEED_RESCHED */ + #define TIF_32BIT 20 /* 32 bit binary */ ++#define TIF_RESTOREALL 21 /* Restore all regs (implies NOERROR) */ ++#define TIF_NOERROR 22 /* Force successful syscall return */ ++ + + /* as above, but as bit values */ + #define _TIF_SYSCALL_TRACE (1<version = cpu_to_be16(OOPS_HDR_VERSION); +diff --git a/arch/powerpc/kernel/syscall_64.c b/arch/powerpc/kernel/syscall_64.c +index 310bcd768..ae3212dcf 100644 +--- a/arch/powerpc/kernel/syscall_64.c ++++ b/arch/powerpc/kernel/syscall_64.c +@@ -193,7 +193,7 @@ notrace unsigned long syscall_exit_prepare(unsigned long r3, + ti_flags = READ_ONCE(*ti_flagsp); + while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) { + local_irq_enable(); +- if (ti_flags & _TIF_NEED_RESCHED) { ++ if (ti_flags & _TIF_NEED_RESCHED_MASK) { + schedule(); + } else { + /* +@@ -277,7 +277,7 @@ notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned + ti_flags = READ_ONCE(*ti_flagsp); + while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) { + local_irq_enable(); /* returning to user: may enable */ +- if (ti_flags & _TIF_NEED_RESCHED) { ++ if (ti_flags & _TIF_NEED_RESCHED_MASK) { + schedule(); + } else { + if (ti_flags & _TIF_SIGPENDING) +@@ -361,11 +361,15 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsign + /* Returning to a kernel context with local irqs enabled. */ + WARN_ON_ONCE(!(regs->msr & MSR_EE)); + again: +- if (IS_ENABLED(CONFIG_PREEMPT)) { ++ if (IS_ENABLED(CONFIG_PREEMPTION)) { + /* Return to preemptible kernel context */ + if (unlikely(*ti_flagsp & _TIF_NEED_RESCHED)) { + if (preempt_count() == 0) + preempt_schedule_irq(); ++ } else if (unlikely(*ti_flagsp & _TIF_NEED_RESCHED_LAZY)) { ++ if ((preempt_count() == 0) && ++ (current_thread_info()->preempt_lazy_count == 0)) ++ preempt_schedule_irq(); + } + } + +diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c +index 1d20f0f77..7e0a497a3 100644 +--- a/arch/powerpc/kernel/time.c ++++ b/arch/powerpc/kernel/time.c +@@ -312,12 +312,11 @@ static unsigned long vtime_delta_scaled(struct cpu_accounting_data *acct, + return stime_scaled; + } + +-static unsigned long vtime_delta(struct task_struct *tsk, ++static unsigned long vtime_delta(struct cpu_accounting_data *acct, + unsigned long *stime_scaled, + unsigned long *steal_time) + { + unsigned long now, stime; +- struct cpu_accounting_data *acct = get_accounting(tsk); + + WARN_ON_ONCE(!irqs_disabled()); + +@@ -332,29 +331,30 @@ static unsigned long vtime_delta(struct task_struct *tsk, + return stime; + } + ++static void vtime_delta_kernel(struct cpu_accounting_data *acct, ++ unsigned long *stime, unsigned long *stime_scaled) ++{ ++ unsigned long steal_time; ++ ++ *stime = vtime_delta(acct, stime_scaled, &steal_time); ++ *stime -= min(*stime, steal_time); ++ acct->steal_time += steal_time; ++} ++ + void vtime_account_kernel(struct task_struct *tsk) + { +- unsigned long stime, stime_scaled, steal_time; + struct cpu_accounting_data *acct = get_accounting(tsk); ++ unsigned long stime, stime_scaled; + +- stime = vtime_delta(tsk, &stime_scaled, &steal_time); +- +- stime -= min(stime, steal_time); +- acct->steal_time += steal_time; ++ vtime_delta_kernel(acct, &stime, &stime_scaled); + +- if ((tsk->flags & PF_VCPU) && !irq_count()) { ++ if (tsk->flags & PF_VCPU) { + acct->gtime += stime; + #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME + acct->utime_scaled += stime_scaled; + #endif + } else { +- if (hardirq_count()) +- acct->hardirq_time += stime; +- else if (in_serving_softirq()) +- acct->softirq_time += stime; +- else +- acct->stime += stime; +- ++ acct->stime += stime; + #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME + acct->stime_scaled += stime_scaled; + #endif +@@ -367,10 +367,34 @@ void vtime_account_idle(struct task_struct *tsk) + unsigned long stime, stime_scaled, steal_time; + struct cpu_accounting_data *acct = get_accounting(tsk); + +- stime = vtime_delta(tsk, &stime_scaled, &steal_time); ++ stime = vtime_delta(acct, &stime_scaled, &steal_time); + acct->idle_time += stime + steal_time; + } + ++static void vtime_account_irq_field(struct cpu_accounting_data *acct, ++ unsigned long *field) ++{ ++ unsigned long stime, stime_scaled; ++ ++ vtime_delta_kernel(acct, &stime, &stime_scaled); ++ *field += stime; ++#ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME ++ acct->stime_scaled += stime_scaled; ++#endif ++} ++ ++void vtime_account_softirq(struct task_struct *tsk) ++{ ++ struct cpu_accounting_data *acct = get_accounting(tsk); ++ vtime_account_irq_field(acct, &acct->softirq_time); ++} ++ ++void vtime_account_hardirq(struct task_struct *tsk) ++{ ++ struct cpu_accounting_data *acct = get_accounting(tsk); ++ vtime_account_irq_field(acct, &acct->hardirq_time); ++} ++ + static void vtime_flush_scaled(struct task_struct *tsk, + struct cpu_accounting_data *acct) + { +diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c +index d2f6b2e30..6a028453f 100644 +--- a/arch/powerpc/kernel/traps.c ++++ b/arch/powerpc/kernel/traps.c +@@ -173,7 +173,6 @@ extern void panic_flush_kmsg_start(void) + + extern void panic_flush_kmsg_end(void) + { +- printk_safe_flush_on_panic(); + kmsg_dump(KMSG_DUMP_PANIC); + bust_spinlocks(0); + debug_locks_off(); +@@ -263,12 +262,17 @@ static char *get_mmu_str(void) + + static int __die(const char *str, struct pt_regs *regs, long err) + { ++ const char *pr = ""; ++ + printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); + ++ if (IS_ENABLED(CONFIG_PREEMPTION)) ++ pr = IS_ENABLED(CONFIG_PREEMPT_RT) ? " PREEMPT_RT" : " PREEMPT"; ++ + printk("%s PAGE_SIZE=%luK%s%s%s%s%s%s %s\n", + IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN) ? "LE" : "BE", + PAGE_SIZE / 1024, get_mmu_str(), +- IS_ENABLED(CONFIG_PREEMPT) ? " PREEMPT" : "", ++ pr, + IS_ENABLED(CONFIG_SMP) ? " SMP" : "", + IS_ENABLED(CONFIG_SMP) ? (" NR_CPUS=" __stringify(NR_CPUS)) : "", + debug_pagealloc_enabled() ? " DEBUG_PAGEALLOC" : "", +diff --git a/arch/powerpc/kernel/watchdog.c b/arch/powerpc/kernel/watchdog.c +index 75b2a6c4d..db40e20d0 100644 +--- a/arch/powerpc/kernel/watchdog.c ++++ b/arch/powerpc/kernel/watchdog.c +@@ -185,11 +185,6 @@ static void watchdog_smp_panic(int cpu, u64 tb) + + wd_smp_unlock(&flags); + +- printk_safe_flush(); +- /* +- * printk_safe_flush() seems to require another print +- * before anything actually goes out to console. +- */ + if (sysctl_hardlockup_all_cpu_backtrace) + trigger_allbutself_cpu_backtrace(); + +diff --git a/arch/powerpc/kexec/crash.c b/arch/powerpc/kexec/crash.c +index c9a889880..d488311ef 100644 +--- a/arch/powerpc/kexec/crash.c ++++ b/arch/powerpc/kexec/crash.c +@@ -311,9 +311,6 @@ void default_machine_crash_shutdown(struct pt_regs *regs) + unsigned int i; + int (*old_handler)(struct pt_regs *regs); + +- /* Avoid hardlocking with irresponsive CPU holding logbuf_lock */ +- printk_nmi_enter(); +- + /* + * This function is only called after the system + * has panicked or is otherwise in a critical state. +diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig +index 549591d9a..efb5bfe93 100644 +--- a/arch/powerpc/kvm/Kconfig ++++ b/arch/powerpc/kvm/Kconfig +@@ -178,6 +178,7 @@ config KVM_E500MC + config KVM_MPIC + bool "KVM in-kernel MPIC emulation" + depends on KVM && E500 ++ depends on !PREEMPT_RT + select HAVE_KVM_IRQCHIP + select HAVE_KVM_IRQFD + select HAVE_KVM_IRQ_ROUTING +diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile +index 55b4a8bd4..3b4e9e4e2 100644 +--- a/arch/powerpc/mm/Makefile ++++ b/arch/powerpc/mm/Makefile +@@ -16,7 +16,6 @@ obj-$(CONFIG_NEED_MULTIPLE_NODES) += numa.o + obj-$(CONFIG_PPC_MM_SLICES) += slice.o + obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o + obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-noncoherent.o +-obj-$(CONFIG_HIGHMEM) += highmem.o + obj-$(CONFIG_PPC_COPRO_BASE) += copro_fault.o + obj-$(CONFIG_PPC_PTDUMP) += ptdump/ + obj-$(CONFIG_KASAN) += kasan/ +diff --git a/arch/powerpc/mm/highmem.c b/arch/powerpc/mm/highmem.c +deleted file mode 100644 +index 624b4438a..000000000 +--- a/arch/powerpc/mm/highmem.c ++++ /dev/null +@@ -1,67 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* +- * highmem.c: virtual kernel memory mappings for high memory +- * +- * PowerPC version, stolen from the i386 version. +- * +- * Used in CONFIG_HIGHMEM systems for memory pages which +- * are not addressable by direct kernel virtual addresses. +- * +- * Copyright (C) 1999 Gerhard Wichert, Siemens AG +- * Gerhard.Wichert@pdb.siemens.de +- * +- * +- * Redesigned the x86 32-bit VM architecture to deal with +- * up to 16 Terrabyte physical memory. With current x86 CPUs +- * we now support up to 64 Gigabytes physical RAM. +- * +- * Copyright (C) 1999 Ingo Molnar +- * +- * Reworked for PowerPC by various contributors. Moved from +- * highmem.h by Benjamin Herrenschmidt (c) 2009 IBM Corp. +- */ +- +-#include +-#include +- +-void *kmap_atomic_high_prot(struct page *page, pgprot_t prot) +-{ +- unsigned long vaddr; +- int idx, type; +- +- type = kmap_atomic_idx_push(); +- idx = type + KM_TYPE_NR*smp_processor_id(); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +- WARN_ON(IS_ENABLED(CONFIG_DEBUG_HIGHMEM) && !pte_none(*(kmap_pte - idx))); +- __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot), 1); +- local_flush_tlb_page(NULL, vaddr); +- +- return (void*) vaddr; +-} +-EXPORT_SYMBOL(kmap_atomic_high_prot); +- +-void kunmap_atomic_high(void *kvaddr) +-{ +- unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; +- +- if (vaddr < __fix_to_virt(FIX_KMAP_END)) +- return; +- +- if (IS_ENABLED(CONFIG_DEBUG_HIGHMEM)) { +- int type = kmap_atomic_idx(); +- unsigned int idx; +- +- idx = type + KM_TYPE_NR * smp_processor_id(); +- WARN_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); +- +- /* +- * force other mappings to Oops if they'll try to access +- * this pte without first remap it +- */ +- pte_clear(&init_mm, vaddr, kmap_pte-idx); +- local_flush_tlb_page(NULL, vaddr); +- } +- +- kmap_atomic_idx_pop(); +-} +-EXPORT_SYMBOL(kunmap_atomic_high); +diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c +index 1ed276d23..ae7c136ed 100644 +--- a/arch/powerpc/mm/mem.c ++++ b/arch/powerpc/mm/mem.c +@@ -63,11 +63,6 @@ + unsigned long long memory_limit; + bool init_mem_is_free; + +-#ifdef CONFIG_HIGHMEM +-pte_t *kmap_pte; +-EXPORT_SYMBOL(kmap_pte); +-#endif +- + pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, + unsigned long size, pgprot_t vma_prot) + { +@@ -237,8 +232,6 @@ void __init paging_init(void) + + map_kernel_page(PKMAP_BASE, 0, __pgprot(0)); /* XXX gross */ + pkmap_page_table = virt_to_kpte(PKMAP_BASE); +- +- kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN)); + #endif /* CONFIG_HIGHMEM */ + + printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%llx\n", +diff --git a/arch/powerpc/platforms/powernv/opal-kmsg.c b/arch/powerpc/platforms/powernv/opal-kmsg.c +index 6c3bc4b4d..ec862846b 100644 +--- a/arch/powerpc/platforms/powernv/opal-kmsg.c ++++ b/arch/powerpc/platforms/powernv/opal-kmsg.c +@@ -20,7 +20,8 @@ + * message, it just ensures that OPAL completely flushes the console buffer. + */ + static void kmsg_dump_opal_console_flush(struct kmsg_dumper *dumper, +- enum kmsg_dump_reason reason) ++ enum kmsg_dump_reason reason, ++ struct kmsg_dumper_iter *iter) + { + /* + * Outside of a panic context the pollers will continue to run, +diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c +index 245f1f8df..f05555dde 100644 +--- a/arch/powerpc/platforms/pseries/iommu.c ++++ b/arch/powerpc/platforms/pseries/iommu.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -190,7 +191,13 @@ static int tce_build_pSeriesLP(unsigned long liobn, long tcenum, long tceshift, + return ret; + } + +-static DEFINE_PER_CPU(__be64 *, tce_page); ++struct tce_page { ++ __be64 * page; ++ local_lock_t lock; ++}; ++static DEFINE_PER_CPU(struct tce_page, tce_page) = { ++ .lock = INIT_LOCAL_LOCK(lock), ++}; + + static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, + long npages, unsigned long uaddr, +@@ -212,9 +219,10 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, + direction, attrs); + } + +- local_irq_save(flags); /* to protect tcep and the page behind it */ ++ /* to protect tcep and the page behind it */ ++ local_lock_irqsave(&tce_page.lock, flags); + +- tcep = __this_cpu_read(tce_page); ++ tcep = __this_cpu_read(tce_page.page); + + /* This is safe to do since interrupts are off when we're called + * from iommu_alloc{,_sg}() +@@ -223,12 +231,12 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, + tcep = (__be64 *)__get_free_page(GFP_ATOMIC); + /* If allocation fails, fall back to the loop implementation */ + if (!tcep) { +- local_irq_restore(flags); ++ local_unlock_irqrestore(&tce_page.lock, flags); + return tce_build_pSeriesLP(tbl->it_index, tcenum, + tbl->it_page_shift, + npages, uaddr, direction, attrs); + } +- __this_cpu_write(tce_page, tcep); ++ __this_cpu_write(tce_page.page, tcep); + } + + rpn = __pa(uaddr) >> TCE_SHIFT; +@@ -258,7 +266,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, + tcenum += limit; + } while (npages > 0 && !rc); + +- local_irq_restore(flags); ++ local_unlock_irqrestore(&tce_page.lock, flags); + + if (unlikely(rc == H_NOT_ENOUGH_RESOURCES)) { + ret = (int)rc; +@@ -429,16 +437,17 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn, + DMA_BIDIRECTIONAL, 0); + } + +- local_irq_disable(); /* to protect tcep and the page behind it */ +- tcep = __this_cpu_read(tce_page); ++ /* to protect tcep and the page behind it */ ++ local_lock_irq(&tce_page.lock); ++ tcep = __this_cpu_read(tce_page.page); + + if (!tcep) { + tcep = (__be64 *)__get_free_page(GFP_ATOMIC); + if (!tcep) { +- local_irq_enable(); ++ local_unlock_irq(&tce_page.lock); + return -ENOMEM; + } +- __this_cpu_write(tce_page, tcep); ++ __this_cpu_write(tce_page.page, tcep); + } + + proto_tce = TCE_PCI_READ | TCE_PCI_WRITE; +@@ -481,7 +490,7 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn, + + /* error cleanup: caller will clear whole range */ + +- local_irq_enable(); ++ local_unlock_irq(&tce_page.lock); + return rc; + } + +diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c +index 2872b66d9..0918ab137 100644 +--- a/arch/powerpc/xmon/xmon.c ++++ b/arch/powerpc/xmon/xmon.c +@@ -3002,7 +3002,7 @@ print_address(unsigned long addr) + static void + dump_log_buf(void) + { +- struct kmsg_dumper dumper = { .active = 1 }; ++ struct kmsg_dumper_iter iter = { .active = 1 }; + unsigned char buf[128]; + size_t len; + +@@ -3014,9 +3014,9 @@ dump_log_buf(void) + catch_memory_errors = 1; + sync(); + +- kmsg_dump_rewind_nolock(&dumper); ++ kmsg_dump_rewind(&iter); + xmon_start_pagination(); +- while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) { ++ while (kmsg_dump_get_line(&iter, false, buf, sizeof(buf), &len)) { + buf[len] = '\0'; + printf("%s", buf); + } +diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig +index 7461318e1..517cbf603 100644 +--- a/arch/s390/Kconfig ++++ b/arch/s390/Kconfig +@@ -183,6 +183,7 @@ config S390 + select HAVE_RSEQ + select HAVE_SYSCALL_TRACEPOINTS + select HAVE_VIRT_CPU_ACCOUNTING ++ select HAVE_VIRT_CPU_ACCOUNTING_IDLE + select IOMMU_HELPER if PCI + select IOMMU_SUPPORT if PCI + select MODULES_USE_ELF_RELA +diff --git a/arch/s390/include/asm/spinlock_types.h b/arch/s390/include/asm/spinlock_types.h +index cfed272e4..8e28e8176 100644 +--- a/arch/s390/include/asm/spinlock_types.h ++++ b/arch/s390/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef __ASM_SPINLOCK_TYPES_H + #define __ASM_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + int lock; + } __attribute__ ((aligned (4))) arch_spinlock_t; +diff --git a/arch/s390/include/asm/vtime.h b/arch/s390/include/asm/vtime.h +index 3622d4ebc..fac6a6798 100644 +--- a/arch/s390/include/asm/vtime.h ++++ b/arch/s390/include/asm/vtime.h +@@ -2,7 +2,6 @@ + #ifndef _S390_VTIME_H + #define _S390_VTIME_H + +-#define __ARCH_HAS_VTIME_ACCOUNT + #define __ARCH_HAS_VTIME_TASK_SWITCH + + #endif /* _S390_VTIME_H */ +diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c +index 579ec3a8c..9b3c5978b 100644 +--- a/arch/s390/kernel/vtime.c ++++ b/arch/s390/kernel/vtime.c +@@ -223,35 +223,50 @@ void vtime_flush(struct task_struct *tsk) + S390_lowcore.avg_steal_timer = avg_steal; + } + ++static u64 vtime_delta(void) ++{ ++ u64 timer = S390_lowcore.last_update_timer; ++ ++ S390_lowcore.last_update_timer = get_vtimer(); ++ ++ return timer - S390_lowcore.last_update_timer; ++} ++ + /* + * Update process times based on virtual cpu times stored by entry.S + * to the lowcore fields user_timer, system_timer & steal_clock. + */ +-void vtime_account_irq_enter(struct task_struct *tsk) ++void vtime_account_kernel(struct task_struct *tsk) + { +- u64 timer; +- +- timer = S390_lowcore.last_update_timer; +- S390_lowcore.last_update_timer = get_vtimer(); +- timer -= S390_lowcore.last_update_timer; ++ u64 delta = vtime_delta(); + +- if ((tsk->flags & PF_VCPU) && (irq_count() == 0)) +- S390_lowcore.guest_timer += timer; +- else if (hardirq_count()) +- S390_lowcore.hardirq_timer += timer; +- else if (in_serving_softirq()) +- S390_lowcore.softirq_timer += timer; ++ if (tsk->flags & PF_VCPU) ++ S390_lowcore.guest_timer += delta; + else +- S390_lowcore.system_timer += timer; ++ S390_lowcore.system_timer += delta; + +- virt_timer_forward(timer); ++ virt_timer_forward(delta); + } +-EXPORT_SYMBOL_GPL(vtime_account_irq_enter); +- +-void vtime_account_kernel(struct task_struct *tsk) +-__attribute__((alias("vtime_account_irq_enter"))); + EXPORT_SYMBOL_GPL(vtime_account_kernel); + ++void vtime_account_softirq(struct task_struct *tsk) ++{ ++ u64 delta = vtime_delta(); ++ ++ S390_lowcore.softirq_timer += delta; ++ ++ virt_timer_forward(delta); ++} ++ ++void vtime_account_hardirq(struct task_struct *tsk) ++{ ++ u64 delta = vtime_delta(); ++ ++ S390_lowcore.hardirq_timer += delta; ++ ++ virt_timer_forward(delta); ++} ++ + /* + * Sorted add to a list. List is linear searched until first bigger + * element is found. +diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h +index f38adc189..b07fbc7f7 100644 +--- a/arch/sh/include/asm/fixmap.h ++++ b/arch/sh/include/asm/fixmap.h +@@ -13,9 +13,6 @@ + #include + #include + #include +-#ifdef CONFIG_HIGHMEM +-#include +-#endif + + /* + * Here we define all the compile-time 'special' virtual +@@ -53,11 +50,6 @@ enum fixed_addresses { + FIX_CMAP_BEGIN, + FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS) - 1, + +-#ifdef CONFIG_HIGHMEM +- FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ +- FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS) - 1, +-#endif +- + #ifdef CONFIG_IOREMAP_FIXED + /* + * FIX_IOREMAP entries are useful for mapping physical address +diff --git a/arch/sh/include/asm/hardirq.h b/arch/sh/include/asm/hardirq.h +index edaea3559..9fe4495a8 100644 +--- a/arch/sh/include/asm/hardirq.h ++++ b/arch/sh/include/asm/hardirq.h +@@ -2,16 +2,10 @@ + #ifndef __ASM_SH_HARDIRQ_H + #define __ASM_SH_HARDIRQ_H + +-#include +-#include +- +-typedef struct { +- unsigned int __softirq_pending; +- unsigned int __nmi_count; /* arch dependent */ +-} ____cacheline_aligned irq_cpustat_t; +- +-#include /* Standard mappings for irq_cpustat_t above */ +- + extern void ack_bad_irq(unsigned int irq); ++#define ack_bad_irq ack_bad_irq ++#define ARCH_WANTS_NMI_IRQSTAT ++ ++#include + + #endif /* __ASM_SH_HARDIRQ_H */ +diff --git a/arch/sh/include/asm/kmap_types.h b/arch/sh/include/asm/kmap_types.h +deleted file mode 100644 +index b78107f92..000000000 +--- a/arch/sh/include/asm/kmap_types.h ++++ /dev/null +@@ -1,15 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef __SH_KMAP_TYPES_H +-#define __SH_KMAP_TYPES_H +- +-/* Dummy header just to define km_type. */ +- +-#ifdef CONFIG_DEBUG_HIGHMEM +-#define __WITH_KM_FENCE +-#endif +- +-#include +- +-#undef __WITH_KM_FENCE +- +-#endif +diff --git a/arch/sh/include/asm/spinlock_types.h b/arch/sh/include/asm/spinlock_types.h +index e82369f28..22ca9a98b 100644 +--- a/arch/sh/include/asm/spinlock_types.h ++++ b/arch/sh/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef __ASM_SH_SPINLOCK_TYPES_H + #define __ASM_SH_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + volatile unsigned int lock; + } arch_spinlock_t; +diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c +index 5717c7cbd..5db7af565 100644 +--- a/arch/sh/kernel/irq.c ++++ b/arch/sh/kernel/irq.c +@@ -44,7 +44,7 @@ int arch_show_interrupts(struct seq_file *p, int prec) + + seq_printf(p, "%*s: ", prec, "NMI"); + for_each_online_cpu(j) +- seq_printf(p, "%10u ", nmi_count(j)); ++ seq_printf(p, "%10u ", per_cpu(irq_stat.__nmi_count, j)); + seq_printf(p, " Non-maskable interrupts\n"); + + seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count)); +@@ -148,6 +148,7 @@ void irq_ctx_exit(int cpu) + hardirq_ctx[cpu] = NULL; + } + ++#ifndef CONFIG_PREEMPT_RT + void do_softirq_own_stack(void) + { + struct thread_info *curctx; +@@ -175,6 +176,7 @@ void do_softirq_own_stack(void) + "r5", "r6", "r7", "r8", "r9", "r15", "t", "pr" + ); + } ++#endif + #else + static inline void handle_one_irq(unsigned int irq) + { +diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c +index 9c3d32b80..f5beecdac 100644 +--- a/arch/sh/kernel/traps.c ++++ b/arch/sh/kernel/traps.c +@@ -186,7 +186,7 @@ BUILD_TRAP_HANDLER(nmi) + arch_ftrace_nmi_enter(); + + nmi_enter(); +- nmi_count(cpu)++; ++ this_cpu_inc(irq_stat.__nmi_count); + + switch (notify_die(DIE_NMI, "NMI", regs, 0, vec & 0xff, SIGINT)) { + case NOTIFY_OK: +diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c +index 3348e0c4d..0db6919af 100644 +--- a/arch/sh/mm/init.c ++++ b/arch/sh/mm/init.c +@@ -362,9 +362,6 @@ void __init mem_init(void) + mem_init_print_info(NULL); + pr_info("virtual kernel memory layout:\n" + " fixmap : 0x%08lx - 0x%08lx (%4ld kB)\n" +-#ifdef CONFIG_HIGHMEM +- " pkmap : 0x%08lx - 0x%08lx (%4ld kB)\n" +-#endif + " vmalloc : 0x%08lx - 0x%08lx (%4ld MB)\n" + " lowmem : 0x%08lx - 0x%08lx (%4ld MB) (cached)\n" + #ifdef CONFIG_UNCACHED_MAPPING +@@ -376,11 +373,6 @@ void __init mem_init(void) + FIXADDR_START, FIXADDR_TOP, + (FIXADDR_TOP - FIXADDR_START) >> 10, + +-#ifdef CONFIG_HIGHMEM +- PKMAP_BASE, PKMAP_BASE+LAST_PKMAP*PAGE_SIZE, +- (LAST_PKMAP*PAGE_SIZE) >> 10, +-#endif +- + (unsigned long)VMALLOC_START, VMALLOC_END, + (VMALLOC_END - VMALLOC_START) >> 20, + +diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig +index 530b7ec5d..a38d00d8b 100644 +--- a/arch/sparc/Kconfig ++++ b/arch/sparc/Kconfig +@@ -139,6 +139,7 @@ config MMU + config HIGHMEM + bool + default y if SPARC32 ++ select KMAP_LOCAL + + config ZONE_DMA + bool +diff --git a/arch/sparc/include/asm/highmem.h b/arch/sparc/include/asm/highmem.h +index 6c35f0d27..875116209 100644 +--- a/arch/sparc/include/asm/highmem.h ++++ b/arch/sparc/include/asm/highmem.h +@@ -24,7 +24,6 @@ + #include + #include + #include +-#include + #include + + /* declarations for highmem.c */ +@@ -33,8 +32,6 @@ extern unsigned long highstart_pfn, highend_pfn; + #define kmap_prot __pgprot(SRMMU_ET_PTE | SRMMU_PRIV | SRMMU_CACHE) + extern pte_t *pkmap_page_table; + +-void kmap_init(void) __init; +- + /* + * Right now we initialize only a single pte table. It can be extended + * easily, subsequent pte tables have to be allocated in one physical +@@ -53,6 +50,11 @@ void kmap_init(void) __init; + + #define flush_cache_kmaps() flush_cache_all() + ++/* FIXME: Use __flush_tlb_one(vaddr) instead of flush_cache_all() -- Anton */ ++#define arch_kmap_local_post_map(vaddr, pteval) flush_cache_all() ++#define arch_kmap_local_post_unmap(vaddr) flush_cache_all() ++ ++ + #endif /* __KERNEL__ */ + + #endif /* _ASM_HIGHMEM_H */ +diff --git a/arch/sparc/include/asm/kmap_types.h b/arch/sparc/include/asm/kmap_types.h +deleted file mode 100644 +index 55a99b6bd..000000000 +--- a/arch/sparc/include/asm/kmap_types.h ++++ /dev/null +@@ -1,11 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef _ASM_KMAP_TYPES_H +-#define _ASM_KMAP_TYPES_H +- +-/* Dummy header just to define km_type. None of this +- * is actually used on sparc. -DaveM +- */ +- +-#include +- +-#endif +diff --git a/arch/sparc/include/asm/vaddrs.h b/arch/sparc/include/asm/vaddrs.h +index 84d054b07..4fec0341e 100644 +--- a/arch/sparc/include/asm/vaddrs.h ++++ b/arch/sparc/include/asm/vaddrs.h +@@ -32,13 +32,13 @@ + #define SRMMU_NOCACHE_ALCRATIO 64 /* 256 pages per 64MB of system RAM */ + + #ifndef __ASSEMBLY__ +-#include ++#include + + enum fixed_addresses { + FIX_HOLE, + #ifdef CONFIG_HIGHMEM + FIX_KMAP_BEGIN, +- FIX_KMAP_END = (KM_TYPE_NR * NR_CPUS), ++ FIX_KMAP_END = (KM_MAX_IDX * NR_CPUS), + #endif + __end_of_fixed_addresses + }; +diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c +index 3ec9f1402..eb21682ab 100644 +--- a/arch/sparc/kernel/irq_64.c ++++ b/arch/sparc/kernel/irq_64.c +@@ -854,6 +854,7 @@ void __irq_entry handler_irq(int pil, struct pt_regs *regs) + set_irq_regs(old_regs); + } + ++#ifndef CONFIG_PREEMPT_RT + void do_softirq_own_stack(void) + { + void *orig_sp, *sp = softirq_stack[smp_processor_id()]; +@@ -868,6 +869,7 @@ void do_softirq_own_stack(void) + __asm__ __volatile__("mov %0, %%sp" + : : "r" (orig_sp)); + } ++#endif + + #ifdef CONFIG_HOTPLUG_CPU + void fixup_irqs(void) +diff --git a/arch/sparc/mm/Makefile b/arch/sparc/mm/Makefile +index b078205b7..68db1f859 100644 +--- a/arch/sparc/mm/Makefile ++++ b/arch/sparc/mm/Makefile +@@ -15,6 +15,3 @@ obj-$(CONFIG_SPARC32) += leon_mm.o + + # Only used by sparc64 + obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o +- +-# Only used by sparc32 +-obj-$(CONFIG_HIGHMEM) += highmem.o +diff --git a/arch/sparc/mm/highmem.c b/arch/sparc/mm/highmem.c +deleted file mode 100644 +index 8f2a2afb0..000000000 +--- a/arch/sparc/mm/highmem.c ++++ /dev/null +@@ -1,115 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* +- * highmem.c: virtual kernel memory mappings for high memory +- * +- * Provides kernel-static versions of atomic kmap functions originally +- * found as inlines in include/asm-sparc/highmem.h. These became +- * needed as kmap_atomic() and kunmap_atomic() started getting +- * called from within modules. +- * -- Tomas Szepe , September 2002 +- * +- * But kmap_atomic() and kunmap_atomic() cannot be inlined in +- * modules because they are loaded with btfixup-ped functions. +- */ +- +-/* +- * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap +- * gives a more generic (and caching) interface. But kmap_atomic can +- * be used in IRQ contexts, so in some (very limited) cases we need it. +- * +- * XXX This is an old text. Actually, it's good to use atomic kmaps, +- * provided you remember that they are atomic and not try to sleep +- * with a kmap taken, much like a spinlock. Non-atomic kmaps are +- * shared by CPUs, and so precious, and establishing them requires IPI. +- * Atomic kmaps are lightweight and we may have NCPUS more of them. +- */ +-#include +-#include +-#include +- +-#include +-#include +-#include +- +-static pte_t *kmap_pte; +- +-void __init kmap_init(void) +-{ +- unsigned long address = __fix_to_virt(FIX_KMAP_BEGIN); +- +- /* cache the first kmap pte */ +- kmap_pte = virt_to_kpte(address); +-} +- +-void *kmap_atomic_high_prot(struct page *page, pgprot_t prot) +-{ +- unsigned long vaddr; +- long idx, type; +- +- type = kmap_atomic_idx_push(); +- idx = type + KM_TYPE_NR*smp_processor_id(); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +- +-/* XXX Fix - Anton */ +-#if 0 +- __flush_cache_one(vaddr); +-#else +- flush_cache_all(); +-#endif +- +-#ifdef CONFIG_DEBUG_HIGHMEM +- BUG_ON(!pte_none(*(kmap_pte-idx))); +-#endif +- set_pte(kmap_pte-idx, mk_pte(page, prot)); +-/* XXX Fix - Anton */ +-#if 0 +- __flush_tlb_one(vaddr); +-#else +- flush_tlb_all(); +-#endif +- +- return (void*) vaddr; +-} +-EXPORT_SYMBOL(kmap_atomic_high_prot); +- +-void kunmap_atomic_high(void *kvaddr) +-{ +- unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; +- int type; +- +- if (vaddr < FIXADDR_START) +- return; +- +- type = kmap_atomic_idx(); +- +-#ifdef CONFIG_DEBUG_HIGHMEM +- { +- unsigned long idx; +- +- idx = type + KM_TYPE_NR * smp_processor_id(); +- BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN+idx)); +- +- /* XXX Fix - Anton */ +-#if 0 +- __flush_cache_one(vaddr); +-#else +- flush_cache_all(); +-#endif +- +- /* +- * force other mappings to Oops if they'll try to access +- * this pte without first remap it +- */ +- pte_clear(&init_mm, vaddr, kmap_pte-idx); +- /* XXX Fix - Anton */ +-#if 0 +- __flush_tlb_one(vaddr); +-#else +- flush_tlb_all(); +-#endif +- } +-#endif +- +- kmap_atomic_idx_pop(); +-} +-EXPORT_SYMBOL(kunmap_atomic_high); +diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c +index 0070f8b9a..a03caa5f6 100644 +--- a/arch/sparc/mm/srmmu.c ++++ b/arch/sparc/mm/srmmu.c +@@ -971,8 +971,6 @@ void __init srmmu_paging_init(void) + + sparc_context_init(num_contexts); + +- kmap_init(); +- + { + unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 }; + +diff --git a/arch/um/include/asm/fixmap.h b/arch/um/include/asm/fixmap.h +index 2c697a145..2efac5827 100644 +--- a/arch/um/include/asm/fixmap.h ++++ b/arch/um/include/asm/fixmap.h +@@ -3,7 +3,6 @@ + #define __UM_FIXMAP_H + + #include +-#include + #include + #include + #include +diff --git a/arch/um/include/asm/hardirq.h b/arch/um/include/asm/hardirq.h +index b426796d2..52e2c3626 100644 +--- a/arch/um/include/asm/hardirq.h ++++ b/arch/um/include/asm/hardirq.h +@@ -2,22 +2,7 @@ + #ifndef __ASM_UM_HARDIRQ_H + #define __ASM_UM_HARDIRQ_H + +-#include +-#include +- +-typedef struct { +- unsigned int __softirq_pending; +-} ____cacheline_aligned irq_cpustat_t; +- +-#include /* Standard mappings for irq_cpustat_t above */ +-#include +- +-#ifndef ack_bad_irq +-static inline void ack_bad_irq(unsigned int irq) +-{ +- printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq); +-} +-#endif ++#include + + #define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 + +diff --git a/arch/um/include/asm/kmap_types.h b/arch/um/include/asm/kmap_types.h +deleted file mode 100644 +index b0bd12de1..000000000 +--- a/arch/um/include/asm/kmap_types.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Copyright (C) 2002 Jeff Dike (jdike@karaya.com) +- */ +- +-#ifndef __UM_KMAP_TYPES_H +-#define __UM_KMAP_TYPES_H +- +-/* No more #include "asm/arch/kmap_types.h" ! */ +- +-#define KM_TYPE_NR 14 +- +-#endif +diff --git a/arch/um/kernel/kmsg_dump.c b/arch/um/kernel/kmsg_dump.c +index e4abac6c9..173999422 100644 +--- a/arch/um/kernel/kmsg_dump.c ++++ b/arch/um/kernel/kmsg_dump.c +@@ -1,15 +1,19 @@ + // SPDX-License-Identifier: GPL-2.0 + #include ++#include + #include + #include + #include + #include + + static void kmsg_dumper_stdout(struct kmsg_dumper *dumper, +- enum kmsg_dump_reason reason) ++ enum kmsg_dump_reason reason, ++ struct kmsg_dumper_iter *iter) + { ++ static DEFINE_SPINLOCK(lock); + static char line[1024]; + struct console *con; ++ unsigned long flags; + size_t len = 0; + + /* only dump kmsg when no console is available */ +@@ -24,11 +28,16 @@ static void kmsg_dumper_stdout(struct kmsg_dumper *dumper, + if (con) + return; + ++ if (!spin_trylock_irqsave(&lock, flags)) ++ return; ++ + printf("kmsg_dump:\n"); +- while (kmsg_dump_get_line(dumper, true, line, sizeof(line), &len)) { ++ while (kmsg_dump_get_line(iter, true, line, sizeof(line), &len)) { + line[len] = '\0'; + printf("%s", line); + } ++ ++ spin_unlock_irqrestore(&lock, flags); + } + + static struct kmsg_dumper kmsg_dumper = { +diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig +index d4d53d65d..e38c22825 100644 +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -16,6 +16,7 @@ config X86_32 + select CLKSRC_I8253 + select CLONE_BACKWARDS + select HAVE_DEBUG_STACKOVERFLOW ++ select KMAP_LOCAL + select MODULES_USE_ELF_REL + select OLD_SIGACTION + select GENERIC_VDSO_32 +@@ -95,6 +96,7 @@ config X86 + select ARCH_SUPPORTS_ACPI + select ARCH_SUPPORTS_ATOMIC_RMW + select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 ++ select ARCH_SUPPORTS_RT + select ARCH_USE_BUILTIN_BSWAP + select ARCH_USE_QUEUED_RWLOCKS + select ARCH_USE_QUEUED_SPINLOCKS +@@ -219,6 +221,7 @@ config X86 + select HAVE_PCI + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP ++ select HAVE_PREEMPT_LAZY + select MMU_GATHER_RCU_TABLE_FREE if PARAVIRT + select HAVE_POSIX_CPU_TIMERS_TASK_WORK + select HAVE_REGS_AND_STACK_ACCESS_API +diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c +index be891fdf8..29c716ed1 100644 +--- a/arch/x86/crypto/aesni-intel_glue.c ++++ b/arch/x86/crypto/aesni-intel_glue.c +@@ -379,14 +379,14 @@ static int ecb_encrypt(struct skcipher_request *req) + + err = skcipher_walk_virt(&walk, req, true); + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = skcipher_walk_done(&walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -401,14 +401,14 @@ static int ecb_decrypt(struct skcipher_request *req) + + err = skcipher_walk_virt(&walk, req, true); + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = skcipher_walk_done(&walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -423,14 +423,14 @@ static int cbc_encrypt(struct skcipher_request *req) + + err = skcipher_walk_virt(&walk, req, true); + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK, walk.iv); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = skcipher_walk_done(&walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -445,14 +445,14 @@ static int cbc_decrypt(struct skcipher_request *req) + + err = skcipher_walk_virt(&walk, req, true); + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK, walk.iv); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = skcipher_walk_done(&walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -500,18 +500,20 @@ static int ctr_crypt(struct skcipher_request *req) + + err = skcipher_walk_virt(&walk, req, true); + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) { ++ kernel_fpu_begin(); + aesni_ctr_enc_tfm(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK, walk.iv); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = skcipher_walk_done(&walk, nbytes); + } + if (walk.nbytes) { ++ kernel_fpu_begin(); + ctr_crypt_final(ctx, &walk); ++ kernel_fpu_end(); + err = skcipher_walk_done(&walk, 0); + } +- kernel_fpu_end(); + + return err; + } +diff --git a/arch/x86/crypto/cast5_avx_glue.c b/arch/x86/crypto/cast5_avx_glue.c +index 384ccb00f..2f8df8ef8 100644 +--- a/arch/x86/crypto/cast5_avx_glue.c ++++ b/arch/x86/crypto/cast5_avx_glue.c +@@ -46,7 +46,7 @@ static inline void cast5_fpu_end(bool fpu_enabled) + + static int ecb_crypt(struct skcipher_request *req, bool enc) + { +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); + struct cast5_ctx *ctx = crypto_skcipher_ctx(tfm); + struct skcipher_walk walk; +@@ -61,7 +61,7 @@ static int ecb_crypt(struct skcipher_request *req, bool enc) + u8 *wsrc = walk.src.virt.addr; + u8 *wdst = walk.dst.virt.addr; + +- fpu_enabled = cast5_fpu_begin(fpu_enabled, &walk, nbytes); ++ fpu_enabled = cast5_fpu_begin(false, &walk, nbytes); + + /* Process multi-block batch */ + if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) { +@@ -90,10 +90,9 @@ static int ecb_crypt(struct skcipher_request *req, bool enc) + } while (nbytes >= bsize); + + done: ++ cast5_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } +- +- cast5_fpu_end(fpu_enabled); + return err; + } + +@@ -197,7 +196,7 @@ static int cbc_decrypt(struct skcipher_request *req) + { + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); + struct cast5_ctx *ctx = crypto_skcipher_ctx(tfm); +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct skcipher_walk walk; + unsigned int nbytes; + int err; +@@ -205,12 +204,11 @@ static int cbc_decrypt(struct skcipher_request *req) + err = skcipher_walk_virt(&walk, req, false); + + while ((nbytes = walk.nbytes)) { +- fpu_enabled = cast5_fpu_begin(fpu_enabled, &walk, nbytes); ++ fpu_enabled = cast5_fpu_begin(false, &walk, nbytes); + nbytes = __cbc_decrypt(ctx, &walk); ++ cast5_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } +- +- cast5_fpu_end(fpu_enabled); + return err; + } + +@@ -277,7 +275,7 @@ static int ctr_crypt(struct skcipher_request *req) + { + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); + struct cast5_ctx *ctx = crypto_skcipher_ctx(tfm); +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct skcipher_walk walk; + unsigned int nbytes; + int err; +@@ -285,13 +283,12 @@ static int ctr_crypt(struct skcipher_request *req) + err = skcipher_walk_virt(&walk, req, false); + + while ((nbytes = walk.nbytes) >= CAST5_BLOCK_SIZE) { +- fpu_enabled = cast5_fpu_begin(fpu_enabled, &walk, nbytes); ++ fpu_enabled = cast5_fpu_begin(false, &walk, nbytes); + nbytes = __ctr_crypt(&walk, ctx); ++ cast5_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } + +- cast5_fpu_end(fpu_enabled); +- + if (walk.nbytes) { + ctr_crypt_final(&walk, ctx); + err = skcipher_walk_done(&walk, 0); +diff --git a/arch/x86/crypto/glue_helper.c b/arch/x86/crypto/glue_helper.c +index d3d91a0ab..6d0774721 100644 +--- a/arch/x86/crypto/glue_helper.c ++++ b/arch/x86/crypto/glue_helper.c +@@ -24,7 +24,7 @@ int glue_ecb_req_128bit(const struct common_glue_ctx *gctx, + void *ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req)); + const unsigned int bsize = 128 / 8; + struct skcipher_walk walk; +- bool fpu_enabled = false; ++ bool fpu_enabled; + unsigned int nbytes; + int err; + +@@ -37,7 +37,7 @@ int glue_ecb_req_128bit(const struct common_glue_ctx *gctx, + unsigned int i; + + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- &walk, fpu_enabled, nbytes); ++ &walk, false, nbytes); + for (i = 0; i < gctx->num_funcs; i++) { + func_bytes = bsize * gctx->funcs[i].num_blocks; + +@@ -55,10 +55,9 @@ int glue_ecb_req_128bit(const struct common_glue_ctx *gctx, + if (nbytes < bsize) + break; + } ++ glue_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } +- +- glue_fpu_end(fpu_enabled); + return err; + } + EXPORT_SYMBOL_GPL(glue_ecb_req_128bit); +@@ -101,7 +100,7 @@ int glue_cbc_decrypt_req_128bit(const struct common_glue_ctx *gctx, + void *ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req)); + const unsigned int bsize = 128 / 8; + struct skcipher_walk walk; +- bool fpu_enabled = false; ++ bool fpu_enabled; + unsigned int nbytes; + int err; + +@@ -115,7 +114,7 @@ int glue_cbc_decrypt_req_128bit(const struct common_glue_ctx *gctx, + u128 last_iv; + + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- &walk, fpu_enabled, nbytes); ++ &walk, false, nbytes); + /* Start of the last block. */ + src += nbytes / bsize - 1; + dst += nbytes / bsize - 1; +@@ -148,10 +147,10 @@ int glue_cbc_decrypt_req_128bit(const struct common_glue_ctx *gctx, + done: + u128_xor(dst, dst, (u128 *)walk.iv); + *(u128 *)walk.iv = last_iv; ++ glue_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } + +- glue_fpu_end(fpu_enabled); + return err; + } + EXPORT_SYMBOL_GPL(glue_cbc_decrypt_req_128bit); +@@ -162,7 +161,7 @@ int glue_ctr_req_128bit(const struct common_glue_ctx *gctx, + void *ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req)); + const unsigned int bsize = 128 / 8; + struct skcipher_walk walk; +- bool fpu_enabled = false; ++ bool fpu_enabled; + unsigned int nbytes; + int err; + +@@ -176,7 +175,7 @@ int glue_ctr_req_128bit(const struct common_glue_ctx *gctx, + le128 ctrblk; + + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- &walk, fpu_enabled, nbytes); ++ &walk, false, nbytes); + + be128_to_le128(&ctrblk, (be128 *)walk.iv); + +@@ -202,11 +201,10 @@ int glue_ctr_req_128bit(const struct common_glue_ctx *gctx, + } + + le128_to_be128((be128 *)walk.iv, &ctrblk); ++ glue_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } + +- glue_fpu_end(fpu_enabled); +- + if (nbytes) { + le128 ctrblk; + u128 tmp; +@@ -306,8 +304,14 @@ int glue_xts_req_128bit(const struct common_glue_ctx *gctx, + tweak_fn(tweak_ctx, walk.iv, walk.iv); + + while (nbytes) { ++ fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, ++ &walk, fpu_enabled, ++ nbytes < bsize ? bsize : nbytes); + nbytes = __glue_xts_req_128bit(gctx, crypt_ctx, &walk); + ++ glue_fpu_end(fpu_enabled); ++ fpu_enabled = false; ++ + err = skcipher_walk_done(&walk, nbytes); + nbytes = walk.nbytes; + } +diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h +index 77217bd29..8eba66a33 100644 +--- a/arch/x86/include/asm/fixmap.h ++++ b/arch/x86/include/asm/fixmap.h +@@ -31,7 +31,7 @@ + #include + #ifdef CONFIG_X86_32 + #include +-#include ++#include + #else + #include + #endif +@@ -94,7 +94,7 @@ enum fixed_addresses { + #endif + #ifdef CONFIG_X86_32 + FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ +- FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, ++ FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_MAX_IDX * NR_CPUS) - 1, + #ifdef CONFIG_PCI_MMCONFIG + FIX_PCIE_MCFG, + #endif +@@ -151,7 +151,6 @@ extern void reserve_top_address(unsigned long reserve); + + extern int fixmaps_set; + +-extern pte_t *kmap_pte; + extern pte_t *pkmap_page_table; + + void __native_set_fixmap(enum fixed_addresses idx, pte_t pte); +diff --git a/arch/x86/include/asm/fpu/api.h b/arch/x86/include/asm/fpu/api.h +index 1b37f1d3a..2eb9b9f94 100644 +--- a/arch/x86/include/asm/fpu/api.h ++++ b/arch/x86/include/asm/fpu/api.h +@@ -30,6 +30,7 @@ extern void kernel_fpu_begin_mask(unsigned int kfpu_mask); + extern void kernel_fpu_end(void); + extern bool irq_fpu_usable(void); + extern void fpregs_mark_activate(void); ++extern void kernel_fpu_resched(void); + + /* Code that is unaware of kernel_fpu_begin_mask() can use this */ + static inline void kernel_fpu_begin(void) +@@ -42,17 +43,32 @@ static inline void kernel_fpu_begin(void) + * A context switch will (and softirq might) save CPU's FPU registers to + * fpu->fpstate.regs and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in + * a random state. ++ * ++ * local_bh_disable() protects against both preemption and soft interrupts ++ * on !RT kernels. ++ * ++ * On RT kernels local_bh_disable() is not sufficient because it only ++ * serializes soft interrupt related sections via a local lock, but stays ++ * preemptible. Disabling preemption is the right choice here as bottom ++ * half processing is always in thread context on RT kernels so it ++ * implicitly prevents bottom half processing as well. ++ * ++ * Disabling preemption also serializes against kernel_fpu_begin(). + */ + static inline void fpregs_lock(void) + { +- preempt_disable(); +- local_bh_disable(); ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) ++ local_bh_disable(); ++ else ++ preempt_disable(); + } + + static inline void fpregs_unlock(void) + { +- local_bh_enable(); +- preempt_enable(); ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) ++ local_bh_enable(); ++ else ++ preempt_enable(); + } + + #ifdef CONFIG_X86_DEBUG_FPU +diff --git a/arch/x86/include/asm/highmem.h b/arch/x86/include/asm/highmem.h +index 0f420b24e..032e02085 100644 +--- a/arch/x86/include/asm/highmem.h ++++ b/arch/x86/include/asm/highmem.h +@@ -23,7 +23,6 @@ + + #include + #include +-#include + #include + #include + #include +@@ -58,11 +57,17 @@ extern unsigned long highstart_pfn, highend_pfn; + #define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT) + #define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) + +-void *kmap_atomic_pfn(unsigned long pfn); +-void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot); +- + #define flush_cache_kmaps() do { } while (0) + ++#define arch_kmap_local_post_map(vaddr, pteval) \ ++ arch_flush_lazy_mmu_mode() ++ ++#define arch_kmap_local_post_unmap(vaddr) \ ++ do { \ ++ flush_tlb_one_kernel((vaddr)); \ ++ arch_flush_lazy_mmu_mode(); \ ++ } while (0) ++ + extern void add_highpages_with_active_regions(int nid, unsigned long start_pfn, + unsigned long end_pfn); + +diff --git a/arch/x86/include/asm/iomap.h b/arch/x86/include/asm/iomap.h +index bacf68c4d..e2de092fc 100644 +--- a/arch/x86/include/asm/iomap.h ++++ b/arch/x86/include/asm/iomap.h +@@ -9,19 +9,14 @@ + #include + #include + #include ++#include + #include + #include + +-void __iomem * +-iomap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot); ++void __iomem *__iomap_local_pfn_prot(unsigned long pfn, pgprot_t prot); + +-void +-iounmap_atomic(void __iomem *kvaddr); ++int iomap_create_wc(resource_size_t base, unsigned long size, pgprot_t *prot); + +-int +-iomap_create_wc(resource_size_t base, unsigned long size, pgprot_t *prot); +- +-void +-iomap_free(resource_size_t base, unsigned long size); ++void iomap_free(resource_size_t base, unsigned long size); + + #endif /* _ASM_X86_IOMAP_H */ +diff --git a/arch/x86/include/asm/kmap_types.h b/arch/x86/include/asm/kmap_types.h +deleted file mode 100644 +index 04ab8266e..000000000 +--- a/arch/x86/include/asm/kmap_types.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef _ASM_X86_KMAP_TYPES_H +-#define _ASM_X86_KMAP_TYPES_H +- +-#if defined(CONFIG_X86_32) && defined(CONFIG_DEBUG_HIGHMEM) +-#define __WITH_KM_FENCE +-#endif +- +-#include +- +-#undef __WITH_KM_FENCE +- +-#endif /* _ASM_X86_KMAP_TYPES_H */ +diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h +index b30b56d47..9632218bf 100644 +--- a/arch/x86/include/asm/paravirt_types.h ++++ b/arch/x86/include/asm/paravirt_types.h +@@ -43,7 +43,6 @@ + #ifndef __ASSEMBLY__ + + #include +-#include + #include + #include + +diff --git a/arch/x86/include/asm/preempt.h b/arch/x86/include/asm/preempt.h +index 2380df419..a3b73de27 100644 +--- a/arch/x86/include/asm/preempt.h ++++ b/arch/x86/include/asm/preempt.h +@@ -90,21 +90,54 @@ static __always_inline void __preempt_count_sub(int val) + * a decrement which hits zero means we have no preempt_count and should + * reschedule. + */ +-static __always_inline bool __preempt_count_dec_and_test(void) ++static __always_inline bool ____preempt_count_dec_and_test(void) + { + return GEN_UNARY_RMWcc("decl", __preempt_count, e, __percpu_arg([var])); + } + ++static __always_inline bool __preempt_count_dec_and_test(void) ++{ ++ if (____preempt_count_dec_and_test()) ++ return true; ++#ifdef CONFIG_PREEMPT_LAZY ++ if (preempt_count()) ++ return false; ++ if (current_thread_info()->preempt_lazy_count) ++ return false; ++ return test_thread_flag(TIF_NEED_RESCHED_LAZY); ++#else ++ return false; ++#endif ++} ++ + /* + * Returns true when we need to resched and can (barring IRQ state). + */ + static __always_inline bool should_resched(int preempt_offset) + { ++#ifdef CONFIG_PREEMPT_LAZY ++ u32 tmp; ++ tmp = raw_cpu_read_4(__preempt_count); ++ if (tmp == preempt_offset) ++ return true; ++ ++ /* preempt count == 0 ? */ ++ tmp &= ~PREEMPT_NEED_RESCHED; ++ if (tmp != preempt_offset) ++ return false; ++ /* XXX PREEMPT_LOCK_OFFSET */ ++ if (current_thread_info()->preempt_lazy_count) ++ return false; ++ return test_thread_flag(TIF_NEED_RESCHED_LAZY); ++#else + return unlikely(raw_cpu_read_4(__preempt_count) == preempt_offset); ++#endif + } + + #ifdef CONFIG_PREEMPTION +- ++#ifdef CONFIG_PREEMPT_RT ++ extern void preempt_schedule_lock(void); ++#endif + extern asmlinkage void preempt_schedule(void); + extern asmlinkage void preempt_schedule_thunk(void); + +diff --git a/arch/x86/include/asm/signal.h b/arch/x86/include/asm/signal.h +index 6fd8410a3..f3bf2f515 100644 +--- a/arch/x86/include/asm/signal.h ++++ b/arch/x86/include/asm/signal.h +@@ -28,6 +28,19 @@ typedef struct { + #define SA_IA32_ABI 0x02000000u + #define SA_X32_ABI 0x01000000u + ++/* ++ * Because some traps use the IST stack, we must keep preemption ++ * disabled while calling do_trap(), but do_trap() may call ++ * force_sig_info() which will grab the signal spin_locks for the ++ * task, which in PREEMPT_RT are mutexes. By defining ++ * ARCH_RT_DELAYS_SIGNAL_SEND the force_sig_info() will set ++ * TIF_NOTIFY_RESUME and set up the signal to be sent on exit of the ++ * trap. ++ */ ++#if defined(CONFIG_PREEMPT_RT) ++#define ARCH_RT_DELAYS_SIGNAL_SEND ++#endif ++ + #ifndef CONFIG_COMPAT + typedef sigset_t compat_sigset_t; + #endif +diff --git a/arch/x86/include/asm/stackprotector.h b/arch/x86/include/asm/stackprotector.h +index 7fb482f0f..3df0a95c9 100644 +--- a/arch/x86/include/asm/stackprotector.h ++++ b/arch/x86/include/asm/stackprotector.h +@@ -65,7 +65,7 @@ + */ + static __always_inline void boot_init_stack_canary(void) + { +- u64 canary; ++ u64 canary = 0; + u64 tsc; + + #ifdef CONFIG_X86_64 +@@ -76,8 +76,14 @@ static __always_inline void boot_init_stack_canary(void) + * of randomness. The TSC only matters for very early init, + * there it already has some randomness on most systems. Later + * on during the bootup the random pool has true entropy too. ++ * For preempt-rt we need to weaken the randomness a bit, as ++ * we can't call into the random generator from atomic context ++ * due to locking constraints. We just leave canary ++ * uninitialized and use the TSC based randomness on top of it. + */ ++#ifndef CONFIG_PREEMPT_RT + get_random_bytes(&canary, sizeof(canary)); ++#endif + tsc = rdtsc(); + canary += tsc + (tsc << 32UL); + canary &= CANARY_MASK; +diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h +index 2b3c98069..c67e0be1e 100644 +--- a/arch/x86/include/asm/thread_info.h ++++ b/arch/x86/include/asm/thread_info.h +@@ -60,6 +60,8 @@ struct thread_info { + #ifdef CONFIG_SMP + u32 cpu; /* current CPU */ + #endif ++ int preempt_lazy_count; /* 0 => lazy preemptable ++ <0 => BUG */ + KABI_RESERVE(1) + KABI_RESERVE(2) + }; +@@ -67,12 +69,17 @@ struct thread_info { + #define INIT_THREAD_INFO(tsk) \ + { \ + .flags = 0, \ ++ .preempt_lazy_count = 0, \ + } + + #else /* !__ASSEMBLY__ */ + + #include + ++#define GET_THREAD_INFO(reg) \ ++ _ASM_MOV PER_CPU_VAR(cpu_current_top_of_stack),reg ; \ ++ _ASM_SUB $(THREAD_SIZE),reg ; ++ + #endif + + /* +@@ -109,6 +116,7 @@ struct thread_info { + #define TIF_SYSCALL_TRACEPOINT 28 /* syscall tracepoint instrumentation */ + #define TIF_ADDR32 29 /* 32-bit address space on 64 bits */ + #define TIF_X32 30 /* 32-bit native x86-64 binary */ ++#define TIF_NEED_RESCHED_LAZY 31 /* lazy rescheduling necessary */ + + #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) + #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) +@@ -130,6 +138,7 @@ struct thread_info { + #define _TIF_IA32 (1 << TIF_IA32) + #define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL) + #define _TIF_SLD (1 << TIF_SLD) ++#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) + #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) + #define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP) + #define _TIF_FORCED_TF (1 << TIF_FORCED_TF) +@@ -162,6 +171,8 @@ struct thread_info { + + #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW) + ++#define _TIF_NEED_RESCHED_MASK (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY) ++ + #define STACK_WARN (THREAD_SIZE/8) + + /* +diff --git a/arch/x86/kernel/crash_dump_32.c b/arch/x86/kernel/crash_dump_32.c +index 33ee47670..5fcac46aa 100644 +--- a/arch/x86/kernel/crash_dump_32.c ++++ b/arch/x86/kernel/crash_dump_32.c +@@ -13,8 +13,6 @@ + + #include + +-static void *kdump_buf_page; +- + static inline bool is_crashed_pfn_valid(unsigned long pfn) + { + #ifndef CONFIG_X86_PAE +@@ -41,15 +39,11 @@ static inline bool is_crashed_pfn_valid(unsigned long pfn) + * @userbuf: if set, @buf is in user address space, use copy_to_user(), + * otherwise @buf is in kernel address space, use memcpy(). + * +- * Copy a page from "oldmem". For this page, there is no pte mapped +- * in the current kernel. We stitch up a pte, similar to kmap_atomic. +- * +- * Calling copy_to_user() in atomic context is not desirable. Hence first +- * copying the data to a pre-allocated kernel page and then copying to user +- * space in non-atomic context. ++ * Copy a page from "oldmem". For this page, there might be no pte mapped ++ * in the current kernel. + */ +-ssize_t copy_oldmem_page(unsigned long pfn, char *buf, +- size_t csize, unsigned long offset, int userbuf) ++ssize_t copy_oldmem_page(unsigned long pfn, char *buf, size_t csize, ++ unsigned long offset, int userbuf) + { + void *vaddr; + +@@ -59,38 +53,16 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf, + if (!is_crashed_pfn_valid(pfn)) + return -EFAULT; + +- vaddr = kmap_atomic_pfn(pfn); ++ vaddr = kmap_local_pfn(pfn); + + if (!userbuf) { +- memcpy(buf, (vaddr + offset), csize); +- kunmap_atomic(vaddr); ++ memcpy(buf, vaddr + offset, csize); + } else { +- if (!kdump_buf_page) { +- printk(KERN_WARNING "Kdump: Kdump buffer page not" +- " allocated\n"); +- kunmap_atomic(vaddr); +- return -EFAULT; +- } +- copy_page(kdump_buf_page, vaddr); +- kunmap_atomic(vaddr); +- if (copy_to_user(buf, (kdump_buf_page + offset), csize)) +- return -EFAULT; ++ if (copy_to_user(buf, vaddr + offset, csize)) ++ csize = -EFAULT; + } + +- return csize; +-} ++ kunmap_local(vaddr); + +-static int __init kdump_buf_page_init(void) +-{ +- int ret = 0; +- +- kdump_buf_page = kmalloc(PAGE_SIZE, GFP_KERNEL); +- if (!kdump_buf_page) { +- printk(KERN_WARNING "Kdump: Failed to allocate kdump buffer" +- " page\n"); +- ret = -ENOMEM; +- } +- +- return ret; ++ return csize; + } +-arch_initcall(kdump_buf_page_init); +diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c +index 114e87e8d..3935532b1 100644 +--- a/arch/x86/kernel/fpu/core.c ++++ b/arch/x86/kernel/fpu/core.c +@@ -82,6 +82,18 @@ bool irq_fpu_usable(void) + } + EXPORT_SYMBOL(irq_fpu_usable); + ++void kernel_fpu_resched(void) ++{ ++ WARN_ON_FPU(!this_cpu_read(in_kernel_fpu)); ++ ++ if (should_resched(PREEMPT_OFFSET)) { ++ kernel_fpu_end(); ++ cond_resched(); ++ kernel_fpu_begin(); ++ } ++} ++EXPORT_SYMBOL_GPL(kernel_fpu_resched); ++ + /* + * Save the FPU register state in fpu->fpstate->regs. The register state is + * preserved. +diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c +index 0b79efc87..93c6b88b3 100644 +--- a/arch/x86/kernel/irq_32.c ++++ b/arch/x86/kernel/irq_32.c +@@ -131,6 +131,7 @@ int irq_init_percpu_irqstack(unsigned int cpu) + return 0; + } + ++#ifndef CONFIG_PREEMPT_RT + void do_softirq_own_stack(void) + { + struct irq_stack *irqstk; +@@ -147,6 +148,7 @@ void do_softirq_own_stack(void) + + call_on_stack(__do_softirq, isp); + } ++#endif + + void __handle_irq(struct irq_desc *desc, struct pt_regs *regs) + { +diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c +index 440eed558..7cfc4e6b7 100644 +--- a/arch/x86/kernel/irq_64.c ++++ b/arch/x86/kernel/irq_64.c +@@ -72,7 +72,9 @@ int irq_init_percpu_irqstack(unsigned int cpu) + return map_irq_stack(cpu); + } + ++#ifndef CONFIG_PREEMPT_RT + void do_softirq_own_stack(void) + { + run_on_irqstack_cond(__do_softirq, NULL); + } ++#endif +diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c +index 40e758b42..c0a518289 100644 +--- a/arch/x86/kvm/x86.c ++++ b/arch/x86/kvm/x86.c +@@ -8345,6 +8345,14 @@ int kvm_arch_init(void *opaque) + goto out; + } + ++#ifdef CONFIG_PREEMPT_RT ++ if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) { ++ pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n"); ++ r = -EOPNOTSUPP; ++ goto out; ++ } ++#endif ++ + r = -ENOMEM; + + x86_emulator_cache = kvm_alloc_emulator_cache(); +diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c +index 075fe5131..2c54b76d8 100644 +--- a/arch/x86/mm/highmem_32.c ++++ b/arch/x86/mm/highmem_32.c +@@ -4,65 +4,6 @@ + #include /* for totalram_pages */ + #include + +-void *kmap_atomic_high_prot(struct page *page, pgprot_t prot) +-{ +- unsigned long vaddr; +- int idx, type; +- +- type = kmap_atomic_idx_push(); +- idx = type + KM_TYPE_NR*smp_processor_id(); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +- BUG_ON(!pte_none(*(kmap_pte-idx))); +- set_pte(kmap_pte-idx, mk_pte(page, prot)); +- arch_flush_lazy_mmu_mode(); +- +- return (void *)vaddr; +-} +-EXPORT_SYMBOL(kmap_atomic_high_prot); +- +-/* +- * This is the same as kmap_atomic() but can map memory that doesn't +- * have a struct page associated with it. +- */ +-void *kmap_atomic_pfn(unsigned long pfn) +-{ +- return kmap_atomic_prot_pfn(pfn, kmap_prot); +-} +-EXPORT_SYMBOL_GPL(kmap_atomic_pfn); +- +-void kunmap_atomic_high(void *kvaddr) +-{ +- unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; +- +- if (vaddr >= __fix_to_virt(FIX_KMAP_END) && +- vaddr <= __fix_to_virt(FIX_KMAP_BEGIN)) { +- int idx, type; +- +- type = kmap_atomic_idx(); +- idx = type + KM_TYPE_NR * smp_processor_id(); +- +-#ifdef CONFIG_DEBUG_HIGHMEM +- WARN_ON_ONCE(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); +-#endif +- /* +- * Force other mappings to Oops if they'll try to access this +- * pte without first remap it. Keeping stale mappings around +- * is a bad idea also, in case the page changes cacheability +- * attributes or becomes a protected page in a hypervisor. +- */ +- kpte_clear_flush(kmap_pte-idx, vaddr); +- kmap_atomic_idx_pop(); +- arch_flush_lazy_mmu_mode(); +- } +-#ifdef CONFIG_DEBUG_HIGHMEM +- else { +- BUG_ON(vaddr < PAGE_OFFSET); +- BUG_ON(vaddr >= (unsigned long)high_memory); +- } +-#endif +-} +-EXPORT_SYMBOL(kunmap_atomic_high); +- + void __init set_highmem_pages_init(void) + { + struct zone *zone; +diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c +index 7c055259d..da31c2635 100644 +--- a/arch/x86/mm/init_32.c ++++ b/arch/x86/mm/init_32.c +@@ -394,19 +394,6 @@ kernel_physical_mapping_init(unsigned long start, + return last_map_addr; + } + +-pte_t *kmap_pte; +- +-static void __init kmap_init(void) +-{ +- unsigned long kmap_vstart; +- +- /* +- * Cache the first kmap pte: +- */ +- kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN); +- kmap_pte = virt_to_kpte(kmap_vstart); +-} +- + #ifdef CONFIG_HIGHMEM + static void __init permanent_kmaps_init(pgd_t *pgd_base) + { +@@ -712,8 +699,6 @@ void __init paging_init(void) + + __flush_tlb_all(); + +- kmap_init(); +- + /* + * NOTE: at this point the bootmem allocator is fully available. + */ +diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c +index f60398aeb..9aaa756dd 100644 +--- a/arch/x86/mm/iomap_32.c ++++ b/arch/x86/mm/iomap_32.c +@@ -44,28 +44,7 @@ void iomap_free(resource_size_t base, unsigned long size) + } + EXPORT_SYMBOL_GPL(iomap_free); + +-void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot) +-{ +- unsigned long vaddr; +- int idx, type; +- +- preempt_disable(); +- pagefault_disable(); +- +- type = kmap_atomic_idx_push(); +- idx = type + KM_TYPE_NR * smp_processor_id(); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +- set_pte(kmap_pte - idx, pfn_pte(pfn, prot)); +- arch_flush_lazy_mmu_mode(); +- +- return (void *)vaddr; +-} +- +-/* +- * Map 'pfn' using protections 'prot' +- */ +-void __iomem * +-iomap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot) ++void __iomem *__iomap_local_pfn_prot(unsigned long pfn, pgprot_t prot) + { + /* + * For non-PAT systems, translate non-WB request to UC- just in +@@ -81,36 +60,6 @@ iomap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot) + /* Filter out unsupported __PAGE_KERNEL* bits: */ + pgprot_val(prot) &= __default_kernel_pte_mask; + +- return (void __force __iomem *) kmap_atomic_prot_pfn(pfn, prot); +-} +-EXPORT_SYMBOL_GPL(iomap_atomic_prot_pfn); +- +-void +-iounmap_atomic(void __iomem *kvaddr) +-{ +- unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; +- +- if (vaddr >= __fix_to_virt(FIX_KMAP_END) && +- vaddr <= __fix_to_virt(FIX_KMAP_BEGIN)) { +- int idx, type; +- +- type = kmap_atomic_idx(); +- idx = type + KM_TYPE_NR * smp_processor_id(); +- +-#ifdef CONFIG_DEBUG_HIGHMEM +- WARN_ON_ONCE(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); +-#endif +- /* +- * Force other mappings to Oops if they'll try to access this +- * pte without first remap it. Keeping stale mappings around +- * is a bad idea also, in case the page changes cacheability +- * attributes or becomes a protected page in a hypervisor. +- */ +- kpte_clear_flush(kmap_pte-idx, vaddr); +- kmap_atomic_idx_pop(); +- } +- +- pagefault_enable(); +- preempt_enable(); ++ return (void __force __iomem *)__kmap_local_pfn_prot(pfn, prot); + } +-EXPORT_SYMBOL_GPL(iounmap_atomic); ++EXPORT_SYMBOL_GPL(__iomap_local_pfn_prot); +diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig +index 87e08ad38..03cbf6b53 100644 +--- a/arch/xtensa/Kconfig ++++ b/arch/xtensa/Kconfig +@@ -666,6 +666,7 @@ endchoice + config HIGHMEM + bool "High Memory Support" + depends on MMU ++ select KMAP_LOCAL + help + Linux can use the full amount of RAM in the system by + default. However, the default MMUv2 setup only maps the +diff --git a/arch/xtensa/include/asm/fixmap.h b/arch/xtensa/include/asm/fixmap.h +index a06ffb0c6..92049b61c 100644 +--- a/arch/xtensa/include/asm/fixmap.h ++++ b/arch/xtensa/include/asm/fixmap.h +@@ -16,7 +16,7 @@ + #ifdef CONFIG_HIGHMEM + #include + #include +-#include ++#include + #endif + + /* +@@ -39,7 +39,7 @@ enum fixed_addresses { + /* reserved pte's for temporary kernel mappings */ + FIX_KMAP_BEGIN, + FIX_KMAP_END = FIX_KMAP_BEGIN + +- (KM_TYPE_NR * NR_CPUS * DCACHE_N_COLORS) - 1, ++ (KM_MAX_IDX * NR_CPUS * DCACHE_N_COLORS) - 1, + #endif + __end_of_fixed_addresses + }; +diff --git a/arch/xtensa/include/asm/highmem.h b/arch/xtensa/include/asm/highmem.h +index eac503215..0fc3b1ceb 100644 +--- a/arch/xtensa/include/asm/highmem.h ++++ b/arch/xtensa/include/asm/highmem.h +@@ -16,9 +16,8 @@ + #include + #include + #include +-#include + +-#define PKMAP_BASE ((FIXADDR_START - \ ++#define PKMAP_BASE ((FIXADDR_START - \ + (LAST_PKMAP + 1) * PAGE_SIZE) & PMD_MASK) + #define LAST_PKMAP (PTRS_PER_PTE * DCACHE_N_COLORS) + #define LAST_PKMAP_MASK (LAST_PKMAP - 1) +@@ -68,6 +67,15 @@ static inline void flush_cache_kmaps(void) + flush_cache_all(); + } + ++enum fixed_addresses kmap_local_map_idx(int type, unsigned long pfn); ++#define arch_kmap_local_map_idx kmap_local_map_idx ++ ++enum fixed_addresses kmap_local_unmap_idx(int type, unsigned long addr); ++#define arch_kmap_local_unmap_idx kmap_local_unmap_idx ++ ++#define arch_kmap_local_post_unmap(vaddr) \ ++ local_flush_tlb_kernel_range(vaddr, vaddr + PAGE_SIZE) ++ + void kmap_init(void); + + #endif +diff --git a/arch/xtensa/include/asm/spinlock_types.h b/arch/xtensa/include/asm/spinlock_types.h +index 64c938925..dc846323b 100644 +--- a/arch/xtensa/include/asm/spinlock_types.h ++++ b/arch/xtensa/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef __ASM_SPINLOCK_TYPES_H + #define __ASM_SPINLOCK_TYPES_H + +-#if !defined(__LINUX_SPINLOCK_TYPES_H) && !defined(__ASM_SPINLOCK_H) +-# error "please don't include this file directly" +-#endif +- + #include + #include + +diff --git a/arch/xtensa/mm/highmem.c b/arch/xtensa/mm/highmem.c +index 673196fe8..0735ca5e8 100644 +--- a/arch/xtensa/mm/highmem.c ++++ b/arch/xtensa/mm/highmem.c +@@ -12,8 +12,6 @@ + #include + #include + +-static pte_t *kmap_pte; +- + #if DCACHE_WAY_SIZE > PAGE_SIZE + unsigned int last_pkmap_nr_arr[DCACHE_N_COLORS]; + wait_queue_head_t pkmap_map_wait_arr[DCACHE_N_COLORS]; +@@ -33,59 +31,25 @@ static inline void kmap_waitqueues_init(void) + + static inline enum fixed_addresses kmap_idx(int type, unsigned long color) + { +- return (type + KM_TYPE_NR * smp_processor_id()) * DCACHE_N_COLORS + ++ return (type + KM_MAX_IDX * smp_processor_id()) * DCACHE_N_COLORS + + color; + } + +-void *kmap_atomic_high_prot(struct page *page, pgprot_t prot) ++enum fixed_addresses kmap_local_map_idx(int type, unsigned long pfn) + { +- enum fixed_addresses idx; +- unsigned long vaddr; +- +- idx = kmap_idx(kmap_atomic_idx_push(), +- DCACHE_ALIAS(page_to_phys(page))); +- vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +-#ifdef CONFIG_DEBUG_HIGHMEM +- BUG_ON(!pte_none(*(kmap_pte + idx))); +-#endif +- set_pte(kmap_pte + idx, mk_pte(page, prot)); +- +- return (void *)vaddr; ++ return kmap_idx(type, DCACHE_ALIAS(pfn << PAGE_SHIFT)); + } +-EXPORT_SYMBOL(kmap_atomic_high_prot); + +-void kunmap_atomic_high(void *kvaddr) ++enum fixed_addresses kmap_local_unmap_idx(int type, unsigned long addr) + { +- if (kvaddr >= (void *)FIXADDR_START && +- kvaddr < (void *)FIXADDR_TOP) { +- int idx = kmap_idx(kmap_atomic_idx(), +- DCACHE_ALIAS((unsigned long)kvaddr)); +- +- /* +- * Force other mappings to Oops if they'll try to access this +- * pte without first remap it. Keeping stale mappings around +- * is a bad idea also, in case the page changes cacheability +- * attributes or becomes a protected page in a hypervisor. +- */ +- pte_clear(&init_mm, kvaddr, kmap_pte + idx); +- local_flush_tlb_kernel_range((unsigned long)kvaddr, +- (unsigned long)kvaddr + PAGE_SIZE); +- +- kmap_atomic_idx_pop(); +- } ++ return kmap_idx(type, DCACHE_ALIAS(addr)); + } +-EXPORT_SYMBOL(kunmap_atomic_high); + + void __init kmap_init(void) + { +- unsigned long kmap_vstart; +- + /* Check if this memory layout is broken because PKMAP overlaps + * page table. + */ + BUILD_BUG_ON(PKMAP_BASE < TLBTEMP_BASE_1 + TLBTEMP_SIZE); +- /* cache the first kmap pte */ +- kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN); +- kmap_pte = virt_to_kpte(kmap_vstart); + kmap_waitqueues_init(); + } +diff --git a/block/blk-mq.c b/block/blk-mq.c +index 1eab99166..dea9f38b4 100644 +--- a/block/blk-mq.c ++++ b/block/blk-mq.c +@@ -44,7 +44,7 @@ + bool mq_unfair_dtag = true; + module_param_named(unfair_dtag, mq_unfair_dtag, bool, 0444); + +-static DEFINE_PER_CPU(struct list_head, blk_cpu_done); ++static DEFINE_PER_CPU(struct llist_head, blk_cpu_done); + + static void blk_mq_poll_stats_start(struct request_queue *q); + static void blk_mq_poll_stats_fn(struct blk_stat_callback *cb); +@@ -650,80 +650,29 @@ void blk_mq_end_request(struct request *rq, blk_status_t error) + } + EXPORT_SYMBOL(blk_mq_end_request); + +-/* +- * Softirq action handler - move entries to local list and loop over them +- * while passing them to the queue registered handler. +- */ +-static __latent_entropy void blk_done_softirq(struct softirq_action *h) ++static void blk_complete_reqs(struct llist_head *list) + { +- struct list_head *cpu_list, local_list; +- +- local_irq_disable(); +- cpu_list = this_cpu_ptr(&blk_cpu_done); +- list_replace_init(cpu_list, &local_list); +- local_irq_enable(); +- +- while (!list_empty(&local_list)) { +- struct request *rq; ++ struct llist_node *entry = llist_reverse_order(llist_del_all(list)); ++ struct request *rq, *next; + +- rq = list_entry(local_list.next, struct request, ipi_list); +- list_del_init(&rq->ipi_list); ++ llist_for_each_entry_safe(rq, next, entry, ipi_list) + rq->q->mq_ops->complete(rq); +- } + } + +-static void blk_mq_trigger_softirq(struct request *rq) ++static __latent_entropy void blk_done_softirq(struct softirq_action *h) + { +- struct list_head *list; +- unsigned long flags; +- +- local_irq_save(flags); +- list = this_cpu_ptr(&blk_cpu_done); +- list_add_tail(&rq->ipi_list, list); +- +- /* +- * If the list only contains our just added request, signal a raise of +- * the softirq. If there are already entries there, someone already +- * raised the irq but it hasn't run yet. +- */ +- if (list->next == &rq->ipi_list) +- raise_softirq_irqoff(BLOCK_SOFTIRQ); +- local_irq_restore(flags); ++ blk_complete_reqs(this_cpu_ptr(&blk_cpu_done)); + } + + static int blk_softirq_cpu_dead(unsigned int cpu) + { +- /* +- * If a CPU goes away, splice its entries to the current CPU +- * and trigger a run of the softirq +- */ +- local_irq_disable(); +- list_splice_init(&per_cpu(blk_cpu_done, cpu), +- this_cpu_ptr(&blk_cpu_done)); +- raise_softirq_irqoff(BLOCK_SOFTIRQ); +- local_irq_enable(); +- ++ blk_complete_reqs(&per_cpu(blk_cpu_done, cpu)); + return 0; + } + +- + static void __blk_mq_complete_request_remote(void *data) + { +- struct request *rq = data; +- +- /* +- * For most of single queue controllers, there is only one irq vector +- * for handling I/O completion, and the only irq's affinity is set +- * to all possible CPUs. On most of ARCHs, this affinity means the irq +- * is handled on one specific CPU. +- * +- * So complete I/O requests in softirq context in case of single queue +- * devices to avoid degrading I/O performance due to irqsoff latency. +- */ +- if (rq->q->nr_hw_queues == 1) +- blk_mq_trigger_softirq(rq); +- else +- rq->q->mq_ops->complete(rq); ++ __raise_softirq_irqoff(BLOCK_SOFTIRQ); + } + + static inline bool blk_mq_complete_need_ipi(struct request *rq) +@@ -733,6 +682,14 @@ static inline bool blk_mq_complete_need_ipi(struct request *rq) + if (!IS_ENABLED(CONFIG_SMP) || + !test_bit(QUEUE_FLAG_SAME_COMP, &rq->q->queue_flags)) + return false; ++ /* ++ * With force threaded interrupts enabled, raising softirq from an SMP ++ * function call will always result in waking the ksoftirqd thread. ++ * This is probably worse than completing the request on a different ++ * cache domain. ++ */ ++ if (force_irqthreads) ++ return false; + + /* same CPU or cache domain? Complete locally */ + if (cpu == rq->mq_ctx->cpu || +@@ -744,6 +701,31 @@ static inline bool blk_mq_complete_need_ipi(struct request *rq) + return cpu_online(rq->mq_ctx->cpu); + } + ++static void blk_mq_complete_send_ipi(struct request *rq) ++{ ++ struct llist_head *list; ++ unsigned int cpu; ++ ++ cpu = rq->mq_ctx->cpu; ++ list = &per_cpu(blk_cpu_done, cpu); ++ if (llist_add(&rq->ipi_list, list)) { ++ rq->csd.func = __blk_mq_complete_request_remote; ++ rq->csd.info = rq; ++ smp_call_function_single_async(cpu, &rq->csd); ++ } ++} ++ ++static void blk_mq_raise_softirq(struct request *rq) ++{ ++ struct llist_head *list; ++ ++ preempt_disable(); ++ list = this_cpu_ptr(&blk_cpu_done); ++ if (llist_add(&rq->ipi_list, list)) ++ raise_softirq(BLOCK_SOFTIRQ); ++ preempt_enable(); ++} ++ + bool blk_mq_complete_request_remote(struct request *rq) + { + WRITE_ONCE(rq->state, MQ_RQ_COMPLETE); +@@ -756,15 +738,15 @@ bool blk_mq_complete_request_remote(struct request *rq) + return false; + + if (blk_mq_complete_need_ipi(rq)) { +- INIT_CSD(&rq->csd, __blk_mq_complete_request_remote, rq); +- smp_call_function_single_async(rq->mq_ctx->cpu, &rq->csd); +- } else { +- if (rq->q->nr_hw_queues > 1) +- return false; +- blk_mq_trigger_softirq(rq); ++ blk_mq_complete_send_ipi(rq); ++ return true; + } + +- return true; ++ if (rq->q->nr_hw_queues == 1) { ++ blk_mq_raise_softirq(rq); ++ return true; ++ } ++ return false; + } + EXPORT_SYMBOL_GPL(blk_mq_complete_request_remote); + +@@ -1679,14 +1661,14 @@ static void __blk_mq_delay_run_hw_queue(struct blk_mq_hw_ctx *hctx, bool async, + return; + + if (!async && !(hctx->flags & BLK_MQ_F_BLOCKING)) { +- int cpu = get_cpu(); ++ int cpu = get_cpu_light(); + if (cpumask_test_cpu(cpu, hctx->cpumask)) { + __blk_mq_run_hw_queue(hctx); +- put_cpu(); ++ put_cpu_light(); + return; + } + +- put_cpu(); ++ put_cpu_light(); + } + + /* +@@ -4215,7 +4197,7 @@ static int __init blk_mq_init(void) + int i; + + for_each_possible_cpu(i) +- INIT_LIST_HEAD(&per_cpu(blk_cpu_done, i)); ++ init_llist_head(&per_cpu(blk_cpu_done, i)); + open_softirq(BLOCK_SOFTIRQ, blk_done_softirq); + + cpuhp_setup_state_nocalls(CPUHP_BLOCK_SOFTIRQ_DEAD, +diff --git a/crypto/cryptd.c b/crypto/cryptd.c +index ca3a40fc7..884647620 100644 +--- a/crypto/cryptd.c ++++ b/crypto/cryptd.c +@@ -36,6 +36,7 @@ static struct workqueue_struct *cryptd_wq; + struct cryptd_cpu_queue { + struct crypto_queue queue; + struct work_struct work; ++ spinlock_t qlock; + }; + + struct cryptd_queue { +@@ -110,6 +111,7 @@ static int cryptd_init_queue(struct cryptd_queue *queue, + cpu_queue = per_cpu_ptr(queue->cpu_queue, cpu); + crypto_init_queue(&cpu_queue->queue, max_cpu_qlen); + INIT_WORK(&cpu_queue->work, cryptd_queue_worker); ++ spin_lock_init(&cpu_queue->qlock); + } + pr_info("cryptd: max_cpu_qlen set to %d\n", max_cpu_qlen); + return 0; +@@ -134,8 +136,10 @@ static int cryptd_enqueue_request(struct cryptd_queue *queue, + struct cryptd_cpu_queue *cpu_queue; + refcount_t *refcnt; + +- local_bh_disable(); +- cpu_queue = this_cpu_ptr(queue->cpu_queue); ++ cpu_queue = raw_cpu_ptr(queue->cpu_queue); ++ spin_lock_bh(&cpu_queue->qlock); ++ // cpu = smp_processor_id(); ++ + err = crypto_enqueue_request(&cpu_queue->queue, request); + + refcnt = crypto_tfm_ctx(request->tfm); +@@ -151,7 +155,7 @@ static int cryptd_enqueue_request(struct cryptd_queue *queue, + refcount_inc(refcnt); + + out: +- local_bh_enable(); ++ spin_unlock_bh(&cpu_queue->qlock); + + return err; + } +@@ -168,10 +172,11 @@ static void cryptd_queue_worker(struct work_struct *work) + /* + * Only handle one request at a time to avoid hogging crypto workqueue. + */ +- local_bh_disable(); ++ spin_lock_bh(&cpu_queue->qlock); + backlog = crypto_get_backlog(&cpu_queue->queue); + req = crypto_dequeue_request(&cpu_queue->queue); +- local_bh_enable(); ++ spin_unlock_bh(&cpu_queue->qlock); ++ + + if (!req) + return; +diff --git a/drivers/atm/eni.c b/drivers/atm/eni.c +index 9fcc49be4..a31ffe16e 100644 +--- a/drivers/atm/eni.c ++++ b/drivers/atm/eni.c +@@ -2056,7 +2056,7 @@ static int eni_send(struct atm_vcc *vcc,struct sk_buff *skb) + } + submitted++; + ATM_SKB(skb)->vcc = vcc; +- tasklet_disable(&ENI_DEV(vcc->dev)->task); ++ tasklet_disable_in_atomic(&ENI_DEV(vcc->dev)->task); + res = do_tx(skb); + tasklet_enable(&ENI_DEV(vcc->dev)->task); + if (res == enq_ok) return 0; +diff --git a/drivers/block/zram/zram_drv.c b/drivers/block/zram/zram_drv.c +index 40df7f994..4821c9427 100644 +--- a/drivers/block/zram/zram_drv.c ++++ b/drivers/block/zram/zram_drv.c +@@ -59,6 +59,40 @@ static void zram_free_page(struct zram *zram, size_t index); + static int zram_bvec_read(struct zram *zram, struct bio_vec *bvec, + u32 index, int offset, struct bio *bio); + ++#ifdef CONFIG_PREEMPT_RT ++static void zram_meta_init_table_locks(struct zram *zram, size_t num_pages) ++{ ++ size_t index; ++ ++ for (index = 0; index < num_pages; index++) ++ spin_lock_init(&zram->table[index].lock); ++} ++ ++static int zram_slot_trylock(struct zram *zram, u32 index) ++{ ++ int ret; ++ ++ ret = spin_trylock(&zram->table[index].lock); ++ if (ret) ++ __set_bit(ZRAM_LOCK, &zram->table[index].flags); ++ return ret; ++} ++ ++static void zram_slot_lock(struct zram *zram, u32 index) ++{ ++ spin_lock(&zram->table[index].lock); ++ __set_bit(ZRAM_LOCK, &zram->table[index].flags); ++} ++ ++static void zram_slot_unlock(struct zram *zram, u32 index) ++{ ++ __clear_bit(ZRAM_LOCK, &zram->table[index].flags); ++ spin_unlock(&zram->table[index].lock); ++} ++ ++#else ++ ++static void zram_meta_init_table_locks(struct zram *zram, size_t num_pages) { } + + static int zram_slot_trylock(struct zram *zram, u32 index) + { +@@ -74,6 +108,7 @@ static void zram_slot_unlock(struct zram *zram, u32 index) + { + bit_spin_unlock(ZRAM_LOCK, &zram->table[index].flags); + } ++#endif + + static inline bool init_done(struct zram *zram) + { +@@ -1165,6 +1200,7 @@ static bool zram_meta_alloc(struct zram *zram, u64 disksize) + + if (!huge_class_size) + huge_class_size = zs_huge_class_size(zram->mem_pool); ++ zram_meta_init_table_locks(zram, num_pages); + return true; + } + +diff --git a/drivers/block/zram/zram_drv.h b/drivers/block/zram/zram_drv.h +index f2fd46daa..7e4dd447e 100644 +--- a/drivers/block/zram/zram_drv.h ++++ b/drivers/block/zram/zram_drv.h +@@ -63,6 +63,7 @@ struct zram_table_entry { + unsigned long element; + }; + unsigned long flags; ++ spinlock_t lock; + #ifdef CONFIG_ZRAM_MEMORY_TRACKING + ktime_t ac_time; + #endif +diff --git a/drivers/char/tpm/tpm-dev-common.c b/drivers/char/tpm/tpm-dev-common.c +index a9e7f5a82..30b4c288c 100644 +--- a/drivers/char/tpm/tpm-dev-common.c ++++ b/drivers/char/tpm/tpm-dev-common.c +@@ -20,7 +20,6 @@ + #include "tpm-dev.h" + + static struct workqueue_struct *tpm_dev_wq; +-static DEFINE_MUTEX(tpm_dev_wq_lock); + + static ssize_t tpm_dev_transmit(struct tpm_chip *chip, struct tpm_space *space, + u8 *buf, size_t bufsiz) +diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c +index 14fad16d3..f9a4ac20f 100644 +--- a/drivers/char/tpm/tpm_tis.c ++++ b/drivers/char/tpm/tpm_tis.c +@@ -50,6 +50,31 @@ static inline struct tpm_tis_tcg_phy *to_tpm_tis_tcg_phy(struct tpm_tis_data *da + return container_of(data, struct tpm_tis_tcg_phy, priv); + } + ++#ifdef CONFIG_PREEMPT_RT ++/* ++ * Flushes previous write operations to chip so that a subsequent ++ * ioread*()s won't stall a cpu. ++ */ ++static inline void tpm_tis_flush(void __iomem *iobase) ++{ ++ ioread8(iobase + TPM_ACCESS(0)); ++} ++#else ++#define tpm_tis_flush(iobase) do { } while (0) ++#endif ++ ++static inline void tpm_tis_iowrite8(u8 b, void __iomem *iobase, u32 addr) ++{ ++ iowrite8(b, iobase + addr); ++ tpm_tis_flush(iobase); ++} ++ ++static inline void tpm_tis_iowrite32(u32 b, void __iomem *iobase, u32 addr) ++{ ++ iowrite32(b, iobase + addr); ++ tpm_tis_flush(iobase); ++} ++ + static int interrupts = -1; + module_param(interrupts, int, 0444); + MODULE_PARM_DESC(interrupts, "Enable interrupts"); +@@ -170,7 +195,7 @@ static int tpm_tcg_write_bytes(struct tpm_tis_data *data, u32 addr, u16 len, + struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data); + + while (len--) +- iowrite8(*value++, phy->iobase + addr); ++ tpm_tis_iowrite8(*value++, phy->iobase, addr); + + return 0; + } +@@ -197,7 +222,7 @@ static int tpm_tcg_write32(struct tpm_tis_data *data, u32 addr, u32 value) + { + struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data); + +- iowrite32(value, phy->iobase + addr); ++ tpm_tis_iowrite32(value, phy->iobase, addr); + + return 0; + } +diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c +index 9811c4095..17c9d8251 100644 +--- a/drivers/firewire/ohci.c ++++ b/drivers/firewire/ohci.c +@@ -2545,7 +2545,7 @@ static int ohci_cancel_packet(struct fw_card *card, struct fw_packet *packet) + struct driver_data *driver_data = packet->driver_data; + int ret = -ENOENT; + +- tasklet_disable(&ctx->tasklet); ++ tasklet_disable_in_atomic(&ctx->tasklet); + + if (packet->ack != 0) + goto out; +@@ -3465,7 +3465,7 @@ static int ohci_flush_iso_completions(struct fw_iso_context *base) + struct iso_context *ctx = container_of(base, struct iso_context, base); + int ret = 0; + +- tasklet_disable(&ctx->context.tasklet); ++ tasklet_disable_in_atomic(&ctx->context.tasklet); + + if (!test_and_set_bit_lock(0, &ctx->flushing_completions)) { + context_tasklet((unsigned long)&ctx->context); +diff --git a/drivers/firmware/efi/efi.c b/drivers/firmware/efi/efi.c +index fa830f7bf..d48577c49 100644 +--- a/drivers/firmware/efi/efi.c ++++ b/drivers/firmware/efi/efi.c +@@ -67,7 +67,7 @@ struct mm_struct efi_mm = { + + struct workqueue_struct *efi_rts_wq; + +-static bool disable_runtime; ++static bool disable_runtime = IS_ENABLED(CONFIG_PREEMPT_RT); + static int __init setup_noefi(char *arg) + { + disable_runtime = true; +@@ -98,6 +98,9 @@ static int __init parse_efi_cmdline(char *str) + if (parse_option_str(str, "noruntime")) + disable_runtime = true; + ++ if (parse_option_str(str, "runtime")) ++ disable_runtime = false; ++ + if (parse_option_str(str, "nosoftreserve")) + set_bit(EFI_MEM_NO_SOFT_RESERVE, &efi.flags); + +diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c +index 12f7128b7..a65061e3e 100644 +--- a/drivers/gpu/drm/i915/display/intel_sprite.c ++++ b/drivers/gpu/drm/i915/display/intel_sprite.c +@@ -118,7 +118,8 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) + "PSR idle timed out 0x%x, atomic update may fail\n", + psr_status); + +- local_irq_disable(); ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) ++ local_irq_disable(); + + crtc->debug.min_vbl = min; + crtc->debug.max_vbl = max; +@@ -143,11 +144,13 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) + break; + } + +- local_irq_enable(); ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) ++ local_irq_enable(); + + timeout = schedule_timeout(timeout); + +- local_irq_disable(); ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) ++ local_irq_disable(); + } + + finish_wait(wq, &wait); +@@ -180,7 +183,8 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) + return; + + irq_disable: +- local_irq_disable(); ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) ++ local_irq_disable(); + } + + /** +@@ -218,7 +222,8 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) + new_crtc_state->uapi.event = NULL; + } + +- local_irq_enable(); ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) ++ local_irq_enable(); + + if (intel_vgpu_active(dev_priv)) + return; +diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +index 0c083af5a..2abf043d3 100644 +--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c ++++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +@@ -1080,7 +1080,7 @@ static void reloc_cache_reset(struct reloc_cache *cache, struct i915_execbuffer + struct i915_ggtt *ggtt = cache_to_ggtt(cache); + + intel_gt_flush_ggtt_writes(ggtt->vm.gt); +- io_mapping_unmap_atomic((void __iomem *)vaddr); ++ io_mapping_unmap_local((void __iomem *)vaddr); + + if (drm_mm_node_allocated(&cache->node)) { + ggtt->vm.clear_range(&ggtt->vm, +@@ -1146,7 +1146,7 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj, + + if (cache->vaddr) { + intel_gt_flush_ggtt_writes(ggtt->vm.gt); +- io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr)); ++ io_mapping_unmap_local((void __force __iomem *) unmask_page(cache->vaddr)); + } else { + struct i915_vma *vma; + int err; +@@ -1194,8 +1194,7 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj, + offset += page << PAGE_SHIFT; + } + +- vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap, +- offset); ++ vaddr = (void __force *)io_mapping_map_local_wc(&ggtt->iomap, offset); + cache->page = page; + cache->vaddr = (unsigned long)vaddr; + +diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c +index 0040b4765..3f4f85478 100644 +--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c ++++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c +@@ -342,10 +342,9 @@ void intel_breadcrumbs_park(struct intel_breadcrumbs *b) + /* Kick the work once more to drain the signalers */ + irq_work_sync(&b->irq_work); + while (unlikely(READ_ONCE(b->irq_armed))) { +- local_irq_disable(); +- signal_irq_work(&b->irq_work); +- local_irq_enable(); ++ irq_work_queue(&b->irq_work); + cond_resched(); ++ irq_work_sync(&b->irq_work); + } + GEM_BUG_ON(!list_empty(&b->signalers)); + } +diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c +index f7b2e07e2..313d8a28e 100644 +--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c ++++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c +@@ -60,9 +60,10 @@ static int __engine_unpark(struct intel_wakeref *wf) + + static inline unsigned long __timeline_mark_lock(struct intel_context *ce) + { +- unsigned long flags; ++ unsigned long flags = 0; + +- local_irq_save(flags); ++ if (!force_irqthreads) ++ local_irq_save(flags); + mutex_acquire(&ce->timeline->mutex.dep_map, 2, 0, _THIS_IP_); + + return flags; +@@ -72,7 +73,8 @@ static inline void __timeline_mark_unlock(struct intel_context *ce, + unsigned long flags) + { + mutex_release(&ce->timeline->mutex.dep_map, _THIS_IP_); +- local_irq_restore(flags); ++ if (!force_irqthreads) ++ local_irq_restore(flags); + } + + #else +diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c +index 58276694c..88944c3b1 100644 +--- a/drivers/gpu/drm/i915/i915_gem.c ++++ b/drivers/gpu/drm/i915/i915_gem.c +@@ -355,22 +355,15 @@ gtt_user_read(struct io_mapping *mapping, + char __user *user_data, int length) + { + void __iomem *vaddr; +- unsigned long unwritten; ++ bool fail = false; + + /* We can use the cpu mem copy function because this is X86. */ +- vaddr = io_mapping_map_atomic_wc(mapping, base); +- unwritten = __copy_to_user_inatomic(user_data, +- (void __force *)vaddr + offset, +- length); +- io_mapping_unmap_atomic(vaddr); +- if (unwritten) { +- vaddr = io_mapping_map_wc(mapping, base, PAGE_SIZE); +- unwritten = copy_to_user(user_data, +- (void __force *)vaddr + offset, +- length); +- io_mapping_unmap(vaddr); +- } +- return unwritten; ++ vaddr = io_mapping_map_local_wc(mapping, base); ++ if (copy_to_user(user_data, (void __force *)vaddr + offset, length)) ++ fail = true; ++ io_mapping_unmap_local(vaddr); ++ ++ return fail; + } + + static int +@@ -539,21 +532,14 @@ ggtt_write(struct io_mapping *mapping, + char __user *user_data, int length) + { + void __iomem *vaddr; +- unsigned long unwritten; ++ bool fail = false; + + /* We can use the cpu mem copy function because this is X86. */ +- vaddr = io_mapping_map_atomic_wc(mapping, base); +- unwritten = __copy_from_user_inatomic_nocache((void __force *)vaddr + offset, +- user_data, length); +- io_mapping_unmap_atomic(vaddr); +- if (unwritten) { +- vaddr = io_mapping_map_wc(mapping, base, PAGE_SIZE); +- unwritten = copy_from_user((void __force *)vaddr + offset, +- user_data, length); +- io_mapping_unmap(vaddr); +- } +- +- return unwritten; ++ vaddr = io_mapping_map_local_wc(mapping, base); ++ if (copy_from_user((void __force *)vaddr + offset, user_data, length)) ++ fail = true; ++ io_mapping_unmap_local(vaddr); ++ return fail; + } + + /** +diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c +index 759f523c6..7339a42ab 100644 +--- a/drivers/gpu/drm/i915/i915_irq.c ++++ b/drivers/gpu/drm/i915/i915_irq.c +@@ -847,6 +847,7 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc, + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); + + /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_disable_rt(); + + /* Get optional system timestamp before query. */ + if (stime) +@@ -898,6 +899,7 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc, + *etime = ktime_get(); + + /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_enable_rt(); + + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); + +diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h +index a4addcc64..396b65986 100644 +--- a/drivers/gpu/drm/i915/i915_trace.h ++++ b/drivers/gpu/drm/i915/i915_trace.h +@@ -2,6 +2,10 @@ + #if !defined(_I915_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) + #define _I915_TRACE_H_ + ++#ifdef CONFIG_PREEMPT_RT ++#define NOTRACE ++#endif ++ + #include + #include + #include +@@ -778,7 +782,7 @@ DEFINE_EVENT(i915_request, i915_request_add, + TP_ARGS(rq) + ); + +-#if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS) ++#if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS) && !defined(NOTRACE) + DEFINE_EVENT(i915_request, i915_request_submit, + TP_PROTO(struct i915_request *rq), + TP_ARGS(rq) +diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c +index 412e21604..432493183 100644 +--- a/drivers/gpu/drm/i915/selftests/i915_gem.c ++++ b/drivers/gpu/drm/i915/selftests/i915_gem.c +@@ -57,12 +57,12 @@ static void trash_stolen(struct drm_i915_private *i915) + + ggtt->vm.insert_page(&ggtt->vm, dma, slot, I915_CACHE_NONE, 0); + +- s = io_mapping_map_atomic_wc(&ggtt->iomap, slot); ++ s = io_mapping_map_local_wc(&ggtt->iomap, slot); + for (x = 0; x < PAGE_SIZE / sizeof(u32); x++) { + prng = next_pseudo_random32(prng); + iowrite32(prng, &s[x]); + } +- io_mapping_unmap_atomic(s); ++ io_mapping_unmap_local(s); + } + + ggtt->vm.clear_range(&ggtt->vm, slot, PAGE_SIZE); +diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +index 65e28c4cd..ca483285f 100644 +--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c ++++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +@@ -1201,9 +1201,9 @@ static int igt_ggtt_page(void *arg) + u64 offset = tmp.start + order[n] * PAGE_SIZE; + u32 __iomem *vaddr; + +- vaddr = io_mapping_map_atomic_wc(&ggtt->iomap, offset); ++ vaddr = io_mapping_map_local_wc(&ggtt->iomap, offset); + iowrite32(n, vaddr + n); +- io_mapping_unmap_atomic(vaddr); ++ io_mapping_unmap_local(vaddr); + } + intel_gt_flush_ggtt_writes(ggtt->vm.gt); + +@@ -1213,9 +1213,9 @@ static int igt_ggtt_page(void *arg) + u32 __iomem *vaddr; + u32 val; + +- vaddr = io_mapping_map_atomic_wc(&ggtt->iomap, offset); ++ vaddr = io_mapping_map_local_wc(&ggtt->iomap, offset); + val = ioread32(vaddr + n); +- io_mapping_unmap_atomic(vaddr); ++ io_mapping_unmap_local(vaddr); + + if (val != n) { + pr_err("insert page failed: found %d, expected %d\n", +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/fbmem.h b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/fbmem.h +index 6c5bbff12..411f91ee2 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/fbmem.h ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/fbmem.h +@@ -60,19 +60,19 @@ fbmem_fini(struct io_mapping *fb) + static inline u32 + fbmem_peek(struct io_mapping *fb, u32 off) + { +- u8 __iomem *p = io_mapping_map_atomic_wc(fb, off & PAGE_MASK); ++ u8 __iomem *p = io_mapping_map_local_wc(fb, off & PAGE_MASK); + u32 val = ioread32(p + (off & ~PAGE_MASK)); +- io_mapping_unmap_atomic(p); ++ io_mapping_unmap_local(p); + return val; + } + + static inline void + fbmem_poke(struct io_mapping *fb, u32 off, u32 val) + { +- u8 __iomem *p = io_mapping_map_atomic_wc(fb, off & PAGE_MASK); ++ u8 __iomem *p = io_mapping_map_local_wc(fb, off & PAGE_MASK); + iowrite32(val, p + (off & ~PAGE_MASK)); + wmb(); +- io_mapping_unmap_atomic(p); ++ io_mapping_unmap_local(p); + } + + static inline bool +diff --git a/drivers/gpu/drm/qxl/qxl_image.c b/drivers/gpu/drm/qxl/qxl_image.c +index 60ab7151b..93f92ccd4 100644 +--- a/drivers/gpu/drm/qxl/qxl_image.c ++++ b/drivers/gpu/drm/qxl/qxl_image.c +@@ -124,12 +124,12 @@ qxl_image_init_helper(struct qxl_device *qdev, + wrong (check the bitmaps are sent correctly + first) */ + +- ptr = qxl_bo_kmap_atomic_page(qdev, chunk_bo, 0); ++ ptr = qxl_bo_kmap_local_page(qdev, chunk_bo, 0); + chunk = ptr; + chunk->data_size = height * chunk_stride; + chunk->prev_chunk = 0; + chunk->next_chunk = 0; +- qxl_bo_kunmap_atomic_page(qdev, chunk_bo, ptr); ++ qxl_bo_kunmap_local_page(qdev, chunk_bo, ptr); + + { + void *k_data, *i_data; +@@ -143,7 +143,7 @@ qxl_image_init_helper(struct qxl_device *qdev, + i_data = (void *)data; + + while (remain > 0) { +- ptr = qxl_bo_kmap_atomic_page(qdev, chunk_bo, page << PAGE_SHIFT); ++ ptr = qxl_bo_kmap_local_page(qdev, chunk_bo, page << PAGE_SHIFT); + + if (page == 0) { + chunk = ptr; +@@ -157,7 +157,7 @@ qxl_image_init_helper(struct qxl_device *qdev, + + memcpy(k_data, i_data, size); + +- qxl_bo_kunmap_atomic_page(qdev, chunk_bo, ptr); ++ qxl_bo_kunmap_local_page(qdev, chunk_bo, ptr); + i_data += size; + remain -= size; + page++; +@@ -175,10 +175,10 @@ qxl_image_init_helper(struct qxl_device *qdev, + page_offset = offset_in_page(out_offset); + size = min((int)(PAGE_SIZE - page_offset), remain); + +- ptr = qxl_bo_kmap_atomic_page(qdev, chunk_bo, page_base); ++ ptr = qxl_bo_kmap_local_page(qdev, chunk_bo, page_base); + k_data = ptr + page_offset; + memcpy(k_data, i_data, size); +- qxl_bo_kunmap_atomic_page(qdev, chunk_bo, ptr); ++ qxl_bo_kunmap_local_page(qdev, chunk_bo, ptr); + remain -= size; + i_data += size; + out_offset += size; +@@ -189,7 +189,7 @@ qxl_image_init_helper(struct qxl_device *qdev, + qxl_bo_kunmap(chunk_bo); + + image_bo = dimage->bo; +- ptr = qxl_bo_kmap_atomic_page(qdev, image_bo, 0); ++ ptr = qxl_bo_kmap_local_page(qdev, image_bo, 0); + image = ptr; + + image->descriptor.id = 0; +@@ -212,7 +212,7 @@ qxl_image_init_helper(struct qxl_device *qdev, + break; + default: + DRM_ERROR("unsupported image bit depth\n"); +- qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr); ++ qxl_bo_kunmap_local_page(qdev, image_bo, ptr); + return -EINVAL; + } + image->u.bitmap.flags = QXL_BITMAP_TOP_DOWN; +@@ -222,7 +222,7 @@ qxl_image_init_helper(struct qxl_device *qdev, + image->u.bitmap.palette = 0; + image->u.bitmap.data = qxl_bo_physical_address(qdev, chunk_bo, 0); + +- qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr); ++ qxl_bo_kunmap_local_page(qdev, image_bo, ptr); + + return 0; + } +diff --git a/drivers/gpu/drm/qxl/qxl_ioctl.c b/drivers/gpu/drm/qxl/qxl_ioctl.c +index 5cea6eea7..785023081 100644 +--- a/drivers/gpu/drm/qxl/qxl_ioctl.c ++++ b/drivers/gpu/drm/qxl/qxl_ioctl.c +@@ -89,11 +89,11 @@ apply_reloc(struct qxl_device *qdev, struct qxl_reloc_info *info) + { + void *reloc_page; + +- reloc_page = qxl_bo_kmap_atomic_page(qdev, info->dst_bo, info->dst_offset & PAGE_MASK); ++ reloc_page = qxl_bo_kmap_local_page(qdev, info->dst_bo, info->dst_offset & PAGE_MASK); + *(uint64_t *)(reloc_page + (info->dst_offset & ~PAGE_MASK)) = qxl_bo_physical_address(qdev, + info->src_bo, + info->src_offset); +- qxl_bo_kunmap_atomic_page(qdev, info->dst_bo, reloc_page); ++ qxl_bo_kunmap_local_page(qdev, info->dst_bo, reloc_page); + } + + static void +@@ -105,9 +105,9 @@ apply_surf_reloc(struct qxl_device *qdev, struct qxl_reloc_info *info) + if (info->src_bo && !info->src_bo->is_primary) + id = info->src_bo->surface_id; + +- reloc_page = qxl_bo_kmap_atomic_page(qdev, info->dst_bo, info->dst_offset & PAGE_MASK); ++ reloc_page = qxl_bo_kmap_local_page(qdev, info->dst_bo, info->dst_offset & PAGE_MASK); + *(uint32_t *)(reloc_page + (info->dst_offset & ~PAGE_MASK)) = id; +- qxl_bo_kunmap_atomic_page(qdev, info->dst_bo, reloc_page); ++ qxl_bo_kunmap_local_page(qdev, info->dst_bo, reloc_page); + } + + /* return holding the reference to this object */ +@@ -149,7 +149,6 @@ static int qxl_process_single_command(struct qxl_device *qdev, + struct qxl_bo *cmd_bo; + void *fb_cmd; + int i, ret, num_relocs; +- int unwritten; + + switch (cmd->type) { + case QXL_CMD_DRAW: +@@ -185,21 +184,21 @@ static int qxl_process_single_command(struct qxl_device *qdev, + goto out_free_reloc; + + /* TODO copy slow path code from i915 */ +- fb_cmd = qxl_bo_kmap_atomic_page(qdev, cmd_bo, (release->release_offset & PAGE_MASK)); +- unwritten = __copy_from_user_inatomic_nocache +- (fb_cmd + sizeof(union qxl_release_info) + (release->release_offset & ~PAGE_MASK), +- u64_to_user_ptr(cmd->command), cmd->command_size); ++ fb_cmd = qxl_bo_kmap_local_page(qdev, cmd_bo, (release->release_offset & PAGE_MASK)); + +- { ++ if (copy_from_user(fb_cmd + sizeof(union qxl_release_info) + ++ (release->release_offset & ~PAGE_MASK), ++ u64_to_user_ptr(cmd->command), cmd->command_size)) { ++ ret = -EFAULT; ++ } else { + struct qxl_drawable *draw = fb_cmd; + + draw->mm_time = qdev->rom->mm_clock; + } + +- qxl_bo_kunmap_atomic_page(qdev, cmd_bo, fb_cmd); +- if (unwritten) { +- DRM_ERROR("got unwritten %d\n", unwritten); +- ret = -EFAULT; ++ qxl_bo_kunmap_local_page(qdev, cmd_bo, fb_cmd); ++ if (ret) { ++ DRM_ERROR("copy from user failed %d\n", ret); + goto out_free_release; + } + +diff --git a/drivers/gpu/drm/qxl/qxl_object.c b/drivers/gpu/drm/qxl/qxl_object.c +index 544a9e4df..5ee5171d4 100644 +--- a/drivers/gpu/drm/qxl/qxl_object.c ++++ b/drivers/gpu/drm/qxl/qxl_object.c +@@ -173,8 +173,8 @@ int qxl_bo_kmap(struct qxl_bo *bo, void **ptr) + return 0; + } + +-void *qxl_bo_kmap_atomic_page(struct qxl_device *qdev, +- struct qxl_bo *bo, int page_offset) ++void *qxl_bo_kmap_local_page(struct qxl_device *qdev, ++ struct qxl_bo *bo, int page_offset) + { + unsigned long offset; + void *rptr; +@@ -189,7 +189,7 @@ void *qxl_bo_kmap_atomic_page(struct qxl_device *qdev, + goto fallback; + + offset = bo->tbo.mem.start << PAGE_SHIFT; +- return io_mapping_map_atomic_wc(map, offset + page_offset); ++ return io_mapping_map_local_wc(map, offset + page_offset); + fallback: + if (bo->kptr) { + rptr = bo->kptr + (page_offset * PAGE_SIZE); +@@ -215,14 +215,14 @@ void qxl_bo_kunmap(struct qxl_bo *bo) + ttm_bo_kunmap(&bo->kmap); + } + +-void qxl_bo_kunmap_atomic_page(struct qxl_device *qdev, +- struct qxl_bo *bo, void *pmap) ++void qxl_bo_kunmap_local_page(struct qxl_device *qdev, ++ struct qxl_bo *bo, void *pmap) + { + if ((bo->tbo.mem.mem_type != TTM_PL_VRAM) && + (bo->tbo.mem.mem_type != TTM_PL_PRIV)) + goto fallback; + +- io_mapping_unmap_atomic(pmap); ++ io_mapping_unmap_local(pmap); + return; + fallback: + qxl_bo_kunmap(bo); +diff --git a/drivers/gpu/drm/qxl/qxl_object.h b/drivers/gpu/drm/qxl/qxl_object.h +index 5762ea40d..6ae89b1b3 100644 +--- a/drivers/gpu/drm/qxl/qxl_object.h ++++ b/drivers/gpu/drm/qxl/qxl_object.h +@@ -89,8 +89,8 @@ extern int qxl_bo_create(struct qxl_device *qdev, + struct qxl_bo **bo_ptr); + extern int qxl_bo_kmap(struct qxl_bo *bo, void **ptr); + extern void qxl_bo_kunmap(struct qxl_bo *bo); +-void *qxl_bo_kmap_atomic_page(struct qxl_device *qdev, struct qxl_bo *bo, int page_offset); +-void qxl_bo_kunmap_atomic_page(struct qxl_device *qdev, struct qxl_bo *bo, void *map); ++void *qxl_bo_kmap_local_page(struct qxl_device *qdev, struct qxl_bo *bo, int page_offset); ++void qxl_bo_kunmap_local_page(struct qxl_device *qdev, struct qxl_bo *bo, void *map); + extern struct qxl_bo *qxl_bo_ref(struct qxl_bo *bo); + extern void qxl_bo_unref(struct qxl_bo **bo); + extern int qxl_bo_pin(struct qxl_bo *bo); +diff --git a/drivers/gpu/drm/qxl/qxl_release.c b/drivers/gpu/drm/qxl/qxl_release.c +index b2a475a0c..b665a33b4 100644 +--- a/drivers/gpu/drm/qxl/qxl_release.c ++++ b/drivers/gpu/drm/qxl/qxl_release.c +@@ -414,7 +414,7 @@ union qxl_release_info *qxl_release_map(struct qxl_device *qdev, + union qxl_release_info *info; + struct qxl_bo *bo = release->release_bo; + +- ptr = qxl_bo_kmap_atomic_page(qdev, bo, release->release_offset & PAGE_MASK); ++ ptr = qxl_bo_kmap_local_page(qdev, bo, release->release_offset & PAGE_MASK); + if (!ptr) + return NULL; + info = ptr + (release->release_offset & ~PAGE_MASK); +@@ -429,7 +429,7 @@ void qxl_release_unmap(struct qxl_device *qdev, + void *ptr; + + ptr = ((void *)info) - (release->release_offset & ~PAGE_MASK); +- qxl_bo_kunmap_atomic_page(qdev, bo, ptr); ++ qxl_bo_kunmap_local_page(qdev, bo, ptr); + } + + void qxl_release_fence_buffer_objects(struct qxl_release *release) +diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c +index 07d23a1e6..add8e6044 100644 +--- a/drivers/gpu/drm/radeon/radeon_display.c ++++ b/drivers/gpu/drm/radeon/radeon_display.c +@@ -1828,6 +1828,7 @@ int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, + struct radeon_device *rdev = dev->dev_private; + + /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_disable_rt(); + + /* Get optional system timestamp before query. */ + if (stime) +@@ -1920,6 +1921,7 @@ int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, + *etime = ktime_get(); + + /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_enable_rt(); + + /* Decode into vertical and horizontal scanout position. */ + *vpos = position & 0x1fff; +diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c +index 20a5434c6..17b2df35e 100644 +--- a/drivers/gpu/drm/ttm/ttm_bo_util.c ++++ b/drivers/gpu/drm/ttm/ttm_bo_util.c +@@ -181,13 +181,15 @@ static int ttm_copy_io_ttm_page(struct ttm_tt *ttm, void *src, + return -ENOMEM; + + src = (void *)((unsigned long)src + (page << PAGE_SHIFT)); +- dst = kmap_atomic_prot(d, prot); +- if (!dst) +- return -ENOMEM; ++ /* ++ * Ensure that a highmem page is mapped with the correct ++ * pgprot. For non highmem the mapping is already there. ++ */ ++ dst = kmap_local_page_prot(d, prot); + + memcpy_fromio(dst, src, PAGE_SIZE); + +- kunmap_atomic(dst); ++ kunmap_local(dst); + + return 0; + } +@@ -203,13 +205,15 @@ static int ttm_copy_ttm_io_page(struct ttm_tt *ttm, void *dst, + return -ENOMEM; + + dst = (void *)((unsigned long)dst + (page << PAGE_SHIFT)); +- src = kmap_atomic_prot(s, prot); +- if (!src) +- return -ENOMEM; ++ /* ++ * Ensure that a highmem page is mapped with the correct ++ * pgprot. For non highmem the mapping is already there. ++ */ ++ src = kmap_local_page_prot(s, prot); + + memcpy_toio(dst, src, PAGE_SIZE); + +- kunmap_atomic(src); ++ kunmap_local(src); + + return 0; + } +diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_blit.c b/drivers/gpu/drm/vmwgfx/vmwgfx_blit.c +index e8d66182c..71dba228f 100644 +--- a/drivers/gpu/drm/vmwgfx/vmwgfx_blit.c ++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_blit.c +@@ -375,12 +375,12 @@ static int vmw_bo_cpu_blit_line(struct vmw_bo_blit_line_data *d, + copy_size = min_t(u32, copy_size, PAGE_SIZE - src_page_offset); + + if (unmap_src) { +- kunmap_atomic(d->src_addr); ++ kunmap_local(d->src_addr); + d->src_addr = NULL; + } + + if (unmap_dst) { +- kunmap_atomic(d->dst_addr); ++ kunmap_local(d->dst_addr); + d->dst_addr = NULL; + } + +@@ -388,12 +388,8 @@ static int vmw_bo_cpu_blit_line(struct vmw_bo_blit_line_data *d, + if (WARN_ON_ONCE(dst_page >= d->dst_num_pages)) + return -EINVAL; + +- d->dst_addr = +- kmap_atomic_prot(d->dst_pages[dst_page], +- d->dst_prot); +- if (!d->dst_addr) +- return -ENOMEM; +- ++ d->dst_addr = kmap_local_page_prot(d->dst_pages[dst_page], ++ d->dst_prot); + d->mapped_dst = dst_page; + } + +@@ -401,12 +397,8 @@ static int vmw_bo_cpu_blit_line(struct vmw_bo_blit_line_data *d, + if (WARN_ON_ONCE(src_page >= d->src_num_pages)) + return -EINVAL; + +- d->src_addr = +- kmap_atomic_prot(d->src_pages[src_page], +- d->src_prot); +- if (!d->src_addr) +- return -ENOMEM; +- ++ d->src_addr = kmap_local_page_prot(d->src_pages[src_page], ++ d->src_prot); + d->mapped_src = src_page; + } + diff->do_cpy(diff, d->dst_addr + dst_page_offset, +@@ -436,8 +428,10 @@ static int vmw_bo_cpu_blit_line(struct vmw_bo_blit_line_data *d, + * + * Performs a CPU blit from one buffer object to another avoiding a full + * bo vmap which may exhaust- or fragment vmalloc space. +- * On supported architectures (x86), we're using kmap_atomic which avoids +- * cross-processor TLB- and cache flushes and may, on non-HIGHMEM systems ++ * ++ * On supported architectures (x86), we're using kmap_local_prot() which ++ * avoids cross-processor TLB- and cache flushes. kmap_local_prot() will ++ * either map a highmem page with the proper pgprot on HIGHMEM=y systems or + * reference already set-up mappings. + * + * Neither of the buffer objects may be placed in PCI memory +@@ -500,9 +494,9 @@ int vmw_bo_cpu_blit(struct ttm_buffer_object *dst, + } + out: + if (d.src_addr) +- kunmap_atomic(d.src_addr); ++ kunmap_local(d.src_addr); + if (d.dst_addr) +- kunmap_atomic(d.dst_addr); ++ kunmap_local(d.dst_addr); + + return ret; + } +diff --git a/drivers/hv/hyperv_vmbus.h b/drivers/hv/hyperv_vmbus.h +index 7845fa5de..043e058bb 100644 +--- a/drivers/hv/hyperv_vmbus.h ++++ b/drivers/hv/hyperv_vmbus.h +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + + #include "hv_trace.h" + +diff --git a/drivers/hv/vmbus_drv.c b/drivers/hv/vmbus_drv.c +index e99400f3a..396ec97f1 100644 +--- a/drivers/hv/vmbus_drv.c ++++ b/drivers/hv/vmbus_drv.c +@@ -22,6 +22,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -1307,6 +1308,8 @@ static void vmbus_isr(void) + void *page_addr = hv_cpu->synic_event_page; + struct hv_message *msg; + union hv_synic_event_flags *event; ++ struct pt_regs *regs = get_irq_regs(); ++ u64 ip = regs ? instruction_pointer(regs) : 0; + bool handled = false; + + if (unlikely(page_addr == NULL)) +@@ -1359,7 +1362,8 @@ static void vmbus_isr(void) + * buffer and call into Hyper-V to transfer the data. + */ + static void hv_kmsg_dump(struct kmsg_dumper *dumper, +- enum kmsg_dump_reason reason) ++ enum kmsg_dump_reason reason, ++ struct kmsg_dumper_iter *iter) + { + size_t bytes_written; + phys_addr_t panic_pa; +@@ -1374,7 +1378,7 @@ static void hv_kmsg_dump(struct kmsg_dumper *dumper, + * Write dump contents to the page. No need to synchronize; panic should + * be single-threaded. + */ +- kmsg_dump_get_buffer(dumper, false, hv_panic_page, HV_HYP_PAGE_SIZE, ++ kmsg_dump_get_buffer(iter, false, hv_panic_page, HV_HYP_PAGE_SIZE, + &bytes_written); + if (bytes_written) + hyperv_report_panic_msg(panic_pa, bytes_written); +diff --git a/drivers/leds/trigger/Kconfig b/drivers/leds/trigger/Kconfig +index ce9429ca6..29ccbd6ac 100644 +--- a/drivers/leds/trigger/Kconfig ++++ b/drivers/leds/trigger/Kconfig +@@ -64,6 +64,7 @@ config LEDS_TRIGGER_BACKLIGHT + + config LEDS_TRIGGER_CPU + bool "LED CPU Trigger" ++ depends on !PREEMPT_RT + help + This allows LEDs to be controlled by active CPUs. This shows + the active CPUs across an array of LEDs so you can see which +diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c +index 5af25898b..c40e960cd 100644 +--- a/drivers/md/raid5.c ++++ b/drivers/md/raid5.c +@@ -2218,8 +2218,9 @@ static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request) + struct raid5_percpu *percpu; + unsigned long cpu; + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + percpu = per_cpu_ptr(conf->percpu, cpu); ++ spin_lock(&percpu->lock); + if (test_bit(STRIPE_OP_BIOFILL, &ops_request)) { + ops_run_biofill(sh); + overlap_clear++; +@@ -2278,7 +2279,8 @@ static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request) + if (test_and_clear_bit(R5_Overlap, &dev->flags)) + wake_up(&sh->raid_conf->wait_for_overlap); + } +- put_cpu(); ++ spin_unlock(&percpu->lock); ++ put_cpu_light(); + } + + static void free_stripe(struct kmem_cache *sc, struct stripe_head *sh) +@@ -7100,6 +7102,7 @@ static int raid456_cpu_up_prepare(unsigned int cpu, struct hlist_node *node) + __func__, cpu); + return -ENOMEM; + } ++ spin_lock_init(&per_cpu_ptr(conf->percpu, cpu)->lock); + return 0; + } + +diff --git a/drivers/md/raid5.h b/drivers/md/raid5.h +index 5c05acf20..665fe138a 100644 +--- a/drivers/md/raid5.h ++++ b/drivers/md/raid5.h +@@ -635,6 +635,7 @@ struct r5conf { + int recovery_disabled; + /* per cpu variables */ + struct raid5_percpu { ++ spinlock_t lock; /* Protection for -RT */ + struct page *spare_page; /* Used when checking P/Q in raid6 */ + void *scribble; /* space for constructing buffer + * lists and performing address +diff --git a/drivers/mtd/mtdoops.c b/drivers/mtd/mtdoops.c +index 774970bfc..6bc2c728a 100644 +--- a/drivers/mtd/mtdoops.c ++++ b/drivers/mtd/mtdoops.c +@@ -267,7 +267,8 @@ static void find_next_position(struct mtdoops_context *cxt) + } + + static void mtdoops_do_dump(struct kmsg_dumper *dumper, +- enum kmsg_dump_reason reason) ++ enum kmsg_dump_reason reason, ++ struct kmsg_dumper_iter *iter) + { + struct mtdoops_context *cxt = container_of(dumper, + struct mtdoops_context, dump); +@@ -276,7 +277,7 @@ static void mtdoops_do_dump(struct kmsg_dumper *dumper, + if (reason == KMSG_DUMP_OOPS && !dump_oops) + return; + +- kmsg_dump_get_buffer(dumper, true, cxt->oops_buf + MTDOOPS_HEADER_SIZE, ++ kmsg_dump_get_buffer(iter, true, cxt->oops_buf + MTDOOPS_HEADER_SIZE, + record_size - MTDOOPS_HEADER_SIZE, NULL); + + if (reason != KMSG_DUMP_OOPS) { +diff --git a/drivers/net/ethernet/chelsio/cxgb/common.h b/drivers/net/ethernet/chelsio/cxgb/common.h +index 647506064..0321be773 100644 +--- a/drivers/net/ethernet/chelsio/cxgb/common.h ++++ b/drivers/net/ethernet/chelsio/cxgb/common.h +@@ -238,7 +238,6 @@ struct adapter { + int msg_enable; + u32 mmio_len; + +- struct work_struct ext_intr_handler_task; + struct adapter_params params; + + /* Terminator modules. */ +@@ -257,6 +256,7 @@ struct adapter { + + /* guards async operations */ + spinlock_t async_lock ____cacheline_aligned; ++ u32 pending_thread_intr; + u32 slow_intr_mask; + int t1powersave; + }; +@@ -334,8 +334,7 @@ void t1_interrupts_enable(adapter_t *adapter); + void t1_interrupts_disable(adapter_t *adapter); + void t1_interrupts_clear(adapter_t *adapter); + int t1_elmer0_ext_intr_handler(adapter_t *adapter); +-void t1_elmer0_ext_intr(adapter_t *adapter); +-int t1_slow_intr_handler(adapter_t *adapter); ++irqreturn_t t1_slow_intr_handler(adapter_t *adapter); + + int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc); + const struct board_info *t1_get_board_info(unsigned int board_id); +@@ -347,7 +346,6 @@ int t1_get_board_rev(adapter_t *adapter, const struct board_info *bi, + int t1_init_hw_modules(adapter_t *adapter); + int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi); + void t1_free_sw_modules(adapter_t *adapter); +-void t1_fatal_err(adapter_t *adapter); + void t1_link_changed(adapter_t *adapter, int port_id); + void t1_link_negotiated(adapter_t *adapter, int port_id, int link_stat, + int speed, int duplex, int pause); +diff --git a/drivers/net/ethernet/chelsio/cxgb/cxgb2.c b/drivers/net/ethernet/chelsio/cxgb/cxgb2.c +index 1311eac9e..c827273c4 100644 +--- a/drivers/net/ethernet/chelsio/cxgb/cxgb2.c ++++ b/drivers/net/ethernet/chelsio/cxgb/cxgb2.c +@@ -211,9 +211,10 @@ static int cxgb_up(struct adapter *adapter) + t1_interrupts_clear(adapter); + + adapter->params.has_msi = !disable_msi && !pci_enable_msi(adapter->pdev); +- err = request_irq(adapter->pdev->irq, t1_interrupt, +- adapter->params.has_msi ? 0 : IRQF_SHARED, +- adapter->name, adapter); ++ err = request_threaded_irq(adapter->pdev->irq, t1_interrupt, ++ t1_interrupt_thread, ++ adapter->params.has_msi ? 0 : IRQF_SHARED, ++ adapter->name, adapter); + if (err) { + if (adapter->params.has_msi) + pci_disable_msi(adapter->pdev); +@@ -924,51 +925,6 @@ static void mac_stats_task(struct work_struct *work) + spin_unlock(&adapter->work_lock); + } + +-/* +- * Processes elmer0 external interrupts in process context. +- */ +-static void ext_intr_task(struct work_struct *work) +-{ +- struct adapter *adapter = +- container_of(work, struct adapter, ext_intr_handler_task); +- +- t1_elmer0_ext_intr_handler(adapter); +- +- /* Now reenable external interrupts */ +- spin_lock_irq(&adapter->async_lock); +- adapter->slow_intr_mask |= F_PL_INTR_EXT; +- writel(F_PL_INTR_EXT, adapter->regs + A_PL_CAUSE); +- writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA, +- adapter->regs + A_PL_ENABLE); +- spin_unlock_irq(&adapter->async_lock); +-} +- +-/* +- * Interrupt-context handler for elmer0 external interrupts. +- */ +-void t1_elmer0_ext_intr(struct adapter *adapter) +-{ +- /* +- * Schedule a task to handle external interrupts as we require +- * a process context. We disable EXT interrupts in the interim +- * and let the task reenable them when it's done. +- */ +- adapter->slow_intr_mask &= ~F_PL_INTR_EXT; +- writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA, +- adapter->regs + A_PL_ENABLE); +- schedule_work(&adapter->ext_intr_handler_task); +-} +- +-void t1_fatal_err(struct adapter *adapter) +-{ +- if (adapter->flags & FULL_INIT_DONE) { +- t1_sge_stop(adapter->sge); +- t1_interrupts_disable(adapter); +- } +- pr_alert("%s: encountered fatal error, operation suspended\n", +- adapter->name); +-} +- + static const struct net_device_ops cxgb_netdev_ops = { + .ndo_open = cxgb_open, + .ndo_stop = cxgb_close, +@@ -1070,8 +1026,6 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent) + spin_lock_init(&adapter->async_lock); + spin_lock_init(&adapter->mac_lock); + +- INIT_WORK(&adapter->ext_intr_handler_task, +- ext_intr_task); + INIT_DELAYED_WORK(&adapter->stats_update_task, + mac_stats_task); + +diff --git a/drivers/net/ethernet/chelsio/cxgb/sge.c b/drivers/net/ethernet/chelsio/cxgb/sge.c +index 2d9c2b5a6..cda01f22c 100644 +--- a/drivers/net/ethernet/chelsio/cxgb/sge.c ++++ b/drivers/net/ethernet/chelsio/cxgb/sge.c +@@ -940,10 +940,11 @@ void t1_sge_intr_clear(struct sge *sge) + /* + * SGE 'Error' interrupt handler + */ +-int t1_sge_intr_error_handler(struct sge *sge) ++bool t1_sge_intr_error_handler(struct sge *sge) + { + struct adapter *adapter = sge->adapter; + u32 cause = readl(adapter->regs + A_SG_INT_CAUSE); ++ bool wake = false; + + if (adapter->port[0].dev->hw_features & NETIF_F_TSO) + cause &= ~F_PACKET_TOO_BIG; +@@ -967,11 +968,14 @@ int t1_sge_intr_error_handler(struct sge *sge) + sge->stats.pkt_mismatch++; + pr_alert("%s: SGE packet mismatch\n", adapter->name); + } +- if (cause & SGE_INT_FATAL) +- t1_fatal_err(adapter); ++ if (cause & SGE_INT_FATAL) { ++ t1_interrupts_disable(adapter); ++ adapter->pending_thread_intr |= F_PL_INTR_SGE_ERR; ++ wake = true; ++ } + + writel(cause, adapter->regs + A_SG_INT_CAUSE); +- return 0; ++ return wake; + } + + const struct sge_intr_counts *t1_sge_get_intr_counts(const struct sge *sge) +@@ -1619,11 +1623,46 @@ int t1_poll(struct napi_struct *napi, int budget) + return work_done; + } + ++irqreturn_t t1_interrupt_thread(int irq, void *data) ++{ ++ struct adapter *adapter = data; ++ u32 pending_thread_intr; ++ ++ spin_lock_irq(&adapter->async_lock); ++ pending_thread_intr = adapter->pending_thread_intr; ++ adapter->pending_thread_intr = 0; ++ spin_unlock_irq(&adapter->async_lock); ++ ++ if (!pending_thread_intr) ++ return IRQ_NONE; ++ ++ if (pending_thread_intr & F_PL_INTR_EXT) ++ t1_elmer0_ext_intr_handler(adapter); ++ ++ /* This error is fatal, interrupts remain off */ ++ if (pending_thread_intr & F_PL_INTR_SGE_ERR) { ++ pr_alert("%s: encountered fatal error, operation suspended\n", ++ adapter->name); ++ t1_sge_stop(adapter->sge); ++ return IRQ_HANDLED; ++ } ++ ++ spin_lock_irq(&adapter->async_lock); ++ adapter->slow_intr_mask |= F_PL_INTR_EXT; ++ ++ writel(F_PL_INTR_EXT, adapter->regs + A_PL_CAUSE); ++ writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA, ++ adapter->regs + A_PL_ENABLE); ++ spin_unlock_irq(&adapter->async_lock); ++ ++ return IRQ_HANDLED; ++} ++ + irqreturn_t t1_interrupt(int irq, void *data) + { + struct adapter *adapter = data; + struct sge *sge = adapter->sge; +- int handled; ++ irqreturn_t handled; + + if (likely(responses_pending(adapter))) { + writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE); +@@ -1645,10 +1684,10 @@ irqreturn_t t1_interrupt(int irq, void *data) + handled = t1_slow_intr_handler(adapter); + spin_unlock(&adapter->async_lock); + +- if (!handled) ++ if (handled == IRQ_NONE) + sge->stats.unhandled_irqs++; + +- return IRQ_RETVAL(handled != 0); ++ return handled; + } + + /* +diff --git a/drivers/net/ethernet/chelsio/cxgb/sge.h b/drivers/net/ethernet/chelsio/cxgb/sge.h +index a1ba591b3..716705b96 100644 +--- a/drivers/net/ethernet/chelsio/cxgb/sge.h ++++ b/drivers/net/ethernet/chelsio/cxgb/sge.h +@@ -74,6 +74,7 @@ struct sge *t1_sge_create(struct adapter *, struct sge_params *); + int t1_sge_configure(struct sge *, struct sge_params *); + int t1_sge_set_coalesce_params(struct sge *, struct sge_params *); + void t1_sge_destroy(struct sge *); ++irqreturn_t t1_interrupt_thread(int irq, void *data); + irqreturn_t t1_interrupt(int irq, void *cookie); + int t1_poll(struct napi_struct *, int); + +@@ -81,7 +82,7 @@ netdev_tx_t t1_start_xmit(struct sk_buff *skb, struct net_device *dev); + void t1_vlan_mode(struct adapter *adapter, netdev_features_t features); + void t1_sge_start(struct sge *); + void t1_sge_stop(struct sge *); +-int t1_sge_intr_error_handler(struct sge *); ++bool t1_sge_intr_error_handler(struct sge *sge); + void t1_sge_intr_enable(struct sge *); + void t1_sge_intr_disable(struct sge *); + void t1_sge_intr_clear(struct sge *); +diff --git a/drivers/net/ethernet/chelsio/cxgb/subr.c b/drivers/net/ethernet/chelsio/cxgb/subr.c +index ea0f8741d..310add28f 100644 +--- a/drivers/net/ethernet/chelsio/cxgb/subr.c ++++ b/drivers/net/ethernet/chelsio/cxgb/subr.c +@@ -170,7 +170,7 @@ void t1_link_changed(adapter_t *adapter, int port_id) + t1_link_negotiated(adapter, port_id, link_ok, speed, duplex, fc); + } + +-static int t1_pci_intr_handler(adapter_t *adapter) ++static bool t1_pci_intr_handler(adapter_t *adapter) + { + u32 pcix_cause; + +@@ -179,9 +179,13 @@ static int t1_pci_intr_handler(adapter_t *adapter) + if (pcix_cause) { + pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE, + pcix_cause); +- t1_fatal_err(adapter); /* PCI errors are fatal */ ++ /* PCI errors are fatal */ ++ t1_interrupts_disable(adapter); ++ adapter->pending_thread_intr |= F_PL_INTR_SGE_ERR; ++ pr_alert("%s: PCI error encountered.\n", adapter->name); ++ return true; + } +- return 0; ++ return false; + } + + #ifdef CONFIG_CHELSIO_T1_1G +@@ -210,13 +214,16 @@ static int fpga_phy_intr_handler(adapter_t *adapter) + /* + * Slow path interrupt handler for FPGAs. + */ +-static int fpga_slow_intr(adapter_t *adapter) ++static irqreturn_t fpga_slow_intr(adapter_t *adapter) + { + u32 cause = readl(adapter->regs + A_PL_CAUSE); ++ irqreturn_t ret = IRQ_NONE; + + cause &= ~F_PL_INTR_SGE_DATA; +- if (cause & F_PL_INTR_SGE_ERR) +- t1_sge_intr_error_handler(adapter->sge); ++ if (cause & F_PL_INTR_SGE_ERR) { ++ if (t1_sge_intr_error_handler(adapter->sge)) ++ ret = IRQ_WAKE_THREAD; ++ } + + if (cause & FPGA_PCIX_INTERRUPT_GMAC) + fpga_phy_intr_handler(adapter); +@@ -231,14 +238,19 @@ static int fpga_slow_intr(adapter_t *adapter) + /* Clear TP interrupt */ + writel(tp_cause, adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE); + } +- if (cause & FPGA_PCIX_INTERRUPT_PCIX) +- t1_pci_intr_handler(adapter); ++ if (cause & FPGA_PCIX_INTERRUPT_PCIX) { ++ if (t1_pci_intr_handler(adapter)) ++ ret = IRQ_WAKE_THREAD; ++ } + + /* Clear the interrupts just processed. */ + if (cause) + writel(cause, adapter->regs + A_PL_CAUSE); + +- return cause != 0; ++ if (ret != IRQ_NONE) ++ return ret; ++ ++ return cause == 0 ? IRQ_NONE : IRQ_HANDLED; + } + #endif + +@@ -842,31 +854,45 @@ void t1_interrupts_clear(adapter_t* adapter) + /* + * Slow path interrupt handler for ASICs. + */ +-static int asic_slow_intr(adapter_t *adapter) ++static irqreturn_t asic_slow_intr(adapter_t *adapter) + { + u32 cause = readl(adapter->regs + A_PL_CAUSE); ++ irqreturn_t ret = IRQ_HANDLED; + + cause &= adapter->slow_intr_mask; + if (!cause) +- return 0; +- if (cause & F_PL_INTR_SGE_ERR) +- t1_sge_intr_error_handler(adapter->sge); ++ return IRQ_NONE; ++ if (cause & F_PL_INTR_SGE_ERR) { ++ if (t1_sge_intr_error_handler(adapter->sge)) ++ ret = IRQ_WAKE_THREAD; ++ } + if (cause & F_PL_INTR_TP) + t1_tp_intr_handler(adapter->tp); + if (cause & F_PL_INTR_ESPI) + t1_espi_intr_handler(adapter->espi); +- if (cause & F_PL_INTR_PCIX) +- t1_pci_intr_handler(adapter); +- if (cause & F_PL_INTR_EXT) +- t1_elmer0_ext_intr(adapter); ++ if (cause & F_PL_INTR_PCIX) { ++ if (t1_pci_intr_handler(adapter)) ++ ret = IRQ_WAKE_THREAD; ++ } ++ if (cause & F_PL_INTR_EXT) { ++ /* Wake the threaded interrupt to handle external interrupts as ++ * we require a process context. We disable EXT interrupts in ++ * the interim and let the thread reenable them when it's done. ++ */ ++ adapter->pending_thread_intr |= F_PL_INTR_EXT; ++ adapter->slow_intr_mask &= ~F_PL_INTR_EXT; ++ writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA, ++ adapter->regs + A_PL_ENABLE); ++ ret = IRQ_WAKE_THREAD; ++ } + + /* Clear the interrupts just processed. */ + writel(cause, adapter->regs + A_PL_CAUSE); + readl(adapter->regs + A_PL_CAUSE); /* flush writes */ +- return 1; ++ return ret; + } + +-int t1_slow_intr_handler(adapter_t *adapter) ++irqreturn_t t1_slow_intr_handler(adapter_t *adapter) + { + #ifdef CONFIG_CHELSIO_T1_1G + if (!t1_is_asic(adapter)) +diff --git a/drivers/net/ethernet/dlink/sundance.c b/drivers/net/ethernet/dlink/sundance.c +index e3a885891..df0eab479 100644 +--- a/drivers/net/ethernet/dlink/sundance.c ++++ b/drivers/net/ethernet/dlink/sundance.c +@@ -963,7 +963,7 @@ static void tx_timeout(struct net_device *dev, unsigned int txqueue) + unsigned long flag; + + netif_stop_queue(dev); +- tasklet_disable(&np->tx_tasklet); ++ tasklet_disable_in_atomic(&np->tx_tasklet); + iowrite16(0, ioaddr + IntrEnable); + printk(KERN_WARNING "%s: Transmit timed out, TxStatus %2.2x " + "TxFrameId %2.2x," +diff --git a/drivers/net/ethernet/jme.c b/drivers/net/ethernet/jme.c +index 4185ca3dd..cf5c33d0f 100644 +--- a/drivers/net/ethernet/jme.c ++++ b/drivers/net/ethernet/jme.c +@@ -1265,9 +1265,9 @@ jme_stop_shutdown_timer(struct jme_adapter *jme) + jwrite32f(jme, JME_APMC, apmc); + } + +-static void jme_link_change_tasklet(struct tasklet_struct *t) ++static void jme_link_change_work(struct work_struct *work) + { +- struct jme_adapter *jme = from_tasklet(jme, t, linkch_task); ++ struct jme_adapter *jme = container_of(work, struct jme_adapter, linkch_task); + struct net_device *netdev = jme->dev; + int rc; + +@@ -1510,7 +1510,7 @@ jme_intr_msi(struct jme_adapter *jme, u32 intrstat) + * all other events are ignored + */ + jwrite32(jme, JME_IEVE, intrstat); +- tasklet_schedule(&jme->linkch_task); ++ schedule_work(&jme->linkch_task); + goto out_reenable; + } + +@@ -1832,7 +1832,6 @@ jme_open(struct net_device *netdev) + jme_clear_pm_disable_wol(jme); + JME_NAPI_ENABLE(jme); + +- tasklet_setup(&jme->linkch_task, jme_link_change_tasklet); + tasklet_setup(&jme->txclean_task, jme_tx_clean_tasklet); + tasklet_setup(&jme->rxclean_task, jme_rx_clean_tasklet); + tasklet_setup(&jme->rxempty_task, jme_rx_empty_tasklet); +@@ -1920,7 +1919,7 @@ jme_close(struct net_device *netdev) + + JME_NAPI_DISABLE(jme); + +- tasklet_kill(&jme->linkch_task); ++ cancel_work_sync(&jme->linkch_task); + tasklet_kill(&jme->txclean_task); + tasklet_kill(&jme->rxclean_task); + tasklet_kill(&jme->rxempty_task); +@@ -3039,6 +3038,7 @@ jme_init_one(struct pci_dev *pdev, + atomic_set(&jme->rx_empty, 1); + + tasklet_setup(&jme->pcc_task, jme_pcc_tasklet); ++ INIT_WORK(&jme->linkch_task, jme_link_change_work); + jme->dpi.cur = PCC_P1; + + jme->reg_ghc = 0; +diff --git a/drivers/net/ethernet/jme.h b/drivers/net/ethernet/jme.h +index a2c3b00d9..2af76329b 100644 +--- a/drivers/net/ethernet/jme.h ++++ b/drivers/net/ethernet/jme.h +@@ -411,7 +411,7 @@ struct jme_adapter { + struct tasklet_struct rxempty_task; + struct tasklet_struct rxclean_task; + struct tasklet_struct txclean_task; +- struct tasklet_struct linkch_task; ++ struct work_struct linkch_task; + struct tasklet_struct pcc_task; + unsigned long flags; + u32 reg_txcs; +diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c +index 71e2ada86..72e2e71aa 100644 +--- a/drivers/net/wireless/ath/ath9k/beacon.c ++++ b/drivers/net/wireless/ath/ath9k/beacon.c +@@ -251,7 +251,7 @@ void ath9k_beacon_ensure_primary_slot(struct ath_softc *sc) + int first_slot = ATH_BCBUF; + int slot; + +- tasklet_disable(&sc->bcon_tasklet); ++ tasklet_disable_in_atomic(&sc->bcon_tasklet); + + /* Find first taken slot. */ + for (slot = 0; slot < ATH_BCBUF; slot++) { +diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c +index 4353443b8..03e2569da 100644 +--- a/drivers/pci/controller/pci-hyperv.c ++++ b/drivers/pci/controller/pci-hyperv.c +@@ -1522,7 +1522,7 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) + * Prevents hv_pci_onchannelcallback() from running concurrently + * in the tasklet. + */ +- tasklet_disable(&channel->callback_event); ++ tasklet_disable_in_atomic(&channel->callback_event); + + /* + * Since this function is called with IRQ locks held, can't +diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c +index 30afcbbe1..4ae5b8152 100644 +--- a/drivers/scsi/fcoe/fcoe.c ++++ b/drivers/scsi/fcoe/fcoe.c +@@ -1452,11 +1452,11 @@ static int fcoe_rcv(struct sk_buff *skb, struct net_device *netdev, + static int fcoe_alloc_paged_crc_eof(struct sk_buff *skb, int tlen) + { + struct fcoe_percpu_s *fps; +- int rc; ++ int rc, cpu = get_cpu_light(); + +- fps = &get_cpu_var(fcoe_percpu); ++ fps = &per_cpu(fcoe_percpu, cpu); + rc = fcoe_get_paged_crc_eof(skb, tlen, fps); +- put_cpu_var(fcoe_percpu); ++ put_cpu_light(); + + return rc; + } +@@ -1641,11 +1641,11 @@ static inline int fcoe_filter_frames(struct fc_lport *lport, + return 0; + } + +- stats = per_cpu_ptr(lport->stats, get_cpu()); ++ stats = per_cpu_ptr(lport->stats, get_cpu_light()); + stats->InvalidCRCCount++; + if (stats->InvalidCRCCount < 5) + printk(KERN_WARNING "fcoe: dropping frame with CRC error\n"); +- put_cpu(); ++ put_cpu_light(); + return -EINVAL; + } + +@@ -1686,7 +1686,7 @@ static void fcoe_recv_frame(struct sk_buff *skb) + */ + hp = (struct fcoe_hdr *) skb_network_header(skb); + +- stats = per_cpu_ptr(lport->stats, get_cpu()); ++ stats = per_cpu_ptr(lport->stats, get_cpu_light()); + if (unlikely(FC_FCOE_DECAPS_VER(hp) != FC_FCOE_VER)) { + if (stats->ErrorFrames < 5) + printk(KERN_WARNING "fcoe: FCoE version " +@@ -1718,13 +1718,13 @@ static void fcoe_recv_frame(struct sk_buff *skb) + goto drop; + + if (!fcoe_filter_frames(lport, fp)) { +- put_cpu(); ++ put_cpu_light(); + fc_exch_recv(lport, fp); + return; + } + drop: + stats->ErrorFrames++; +- put_cpu(); ++ put_cpu_light(); + kfree_skb(skb); + } + +diff --git a/drivers/scsi/fcoe/fcoe_ctlr.c b/drivers/scsi/fcoe/fcoe_ctlr.c +index 5ea426eff..0d6b9acc7 100644 +--- a/drivers/scsi/fcoe/fcoe_ctlr.c ++++ b/drivers/scsi/fcoe/fcoe_ctlr.c +@@ -828,7 +828,7 @@ static unsigned long fcoe_ctlr_age_fcfs(struct fcoe_ctlr *fip) + + INIT_LIST_HEAD(&del_list); + +- stats = per_cpu_ptr(fip->lp->stats, get_cpu()); ++ stats = per_cpu_ptr(fip->lp->stats, get_cpu_light()); + + list_for_each_entry_safe(fcf, next, &fip->fcfs, list) { + deadline = fcf->time + fcf->fka_period + fcf->fka_period / 2; +@@ -864,7 +864,7 @@ static unsigned long fcoe_ctlr_age_fcfs(struct fcoe_ctlr *fip) + sel_time = fcf->time; + } + } +- put_cpu(); ++ put_cpu_light(); + + list_for_each_entry_safe(fcf, next, &del_list, list) { + /* Removes fcf from current list */ +diff --git a/drivers/scsi/libfc/fc_exch.c b/drivers/scsi/libfc/fc_exch.c +index 4261380af..65160eaaa 100644 +--- a/drivers/scsi/libfc/fc_exch.c ++++ b/drivers/scsi/libfc/fc_exch.c +@@ -826,10 +826,10 @@ static struct fc_exch *fc_exch_em_alloc(struct fc_lport *lport, + } + memset(ep, 0, sizeof(*ep)); + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + pool = per_cpu_ptr(mp->pool, cpu); + spin_lock_bh(&pool->lock); +- put_cpu(); ++ put_cpu_light(); + + /* peek cache of free slot */ + if (pool->left != FC_XID_UNKNOWN) { +diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h +index b6dc9003b..d5cf70ead 100644 +--- a/drivers/tty/serial/8250/8250.h ++++ b/drivers/tty/serial/8250/8250.h +@@ -153,12 +153,55 @@ static inline void serial_dl_write(struct uart_8250_port *up, int value) + up->dl_write(up, value); + } + ++static inline void serial8250_set_IER(struct uart_8250_port *up, ++ unsigned char ier) ++{ ++ struct uart_port *port = &up->port; ++ unsigned int flags; ++ bool is_console; ++ ++ is_console = uart_console(port); ++ ++ if (is_console) ++ console_atomic_lock(&flags); ++ ++ serial_out(up, UART_IER, ier); ++ ++ if (is_console) ++ console_atomic_unlock(flags); ++} ++ ++static inline unsigned char serial8250_clear_IER(struct uart_8250_port *up) ++{ ++ struct uart_port *port = &up->port; ++ unsigned int clearval = 0; ++ unsigned int prior; ++ unsigned int flags; ++ bool is_console; ++ ++ is_console = uart_console(port); ++ ++ if (up->capabilities & UART_CAP_UUE) ++ clearval = UART_IER_UUE; ++ ++ if (is_console) ++ console_atomic_lock(&flags); ++ ++ prior = serial_port_in(port, UART_IER); ++ serial_port_out(port, UART_IER, clearval); ++ ++ if (is_console) ++ console_atomic_unlock(flags); ++ ++ return prior; ++} ++ + static inline bool serial8250_set_THRI(struct uart_8250_port *up) + { + if (up->ier & UART_IER_THRI) + return false; + up->ier |= UART_IER_THRI; +- serial_out(up, UART_IER, up->ier); ++ serial8250_set_IER(up, up->ier); + return true; + } + +@@ -167,7 +210,7 @@ static inline bool serial8250_clear_THRI(struct uart_8250_port *up) + if (!(up->ier & UART_IER_THRI)) + return false; + up->ier &= ~UART_IER_THRI; +- serial_out(up, UART_IER, up->ier); ++ serial8250_set_IER(up, up->ier); + return true; + } + +diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c +index 0a7e9491b..83536b159 100644 +--- a/drivers/tty/serial/8250/8250_core.c ++++ b/drivers/tty/serial/8250/8250_core.c +@@ -275,10 +275,8 @@ static void serial8250_backup_timeout(struct timer_list *t) + * Must disable interrupts or else we risk racing with the interrupt + * based handler. + */ +- if (up->port.irq) { +- ier = serial_in(up, UART_IER); +- serial_out(up, UART_IER, 0); +- } ++ if (up->port.irq) ++ ier = serial8250_clear_IER(up); + + iir = serial_in(up, UART_IIR); + +@@ -301,7 +299,7 @@ static void serial8250_backup_timeout(struct timer_list *t) + serial8250_tx_chars(up); + + if (up->port.irq) +- serial_out(up, UART_IER, ier); ++ serial8250_set_IER(up, ier); + + spin_unlock_irqrestore(&up->port.lock, flags); + +@@ -588,6 +586,14 @@ serial8250_register_ports(struct uart_driver *drv, struct device *dev) + + #ifdef CONFIG_SERIAL_8250_CONSOLE + ++static void univ8250_console_write_atomic(struct console *co, const char *s, ++ unsigned int count) ++{ ++ struct uart_8250_port *up = &serial8250_ports[co->index]; ++ ++ serial8250_console_write_atomic(up, s, count); ++} ++ + static void univ8250_console_write(struct console *co, const char *s, + unsigned int count) + { +@@ -681,6 +687,7 @@ static int univ8250_console_match(struct console *co, char *name, int idx, + + static struct console univ8250_console = { + .name = "ttyS", ++ .write_atomic = univ8250_console_write_atomic, + .write = univ8250_console_write, + .device = uart_console_device, + .setup = univ8250_console_setup, +diff --git a/drivers/tty/serial/8250/8250_fsl.c b/drivers/tty/serial/8250/8250_fsl.c +index fbcc90c31..b33cb454c 100644 +--- a/drivers/tty/serial/8250/8250_fsl.c ++++ b/drivers/tty/serial/8250/8250_fsl.c +@@ -60,9 +60,18 @@ int fsl8250_handle_irq(struct uart_port *port) + + /* Stop processing interrupts on input overrun */ + if ((orig_lsr & UART_LSR_OE) && (up->overrun_backoff_time_ms > 0)) { ++ unsigned int ca_flags; + unsigned long delay; ++ bool is_console; + ++ is_console = uart_console(port); ++ ++ if (is_console) ++ console_atomic_lock(&ca_flags); + up->ier = port->serial_in(port, UART_IER); ++ if (is_console) ++ console_atomic_unlock(ca_flags); ++ + if (up->ier & (UART_IER_RLSI | UART_IER_RDI)) { + port->ops->stop_rx(port); + } else { +diff --git a/drivers/tty/serial/8250/8250_ingenic.c b/drivers/tty/serial/8250/8250_ingenic.c +index 988bf6bcc..bcd26d672 100644 +--- a/drivers/tty/serial/8250/8250_ingenic.c ++++ b/drivers/tty/serial/8250/8250_ingenic.c +@@ -146,6 +146,8 @@ OF_EARLYCON_DECLARE(x1000_uart, "ingenic,x1000-uart", + + static void ingenic_uart_serial_out(struct uart_port *p, int offset, int value) + { ++ unsigned int flags; ++ bool is_console; + int ier; + + switch (offset) { +@@ -167,7 +169,12 @@ static void ingenic_uart_serial_out(struct uart_port *p, int offset, int value) + * If we have enabled modem status IRQs we should enable + * modem mode. + */ ++ is_console = uart_console(p); ++ if (is_console) ++ console_atomic_lock(&flags); + ier = p->serial_in(p, UART_IER); ++ if (is_console) ++ console_atomic_unlock(flags); + + if (ier & UART_IER_MSI) + value |= UART_MCR_MDCE | UART_MCR_FCM; +diff --git a/drivers/tty/serial/8250/8250_mtk.c b/drivers/tty/serial/8250/8250_mtk.c +index de48a5846..d246f2755 100644 +--- a/drivers/tty/serial/8250/8250_mtk.c ++++ b/drivers/tty/serial/8250/8250_mtk.c +@@ -222,12 +222,37 @@ static void mtk8250_shutdown(struct uart_port *port) + + static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask) + { +- serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask)); ++ struct uart_port *port = &up->port; ++ unsigned int flags; ++ unsigned int ier; ++ bool is_console; ++ ++ is_console = uart_console(port); ++ ++ if (is_console) ++ console_atomic_lock(&flags); ++ ++ ier = serial_in(up, UART_IER); ++ serial_out(up, UART_IER, ier & (~mask)); ++ ++ if (is_console) ++ console_atomic_unlock(flags); + } + + static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask) + { +- serial_out(up, UART_IER, serial_in(up, UART_IER) | mask); ++ struct uart_port *port = &up->port; ++ unsigned int flags; ++ unsigned int ier; ++ ++ if (uart_console(port)) ++ console_atomic_lock(&flags); ++ ++ ier = serial_in(up, UART_IER); ++ serial_out(up, UART_IER, ier | mask); ++ ++ if (uart_console(port)) ++ console_atomic_unlock(flags); + } + + static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode) +diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c +index 1f231fcda..0901c5bae 100644 +--- a/drivers/tty/serial/8250/8250_port.c ++++ b/drivers/tty/serial/8250/8250_port.c +@@ -729,7 +729,7 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep) + serial_out(p, UART_EFR, UART_EFR_ECB); + serial_out(p, UART_LCR, 0); + } +- serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0); ++ serial8250_set_IER(p, sleep ? UART_IERX_SLEEP : 0); + if (p->capabilities & UART_CAP_EFR) { + serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B); + serial_out(p, UART_EFR, efr); +@@ -1404,7 +1404,7 @@ static void serial8250_stop_rx(struct uart_port *port) + + up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); + up->port.read_status_mask &= ~UART_LSR_DR; +- serial_port_out(port, UART_IER, up->ier); ++ serial8250_set_IER(up, up->ier); + + serial8250_rpm_put(up); + } +@@ -1434,7 +1434,7 @@ void serial8250_em485_stop_tx(struct uart_8250_port *p) + serial8250_clear_and_reinit_fifos(p); + + p->ier |= UART_IER_RLSI | UART_IER_RDI; +- serial_port_out(&p->port, UART_IER, p->ier); ++ serial8250_set_IER(p, p->ier); + } + } + EXPORT_SYMBOL_GPL(serial8250_em485_stop_tx); +@@ -1676,7 +1676,7 @@ static void serial8250_disable_ms(struct uart_port *port) + mctrl_gpio_disable_ms(up->gpios); + + up->ier &= ~UART_IER_MSI; +- serial_port_out(port, UART_IER, up->ier); ++ serial8250_set_IER(up, up->ier); + } + + static void serial8250_enable_ms(struct uart_port *port) +@@ -1692,7 +1692,7 @@ static void serial8250_enable_ms(struct uart_port *port) + up->ier |= UART_IER_MSI; + + serial8250_rpm_get(up); +- serial_port_out(port, UART_IER, up->ier); ++ serial8250_set_IER(up, up->ier); + serial8250_rpm_put(up); + } + +@@ -2116,14 +2116,7 @@ static void serial8250_put_poll_char(struct uart_port *port, + struct uart_8250_port *up = up_to_u8250p(port); + + serial8250_rpm_get(up); +- /* +- * First save the IER then disable the interrupts +- */ +- ier = serial_port_in(port, UART_IER); +- if (up->capabilities & UART_CAP_UUE) +- serial_port_out(port, UART_IER, UART_IER_UUE); +- else +- serial_port_out(port, UART_IER, 0); ++ ier = serial8250_clear_IER(up); + + wait_for_xmitr(up, BOTH_EMPTY); + /* +@@ -2136,7 +2129,7 @@ static void serial8250_put_poll_char(struct uart_port *port, + * and restore the IER + */ + wait_for_xmitr(up, BOTH_EMPTY); +- serial_port_out(port, UART_IER, ier); ++ serial8250_set_IER(up, ier); + serial8250_rpm_put(up); + } + +@@ -2441,7 +2434,7 @@ void serial8250_do_shutdown(struct uart_port *port) + */ + spin_lock_irqsave(&port->lock, flags); + up->ier = 0; +- serial_port_out(port, UART_IER, 0); ++ serial8250_set_IER(up, 0); + spin_unlock_irqrestore(&port->lock, flags); + + synchronize_irq(port->irq); +@@ -2797,7 +2790,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, + if (up->capabilities & UART_CAP_RTOIE) + up->ier |= UART_IER_RTOIE; + +- serial_port_out(port, UART_IER, up->ier); ++ serial8250_set_IER(up, up->ier); + + if (up->capabilities & UART_CAP_EFR) { + unsigned char efr = 0; +@@ -3262,7 +3255,7 @@ EXPORT_SYMBOL_GPL(serial8250_set_defaults); + + #ifdef CONFIG_SERIAL_8250_CONSOLE + +-static void serial8250_console_putchar(struct uart_port *port, int ch) ++static void serial8250_console_putchar_locked(struct uart_port *port, int ch) + { + struct uart_8250_port *up = up_to_u8250p(port); + +@@ -3270,6 +3263,18 @@ static void serial8250_console_putchar(struct uart_port *port, int ch) + serial_port_out(port, UART_TX, ch); + } + ++static void serial8250_console_putchar(struct uart_port *port, int ch) ++{ ++ struct uart_8250_port *up = up_to_u8250p(port); ++ unsigned int flags; ++ ++ wait_for_xmitr(up, UART_LSR_THRE); ++ ++ console_atomic_lock(&flags); ++ serial8250_console_putchar_locked(port, ch); ++ console_atomic_unlock(flags); ++} ++ + /* + * Restore serial console when h/w power-off detected + */ +@@ -3296,6 +3301,32 @@ static void serial8250_console_restore(struct uart_8250_port *up) + serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS); + } + ++void serial8250_console_write_atomic(struct uart_8250_port *up, ++ const char *s, unsigned int count) ++{ ++ struct uart_port *port = &up->port; ++ unsigned int flags; ++ unsigned int ier; ++ ++ console_atomic_lock(&flags); ++ ++ touch_nmi_watchdog(); ++ ++ ier = serial8250_clear_IER(up); ++ ++ if (atomic_fetch_inc(&up->console_printing)) { ++ uart_console_write(port, "\n", 1, ++ serial8250_console_putchar_locked); ++ } ++ uart_console_write(port, s, count, serial8250_console_putchar_locked); ++ atomic_dec(&up->console_printing); ++ ++ wait_for_xmitr(up, BOTH_EMPTY); ++ serial8250_set_IER(up, ier); ++ ++ console_atomic_unlock(flags); ++} ++ + /* + * Print a string to the serial port trying not to disturb + * any possible real use of the port... +@@ -3312,24 +3343,12 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s, + struct uart_port *port = &up->port; + unsigned long flags; + unsigned int ier; +- int locked = 1; + + touch_nmi_watchdog(); + +- if (oops_in_progress) +- locked = spin_trylock_irqsave(&port->lock, flags); +- else +- spin_lock_irqsave(&port->lock, flags); +- +- /* +- * First save the IER then disable the interrupts +- */ +- ier = serial_port_in(port, UART_IER); ++ spin_lock_irqsave(&port->lock, flags); + +- if (up->capabilities & UART_CAP_UUE) +- serial_port_out(port, UART_IER, UART_IER_UUE); +- else +- serial_port_out(port, UART_IER, 0); ++ ier = serial8250_clear_IER(up); + + /* check scratch reg to see if port powered off during system sleep */ + if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) { +@@ -3343,7 +3362,9 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s, + mdelay(port->rs485.delay_rts_before_send); + } + ++ atomic_inc(&up->console_printing); + uart_console_write(port, s, count, serial8250_console_putchar); ++ atomic_dec(&up->console_printing); + + /* + * Finally, wait for transmitter to become empty +@@ -3356,8 +3377,7 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s, + if (em485->tx_stopped) + up->rs485_stop_tx(up); + } +- +- serial_port_out(port, UART_IER, ier); ++ serial8250_set_IER(up, ier); + + /* + * The receive handling will happen properly because the +@@ -3369,8 +3389,7 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s, + if (up->msr_saved_flags) + serial8250_modem_status(up); + +- if (locked) +- spin_unlock_irqrestore(&port->lock, flags); ++ spin_unlock_irqrestore(&port->lock, flags); + } + + static unsigned int probe_baud(struct uart_port *port) +@@ -3390,6 +3409,7 @@ static unsigned int probe_baud(struct uart_port *port) + + int serial8250_console_setup(struct uart_port *port, char *options, bool probe) + { ++ struct uart_8250_port *up = up_to_u8250p(port); + int baud = 9600; + int bits = 8; + int parity = 'n'; +@@ -3399,6 +3419,8 @@ int serial8250_console_setup(struct uart_port *port, char *options, bool probe) + if (!port->iobase && !port->membase) + return -ENODEV; + ++ atomic_set(&up->console_printing, 0); ++ + if (options) + uart_parse_options(options, &baud, &parity, &bits, &flow); + else if (probe) +diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c +index c9876040c..43ade1432 100644 +--- a/drivers/tty/serial/amba-pl011.c ++++ b/drivers/tty/serial/amba-pl011.c +@@ -2280,18 +2280,24 @@ pl011_console_write(struct console *co, const char *s, unsigned int count) + { + struct uart_amba_port *uap = amba_ports[co->index]; + unsigned int old_cr = 0, new_cr; +- unsigned long flags; ++ unsigned long flags = 0; + int locked = 1; + + clk_enable(uap->clk); + +- local_irq_save(flags); ++ /* ++ * local_irq_save(flags); ++ * ++ * This local_irq_save() is nonsense. If we come in via sysrq ++ * handling then interrupts are already disabled. Aside of ++ * that the port.sysrq check is racy on SMP regardless. ++ */ + if (uap->port.sysrq) + locked = 0; + else if (oops_in_progress) +- locked = spin_trylock(&uap->port.lock); ++ locked = spin_trylock_irqsave(&uap->port.lock, flags); + else +- spin_lock(&uap->port.lock); ++ spin_lock_irqsave(&uap->port.lock, flags); + + /* + * First save the CR then disable the interrupts +@@ -2317,8 +2323,7 @@ pl011_console_write(struct console *co, const char *s, unsigned int count) + pl011_write(old_cr, uap, REG_CR); + + if (locked) +- spin_unlock(&uap->port.lock); +- local_irq_restore(flags); ++ spin_unlock_irqrestore(&uap->port.lock, flags); + + clk_disable(uap->clk); + } +diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c +index 84e815808..342005ed5 100644 +--- a/drivers/tty/serial/omap-serial.c ++++ b/drivers/tty/serial/omap-serial.c +@@ -1311,13 +1311,10 @@ serial_omap_console_write(struct console *co, const char *s, + + pm_runtime_get_sync(up->dev); + +- local_irq_save(flags); +- if (up->port.sysrq) +- locked = 0; +- else if (oops_in_progress) +- locked = spin_trylock(&up->port.lock); ++ if (up->port.sysrq || oops_in_progress) ++ locked = spin_trylock_irqsave(&up->port.lock, flags); + else +- spin_lock(&up->port.lock); ++ spin_lock_irqsave(&up->port.lock, flags); + + /* + * First save the IER then disable the interrupts +@@ -1346,8 +1343,7 @@ serial_omap_console_write(struct console *co, const char *s, + pm_runtime_mark_last_busy(up->dev); + pm_runtime_put_autosuspend(up->dev); + if (locked) +- spin_unlock(&up->port.lock); +- local_irq_restore(flags); ++ spin_unlock_irqrestore(&up->port.lock, flags); + } + + static int __init +diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c +index c3abcd043..2479ea4c8 100644 +--- a/drivers/tty/tty_buffer.c ++++ b/drivers/tty/tty_buffer.c +@@ -172,10 +172,10 @@ static struct tty_buffer *tty_buffer_alloc(struct tty_port *port, size_t size) + have queued and recycle that ? */ + if (atomic_read(&port->buf.mem_used) > port->buf.mem_limit) + return NULL; +- printk_safe_enter(); ++ + p = kmalloc(sizeof(struct tty_buffer) + 2 * size, + GFP_ATOMIC | __GFP_NOWARN); +- printk_safe_exit(); ++ + if (p == NULL) + return NULL; + +diff --git a/fs/afs/dir_silly.c b/fs/afs/dir_silly.c +index dae9a57d7..9a6a0ec4d 100644 +--- a/fs/afs/dir_silly.c ++++ b/fs/afs/dir_silly.c +@@ -239,7 +239,7 @@ int afs_silly_iput(struct dentry *dentry, struct inode *inode) + struct dentry *alias; + int ret; + +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + + _enter("%p{%pd},%llx", dentry, dentry, vnode->fid.vnode); + +diff --git a/fs/aio.c b/fs/aio.c +index 5e5333d72..cc16ac777 100644 +--- a/fs/aio.c ++++ b/fs/aio.c +@@ -43,7 +43,6 @@ + #include + #include + +-#include + #include + #include + +@@ -1762,7 +1761,7 @@ static int aio_poll_wake(struct wait_queue_entry *wait, unsigned mode, int sync, + list_del_init(&req->wait.entry); + list_del(&iocb->ki_list); + iocb->ki_res.res = mangle_poll(mask); +- if (iocb->ki_eventfd && eventfd_signal_count()) { ++ if (iocb->ki_eventfd && !eventfd_signal_allowed()) { + iocb = NULL; + INIT_WORK(&req->work, aio_poll_put_work); + schedule_work(&req->work); +diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h +index bcc6848bb..fabbf6cc4 100644 +--- a/fs/btrfs/ctree.h ++++ b/fs/btrfs/ctree.h +@@ -17,7 +17,6 @@ + #include + #include + #include +-#include + #include + #include + #include +diff --git a/fs/cifs/readdir.c b/fs/cifs/readdir.c +index 799be3a5d..d5165a7da 100644 +--- a/fs/cifs/readdir.c ++++ b/fs/cifs/readdir.c +@@ -81,7 +81,7 @@ cifs_prime_dcache(struct dentry *parent, struct qstr *name, + struct inode *inode; + struct super_block *sb = parent->d_sb; + struct cifs_sb_info *cifs_sb = CIFS_SB(sb); +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + + cifs_dbg(FYI, "%s: for %s\n", __func__, name->name); + +diff --git a/fs/dcache.c b/fs/dcache.c +index f5b78cc80..b2e0d1a07 100644 +--- a/fs/dcache.c ++++ b/fs/dcache.c +@@ -2566,9 +2566,10 @@ EXPORT_SYMBOL(d_rehash); + static inline unsigned start_dir_add(struct inode *dir) + { + ++ preempt_disable_rt(); + for (;;) { +- unsigned n = dir->i_dir_seq; +- if (!(n & 1) && cmpxchg(&dir->i_dir_seq, n, n + 1) == n) ++ unsigned n = dir->__i_dir_seq; ++ if (!(n & 1) && cmpxchg(&dir->__i_dir_seq, n, n + 1) == n) + return n; + cpu_relax(); + } +@@ -2576,26 +2577,30 @@ static inline unsigned start_dir_add(struct inode *dir) + + static inline void end_dir_add(struct inode *dir, unsigned n) + { +- smp_store_release(&dir->i_dir_seq, n + 2); ++ smp_store_release(&dir->__i_dir_seq, n + 2); ++ preempt_enable_rt(); + } + + static void d_wait_lookup(struct dentry *dentry) + { +- if (d_in_lookup(dentry)) { +- DECLARE_WAITQUEUE(wait, current); +- add_wait_queue(dentry->d_wait, &wait); +- do { +- set_current_state(TASK_UNINTERRUPTIBLE); +- spin_unlock(&dentry->d_lock); +- schedule(); +- spin_lock(&dentry->d_lock); +- } while (d_in_lookup(dentry)); +- } ++ struct swait_queue __wait; ++ ++ if (!d_in_lookup(dentry)) ++ return; ++ ++ INIT_LIST_HEAD(&__wait.task_list); ++ do { ++ prepare_to_swait_exclusive(dentry->d_wait, &__wait, TASK_UNINTERRUPTIBLE); ++ spin_unlock(&dentry->d_lock); ++ schedule(); ++ spin_lock(&dentry->d_lock); ++ } while (d_in_lookup(dentry)); ++ finish_swait(dentry->d_wait, &__wait); + } + + struct dentry *d_alloc_parallel(struct dentry *parent, + const struct qstr *name, +- wait_queue_head_t *wq) ++ struct swait_queue_head *wq) + { + unsigned int hash = name->hash; + struct hlist_bl_head *b = in_lookup_hash(parent, hash); +@@ -2609,7 +2614,7 @@ struct dentry *d_alloc_parallel(struct dentry *parent, + + retry: + rcu_read_lock(); +- seq = smp_load_acquire(&parent->d_inode->i_dir_seq); ++ seq = smp_load_acquire(&parent->d_inode->__i_dir_seq); + r_seq = read_seqbegin(&rename_lock); + dentry = __d_lookup_rcu(parent, name, &d_seq); + if (unlikely(dentry)) { +@@ -2637,7 +2642,7 @@ struct dentry *d_alloc_parallel(struct dentry *parent, + } + + hlist_bl_lock(b); +- if (unlikely(READ_ONCE(parent->d_inode->i_dir_seq) != seq)) { ++ if (unlikely(READ_ONCE(parent->d_inode->__i_dir_seq) != seq)) { + hlist_bl_unlock(b); + rcu_read_unlock(); + goto retry; +@@ -2710,7 +2715,7 @@ void __d_lookup_done(struct dentry *dentry) + hlist_bl_lock(b); + dentry->d_flags &= ~DCACHE_PAR_LOOKUP; + __hlist_bl_del(&dentry->d_u.d_in_lookup_hash); +- wake_up_all(dentry->d_wait); ++ swake_up_all(dentry->d_wait); + dentry->d_wait = NULL; + hlist_bl_unlock(b); + INIT_HLIST_NODE(&dentry->d_u.d_alias); +diff --git a/fs/eventfd.c b/fs/eventfd.c +index 4a14295cf..cdaff4ddb 100644 +--- a/fs/eventfd.c ++++ b/fs/eventfd.c +@@ -25,8 +25,6 @@ + #include + #include + +-DEFINE_PER_CPU(int, eventfd_wake_count); +- + static DEFINE_IDA(eventfd_ida); + + struct eventfd_ctx { +@@ -57,17 +55,17 @@ __u64 eventfd_signal_mask(struct eventfd_ctx *ctx, __u64 n, unsigned mask) + * it returns true, the eventfd_signal() call should be deferred to a + * safe context. + */ +- if (WARN_ON_ONCE(this_cpu_read(eventfd_wake_count))) ++ if (WARN_ON_ONCE(current->in_eventfd_signal)) + return 0; + + spin_lock_irqsave(&ctx->wqh.lock, flags); +- this_cpu_inc(eventfd_wake_count); ++ current->in_eventfd_signal = 1; + if (ULLONG_MAX - ctx->count < n) + n = ULLONG_MAX - ctx->count; + ctx->count += n; + if (waitqueue_active(&ctx->wqh)) + wake_up_locked_poll(&ctx->wqh, EPOLLIN | mask); +- this_cpu_dec(eventfd_wake_count); ++ current->in_eventfd_signal = 0; + spin_unlock_irqrestore(&ctx->wqh.lock, flags); + + return n; +diff --git a/fs/fscache/internal.h b/fs/fscache/internal.h +index 64aa552b2..7dae569da 100644 +--- a/fs/fscache/internal.h ++++ b/fs/fscache/internal.h +@@ -95,7 +95,6 @@ extern unsigned fscache_debug; + extern struct kobject *fscache_root; + extern struct workqueue_struct *fscache_object_wq; + extern struct workqueue_struct *fscache_op_wq; +-DECLARE_PER_CPU(wait_queue_head_t, fscache_object_cong_wait); + + extern unsigned int fscache_hash(unsigned int salt, unsigned int *data, unsigned int n); + +diff --git a/fs/fscache/main.c b/fs/fscache/main.c +index 4207f98e4..85f8cf3a3 100644 +--- a/fs/fscache/main.c ++++ b/fs/fscache/main.c +@@ -41,8 +41,6 @@ struct kobject *fscache_root; + struct workqueue_struct *fscache_object_wq; + struct workqueue_struct *fscache_op_wq; + +-DEFINE_PER_CPU(wait_queue_head_t, fscache_object_cong_wait); +- + /* these values serve as lower bounds, will be adjusted in fscache_init() */ + static unsigned fscache_object_max_active = 4; + static unsigned fscache_op_max_active = 2; +@@ -138,7 +136,6 @@ unsigned int fscache_hash(unsigned int salt, unsigned int *data, unsigned int n) + static int __init fscache_init(void) + { + unsigned int nr_cpus = num_possible_cpus(); +- unsigned int cpu; + int ret; + + fscache_object_max_active = +@@ -161,9 +158,6 @@ static int __init fscache_init(void) + if (!fscache_op_wq) + goto error_op_wq; + +- for_each_possible_cpu(cpu) +- init_waitqueue_head(&per_cpu(fscache_object_cong_wait, cpu)); +- + ret = fscache_proc_init(); + if (ret < 0) + goto error_proc; +diff --git a/fs/fscache/object.c b/fs/fscache/object.c +index cb2146e02..fb9794dce 100644 +--- a/fs/fscache/object.c ++++ b/fs/fscache/object.c +@@ -807,6 +807,8 @@ void fscache_object_destroy(struct fscache_object *object) + } + EXPORT_SYMBOL(fscache_object_destroy); + ++static DECLARE_WAIT_QUEUE_HEAD(fscache_object_cong_wait); ++ + /* + * enqueue an object for metadata-type processing + */ +@@ -815,16 +817,12 @@ void fscache_enqueue_object(struct fscache_object *object) + _enter("{OBJ%x}", object->debug_id); + + if (fscache_get_object(object, fscache_obj_get_queue) >= 0) { +- wait_queue_head_t *cong_wq = +- &get_cpu_var(fscache_object_cong_wait); + + if (queue_work(fscache_object_wq, &object->work)) { + if (fscache_object_congested()) +- wake_up(cong_wq); ++ wake_up(&fscache_object_cong_wait); + } else + fscache_put_object(object, fscache_obj_put_queue); +- +- put_cpu_var(fscache_object_cong_wait); + } + } + +@@ -842,16 +840,15 @@ void fscache_enqueue_object(struct fscache_object *object) + */ + bool fscache_object_sleep_till_congested(signed long *timeoutp) + { +- wait_queue_head_t *cong_wq = this_cpu_ptr(&fscache_object_cong_wait); + DEFINE_WAIT(wait); + + if (fscache_object_congested()) + return true; + +- add_wait_queue_exclusive(cong_wq, &wait); ++ add_wait_queue_exclusive(&fscache_object_cong_wait, &wait); + if (!fscache_object_congested()) + *timeoutp = schedule_timeout(*timeoutp); +- finish_wait(cong_wq, &wait); ++ finish_wait(&fscache_object_cong_wait, &wait); + + return fscache_object_congested(); + } +diff --git a/fs/fuse/readdir.c b/fs/fuse/readdir.c +index d5294e663..ee8846818 100644 +--- a/fs/fuse/readdir.c ++++ b/fs/fuse/readdir.c +@@ -160,7 +160,7 @@ static int fuse_direntplus_link(struct file *file, + struct inode *dir = d_inode(parent); + struct fuse_conn *fc; + struct inode *inode; +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + + if (!o->nodeid) { + /* +diff --git a/fs/inode.c b/fs/inode.c +index 7436a17a2..45a821a8c 100644 +--- a/fs/inode.c ++++ b/fs/inode.c +@@ -158,7 +158,7 @@ int inode_init_always(struct super_block *sb, struct inode *inode) + inode->i_bdev = NULL; + inode->i_cdev = NULL; + inode->i_link = NULL; +- inode->i_dir_seq = 0; ++ inode->__i_dir_seq = 0; + inode->i_rdev = 0; + inode->dirtied_when = 0; + +diff --git a/fs/namei.c b/fs/namei.c +index f08e14d6d..14d27fe95 100644 +--- a/fs/namei.c ++++ b/fs/namei.c +@@ -1538,7 +1538,7 @@ static struct dentry *__lookup_slow(const struct qstr *name, + { + struct dentry *dentry, *old; + struct inode *inode = dir->d_inode; +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + + /* Don't go there if it's already dead */ + if (unlikely(IS_DEADDIR(inode))) +@@ -3035,7 +3035,7 @@ static struct dentry *lookup_open(struct nameidata *nd, struct file *file, + struct dentry *dentry; + int error, create_error = 0; + umode_t mode = op->mode; +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + + if (unlikely(IS_DEADDIR(dir_inode))) + return ERR_PTR(-ENOENT); +diff --git a/fs/namespace.c b/fs/namespace.c +index 6e76f2a72..dbd1119a5 100644 +--- a/fs/namespace.c ++++ b/fs/namespace.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -322,8 +323,11 @@ int __mnt_want_write(struct vfsmount *m) + * incremented count after it has set MNT_WRITE_HOLD. + */ + smp_mb(); +- while (READ_ONCE(mnt->mnt.mnt_flags) & MNT_WRITE_HOLD) +- cpu_relax(); ++ while (READ_ONCE(mnt->mnt.mnt_flags) & MNT_WRITE_HOLD) { ++ preempt_enable(); ++ cpu_chill(); ++ preempt_disable(); ++ } + /* + * After the slowpath clears MNT_WRITE_HOLD, mnt_is_readonly will + * be set to match its requirements. So we must not load that until +diff --git a/fs/nfs/dir.c b/fs/nfs/dir.c +index 9f88ca7b2..bc8a78ecf 100644 +--- a/fs/nfs/dir.c ++++ b/fs/nfs/dir.c +@@ -484,7 +484,7 @@ void nfs_prime_dcache(struct dentry *parent, struct nfs_entry *entry, + unsigned long dir_verifier) + { + struct qstr filename = QSTR_INIT(entry->name, entry->len); +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + struct dentry *dentry; + struct dentry *alias; + struct inode *inode; +@@ -1660,7 +1660,7 @@ int nfs_atomic_open(struct inode *dir, struct dentry *dentry, + struct file *file, unsigned open_flags, + umode_t mode) + { +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + struct nfs_open_context *ctx; + struct dentry *res; + struct iattr attr = { .ia_valid = ATTR_OPEN }; +diff --git a/fs/nfs/unlink.c b/fs/nfs/unlink.c +index b27ebdcce..f86c98a7e 100644 +--- a/fs/nfs/unlink.c ++++ b/fs/nfs/unlink.c +@@ -13,7 +13,7 @@ + #include + #include + #include +-#include ++#include + #include + #include + +@@ -180,7 +180,7 @@ nfs_async_unlink(struct dentry *dentry, const struct qstr *name) + + data->cred = get_current_cred(); + data->res.dir_attr = &data->dir_attr; +- init_waitqueue_head(&data->wq); ++ init_swait_queue_head(&data->wq); + + status = -EBUSY; + spin_lock(&dentry->d_lock); +diff --git a/fs/proc/array.c b/fs/proc/array.c +index 18a4588c3..decaa7768 100644 +--- a/fs/proc/array.c ++++ b/fs/proc/array.c +@@ -384,9 +384,9 @@ static inline void task_context_switch_counts(struct seq_file *m, + static void task_cpus_allowed(struct seq_file *m, struct task_struct *task) + { + seq_printf(m, "Cpus_allowed:\t%*pb\n", +- cpumask_pr_args(task->cpus_ptr)); ++ cpumask_pr_args(&task->cpus_mask)); + seq_printf(m, "Cpus_allowed_list:\t%*pbl\n", +- cpumask_pr_args(task->cpus_ptr)); ++ cpumask_pr_args(&task->cpus_mask)); + } + + static inline void task_core_dumping(struct seq_file *m, struct mm_struct *mm) +diff --git a/fs/proc/base.c b/fs/proc/base.c +index 24c70ff92..6c8156c4c 100644 +--- a/fs/proc/base.c ++++ b/fs/proc/base.c +@@ -97,6 +97,7 @@ + #include + #include + #include ++#include + #include + #include + #include "internal.h" +@@ -2164,7 +2165,7 @@ bool proc_fill_cache(struct file *file, struct dir_context *ctx, + + child = d_hash_and_lookup(dir, &qname); + if (!child) { +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + child = d_alloc_parallel(dir, &qname, &wq); + if (IS_ERR(child)) + goto end_instantiate; +diff --git a/fs/proc/proc_sysctl.c b/fs/proc/proc_sysctl.c +index df435cd91..eb19a3429 100644 +--- a/fs/proc/proc_sysctl.c ++++ b/fs/proc/proc_sysctl.c +@@ -684,7 +684,7 @@ static bool proc_sys_fill_cache(struct file *file, + + child = d_lookup(dir, &qname); + if (!child) { +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + child = d_alloc_parallel(dir, &qname, &wq); + if (IS_ERR(child)) + return false; +diff --git a/fs/pstore/platform.c b/fs/pstore/platform.c +index ce03c3dbb..5c2c14d5f 100644 +--- a/fs/pstore/platform.c ++++ b/fs/pstore/platform.c +@@ -384,7 +384,8 @@ void pstore_record_init(struct pstore_record *record, + * end of the buffer. + */ + static void pstore_dump(struct kmsg_dumper *dumper, +- enum kmsg_dump_reason reason) ++ enum kmsg_dump_reason reason, ++ struct kmsg_dumper_iter *iter) + { + unsigned long total = 0; + const char *why; +@@ -434,7 +435,7 @@ static void pstore_dump(struct kmsg_dumper *dumper, + dst_size -= header_size; + + /* Write dump contents. */ +- if (!kmsg_dump_get_buffer(dumper, true, dst + header_size, ++ if (!kmsg_dump_get_buffer(iter, true, dst + header_size, + dst_size, &dump_size)) + break; + +diff --git a/include/asm-generic/Kbuild b/include/asm-generic/Kbuild +index d1300c6e0..267f6dfb8 100644 +--- a/include/asm-generic/Kbuild ++++ b/include/asm-generic/Kbuild +@@ -30,7 +30,7 @@ mandatory-y += irq.h + mandatory-y += irq_regs.h + mandatory-y += irq_work.h + mandatory-y += kdebug.h +-mandatory-y += kmap_types.h ++mandatory-y += kmap_size.h + mandatory-y += kprobes.h + mandatory-y += linkage.h + mandatory-y += local.h +diff --git a/include/asm-generic/hardirq.h b/include/asm-generic/hardirq.h +index d14214dfc..7317e8258 100644 +--- a/include/asm-generic/hardirq.h ++++ b/include/asm-generic/hardirq.h +@@ -7,9 +7,13 @@ + + typedef struct { + unsigned int __softirq_pending; ++#ifdef ARCH_WANTS_NMI_IRQSTAT ++ unsigned int __nmi_count; ++#endif + } ____cacheline_aligned irq_cpustat_t; + +-#include /* Standard mappings for irq_cpustat_t above */ ++DECLARE_PER_CPU_ALIGNED(irq_cpustat_t, irq_stat); ++ + #include + + #ifndef ack_bad_irq +diff --git a/include/asm-generic/kmap_size.h b/include/asm-generic/kmap_size.h +new file mode 100644 +index 000000000..9d6c7786a +--- /dev/null ++++ b/include/asm-generic/kmap_size.h +@@ -0,0 +1,12 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++#ifndef _ASM_GENERIC_KMAP_SIZE_H ++#define _ASM_GENERIC_KMAP_SIZE_H ++ ++/* For debug this provides guard pages between the maps */ ++#ifdef CONFIG_DEBUG_HIGHMEM ++# define KM_MAX_IDX 33 ++#else ++# define KM_MAX_IDX 16 ++#endif ++ ++#endif +diff --git a/include/asm-generic/kmap_types.h b/include/asm-generic/kmap_types.h +deleted file mode 100644 +index 9f95b7b63..000000000 +--- a/include/asm-generic/kmap_types.h ++++ /dev/null +@@ -1,11 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef _ASM_GENERIC_KMAP_TYPES_H +-#define _ASM_GENERIC_KMAP_TYPES_H +- +-#ifdef __WITH_KM_FENCE +-# define KM_TYPE_NR 41 +-#else +-# define KM_TYPE_NR 20 +-#endif +- +-#endif +diff --git a/include/asm-generic/preempt.h b/include/asm-generic/preempt.h +index b4d43a4af..ac255e889 100644 +--- a/include/asm-generic/preempt.h ++++ b/include/asm-generic/preempt.h +@@ -79,6 +79,9 @@ static __always_inline bool should_resched(int preempt_offset) + } + + #ifdef CONFIG_PREEMPTION ++#ifdef CONFIG_PREEMPT_RT ++extern void preempt_schedule_lock(void); ++#endif + extern asmlinkage void preempt_schedule(void); + #define __preempt_schedule() preempt_schedule() + extern asmlinkage void preempt_schedule_notrace(void); +diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h +index 9ede0a81e..31a67de40 100644 +--- a/include/linux/blkdev.h ++++ b/include/linux/blkdev.h +@@ -166,7 +166,7 @@ struct request { + */ + union { + struct hlist_node hash; /* merge hash */ +- struct list_head ipi_list; ++ struct llist_node ipi_list; + }; + + /* +diff --git a/include/linux/bottom_half.h b/include/linux/bottom_half.h +index a19519f42..eed86eb0a 100644 +--- a/include/linux/bottom_half.h ++++ b/include/linux/bottom_half.h +@@ -4,7 +4,7 @@ + + #include + +-#ifdef CONFIG_TRACE_IRQFLAGS ++#if defined(CONFIG_PREEMPT_RT) || defined(CONFIG_TRACE_IRQFLAGS) + extern void __local_bh_disable_ip(unsigned long ip, unsigned int cnt); + #else + static __always_inline void __local_bh_disable_ip(unsigned long ip, unsigned int cnt) +@@ -32,4 +32,10 @@ static inline void local_bh_enable(void) + __local_bh_enable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); + } + ++#ifdef CONFIG_PREEMPT_RT ++extern bool local_bh_blocked(void); ++#else ++static inline bool local_bh_blocked(void) { return false; } ++#endif ++ + #endif /* _LINUX_BH_H */ +diff --git a/include/linux/console.h b/include/linux/console.h +index bc2a749e6..027278792 100644 +--- a/include/linux/console.h ++++ b/include/linux/console.h +@@ -16,6 +16,7 @@ + + #include + #include ++#include + + struct vc_data; + struct console_font_op; +@@ -137,10 +138,12 @@ static inline int con_debug_leave(void) + #define CON_ANYTIME (16) /* Safe to call when cpu is offline */ + #define CON_BRL (32) /* Used for a braille device */ + #define CON_EXTENDED (64) /* Use the extended output format a la /dev/kmsg */ ++#define CON_HANDOVER (128) /* Device was previously a boot console. */ + + struct console { + char name[16]; + void (*write)(struct console *, const char *, unsigned); ++ void (*write_atomic)(struct console *co, const char *s, unsigned int count); + int (*read)(struct console *, char *, unsigned); + struct tty_driver *(*device)(struct console *, int *); + void (*unblank)(void); +@@ -150,6 +153,11 @@ struct console { + short flags; + short index; + int cflag; ++#ifdef CONFIG_PRINTK ++ char sync_buf[CONSOLE_LOG_MAX]; ++#endif ++ atomic64_t printk_seq; ++ struct task_struct *thread; + uint ispeed; + uint ospeed; + void *data; +@@ -232,4 +240,7 @@ extern void console_init(void); + void dummycon_register_output_notifier(struct notifier_block *nb); + void dummycon_unregister_output_notifier(struct notifier_block *nb); + ++extern void console_atomic_lock(unsigned int *flags); ++extern void console_atomic_unlock(unsigned int flags); ++ + #endif /* _LINUX_CONSOLE_H */ +diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h +index b540e5a60..dacf87c92 100644 +--- a/include/linux/cpuhotplug.h ++++ b/include/linux/cpuhotplug.h +@@ -159,6 +159,7 @@ enum cpuhp_state { + CPUHP_AP_ONLINE, + CPUHP_TEARDOWN_CPU, + CPUHP_AP_ONLINE_IDLE, ++ CPUHP_AP_SCHED_WAIT_EMPTY, + CPUHP_AP_SMPBOOT_THREADS, + CPUHP_AP_X86_VDSO_VMA_ONLINE, + CPUHP_AP_IRQ_AFFINITY_ONLINE, +diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h +index 7cdec529b..3292c7ba0 100644 +--- a/include/linux/cpumask.h ++++ b/include/linux/cpumask.h +@@ -210,6 +210,11 @@ static inline int cpumask_any_and_distribute(const struct cpumask *src1p, + return cpumask_next_and(-1, src1p, src2p); + } + ++static inline int cpumask_any_distribute(const struct cpumask *srcp) ++{ ++ return cpumask_first(srcp); ++} ++ + #define for_each_cpu(cpu, mask) \ + for ((cpu) = 0; (cpu) < 1; (cpu)++, (void)mask) + #define for_each_cpu_not(cpu, mask) \ +@@ -263,6 +268,7 @@ int __pure cpumask_any_but(const struct cpumask *mask, unsigned int cpu); + unsigned int cpumask_local_spread(unsigned int i, int node); + int cpumask_any_and_distribute(const struct cpumask *src1p, + const struct cpumask *src2p); ++int cpumask_any_distribute(const struct cpumask *srcp); + + /** + * for_each_cpu - iterate over every cpu in a mask +diff --git a/include/linux/dcache.h b/include/linux/dcache.h +index 4bb8b1759..c5821c04a 100644 +--- a/include/linux/dcache.h ++++ b/include/linux/dcache.h +@@ -108,7 +108,7 @@ struct dentry { + + union { + struct list_head d_lru; /* LRU list */ +- wait_queue_head_t *d_wait; /* in-lookup ones only */ ++ struct swait_queue_head *d_wait; /* in-lookup ones only */ + }; + struct list_head d_child; /* child of parent list */ + struct list_head d_subdirs; /* our children */ +@@ -251,7 +251,7 @@ extern void d_set_d_op(struct dentry *dentry, const struct dentry_operations *op + extern struct dentry * d_alloc(struct dentry *, const struct qstr *); + extern struct dentry * d_alloc_anon(struct super_block *); + extern struct dentry * d_alloc_parallel(struct dentry *, const struct qstr *, +- wait_queue_head_t *); ++ struct swait_queue_head *); + extern struct dentry * d_splice_alias(struct inode *, struct dentry *); + extern struct dentry * d_add_ci(struct dentry *, struct inode *, struct qstr *); + extern struct dentry * d_exact_alias(struct dentry *, struct inode *); +diff --git a/include/linux/debug_locks.h b/include/linux/debug_locks.h +index edb5c186b..3f49e6516 100644 +--- a/include/linux/debug_locks.h ++++ b/include/linux/debug_locks.h +@@ -3,8 +3,7 @@ + #define __LINUX_DEBUG_LOCKING_H + + #include +-#include +-#include ++#include + + struct task_struct; + +diff --git a/include/linux/delay.h b/include/linux/delay.h +index e8607992c..cd24f34b4 100644 +--- a/include/linux/delay.h ++++ b/include/linux/delay.h +@@ -88,4 +88,10 @@ static inline void fsleep(unsigned long usecs) + msleep(DIV_ROUND_UP(usecs, 1000)); + } + ++#ifdef CONFIG_PREEMPT_RT ++extern void cpu_chill(void); ++#else ++# define cpu_chill() cpu_relax() ++#endif ++ + #endif /* defined(_LINUX_DELAY_H) */ +diff --git a/include/linux/entry-common.h b/include/linux/entry-common.h +index de029656d..6f262f3d6 100644 +--- a/include/linux/entry-common.h ++++ b/include/linux/entry-common.h +@@ -70,9 +70,10 @@ + + #define EXIT_TO_USER_MODE_WORK \ + (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_UPROBE | \ +- _TIF_NEED_RESCHED | _TIF_PATCH_PENDING | _TIF_NOTIFY_SIGNAL | \ ++ _TIF_NEED_RESCHED | _TIF_PATCH_PENDING | _TIF_NOTIFY_SIGNAL |_TIF_NEED_RESCHED_MASK | \ + ARCH_EXIT_TO_USER_MODE_WORK) + ++ + /** + * arch_check_user_regs - Architecture specific sanity check for user mode regs + * @regs: Pointer to currents pt_regs +diff --git a/include/linux/eventfd.h b/include/linux/eventfd.h +index 6cd2a92da..ab602b95d 100644 +--- a/include/linux/eventfd.h ++++ b/include/linux/eventfd.h +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + + /* + * CAREFUL: Check include/uapi/asm-generic/fcntl.h when defining +@@ -43,11 +44,9 @@ __u64 eventfd_signal_mask(struct eventfd_ctx *ctx, __u64 n, unsigned mask); + int eventfd_ctx_remove_wait_queue(struct eventfd_ctx *ctx, wait_queue_entry_t *wait, + __u64 *cnt); + +-DECLARE_PER_CPU(int, eventfd_wake_count); +- +-static inline bool eventfd_signal_count(void) ++static inline bool eventfd_signal_allowed(void) + { +- return this_cpu_read(eventfd_wake_count); ++ return !current->in_eventfd_signal; + } + + #else /* CONFIG_EVENTFD */ +@@ -84,9 +83,9 @@ static inline int eventfd_ctx_remove_wait_queue(struct eventfd_ctx *ctx, + return -ENOSYS; + } + +-static inline bool eventfd_signal_count(void) ++static inline bool eventfd_signal_allowed(void) + { +- return false; ++ return true; + } + + #endif +diff --git a/include/linux/fs.h b/include/linux/fs.h +index f6bb20f6f..e7d79fdf4 100644 +--- a/include/linux/fs.h ++++ b/include/linux/fs.h +@@ -724,7 +724,7 @@ struct inode { + struct block_device *i_bdev; + struct cdev *i_cdev; + char *i_link; +- unsigned i_dir_seq; ++ unsigned __i_dir_seq; + }; + + __u32 i_generation; +diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h +index 754f67ac4..76878b357 100644 +--- a/include/linux/hardirq.h ++++ b/include/linux/hardirq.h +@@ -6,6 +6,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -32,9 +33,9 @@ static __always_inline void rcu_irq_enter_check_tick(void) + */ + #define __irq_enter() \ + do { \ +- account_irq_enter_time(current); \ + preempt_count_add(HARDIRQ_OFFSET); \ + lockdep_hardirq_enter(); \ ++ account_hardirq_enter(current); \ + } while (0) + + /* +@@ -62,8 +63,8 @@ void irq_enter_rcu(void); + */ + #define __irq_exit() \ + do { \ ++ account_hardirq_exit(current); \ + lockdep_hardirq_exit(); \ +- account_irq_exit_time(current); \ + preempt_count_sub(HARDIRQ_OFFSET); \ + } while (0) + +@@ -115,7 +116,6 @@ extern void rcu_nmi_exit(void); + do { \ + lockdep_off(); \ + arch_nmi_enter(); \ +- printk_nmi_enter(); \ + BUG_ON(in_nmi() == NMI_MASK); \ + __preempt_count_add(NMI_OFFSET + HARDIRQ_OFFSET); \ + } while (0) +@@ -134,7 +134,6 @@ extern void rcu_nmi_exit(void); + do { \ + BUG_ON(!in_nmi()); \ + __preempt_count_sub(NMI_OFFSET + HARDIRQ_OFFSET); \ +- printk_nmi_exit(); \ + arch_nmi_exit(); \ + lockdep_on(); \ + } while (0) +diff --git a/include/linux/highmem-internal.h b/include/linux/highmem-internal.h +new file mode 100644 +index 000000000..f9bc6acd3 +--- /dev/null ++++ b/include/linux/highmem-internal.h +@@ -0,0 +1,222 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++#ifndef _LINUX_HIGHMEM_INTERNAL_H ++#define _LINUX_HIGHMEM_INTERNAL_H ++ ++/* ++ * Outside of CONFIG_HIGHMEM to support X86 32bit iomap_atomic() cruft. ++ */ ++#ifdef CONFIG_KMAP_LOCAL ++void *__kmap_local_pfn_prot(unsigned long pfn, pgprot_t prot); ++void *__kmap_local_page_prot(struct page *page, pgprot_t prot); ++void kunmap_local_indexed(void *vaddr); ++void kmap_local_fork(struct task_struct *tsk); ++void __kmap_local_sched_out(void); ++void __kmap_local_sched_in(void); ++static inline void kmap_assert_nomap(void) ++{ ++ DEBUG_LOCKS_WARN_ON(current->kmap_ctrl.idx); ++} ++#else ++static inline void kmap_local_fork(struct task_struct *tsk) { } ++static inline void kmap_assert_nomap(void) { } ++#endif ++ ++#ifdef CONFIG_HIGHMEM ++#include ++ ++#ifndef ARCH_HAS_KMAP_FLUSH_TLB ++static inline void kmap_flush_tlb(unsigned long addr) { } ++#endif ++ ++#ifndef kmap_prot ++#define kmap_prot PAGE_KERNEL ++#endif ++ ++void *kmap_high(struct page *page); ++void kunmap_high(struct page *page); ++void __kmap_flush_unused(void); ++struct page *__kmap_to_page(void *addr); ++ ++static inline void *kmap(struct page *page) ++{ ++ void *addr; ++ ++ might_sleep(); ++ if (!PageHighMem(page)) ++ addr = page_address(page); ++ else ++ addr = kmap_high(page); ++ kmap_flush_tlb((unsigned long)addr); ++ return addr; ++} ++ ++static inline void kunmap(struct page *page) ++{ ++ might_sleep(); ++ if (!PageHighMem(page)) ++ return; ++ kunmap_high(page); ++} ++ ++static inline struct page *kmap_to_page(void *addr) ++{ ++ return __kmap_to_page(addr); ++} ++ ++static inline void kmap_flush_unused(void) ++{ ++ __kmap_flush_unused(); ++} ++ ++static inline void *kmap_local_page(struct page *page) ++{ ++ return __kmap_local_page_prot(page, kmap_prot); ++} ++ ++static inline void *kmap_local_page_prot(struct page *page, pgprot_t prot) ++{ ++ return __kmap_local_page_prot(page, prot); ++} ++ ++static inline void *kmap_local_pfn(unsigned long pfn) ++{ ++ return __kmap_local_pfn_prot(pfn, kmap_prot); ++} ++ ++static inline void __kunmap_local(void *vaddr) ++{ ++ kunmap_local_indexed(vaddr); ++} ++ ++static inline void *kmap_atomic(struct page *page) ++{ ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ migrate_disable(); ++ else ++ preempt_disable(); ++ pagefault_disable(); ++ return __kmap_local_page_prot(page, kmap_prot); ++} ++ ++static inline void __kunmap_atomic(void *addr) ++{ ++ kunmap_local_indexed(addr); ++ pagefault_enable(); ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ migrate_enable(); ++ else ++ preempt_enable(); ++} ++ ++unsigned int __nr_free_highpages(void); ++extern atomic_long_t _totalhigh_pages; ++ ++static inline unsigned int nr_free_highpages(void) ++{ ++ return __nr_free_highpages(); ++} ++ ++static inline unsigned long totalhigh_pages(void) ++{ ++ return (unsigned long)atomic_long_read(&_totalhigh_pages); ++} ++ ++static inline void totalhigh_pages_inc(void) ++{ ++ atomic_long_inc(&_totalhigh_pages); ++} ++ ++static inline void totalhigh_pages_add(long count) ++{ ++ atomic_long_add(count, &_totalhigh_pages); ++} ++ ++#else /* CONFIG_HIGHMEM */ ++ ++static inline struct page *kmap_to_page(void *addr) ++{ ++ return virt_to_page(addr); ++} ++ ++static inline void *kmap(struct page *page) ++{ ++ might_sleep(); ++ return page_address(page); ++} ++ ++static inline void kunmap_high(struct page *page) { } ++static inline void kmap_flush_unused(void) { } ++ ++static inline void kunmap(struct page *page) ++{ ++#ifdef ARCH_HAS_FLUSH_ON_KUNMAP ++ kunmap_flush_on_unmap(page_address(page)); ++#endif ++} ++ ++static inline void *kmap_local_page(struct page *page) ++{ ++ return page_address(page); ++} ++ ++static inline void *kmap_local_page_prot(struct page *page, pgprot_t prot) ++{ ++ return kmap_local_page(page); ++} ++ ++static inline void *kmap_local_pfn(unsigned long pfn) ++{ ++ return kmap_local_page(pfn_to_page(pfn)); ++} ++ ++static inline void __kunmap_local(void *addr) ++{ ++#ifdef ARCH_HAS_FLUSH_ON_KUNMAP ++ kunmap_flush_on_unmap(addr); ++#endif ++} ++ ++static inline void *kmap_atomic(struct page *page) ++{ ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ migrate_disable(); ++ else ++ preempt_disable(); ++ pagefault_disable(); ++ return page_address(page); ++} ++ ++static inline void __kunmap_atomic(void *addr) ++{ ++#ifdef ARCH_HAS_FLUSH_ON_KUNMAP ++ kunmap_flush_on_unmap(addr); ++#endif ++ pagefault_enable(); ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ migrate_enable(); ++ else ++ preempt_enable(); ++} ++ ++static inline unsigned int nr_free_highpages(void) { return 0; } ++static inline unsigned long totalhigh_pages(void) { return 0UL; } ++ ++#endif /* CONFIG_HIGHMEM */ ++ ++/* ++ * Prevent people trying to call kunmap_atomic() as if it were kunmap() ++ * kunmap_atomic() should get the return value of kmap_atomic, not the page. ++ */ ++#define kunmap_atomic(__addr) \ ++do { \ ++ BUILD_BUG_ON(__same_type((__addr), struct page *)); \ ++ __kunmap_atomic(__addr); \ ++} while (0) ++ ++#define kunmap_local(__addr) \ ++do { \ ++ BUILD_BUG_ON(__same_type((__addr), struct page *)); \ ++ __kunmap_local(__addr); \ ++} while (0) ++ ++#endif +diff --git a/include/linux/highmem.h b/include/linux/highmem.h +index cc5fe6c62..77be3e318 100644 +--- a/include/linux/highmem.h ++++ b/include/linux/highmem.h +@@ -11,217 +11,137 @@ + + #include + +-#ifndef ARCH_HAS_FLUSH_ANON_PAGE +-static inline void flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) +-{ +-} +-#endif +- +-#ifndef ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE +-static inline void flush_kernel_dcache_page(struct page *page) +-{ +-} +-static inline void flush_kernel_vmap_range(void *vaddr, int size) +-{ +-} +-static inline void invalidate_kernel_vmap_range(void *vaddr, int size) +-{ +-} +-#endif +- +-#include +- +-#ifdef CONFIG_HIGHMEM +-extern void *kmap_atomic_high_prot(struct page *page, pgprot_t prot); +-extern void kunmap_atomic_high(void *kvaddr); +-#include +- +-#ifndef ARCH_HAS_KMAP_FLUSH_TLB +-static inline void kmap_flush_tlb(unsigned long addr) { } +-#endif +- +-#ifndef kmap_prot +-#define kmap_prot PAGE_KERNEL +-#endif +- +-void *kmap_high(struct page *page); +-static inline void *kmap(struct page *page) +-{ +- void *addr; +- +- might_sleep(); +- if (!PageHighMem(page)) +- addr = page_address(page); +- else +- addr = kmap_high(page); +- kmap_flush_tlb((unsigned long)addr); +- return addr; +-} +- +-void kunmap_high(struct page *page); +- +-static inline void kunmap(struct page *page) +-{ +- might_sleep(); +- if (!PageHighMem(page)) +- return; +- kunmap_high(page); +-} ++#include "highmem-internal.h" + +-/* +- * kmap_atomic/kunmap_atomic is significantly faster than kmap/kunmap because +- * no global lock is needed and because the kmap code must perform a global TLB +- * invalidation when the kmap pool wraps. ++/** ++ * kmap - Map a page for long term usage ++ * @page: Pointer to the page to be mapped ++ * ++ * Returns: The virtual address of the mapping + * +- * However when holding an atomic kmap it is not legal to sleep, so atomic +- * kmaps are appropriate for short, tight code paths only. ++ * Can only be invoked from preemptible task context because on 32bit ++ * systems with CONFIG_HIGHMEM enabled this function might sleep. + * +- * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap +- * gives a more generic (and caching) interface. But kmap_atomic can +- * be used in IRQ contexts, so in some (very limited) cases we need +- * it. ++ * For systems with CONFIG_HIGHMEM=n and for pages in the low memory area ++ * this returns the virtual address of the direct kernel mapping. ++ * ++ * The returned virtual address is globally visible and valid up to the ++ * point where it is unmapped via kunmap(). The pointer can be handed to ++ * other contexts. ++ * ++ * For highmem pages on 32bit systems this can be slow as the mapping space ++ * is limited and protected by a global lock. In case that there is no ++ * mapping slot available the function blocks until a slot is released via ++ * kunmap(). + */ +-static inline void *kmap_atomic_prot(struct page *page, pgprot_t prot) +-{ +- preempt_disable(); +- pagefault_disable(); +- if (!PageHighMem(page)) +- return page_address(page); +- return kmap_atomic_high_prot(page, prot); +-} +-#define kmap_atomic(page) kmap_atomic_prot(page, kmap_prot) ++static inline void *kmap(struct page *page); + +-/* declarations for linux/mm/highmem.c */ +-unsigned int nr_free_highpages(void); +-extern atomic_long_t _totalhigh_pages; +-static inline unsigned long totalhigh_pages(void) +-{ +- return (unsigned long)atomic_long_read(&_totalhigh_pages); +-} +- +-static inline void totalhigh_pages_inc(void) +-{ +- atomic_long_inc(&_totalhigh_pages); +-} +- +-static inline void totalhigh_pages_dec(void) +-{ +- atomic_long_dec(&_totalhigh_pages); +-} +- +-static inline void totalhigh_pages_add(long count) +-{ +- atomic_long_add(count, &_totalhigh_pages); +-} +- +-static inline void totalhigh_pages_set(long val) +-{ +- atomic_long_set(&_totalhigh_pages, val); +-} +- +-void kmap_flush_unused(void); +- +-struct page *kmap_to_page(void *addr); +- +-#else /* CONFIG_HIGHMEM */ ++/** ++ * kunmap - Unmap the virtual address mapped by kmap() ++ * @addr: Virtual address to be unmapped ++ * ++ * Counterpart to kmap(). A NOOP for CONFIG_HIGHMEM=n and for mappings of ++ * pages in the low memory area. ++ */ ++static inline void kunmap(struct page *page); + +-static inline unsigned int nr_free_highpages(void) { return 0; } ++/** ++ * kmap_to_page - Get the page for a kmap'ed address ++ * @addr: The address to look up ++ * ++ * Returns: The page which is mapped to @addr. ++ */ ++static inline struct page *kmap_to_page(void *addr); + +-static inline struct page *kmap_to_page(void *addr) +-{ +- return virt_to_page(addr); +-} ++/** ++ * kmap_flush_unused - Flush all unused kmap mappings in order to ++ * remove stray mappings ++ */ ++static inline void kmap_flush_unused(void); + +-static inline unsigned long totalhigh_pages(void) { return 0UL; } ++/** ++ * kmap_local_page - Map a page for temporary usage ++ * @page: Pointer to the page to be mapped ++ * ++ * Returns: The virtual address of the mapping ++ * ++ * Can be invoked from any context. ++ * ++ * Requires careful handling when nesting multiple mappings because the map ++ * management is stack based. The unmap has to be in the reverse order of ++ * the map operation: ++ * ++ * addr1 = kmap_local_page(page1); ++ * addr2 = kmap_local_page(page2); ++ * ... ++ * kunmap_local(addr2); ++ * kunmap_local(addr1); ++ * ++ * Unmapping addr1 before addr2 is invalid and causes malfunction. ++ * ++ * Contrary to kmap() mappings the mapping is only valid in the context of ++ * the caller and cannot be handed to other contexts. ++ * ++ * On CONFIG_HIGHMEM=n kernels and for low memory pages this returns the ++ * virtual address of the direct mapping. Only real highmem pages are ++ * temporarily mapped. ++ * ++ * While it is significantly faster than kmap() for the higmem case it ++ * comes with restrictions about the pointer validity. Only use when really ++ * necessary. ++ * ++ * On HIGHMEM enabled systems mapping a highmem page has the side effect of ++ * disabling migration in order to keep the virtual address stable across ++ * preemption. No caller of kmap_local_page() can rely on this side effect. ++ */ ++static inline void *kmap_local_page(struct page *page); + +-static inline void *kmap(struct page *page) +-{ +- might_sleep(); +- return page_address(page); +-} ++/** ++ * kmap_atomic - Atomically map a page for temporary usage - Deprecated! ++ * @page: Pointer to the page to be mapped ++ * ++ * Returns: The virtual address of the mapping ++ * ++ * Effectively a wrapper around kmap_local_page() which disables pagefaults ++ * and preemption. ++ * ++ * Do not use in new code. Use kmap_local_page() instead. ++ */ ++static inline void *kmap_atomic(struct page *page); + +-static inline void kunmap_high(struct page *page) +-{ +-} ++/** ++ * kunmap_atomic - Unmap the virtual address mapped by kmap_atomic() ++ * @addr: Virtual address to be unmapped ++ * ++ * Counterpart to kmap_atomic(). ++ * ++ * Effectively a wrapper around kunmap_local() which additionally undoes ++ * the side effects of kmap_atomic(), i.e. reenabling pagefaults and ++ * preemption. ++ */ + +-static inline void kunmap(struct page *page) +-{ +-#ifdef ARCH_HAS_FLUSH_ON_KUNMAP +- kunmap_flush_on_unmap(page_address(page)); +-#endif +-} ++/* Highmem related interfaces for management code */ ++static inline unsigned int nr_free_highpages(void); ++static inline unsigned long totalhigh_pages(void); + +-static inline void *kmap_atomic(struct page *page) ++#ifndef ARCH_HAS_FLUSH_ANON_PAGE ++static inline void flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) + { +- preempt_disable(); +- pagefault_disable(); +- return page_address(page); + } +-#define kmap_atomic_prot(page, prot) kmap_atomic(page) +- +-static inline void kunmap_atomic_high(void *addr) +-{ +- /* +- * Mostly nothing to do in the CONFIG_HIGHMEM=n case as kunmap_atomic() +- * handles re-enabling faults + preemption +- */ +-#ifdef ARCH_HAS_FLUSH_ON_KUNMAP +- kunmap_flush_on_unmap(addr); + #endif +-} +- +-#define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn)) +- +-#define kmap_flush_unused() do {} while(0) +- +-#endif /* CONFIG_HIGHMEM */ + +-#if defined(CONFIG_HIGHMEM) || defined(CONFIG_X86_32) +- +-DECLARE_PER_CPU(int, __kmap_atomic_idx); +- +-static inline int kmap_atomic_idx_push(void) ++#ifndef ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE ++static inline void flush_kernel_dcache_page(struct page *page) + { +- int idx = __this_cpu_inc_return(__kmap_atomic_idx) - 1; +- +-#ifdef CONFIG_DEBUG_HIGHMEM +- WARN_ON_ONCE(in_irq() && !irqs_disabled()); +- BUG_ON(idx >= KM_TYPE_NR); +-#endif +- return idx; + } +- +-static inline int kmap_atomic_idx(void) ++static inline void flush_kernel_vmap_range(void *vaddr, int size) + { +- return __this_cpu_read(__kmap_atomic_idx) - 1; + } +- +-static inline void kmap_atomic_idx_pop(void) ++static inline void invalidate_kernel_vmap_range(void *vaddr, int size) + { +-#ifdef CONFIG_DEBUG_HIGHMEM +- int idx = __this_cpu_dec_return(__kmap_atomic_idx); +- +- BUG_ON(idx < 0); +-#else +- __this_cpu_dec(__kmap_atomic_idx); +-#endif + } +- + #endif + +-/* +- * Prevent people trying to call kunmap_atomic() as if it were kunmap() +- * kunmap_atomic() should get the return value of kmap_atomic, not the page. +- */ +-#define kunmap_atomic(addr) \ +-do { \ +- BUILD_BUG_ON(__same_type((addr), struct page *)); \ +- kunmap_atomic_high(addr); \ +- pagefault_enable(); \ +- preempt_enable(); \ +-} while (0) +- +- + /* when CONFIG_HIGHMEM is not set these will be plain clear/copy_page */ + #ifndef clear_user_highpage + static inline void clear_user_highpage(struct page *page, unsigned long vaddr) +diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h +index 22240a8c3..fc162c252 100644 +--- a/include/linux/interrupt.h ++++ b/include/linux/interrupt.h +@@ -542,7 +542,7 @@ struct softirq_action + asmlinkage void do_softirq(void); + asmlinkage void __do_softirq(void); + +-#ifdef __ARCH_HAS_DO_SOFTIRQ ++#if defined(__ARCH_HAS_DO_SOFTIRQ) && !defined(CONFIG_PREEMPT_RT) + void do_softirq_own_stack(void); + #else + static inline void do_softirq_own_stack(void) +@@ -637,26 +637,21 @@ enum + TASKLET_STATE_RUN /* Tasklet is running (SMP only) */ + }; + +-#ifdef CONFIG_SMP ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT) + static inline int tasklet_trylock(struct tasklet_struct *t) + { + return !test_and_set_bit(TASKLET_STATE_RUN, &(t)->state); + } + +-static inline void tasklet_unlock(struct tasklet_struct *t) +-{ +- smp_mb__before_atomic(); +- clear_bit(TASKLET_STATE_RUN, &(t)->state); +-} ++void tasklet_unlock(struct tasklet_struct *t); ++void tasklet_unlock_wait(struct tasklet_struct *t); ++void tasklet_unlock_spin_wait(struct tasklet_struct *t); + +-static inline void tasklet_unlock_wait(struct tasklet_struct *t) +-{ +- while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { barrier(); } +-} + #else +-#define tasklet_trylock(t) 1 +-#define tasklet_unlock_wait(t) do { } while (0) +-#define tasklet_unlock(t) do { } while (0) ++static inline int tasklet_trylock(struct tasklet_struct *t) { return 1; } ++static inline void tasklet_unlock(struct tasklet_struct *t) { } ++static inline void tasklet_unlock_wait(struct tasklet_struct *t) { } ++static inline void tasklet_unlock_spin_wait(struct tasklet_struct *t) { } + #endif + + extern void __tasklet_schedule(struct tasklet_struct *t); +@@ -681,6 +676,17 @@ static inline void tasklet_disable_nosync(struct tasklet_struct *t) + smp_mb__after_atomic(); + } + ++/* ++ * Do not use in new code. Disabling tasklets from atomic contexts is ++ * error prone and should be avoided. ++ */ ++static inline void tasklet_disable_in_atomic(struct tasklet_struct *t) ++{ ++ tasklet_disable_nosync(t); ++ tasklet_unlock_spin_wait(t); ++ smp_mb(); ++} ++ + static inline void tasklet_disable(struct tasklet_struct *t) + { + tasklet_disable_nosync(t); +diff --git a/include/linux/io-mapping.h b/include/linux/io-mapping.h +index c75e4d3d8..4bb8223f2 100644 +--- a/include/linux/io-mapping.h ++++ b/include/linux/io-mapping.h +@@ -60,22 +60,20 @@ io_mapping_fini(struct io_mapping *mapping) + iomap_free(mapping->base, mapping->size); + } + +-/* Atomic map/unmap */ ++/* Temporary mappings which are only valid in the current context */ + static inline void __iomem * +-io_mapping_map_atomic_wc(struct io_mapping *mapping, +- unsigned long offset) ++io_mapping_map_local_wc(struct io_mapping *mapping, unsigned long offset) + { + resource_size_t phys_addr; + + BUG_ON(offset >= mapping->size); + phys_addr = mapping->base + offset; +- return iomap_atomic_prot_pfn(PHYS_PFN(phys_addr), mapping->prot); ++ return __iomap_local_pfn_prot(PHYS_PFN(phys_addr), mapping->prot); + } + +-static inline void +-io_mapping_unmap_atomic(void __iomem *vaddr) ++static inline void io_mapping_unmap_local(void __iomem *vaddr) + { +- iounmap_atomic(vaddr); ++ kunmap_local_indexed((void __force *)vaddr); + } + + static inline void __iomem * +@@ -97,7 +95,7 @@ io_mapping_unmap(void __iomem *vaddr) + iounmap(vaddr); + } + +-#else ++#else /* HAVE_ATOMIC_IOMAP */ + + #include + +@@ -144,25 +142,19 @@ io_mapping_unmap(void __iomem *vaddr) + { + } + +-/* Atomic map/unmap */ ++/* Temporary mappings which are only valid in the current context */ + static inline void __iomem * +-io_mapping_map_atomic_wc(struct io_mapping *mapping, +- unsigned long offset) ++io_mapping_map_local_wc(struct io_mapping *mapping, unsigned long offset) + { +- preempt_disable(); +- pagefault_disable(); + return io_mapping_map_wc(mapping, offset, PAGE_SIZE); + } + +-static inline void +-io_mapping_unmap_atomic(void __iomem *vaddr) ++static inline void io_mapping_unmap_local(void __iomem *vaddr) + { + io_mapping_unmap(vaddr); +- pagefault_enable(); +- preempt_enable(); + } + +-#endif /* HAVE_ATOMIC_IOMAP */ ++#endif /* !HAVE_ATOMIC_IOMAP */ + + static inline struct io_mapping * + io_mapping_create_wc(resource_size_t base, +diff --git a/include/linux/irq_cpustat.h b/include/linux/irq_cpustat.h +deleted file mode 100644 +index 6e8895cd4..000000000 +--- a/include/linux/irq_cpustat.h ++++ /dev/null +@@ -1,28 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef __irq_cpustat_h +-#define __irq_cpustat_h +- +-/* +- * Contains default mappings for irq_cpustat_t, used by almost every +- * architecture. Some arch (like s390) have per cpu hardware pages and +- * they define their own mappings for irq_stat. +- * +- * Keith Owens July 2000. +- */ +- +- +-/* +- * Simple wrappers reducing source bloat. Define all irq_stat fields +- * here, even ones that are arch dependent. That way we get common +- * definitions instead of differing sets for each arch. +- */ +- +-#ifndef __ARCH_IRQ_STAT +-DECLARE_PER_CPU_ALIGNED(irq_cpustat_t, irq_stat); /* defined in asm/hardirq.h */ +-#define __IRQ_STAT(cpu, member) (per_cpu(irq_stat.member, cpu)) +-#endif +- +-/* arch dependent irq_stat fields */ +-#define nmi_count(cpu) __IRQ_STAT((cpu), __nmi_count) /* i386 */ +- +-#endif /* __irq_cpustat_h */ +diff --git a/include/linux/irq_work.h b/include/linux/irq_work.h +index ec2a47a81..9448e2bfc 100644 +--- a/include/linux/irq_work.h ++++ b/include/linux/irq_work.h +@@ -3,6 +3,7 @@ + #define _LINUX_IRQ_WORK_H + + #include ++#include + + /* + * An entry can be in one of four states: +@@ -16,11 +17,13 @@ + struct irq_work { + struct __call_single_node node; + void (*func)(struct irq_work *); ++ struct rcuwait irqwait; + }; + + #define __IRQ_WORK_INIT(_func, _flags) (struct irq_work){ \ + .node = { .u_flags = (_flags), }, \ + .func = (_func), \ ++ .irqwait = __RCUWAIT_INITIALIZER(irqwait), \ + } + + #define IRQ_WORK_INIT(_func) __IRQ_WORK_INIT(_func, 0) +@@ -46,6 +49,11 @@ static inline bool irq_work_is_busy(struct irq_work *work) + return atomic_read(&work->node.a_flags) & IRQ_WORK_BUSY; + } + ++static inline bool irq_work_is_hard(struct irq_work *work) ++{ ++ return atomic_read(&work->node.a_flags) & IRQ_WORK_HARD_IRQ; ++} ++ + bool irq_work_queue(struct irq_work *work); + bool irq_work_queue_on(struct irq_work *work, int cpu); + +diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h +index dc1b213ae..9bbcd8cba 100644 +--- a/include/linux/irqdesc.h ++++ b/include/linux/irqdesc.h +@@ -68,6 +68,7 @@ struct irq_desc { + unsigned int irqs_unhandled; + atomic_t threads_handled; + int threads_handled_last; ++ u64 random_ip; + raw_spinlock_t lock; + struct cpumask *percpu_enabled; + const struct cpumask *percpu_affinity; +diff --git a/include/linux/irqflags.h b/include/linux/irqflags.h +index fef2d43a7..741aa2008 100644 +--- a/include/linux/irqflags.h ++++ b/include/linux/irqflags.h +@@ -71,14 +71,6 @@ do { \ + do { \ + __this_cpu_dec(hardirq_context); \ + } while (0) +-# define lockdep_softirq_enter() \ +-do { \ +- current->softirq_context++; \ +-} while (0) +-# define lockdep_softirq_exit() \ +-do { \ +- current->softirq_context--; \ +-} while (0) + + # define lockdep_hrtimer_enter(__hrtimer) \ + ({ \ +@@ -140,6 +132,21 @@ do { \ + # define lockdep_irq_work_exit(__work) do { } while (0) + #endif + ++#if defined(CONFIG_TRACE_IRQFLAGS) && !defined(CONFIG_PREEMPT_RT) ++# define lockdep_softirq_enter() \ ++do { \ ++ current->softirq_context++; \ ++} while (0) ++# define lockdep_softirq_exit() \ ++do { \ ++ current->softirq_context--; \ ++} while (0) ++ ++#else ++# define lockdep_softirq_enter() do { } while (0) ++# define lockdep_softirq_exit() do { } while (0) ++#endif ++ + #if defined(CONFIG_IRQSOFF_TRACER) || \ + defined(CONFIG_PREEMPT_TRACER) + extern void stop_critical_timings(void); +diff --git a/include/linux/kernel.h b/include/linux/kernel.h +index e1d66cc50..727913a6f 100644 +--- a/include/linux/kernel.h ++++ b/include/linux/kernel.h +@@ -220,6 +220,7 @@ static __always_inline void might_resched(void) + extern void ___might_sleep(const char *file, int line, int preempt_offset); + extern void __might_sleep(const char *file, int line, int preempt_offset); + extern void __cant_sleep(const char *file, int line, int preempt_offset); ++extern void __cant_migrate(const char *file, int line); + + /** + * might_sleep - annotation for functions that can sleep +@@ -235,6 +236,10 @@ extern void __cant_sleep(const char *file, int line, int preempt_offset); + */ + # define might_sleep() \ + do { __might_sleep(__FILE__, __LINE__, 0); might_resched(); } while (0) ++ ++# define might_sleep_no_state_check() \ ++ do { ___might_sleep(__FILE__, __LINE__, 0); } while (0) ++ + /** + * cant_sleep - annotation for functions that cannot sleep + * +@@ -243,6 +248,18 @@ extern void __cant_sleep(const char *file, int line, int preempt_offset); + # define cant_sleep() \ + do { __cant_sleep(__FILE__, __LINE__, 0); } while (0) + # define sched_annotate_sleep() (current->task_state_change = 0) ++ ++/** ++ * cant_migrate - annotation for functions that cannot migrate ++ * ++ * Will print a stack trace if executed in code which is migratable ++ */ ++# define cant_migrate() \ ++ do { \ ++ if (IS_ENABLED(CONFIG_SMP)) \ ++ __cant_migrate(__FILE__, __LINE__); \ ++ } while (0) ++ + /** + * non_block_start - annotate the start of section where sleeping is prohibited + * +@@ -266,7 +283,9 @@ extern void __cant_sleep(const char *file, int line, int preempt_offset); + static inline void __might_sleep(const char *file, int line, + int preempt_offset) { } + # define might_sleep() do { might_resched(); } while (0) ++# define might_sleep_no_state_check() do { might_resched(); } while (0) + # define cant_sleep() do { } while (0) ++# define cant_migrate() do { } while (0) + # define sched_annotate_sleep() do { } while (0) + # define non_block_start() do { } while (0) + # define non_block_end() do { } while (0) +@@ -274,13 +293,6 @@ extern void __cant_sleep(const char *file, int line, int preempt_offset); + + #define might_sleep_if(cond) do { if (cond) might_sleep(); } while (0) + +-#ifndef CONFIG_PREEMPT_RT +-# define cant_migrate() cant_sleep() +-#else +- /* Placeholder for now */ +-# define cant_migrate() do { } while (0) +-#endif +- + /** + * abs - return absolute value of an argument + * @x: the value. If it is unsigned type, it is converted to signed type first. +diff --git a/include/linux/kmsg_dump.h b/include/linux/kmsg_dump.h +index 3378bcbe5..86673930c 100644 +--- a/include/linux/kmsg_dump.h ++++ b/include/linux/kmsg_dump.h +@@ -29,6 +29,18 @@ enum kmsg_dump_reason { + KMSG_DUMP_MAX + }; + ++/** ++ * struct kmsg_dumper_iter - iterator for kernel crash message dumper ++ * @active: Flag that specifies if this is currently dumping ++ * @cur_seq: Points to the oldest message to dump (private) ++ * @next_seq: Points after the newest message to dump (private) ++ */ ++struct kmsg_dumper_iter { ++ bool active; ++ u64 cur_seq; ++ u64 next_seq; ++}; ++ + /** + * struct kmsg_dumper - kernel crash message dumper structure + * @list: Entry in the dumper list (private) +@@ -39,33 +51,22 @@ enum kmsg_dump_reason { + */ + struct kmsg_dumper { + struct list_head list; +- void (*dump)(struct kmsg_dumper *dumper, enum kmsg_dump_reason reason); ++ void (*dump)(struct kmsg_dumper *dumper, enum kmsg_dump_reason reason, ++ struct kmsg_dumper_iter *iter); + enum kmsg_dump_reason max_reason; +- bool active; + bool registered; +- +- /* private state of the kmsg iterator */ +- u32 cur_idx; +- u32 next_idx; +- u64 cur_seq; +- u64 next_seq; + }; + + #ifdef CONFIG_PRINTK + void kmsg_dump(enum kmsg_dump_reason reason); + +-bool kmsg_dump_get_line_nolock(struct kmsg_dumper *dumper, bool syslog, +- char *line, size_t size, size_t *len); +- +-bool kmsg_dump_get_line(struct kmsg_dumper *dumper, bool syslog, ++bool kmsg_dump_get_line(struct kmsg_dumper_iter *iter, bool syslog, + char *line, size_t size, size_t *len); + +-bool kmsg_dump_get_buffer(struct kmsg_dumper *dumper, bool syslog, +- char *buf, size_t size, size_t *len); +- +-void kmsg_dump_rewind_nolock(struct kmsg_dumper *dumper); ++bool kmsg_dump_get_buffer(struct kmsg_dumper_iter *iter, bool syslog, ++ char *buf, size_t size, size_t *len_out); + +-void kmsg_dump_rewind(struct kmsg_dumper *dumper); ++void kmsg_dump_rewind(struct kmsg_dumper_iter *iter); + + int kmsg_dump_register(struct kmsg_dumper *dumper); + +@@ -77,30 +78,19 @@ static inline void kmsg_dump(enum kmsg_dump_reason reason) + { + } + +-static inline bool kmsg_dump_get_line_nolock(struct kmsg_dumper *dumper, +- bool syslog, const char *line, +- size_t size, size_t *len) +-{ +- return false; +-} +- +-static inline bool kmsg_dump_get_line(struct kmsg_dumper *dumper, bool syslog, ++static inline bool kmsg_dump_get_line(struct kmsg_dumper_iter *iter, bool syslog, + const char *line, size_t size, size_t *len) + { + return false; + } + +-static inline bool kmsg_dump_get_buffer(struct kmsg_dumper *dumper, bool syslog, ++static inline bool kmsg_dump_get_buffer(struct kmsg_dumper_iter *iter, bool syslog, + char *buf, size_t size, size_t *len) + { + return false; + } + +-static inline void kmsg_dump_rewind_nolock(struct kmsg_dumper *dumper) +-{ +-} +- +-static inline void kmsg_dump_rewind(struct kmsg_dumper *dumper) ++static inline void kmsg_dump_rewind(struct kmsg_dumper_iter *iter) + { + } + +diff --git a/include/linux/local_lock_internal.h b/include/linux/local_lock_internal.h +index 3f02b8186..1b8ae0349 100644 +--- a/include/linux/local_lock_internal.h ++++ b/include/linux/local_lock_internal.h +@@ -7,13 +7,39 @@ + #include + + typedef struct { +-#ifdef CONFIG_DEBUG_LOCK_ALLOC ++#ifdef CONFIG_PREEMPT_RT ++ spinlock_t lock; ++ struct task_struct *owner; ++ int nestcnt; ++ ++#elif defined(CONFIG_DEBUG_LOCK_ALLOC) + struct lockdep_map dep_map; + struct task_struct *owner; + #endif + } local_lock_t; + +-#ifdef CONFIG_DEBUG_LOCK_ALLOC ++#ifdef CONFIG_PREEMPT_RT ++ ++#define INIT_LOCAL_LOCK(lockname) { \ ++ __SPIN_LOCK_UNLOCKED((lockname).lock), \ ++ .owner = NULL, \ ++ .nestcnt = 0, \ ++ } ++ ++static inline void ___local_lock_init(local_lock_t *l) ++{ ++ l->owner = NULL; ++ l->nestcnt = 0; ++} ++ ++#define __local_lock_init(l) \ ++do { \ ++ spin_lock_init(&(l)->lock); \ ++ ___local_lock_init(l); \ ++} while (0) ++ ++#elif defined(CONFIG_DEBUG_LOCK_ALLOC) ++ + # define LOCAL_LOCK_DEBUG_INIT(lockname) \ + .dep_map = { \ + .name = #lockname, \ +@@ -21,7 +47,33 @@ typedef struct { + .lock_type = LD_LOCK_PERCPU, \ + }, \ + .owner = NULL, ++#endif ++ ++#ifdef CONFIG_PREEMPT_RT + ++static inline void local_lock_acquire(local_lock_t *l) ++{ ++ if (l->owner != current) { ++ spin_lock(&l->lock); ++ DEBUG_LOCKS_WARN_ON(l->owner); ++ DEBUG_LOCKS_WARN_ON(l->nestcnt); ++ l->owner = current; ++ } ++ l->nestcnt++; ++} ++ ++static inline void local_lock_release(local_lock_t *l) ++{ ++ DEBUG_LOCKS_WARN_ON(l->nestcnt == 0); ++ DEBUG_LOCKS_WARN_ON(l->owner != current); ++ if (--l->nestcnt) ++ return; ++ ++ l->owner = NULL; ++ spin_unlock(&l->lock); ++} ++ ++#elif defined(CONFIG_DEBUG_LOCK_ALLOC) + static inline void local_lock_acquire(local_lock_t *l) + { + lock_map_acquire(&l->dep_map); +@@ -47,6 +99,47 @@ static inline void local_lock_release(local_lock_t *l) { } + static inline void local_lock_debug_init(local_lock_t *l) { } + #endif /* !CONFIG_DEBUG_LOCK_ALLOC */ + ++#ifdef CONFIG_PREEMPT_RT ++ ++#define __local_lock(lock) \ ++ do { \ ++ migrate_disable(); \ ++ local_lock_acquire(this_cpu_ptr(lock)); \ ++ } while (0) ++ ++#define __local_unlock(lock) \ ++ do { \ ++ local_lock_release(this_cpu_ptr(lock)); \ ++ migrate_enable(); \ ++ } while (0) ++ ++#define __local_lock_irq(lock) \ ++ do { \ ++ migrate_disable(); \ ++ local_lock_acquire(this_cpu_ptr(lock)); \ ++ } while (0) ++ ++#define __local_lock_irqsave(lock, flags) \ ++ do { \ ++ migrate_disable(); \ ++ flags = 0; \ ++ local_lock_acquire(this_cpu_ptr(lock)); \ ++ } while (0) ++ ++#define __local_unlock_irq(lock) \ ++ do { \ ++ local_lock_release(this_cpu_ptr(lock)); \ ++ migrate_enable(); \ ++ } while (0) ++ ++#define __local_unlock_irqrestore(lock, flags) \ ++ do { \ ++ local_lock_release(this_cpu_ptr(lock)); \ ++ migrate_enable(); \ ++ } while (0) ++ ++#else ++ + #define INIT_LOCAL_LOCK(lockname) { LOCAL_LOCK_DEBUG_INIT(lockname) } + + #define __local_lock_init(lock) \ +@@ -66,6 +159,12 @@ do { \ + local_lock_acquire(this_cpu_ptr(lock)); \ + } while (0) + ++#define __local_unlock(lock) \ ++ do { \ ++ local_lock_release(this_cpu_ptr(lock)); \ ++ preempt_enable(); \ ++ } while (0) ++ + #define __local_lock_irq(lock) \ + do { \ + local_irq_disable(); \ +@@ -78,12 +177,6 @@ do { \ + local_lock_acquire(this_cpu_ptr(lock)); \ + } while (0) + +-#define __local_unlock(lock) \ +- do { \ +- local_lock_release(this_cpu_ptr(lock)); \ +- preempt_enable(); \ +- } while (0) +- + #define __local_unlock_irq(lock) \ + do { \ + local_lock_release(this_cpu_ptr(lock)); \ +@@ -95,3 +188,5 @@ do { \ + local_lock_release(this_cpu_ptr(lock)); \ + local_irq_restore(flags); \ + } while (0) ++ ++#endif +diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h +index 70128b118..6ef770974 100644 +--- a/include/linux/mm_types.h ++++ b/include/linux/mm_types.h +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -603,6 +604,9 @@ struct mm_struct { + bool tlb_flush_batched; + #endif + struct uprobes_state uprobes_state; ++#ifdef CONFIG_PREEMPT_RT ++ struct rcu_head delayed_drop; ++#endif + #ifdef CONFIG_HUGETLB_PAGE + atomic_long_t hugetlb_usage; + #endif +diff --git a/include/linux/mutex.h b/include/linux/mutex.h +index 4d671fba3..90923d300 100644 +--- a/include/linux/mutex.h ++++ b/include/linux/mutex.h +@@ -22,6 +22,20 @@ + + struct ww_acquire_ctx; + ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define __DEP_MAP_MUTEX_INITIALIZER(lockname) \ ++ , .dep_map = { \ ++ .name = #lockname, \ ++ .wait_type_inner = LD_WAIT_SLEEP, \ ++ } ++#else ++# define __DEP_MAP_MUTEX_INITIALIZER(lockname) ++#endif ++ ++#ifdef CONFIG_PREEMPT_RT ++# include ++#else ++ + /* + * Simple, straightforward mutexes with strict semantics: + * +@@ -68,14 +82,6 @@ struct mutex { + struct ww_class; + struct ww_acquire_ctx; + +-struct ww_mutex { +- struct mutex base; +- struct ww_acquire_ctx *ctx; +-#ifdef CONFIG_DEBUG_MUTEXES +- struct ww_class *ww_class; +-#endif +-}; +- + /* + * This is the control structure for tasks blocked on mutex, + * which resides on the blocked task's kernel stack: +@@ -119,16 +125,6 @@ do { \ + __mutex_init((mutex), #mutex, &__key); \ + } while (0) + +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +-# define __DEP_MAP_MUTEX_INITIALIZER(lockname) \ +- , .dep_map = { \ +- .name = #lockname, \ +- .wait_type_inner = LD_WAIT_SLEEP, \ +- } +-#else +-# define __DEP_MAP_MUTEX_INITIALIZER(lockname) +-#endif +- + #define __MUTEX_INITIALIZER(lockname) \ + { .owner = ATOMIC_LONG_INIT(0) \ + , .wait_lock = __SPIN_LOCK_UNLOCKED(lockname.wait_lock) \ +@@ -224,4 +220,6 @@ enum mutex_trylock_recursive_enum { + extern /* __deprecated */ __must_check enum mutex_trylock_recursive_enum + mutex_trylock_recursive(struct mutex *lock); + ++#endif /* !PREEMPT_RT */ ++ + #endif /* __LINUX_MUTEX_H */ +diff --git a/include/linux/mutex_rt.h b/include/linux/mutex_rt.h +new file mode 100644 +index 000000000..f0b2e07cd +--- /dev/null ++++ b/include/linux/mutex_rt.h +@@ -0,0 +1,130 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++#ifndef __LINUX_MUTEX_RT_H ++#define __LINUX_MUTEX_RT_H ++ ++#ifndef __LINUX_MUTEX_H ++#error "Please include mutex.h" ++#endif ++ ++#include ++ ++/* FIXME: Just for __lockfunc */ ++#include ++ ++struct mutex { ++ struct rt_mutex lock; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++}; ++ ++#define __MUTEX_INITIALIZER(mutexname) \ ++ { \ ++ .lock = __RT_MUTEX_INITIALIZER(mutexname.lock) \ ++ __DEP_MAP_MUTEX_INITIALIZER(mutexname) \ ++ } ++ ++#define DEFINE_MUTEX(mutexname) \ ++ struct mutex mutexname = __MUTEX_INITIALIZER(mutexname) ++ ++extern void __mutex_do_init(struct mutex *lock, const char *name, struct lock_class_key *key); ++extern void __lockfunc _mutex_lock(struct mutex *lock); ++extern void __lockfunc _mutex_lock_io_nested(struct mutex *lock, int subclass); ++extern int __lockfunc _mutex_lock_interruptible(struct mutex *lock); ++extern int __lockfunc _mutex_lock_killable(struct mutex *lock); ++extern void __lockfunc _mutex_lock_nested(struct mutex *lock, int subclass); ++extern void __lockfunc _mutex_lock_nest_lock(struct mutex *lock, struct lockdep_map *nest_lock); ++extern int __lockfunc _mutex_lock_interruptible_nested(struct mutex *lock, int subclass); ++extern int __lockfunc _mutex_lock_killable_nested(struct mutex *lock, int subclass); ++extern int __lockfunc _mutex_trylock(struct mutex *lock); ++extern void __lockfunc _mutex_unlock(struct mutex *lock); ++ ++#define mutex_is_locked(l) rt_mutex_is_locked(&(l)->lock) ++#define mutex_lock(l) _mutex_lock(l) ++#define mutex_lock_interruptible(l) _mutex_lock_interruptible(l) ++#define mutex_lock_killable(l) _mutex_lock_killable(l) ++#define mutex_trylock(l) _mutex_trylock(l) ++#define mutex_unlock(l) _mutex_unlock(l) ++#define mutex_lock_io(l) _mutex_lock_io_nested(l, 0); ++ ++#define __mutex_owner(l) ((l)->lock.owner) ++ ++#ifdef CONFIG_DEBUG_MUTEXES ++#define mutex_destroy(l) rt_mutex_destroy(&(l)->lock) ++#else ++static inline void mutex_destroy(struct mutex *lock) {} ++#endif ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define mutex_lock_nested(l, s) _mutex_lock_nested(l, s) ++# define mutex_lock_interruptible_nested(l, s) \ ++ _mutex_lock_interruptible_nested(l, s) ++# define mutex_lock_killable_nested(l, s) \ ++ _mutex_lock_killable_nested(l, s) ++# define mutex_lock_io_nested(l, s) _mutex_lock_io_nested(l, s) ++ ++# define mutex_lock_nest_lock(lock, nest_lock) \ ++do { \ ++ typecheck(struct lockdep_map *, &(nest_lock)->dep_map); \ ++ _mutex_lock_nest_lock(lock, &(nest_lock)->dep_map); \ ++} while (0) ++ ++#else ++# define mutex_lock_nested(l, s) _mutex_lock(l) ++# define mutex_lock_interruptible_nested(l, s) \ ++ _mutex_lock_interruptible(l) ++# define mutex_lock_killable_nested(l, s) \ ++ _mutex_lock_killable(l) ++# define mutex_lock_nest_lock(lock, nest_lock) mutex_lock(lock) ++# define mutex_lock_io_nested(l, s) _mutex_lock_io_nested(l, s) ++#endif ++ ++# define mutex_init(mutex) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ rt_mutex_init(&(mutex)->lock); \ ++ __mutex_do_init((mutex), #mutex, &__key); \ ++} while (0) ++ ++# define __mutex_init(mutex, name, key) \ ++do { \ ++ rt_mutex_init(&(mutex)->lock); \ ++ __mutex_do_init((mutex), name, key); \ ++} while (0) ++ ++/** ++ * These values are chosen such that FAIL and SUCCESS match the ++ * values of the regular mutex_trylock(). ++ */ ++enum mutex_trylock_recursive_enum { ++ MUTEX_TRYLOCK_FAILED = 0, ++ MUTEX_TRYLOCK_SUCCESS = 1, ++ MUTEX_TRYLOCK_RECURSIVE, ++}; ++/** ++ * mutex_trylock_recursive - trylock variant that allows recursive locking ++ * @lock: mutex to be locked ++ * ++ * This function should not be used, _ever_. It is purely for hysterical GEM ++ * raisins, and once those are gone this will be removed. ++ * ++ * Returns: ++ * MUTEX_TRYLOCK_FAILED - trylock failed, ++ * MUTEX_TRYLOCK_SUCCESS - lock acquired, ++ * MUTEX_TRYLOCK_RECURSIVE - we already owned the lock. ++ */ ++int __rt_mutex_owner_current(struct rt_mutex *lock); ++ ++static inline /* __deprecated */ __must_check enum mutex_trylock_recursive_enum ++mutex_trylock_recursive(struct mutex *lock) ++{ ++ if (unlikely(__rt_mutex_owner_current(&lock->lock))) ++ return MUTEX_TRYLOCK_RECURSIVE; ++ ++ return mutex_trylock(lock); ++} ++ ++extern int atomic_dec_and_mutex_lock(atomic_t *cnt, struct mutex *lock); ++ ++#endif +diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h +index 5491ad5f4..cd9e5b3f1 100644 +--- a/include/linux/nfs_xdr.h ++++ b/include/linux/nfs_xdr.h +@@ -1675,7 +1675,7 @@ struct nfs_unlinkdata { + struct nfs_removeargs args; + struct nfs_removeres res; + struct dentry *dentry; +- wait_queue_head_t wq; ++ struct swait_queue_head wq; + const struct cred *cred; + struct nfs_fattr dir_attr; + long timeout; +diff --git a/include/linux/notifier.h b/include/linux/notifier.h +index 2fb373a5c..723bc2df6 100644 +--- a/include/linux/notifier.h ++++ b/include/linux/notifier.h +@@ -58,7 +58,7 @@ struct notifier_block { + }; + + struct atomic_notifier_head { +- spinlock_t lock; ++ raw_spinlock_t lock; + struct notifier_block __rcu *head; + }; + +@@ -78,7 +78,7 @@ struct srcu_notifier_head { + }; + + #define ATOMIC_INIT_NOTIFIER_HEAD(name) do { \ +- spin_lock_init(&(name)->lock); \ ++ raw_spin_lock_init(&(name)->lock); \ + (name)->head = NULL; \ + } while (0) + #define BLOCKING_INIT_NOTIFIER_HEAD(name) do { \ +@@ -95,7 +95,7 @@ extern void srcu_init_notifier_head(struct srcu_notifier_head *nh); + cleanup_srcu_struct(&(name)->srcu); + + #define ATOMIC_NOTIFIER_INIT(name) { \ +- .lock = __SPIN_LOCK_UNLOCKED(name.lock), \ ++ .lock = __RAW_SPIN_LOCK_UNLOCKED(name.lock), \ + .head = NULL } + #define BLOCKING_NOTIFIER_INIT(name) { \ + .rwsem = __RWSEM_INITIALIZER((name).rwsem), \ +diff --git a/include/linux/pid.h b/include/linux/pid.h +index 34afff2dc..514dd026c 100644 +--- a/include/linux/pid.h ++++ b/include/linux/pid.h +@@ -3,6 +3,7 @@ + #define _LINUX_PID_H + + #include ++#include + #include + #include + +diff --git a/include/linux/preempt.h b/include/linux/preempt.h +index 7d9c1c0e1..5253f8a31 100644 +--- a/include/linux/preempt.h ++++ b/include/linux/preempt.h +@@ -77,31 +77,37 @@ + /* preempt_count() and related functions, depends on PREEMPT_NEED_RESCHED */ + #include + ++#define nmi_count() (preempt_count() & NMI_MASK) + #define hardirq_count() (preempt_count() & HARDIRQ_MASK) +-#define softirq_count() (preempt_count() & SOFTIRQ_MASK) +-#define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK \ +- | NMI_MASK)) ++#ifdef CONFIG_PREEMPT_RT ++# define softirq_count() (current->softirq_disable_cnt & SOFTIRQ_MASK) ++#else ++# define softirq_count() (preempt_count() & SOFTIRQ_MASK) ++#endif ++#define irq_count() (nmi_count() | hardirq_count() | softirq_count()) + + /* +- * Are we doing bottom half or hardware interrupt processing? ++ * Macros to retrieve the current execution context: + * +- * in_irq() - We're in (hard) IRQ context ++ * in_nmi() - We're in NMI context ++ * in_hardirq() - We're in hard IRQ context ++ * in_serving_softirq() - We're in softirq context ++ * in_task() - We're in task context ++ */ ++#define in_nmi() (nmi_count()) ++#define in_hardirq() (hardirq_count()) ++#define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET) ++#define in_task() (!(in_nmi() | in_hardirq() | in_serving_softirq())) ++ ++/* ++ * The following macros are deprecated and should not be used in new code: ++ * in_irq() - Obsolete version of in_hardirq() + * in_softirq() - We have BH disabled, or are processing softirqs + * in_interrupt() - We're in NMI,IRQ,SoftIRQ context or have BH disabled +- * in_serving_softirq() - We're in softirq context +- * in_nmi() - We're in NMI context +- * in_task() - We're in task context +- * +- * Note: due to the BH disabled confusion: in_softirq(),in_interrupt() really +- * should not be used in new code. + */ + #define in_irq() (hardirq_count()) + #define in_softirq() (softirq_count()) + #define in_interrupt() (irq_count()) +-#define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET) +-#define in_nmi() (preempt_count() & NMI_MASK) +-#define in_task() (!(preempt_count() & \ +- (NMI_MASK | HARDIRQ_MASK | SOFTIRQ_OFFSET))) + + /* + * The preempt_count offset after preempt_disable(); +@@ -115,7 +121,11 @@ + /* + * The preempt_count offset after spin_lock() + */ ++#if !defined(CONFIG_PREEMPT_RT) + #define PREEMPT_LOCK_OFFSET PREEMPT_DISABLE_OFFSET ++#else ++#define PREEMPT_LOCK_OFFSET 0 ++#endif + + /* + * The preempt_count offset needed for things like: +@@ -164,6 +174,20 @@ extern void preempt_count_sub(int val); + #define preempt_count_inc() preempt_count_add(1) + #define preempt_count_dec() preempt_count_sub(1) + ++#ifdef CONFIG_PREEMPT_LAZY ++#define add_preempt_lazy_count(val) do { preempt_lazy_count() += (val); } while (0) ++#define sub_preempt_lazy_count(val) do { preempt_lazy_count() -= (val); } while (0) ++#define inc_preempt_lazy_count() add_preempt_lazy_count(1) ++#define dec_preempt_lazy_count() sub_preempt_lazy_count(1) ++#define preempt_lazy_count() (current_thread_info()->preempt_lazy_count) ++#else ++#define add_preempt_lazy_count(val) do { } while (0) ++#define sub_preempt_lazy_count(val) do { } while (0) ++#define inc_preempt_lazy_count() do { } while (0) ++#define dec_preempt_lazy_count() do { } while (0) ++#define preempt_lazy_count() (0) ++#endif ++ + #ifdef CONFIG_PREEMPT_COUNT + + #define preempt_disable() \ +@@ -172,13 +196,25 @@ do { \ + barrier(); \ + } while (0) + ++#define preempt_lazy_disable() \ ++do { \ ++ inc_preempt_lazy_count(); \ ++ barrier(); \ ++} while (0) ++ + #define sched_preempt_enable_no_resched() \ + do { \ + barrier(); \ + preempt_count_dec(); \ + } while (0) + +-#define preempt_enable_no_resched() sched_preempt_enable_no_resched() ++#ifndef CONFIG_PREEMPT_RT ++# define preempt_enable_no_resched() sched_preempt_enable_no_resched() ++# define preempt_check_resched_rt() barrier(); ++#else ++# define preempt_enable_no_resched() preempt_enable() ++# define preempt_check_resched_rt() preempt_check_resched() ++#endif + + #define preemptible() (preempt_count() == 0 && !irqs_disabled()) + +@@ -203,6 +239,18 @@ do { \ + __preempt_schedule(); \ + } while (0) + ++/* ++ * open code preempt_check_resched() because it is not exported to modules and ++ * used by local_unlock() or bpf_enable_instrumentation(). ++ */ ++#define preempt_lazy_enable() \ ++do { \ ++ dec_preempt_lazy_count(); \ ++ barrier(); \ ++ if (should_resched(0)) \ ++ __preempt_schedule(); \ ++} while (0) ++ + #else /* !CONFIG_PREEMPTION */ + #define preempt_enable() \ + do { \ +@@ -210,6 +258,12 @@ do { \ + preempt_count_dec(); \ + } while (0) + ++#define preempt_lazy_enable() \ ++do { \ ++ dec_preempt_lazy_count(); \ ++ barrier(); \ ++} while (0) ++ + #define preempt_enable_notrace() \ + do { \ + barrier(); \ +@@ -248,8 +302,12 @@ do { \ + #define preempt_disable_notrace() barrier() + #define preempt_enable_no_resched_notrace() barrier() + #define preempt_enable_notrace() barrier() ++#define preempt_check_resched_rt() barrier() + #define preemptible() 0 + ++#define preempt_lazy_disable() barrier() ++#define preempt_lazy_enable() barrier() ++ + #endif /* CONFIG_PREEMPT_COUNT */ + + #ifdef MODULE +@@ -268,10 +326,22 @@ do { \ + } while (0) + #define preempt_fold_need_resched() \ + do { \ +- if (tif_need_resched()) \ ++ if (tif_need_resched_now()) \ + set_preempt_need_resched(); \ + } while (0) + ++#ifdef CONFIG_PREEMPT_RT ++# define preempt_disable_rt() preempt_disable() ++# define preempt_enable_rt() preempt_enable() ++# define preempt_disable_nort() barrier() ++# define preempt_enable_nort() barrier() ++#else ++# define preempt_disable_rt() barrier() ++# define preempt_enable_rt() barrier() ++# define preempt_disable_nort() preempt_disable() ++# define preempt_enable_nort() preempt_enable() ++#endif ++ + #ifdef CONFIG_PREEMPT_NOTIFIERS + + struct preempt_notifier; +@@ -322,34 +392,80 @@ static inline void preempt_notifier_init(struct preempt_notifier *notifier, + + #endif + +-/** +- * migrate_disable - Prevent migration of the current task ++ ++#ifdef CONFIG_SMP ++ ++/* ++ * Migrate-Disable and why it is undesired. + * +- * Maps to preempt_disable() which also disables preemption. Use +- * migrate_disable() to annotate that the intent is to prevent migration, +- * but not necessarily preemption. ++ * When a preempted task becomes elegible to run under the ideal model (IOW it ++ * becomes one of the M highest priority tasks), it might still have to wait ++ * for the preemptee's migrate_disable() section to complete. Thereby suffering ++ * a reduction in bandwidth in the exact duration of the migrate_disable() ++ * section. + * +- * Can be invoked nested like preempt_disable() and needs the corresponding +- * number of migrate_enable() invocations. +- */ +-static __always_inline void migrate_disable(void) +-{ +- preempt_disable(); +-} +- +-/** + * migrate_enable - Allow migration of the current task ++ * Per this argument, the change from preempt_disable() to migrate_disable() ++ * gets us: + * +- * Counterpart to migrate_disable(). ++ * - a higher priority tasks gains reduced wake-up latency; with preempt_disable() ++ * it would have had to wait for the lower priority task. + * +- * As migrate_disable() can be invoked nested, only the outermost invocation +- * reenables migration. ++ * - a lower priority tasks; which under preempt_disable() could've instantly ++ * migrated away when another CPU becomes available, is now constrained ++ * by the ability to push the higher priority task away, which might itself be ++ * in a migrate_disable() section, reducing it's available bandwidth. + * +- * Currently mapped to preempt_enable(). +- */ +-static __always_inline void migrate_enable(void) ++ * IOW it trades latency / moves the interference term, but it stays in the ++ * system, and as long as it remains unbounded, the system is not fully ++ * deterministic. ++ * ++ * The reason we have it anyway. ++ * ++ * PREEMPT_RT breaks a number of assumptions traditionally held. By forcing a ++ * number of primitives into becoming preemptible, they would also allow ++ * migration. This turns out to break a bunch of per-cpu usage. To this end, ++ * all these primitives employ migirate_disable() to restore this implicit ++ * assumption. ++ * ++ * This is a 'temporary' work-around at best. The correct solution is getting ++ * rid of the above assumptions and reworking the code to employ explicit ++ * per-cpu locking or short preempt-disable regions. ++ * ++ * The end goal must be to get rid of migrate_disable(), alternatively we need ++ * a schedulability theory that does not depend on abritrary migration. ++ * ++ * ++ * Notes on the implementation. ++ * ++ * The implementation is particularly tricky since existing code patterns ++ * dictate neither migrate_disable() nor migrate_enable() is allowed to block. ++ * This means that it cannot use cpus_read_lock() to serialize against hotplug, ++ * nor can it easily migrate itself into a pending affinity mask change on ++ * migrate_enable(). ++ * ++ * ++ * Note: even non-work-conserving schedulers like semi-partitioned depends on ++ * migration, so migrate_disable() is not only a problem for ++ * work-conserving schedulers. ++ * ++*/ ++ ++extern void migrate_disable(void); ++extern void migrate_enable(void); ++ ++#else ++ ++static inline void migrate_disable(void) + { +- preempt_enable(); ++ preempt_lazy_disable(); + } + ++static inline void migrate_enable(void) ++{ ++ preempt_lazy_enable(); ++} ++ ++#endif /* CONFIG_SMP */ ++ + #endif /* __LINUX_PREEMPT_H */ +diff --git a/include/linux/printk.h b/include/linux/printk.h +index 7d787f91d..9331b131b 100644 +--- a/include/linux/printk.h ++++ b/include/linux/printk.h +@@ -46,6 +46,12 @@ static inline const char *printk_skip_headers(const char *buffer) + + #define CONSOLE_EXT_LOG_MAX 8192 + ++/* ++ * The maximum size of a record formatted for console printing ++ * (i.e. with the prefix prepended to every line). ++ */ ++#define CONSOLE_LOG_MAX 4096 ++ + /* printk's without a loglevel use this.. */ + #define MESSAGE_LOGLEVEL_DEFAULT CONFIG_MESSAGE_LOGLEVEL_DEFAULT + +@@ -149,18 +155,6 @@ static inline __printf(1, 2) __cold + void early_printk(const char *s, ...) { } + #endif + +-#ifdef CONFIG_PRINTK_NMI +-extern void printk_nmi_enter(void); +-extern void printk_nmi_exit(void); +-extern void printk_nmi_direct_enter(void); +-extern void printk_nmi_direct_exit(void); +-#else +-static inline void printk_nmi_enter(void) { } +-static inline void printk_nmi_exit(void) { } +-static inline void printk_nmi_direct_enter(void) { } +-static inline void printk_nmi_direct_exit(void) { } +-#endif /* PRINTK_NMI */ +- + #ifdef CONFIG_PRINTK + extern void printk_safe_enter(void); + extern void printk_safe_exit(void); +@@ -247,8 +241,6 @@ __printf(1, 2) void dump_stack_set_arch_desc(const char *fmt, ...); + void dump_stack_print_info(const char *log_lvl); + void show_regs_print_info(const char *log_lvl); + extern asmlinkage void dump_stack(void) __cold; +-extern void printk_safe_flush(void); +-extern void printk_safe_flush_on_panic(void); + #if defined(CONFIG_X86) || defined(CONFIG_ARM64_PSEUDO_NMI) + extern void zap_locks(void); + #else +@@ -318,14 +310,6 @@ static inline void dump_stack(void) + { + } + +-static inline void printk_safe_flush(void) +-{ +-} +- +-static inline void printk_safe_flush_on_panic(void) +-{ +-} +- + static inline void zap_locks(void) + { + } +@@ -546,6 +530,8 @@ extern int kptr_restrict; + no_printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__) + #endif + ++bool pr_flush(int timeout_ms, bool reset_on_progress); ++ + /* + * ratelimited messages with local ratelimit_state, + * no local ratelimit_state used in the !PRINTK case +diff --git a/include/linux/rbtree.h b/include/linux/rbtree.h +index d31ecaf4f..e711efc2e 100644 +--- a/include/linux/rbtree.h ++++ b/include/linux/rbtree.h +@@ -19,19 +19,9 @@ + + #include + #include ++#include + #include + +-struct rb_node { +- unsigned long __rb_parent_color; +- struct rb_node *rb_right; +- struct rb_node *rb_left; +-} __attribute__((aligned(sizeof(long)))); +- /* The alignment might seem pointless, but allegedly CRIS needs it */ +- +-struct rb_root { +- struct rb_node *rb_node; +-}; +- + #define rb_parent(r) ((struct rb_node *)((r)->__rb_parent_color & ~3)) + + #define RB_ROOT (struct rb_root) { NULL, } +@@ -112,21 +102,6 @@ static inline void rb_link_node_rcu(struct rb_node *node, struct rb_node *parent + typeof(*pos), field); 1; }); \ + pos = n) + +-/* +- * Leftmost-cached rbtrees. +- * +- * We do not cache the rightmost node based on footprint +- * size vs number of potential users that could benefit +- * from O(1) rb_last(). Just not worth it, users that want +- * this feature can always implement the logic explicitly. +- * Furthermore, users that want to cache both pointers may +- * find it a bit asymmetric, but that's ok. +- */ +-struct rb_root_cached { +- struct rb_root rb_root; +- struct rb_node *rb_leftmost; +-}; +- + #define RB_ROOT_CACHED (struct rb_root_cached) { {NULL, }, NULL } + + /* Same as rb_first(), but O(1) */ +diff --git a/include/linux/rbtree_type.h b/include/linux/rbtree_type.h +new file mode 100644 +index 000000000..77a89dd2c +--- /dev/null ++++ b/include/linux/rbtree_type.h +@@ -0,0 +1,31 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++#ifndef _LINUX_RBTREE_TYPE_H ++#define _LINUX_RBTREE_TYPE_H ++ ++struct rb_node { ++ unsigned long __rb_parent_color; ++ struct rb_node *rb_right; ++ struct rb_node *rb_left; ++} __attribute__((aligned(sizeof(long)))); ++/* The alignment might seem pointless, but allegedly CRIS needs it */ ++ ++struct rb_root { ++ struct rb_node *rb_node; ++}; ++ ++/* ++ * Leftmost-cached rbtrees. ++ * ++ * We do not cache the rightmost node based on footprint ++ * size vs number of potential users that could benefit ++ * from O(1) rb_last(). Just not worth it, users that want ++ * this feature can always implement the logic explicitly. ++ * Furthermore, users that want to cache both pointers may ++ * find it a bit asymmetric, but that's ok. ++ */ ++struct rb_root_cached { ++ struct rb_root rb_root; ++ struct rb_node *rb_leftmost; ++}; ++ ++#endif +diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h +index 095b3b39b..1effcae06 100644 +--- a/include/linux/rcupdate.h ++++ b/include/linux/rcupdate.h +@@ -54,6 +54,11 @@ void __rcu_read_unlock(void); + * types of kernel builds, the rcu_read_lock() nesting depth is unknowable. + */ + #define rcu_preempt_depth() (current->rcu_read_lock_nesting) ++#ifndef CONFIG_PREEMPT_RT ++#define sched_rcu_preempt_depth() rcu_preempt_depth() ++#else ++static inline int sched_rcu_preempt_depth(void) { return 0; } ++#endif + + #else /* #ifdef CONFIG_PREEMPT_RCU */ + +@@ -79,6 +84,8 @@ static inline int rcu_preempt_depth(void) + return 0; + } + ++#define sched_rcu_preempt_depth() rcu_preempt_depth() ++ + #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ + + /* Internal to kernel */ +@@ -329,7 +336,8 @@ static inline void rcu_preempt_sleep_check(void) { } + #define rcu_sleep_check() \ + do { \ + rcu_preempt_sleep_check(); \ +- RCU_LOCKDEP_WARN(lock_is_held(&rcu_bh_lock_map), \ ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) \ ++ RCU_LOCKDEP_WARN(lock_is_held(&rcu_bh_lock_map), \ + "Illegal context switch in RCU-bh read-side critical section"); \ + RCU_LOCKDEP_WARN(lock_is_held(&rcu_sched_lock_map), \ + "Illegal context switch in RCU-sched read-side critical section"); \ +diff --git a/include/linux/rtmutex.h b/include/linux/rtmutex.h +index 6fd615a0e..b02009f53 100644 +--- a/include/linux/rtmutex.h ++++ b/include/linux/rtmutex.h +@@ -14,11 +14,15 @@ + #define __LINUX_RT_MUTEX_H + + #include +-#include +-#include ++#include ++#include + + extern int max_lock_depth; /* for sysctl */ + ++#ifdef CONFIG_DEBUG_MUTEXES ++#include ++#endif ++ + /** + * The rt_mutex structure + * +@@ -31,12 +35,7 @@ struct rt_mutex { + raw_spinlock_t wait_lock; + struct rb_root_cached waiters; + struct task_struct *owner; +-#ifdef CONFIG_DEBUG_RT_MUTEXES + int save_state; +- const char *name, *file; +- int line; +- void *magic; +-#endif + #ifdef CONFIG_DEBUG_LOCK_ALLOC + struct lockdep_map dep_map; + #endif +@@ -49,6 +48,7 @@ struct hrtimer_sleeper; + extern int rt_mutex_debug_check_no_locks_freed(const void *from, + unsigned long len); + extern void rt_mutex_debug_check_no_locks_held(struct task_struct *task); ++ extern void rt_mutex_debug_task_free(struct task_struct *tsk); + #else + static inline int rt_mutex_debug_check_no_locks_freed(const void *from, + unsigned long len) +@@ -56,25 +56,15 @@ struct hrtimer_sleeper; + return 0; + } + # define rt_mutex_debug_check_no_locks_held(task) do { } while (0) ++# define rt_mutex_debug_task_free(t) do { } while (0) + #endif + +-#ifdef CONFIG_DEBUG_RT_MUTEXES +-# define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) \ +- , .name = #mutexname, .file = __FILE__, .line = __LINE__ +- +-# define rt_mutex_init(mutex) \ ++#define rt_mutex_init(mutex) \ + do { \ + static struct lock_class_key __key; \ + __rt_mutex_init(mutex, __func__, &__key); \ + } while (0) + +- extern void rt_mutex_debug_task_free(struct task_struct *tsk); +-#else +-# define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) +-# define rt_mutex_init(mutex) __rt_mutex_init(mutex, NULL, NULL) +-# define rt_mutex_debug_task_free(t) do { } while (0) +-#endif +- + #ifdef CONFIG_DEBUG_LOCK_ALLOC + #define __DEP_MAP_RT_MUTEX_INITIALIZER(mutexname) \ + , .dep_map = { .name = #mutexname } +@@ -82,12 +72,19 @@ do { \ + #define __DEP_MAP_RT_MUTEX_INITIALIZER(mutexname) + #endif + +-#define __RT_MUTEX_INITIALIZER(mutexname) \ +- { .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(mutexname.wait_lock) \ ++#define __RT_MUTEX_INITIALIZER_PLAIN(mutexname) \ ++ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(mutexname.wait_lock) \ + , .waiters = RB_ROOT_CACHED \ + , .owner = NULL \ +- __DEBUG_RT_MUTEX_INITIALIZER(mutexname) \ +- __DEP_MAP_RT_MUTEX_INITIALIZER(mutexname)} ++ __DEP_MAP_RT_MUTEX_INITIALIZER(mutexname) ++ ++#define __RT_MUTEX_INITIALIZER(mutexname) \ ++ { __RT_MUTEX_INITIALIZER_PLAIN(mutexname) \ ++ , .save_state = 0 } ++ ++#define __RT_MUTEX_INITIALIZER_SAVE_STATE(mutexname) \ ++ { __RT_MUTEX_INITIALIZER_PLAIN(mutexname) \ ++ , .save_state = 1 } + + #define DEFINE_RT_MUTEX(mutexname) \ + struct rt_mutex mutexname = __RT_MUTEX_INITIALIZER(mutexname) +@@ -115,9 +112,6 @@ extern void rt_mutex_lock(struct rt_mutex *lock); + #endif + + extern int rt_mutex_lock_interruptible(struct rt_mutex *lock); +-extern int rt_mutex_timed_lock(struct rt_mutex *lock, +- struct hrtimer_sleeper *timeout); +- + extern int rt_mutex_trylock(struct rt_mutex *lock); + + extern void rt_mutex_unlock(struct rt_mutex *lock); +diff --git a/include/linux/rwlock_rt.h b/include/linux/rwlock_rt.h +new file mode 100644 +index 000000000..aafdb0a68 +--- /dev/null ++++ b/include/linux/rwlock_rt.h +@@ -0,0 +1,109 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++#ifndef __LINUX_RWLOCK_RT_H ++#define __LINUX_RWLOCK_RT_H ++ ++#ifndef __LINUX_SPINLOCK_H ++#error Do not include directly. Use spinlock.h ++#endif ++ ++extern void __lockfunc rt_write_lock(rwlock_t *rwlock); ++extern void __lockfunc rt_read_lock(rwlock_t *rwlock); ++extern int __lockfunc rt_write_trylock(rwlock_t *rwlock); ++extern int __lockfunc rt_read_trylock(rwlock_t *rwlock); ++extern void __lockfunc rt_write_unlock(rwlock_t *rwlock); ++extern void __lockfunc rt_read_unlock(rwlock_t *rwlock); ++extern int __lockfunc rt_read_can_lock(rwlock_t *rwlock); ++extern int __lockfunc rt_write_can_lock(rwlock_t *rwlock); ++extern void __rt_rwlock_init(rwlock_t *rwlock, char *name, struct lock_class_key *key); ++ ++#define read_can_lock(rwlock) rt_read_can_lock(rwlock) ++#define write_can_lock(rwlock) rt_write_can_lock(rwlock) ++ ++#define read_trylock(lock) __cond_lock(lock, rt_read_trylock(lock)) ++#define write_trylock(lock) __cond_lock(lock, rt_write_trylock(lock)) ++ ++static inline int __write_trylock_rt_irqsave(rwlock_t *lock, unsigned long *flags) ++{ ++ *flags = 0; ++ return rt_write_trylock(lock); ++} ++ ++#define write_trylock_irqsave(lock, flags) \ ++ __cond_lock(lock, __write_trylock_rt_irqsave(lock, &(flags))) ++ ++#define read_lock_irqsave(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ rt_read_lock(lock); \ ++ flags = 0; \ ++ } while (0) ++ ++#define write_lock_irqsave(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ rt_write_lock(lock); \ ++ flags = 0; \ ++ } while (0) ++ ++#define read_lock(lock) rt_read_lock(lock) ++ ++#define read_lock_bh(lock) \ ++ do { \ ++ local_bh_disable(); \ ++ rt_read_lock(lock); \ ++ } while (0) ++ ++#define read_lock_irq(lock) read_lock(lock) ++ ++#define write_lock(lock) rt_write_lock(lock) ++ ++#define write_lock_bh(lock) \ ++ do { \ ++ local_bh_disable(); \ ++ rt_write_lock(lock); \ ++ } while (0) ++ ++#define write_lock_irq(lock) write_lock(lock) ++ ++#define read_unlock(lock) rt_read_unlock(lock) ++ ++#define read_unlock_bh(lock) \ ++ do { \ ++ rt_read_unlock(lock); \ ++ local_bh_enable(); \ ++ } while (0) ++ ++#define read_unlock_irq(lock) read_unlock(lock) ++ ++#define write_unlock(lock) rt_write_unlock(lock) ++ ++#define write_unlock_bh(lock) \ ++ do { \ ++ rt_write_unlock(lock); \ ++ local_bh_enable(); \ ++ } while (0) ++ ++#define write_unlock_irq(lock) write_unlock(lock) ++ ++#define read_unlock_irqrestore(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ (void) flags; \ ++ rt_read_unlock(lock); \ ++ } while (0) ++ ++#define write_unlock_irqrestore(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ (void) flags; \ ++ rt_write_unlock(lock); \ ++ } while (0) ++ ++#define rwlock_init(rwl) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ __rt_rwlock_init(rwl, #rwl, &__key); \ ++} while (0) ++ ++#endif +diff --git a/include/linux/rwlock_types.h b/include/linux/rwlock_types.h +index 3bd03e180..0ad226b5d 100644 +--- a/include/linux/rwlock_types.h ++++ b/include/linux/rwlock_types.h +@@ -1,6 +1,10 @@ + #ifndef __LINUX_RWLOCK_TYPES_H + #define __LINUX_RWLOCK_TYPES_H + ++#if !defined(__LINUX_SPINLOCK_TYPES_H) ++# error "Do not include directly, include spinlock_types.h" ++#endif ++ + /* + * include/linux/rwlock_types.h - generic rwlock type definitions + * and initializers +diff --git a/include/linux/rwlock_types_rt.h b/include/linux/rwlock_types_rt.h +new file mode 100644 +index 000000000..4762391d6 +--- /dev/null ++++ b/include/linux/rwlock_types_rt.h +@@ -0,0 +1,56 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++#ifndef __LINUX_RWLOCK_TYPES_RT_H ++#define __LINUX_RWLOCK_TYPES_RT_H ++ ++#ifndef __LINUX_SPINLOCK_TYPES_H ++#error "Do not include directly. Include spinlock_types.h instead" ++#endif ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define RW_DEP_MAP_INIT(lockname) .dep_map = { .name = #lockname } ++#else ++# define RW_DEP_MAP_INIT(lockname) ++#endif ++ ++typedef struct rt_rw_lock rwlock_t; ++ ++#define __RW_LOCK_UNLOCKED(name) __RWLOCK_RT_INITIALIZER(name) ++ ++#define DEFINE_RWLOCK(name) \ ++ rwlock_t name = __RW_LOCK_UNLOCKED(name) ++ ++/* ++ * A reader biased implementation primarily for CPU pinning. ++ * ++ * Can be selected as general replacement for the single reader RT rwlock ++ * variant ++ */ ++struct rt_rw_lock { ++ struct rt_mutex rtmutex; ++ atomic_t readers; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++}; ++ ++#define READER_BIAS (1U << 31) ++#define WRITER_BIAS (1U << 30) ++ ++#define __RWLOCK_RT_INITIALIZER(name) \ ++{ \ ++ .readers = ATOMIC_INIT(READER_BIAS), \ ++ .rtmutex = __RT_MUTEX_INITIALIZER_SAVE_STATE(name.rtmutex), \ ++ RW_DEP_MAP_INIT(name) \ ++} ++ ++void __rwlock_biased_rt_init(struct rt_rw_lock *lock, const char *name, ++ struct lock_class_key *key); ++ ++#define rwlock_biased_rt_init(rwlock) \ ++ do { \ ++ static struct lock_class_key __key; \ ++ \ ++ __rwlock_biased_rt_init((rwlock), #rwlock, &__key); \ ++ } while (0) ++ ++#endif +diff --git a/include/linux/rwsem-rt.h b/include/linux/rwsem-rt.h +new file mode 100644 +index 000000000..0ba8aae9a +--- /dev/null ++++ b/include/linux/rwsem-rt.h +@@ -0,0 +1,70 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++#ifndef _LINUX_RWSEM_RT_H ++#define _LINUX_RWSEM_RT_H ++ ++#ifndef _LINUX_RWSEM_H ++#error "Include rwsem.h" ++#endif ++ ++#include ++#include ++ ++#define READER_BIAS (1U << 31) ++#define WRITER_BIAS (1U << 30) ++ ++struct rw_semaphore { ++ atomic_t readers; ++ struct rt_mutex rtmutex; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++}; ++ ++#define __RWSEM_INITIALIZER(name) \ ++{ \ ++ .readers = ATOMIC_INIT(READER_BIAS), \ ++ .rtmutex = __RT_MUTEX_INITIALIZER(name.rtmutex), \ ++ RW_DEP_MAP_INIT(name) \ ++} ++ ++#define DECLARE_RWSEM(lockname) \ ++ struct rw_semaphore lockname = __RWSEM_INITIALIZER(lockname) ++ ++extern void __rwsem_init(struct rw_semaphore *rwsem, const char *name, ++ struct lock_class_key *key); ++ ++#define __init_rwsem(sem, name, key) \ ++do { \ ++ rt_mutex_init(&(sem)->rtmutex); \ ++ __rwsem_init((sem), (name), (key)); \ ++} while (0) ++ ++#define init_rwsem(sem) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ __init_rwsem((sem), #sem, &__key); \ ++} while (0) ++ ++static inline int rwsem_is_locked(struct rw_semaphore *sem) ++{ ++ return atomic_read(&sem->readers) != READER_BIAS; ++} ++ ++static inline int rwsem_is_contended(struct rw_semaphore *sem) ++{ ++ return atomic_read(&sem->readers) > 0; ++} ++ ++extern void __down_read(struct rw_semaphore *sem); ++extern int __down_read_interruptible(struct rw_semaphore *sem); ++extern int __down_read_killable(struct rw_semaphore *sem); ++extern int __down_read_trylock(struct rw_semaphore *sem); ++extern void __down_write(struct rw_semaphore *sem); ++extern int __must_check __down_write_killable(struct rw_semaphore *sem); ++extern int __down_write_trylock(struct rw_semaphore *sem); ++extern void __up_read(struct rw_semaphore *sem); ++extern void __up_write(struct rw_semaphore *sem); ++extern void __downgrade_write(struct rw_semaphore *sem); ++ ++#endif +diff --git a/include/linux/rwsem.h b/include/linux/rwsem.h +index 4c715be48..9323af8a9 100644 +--- a/include/linux/rwsem.h ++++ b/include/linux/rwsem.h +@@ -16,6 +16,11 @@ + #include + #include + #include ++ ++#ifdef CONFIG_PREEMPT_RT ++#include ++#else /* PREEMPT_RT */ ++ + #ifdef CONFIG_RWSEM_SPIN_ON_OWNER + #include + #endif +@@ -119,6 +124,13 @@ static inline int rwsem_is_contended(struct rw_semaphore *sem) + return !list_empty(&sem->wait_list); + } + ++#endif /* !PREEMPT_RT */ ++ ++/* ++ * The functions below are the same for all rwsem implementations including ++ * the RT specific variant. ++ */ ++ + /* + * lock for reading + */ +diff --git a/include/linux/sched.h b/include/linux/sched.h +index 3aae225f9..709902ceb 100644 +--- a/include/linux/sched.h ++++ b/include/linux/sched.h +@@ -36,6 +36,7 @@ + #include + #include + #include ++#include + + /* task_struct member predeclarations (sorted alphabetically): */ + struct audit_context; +@@ -114,12 +115,8 @@ struct io_uring_task; + __TASK_TRACED | EXIT_DEAD | EXIT_ZOMBIE | \ + TASK_PARKED) + +-#define task_is_traced(task) ((task->state & __TASK_TRACED) != 0) +- + #define task_is_stopped(task) ((task->state & __TASK_STOPPED) != 0) + +-#define task_is_stopped_or_traced(task) ((task->state & (__TASK_STOPPED | __TASK_TRACED)) != 0) +- + #ifdef CONFIG_DEBUG_ATOMIC_SLEEP + + /* +@@ -143,6 +140,9 @@ struct io_uring_task; + smp_store_mb(current->state, (state_value)); \ + } while (0) + ++#define __set_current_state_no_track(state_value) \ ++ current->state = (state_value); ++ + #define set_special_state(state_value) \ + do { \ + unsigned long flags; /* may shadow */ \ +@@ -196,6 +196,9 @@ struct io_uring_task; + #define set_current_state(state_value) \ + smp_store_mb(current->state, (state_value)) + ++#define __set_current_state_no_track(state_value) \ ++ __set_current_state(state_value) ++ + /* + * set_special_state() should be used for those states when the blocking task + * can not use the regular condition based wait-loop. In that case we must +@@ -675,6 +678,13 @@ struct wake_q_node { + struct wake_q_node *next; + }; + ++struct kmap_ctrl { ++#ifdef CONFIG_KMAP_LOCAL ++ int idx; ++ pte_t pteval[KM_MAX_IDX]; ++#endif ++}; ++ + /** + * struct task_struct_resvd - KABI extension struct + */ +@@ -697,6 +707,8 @@ struct task_struct { + #endif + /* -1 unrunnable, 0 runnable, >0 stopped: */ + volatile long state; ++ /* saved state for "spinlock sleepers" */ ++ volatile long saved_state; + + /* + * This begins the randomizable portion of task_struct. Only +@@ -769,6 +781,11 @@ struct task_struct { + int nr_cpus_allowed; + const cpumask_t *cpus_ptr; + cpumask_t cpus_mask; ++ void *migration_pending; ++#ifdef CONFIG_SMP ++ unsigned short migration_disabled; ++#endif ++ unsigned short migration_flags; + + #ifdef CONFIG_PREEMPT_RCU + int rcu_read_lock_nesting; +@@ -877,6 +894,10 @@ struct task_struct { + #ifdef CONFIG_IOMMU_SVA + KABI_FILL_HOLE(unsigned pasid_activated:1) + #endif ++#ifdef CONFIG_EVENTFD ++ /* Recursion prevention for eventfd_signal() */ ++ unsigned in_eventfd_signal:1; ++#endif + + unsigned long atomic_flags; /* Flags requiring atomic access. */ + +@@ -1018,11 +1039,16 @@ struct task_struct { + /* Signal handlers: */ + struct signal_struct *signal; + struct sighand_struct __rcu *sighand; ++ struct sigqueue *sigqueue_cache; + sigset_t blocked; + sigset_t real_blocked; + /* Restored if set_restore_sigmask() was used: */ + sigset_t saved_sigmask; + struct sigpending pending; ++#ifdef CONFIG_PREEMPT_RT ++ /* TODO: move me into ->restart_block ? */ ++ struct kernel_siginfo forced_info; ++#endif + unsigned long sas_ss_sp; + size_t sas_ss_size; + unsigned int sas_ss_flags; +@@ -1049,6 +1075,7 @@ struct task_struct { + raw_spinlock_t pi_lock; + + struct wake_q_node wake_q; ++ struct wake_q_node wake_q_sleeper; + + #ifdef CONFIG_RT_MUTEXES + /* PI waiters blocked on a rt_mutex held by this task: */ +@@ -1076,6 +1103,9 @@ struct task_struct { + int softirq_context; + int irq_config; + #endif ++#ifdef CONFIG_PREEMPT_RT ++ int softirq_disable_cnt; ++#endif + + #ifdef CONFIG_LOCKDEP + # define MAX_LOCK_DEPTH 48UL +@@ -1361,6 +1391,7 @@ struct task_struct { + unsigned int sequential_io; + unsigned int sequential_io_avg; + #endif ++ struct kmap_ctrl kmap_ctrl; + #ifdef CONFIG_DEBUG_ATOMIC_SLEEP + unsigned long task_state_change; + #endif +@@ -1848,6 +1879,7 @@ extern struct task_struct *find_get_task_by_vpid(pid_t nr); + + extern int wake_up_state(struct task_struct *tsk, unsigned int state); + extern int wake_up_process(struct task_struct *tsk); ++extern int wake_up_lock_sleeper(struct task_struct *tsk); + extern void wake_up_new_task(struct task_struct *tsk); + + #ifdef CONFIG_SMP +@@ -1945,6 +1977,89 @@ static inline int test_tsk_need_resched(struct task_struct *tsk) + return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED)); + } + ++#ifdef CONFIG_PREEMPT_LAZY ++static inline void set_tsk_need_resched_lazy(struct task_struct *tsk) ++{ ++ set_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY); ++} ++ ++static inline void clear_tsk_need_resched_lazy(struct task_struct *tsk) ++{ ++ clear_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY); ++} ++ ++static inline int test_tsk_need_resched_lazy(struct task_struct *tsk) ++{ ++ return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY)); ++} ++ ++static inline int need_resched_lazy(void) ++{ ++ return test_thread_flag(TIF_NEED_RESCHED_LAZY); ++} ++ ++static inline int need_resched_now(void) ++{ ++ return test_thread_flag(TIF_NEED_RESCHED); ++} ++ ++#else ++static inline void clear_tsk_need_resched_lazy(struct task_struct *tsk) { } ++static inline int need_resched_lazy(void) { return 0; } ++ ++static inline int need_resched_now(void) ++{ ++ return test_thread_flag(TIF_NEED_RESCHED); ++} ++ ++#endif ++ ++ ++static inline bool __task_is_stopped_or_traced(struct task_struct *task) ++{ ++ if (task->state & (__TASK_STOPPED | __TASK_TRACED)) ++ return true; ++#ifdef CONFIG_PREEMPT_RT ++ if (task->saved_state & (__TASK_STOPPED | __TASK_TRACED)) ++ return true; ++#endif ++ return false; ++} ++ ++static inline bool task_is_stopped_or_traced(struct task_struct *task) ++{ ++ bool traced_stopped; ++ ++#ifdef CONFIG_PREEMPT_RT ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&task->pi_lock, flags); ++ traced_stopped = __task_is_stopped_or_traced(task); ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); ++#else ++ traced_stopped = __task_is_stopped_or_traced(task); ++#endif ++ return traced_stopped; ++} ++ ++static inline bool task_is_traced(struct task_struct *task) ++{ ++ bool traced = false; ++ ++ if (task->state & __TASK_TRACED) ++ return true; ++#ifdef CONFIG_PREEMPT_RT ++ /* in case the task is sleeping on tasklist_lock */ ++ raw_spin_lock_irq(&task->pi_lock); ++ if (task->state & __TASK_TRACED) ++ traced = true; ++ else if (task->saved_state & __TASK_TRACED) ++ traced = true; ++ raw_spin_unlock_irq(&task->pi_lock); ++#endif ++ return traced; ++} ++ + /* + * cond_resched() and cond_resched_lock(): latency reduction via + * explicit rescheduling in places that are safe. The return +diff --git a/include/linux/sched/hotplug.h b/include/linux/sched/hotplug.h +index 9a62ffdd2..412cdaba3 100644 +--- a/include/linux/sched/hotplug.h ++++ b/include/linux/sched/hotplug.h +@@ -11,8 +11,10 @@ extern int sched_cpu_activate(unsigned int cpu); + extern int sched_cpu_deactivate(unsigned int cpu); + + #ifdef CONFIG_HOTPLUG_CPU ++extern int sched_cpu_wait_empty(unsigned int cpu); + extern int sched_cpu_dying(unsigned int cpu); + #else ++# define sched_cpu_wait_empty NULL + # define sched_cpu_dying NULL + #endif + +diff --git a/include/linux/sched/mm.h b/include/linux/sched/mm.h +index f58a2730a..5f4aa9842 100644 +--- a/include/linux/sched/mm.h ++++ b/include/linux/sched/mm.h +@@ -50,6 +50,17 @@ static inline void mmdrop(struct mm_struct *mm) + __mmdrop(mm); + } + ++#ifdef CONFIG_PREEMPT_RT ++extern void __mmdrop_delayed(struct rcu_head *rhp); ++static inline void mmdrop_delayed(struct mm_struct *mm) ++{ ++ if (atomic_dec_and_test(&mm->mm_count)) ++ call_rcu(&mm->delayed_drop, __mmdrop_delayed); ++} ++#else ++# define mmdrop_delayed(mm) mmdrop(mm) ++#endif ++ + /** + * mmget() - Pin the address space associated with a &struct mm_struct. + * @mm: The address space to pin. +diff --git a/include/linux/sched/rt.h b/include/linux/sched/rt.h +index e5af028c0..994c25640 100644 +--- a/include/linux/sched/rt.h ++++ b/include/linux/sched/rt.h +@@ -39,20 +39,12 @@ static inline struct task_struct *rt_mutex_get_top_task(struct task_struct *p) + } + extern void rt_mutex_setprio(struct task_struct *p, struct task_struct *pi_task); + extern void rt_mutex_adjust_pi(struct task_struct *p); +-static inline bool tsk_is_pi_blocked(struct task_struct *tsk) +-{ +- return tsk->pi_blocked_on != NULL; +-} + #else + static inline struct task_struct *rt_mutex_get_top_task(struct task_struct *task) + { + return NULL; + } + # define rt_mutex_adjust_pi(p) do { } while (0) +-static inline bool tsk_is_pi_blocked(struct task_struct *tsk) +-{ +- return false; +-} + #endif + + extern void normalize_rt_tasks(void); +diff --git a/include/linux/sched/wake_q.h b/include/linux/sched/wake_q.h +index 26a2013ac..6e2dff721 100644 +--- a/include/linux/sched/wake_q.h ++++ b/include/linux/sched/wake_q.h +@@ -58,6 +58,17 @@ static inline bool wake_q_empty(struct wake_q_head *head) + + extern void wake_q_add(struct wake_q_head *head, struct task_struct *task); + extern void wake_q_add_safe(struct wake_q_head *head, struct task_struct *task); +-extern void wake_up_q(struct wake_q_head *head); ++extern void wake_q_add_sleeper(struct wake_q_head *head, struct task_struct *task); ++extern void __wake_up_q(struct wake_q_head *head, bool sleeper); ++ ++static inline void wake_up_q(struct wake_q_head *head) ++{ ++ __wake_up_q(head, false); ++} ++ ++static inline void wake_up_q_sleeper(struct wake_q_head *head) ++{ ++ __wake_up_q(head, true); ++} + + #endif /* _LINUX_SCHED_WAKE_Q_H */ +diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h +index 0180b3d06..68a2debc1 100644 +--- a/include/linux/serial_8250.h ++++ b/include/linux/serial_8250.h +@@ -7,6 +7,7 @@ + #ifndef _LINUX_SERIAL_8250_H + #define _LINUX_SERIAL_8250_H + ++#include + #include + #include + #include +@@ -126,6 +127,8 @@ struct uart_8250_port { + #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA + unsigned char msr_saved_flags; + ++ atomic_t console_printing; ++ + struct uart_8250_dma *dma; + const struct uart_8250_ops *ops; + +@@ -181,6 +184,8 @@ void serial8250_init_port(struct uart_8250_port *up); + void serial8250_set_defaults(struct uart_8250_port *up); + void serial8250_console_write(struct uart_8250_port *up, const char *s, + unsigned int count); ++void serial8250_console_write_atomic(struct uart_8250_port *up, const char *s, ++ unsigned int count); + int serial8250_console_setup(struct uart_port *port, char *options, bool probe); + int serial8250_console_exit(struct uart_port *port); + +diff --git a/include/linux/shmem_fs.h b/include/linux/shmem_fs.h +index 93240799a..df2871ed8 100644 +--- a/include/linux/shmem_fs.h ++++ b/include/linux/shmem_fs.h +@@ -32,7 +32,7 @@ struct shmem_sb_info { + struct percpu_counter used_blocks; /* How many are allocated */ + unsigned long max_inodes; /* How many inodes are allowed */ + unsigned long free_inodes; /* How many are left for allocation */ +- spinlock_t stat_lock; /* Serialize shmem_sb_info changes */ ++ raw_spinlock_t stat_lock; /* Serialize shmem_sb_info changes */ + umode_t mode; /* Mount mode for root directory */ + unsigned char huge; /* Whether to try for hugepages */ + kuid_t uid; /* Mount uid for root directory */ +diff --git a/include/linux/signal.h b/include/linux/signal.h +index 3038a0610..fff1656c6 100644 +--- a/include/linux/signal.h ++++ b/include/linux/signal.h +@@ -265,6 +265,7 @@ static inline void init_sigpending(struct sigpending *sig) + } + + extern void flush_sigqueue(struct sigpending *queue); ++extern void flush_task_sigqueue(struct task_struct *tsk); + + /* Test if 'sig' is valid signal. Use this instead of testing _NSIG directly */ + static inline int valid_signal(unsigned long sig) +diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h +index d16c8bd08..d7248f71d 100644 +--- a/include/linux/skbuff.h ++++ b/include/linux/skbuff.h +@@ -298,6 +298,7 @@ struct sk_buff_head { + + __u32 qlen; + spinlock_t lock; ++ raw_spinlock_t raw_lock; + }; + + struct sk_buff; +@@ -1929,6 +1930,12 @@ static inline void skb_queue_head_init(struct sk_buff_head *list) + __skb_queue_head_init(list); + } + ++static inline void skb_queue_head_init_raw(struct sk_buff_head *list) ++{ ++ raw_spin_lock_init(&list->raw_lock); ++ __skb_queue_head_init(list); ++} ++ + static inline void skb_queue_head_init_class(struct sk_buff_head *list, + struct lock_class_key *class) + { +diff --git a/include/linux/smp.h b/include/linux/smp.h +index 84a0b4828..8348fa412 100644 +--- a/include/linux/smp.h ++++ b/include/linux/smp.h +@@ -260,6 +260,9 @@ static inline int get_boot_cpu_id(void) + #define get_cpu() ({ preempt_disable(); __smp_processor_id(); }) + #define put_cpu() preempt_enable() + ++#define get_cpu_light() ({ migrate_disable(); __smp_processor_id(); }) ++#define put_cpu_light() migrate_enable() ++ + /* + * Callback to arch code if there's nosmp or maxcpus=0 on the + * boot command line: +diff --git a/include/linux/spinlock.h b/include/linux/spinlock.h +index 79897841a..c3c70291b 100644 +--- a/include/linux/spinlock.h ++++ b/include/linux/spinlock.h +@@ -309,7 +309,11 @@ static inline void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock) + }) + + /* Include rwlock functions */ +-#include ++#ifdef CONFIG_PREEMPT_RT ++# include ++#else ++# include ++#endif + + /* + * Pull the _spin_*()/_read_*()/_write_*() functions/declarations: +@@ -320,6 +324,10 @@ static inline void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock) + # include + #endif + ++#ifdef CONFIG_PREEMPT_RT ++# include ++#else /* PREEMPT_RT */ ++ + /* + * Map the spin_lock functions to the raw variants for PREEMPT_RT=n + */ +@@ -454,6 +462,8 @@ static __always_inline int spin_is_contended(spinlock_t *lock) + + #define assert_spin_locked(lock) assert_raw_spin_locked(&(lock)->rlock) + ++#endif /* !PREEMPT_RT */ ++ + /* + * Pull the atomic_t declaration: + * (asm-mips/atomic.h needs above definitions) +diff --git a/include/linux/spinlock_api_smp.h b/include/linux/spinlock_api_smp.h +index 19a9be9d9..da38149f2 100644 +--- a/include/linux/spinlock_api_smp.h ++++ b/include/linux/spinlock_api_smp.h +@@ -187,6 +187,8 @@ static inline int __raw_spin_trylock_bh(raw_spinlock_t *lock) + return 0; + } + +-#include ++#ifndef CONFIG_PREEMPT_RT ++# include ++#endif + + #endif /* __LINUX_SPINLOCK_API_SMP_H */ +diff --git a/include/linux/spinlock_rt.h b/include/linux/spinlock_rt.h +new file mode 100644 +index 000000000..3085132ea +--- /dev/null ++++ b/include/linux/spinlock_rt.h +@@ -0,0 +1,155 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++#ifndef __LINUX_SPINLOCK_RT_H ++#define __LINUX_SPINLOCK_RT_H ++ ++#ifndef __LINUX_SPINLOCK_H ++#error Do not include directly. Use spinlock.h ++#endif ++ ++#include ++ ++extern void ++__rt_spin_lock_init(spinlock_t *lock, const char *name, struct lock_class_key *key); ++ ++#define spin_lock_init(slock) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ rt_mutex_init(&(slock)->lock); \ ++ __rt_spin_lock_init(slock, #slock, &__key); \ ++} while (0) ++ ++extern void __lockfunc rt_spin_lock(spinlock_t *lock); ++extern void __lockfunc rt_spin_lock_nested(spinlock_t *lock, int subclass); ++extern void __lockfunc rt_spin_lock_nest_lock(spinlock_t *lock, struct lockdep_map *nest_lock); ++extern void __lockfunc rt_spin_unlock(spinlock_t *lock); ++extern void __lockfunc rt_spin_lock_unlock(spinlock_t *lock); ++extern int __lockfunc rt_spin_trylock_irqsave(spinlock_t *lock, unsigned long *flags); ++extern int __lockfunc rt_spin_trylock_bh(spinlock_t *lock); ++extern int __lockfunc rt_spin_trylock(spinlock_t *lock); ++extern int atomic_dec_and_spin_lock(atomic_t *atomic, spinlock_t *lock); ++ ++/* ++ * lockdep-less calls, for derived types like rwlock: ++ * (for trylock they can use rt_mutex_trylock() directly. ++ * Migrate disable handling must be done at the call site. ++ */ ++extern void __lockfunc __rt_spin_lock(struct rt_mutex *lock); ++extern void __lockfunc __rt_spin_trylock(struct rt_mutex *lock); ++extern void __lockfunc __rt_spin_unlock(struct rt_mutex *lock); ++ ++#define spin_lock(lock) rt_spin_lock(lock) ++ ++#define spin_lock_bh(lock) \ ++ do { \ ++ local_bh_disable(); \ ++ rt_spin_lock(lock); \ ++ } while (0) ++ ++#define spin_lock_irq(lock) spin_lock(lock) ++ ++#define spin_do_trylock(lock) __cond_lock(lock, rt_spin_trylock(lock)) ++ ++#define spin_trylock(lock) \ ++({ \ ++ int __locked; \ ++ __locked = spin_do_trylock(lock); \ ++ __locked; \ ++}) ++ ++#ifdef CONFIG_LOCKDEP ++# define spin_lock_nested(lock, subclass) \ ++ do { \ ++ rt_spin_lock_nested(lock, subclass); \ ++ } while (0) ++ ++#define spin_lock_bh_nested(lock, subclass) \ ++ do { \ ++ local_bh_disable(); \ ++ rt_spin_lock_nested(lock, subclass); \ ++ } while (0) ++ ++# define spin_lock_nest_lock(lock, subclass) \ ++ do { \ ++ typecheck(struct lockdep_map *, &(subclass)->dep_map); \ ++ rt_spin_lock_nest_lock(lock, &(subclass)->dep_map); \ ++ } while (0) ++ ++# define spin_lock_irqsave_nested(lock, flags, subclass) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = 0; \ ++ rt_spin_lock_nested(lock, subclass); \ ++ } while (0) ++#else ++# define spin_lock_nested(lock, subclass) spin_lock(((void)(subclass), (lock))) ++# define spin_lock_nest_lock(lock, subclass) spin_lock(((void)(subclass), (lock))) ++# define spin_lock_bh_nested(lock, subclass) spin_lock_bh(((void)(subclass), (lock))) ++ ++# define spin_lock_irqsave_nested(lock, flags, subclass) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = 0; \ ++ spin_lock(((void)(subclass), (lock))); \ ++ } while (0) ++#endif ++ ++#define spin_lock_irqsave(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = 0; \ ++ spin_lock(lock); \ ++ } while (0) ++ ++#define spin_unlock(lock) rt_spin_unlock(lock) ++ ++#define spin_unlock_bh(lock) \ ++ do { \ ++ rt_spin_unlock(lock); \ ++ local_bh_enable(); \ ++ } while (0) ++ ++#define spin_unlock_irq(lock) spin_unlock(lock) ++ ++#define spin_unlock_irqrestore(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ (void) flags; \ ++ spin_unlock(lock); \ ++ } while (0) ++ ++#define spin_trylock_bh(lock) __cond_lock(lock, rt_spin_trylock_bh(lock)) ++#define spin_trylock_irq(lock) spin_trylock(lock) ++ ++#define spin_trylock_irqsave(lock, flags) \ ++({ \ ++ int __locked; \ ++ \ ++ typecheck(unsigned long, flags); \ ++ flags = 0; \ ++ __locked = spin_trylock(lock); \ ++ __locked; \ ++}) ++ ++#ifdef CONFIG_GENERIC_LOCKBREAK ++# define spin_is_contended(lock) ((lock)->break_lock) ++#else ++# define spin_is_contended(lock) (((void)(lock), 0)) ++#endif ++ ++static inline int spin_can_lock(spinlock_t *lock) ++{ ++ return !rt_mutex_is_locked(&lock->lock); ++} ++ ++static inline int spin_is_locked(spinlock_t *lock) ++{ ++ return rt_mutex_is_locked(&lock->lock); ++} ++ ++static inline void assert_spin_locked(spinlock_t *lock) ++{ ++ BUG_ON(!spin_is_locked(lock)); ++} ++ ++#endif +diff --git a/include/linux/spinlock_types.h b/include/linux/spinlock_types.h +index b981caafe..8d896d3e1 100644 +--- a/include/linux/spinlock_types.h ++++ b/include/linux/spinlock_types.h +@@ -9,93 +9,15 @@ + * Released under the General Public License (GPL). + */ + +-#if defined(CONFIG_SMP) +-# include +-#else +-# include +-#endif +- +-#include +- +-typedef struct raw_spinlock { +- arch_spinlock_t raw_lock; +-#ifdef CONFIG_DEBUG_SPINLOCK +- unsigned int magic, owner_cpu; +- void *owner; +-#endif +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +- struct lockdep_map dep_map; +-#endif +-} raw_spinlock_t; +- +-#define SPINLOCK_MAGIC 0xdead4ead +- +-#define SPINLOCK_OWNER_INIT ((void *)-1L) +- +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +-# define RAW_SPIN_DEP_MAP_INIT(lockname) \ +- .dep_map = { \ +- .name = #lockname, \ +- .wait_type_inner = LD_WAIT_SPIN, \ +- } +-# define SPIN_DEP_MAP_INIT(lockname) \ +- .dep_map = { \ +- .name = #lockname, \ +- .wait_type_inner = LD_WAIT_CONFIG, \ +- } +-#else +-# define RAW_SPIN_DEP_MAP_INIT(lockname) +-# define SPIN_DEP_MAP_INIT(lockname) +-#endif ++#include + +-#ifdef CONFIG_DEBUG_SPINLOCK +-# define SPIN_DEBUG_INIT(lockname) \ +- .magic = SPINLOCK_MAGIC, \ +- .owner_cpu = -1, \ +- .owner = SPINLOCK_OWNER_INIT, ++#ifndef CONFIG_PREEMPT_RT ++# include ++# include + #else +-# define SPIN_DEBUG_INIT(lockname) ++# include ++# include ++# include + #endif + +-#define __RAW_SPIN_LOCK_INITIALIZER(lockname) \ +- { \ +- .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ +- SPIN_DEBUG_INIT(lockname) \ +- RAW_SPIN_DEP_MAP_INIT(lockname) } +- +-#define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ +- (raw_spinlock_t) __RAW_SPIN_LOCK_INITIALIZER(lockname) +- +-#define DEFINE_RAW_SPINLOCK(x) raw_spinlock_t x = __RAW_SPIN_LOCK_UNLOCKED(x) +- +-typedef struct spinlock { +- union { +- struct raw_spinlock rlock; +- +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +-# define LOCK_PADSIZE (offsetof(struct raw_spinlock, dep_map)) +- struct { +- u8 __padding[LOCK_PADSIZE]; +- struct lockdep_map dep_map; +- }; +-#endif +- }; +-} spinlock_t; +- +-#define ___SPIN_LOCK_INITIALIZER(lockname) \ +- { \ +- .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ +- SPIN_DEBUG_INIT(lockname) \ +- SPIN_DEP_MAP_INIT(lockname) } +- +-#define __SPIN_LOCK_INITIALIZER(lockname) \ +- { { .rlock = ___SPIN_LOCK_INITIALIZER(lockname) } } +- +-#define __SPIN_LOCK_UNLOCKED(lockname) \ +- (spinlock_t) __SPIN_LOCK_INITIALIZER(lockname) +- +-#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x) +- +-#include +- + #endif /* __LINUX_SPINLOCK_TYPES_H */ +diff --git a/include/linux/spinlock_types_nort.h b/include/linux/spinlock_types_nort.h +new file mode 100644 +index 000000000..e4549f0dd +--- /dev/null ++++ b/include/linux/spinlock_types_nort.h +@@ -0,0 +1,39 @@ ++#ifndef __LINUX_SPINLOCK_TYPES_NORT_H ++#define __LINUX_SPINLOCK_TYPES_NORT_H ++ ++#ifndef __LINUX_SPINLOCK_TYPES_H ++#error "Do not include directly. Include spinlock_types.h instead" ++#endif ++ ++/* ++ * The non RT version maps spinlocks to raw_spinlocks ++ */ ++typedef struct spinlock { ++ union { ++ struct raw_spinlock rlock; ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define LOCK_PADSIZE (offsetof(struct raw_spinlock, dep_map)) ++ struct { ++ u8 __padding[LOCK_PADSIZE]; ++ struct lockdep_map dep_map; ++ }; ++#endif ++ }; ++} spinlock_t; ++ ++#define ___SPIN_LOCK_INITIALIZER(lockname) \ ++{ \ ++ .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ ++ SPIN_DEBUG_INIT(lockname) \ ++ SPIN_DEP_MAP_INIT(lockname) } ++ ++#define __SPIN_LOCK_INITIALIZER(lockname) \ ++ { { .rlock = ___SPIN_LOCK_INITIALIZER(lockname) } } ++ ++#define __SPIN_LOCK_UNLOCKED(lockname) \ ++ (spinlock_t) __SPIN_LOCK_INITIALIZER(lockname) ++ ++#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x) ++ ++#endif +diff --git a/include/linux/spinlock_types_raw.h b/include/linux/spinlock_types_raw.h +new file mode 100644 +index 000000000..1d4a180e9 +--- /dev/null ++++ b/include/linux/spinlock_types_raw.h +@@ -0,0 +1,65 @@ ++#ifndef __LINUX_SPINLOCK_TYPES_RAW_H ++#define __LINUX_SPINLOCK_TYPES_RAW_H ++ ++#include ++ ++#if defined(CONFIG_SMP) ++# include ++#else ++# include ++#endif ++ ++#include ++ ++typedef struct raw_spinlock { ++ arch_spinlock_t raw_lock; ++#ifdef CONFIG_DEBUG_SPINLOCK ++ unsigned int magic, owner_cpu; ++ void *owner; ++#endif ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++} raw_spinlock_t; ++ ++#define SPINLOCK_MAGIC 0xdead4ead ++ ++#define SPINLOCK_OWNER_INIT ((void *)-1L) ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define RAW_SPIN_DEP_MAP_INIT(lockname) \ ++ .dep_map = { \ ++ .name = #lockname, \ ++ .wait_type_inner = LD_WAIT_SPIN, \ ++ } ++# define SPIN_DEP_MAP_INIT(lockname) \ ++ .dep_map = { \ ++ .name = #lockname, \ ++ .wait_type_inner = LD_WAIT_CONFIG, \ ++ } ++#else ++# define RAW_SPIN_DEP_MAP_INIT(lockname) ++# define SPIN_DEP_MAP_INIT(lockname) ++#endif ++ ++#ifdef CONFIG_DEBUG_SPINLOCK ++# define SPIN_DEBUG_INIT(lockname) \ ++ .magic = SPINLOCK_MAGIC, \ ++ .owner_cpu = -1, \ ++ .owner = SPINLOCK_OWNER_INIT, ++#else ++# define SPIN_DEBUG_INIT(lockname) ++#endif ++ ++#define __RAW_SPIN_LOCK_INITIALIZER(lockname) \ ++{ \ ++ .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ ++ SPIN_DEBUG_INIT(lockname) \ ++ RAW_SPIN_DEP_MAP_INIT(lockname) } ++ ++#define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ ++ (raw_spinlock_t) __RAW_SPIN_LOCK_INITIALIZER(lockname) ++ ++#define DEFINE_RAW_SPINLOCK(x) raw_spinlock_t x = __RAW_SPIN_LOCK_UNLOCKED(x) ++ ++#endif +diff --git a/include/linux/spinlock_types_rt.h b/include/linux/spinlock_types_rt.h +new file mode 100644 +index 000000000..446da786e +--- /dev/null ++++ b/include/linux/spinlock_types_rt.h +@@ -0,0 +1,38 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++#ifndef __LINUX_SPINLOCK_TYPES_RT_H ++#define __LINUX_SPINLOCK_TYPES_RT_H ++ ++#ifndef __LINUX_SPINLOCK_TYPES_H ++#error "Do not include directly. Include spinlock_types.h instead" ++#endif ++ ++#include ++ ++/* ++ * PREEMPT_RT: spinlocks - an RT mutex plus lock-break field: ++ */ ++typedef struct spinlock { ++ struct rt_mutex lock; ++ unsigned int break_lock; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++} spinlock_t; ++ ++#define __RT_SPIN_INITIALIZER(name) \ ++ { \ ++ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock), \ ++ .save_state = 1, \ ++ } ++/* ++.wait_list = PLIST_HEAD_INIT_RAW((name).lock.wait_list, (name).lock.wait_lock) ++*/ ++ ++#define __SPIN_LOCK_UNLOCKED(name) \ ++ { .lock = __RT_SPIN_INITIALIZER(name.lock), \ ++ SPIN_DEP_MAP_INIT(name) } ++ ++#define DEFINE_SPINLOCK(name) \ ++ spinlock_t name = __SPIN_LOCK_UNLOCKED(name) ++ ++#endif +diff --git a/include/linux/spinlock_types_up.h b/include/linux/spinlock_types_up.h +index c09b6407a..d9b371fa1 100644 +--- a/include/linux/spinlock_types_up.h ++++ b/include/linux/spinlock_types_up.h +@@ -1,7 +1,7 @@ + #ifndef __LINUX_SPINLOCK_TYPES_UP_H + #define __LINUX_SPINLOCK_TYPES_UP_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H ++#if !defined(__LINUX_SPINLOCK_TYPES_H) && !defined(__LINUX_RT_MUTEX_H) + # error "please don't include this file directly" + #endif + +diff --git a/include/linux/stop_machine.h b/include/linux/stop_machine.h +index 2959b9e52..f9f7c954b 100644 +--- a/include/linux/stop_machine.h ++++ b/include/linux/stop_machine.h +@@ -25,6 +25,7 @@ typedef int (*cpu_stop_fn_t)(void *arg); + struct cpu_stop_work { + struct list_head list; /* cpu_stopper->works */ + cpu_stop_fn_t fn; ++ unsigned long caller; + void *arg; + struct cpu_stop_done *done; + KABI_RESERVE(1) +@@ -38,6 +39,8 @@ void stop_machine_park(int cpu); + void stop_machine_unpark(int cpu); + void stop_machine_yield(const struct cpumask *cpumask); + ++extern void print_stop_info(const char *log_lvl, struct task_struct *task); ++ + #else /* CONFIG_SMP */ + + #include +@@ -82,6 +85,8 @@ static inline bool stop_one_cpu_nowait(unsigned int cpu, + return false; + } + ++static inline void print_stop_info(const char *log_lvl, struct task_struct *task) { } ++ + #endif /* CONFIG_SMP */ + + /* +diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h +index 19f76d87f..7c841bf0a 100644 +--- a/include/linux/thread_info.h ++++ b/include/linux/thread_info.h +@@ -36,7 +36,17 @@ static inline long set_restart_fn(struct restart_block *restart, + + #define THREADINFO_GFP (GFP_KERNEL_ACCOUNT | __GFP_ZERO) + +-#define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED) ++#ifdef CONFIG_PREEMPT_LAZY ++#define tif_need_resched() (test_thread_flag(TIF_NEED_RESCHED) || \ ++ test_thread_flag(TIF_NEED_RESCHED_LAZY)) ++#define tif_need_resched_now() (test_thread_flag(TIF_NEED_RESCHED)) ++#define tif_need_resched_lazy() test_thread_flag(TIF_NEED_RESCHED_LAZY)) ++ ++#else ++#define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED) ++#define tif_need_resched_now() test_thread_flag(TIF_NEED_RESCHED) ++#define tif_need_resched_lazy() 0 ++#endif + + #ifndef CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES + static inline int arch_within_stack_frames(const void * const stack, +diff --git a/include/linux/trace_events.h b/include/linux/trace_events.h +index 409385b25..3b3c9de82 100644 +--- a/include/linux/trace_events.h ++++ b/include/linux/trace_events.h +@@ -67,6 +67,8 @@ struct trace_entry { + unsigned char flags; + unsigned char preempt_count; + int pid; ++ unsigned char migrate_disable; ++ unsigned char preempt_lazy_count; + }; + + #define TRACE_EVENT_TYPE_MAX \ +@@ -152,17 +154,66 @@ static inline void tracing_generic_entry_update(struct trace_entry *entry, + unsigned short type, + unsigned int trace_ctx) + { +- struct task_struct *tsk = current; +- + entry->preempt_count = trace_ctx & 0xff; +- entry->pid = (tsk) ? tsk->pid : 0; ++ entry->migrate_disable = (trace_ctx >> 8) & 0xff; ++ entry->preempt_lazy_count = (trace_ctx >> 16) & 0xff; ++ entry->pid = current->pid; + entry->type = type; +- entry->flags = trace_ctx >> 16; ++ entry->flags = trace_ctx >> 24; + } + +-unsigned int tracing_gen_ctx_flags(unsigned long irqflags); +-unsigned int tracing_gen_ctx(void); +-unsigned int tracing_gen_ctx_dec(void); ++unsigned int tracing_gen_ctx_irq_test(unsigned int irqs_status); ++ ++enum trace_flag_type { ++ TRACE_FLAG_IRQS_OFF = 0x01, ++ TRACE_FLAG_IRQS_NOSUPPORT = 0x02, ++ TRACE_FLAG_NEED_RESCHED = 0x04, ++ TRACE_FLAG_HARDIRQ = 0x08, ++ TRACE_FLAG_SOFTIRQ = 0x10, ++ TRACE_FLAG_PREEMPT_RESCHED = 0x20, ++ TRACE_FLAG_NMI = 0x40, ++ TRACE_FLAG_NEED_RESCHED_LAZY = 0x80, ++}; ++ ++#ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT ++static inline unsigned int tracing_gen_ctx_flags(unsigned long irqflags) ++{ ++ unsigned int irq_status = irqs_disabled_flags(irqflags) ? ++ TRACE_FLAG_IRQS_OFF : 0; ++ return tracing_gen_ctx_irq_test(irq_status); ++} ++static inline unsigned int tracing_gen_ctx(void) ++{ ++ unsigned long irqflags; ++ ++ local_save_flags(irqflags); ++ return tracing_gen_ctx_flags(irqflags); ++} ++#else ++ ++static inline unsigned int tracing_gen_ctx_flags(unsigned long irqflags) ++{ ++ return tracing_gen_ctx_irq_test(TRACE_FLAG_IRQS_NOSUPPORT); ++} ++static inline unsigned int tracing_gen_ctx(void) ++{ ++ return tracing_gen_ctx_irq_test(TRACE_FLAG_IRQS_NOSUPPORT); ++} ++#endif ++ ++static inline unsigned int tracing_gen_ctx_dec(void) ++{ ++ unsigned int trace_ctx; ++ ++ trace_ctx = tracing_gen_ctx(); ++ /* ++ * Subtract one from the preeption counter if preemption is enabled, ++ * see trace_event_buffer_reserve()for details. ++ */ ++ if (IS_ENABLED(CONFIG_PREEMPTION)) ++ trace_ctx--; ++ return trace_ctx; ++} + + struct trace_event_file; + +diff --git a/include/linux/u64_stats_sync.h b/include/linux/u64_stats_sync.h +index e81856c0b..66eb968a0 100644 +--- a/include/linux/u64_stats_sync.h ++++ b/include/linux/u64_stats_sync.h +@@ -66,7 +66,7 @@ + #include + + struct u64_stats_sync { +-#if BITS_PER_LONG==32 && defined(CONFIG_SMP) ++#if BITS_PER_LONG==32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) + seqcount_t seq; + #endif + }; +@@ -115,7 +115,7 @@ static inline void u64_stats_inc(u64_stats_t *p) + } + #endif + +-#if BITS_PER_LONG == 32 && defined(CONFIG_SMP) ++#if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) + #define u64_stats_init(syncp) seqcount_init(&(syncp)->seq) + #else + static inline void u64_stats_init(struct u64_stats_sync *syncp) +@@ -125,15 +125,19 @@ static inline void u64_stats_init(struct u64_stats_sync *syncp) + + static inline void u64_stats_update_begin(struct u64_stats_sync *syncp) + { +-#if BITS_PER_LONG==32 && defined(CONFIG_SMP) ++#if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ preempt_disable(); + write_seqcount_begin(&syncp->seq); + #endif + } + + static inline void u64_stats_update_end(struct u64_stats_sync *syncp) + { +-#if BITS_PER_LONG==32 && defined(CONFIG_SMP) ++#if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) + write_seqcount_end(&syncp->seq); ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ preempt_enable(); + #endif + } + +@@ -142,8 +146,11 @@ u64_stats_update_begin_irqsave(struct u64_stats_sync *syncp) + { + unsigned long flags = 0; + +-#if BITS_PER_LONG==32 && defined(CONFIG_SMP) +- local_irq_save(flags); ++#if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ preempt_disable(); ++ else ++ local_irq_save(flags); + write_seqcount_begin(&syncp->seq); + #endif + return flags; +@@ -153,15 +160,18 @@ static inline void + u64_stats_update_end_irqrestore(struct u64_stats_sync *syncp, + unsigned long flags) + { +-#if BITS_PER_LONG==32 && defined(CONFIG_SMP) ++#if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) + write_seqcount_end(&syncp->seq); +- local_irq_restore(flags); ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ preempt_enable(); ++ else ++ local_irq_restore(flags); + #endif + } + + static inline unsigned int __u64_stats_fetch_begin(const struct u64_stats_sync *syncp) + { +-#if BITS_PER_LONG==32 && defined(CONFIG_SMP) ++#if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) + return read_seqcount_begin(&syncp->seq); + #else + return 0; +@@ -170,7 +180,7 @@ static inline unsigned int __u64_stats_fetch_begin(const struct u64_stats_sync * + + static inline unsigned int u64_stats_fetch_begin(const struct u64_stats_sync *syncp) + { +-#if BITS_PER_LONG==32 && !defined(CONFIG_SMP) ++#if BITS_PER_LONG == 32 && (!defined(CONFIG_SMP) && !defined(CONFIG_PREEMPT_RT)) + preempt_disable(); + #endif + return __u64_stats_fetch_begin(syncp); +@@ -179,7 +189,7 @@ static inline unsigned int u64_stats_fetch_begin(const struct u64_stats_sync *sy + static inline bool __u64_stats_fetch_retry(const struct u64_stats_sync *syncp, + unsigned int start) + { +-#if BITS_PER_LONG==32 && defined(CONFIG_SMP) ++#if BITS_PER_LONG == 32 && (defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT)) + return read_seqcount_retry(&syncp->seq, start); + #else + return false; +@@ -189,7 +199,7 @@ static inline bool __u64_stats_fetch_retry(const struct u64_stats_sync *syncp, + static inline bool u64_stats_fetch_retry(const struct u64_stats_sync *syncp, + unsigned int start) + { +-#if BITS_PER_LONG==32 && !defined(CONFIG_SMP) ++#if BITS_PER_LONG == 32 && (!defined(CONFIG_SMP) && !defined(CONFIG_PREEMPT_RT)) + preempt_enable(); + #endif + return __u64_stats_fetch_retry(syncp, start); +@@ -203,7 +213,9 @@ static inline bool u64_stats_fetch_retry(const struct u64_stats_sync *syncp, + */ + static inline unsigned int u64_stats_fetch_begin_irq(const struct u64_stats_sync *syncp) + { +-#if BITS_PER_LONG==32 && !defined(CONFIG_SMP) ++#if BITS_PER_LONG == 32 && defined(CONFIG_PREEMPT_RT) ++ preempt_disable(); ++#elif BITS_PER_LONG == 32 && !defined(CONFIG_SMP) + local_irq_disable(); + #endif + return __u64_stats_fetch_begin(syncp); +@@ -212,7 +224,9 @@ static inline unsigned int u64_stats_fetch_begin_irq(const struct u64_stats_sync + static inline bool u64_stats_fetch_retry_irq(const struct u64_stats_sync *syncp, + unsigned int start) + { +-#if BITS_PER_LONG==32 && !defined(CONFIG_SMP) ++#if BITS_PER_LONG == 32 && defined(CONFIG_PREEMPT_RT) ++ preempt_enable(); ++#elif BITS_PER_LONG == 32 && !defined(CONFIG_SMP) + local_irq_enable(); + #endif + return __u64_stats_fetch_retry(syncp, start); +diff --git a/include/linux/vmstat.h b/include/linux/vmstat.h +index 322dcbfcc..9a3a10ea3 100644 +--- a/include/linux/vmstat.h ++++ b/include/linux/vmstat.h +@@ -63,7 +63,9 @@ DECLARE_PER_CPU(struct vm_event_state, vm_event_states); + */ + static inline void __count_vm_event(enum vm_event_item item) + { ++ preempt_disable_rt(); + raw_cpu_inc(vm_event_states.event[item]); ++ preempt_enable_rt(); + } + + static inline void count_vm_event(enum vm_event_item item) +@@ -73,7 +75,9 @@ static inline void count_vm_event(enum vm_event_item item) + + static inline void __count_vm_events(enum vm_event_item item, long delta) + { ++ preempt_disable_rt(); + raw_cpu_add(vm_event_states.event[item], delta); ++ preempt_enable_rt(); + } + + static inline void count_vm_events(enum vm_event_item item, long delta) +diff --git a/include/linux/vtime.h b/include/linux/vtime.h +index 2cdeca062..041d6524d 100644 +--- a/include/linux/vtime.h ++++ b/include/linux/vtime.h +@@ -83,36 +83,46 @@ static inline void vtime_init_idle(struct task_struct *tsk, int cpu) { } + #endif + + #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE +-extern void vtime_account_irq_enter(struct task_struct *tsk); +-static inline void vtime_account_irq_exit(struct task_struct *tsk) +-{ +- /* On hard|softirq exit we always account to hard|softirq cputime */ +- vtime_account_kernel(tsk); +-} ++extern void vtime_account_irq(struct task_struct *tsk, unsigned int offset); ++extern void vtime_account_softirq(struct task_struct *tsk); ++extern void vtime_account_hardirq(struct task_struct *tsk); + extern void vtime_flush(struct task_struct *tsk); + #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ +-static inline void vtime_account_irq_enter(struct task_struct *tsk) { } +-static inline void vtime_account_irq_exit(struct task_struct *tsk) { } ++static inline void vtime_account_irq(struct task_struct *tsk, unsigned int offset) { } ++static inline void vtime_account_softirq(struct task_struct *tsk) { } ++static inline void vtime_account_hardirq(struct task_struct *tsk) { } + static inline void vtime_flush(struct task_struct *tsk) { } + #endif + + + #ifdef CONFIG_IRQ_TIME_ACCOUNTING +-extern void irqtime_account_irq(struct task_struct *tsk); ++extern void irqtime_account_irq(struct task_struct *tsk, unsigned int offset); + #else +-static inline void irqtime_account_irq(struct task_struct *tsk) { } ++static inline void irqtime_account_irq(struct task_struct *tsk, unsigned int offset) { } + #endif + +-static inline void account_irq_enter_time(struct task_struct *tsk) ++static inline void account_softirq_enter(struct task_struct *tsk) ++{ ++ vtime_account_irq(tsk, SOFTIRQ_OFFSET); ++ irqtime_account_irq(tsk, SOFTIRQ_OFFSET); ++} ++ ++static inline void account_softirq_exit(struct task_struct *tsk) ++{ ++ vtime_account_softirq(tsk); ++ irqtime_account_irq(tsk, 0); ++} ++ ++static inline void account_hardirq_enter(struct task_struct *tsk) + { +- vtime_account_irq_enter(tsk); +- irqtime_account_irq(tsk); ++ vtime_account_irq(tsk, HARDIRQ_OFFSET); ++ irqtime_account_irq(tsk, HARDIRQ_OFFSET); + } + +-static inline void account_irq_exit_time(struct task_struct *tsk) ++static inline void account_hardirq_exit(struct task_struct *tsk) + { +- vtime_account_irq_exit(tsk); +- irqtime_account_irq(tsk); ++ vtime_account_hardirq(tsk); ++ irqtime_account_irq(tsk, 0); + } + + #endif /* _LINUX_KERNEL_VTIME_H */ +diff --git a/include/linux/wait.h b/include/linux/wait.h +index 1663e4768..20aae6938 100644 +--- a/include/linux/wait.h ++++ b/include/linux/wait.h +@@ -10,6 +10,7 @@ + + #include + #include ++#include + + typedef struct wait_queue_entry wait_queue_entry_t; + +diff --git a/include/linux/ww_mutex.h b/include/linux/ww_mutex.h +index 6ecf2a022..3145de598 100644 +--- a/include/linux/ww_mutex.h ++++ b/include/linux/ww_mutex.h +@@ -28,6 +28,14 @@ struct ww_class { + unsigned int is_wait_die; + }; + ++struct ww_mutex { ++ struct mutex base; ++ struct ww_acquire_ctx *ctx; ++#ifdef CONFIG_DEBUG_MUTEXES ++ struct ww_class *ww_class; ++#endif ++}; ++ + struct ww_acquire_ctx { + struct task_struct *task; + unsigned long stamp; +diff --git a/include/net/gen_stats.h b/include/net/gen_stats.h +index 1424e02ce..163f8415e 100644 +--- a/include/net/gen_stats.h ++++ b/include/net/gen_stats.h +@@ -6,6 +6,7 @@ + #include + #include + #include ++#include + + /* Note: this used to be in include/uapi/linux/gen_stats.h */ + struct gnet_stats_basic_packed { +@@ -42,15 +43,15 @@ int gnet_stats_start_copy_compat(struct sk_buff *skb, int type, + spinlock_t *lock, struct gnet_dump *d, + int padattr); + +-int gnet_stats_copy_basic(const seqcount_t *running, ++int gnet_stats_copy_basic(net_seqlock_t *running, + struct gnet_dump *d, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b); +-void __gnet_stats_copy_basic(const seqcount_t *running, ++void __gnet_stats_copy_basic(net_seqlock_t *running, + struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b); +-int gnet_stats_copy_basic_hw(const seqcount_t *running, ++int gnet_stats_copy_basic_hw(net_seqlock_t *running, + struct gnet_dump *d, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b); +@@ -70,13 +71,13 @@ int gen_new_estimator(struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu_bstats, + struct net_rate_estimator __rcu **rate_est, + spinlock_t *lock, +- seqcount_t *running, struct nlattr *opt); ++ net_seqlock_t *running, struct nlattr *opt); + void gen_kill_estimator(struct net_rate_estimator __rcu **ptr); + int gen_replace_estimator(struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu_bstats, + struct net_rate_estimator __rcu **ptr, + spinlock_t *lock, +- seqcount_t *running, struct nlattr *opt); ++ net_seqlock_t *running, struct nlattr *opt); + bool gen_estimator_active(struct net_rate_estimator __rcu **ptr); + bool gen_estimator_read(struct net_rate_estimator __rcu **ptr, + struct gnet_stats_rate_est64 *sample); +diff --git a/include/net/net_seq_lock.h b/include/net/net_seq_lock.h +new file mode 100644 +index 000000000..67710bace +--- /dev/null ++++ b/include/net/net_seq_lock.h +@@ -0,0 +1,15 @@ ++#ifndef __NET_NET_SEQ_LOCK_H__ ++#define __NET_NET_SEQ_LOCK_H__ ++ ++#ifdef CONFIG_PREEMPT_RT ++# define net_seqlock_t seqlock_t ++# define net_seq_begin(__r) read_seqbegin(__r) ++# define net_seq_retry(__r, __s) read_seqretry(__r, __s) ++ ++#else ++# define net_seqlock_t seqcount_t ++# define net_seq_begin(__r) read_seqcount_begin(__r) ++# define net_seq_retry(__r, __s) read_seqcount_retry(__r, __s) ++#endif ++ ++#endif +diff --git a/include/net/netns/xfrm.h b/include/net/netns/xfrm.h +index 9144e0f09..464d14b2a 100644 +--- a/include/net/netns/xfrm.h ++++ b/include/net/netns/xfrm.h +@@ -74,7 +74,7 @@ struct netns_xfrm { + struct dst_ops xfrm6_dst_ops; + #endif + spinlock_t xfrm_state_lock; +- seqcount_t xfrm_state_hash_generation; ++ seqcount_spinlock_t xfrm_state_hash_generation; + seqcount_spinlock_t xfrm_policy_hash_generation; + + spinlock_t xfrm_policy_lock; +diff --git a/include/net/sch_generic.h b/include/net/sch_generic.h +index fad29c996..a0a8b6a3f 100644 +--- a/include/net/sch_generic.h ++++ b/include/net/sch_generic.h +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -102,7 +103,7 @@ struct Qdisc { + struct sk_buff_head gso_skb ____cacheline_aligned_in_smp; + struct qdisc_skb_head q; + struct gnet_stats_basic_packed bstats; +- seqcount_t running; ++ net_seqlock_t running; + struct gnet_stats_queue qstats; + unsigned long state; + struct Qdisc *next_sched; +@@ -146,7 +147,11 @@ static inline bool qdisc_is_running(struct Qdisc *qdisc) + { + if (qdisc->flags & TCQ_F_NOLOCK) + return spin_is_locked(&qdisc->seqlock); ++#ifdef CONFIG_PREEMPT_RT ++ return spin_is_locked(&qdisc->running.lock) ? true : false; ++#else + return (raw_read_seqcount(&qdisc->running) & 1) ? true : false; ++#endif + } + + static inline bool qdisc_is_percpu_stats(const struct Qdisc *q) +@@ -187,17 +192,35 @@ static inline bool qdisc_run_begin(struct Qdisc *qdisc) + } else if (qdisc_is_running(qdisc)) { + return false; + } ++#ifdef CONFIG_PREEMPT_RT ++ if (spin_trylock(&qdisc->running.lock)) { ++ seqcount_t *s = &qdisc->running.seqcount.seqcount; ++ /* ++ * Variant of write_seqcount_t_begin() telling lockdep that a ++ * trylock was attempted. ++ */ ++ raw_write_seqcount_t_begin(s); ++ seqcount_acquire(&s->dep_map, 0, 1, _RET_IP_); ++ return true; ++ } ++ return false; ++#else + /* Variant of write_seqcount_begin() telling lockdep a trylock + * was attempted. + */ + raw_write_seqcount_begin(&qdisc->running); + seqcount_acquire(&qdisc->running.dep_map, 0, 1, _RET_IP_); + return true; ++#endif + } + + static inline void qdisc_run_end(struct Qdisc *qdisc) + { ++#ifdef CONFIG_PREEMPT_RT ++ write_sequnlock(&qdisc->running); ++#else + write_seqcount_end(&qdisc->running); ++#endif + if (qdisc->flags & TCQ_F_NOLOCK) { + spin_unlock(&qdisc->seqlock); + +@@ -591,7 +614,7 @@ static inline spinlock_t *qdisc_root_sleeping_lock(const struct Qdisc *qdisc) + return qdisc_lock(root); + } + +-static inline seqcount_t *qdisc_root_sleeping_running(const struct Qdisc *qdisc) ++static inline net_seqlock_t *qdisc_root_sleeping_running(const struct Qdisc *qdisc) + { + struct Qdisc *root = qdisc_root_sleeping(qdisc); + +diff --git a/include/trace/events/sched.h b/include/trace/events/sched.h +index eb5ec1fb6..122d96db9 100644 +--- a/include/trace/events/sched.h ++++ b/include/trace/events/sched.h +@@ -732,6 +732,18 @@ DEFINE_EVENT(psi_memstall_template, psi_memstall_leave, + TP_ARGS(function) + ); + ++DECLARE_TRACE(sched_migrate_disable_tp, ++ TP_PROTO(struct task_struct *p), ++ TP_ARGS(p)); ++ ++DECLARE_TRACE(sched_migrate_enable_tp, ++ TP_PROTO(struct task_struct *p), ++ TP_ARGS(p)); ++ ++DECLARE_TRACE(sched_migrate_pull_tp, ++ TP_PROTO(struct task_struct *p), ++ TP_ARGS(p)); ++ + #endif /* _TRACE_SCHED_H */ + + /* This part must be outside protection */ +diff --git a/init/Kconfig b/init/Kconfig +index 31fff350a..7cc9ec6ef 100644 +--- a/init/Kconfig ++++ b/init/Kconfig +@@ -866,7 +866,7 @@ config NUMA_BALANCING + bool "Memory placement aware NUMA scheduler" + depends on ARCH_SUPPORTS_NUMA_BALANCING + depends on !ARCH_WANT_NUMA_VARIABLE_LOCALITY +- depends on SMP && NUMA && MIGRATION ++ depends on SMP && NUMA && MIGRATION && !PREEMPT_RT + help + This option adds support for automatic NUMA aware memory/task placement. + The mechanism is quite primitive and is based on migrating memory when +@@ -1023,6 +1023,7 @@ config CFS_BANDWIDTH + config RT_GROUP_SCHED + bool "Group scheduling for SCHED_RR/FIFO" + depends on CGROUP_SCHED ++ depends on !PREEMPT_RT + default n + help + This feature lets you explicitly allocate real CPU bandwidth +@@ -2005,6 +2006,7 @@ choice + + config SLAB + bool "SLAB" ++ depends on !PREEMPT_RT + select HAVE_HARDENED_USERCOPY_ALLOCATOR + help + The regular slab allocator that is established and known to work +@@ -2025,6 +2027,7 @@ config SLUB + config SLOB + depends on EXPERT + bool "SLOB (Simple Allocator)" ++ depends on !PREEMPT_RT + help + SLOB replaces the stock allocator with a drastically simpler + allocator. SLOB is generally more space efficient but +@@ -2091,7 +2094,7 @@ config SHUFFLE_PAGE_ALLOCATOR + + config SLUB_CPU_PARTIAL + default y +- depends on SLUB && SMP ++ depends on SLUB && SMP && !PREEMPT_RT + bool "SLUB per cpu partial cache" + help + Per cpu partial caches accelerate objects allocation and freeing +diff --git a/kernel/Kconfig.locks b/kernel/Kconfig.locks +index 3de8fd118..4198f0273 100644 +--- a/kernel/Kconfig.locks ++++ b/kernel/Kconfig.locks +@@ -251,7 +251,7 @@ config ARCH_USE_QUEUED_RWLOCKS + + config QUEUED_RWLOCKS + def_bool y if ARCH_USE_QUEUED_RWLOCKS +- depends on SMP ++ depends on SMP && !PREEMPT_RT + + config ARCH_HAS_MMIOWB + bool +diff --git a/kernel/Kconfig.preempt b/kernel/Kconfig.preempt +index e62a62303..b95f8784c 100644 +--- a/kernel/Kconfig.preempt ++++ b/kernel/Kconfig.preempt +@@ -1,5 +1,11 @@ + # SPDX-License-Identifier: GPL-2.0-only + ++config HAVE_PREEMPT_LAZY ++ bool ++ ++config PREEMPT_LAZY ++ def_bool y if HAVE_PREEMPT_LAZY && PREEMPT_RT ++ + choice + prompt "Preemption Model" + default PREEMPT_NONE +@@ -60,6 +66,7 @@ config PREEMPT_RT + bool "Fully Preemptible Kernel (Real-Time)" + depends on EXPERT && ARCH_SUPPORTS_RT + select PREEMPTION ++ select RT_MUTEXES + help + This option turns the kernel into a real-time kernel by replacing + various locking primitives (spinlocks, rwlocks, etc.) with +diff --git a/kernel/cgroup/cpuset.c b/kernel/cgroup/cpuset.c +index 90de01cc6..d3b1a03d8 100644 +--- a/kernel/cgroup/cpuset.c ++++ b/kernel/cgroup/cpuset.c +@@ -358,7 +358,7 @@ void cpuset_read_unlock(void) + percpu_up_read(&cpuset_rwsem); + } + +-static DEFINE_SPINLOCK(callback_lock); ++static DEFINE_RAW_SPINLOCK(callback_lock); + + static struct workqueue_struct *cpuset_migrate_mm_wq; + +@@ -737,9 +737,9 @@ static int update_prefer_cpumask(struct cpuset *cs, struct cpuset *trialcs, + if (!cpumask_empty(trialcs->prefer_cpus)) + dynamic_affinity_enable(); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cpumask_copy(cs->prefer_cpus, trialcs->prefer_cpus); +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + return 0; + } +@@ -1399,7 +1399,7 @@ static int update_parent_subparts_cpumask(struct cpuset *cpuset, int cmd, + * Newly added CPUs will be removed from effective_cpus and + * newly deleted ones will be added back to effective_cpus. + */ +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + if (adding) { + cpumask_or(parent->subparts_cpus, + parent->subparts_cpus, tmp->addmask); +@@ -1421,7 +1421,7 @@ static int update_parent_subparts_cpumask(struct cpuset *cpuset, int cmd, + + if (cpuset->partition_root_state != new_prs) + cpuset->partition_root_state = new_prs; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + return cmd == partcmd_update; + } +@@ -1524,7 +1524,7 @@ static void update_cpumasks_hier(struct cpuset *cs, struct tmpmasks *tmp) + continue; + rcu_read_unlock(); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + + cpumask_copy(cp->effective_cpus, tmp->new_cpus); + if (cp->nr_subparts_cpus && (new_prs != PRS_ENABLED)) { +@@ -1558,7 +1558,7 @@ static void update_cpumasks_hier(struct cpuset *cs, struct tmpmasks *tmp) + if (new_prs != cp->partition_root_state) + cp->partition_root_state = new_prs; + +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + WARN_ON(!is_in_v2_mode() && + !cpumask_equal(cp->cpus_allowed, cp->effective_cpus)); +@@ -1686,7 +1686,7 @@ static int update_cpumask(struct cpuset *cs, struct cpuset *trialcs, + return -EINVAL; + } + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cpumask_copy(cs->cpus_allowed, trialcs->cpus_allowed); + + /* +@@ -1696,7 +1696,7 @@ static int update_cpumask(struct cpuset *cs, struct cpuset *trialcs, + cpumask_and(cs->subparts_cpus, cs->subparts_cpus, cs->cpus_allowed); + cs->nr_subparts_cpus = cpumask_weight(cs->subparts_cpus); + } +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + update_cpumasks_hier(cs, &tmp); + +@@ -1890,9 +1890,9 @@ static void update_nodemasks_hier(struct cpuset *cs, nodemask_t *new_mems) + continue; + rcu_read_unlock(); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cp->effective_mems = *new_mems; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + WARN_ON(!is_in_v2_mode() && + !nodes_equal(cp->mems_allowed, cp->effective_mems)); +@@ -1960,9 +1960,9 @@ static int update_nodemask(struct cpuset *cs, struct cpuset *trialcs, + if (retval < 0) + goto done; + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cs->mems_allowed = trialcs->mems_allowed; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + /* use trialcs->mems_allowed as a temp variable */ + update_nodemasks_hier(cs, &trialcs->mems_allowed); +@@ -2053,9 +2053,9 @@ static int update_flag(cpuset_flagbits_t bit, struct cpuset *cs, + spread_flag_changed = ((is_spread_slab(cs) != is_spread_slab(trialcs)) + || (is_spread_page(cs) != is_spread_page(trialcs))); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cs->flags = trialcs->flags; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + if (!cpumask_empty(trialcs->cpus_allowed) && balance_flag_changed) + rebuild_sched_domains_locked(); +@@ -2141,9 +2141,9 @@ static int update_prstate(struct cpuset *cs, int new_prs) + rebuild_sched_domains_locked(); + out: + if (!err) { +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cs->partition_root_state = new_prs; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + } + + free_cpumasks(NULL, &tmpmask); +@@ -2575,7 +2575,7 @@ static int cpuset_common_seq_show(struct seq_file *sf, void *v) + cpuset_filetype_t type = seq_cft(sf)->private; + int ret = 0; + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + + switch (type) { + case FILE_CPULIST: +@@ -2602,7 +2602,7 @@ static int cpuset_common_seq_show(struct seq_file *sf, void *v) + ret = -EINVAL; + } + +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + return ret; + } + +@@ -2923,14 +2923,14 @@ static int cpuset_css_online(struct cgroup_subsys_state *css) + + cpuset_inc(); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + if (is_in_v2_mode()) { + cpumask_copy(cs->effective_cpus, parent->effective_cpus); + cs->effective_mems = parent->effective_mems; + cs->use_parent_ecpus = true; + parent->child_ecpus_count++; + } +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + if (!test_bit(CGRP_CPUSET_CLONE_CHILDREN, &css->cgroup->flags)) + goto out_unlock; +@@ -2957,7 +2957,7 @@ static int cpuset_css_online(struct cgroup_subsys_state *css) + } + rcu_read_unlock(); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cs->mems_allowed = parent->mems_allowed; + cs->effective_mems = parent->mems_allowed; + cpumask_copy(cs->cpus_allowed, parent->cpus_allowed); +@@ -2965,7 +2965,7 @@ static int cpuset_css_online(struct cgroup_subsys_state *css) + #ifdef CONFIG_QOS_SCHED_DYNAMIC_AFFINITY + cpumask_copy(cs->prefer_cpus, parent->prefer_cpus); + #endif +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + out_unlock: + percpu_up_write(&cpuset_rwsem); + put_online_cpus(); +@@ -3021,7 +3021,7 @@ static void cpuset_css_free(struct cgroup_subsys_state *css) + static void cpuset_bind(struct cgroup_subsys_state *root_css) + { + percpu_down_write(&cpuset_rwsem); +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + + if (is_in_v2_mode()) { + cpumask_copy(top_cpuset.cpus_allowed, cpu_possible_mask); +@@ -3032,7 +3032,7 @@ static void cpuset_bind(struct cgroup_subsys_state *root_css) + top_cpuset.mems_allowed = top_cpuset.effective_mems; + } + +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + percpu_up_write(&cpuset_rwsem); + } + +@@ -3144,12 +3144,12 @@ hotplug_update_tasks_legacy(struct cpuset *cs, + #endif + bool is_empty; + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cpumask_copy(cs->cpus_allowed, new_cpus); + cpumask_copy(cs->effective_cpus, new_cpus); + cs->mems_allowed = *new_mems; + cs->effective_mems = *new_mems; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + /* + * Don't call update_tasks_cpumask() if the cpuset becomes empty, +@@ -3193,10 +3193,10 @@ hotplug_update_tasks(struct cpuset *cs, + if (nodes_empty(*new_mems)) + *new_mems = parent_cs(cs)->effective_mems; + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cpumask_copy(cs->effective_cpus, new_cpus); + cs->effective_mems = *new_mems; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + if (cpus_updated) + update_tasks_cpumask(cs); +@@ -3263,10 +3263,10 @@ static void cpuset_hotplug_update_tasks(struct cpuset *cs, struct tmpmasks *tmp) + if (is_partition_root(cs) && (cpumask_empty(&new_cpus) || + (parent->partition_root_state == PRS_ERROR))) { + if (cs->nr_subparts_cpus) { +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cs->nr_subparts_cpus = 0; + cpumask_clear(cs->subparts_cpus); +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + compute_effective_cpumask(&new_cpus, cs, parent); + } + +@@ -3280,9 +3280,9 @@ static void cpuset_hotplug_update_tasks(struct cpuset *cs, struct tmpmasks *tmp) + cpumask_empty(&new_cpus)) { + update_parent_subparts_cpumask(cs, partcmd_disable, + NULL, tmp); +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cs->partition_root_state = PRS_ERROR; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + } + cpuset_force_rebuild(); + } +@@ -3362,7 +3362,7 @@ static void cpuset_hotplug_workfn(struct work_struct *work) + + /* synchronize cpus_allowed to cpu_active_mask */ + if (cpus_updated) { +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + if (!on_dfl) + cpumask_copy(top_cpuset.cpus_allowed, &new_cpus); + /* +@@ -3382,17 +3382,17 @@ static void cpuset_hotplug_workfn(struct work_struct *work) + } + } + cpumask_copy(top_cpuset.effective_cpus, &new_cpus); +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + /* we don't mess with cpumasks of tasks in top_cpuset */ + } + + /* synchronize mems_allowed to N_MEMORY */ + if (mems_updated) { +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + if (!on_dfl) + top_cpuset.mems_allowed = new_mems; + top_cpuset.effective_mems = new_mems; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + update_tasks_nodemask(&top_cpuset); + } + +@@ -3496,11 +3496,11 @@ void cpuset_cpus_allowed(struct task_struct *tsk, struct cpumask *pmask) + { + unsigned long flags; + +- spin_lock_irqsave(&callback_lock, flags); ++ raw_spin_lock_irqsave(&callback_lock, flags); + rcu_read_lock(); + guarantee_online_cpus(task_cs(tsk), pmask); + rcu_read_unlock(); +- spin_unlock_irqrestore(&callback_lock, flags); ++ raw_spin_unlock_irqrestore(&callback_lock, flags); + } + + /** +@@ -3561,11 +3561,11 @@ nodemask_t cpuset_mems_allowed(struct task_struct *tsk) + nodemask_t mask; + unsigned long flags; + +- spin_lock_irqsave(&callback_lock, flags); ++ raw_spin_lock_irqsave(&callback_lock, flags); + rcu_read_lock(); + guarantee_online_mems(task_cs(tsk), &mask); + rcu_read_unlock(); +- spin_unlock_irqrestore(&callback_lock, flags); ++ raw_spin_unlock_irqrestore(&callback_lock, flags); + + return mask; + } +@@ -3657,14 +3657,14 @@ bool __cpuset_node_allowed(int node, gfp_t gfp_mask) + return true; + + /* Not hardwall and node outside mems_allowed: scan up cpusets */ +- spin_lock_irqsave(&callback_lock, flags); ++ raw_spin_lock_irqsave(&callback_lock, flags); + + rcu_read_lock(); + cs = nearest_hardwall_ancestor(task_cs(current)); + allowed = node_isset(node, cs->mems_allowed); + rcu_read_unlock(); + +- spin_unlock_irqrestore(&callback_lock, flags); ++ raw_spin_unlock_irqrestore(&callback_lock, flags); + return allowed; + } + +diff --git a/kernel/cgroup/rstat.c b/kernel/cgroup/rstat.c +index d2ae14d0b..7b3bea56d 100644 +--- a/kernel/cgroup/rstat.c ++++ b/kernel/cgroup/rstat.c +@@ -156,8 +156,9 @@ static void cgroup_rstat_flush_locked(struct cgroup *cgrp, bool may_sleep) + raw_spinlock_t *cpu_lock = per_cpu_ptr(&cgroup_rstat_cpu_lock, + cpu); + struct cgroup *pos = NULL; ++ unsigned long flags; + +- raw_spin_lock(cpu_lock); ++ raw_spin_lock_irqsave(cpu_lock, flags); + while ((pos = cgroup_rstat_cpu_pop_updated(pos, cgrp, cpu))) { + struct cgroup_subsys_state *css; + +@@ -169,7 +170,7 @@ static void cgroup_rstat_flush_locked(struct cgroup *cgrp, bool may_sleep) + css->ss->css_rstat_flush(css, cpu); + rcu_read_unlock(); + } +- raw_spin_unlock(cpu_lock); ++ raw_spin_unlock_irqrestore(cpu_lock, flags); + + /* if @may_sleep, play nice and yield if necessary */ + if (may_sleep && (need_resched() || +diff --git a/kernel/cpu.c b/kernel/cpu.c +index a70260b91..106e4b7c0 100644 +--- a/kernel/cpu.c ++++ b/kernel/cpu.c +@@ -1665,7 +1665,7 @@ static struct cpuhp_step cpuhp_hp_states[] = { + .name = "ap:online", + }, + /* +- * Handled on controll processor until the plugged processor manages ++ * Handled on control processor until the plugged processor manages + * this itself. + */ + [CPUHP_TEARDOWN_CPU] = { +@@ -1674,6 +1674,13 @@ static struct cpuhp_step cpuhp_hp_states[] = { + .teardown.single = takedown_cpu, + .cant_stop = true, + }, ++ ++ [CPUHP_AP_SCHED_WAIT_EMPTY] = { ++ .name = "sched:waitempty", ++ .startup.single = NULL, ++ .teardown.single = sched_cpu_wait_empty, ++ }, ++ + /* Handle smpboot threads park/unpark */ + [CPUHP_AP_SMPBOOT_THREADS] = { + .name = "smpboot/threads:online", +diff --git a/kernel/debug/kdb/kdb_main.c b/kernel/debug/kdb/kdb_main.c +index 4e09fab52..1f5c577b9 100644 +--- a/kernel/debug/kdb/kdb_main.c ++++ b/kernel/debug/kdb/kdb_main.c +@@ -2157,7 +2157,7 @@ static int kdb_dmesg(int argc, const char **argv) + int adjust = 0; + int n = 0; + int skip = 0; +- struct kmsg_dumper dumper = { .active = 1 }; ++ struct kmsg_dumper_iter iter = { .active = 1 }; + size_t len; + char buf[201]; + +@@ -2182,8 +2182,8 @@ static int kdb_dmesg(int argc, const char **argv) + kdb_set(2, setargs); + } + +- kmsg_dump_rewind_nolock(&dumper); +- while (kmsg_dump_get_line_nolock(&dumper, 1, NULL, 0, NULL)) ++ kmsg_dump_rewind(&iter); ++ while (kmsg_dump_get_line(&iter, 1, NULL, 0, NULL)) + n++; + + if (lines < 0) { +@@ -2215,8 +2215,8 @@ static int kdb_dmesg(int argc, const char **argv) + if (skip >= n || skip < 0) + return 0; + +- kmsg_dump_rewind_nolock(&dumper); +- while (kmsg_dump_get_line_nolock(&dumper, 1, buf, sizeof(buf), &len)) { ++ kmsg_dump_rewind(&iter); ++ while (kmsg_dump_get_line(&iter, 1, buf, sizeof(buf), &len)) { + if (skip) { + skip--; + continue; +diff --git a/kernel/entry/common.c b/kernel/entry/common.c +index a028b28da..382c0284a 100644 +--- a/kernel/entry/common.c ++++ b/kernel/entry/common.c +@@ -2,6 +2,7 @@ + + #include + #include ++#include + #include + #include + +@@ -156,9 +157,17 @@ static unsigned long exit_to_user_mode_loop(struct pt_regs *regs, + + local_irq_enable_exit_to_user(ti_work); + +- if (ti_work & _TIF_NEED_RESCHED) ++ if (ti_work & _TIF_NEED_RESCHED_MASK) + schedule(); + ++#ifdef ARCH_RT_DELAYS_SIGNAL_SEND ++ if (unlikely(current->forced_info.si_signo)) { ++ struct task_struct *t = current; ++ force_sig_info(&t->forced_info); ++ t->forced_info.si_signo = 0; ++ } ++#endif ++ + if (ti_work & _TIF_UPROBE) + uprobe_notify_resume(regs); + +@@ -209,6 +218,7 @@ static void exit_to_user_mode_prepare(struct pt_regs *regs) + + /* Ensure that the address limit is intact and no locks are held */ + addr_limit_user_check(); ++ kmap_assert_nomap(); + lockdep_assert_irqs_disabled(); + lockdep_sys_exit(); + } +@@ -368,7 +378,7 @@ void irqentry_exit_cond_resched(void) + rcu_irq_exit_check_preempt(); + if (IS_ENABLED(CONFIG_DEBUG_ENTRY)) + WARN_ON_ONCE(!on_thread_stack()); +- if (need_resched()) ++ if (should_resched(0)) + preempt_schedule_irq(); + } + } +diff --git a/kernel/exit.c b/kernel/exit.c +index 26a81ea63..c15ca5450 100644 +--- a/kernel/exit.c ++++ b/kernel/exit.c +@@ -153,7 +153,7 @@ static void __exit_signal(struct task_struct *tsk) + * Do this under ->siglock, we can race with another thread + * doing sigqueue_free() if we have SIGQUEUE_PREALLOC signals. + */ +- flush_sigqueue(&tsk->pending); ++ flush_task_sigqueue(tsk); + tsk->sighand = NULL; + spin_unlock(&sighand->siglock); + +diff --git a/kernel/fork.c b/kernel/fork.c +index 4faf2dd4c..198b7e8cb 100644 +--- a/kernel/fork.c ++++ b/kernel/fork.c +@@ -42,6 +42,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -291,7 +292,7 @@ static inline void free_thread_stack(struct task_struct *tsk) + return; + } + +- vfree_atomic(tsk->stack); ++ vfree(tsk->stack); + return; + } + #endif +@@ -699,6 +700,19 @@ void __mmdrop(struct mm_struct *mm) + } + EXPORT_SYMBOL_GPL(__mmdrop); + ++#ifdef CONFIG_PREEMPT_RT ++/* ++ * RCU callback for delayed mm drop. Not strictly rcu, but we don't ++ * want another facility to make this work. ++ */ ++void __mmdrop_delayed(struct rcu_head *rhp) ++{ ++ struct mm_struct *mm = container_of(rhp, struct mm_struct, delayed_drop); ++ ++ __mmdrop(mm); ++} ++#endif ++ + static void mmdrop_async_fn(struct work_struct *work) + { + struct mm_struct *mm; +@@ -740,6 +754,15 @@ void __put_task_struct(struct task_struct *tsk) + WARN_ON(refcount_read(&tsk->usage)); + WARN_ON(tsk == current); + ++ /* ++ * Remove function-return probe instances associated with this ++ * task and put them back on the free list. ++ */ ++ kprobe_flush_task(tsk); ++ ++ /* Task is done with its stack. */ ++ put_task_stack(tsk); ++ + io_uring_free(tsk); + cgroup_free(tsk); + task_numa_free(tsk, true); +@@ -961,11 +984,13 @@ static struct task_struct *dup_task_struct(struct task_struct *orig, int node) + tsk->task_frag.page = NULL; + tsk->wake_q.next = NULL; + tsk->pf_io_worker = NULL; ++ tsk->wake_q_sleeper.next = NULL; + + account_kernel_stack(tsk, 1); + + kcov_task_init(tsk); + ++ kmap_local_fork(tsk); + #ifdef CONFIG_FAULT_INJECTION + tsk->fail_nth = 0; + #endif +@@ -2110,6 +2135,7 @@ static __latent_entropy struct task_struct *copy_process( + spin_lock_init(&p->alloc_lock); + + init_sigpending(&p->pending); ++ p->sigqueue_cache = NULL; + + p->utime = p->stime = p->gtime = 0; + #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME +diff --git a/kernel/futex/core.c b/kernel/futex/core.c +index 8dd0bc50a..8056aa077 100644 +--- a/kernel/futex/core.c ++++ b/kernel/futex/core.c +@@ -1498,6 +1498,7 @@ static int wake_futex_pi(u32 __user *uaddr, u32 uval, struct futex_pi_state *pi_ + struct task_struct *new_owner; + bool postunlock = false; + DEFINE_WAKE_Q(wake_q); ++ DEFINE_WAKE_Q(wake_sleeper_q); + int ret = 0; + + new_owner = rt_mutex_next_owner(&pi_state->pi_mutex); +@@ -1547,14 +1548,15 @@ static int wake_futex_pi(u32 __user *uaddr, u32 uval, struct futex_pi_state *pi_ + * not fail. + */ + pi_state_update_owner(pi_state, new_owner); +- postunlock = __rt_mutex_futex_unlock(&pi_state->pi_mutex, &wake_q); ++ postunlock = __rt_mutex_futex_unlock(&pi_state->pi_mutex, &wake_q, ++ &wake_sleeper_q); + } + + out_unlock: + raw_spin_unlock_irq(&pi_state->pi_mutex.wait_lock); + + if (postunlock) +- rt_mutex_postunlock(&wake_q); ++ rt_mutex_postunlock(&wake_q, &wake_sleeper_q); + + return ret; + } +@@ -2155,6 +2157,16 @@ static int futex_requeue(u32 __user *uaddr1, unsigned int flags, + */ + requeue_pi_wake_futex(this, &key2, hb2); + continue; ++ } else if (ret == -EAGAIN) { ++ /* ++ * Waiter was woken by timeout or ++ * signal and has set pi_blocked_on to ++ * PI_WAKEUP_INPROGRESS before we ++ * tried to enqueue it on the rtmutex. ++ */ ++ this->pi_state = NULL; ++ put_pi_state(pi_state); ++ continue; + } else if (ret) { + /* + * rt_mutex_start_proxy_lock() detected a +@@ -2847,7 +2859,7 @@ static int futex_lock_pi(u32 __user *uaddr, unsigned int flags, + goto no_block; + } + +- rt_mutex_init_waiter(&rt_waiter); ++ rt_mutex_init_waiter(&rt_waiter, false); + + /* + * On PREEMPT_RT_FULL, when hb->lock becomes an rt_mutex, we must not +@@ -3172,7 +3184,7 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + { + struct hrtimer_sleeper timeout, *to; + struct rt_mutex_waiter rt_waiter; +- struct futex_hash_bucket *hb; ++ struct futex_hash_bucket *hb, *hb2; + union futex_key key2 = FUTEX_KEY_INIT; + struct futex_q q = futex_q_init; + int res, ret; +@@ -3193,7 +3205,7 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + * The waiter is allocated on our stack, manipulated by the requeue + * code while we sleep on uaddr. + */ +- rt_mutex_init_waiter(&rt_waiter); ++ rt_mutex_init_waiter(&rt_waiter, false); + + ret = get_futex_key(uaddr2, flags & FLAGS_SHARED, &key2, FUTEX_WRITE); + if (unlikely(ret != 0)) +@@ -3224,20 +3236,55 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + /* Queue the futex_q, drop the hb lock, wait for wakeup. */ + futex_wait_queue_me(hb, &q, to); + +- spin_lock(&hb->lock); +- ret = handle_early_requeue_pi_wakeup(hb, &q, &key2, to); +- spin_unlock(&hb->lock); +- if (ret) +- goto out; ++ /* ++ * On RT we must avoid races with requeue and trying to block ++ * on two mutexes (hb->lock and uaddr2's rtmutex) by ++ * serializing access to pi_blocked_on with pi_lock. ++ */ ++ raw_spin_lock_irq(¤t->pi_lock); ++ if (current->pi_blocked_on) { ++ /* ++ * We have been requeued or are in the process of ++ * being requeued. ++ */ ++ raw_spin_unlock_irq(¤t->pi_lock); ++ } else { ++ /* ++ * Setting pi_blocked_on to PI_WAKEUP_INPROGRESS ++ * prevents a concurrent requeue from moving us to the ++ * uaddr2 rtmutex. After that we can safely acquire ++ * (and possibly block on) hb->lock. ++ */ ++ current->pi_blocked_on = PI_WAKEUP_INPROGRESS; ++ raw_spin_unlock_irq(¤t->pi_lock); ++ ++ spin_lock(&hb->lock); ++ ++ /* ++ * Clean up pi_blocked_on. We might leak it otherwise ++ * when we succeeded with the hb->lock in the fast ++ * path. ++ */ ++ raw_spin_lock_irq(¤t->pi_lock); ++ current->pi_blocked_on = NULL; ++ raw_spin_unlock_irq(¤t->pi_lock); ++ ++ ret = handle_early_requeue_pi_wakeup(hb, &q, &key2, to); ++ spin_unlock(&hb->lock); ++ if (ret) ++ goto out; ++ } + + /* +- * In order for us to be here, we know our q.key == key2, and since +- * we took the hb->lock above, we also know that futex_requeue() has +- * completed and we no longer have to concern ourselves with a wakeup +- * race with the atomic proxy lock acquisition by the requeue code. The +- * futex_requeue dropped our key1 reference and incremented our key2 +- * reference count. ++ * In order to be here, we have either been requeued, are in ++ * the process of being requeued, or requeue successfully ++ * acquired uaddr2 on our behalf. If pi_blocked_on was ++ * non-null above, we may be racing with a requeue. Do not ++ * rely on q->lock_ptr to be hb2->lock until after blocking on ++ * hb->lock or hb2->lock. The futex_requeue dropped our key1 ++ * reference and incremented our key2 reference count. + */ ++ hb2 = hash_futex(&key2); + + /* Check if the requeue code acquired the second futex for us. */ + if (!q.rt_waiter) { +@@ -3246,14 +3293,15 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + * did a lock-steal - fix up the PI-state in that case. + */ + if (q.pi_state && (q.pi_state->owner != current)) { +- spin_lock(q.lock_ptr); ++ spin_lock(&hb2->lock); ++ BUG_ON(&hb2->lock != q.lock_ptr); + ret = fixup_pi_state_owner(uaddr2, &q, current); + /* + * Drop the reference to the pi state which + * the requeue_pi() code acquired for us. + */ + put_pi_state(q.pi_state); +- spin_unlock(q.lock_ptr); ++ spin_unlock(&hb2->lock); + /* + * Adjust the return value. It's either -EFAULT or + * success (1) but the caller expects 0 for success. +@@ -3272,7 +3320,8 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + pi_mutex = &q.pi_state->pi_mutex; + ret = rt_mutex_wait_proxy_lock(pi_mutex, to, &rt_waiter); + +- spin_lock(q.lock_ptr); ++ spin_lock(&hb2->lock); ++ BUG_ON(&hb2->lock != q.lock_ptr); + if (ret && !rt_mutex_cleanup_proxy_lock(pi_mutex, &rt_waiter)) + ret = 0; + +diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c +index 8806444a6..acbce92f9 100644 +--- a/kernel/irq/handle.c ++++ b/kernel/irq/handle.c +@@ -193,9 +193,17 @@ irqreturn_t handle_irq_event_percpu(struct irq_desc *desc) + irqreturn_t retval; + unsigned int flags = 0; + ++ struct pt_regs *regs = get_irq_regs(); ++ u64 ip = regs ? instruction_pointer(regs) : 0; ++ + retval = __handle_irq_event_percpu(desc, &flags); + ++#ifdef CONFIG_PREEMPT_RT ++ desc->random_ip = ip; ++#else + add_interrupt_randomness(desc->irq_data.irq); ++#endif ++ + + if (!noirqdebug) + note_interrupt(desc, retval); +diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c +index 239f5084b..bc59cb61f 100644 +--- a/kernel/irq/manage.c ++++ b/kernel/irq/manage.c +@@ -1302,6 +1302,8 @@ static int irq_thread(void *data) + + irq_thread_set_ready(desc, action); + ++ sched_set_fifo(current); ++ + if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD, + &action->thread_flags)) + handler_fn = irq_forced_thread_fn; +@@ -1322,6 +1324,16 @@ static int irq_thread(void *data) + if (action_ret == IRQ_WAKE_THREAD) + irq_wake_secondary(desc, action); + ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) { ++ migrate_disable(); ++ // add_interrupt_randomness(action->irq, 0, ++ // desc->random_ip ^ (unsigned long) action); ++ ++ add_interrupt_randomness(action->irq); ++ ++ ++ migrate_enable(); ++ } + wake_threads_waitq(desc); + } + +@@ -1467,8 +1479,6 @@ setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary) + if (IS_ERR(t)) + return PTR_ERR(t); + +- sched_set_fifo(t); +- + /* + * We keep the reference to the task struct even if + * the thread dies to avoid that the interrupt code +@@ -2857,7 +2867,7 @@ EXPORT_SYMBOL_GPL(irq_get_irqchip_state); + * This call sets the internal irqchip state of an interrupt, + * depending on the value of @which. + * +- * This function should be called with preemption disabled if the ++ * This function should be called with migration disabled if the + * interrupt controller has per-cpu registers. + */ + int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which, +diff --git a/kernel/irq/spurious.c b/kernel/irq/spurious.c +index f865e5f4d..dc7311dd7 100644 +--- a/kernel/irq/spurious.c ++++ b/kernel/irq/spurious.c +@@ -443,6 +443,10 @@ MODULE_PARM_DESC(noirqdebug, "Disable irq lockup detection when true"); + + static int __init irqfixup_setup(char *str) + { ++#ifdef CONFIG_PREEMPT_RT ++ pr_warn("irqfixup boot option not supported w/ CONFIG_PREEMPT_RT\n"); ++ return 1; ++#endif + irqfixup = 1; + printk(KERN_WARNING "Misrouted IRQ fixup support enabled.\n"); + printk(KERN_WARNING "This may impact system performance.\n"); +@@ -455,6 +459,10 @@ module_param(irqfixup, int, 0644); + + static int __init irqpoll_setup(char *str) + { ++#ifdef CONFIG_PREEMPT_RT ++ pr_warn("irqpoll boot option not supported w/ CONFIG_PREEMPT_RT\n"); ++ return 1; ++#endif + irqfixup = 2; + printk(KERN_WARNING "Misrouted IRQ fixup and polling support " + "enabled\n"); +diff --git a/kernel/irq_work.c b/kernel/irq_work.c +index fbff25adb..d3466e3ba 100644 +--- a/kernel/irq_work.c ++++ b/kernel/irq_work.c +@@ -18,11 +18,36 @@ + #include + #include + #include ++#include + #include + + + static DEFINE_PER_CPU(struct llist_head, raised_list); + static DEFINE_PER_CPU(struct llist_head, lazy_list); ++static DEFINE_PER_CPU(struct task_struct *, irq_workd); ++ ++static void wake_irq_workd(void) ++{ ++ struct task_struct *tsk = __this_cpu_read(irq_workd); ++ ++ if (!llist_empty(this_cpu_ptr(&lazy_list)) && tsk) ++ wake_up_process(tsk); ++} ++ ++#ifdef CONFIG_SMP ++static void irq_work_wake(struct irq_work *entry) ++{ ++ wake_irq_workd(); ++} ++ ++static DEFINE_PER_CPU(struct irq_work, irq_work_wakeup) = ++ IRQ_WORK_INIT_HARD(irq_work_wake); ++#endif ++ ++static int irq_workd_should_run(unsigned int cpu) ++{ ++ return !llist_empty(this_cpu_ptr(&lazy_list)); ++} + + /* + * Claim the entry so that no one else will poke at it. +@@ -52,15 +77,29 @@ void __weak arch_irq_work_raise(void) + /* Enqueue on current CPU, work must already be claimed and preempt disabled */ + static void __irq_work_queue_local(struct irq_work *work) + { +- /* If the work is "lazy", handle it from next tick if any */ +- if (atomic_read(&work->node.a_flags) & IRQ_WORK_LAZY) { +- if (llist_add(&work->node.llist, this_cpu_ptr(&lazy_list)) && +- tick_nohz_tick_stopped()) +- arch_irq_work_raise(); +- } else { +- if (llist_add(&work->node.llist, this_cpu_ptr(&raised_list))) +- arch_irq_work_raise(); +- } ++ struct llist_head *list; ++ bool rt_lazy_work = false; ++ bool lazy_work = false; ++ int work_flags; ++ ++ work_flags = atomic_read(&work->node.a_flags); ++ if (work_flags & IRQ_WORK_LAZY) ++ lazy_work = true; ++ else if (IS_ENABLED(CONFIG_PREEMPT_RT) && ++ !(work_flags & IRQ_WORK_HARD_IRQ)) ++ rt_lazy_work = true; ++ ++ if (lazy_work || rt_lazy_work) ++ list = this_cpu_ptr(&lazy_list); ++ else ++ list = this_cpu_ptr(&raised_list); ++ ++ if (!llist_add(&work->node.llist, list)) ++ return; ++ ++ /* If the work is "lazy", handle it from next tick if any */ ++ if (!lazy_work || tick_nohz_tick_stopped()) ++ arch_irq_work_raise(); + } + + /* Enqueue the irq work @work on the current CPU */ +@@ -102,10 +141,28 @@ bool irq_work_queue_on(struct irq_work *work, int cpu) + if (cpu != smp_processor_id()) { + /* Arch remote IPI send/receive backend aren't NMI safe */ + WARN_ON_ONCE(in_nmi()); +- __smp_call_single_queue(cpu, &work->node.llist); ++ ++ /* ++ * On PREEMPT_RT the items which are not marked as ++ * IRQ_WORK_HARD_IRQ are added to the lazy list and a HARD work ++ * item is used on the remote CPU to wake the thread. ++ */ ++ if (IS_ENABLED(CONFIG_PREEMPT_RT) && ++ !(atomic_read(&work->node.a_flags) & IRQ_WORK_HARD_IRQ)) { ++ ++ if (!llist_add(&work->node.llist, &per_cpu(lazy_list, cpu))) ++ goto out; ++ ++ work = &per_cpu(irq_work_wakeup, cpu); ++ if (!irq_work_claim(work)) ++ goto out; ++ } ++ ++ __smp_call_single_queue(cpu, &work->node.llist); + } else { + __irq_work_queue_local(work); + } ++out: + preempt_enable(); + + return true; +@@ -153,14 +210,23 @@ void irq_work_single(void *arg) + */ + flags &= ~IRQ_WORK_PENDING; + (void)atomic_cmpxchg(&work->node.a_flags, flags, flags & ~IRQ_WORK_BUSY); ++ ++ if ((IS_ENABLED(CONFIG_PREEMPT_RT) && !irq_work_is_hard(work)) || ++ !arch_irq_work_has_interrupt()) ++ rcuwait_wake_up(&work->irqwait); + } + + static void irq_work_run_list(struct llist_head *list) + { + struct irq_work *work, *tmp; + struct llist_node *llnode; +- +- BUG_ON(!irqs_disabled()); ++ ++ /* ++ * On PREEMPT_RT IRQ-work which is not marked as HARD will be processed ++ * in a per-CPU thread in preemptible context. Only the items which are ++ * marked as IRQ_WORK_HARD_IRQ will be processed in hardirq context. ++ */ ++ BUG_ON(!irqs_disabled() && !IS_ENABLED(CONFIG_PREEMPT_RT)); + + if (llist_empty(list)) + return; +@@ -177,7 +243,10 @@ static void irq_work_run_list(struct llist_head *list) + void irq_work_run(void) + { + irq_work_run_list(this_cpu_ptr(&raised_list)); +- irq_work_run_list(this_cpu_ptr(&lazy_list)); ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) ++ irq_work_run_list(this_cpu_ptr(&lazy_list)); ++ else ++ wake_irq_workd(); + } + EXPORT_SYMBOL_GPL(irq_work_run); + +@@ -187,7 +256,10 @@ void irq_work_tick(void) + + if (!llist_empty(raised) && !arch_irq_work_has_interrupt()) + irq_work_run_list(raised); +- irq_work_run_list(this_cpu_ptr(&lazy_list)); ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) ++ irq_work_run_list(this_cpu_ptr(&lazy_list)); ++ else ++ wake_irq_workd(); + } + + /* +@@ -197,8 +269,42 @@ void irq_work_tick(void) + void irq_work_sync(struct irq_work *work) + { + lockdep_assert_irqs_enabled(); ++ might_sleep(); ++ ++ if ((IS_ENABLED(CONFIG_PREEMPT_RT) && !irq_work_is_hard(work)) || ++ !arch_irq_work_has_interrupt()) { ++ rcuwait_wait_event(&work->irqwait, !irq_work_is_busy(work), ++ TASK_UNINTERRUPTIBLE); ++ return; ++ } + + while (irq_work_is_busy(work)) + cpu_relax(); + } + EXPORT_SYMBOL_GPL(irq_work_sync); ++ ++static void run_irq_workd(unsigned int cpu) ++{ ++ irq_work_run_list(this_cpu_ptr(&lazy_list)); ++} ++ ++static void irq_workd_setup(unsigned int cpu) ++{ ++ sched_set_fifo_low(current); ++} ++ ++static struct smp_hotplug_thread irqwork_threads = { ++ .store = &irq_workd, ++ .setup = irq_workd_setup, ++ .thread_should_run = irq_workd_should_run, ++ .thread_fn = run_irq_workd, ++ .thread_comm = "irq_work/%u", ++}; ++ ++static __init int irq_work_init_threads(void) ++{ ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ BUG_ON(smpboot_register_percpu_thread(&irqwork_threads)); ++ return 0; ++} ++early_initcall(irq_work_init_threads); +diff --git a/kernel/kexec_core.c b/kernel/kexec_core.c +index b9a6f4658..c26219f34 100644 +--- a/kernel/kexec_core.c ++++ b/kernel/kexec_core.c +@@ -984,7 +984,6 @@ void crash_kexec(struct pt_regs *regs) + old_cpu = atomic_cmpxchg(&panic_cpu, PANIC_CPU_INVALID, this_cpu); + if (old_cpu == PANIC_CPU_INVALID) { + /* This is the 1st CPU which comes here, so go ahead. */ +- printk_safe_flush_on_panic(); + __crash_kexec(regs); + + /* +diff --git a/kernel/ksysfs.c b/kernel/ksysfs.c +index 35859da8b..dfff31ed6 100644 +--- a/kernel/ksysfs.c ++++ b/kernel/ksysfs.c +@@ -138,6 +138,15 @@ KERNEL_ATTR_RO(vmcoreinfo); + + #endif /* CONFIG_CRASH_CORE */ + ++#if defined(CONFIG_PREEMPT_RT) ++static ssize_t realtime_show(struct kobject *kobj, ++ struct kobj_attribute *attr, char *buf) ++{ ++ return sprintf(buf, "%d\n", 1); ++} ++KERNEL_ATTR_RO(realtime); ++#endif ++ + /* whether file capabilities are enabled */ + static ssize_t fscaps_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +@@ -228,6 +237,9 @@ static struct attribute * kernel_attrs[] = { + #ifndef CONFIG_TINY_RCU + &rcu_expedited_attr.attr, + &rcu_normal_attr.attr, ++#endif ++#ifdef CONFIG_PREEMPT_RT ++ &realtime_attr.attr, + #endif + NULL + }; +diff --git a/kernel/kthread.c b/kernel/kthread.c +index 508fe5278..3ce6a31db 100644 +--- a/kernel/kthread.c ++++ b/kernel/kthread.c +@@ -264,6 +264,7 @@ EXPORT_SYMBOL_GPL(kthread_parkme); + + static int kthread(void *_create) + { ++ static const struct sched_param param = { .sched_priority = 0 }; + /* Copy data: it's on kthread's stack */ + struct kthread_create_info *create = _create; + int (*threadfn)(void *data) = create->threadfn; +@@ -294,6 +295,13 @@ static int kthread(void *_create) + init_completion(&self->parked); + current->vfork_done = &self->exited; + ++ /* ++ * The new thread inherited kthreadd's priority and CPU mask. Reset ++ * back to default in case they have been changed. ++ */ ++ sched_setscheduler_nocheck(current, SCHED_NORMAL, ¶m); ++ set_cpus_allowed_ptr(current, housekeeping_cpumask(HK_FLAG_KTHREAD)); ++ + /* OK, tell user we're spawned, wait for stop or wakeup */ + __set_current_state(TASK_UNINTERRUPTIBLE); + create->result = current; +@@ -391,7 +399,6 @@ struct task_struct *__kthread_create_on_node(int (*threadfn)(void *data), + } + task = create->result; + if (!IS_ERR(task)) { +- static const struct sched_param param = { .sched_priority = 0 }; + char name[TASK_COMM_LEN]; + + /* +@@ -400,13 +407,6 @@ struct task_struct *__kthread_create_on_node(int (*threadfn)(void *data), + */ + vsnprintf(name, sizeof(name), namefmt, args); + set_task_comm(task, name); +- /* +- * root may have changed our (kthreadd's) priority or CPU mask. +- * The kernel thread should not inherit these properties. +- */ +- sched_setscheduler_nocheck(task, SCHED_NORMAL, ¶m); +- set_cpus_allowed_ptr(task, +- housekeeping_cpumask(HK_FLAG_KTHREAD)); + } + kfree(create); + return task; +diff --git a/kernel/locking/Makefile b/kernel/locking/Makefile +index 6d11cfb9b..c7fbf737e 100644 +--- a/kernel/locking/Makefile ++++ b/kernel/locking/Makefile +@@ -3,7 +3,7 @@ + # and is generally not a function of system call inputs. + KCOV_INSTRUMENT := n + +-obj-y += mutex.o semaphore.o rwsem.o percpu-rwsem.o ++obj-y += semaphore.o rwsem.o percpu-rwsem.o + + # Avoid recursion lockdep -> KCSAN -> ... -> lockdep. + KCSAN_SANITIZE_lockdep.o := n +@@ -15,19 +15,23 @@ CFLAGS_REMOVE_mutex-debug.o = $(CC_FLAGS_FTRACE) + CFLAGS_REMOVE_rtmutex-debug.o = $(CC_FLAGS_FTRACE) + endif + +-obj-$(CONFIG_DEBUG_MUTEXES) += mutex-debug.o + obj-$(CONFIG_LOCKDEP) += lockdep.o + ifeq ($(CONFIG_PROC_FS),y) + obj-$(CONFIG_LOCKDEP) += lockdep_proc.o + endif + obj-$(CONFIG_SMP) += spinlock.o +-obj-$(CONFIG_LOCK_SPIN_ON_OWNER) += osq_lock.o + obj-$(CONFIG_PROVE_LOCKING) += spinlock.o + obj-$(CONFIG_QUEUED_SPINLOCKS) += qspinlock.o + obj-$(CONFIG_RT_MUTEXES) += rtmutex.o + obj-$(CONFIG_DEBUG_RT_MUTEXES) += rtmutex-debug.o + obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock.o + obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock_debug.o ++ifneq ($(CONFIG_PREEMPT_RT),y) ++obj-y += mutex.o ++obj-$(CONFIG_LOCK_SPIN_ON_OWNER) += osq_lock.o ++obj-$(CONFIG_DEBUG_MUTEXES) += mutex-debug.o ++endif ++obj-$(CONFIG_PREEMPT_RT) += mutex-rt.o rwsem-rt.o rwlock-rt.o + obj-$(CONFIG_QUEUED_RWLOCKS) += qrwlock.o + obj-$(CONFIG_LOCK_TORTURE_TEST) += locktorture.o + obj-$(CONFIG_WW_MUTEX_SELFTEST) += test-ww_mutex.o +diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c +index 6cbd2b444..f2f5defaf 100644 +--- a/kernel/locking/lockdep.c ++++ b/kernel/locking/lockdep.c +@@ -5413,6 +5413,7 @@ static noinstr void check_flags(unsigned long flags) + } + } + ++#ifndef CONFIG_PREEMPT_RT + /* + * We dont accurately track softirq state in e.g. + * hardirq contexts (such as on 4KSTACKS), so only +@@ -5427,6 +5428,7 @@ static noinstr void check_flags(unsigned long flags) + DEBUG_LOCKS_WARN_ON(!current->softirqs_enabled); + } + } ++#endif + + if (!debug_locks) + print_irqtrace_events(current); +diff --git a/kernel/locking/mutex-rt.c b/kernel/locking/mutex-rt.c +new file mode 100644 +index 000000000..2b849e6b9 +--- /dev/null ++++ b/kernel/locking/mutex-rt.c +@@ -0,0 +1,224 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Real-Time Preemption Support ++ * ++ * started by Ingo Molnar: ++ * ++ * Copyright (C) 2004-2006 Red Hat, Inc., Ingo Molnar ++ * Copyright (C) 2006, Timesys Corp., Thomas Gleixner ++ * ++ * historic credit for proving that Linux spinlocks can be implemented via ++ * RT-aware mutexes goes to many people: The Pmutex project (Dirk Grambow ++ * and others) who prototyped it on 2.4 and did lots of comparative ++ * research and analysis; TimeSys, for proving that you can implement a ++ * fully preemptible kernel via the use of IRQ threading and mutexes; ++ * Bill Huey for persuasively arguing on lkml that the mutex model is the ++ * right one; and to MontaVista, who ported pmutexes to 2.6. ++ * ++ * This code is a from-scratch implementation and is not based on pmutexes, ++ * but the idea of converting spinlocks to mutexes is used here too. ++ * ++ * lock debugging, locking tree, deadlock detection: ++ * ++ * Copyright (C) 2004, LynuxWorks, Inc., Igor Manyilov, Bill Huey ++ * Released under the General Public License (GPL). ++ * ++ * Includes portions of the generic R/W semaphore implementation from: ++ * ++ * Copyright (c) 2001 David Howells (dhowells@redhat.com). ++ * - Derived partially from idea by Andrea Arcangeli ++ * - Derived also from comments by Linus ++ * ++ * Pending ownership of locks and ownership stealing: ++ * ++ * Copyright (C) 2005, Kihon Technologies Inc., Steven Rostedt ++ * ++ * (also by Steven Rostedt) ++ * - Converted single pi_lock to individual task locks. ++ * ++ * By Esben Nielsen: ++ * Doing priority inheritance with help of the scheduler. ++ * ++ * Copyright (C) 2006, Timesys Corp., Thomas Gleixner ++ * - major rework based on Esben Nielsens initial patch ++ * - replaced thread_info references by task_struct refs ++ * - removed task->pending_owner dependency ++ * - BKL drop/reacquire for semaphore style locks to avoid deadlocks ++ * in the scheduler return path as discussed with Steven Rostedt ++ * ++ * Copyright (C) 2006, Kihon Technologies Inc. ++ * Steven Rostedt ++ * - debugged and patched Thomas Gleixner's rework. ++ * - added back the cmpxchg to the rework. ++ * - turned atomic require back on for SMP. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "rtmutex_common.h" ++ ++/* ++ * struct mutex functions ++ */ ++void __mutex_do_init(struct mutex *mutex, const char *name, ++ struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held lock: ++ */ ++ debug_check_no_locks_freed((void *)mutex, sizeof(*mutex)); ++ lockdep_init_map(&mutex->dep_map, name, key, 0); ++#endif ++ mutex->lock.save_state = 0; ++} ++EXPORT_SYMBOL(__mutex_do_init); ++ ++static int _mutex_lock_blk_flush(struct mutex *lock, int state) ++{ ++ /* ++ * Flush blk before ->pi_blocked_on is set. At schedule() time it is too ++ * late if one of the callbacks needs to acquire a sleeping lock. ++ */ ++ if (blk_needs_flush_plug(current)) ++ blk_schedule_flush_plug(current); ++ return __rt_mutex_lock_state(&lock->lock, state); ++} ++ ++void __lockfunc _mutex_lock(struct mutex *lock) ++{ ++ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ _mutex_lock_blk_flush(lock, TASK_UNINTERRUPTIBLE); ++} ++EXPORT_SYMBOL(_mutex_lock); ++ ++void __lockfunc _mutex_lock_io_nested(struct mutex *lock, int subclass) ++{ ++ int token; ++ ++ token = io_schedule_prepare(); ++ ++ mutex_acquire_nest(&lock->dep_map, subclass, 0, NULL, _RET_IP_); ++ __rt_mutex_lock_state(&lock->lock, TASK_UNINTERRUPTIBLE); ++ ++ io_schedule_finish(token); ++} ++EXPORT_SYMBOL_GPL(_mutex_lock_io_nested); ++ ++int __lockfunc _mutex_lock_interruptible(struct mutex *lock) ++{ ++ int ret; ++ ++ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ ret = _mutex_lock_blk_flush(lock, TASK_INTERRUPTIBLE); ++ if (ret) ++ mutex_release(&lock->dep_map, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_interruptible); ++ ++int __lockfunc _mutex_lock_killable(struct mutex *lock) ++{ ++ int ret; ++ ++ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ ret = _mutex_lock_blk_flush(lock, TASK_KILLABLE); ++ if (ret) ++ mutex_release(&lock->dep_map, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_killable); ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++void __lockfunc _mutex_lock_nested(struct mutex *lock, int subclass) ++{ ++ mutex_acquire_nest(&lock->dep_map, subclass, 0, NULL, _RET_IP_); ++ _mutex_lock_blk_flush(lock, TASK_UNINTERRUPTIBLE); ++} ++EXPORT_SYMBOL(_mutex_lock_nested); ++ ++void __lockfunc _mutex_lock_nest_lock(struct mutex *lock, struct lockdep_map *nest) ++{ ++ mutex_acquire_nest(&lock->dep_map, 0, 0, nest, _RET_IP_); ++ _mutex_lock_blk_flush(lock, TASK_UNINTERRUPTIBLE); ++} ++EXPORT_SYMBOL(_mutex_lock_nest_lock); ++ ++int __lockfunc _mutex_lock_interruptible_nested(struct mutex *lock, int subclass) ++{ ++ int ret; ++ ++ mutex_acquire_nest(&lock->dep_map, subclass, 0, NULL, _RET_IP_); ++ ret = _mutex_lock_blk_flush(lock, TASK_INTERRUPTIBLE); ++ if (ret) ++ mutex_release(&lock->dep_map, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_interruptible_nested); ++ ++int __lockfunc _mutex_lock_killable_nested(struct mutex *lock, int subclass) ++{ ++ int ret; ++ ++ mutex_acquire(&lock->dep_map, subclass, 0, _RET_IP_); ++ ret = _mutex_lock_blk_flush(lock, TASK_KILLABLE); ++ if (ret) ++ mutex_release(&lock->dep_map, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_killable_nested); ++#endif ++ ++int __lockfunc _mutex_trylock(struct mutex *lock) ++{ ++ int ret = __rt_mutex_trylock(&lock->lock); ++ ++ if (ret) ++ mutex_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_trylock); ++ ++void __lockfunc _mutex_unlock(struct mutex *lock) ++{ ++ mutex_release(&lock->dep_map, _RET_IP_); ++ __rt_mutex_unlock(&lock->lock); ++} ++EXPORT_SYMBOL(_mutex_unlock); ++ ++/** ++ * atomic_dec_and_mutex_lock - return holding mutex if we dec to 0 ++ * @cnt: the atomic which we are to dec ++ * @lock: the mutex to return holding if we dec to 0 ++ * ++ * return true and hold lock if we dec to 0, return false otherwise ++ */ ++int atomic_dec_and_mutex_lock(atomic_t *cnt, struct mutex *lock) ++{ ++ /* dec if we can't possibly hit 0 */ ++ if (atomic_add_unless(cnt, -1, 1)) ++ return 0; ++ /* we might hit 0, so take the lock */ ++ mutex_lock(lock); ++ if (!atomic_dec_and_test(cnt)) { ++ /* when we actually did the dec, we didn't hit 0 */ ++ mutex_unlock(lock); ++ return 0; ++ } ++ /* we hit 0, and we hold the lock */ ++ return 1; ++} ++EXPORT_SYMBOL(atomic_dec_and_mutex_lock); +diff --git a/kernel/locking/rtmutex-debug.c b/kernel/locking/rtmutex-debug.c +index 36e69100e..fb1501003 100644 +--- a/kernel/locking/rtmutex-debug.c ++++ b/kernel/locking/rtmutex-debug.c +@@ -32,110 +32,12 @@ + + #include "rtmutex_common.h" + +-static void printk_task(struct task_struct *p) +-{ +- if (p) +- printk("%16s:%5d [%p, %3d]", p->comm, task_pid_nr(p), p, p->prio); +- else +- printk(""); +-} +- +-static void printk_lock(struct rt_mutex *lock, int print_owner) +-{ +- if (lock->name) +- printk(" [%p] {%s}\n", +- lock, lock->name); +- else +- printk(" [%p] {%s:%d}\n", +- lock, lock->file, lock->line); +- +- if (print_owner && rt_mutex_owner(lock)) { +- printk(".. ->owner: %p\n", lock->owner); +- printk(".. held by: "); +- printk_task(rt_mutex_owner(lock)); +- printk("\n"); +- } +-} +- + void rt_mutex_debug_task_free(struct task_struct *task) + { + DEBUG_LOCKS_WARN_ON(!RB_EMPTY_ROOT(&task->pi_waiters.rb_root)); + DEBUG_LOCKS_WARN_ON(task->pi_blocked_on); + } + +-/* +- * We fill out the fields in the waiter to store the information about +- * the deadlock. We print when we return. act_waiter can be NULL in +- * case of a remove waiter operation. +- */ +-void debug_rt_mutex_deadlock(enum rtmutex_chainwalk chwalk, +- struct rt_mutex_waiter *act_waiter, +- struct rt_mutex *lock) +-{ +- struct task_struct *task; +- +- if (!debug_locks || chwalk == RT_MUTEX_FULL_CHAINWALK || !act_waiter) +- return; +- +- task = rt_mutex_owner(act_waiter->lock); +- if (task && task != current) { +- act_waiter->deadlock_task_pid = get_pid(task_pid(task)); +- act_waiter->deadlock_lock = lock; +- } +-} +- +-void debug_rt_mutex_print_deadlock(struct rt_mutex_waiter *waiter) +-{ +- struct task_struct *task; +- +- if (!waiter->deadlock_lock || !debug_locks) +- return; +- +- rcu_read_lock(); +- task = pid_task(waiter->deadlock_task_pid, PIDTYPE_PID); +- if (!task) { +- rcu_read_unlock(); +- return; +- } +- +- if (!debug_locks_off()) { +- rcu_read_unlock(); +- return; +- } +- +- pr_warn("\n"); +- pr_warn("============================================\n"); +- pr_warn("WARNING: circular locking deadlock detected!\n"); +- pr_warn("%s\n", print_tainted()); +- pr_warn("--------------------------------------------\n"); +- printk("%s/%d is deadlocking current task %s/%d\n\n", +- task->comm, task_pid_nr(task), +- current->comm, task_pid_nr(current)); +- +- printk("\n1) %s/%d is trying to acquire this lock:\n", +- current->comm, task_pid_nr(current)); +- printk_lock(waiter->lock, 1); +- +- printk("\n2) %s/%d is blocked on this lock:\n", +- task->comm, task_pid_nr(task)); +- printk_lock(waiter->deadlock_lock, 1); +- +- debug_show_held_locks(current); +- debug_show_held_locks(task); +- +- printk("\n%s/%d's [blocked] stackdump:\n\n", +- task->comm, task_pid_nr(task)); +- show_stack(task, NULL, KERN_DEFAULT); +- printk("\n%s/%d's [current] stackdump:\n\n", +- current->comm, task_pid_nr(current)); +- dump_stack(); +- debug_show_all_locks(); +- rcu_read_unlock(); +- +- printk("[ turning off deadlock detection." +- "Please report this trace. ]\n\n"); +-} +- + void debug_rt_mutex_lock(struct rt_mutex *lock) + { + } +@@ -158,12 +60,10 @@ void debug_rt_mutex_proxy_unlock(struct rt_mutex *lock) + void debug_rt_mutex_init_waiter(struct rt_mutex_waiter *waiter) + { + memset(waiter, 0x11, sizeof(*waiter)); +- waiter->deadlock_task_pid = NULL; + } + + void debug_rt_mutex_free_waiter(struct rt_mutex_waiter *waiter) + { +- put_pid(waiter->deadlock_task_pid); + memset(waiter, 0x22, sizeof(*waiter)); + } + +@@ -173,10 +73,8 @@ void debug_rt_mutex_init(struct rt_mutex *lock, const char *name, struct lock_cl + * Make sure we are not reinitializing a held lock: + */ + debug_check_no_locks_freed((void *)lock, sizeof(*lock)); +- lock->name = name; + + #ifdef CONFIG_DEBUG_LOCK_ALLOC + lockdep_init_map(&lock->dep_map, name, key, 0); + #endif + } +- +diff --git a/kernel/locking/rtmutex-debug.h b/kernel/locking/rtmutex-debug.h +index fc549713b..659e93e25 100644 +--- a/kernel/locking/rtmutex-debug.h ++++ b/kernel/locking/rtmutex-debug.h +@@ -18,20 +18,9 @@ extern void debug_rt_mutex_unlock(struct rt_mutex *lock); + extern void debug_rt_mutex_proxy_lock(struct rt_mutex *lock, + struct task_struct *powner); + extern void debug_rt_mutex_proxy_unlock(struct rt_mutex *lock); +-extern void debug_rt_mutex_deadlock(enum rtmutex_chainwalk chwalk, +- struct rt_mutex_waiter *waiter, +- struct rt_mutex *lock); +-extern void debug_rt_mutex_print_deadlock(struct rt_mutex_waiter *waiter); +-# define debug_rt_mutex_reset_waiter(w) \ +- do { (w)->deadlock_lock = NULL; } while (0) + + static inline bool debug_rt_mutex_detect_deadlock(struct rt_mutex_waiter *waiter, + enum rtmutex_chainwalk walk) + { + return (waiter != NULL); + } +- +-static inline void rt_mutex_print_deadlock(struct rt_mutex_waiter *w) +-{ +- debug_rt_mutex_print_deadlock(w); +-} +diff --git a/kernel/locking/rtmutex.c b/kernel/locking/rtmutex.c +index a82d1176e..8fb866216 100644 +--- a/kernel/locking/rtmutex.c ++++ b/kernel/locking/rtmutex.c +@@ -8,6 +8,11 @@ + * Copyright (C) 2005-2006 Timesys Corp., Thomas Gleixner + * Copyright (C) 2005 Kihon Technologies Inc., Steven Rostedt + * Copyright (C) 2006 Esben Nielsen ++ * Adaptive Spinlocks: ++ * Copyright (C) 2008 Novell, Inc., Gregory Haskins, Sven Dietrich, ++ * and Peter Morreale, ++ * Adaptive Spinlocks simplification: ++ * Copyright (C) 2008 Red Hat, Inc., Steven Rostedt + * + * See Documentation/locking/rt-mutex-design.rst for details. + */ +@@ -19,6 +24,7 @@ + #include + #include + #include ++#include + + #include "rtmutex_common.h" + +@@ -136,6 +142,12 @@ static void fixup_rt_mutex_waiters(struct rt_mutex *lock) + WRITE_ONCE(*p, owner & ~RT_MUTEX_HAS_WAITERS); + } + ++static int rt_mutex_real_waiter(struct rt_mutex_waiter *waiter) ++{ ++ return waiter && waiter != PI_WAKEUP_INPROGRESS && ++ waiter != PI_REQUEUE_INPROGRESS; ++} ++ + /* + * We can speed up the acquire/release, if there's no debugging state to be + * set up. +@@ -227,7 +239,7 @@ static inline bool unlock_rt_mutex_safe(struct rt_mutex *lock, + * Only use with rt_mutex_waiter_{less,equal}() + */ + #define task_to_waiter(p) \ +- &(struct rt_mutex_waiter){ .prio = (p)->prio, .deadline = (p)->dl.deadline } ++ &(struct rt_mutex_waiter){ .prio = (p)->prio, .deadline = (p)->dl.deadline, .task = (p) } + + static inline int + rt_mutex_waiter_less(struct rt_mutex_waiter *left, +@@ -275,6 +287,27 @@ static inline bool __waiter_less(struct rb_node *a, const struct rb_node *b) + return rt_mutex_waiter_less(__node_2_waiter(a), __node_2_waiter(b)); + } + ++#define STEAL_NORMAL 0 ++#define STEAL_LATERAL 1 ++ ++static inline int ++rt_mutex_steal(struct rt_mutex *lock, struct rt_mutex_waiter *waiter, int mode) ++{ ++ struct rt_mutex_waiter *top_waiter = rt_mutex_top_waiter(lock); ++ ++ if (waiter == top_waiter || rt_mutex_waiter_less(waiter, top_waiter)) ++ return 1; ++ ++ /* ++ * Note that RT tasks are excluded from lateral-steals ++ * to prevent the introduction of an unbounded latency. ++ */ ++ if (mode == STEAL_NORMAL || rt_task(waiter->task)) ++ return 0; ++ ++ return rt_mutex_waiter_equal(waiter, top_waiter); ++} ++ + static void + rt_mutex_enqueue(struct rt_mutex *lock, struct rt_mutex_waiter *waiter) + { +@@ -353,6 +386,14 @@ static bool rt_mutex_cond_detect_deadlock(struct rt_mutex_waiter *waiter, + return debug_rt_mutex_detect_deadlock(waiter, chwalk); + } + ++static void rt_mutex_wake_waiter(struct rt_mutex_waiter *waiter) ++{ ++ if (waiter->savestate) ++ wake_up_lock_sleeper(waiter->task); ++ else ++ wake_up_process(waiter->task); ++} ++ + /* + * Max number of times we'll walk the boosting chain: + */ +@@ -360,7 +401,8 @@ int max_lock_depth = 1024; + + static inline struct rt_mutex *task_blocked_on_lock(struct task_struct *p) + { +- return p->pi_blocked_on ? p->pi_blocked_on->lock : NULL; ++ return rt_mutex_real_waiter(p->pi_blocked_on) ? ++ p->pi_blocked_on->lock : NULL; + } + + /* +@@ -496,7 +538,7 @@ static int rt_mutex_adjust_prio_chain(struct task_struct *task, + * reached or the state of the chain has changed while we + * dropped the locks. + */ +- if (!waiter) ++ if (!rt_mutex_real_waiter(waiter)) + goto out_unlock_pi; + + /* +@@ -579,7 +621,6 @@ static int rt_mutex_adjust_prio_chain(struct task_struct *task, + * walk, we detected a deadlock. + */ + if (lock == orig_lock || rt_mutex_owner(lock) == top_task) { +- debug_rt_mutex_deadlock(chwalk, orig_waiter, lock); + raw_spin_unlock(&lock->wait_lock); + ret = -EDEADLK; + goto out_unlock_pi; +@@ -676,13 +717,16 @@ static int rt_mutex_adjust_prio_chain(struct task_struct *task, + * follow here. This is the end of the chain we are walking. + */ + if (!rt_mutex_owner(lock)) { ++ struct rt_mutex_waiter *lock_top_waiter; ++ + /* + * If the requeue [7] above changed the top waiter, + * then we need to wake the new top waiter up to try + * to get the lock. + */ +- if (prerequeue_top_waiter != rt_mutex_top_waiter(lock)) +- wake_up_process(rt_mutex_top_waiter(lock)->task); ++ lock_top_waiter = rt_mutex_top_waiter(lock); ++ if (prerequeue_top_waiter != lock_top_waiter) ++ rt_mutex_wake_waiter(lock_top_waiter); + raw_spin_unlock_irq(&lock->wait_lock); + return 0; + } +@@ -783,9 +827,11 @@ static int rt_mutex_adjust_prio_chain(struct task_struct *task, + * @task: The task which wants to acquire the lock + * @waiter: The waiter that is queued to the lock's wait tree if the + * callsite called task_blocked_on_lock(), otherwise NULL ++ * @mode: Lock steal mode (STEAL_NORMAL, STEAL_LATERAL) + */ +-static int try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, +- struct rt_mutex_waiter *waiter) ++static int __try_to_take_rt_mutex(struct rt_mutex *lock, ++ struct task_struct *task, ++ struct rt_mutex_waiter *waiter, int mode) + { + lockdep_assert_held(&lock->wait_lock); + +@@ -821,12 +867,11 @@ static int try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, + */ + if (waiter) { + /* +- * If waiter is not the highest priority waiter of +- * @lock, give up. ++ * If waiter is not the highest priority waiter of @lock, ++ * or its peer when lateral steal is allowed, give up. + */ +- if (waiter != rt_mutex_top_waiter(lock)) ++ if (!rt_mutex_steal(lock, waiter, mode)) + return 0; +- + /* + * We can acquire the lock. Remove the waiter from the + * lock waiters tree. +@@ -844,14 +889,12 @@ static int try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, + */ + if (rt_mutex_has_waiters(lock)) { + /* +- * If @task->prio is greater than or equal to +- * the top waiter priority (kernel view), +- * @task lost. ++ * If @task->prio is greater than the top waiter ++ * priority (kernel view), or equal to it when a ++ * lateral steal is forbidden, @task lost. + */ +- if (!rt_mutex_waiter_less(task_to_waiter(task), +- rt_mutex_top_waiter(lock))) ++ if (!rt_mutex_steal(lock, task_to_waiter(task), mode)) + return 0; +- + /* + * The current top waiter stays enqueued. We + * don't have to change anything in the lock +@@ -898,6 +941,329 @@ static int try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, + return 1; + } + ++#ifdef CONFIG_PREEMPT_RT ++/* ++ * preemptible spin_lock functions: ++ */ ++static inline void rt_spin_lock_fastlock(struct rt_mutex *lock, ++ void (*slowfn)(struct rt_mutex *lock)) ++{ ++ might_sleep_no_state_check(); ++ ++ if (likely(rt_mutex_cmpxchg_acquire(lock, NULL, current))) ++ return; ++ else ++ slowfn(lock); ++} ++ ++static inline void rt_spin_lock_fastunlock(struct rt_mutex *lock, ++ void (*slowfn)(struct rt_mutex *lock)) ++{ ++ if (likely(rt_mutex_cmpxchg_release(lock, current, NULL))) ++ return; ++ else ++ slowfn(lock); ++} ++#ifdef CONFIG_SMP ++/* ++ * Note that owner is a speculative pointer and dereferencing relies ++ * on rcu_read_lock() and the check against the lock owner. ++ */ ++static int adaptive_wait(struct rt_mutex *lock, ++ struct task_struct *owner) ++{ ++ int res = 0; ++ ++ rcu_read_lock(); ++ for (;;) { ++ if (owner != rt_mutex_owner(lock)) ++ break; ++ /* ++ * Ensure that owner->on_cpu is dereferenced _after_ ++ * checking the above to be valid. ++ */ ++ barrier(); ++ if (!owner->on_cpu) { ++ res = 1; ++ break; ++ } ++ cpu_relax(); ++ } ++ rcu_read_unlock(); ++ return res; ++} ++#else ++static int adaptive_wait(struct rt_mutex *lock, ++ struct task_struct *orig_owner) ++{ ++ return 1; ++} ++#endif ++ ++static int task_blocks_on_rt_mutex(struct rt_mutex *lock, ++ struct rt_mutex_waiter *waiter, ++ struct task_struct *task, ++ enum rtmutex_chainwalk chwalk); ++/* ++ * Slow path lock function spin_lock style: this variant is very ++ * careful not to miss any non-lock wakeups. ++ * ++ * We store the current state under p->pi_lock in p->saved_state and ++ * the try_to_wake_up() code handles this accordingly. ++ */ ++void __sched rt_spin_lock_slowlock_locked(struct rt_mutex *lock, ++ struct rt_mutex_waiter *waiter, ++ unsigned long flags) ++{ ++ struct task_struct *lock_owner, *self = current; ++ struct rt_mutex_waiter *top_waiter; ++ int ret; ++ ++ if (__try_to_take_rt_mutex(lock, self, NULL, STEAL_LATERAL)) ++ return; ++ ++ BUG_ON(rt_mutex_owner(lock) == self); ++ ++ /* ++ * We save whatever state the task is in and we'll restore it ++ * after acquiring the lock taking real wakeups into account ++ * as well. We are serialized via pi_lock against wakeups. See ++ * try_to_wake_up(). ++ */ ++ raw_spin_lock(&self->pi_lock); ++ self->saved_state = self->state; ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ raw_spin_unlock(&self->pi_lock); ++ ++ ret = task_blocks_on_rt_mutex(lock, waiter, self, RT_MUTEX_MIN_CHAINWALK); ++ BUG_ON(ret); ++ ++ for (;;) { ++ /* Try to acquire the lock again. */ ++ if (__try_to_take_rt_mutex(lock, self, waiter, STEAL_LATERAL)) ++ break; ++ ++ top_waiter = rt_mutex_top_waiter(lock); ++ lock_owner = rt_mutex_owner(lock); ++ ++ raw_spin_unlock_irqrestore(&lock->wait_lock, flags); ++ ++ if (top_waiter != waiter || adaptive_wait(lock, lock_owner)) ++ preempt_schedule_lock(); ++ ++ raw_spin_lock_irqsave(&lock->wait_lock, flags); ++ ++ raw_spin_lock(&self->pi_lock); ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ raw_spin_unlock(&self->pi_lock); ++ } ++ ++ /* ++ * Restore the task state to current->saved_state. We set it ++ * to the original state above and the try_to_wake_up() code ++ * has possibly updated it when a real (non-rtmutex) wakeup ++ * happened while we were blocked. Clear saved_state so ++ * try_to_wakeup() does not get confused. ++ */ ++ raw_spin_lock(&self->pi_lock); ++ __set_current_state_no_track(self->saved_state); ++ self->saved_state = TASK_RUNNING; ++ raw_spin_unlock(&self->pi_lock); ++ ++ /* ++ * try_to_take_rt_mutex() sets the waiter bit ++ * unconditionally. We might have to fix that up: ++ */ ++ fixup_rt_mutex_waiters(lock); ++ ++ BUG_ON(rt_mutex_has_waiters(lock) && waiter == rt_mutex_top_waiter(lock)); ++ BUG_ON(!RB_EMPTY_NODE(&waiter->tree_entry)); ++} ++ ++static void noinline __sched rt_spin_lock_slowlock(struct rt_mutex *lock) ++{ ++ struct rt_mutex_waiter waiter; ++ unsigned long flags; ++ ++ rt_mutex_init_waiter(&waiter, true); ++ ++ raw_spin_lock_irqsave(&lock->wait_lock, flags); ++ rt_spin_lock_slowlock_locked(lock, &waiter, flags); ++ raw_spin_unlock_irqrestore(&lock->wait_lock, flags); ++ debug_rt_mutex_free_waiter(&waiter); ++} ++ ++static bool __sched __rt_mutex_unlock_common(struct rt_mutex *lock, ++ struct wake_q_head *wake_q, ++ struct wake_q_head *wq_sleeper); ++/* ++ * Slow path to release a rt_mutex spin_lock style ++ */ ++void __sched rt_spin_lock_slowunlock(struct rt_mutex *lock) ++{ ++ unsigned long flags; ++ DEFINE_WAKE_Q(wake_q); ++ DEFINE_WAKE_Q(wake_sleeper_q); ++ bool postunlock; ++ ++ raw_spin_lock_irqsave(&lock->wait_lock, flags); ++ postunlock = __rt_mutex_unlock_common(lock, &wake_q, &wake_sleeper_q); ++ raw_spin_unlock_irqrestore(&lock->wait_lock, flags); ++ ++ if (postunlock) ++ rt_mutex_postunlock(&wake_q, &wake_sleeper_q); ++} ++ ++void __lockfunc rt_spin_lock(spinlock_t *lock) ++{ ++ spin_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ rt_spin_lock_fastlock(&lock->lock, rt_spin_lock_slowlock); ++ rcu_read_lock(); ++ migrate_disable(); ++} ++EXPORT_SYMBOL(rt_spin_lock); ++ ++void __lockfunc __rt_spin_lock(struct rt_mutex *lock) ++{ ++ rt_spin_lock_fastlock(lock, rt_spin_lock_slowlock); ++} ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++void __lockfunc rt_spin_lock_nested(spinlock_t *lock, int subclass) ++{ ++ spin_acquire(&lock->dep_map, subclass, 0, _RET_IP_); ++ rt_spin_lock_fastlock(&lock->lock, rt_spin_lock_slowlock); ++ rcu_read_lock(); ++ migrate_disable(); ++} ++EXPORT_SYMBOL(rt_spin_lock_nested); ++ ++void __lockfunc rt_spin_lock_nest_lock(spinlock_t *lock, ++ struct lockdep_map *nest_lock) ++{ ++ spin_acquire_nest(&lock->dep_map, 0, 0, nest_lock, _RET_IP_); ++ rt_spin_lock_fastlock(&lock->lock, rt_spin_lock_slowlock); ++ rcu_read_lock(); ++ migrate_disable(); ++} ++EXPORT_SYMBOL(rt_spin_lock_nest_lock); ++#endif ++ ++void __lockfunc rt_spin_unlock(spinlock_t *lock) ++{ ++ /* NOTE: we always pass in '1' for nested, for simplicity */ ++ spin_release(&lock->dep_map, _RET_IP_); ++ migrate_enable(); ++ rcu_read_unlock(); ++ rt_spin_lock_fastunlock(&lock->lock, rt_spin_lock_slowunlock); ++} ++EXPORT_SYMBOL(rt_spin_unlock); ++ ++void __lockfunc __rt_spin_unlock(struct rt_mutex *lock) ++{ ++ rt_spin_lock_fastunlock(lock, rt_spin_lock_slowunlock); ++} ++EXPORT_SYMBOL(__rt_spin_unlock); ++ ++/* ++ * Wait for the lock to get unlocked: instead of polling for an unlock ++ * (like raw spinlocks do), we lock and unlock, to force the kernel to ++ * schedule if there's contention: ++ */ ++void __lockfunc rt_spin_lock_unlock(spinlock_t *lock) ++{ ++ spin_lock(lock); ++ spin_unlock(lock); ++} ++EXPORT_SYMBOL(rt_spin_lock_unlock); ++ ++int __lockfunc rt_spin_trylock(spinlock_t *lock) ++{ ++ int ret; ++ ++ ret = __rt_mutex_trylock(&lock->lock); ++ if (ret) { ++ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ rcu_read_lock(); ++ migrate_disable(); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(rt_spin_trylock); ++ ++int __lockfunc rt_spin_trylock_bh(spinlock_t *lock) ++{ ++ int ret; ++ ++ local_bh_disable(); ++ ret = __rt_mutex_trylock(&lock->lock); ++ if (ret) { ++ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ rcu_read_lock(); ++ migrate_disable(); ++ } else { ++ local_bh_enable(); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(rt_spin_trylock_bh); ++ ++void ++__rt_spin_lock_init(spinlock_t *lock, const char *name, struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held lock: ++ */ ++ debug_check_no_locks_freed((void *)lock, sizeof(*lock)); ++ lockdep_init_map(&lock->dep_map, name, key, 0); ++#endif ++} ++EXPORT_SYMBOL(__rt_spin_lock_init); ++ ++#endif /* PREEMPT_RT */ ++ ++#ifdef CONFIG_PREEMPT_RT ++ static inline int __sched ++__mutex_lock_check_stamp(struct rt_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++ struct ww_mutex *ww = container_of(lock, struct ww_mutex, base.lock); ++ struct ww_acquire_ctx *hold_ctx = READ_ONCE(ww->ctx); ++ ++ if (!hold_ctx) ++ return 0; ++ ++ if (unlikely(ctx == hold_ctx)) ++ return -EALREADY; ++ ++ if (ctx->stamp - hold_ctx->stamp <= LONG_MAX && ++ (ctx->stamp != hold_ctx->stamp || ctx > hold_ctx)) { ++#ifdef CONFIG_DEBUG_MUTEXES ++ DEBUG_LOCKS_WARN_ON(ctx->contending_lock); ++ ctx->contending_lock = ww; ++#endif ++ return -EDEADLK; ++ } ++ ++ return 0; ++} ++#else ++ static inline int __sched ++__mutex_lock_check_stamp(struct rt_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++ BUG(); ++ return 0; ++} ++ ++#endif ++ ++static inline int ++try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, ++ struct rt_mutex_waiter *waiter) ++{ ++ return __try_to_take_rt_mutex(lock, task, waiter, STEAL_NORMAL); ++} ++ + /* + * Task blocks on lock. + * +@@ -930,6 +1296,22 @@ static int task_blocks_on_rt_mutex(struct rt_mutex *lock, + return -EDEADLK; + + raw_spin_lock(&task->pi_lock); ++ /* ++ * In the case of futex requeue PI, this will be a proxy ++ * lock. The task will wake unaware that it is enqueueed on ++ * this lock. Avoid blocking on two locks and corrupting ++ * pi_blocked_on via the PI_WAKEUP_INPROGRESS ++ * flag. futex_wait_requeue_pi() sets this when it wakes up ++ * before requeue (due to a signal or timeout). Do not enqueue ++ * the task if PI_WAKEUP_INPROGRESS is set. ++ */ ++ if (task != current && task->pi_blocked_on == PI_WAKEUP_INPROGRESS) { ++ raw_spin_unlock(&task->pi_lock); ++ return -EAGAIN; ++ } ++ ++ BUG_ON(rt_mutex_real_waiter(task->pi_blocked_on)); ++ + waiter->task = task; + waiter->lock = lock; + waiter->prio = task->prio; +@@ -953,7 +1335,7 @@ static int task_blocks_on_rt_mutex(struct rt_mutex *lock, + rt_mutex_enqueue_pi(owner, waiter); + + rt_mutex_adjust_prio(owner); +- if (owner->pi_blocked_on) ++ if (rt_mutex_real_waiter(owner->pi_blocked_on)) + chain_walk = 1; + } else if (rt_mutex_cond_detect_deadlock(waiter, chwalk)) { + chain_walk = 1; +@@ -995,6 +1377,7 @@ static int task_blocks_on_rt_mutex(struct rt_mutex *lock, + * Called with lock->wait_lock held and interrupts disabled. + */ + static void mark_wakeup_next_waiter(struct wake_q_head *wake_q, ++ struct wake_q_head *wake_sleeper_q, + struct rt_mutex *lock) + { + struct rt_mutex_waiter *waiter; +@@ -1034,7 +1417,10 @@ static void mark_wakeup_next_waiter(struct wake_q_head *wake_q, + * Pairs with preempt_enable() in rt_mutex_postunlock(); + */ + preempt_disable(); +- wake_q_add(wake_q, waiter->task); ++ if (waiter->savestate) ++ wake_q_add_sleeper(wake_sleeper_q, waiter->task); ++ else ++ wake_q_add(wake_q, waiter->task); + raw_spin_unlock(¤t->pi_lock); + } + +@@ -1049,7 +1435,7 @@ static void remove_waiter(struct rt_mutex *lock, + { + bool is_top_waiter = (waiter == rt_mutex_top_waiter(lock)); + struct task_struct *owner = rt_mutex_owner(lock); +- struct rt_mutex *next_lock; ++ struct rt_mutex *next_lock = NULL; + + lockdep_assert_held(&lock->wait_lock); + +@@ -1075,7 +1461,8 @@ static void remove_waiter(struct rt_mutex *lock, + rt_mutex_adjust_prio(owner); + + /* Store the lock on which owner is blocked or NULL */ +- next_lock = task_blocked_on_lock(owner); ++ if (rt_mutex_real_waiter(owner->pi_blocked_on)) ++ next_lock = task_blocked_on_lock(owner); + + raw_spin_unlock(&owner->pi_lock); + +@@ -1111,26 +1498,28 @@ void rt_mutex_adjust_pi(struct task_struct *task) + raw_spin_lock_irqsave(&task->pi_lock, flags); + + waiter = task->pi_blocked_on; +- if (!waiter || rt_mutex_waiter_equal(waiter, task_to_waiter(task))) { ++ if (!rt_mutex_real_waiter(waiter) || ++ rt_mutex_waiter_equal(waiter, task_to_waiter(task))) { + raw_spin_unlock_irqrestore(&task->pi_lock, flags); + return; + } + next_lock = waiter->lock; +- raw_spin_unlock_irqrestore(&task->pi_lock, flags); + + /* gets dropped in rt_mutex_adjust_prio_chain()! */ + get_task_struct(task); + ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); + rt_mutex_adjust_prio_chain(task, RT_MUTEX_MIN_CHAINWALK, NULL, + next_lock, NULL, task); + } + +-void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter) ++void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter, bool savestate) + { + debug_rt_mutex_init_waiter(waiter); + RB_CLEAR_NODE(&waiter->pi_tree_entry); + RB_CLEAR_NODE(&waiter->tree_entry); + waiter->task = NULL; ++ waiter->savestate = savestate; + } + + /** +@@ -1146,7 +1535,8 @@ void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter) + static int __sched + __rt_mutex_slowlock(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, +- struct rt_mutex_waiter *waiter) ++ struct rt_mutex_waiter *waiter, ++ struct ww_acquire_ctx *ww_ctx) + { + int ret = 0; + +@@ -1155,24 +1545,23 @@ __rt_mutex_slowlock(struct rt_mutex *lock, int state, + if (try_to_take_rt_mutex(lock, current, waiter)) + break; + +- /* +- * TASK_INTERRUPTIBLE checks for signals and +- * timeout. Ignored otherwise. +- */ +- if (likely(state == TASK_INTERRUPTIBLE)) { +- /* Signal pending? */ +- if (signal_pending(current)) +- ret = -EINTR; +- if (timeout && !timeout->task) +- ret = -ETIMEDOUT; ++ if (timeout && !timeout->task) { ++ ret = -ETIMEDOUT; ++ break; ++ } ++ if (signal_pending_state(state, current)) { ++ ret = -EINTR; ++ break; ++ } ++ ++ if (ww_ctx && ww_ctx->acquired > 0) { ++ ret = __mutex_lock_check_stamp(lock, ww_ctx); + if (ret) + break; + } + + raw_spin_unlock_irq(&lock->wait_lock); + +- debug_rt_mutex_print_deadlock(waiter); +- + schedule(); + + raw_spin_lock_irq(&lock->wait_lock); +@@ -1193,43 +1582,110 @@ static void rt_mutex_handle_deadlock(int res, int detect_deadlock, + if (res != -EDEADLOCK || detect_deadlock) + return; + +- /* +- * Yell lowdly and stop the task right here. +- */ +- rt_mutex_print_deadlock(w); + while (1) { + set_current_state(TASK_INTERRUPTIBLE); + schedule(); + } + } + +-/* +- * Slow path lock function: +- */ +-static int __sched +-rt_mutex_slowlock(struct rt_mutex *lock, int state, +- struct hrtimer_sleeper *timeout, +- enum rtmutex_chainwalk chwalk) ++static __always_inline void ww_mutex_lock_acquired(struct ww_mutex *ww, ++ struct ww_acquire_ctx *ww_ctx) + { +- struct rt_mutex_waiter waiter; +- unsigned long flags; +- int ret = 0; ++#ifdef CONFIG_DEBUG_MUTEXES ++ /* ++ * If this WARN_ON triggers, you used ww_mutex_lock to acquire, ++ * but released with a normal mutex_unlock in this call. ++ * ++ * This should never happen, always use ww_mutex_unlock. ++ */ ++ DEBUG_LOCKS_WARN_ON(ww->ctx); ++ ++ /* ++ * Not quite done after calling ww_acquire_done() ? ++ */ ++ DEBUG_LOCKS_WARN_ON(ww_ctx->done_acquire); + +- rt_mutex_init_waiter(&waiter); ++ if (ww_ctx->contending_lock) { ++ /* ++ * After -EDEADLK you tried to ++ * acquire a different ww_mutex? Bad! ++ */ ++ DEBUG_LOCKS_WARN_ON(ww_ctx->contending_lock != ww); ++ ++ /* ++ * You called ww_mutex_lock after receiving -EDEADLK, ++ * but 'forgot' to unlock everything else first? ++ */ ++ DEBUG_LOCKS_WARN_ON(ww_ctx->acquired > 0); ++ ww_ctx->contending_lock = NULL; ++ } + + /* +- * Technically we could use raw_spin_[un]lock_irq() here, but this can +- * be called in early boot if the cmpxchg() fast path is disabled +- * (debug, no architecture support). In this case we will acquire the +- * rtmutex with lock->wait_lock held. But we cannot unconditionally +- * enable interrupts in that early boot case. So we need to use the +- * irqsave/restore variants. ++ * Naughty, using a different class will lead to undefined behavior! + */ +- raw_spin_lock_irqsave(&lock->wait_lock, flags); ++ DEBUG_LOCKS_WARN_ON(ww_ctx->ww_class != ww->ww_class); ++#endif ++ ww_ctx->acquired++; ++} ++ ++#ifdef CONFIG_PREEMPT_RT ++static void ww_mutex_account_lock(struct rt_mutex *lock, ++ struct ww_acquire_ctx *ww_ctx) ++{ ++ struct ww_mutex *ww = container_of(lock, struct ww_mutex, base.lock); ++ struct rt_mutex_waiter *waiter, *n; ++ ++ /* ++ * This branch gets optimized out for the common case, ++ * and is only important for ww_mutex_lock. ++ */ ++ ww_mutex_lock_acquired(ww, ww_ctx); ++ ww->ctx = ww_ctx; ++ ++ /* ++ * Give any possible sleeping processes the chance to wake up, ++ * so they can recheck if they have to back off. ++ */ ++ rbtree_postorder_for_each_entry_safe(waiter, n, &lock->waiters.rb_root, ++ tree_entry) { ++ /* XXX debug rt mutex waiter wakeup */ ++ ++ BUG_ON(waiter->lock != lock); ++ rt_mutex_wake_waiter(waiter); ++ } ++} ++ ++#else ++ ++static void ww_mutex_account_lock(struct rt_mutex *lock, ++ struct ww_acquire_ctx *ww_ctx) ++{ ++ BUG(); ++} ++#endif ++ ++int __sched rt_mutex_slowlock_locked(struct rt_mutex *lock, int state, ++ struct hrtimer_sleeper *timeout, ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx, ++ struct rt_mutex_waiter *waiter) ++{ ++ int ret; ++ ++#ifdef CONFIG_PREEMPT_RT ++ if (ww_ctx) { ++ struct ww_mutex *ww; ++ ++ ww = container_of(lock, struct ww_mutex, base.lock); ++ if (unlikely(ww_ctx == READ_ONCE(ww->ctx))) ++ return -EALREADY; ++ } ++#endif + + /* Try to acquire the lock again: */ + if (try_to_take_rt_mutex(lock, current, NULL)) { +- raw_spin_unlock_irqrestore(&lock->wait_lock, flags); ++ if (ww_ctx) ++ ww_mutex_account_lock(lock, ww_ctx); + return 0; + } + +@@ -1239,16 +1695,26 @@ rt_mutex_slowlock(struct rt_mutex *lock, int state, + if (unlikely(timeout)) + hrtimer_start_expires(&timeout->timer, HRTIMER_MODE_ABS); + +- ret = task_blocks_on_rt_mutex(lock, &waiter, current, chwalk); ++ ret = task_blocks_on_rt_mutex(lock, waiter, current, chwalk); + +- if (likely(!ret)) ++ if (likely(!ret)) { + /* sleep on the mutex */ +- ret = __rt_mutex_slowlock(lock, state, timeout, &waiter); ++ ret = __rt_mutex_slowlock(lock, state, timeout, waiter, ++ ww_ctx); ++ } else if (ww_ctx) { ++ /* ww_mutex received EDEADLK, let it become EALREADY */ ++ ret = __mutex_lock_check_stamp(lock, ww_ctx); ++ BUG_ON(!ret); ++ } + + if (unlikely(ret)) { + __set_current_state(TASK_RUNNING); +- remove_waiter(lock, &waiter); +- rt_mutex_handle_deadlock(ret, chwalk, &waiter); ++ remove_waiter(lock, waiter); ++ /* ww_mutex wants to report EDEADLK/EALREADY, let it */ ++ if (!ww_ctx) ++ rt_mutex_handle_deadlock(ret, chwalk, waiter); ++ } else if (ww_ctx) { ++ ww_mutex_account_lock(lock, ww_ctx); + } + + /* +@@ -1256,6 +1722,36 @@ rt_mutex_slowlock(struct rt_mutex *lock, int state, + * unconditionally. We might have to fix that up. + */ + fixup_rt_mutex_waiters(lock); ++ return ret; ++} ++ ++/* ++ * Slow path lock function: ++ */ ++static int __sched ++rt_mutex_slowlock(struct rt_mutex *lock, int state, ++ struct hrtimer_sleeper *timeout, ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx) ++{ ++ struct rt_mutex_waiter waiter; ++ unsigned long flags; ++ int ret = 0; ++ ++ rt_mutex_init_waiter(&waiter, false); ++ ++ /* ++ * Technically we could use raw_spin_[un]lock_irq() here, but this can ++ * be called in early boot if the cmpxchg() fast path is disabled ++ * (debug, no architecture support). In this case we will acquire the ++ * rtmutex with lock->wait_lock held. But we cannot unconditionally ++ * enable interrupts in that early boot case. So we need to use the ++ * irqsave/restore variants. ++ */ ++ raw_spin_lock_irqsave(&lock->wait_lock, flags); ++ ++ ret = rt_mutex_slowlock_locked(lock, state, timeout, chwalk, ww_ctx, ++ &waiter); + + raw_spin_unlock_irqrestore(&lock->wait_lock, flags); + +@@ -1316,7 +1812,8 @@ static inline int rt_mutex_slowtrylock(struct rt_mutex *lock) + * Return whether the current task needs to call rt_mutex_postunlock(). + */ + static bool __sched rt_mutex_slowunlock(struct rt_mutex *lock, +- struct wake_q_head *wake_q) ++ struct wake_q_head *wake_q, ++ struct wake_q_head *wake_sleeper_q) + { + unsigned long flags; + +@@ -1370,7 +1867,7 @@ static bool __sched rt_mutex_slowunlock(struct rt_mutex *lock, + * + * Queue the next waiter for wakeup once we release the wait_lock. + */ +- mark_wakeup_next_waiter(wake_q, lock); ++ mark_wakeup_next_waiter(wake_q, wake_sleeper_q, lock); + raw_spin_unlock_irqrestore(&lock->wait_lock, flags); + + return true; /* call rt_mutex_postunlock() */ +@@ -1384,29 +1881,16 @@ static bool __sched rt_mutex_slowunlock(struct rt_mutex *lock, + */ + static inline int + rt_mutex_fastlock(struct rt_mutex *lock, int state, ++ struct ww_acquire_ctx *ww_ctx, + int (*slowfn)(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, +- enum rtmutex_chainwalk chwalk)) ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx)) + { + if (likely(rt_mutex_cmpxchg_acquire(lock, NULL, current))) + return 0; + +- return slowfn(lock, state, NULL, RT_MUTEX_MIN_CHAINWALK); +-} +- +-static inline int +-rt_mutex_timed_fastlock(struct rt_mutex *lock, int state, +- struct hrtimer_sleeper *timeout, +- enum rtmutex_chainwalk chwalk, +- int (*slowfn)(struct rt_mutex *lock, int state, +- struct hrtimer_sleeper *timeout, +- enum rtmutex_chainwalk chwalk)) +-{ +- if (chwalk == RT_MUTEX_MIN_CHAINWALK && +- likely(rt_mutex_cmpxchg_acquire(lock, NULL, current))) +- return 0; +- +- return slowfn(lock, state, timeout, chwalk); ++ return slowfn(lock, state, NULL, RT_MUTEX_MIN_CHAINWALK, ww_ctx); + } + + static inline int +@@ -1422,9 +1906,11 @@ rt_mutex_fasttrylock(struct rt_mutex *lock, + /* + * Performs the wakeup of the top-waiter and re-enables preemption. + */ +-void rt_mutex_postunlock(struct wake_q_head *wake_q) ++void rt_mutex_postunlock(struct wake_q_head *wake_q, ++ struct wake_q_head *wake_sleeper_q) + { + wake_up_q(wake_q); ++ wake_up_q_sleeper(wake_sleeper_q); + + /* Pairs with preempt_disable() in rt_mutex_slowunlock() */ + preempt_enable(); +@@ -1433,23 +1919,46 @@ void rt_mutex_postunlock(struct wake_q_head *wake_q) + static inline void + rt_mutex_fastunlock(struct rt_mutex *lock, + bool (*slowfn)(struct rt_mutex *lock, +- struct wake_q_head *wqh)) ++ struct wake_q_head *wqh, ++ struct wake_q_head *wq_sleeper)) + { + DEFINE_WAKE_Q(wake_q); ++ DEFINE_WAKE_Q(wake_sleeper_q); + + if (likely(rt_mutex_cmpxchg_release(lock, current, NULL))) + return; + +- if (slowfn(lock, &wake_q)) +- rt_mutex_postunlock(&wake_q); ++ if (slowfn(lock, &wake_q, &wake_sleeper_q)) ++ rt_mutex_postunlock(&wake_q, &wake_sleeper_q); + } + +-static inline void __rt_mutex_lock(struct rt_mutex *lock, unsigned int subclass) ++int __sched __rt_mutex_lock_state(struct rt_mutex *lock, int state) + { + might_sleep(); ++ return rt_mutex_fastlock(lock, state, NULL, rt_mutex_slowlock); ++} ++ ++/** ++ * rt_mutex_lock_state - lock a rt_mutex with a given state ++ * ++ * @lock: The rt_mutex to be locked ++ * @state: The state to set when blocking on the rt_mutex ++ */ ++static inline int __sched rt_mutex_lock_state(struct rt_mutex *lock, ++ unsigned int subclass, int state) ++{ ++ int ret; + + mutex_acquire(&lock->dep_map, subclass, 0, _RET_IP_); +- rt_mutex_fastlock(lock, TASK_UNINTERRUPTIBLE, rt_mutex_slowlock); ++ ret = __rt_mutex_lock_state(lock, state); ++ if (ret) ++ mutex_release(&lock->dep_map, _RET_IP_); ++ return ret; ++} ++ ++static inline void __rt_mutex_lock(struct rt_mutex *lock, unsigned int subclass) ++{ ++ rt_mutex_lock_state(lock, subclass, TASK_UNINTERRUPTIBLE); + } + + #ifdef CONFIG_DEBUG_LOCK_ALLOC +@@ -1490,16 +1999,7 @@ EXPORT_SYMBOL_GPL(rt_mutex_lock); + */ + int __sched rt_mutex_lock_interruptible(struct rt_mutex *lock) + { +- int ret; +- +- might_sleep(); +- +- mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); +- ret = rt_mutex_fastlock(lock, TASK_INTERRUPTIBLE, rt_mutex_slowlock); +- if (ret) +- mutex_release(&lock->dep_map, _RET_IP_); +- +- return ret; ++ return rt_mutex_lock_state(lock, 0, TASK_INTERRUPTIBLE); + } + EXPORT_SYMBOL_GPL(rt_mutex_lock_interruptible); + +@@ -1516,36 +2016,17 @@ int __sched __rt_mutex_futex_trylock(struct rt_mutex *lock) + return __rt_mutex_slowtrylock(lock); + } + +-/** +- * rt_mutex_timed_lock - lock a rt_mutex interruptible +- * the timeout structure is provided +- * by the caller +- * +- * @lock: the rt_mutex to be locked +- * @timeout: timeout structure or NULL (no timeout) +- * +- * Returns: +- * 0 on success +- * -EINTR when interrupted by a signal +- * -ETIMEDOUT when the timeout expired +- */ +-int +-rt_mutex_timed_lock(struct rt_mutex *lock, struct hrtimer_sleeper *timeout) ++int __sched __rt_mutex_trylock(struct rt_mutex *lock) + { +- int ret; +- +- might_sleep(); +- +- mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); +- ret = rt_mutex_timed_fastlock(lock, TASK_INTERRUPTIBLE, timeout, +- RT_MUTEX_MIN_CHAINWALK, +- rt_mutex_slowlock); +- if (ret) +- mutex_release(&lock->dep_map, _RET_IP_); ++#ifdef CONFIG_PREEMPT_RT ++ if (WARN_ON_ONCE(in_irq() || in_nmi())) ++#else ++ if (WARN_ON_ONCE(in_irq() || in_nmi() || in_serving_softirq())) ++#endif ++ return 0; + +- return ret; ++ return rt_mutex_fasttrylock(lock, rt_mutex_slowtrylock); + } +-EXPORT_SYMBOL_GPL(rt_mutex_timed_lock); + + /** + * rt_mutex_trylock - try to lock a rt_mutex +@@ -1562,10 +2043,7 @@ int __sched rt_mutex_trylock(struct rt_mutex *lock) + { + int ret; + +- if (WARN_ON_ONCE(in_irq() || in_nmi() || in_serving_softirq())) +- return 0; +- +- ret = rt_mutex_fasttrylock(lock, rt_mutex_slowtrylock); ++ ret = __rt_mutex_trylock(lock); + if (ret) + mutex_acquire(&lock->dep_map, 0, 1, _RET_IP_); + +@@ -1573,6 +2051,11 @@ int __sched rt_mutex_trylock(struct rt_mutex *lock) + } + EXPORT_SYMBOL_GPL(rt_mutex_trylock); + ++void __sched __rt_mutex_unlock(struct rt_mutex *lock) ++{ ++ rt_mutex_fastunlock(lock, rt_mutex_slowunlock); ++} ++ + /** + * rt_mutex_unlock - unlock a rt_mutex + * +@@ -1581,16 +2064,13 @@ EXPORT_SYMBOL_GPL(rt_mutex_trylock); + void __sched rt_mutex_unlock(struct rt_mutex *lock) + { + mutex_release(&lock->dep_map, _RET_IP_); +- rt_mutex_fastunlock(lock, rt_mutex_slowunlock); ++ __rt_mutex_unlock(lock); + } + EXPORT_SYMBOL_GPL(rt_mutex_unlock); + +-/** +- * Futex variant, that since futex variants do not use the fast-path, can be +- * simple and will not need to retry. +- */ +-bool __sched __rt_mutex_futex_unlock(struct rt_mutex *lock, +- struct wake_q_head *wake_q) ++static bool __sched __rt_mutex_unlock_common(struct rt_mutex *lock, ++ struct wake_q_head *wake_q, ++ struct wake_q_head *wq_sleeper) + { + lockdep_assert_held(&lock->wait_lock); + +@@ -1607,23 +2087,35 @@ bool __sched __rt_mutex_futex_unlock(struct rt_mutex *lock, + * avoid inversion prior to the wakeup. preempt_disable() + * therein pairs with rt_mutex_postunlock(). + */ +- mark_wakeup_next_waiter(wake_q, lock); ++ mark_wakeup_next_waiter(wake_q, wq_sleeper, lock); + + return true; /* call postunlock() */ + } + ++/** ++ * Futex variant, that since futex variants do not use the fast-path, can be ++ * simple and will not need to retry. ++ */ ++bool __sched __rt_mutex_futex_unlock(struct rt_mutex *lock, ++ struct wake_q_head *wake_q, ++ struct wake_q_head *wq_sleeper) ++{ ++ return __rt_mutex_unlock_common(lock, wake_q, wq_sleeper); ++} ++ + void __sched rt_mutex_futex_unlock(struct rt_mutex *lock) + { + DEFINE_WAKE_Q(wake_q); ++ DEFINE_WAKE_Q(wake_sleeper_q); + unsigned long flags; + bool postunlock; + + raw_spin_lock_irqsave(&lock->wait_lock, flags); +- postunlock = __rt_mutex_futex_unlock(lock, &wake_q); ++ postunlock = __rt_mutex_futex_unlock(lock, &wake_q, &wake_sleeper_q); + raw_spin_unlock_irqrestore(&lock->wait_lock, flags); + + if (postunlock) +- rt_mutex_postunlock(&wake_q); ++ rt_mutex_postunlock(&wake_q, &wake_sleeper_q); + } + + /** +@@ -1637,9 +2129,6 @@ void __sched rt_mutex_futex_unlock(struct rt_mutex *lock) + void rt_mutex_destroy(struct rt_mutex *lock) + { + WARN_ON(rt_mutex_is_locked(lock)); +-#ifdef CONFIG_DEBUG_RT_MUTEXES +- lock->magic = NULL; +-#endif + } + EXPORT_SYMBOL_GPL(rt_mutex_destroy); + +@@ -1662,7 +2151,7 @@ void __rt_mutex_init(struct rt_mutex *lock, const char *name, + if (name && key) + debug_rt_mutex_init(lock, name, key); + } +-EXPORT_SYMBOL_GPL(__rt_mutex_init); ++EXPORT_SYMBOL(__rt_mutex_init); + + /** + * rt_mutex_init_proxy_locked - initialize and lock a rt_mutex on behalf of a +@@ -1682,6 +2171,14 @@ void rt_mutex_init_proxy_locked(struct rt_mutex *lock, + struct task_struct *proxy_owner) + { + __rt_mutex_init(lock, NULL, NULL); ++#ifdef CONFIG_DEBUG_SPINLOCK ++ /* ++ * get another key class for the wait_lock. LOCK_PI and UNLOCK_PI is ++ * holding the ->wait_lock of the proxy_lock while unlocking a sleeping ++ * lock. ++ */ ++ raw_spin_lock_init(&lock->wait_lock); ++#endif + debug_rt_mutex_proxy_lock(lock, proxy_owner); + rt_mutex_set_owner(lock, proxy_owner); + } +@@ -1704,6 +2201,26 @@ void rt_mutex_proxy_unlock(struct rt_mutex *lock) + rt_mutex_set_owner(lock, NULL); + } + ++static void fixup_rt_mutex_blocked(struct rt_mutex *lock) ++{ ++ struct task_struct *tsk = current; ++ /* ++ * RT has a problem here when the wait got interrupted by a timeout ++ * or a signal. task->pi_blocked_on is still set. The task must ++ * acquire the hash bucket lock when returning from this function. ++ * ++ * If the hash bucket lock is contended then the ++ * BUG_ON(rt_mutex_real_waiter(task->pi_blocked_on)) in ++ * task_blocks_on_rt_mutex() will trigger. This can be avoided by ++ * clearing task->pi_blocked_on which removes the task from the ++ * boosting chain of the rtmutex. That's correct because the task ++ * is not longer blocked on it. ++ */ ++ raw_spin_lock(&tsk->pi_lock); ++ tsk->pi_blocked_on = NULL; ++ raw_spin_unlock(&tsk->pi_lock); ++} ++ + /** + * __rt_mutex_start_proxy_lock() - Start lock acquisition for another task + * @lock: the rt_mutex to take +@@ -1734,6 +2251,34 @@ int __rt_mutex_start_proxy_lock(struct rt_mutex *lock, + if (try_to_take_rt_mutex(lock, task, NULL)) + return 1; + ++#ifdef CONFIG_PREEMPT_RT ++ /* ++ * In PREEMPT_RT there's an added race. ++ * If the task, that we are about to requeue, times out, ++ * it can set the PI_WAKEUP_INPROGRESS. This tells the requeue ++ * to skip this task. But right after the task sets ++ * its pi_blocked_on to PI_WAKEUP_INPROGRESS it can then ++ * block on the spin_lock(&hb->lock), which in RT is an rtmutex. ++ * This will replace the PI_WAKEUP_INPROGRESS with the actual ++ * lock that it blocks on. We *must not* place this task ++ * on this proxy lock in that case. ++ * ++ * To prevent this race, we first take the task's pi_lock ++ * and check if it has updated its pi_blocked_on. If it has, ++ * we assume that it woke up and we return -EAGAIN. ++ * Otherwise, we set the task's pi_blocked_on to ++ * PI_REQUEUE_INPROGRESS, so that if the task is waking up ++ * it will know that we are in the process of requeuing it. ++ */ ++ raw_spin_lock(&task->pi_lock); ++ if (task->pi_blocked_on) { ++ raw_spin_unlock(&task->pi_lock); ++ return -EAGAIN; ++ } ++ task->pi_blocked_on = PI_REQUEUE_INPROGRESS; ++ raw_spin_unlock(&task->pi_lock); ++#endif ++ + /* We enforce deadlock detection for futexes */ + ret = task_blocks_on_rt_mutex(lock, waiter, task, + RT_MUTEX_FULL_CHAINWALK); +@@ -1748,7 +2293,8 @@ int __rt_mutex_start_proxy_lock(struct rt_mutex *lock, + ret = 0; + } + +- debug_rt_mutex_print_deadlock(waiter); ++ if (ret) ++ fixup_rt_mutex_blocked(lock); + + return ret; + } +@@ -1833,12 +2379,15 @@ int rt_mutex_wait_proxy_lock(struct rt_mutex *lock, + raw_spin_lock_irq(&lock->wait_lock); + /* sleep on the mutex */ + set_current_state(TASK_INTERRUPTIBLE); +- ret = __rt_mutex_slowlock(lock, TASK_INTERRUPTIBLE, to, waiter); ++ ret = __rt_mutex_slowlock(lock, TASK_INTERRUPTIBLE, to, waiter, NULL); + /* + * try_to_take_rt_mutex() sets the waiter bit unconditionally. We might + * have to fix that up. + */ + fixup_rt_mutex_waiters(lock); ++ if (ret) ++ fixup_rt_mutex_blocked(lock); ++ + raw_spin_unlock_irq(&lock->wait_lock); + + return ret; +@@ -1900,3 +2449,97 @@ bool rt_mutex_cleanup_proxy_lock(struct rt_mutex *lock, + + return cleanup; + } ++ ++static inline int ++ww_mutex_deadlock_injection(struct ww_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++#ifdef CONFIG_DEBUG_WW_MUTEX_SLOWPATH ++ unsigned int tmp; ++ ++ if (ctx->deadlock_inject_countdown-- == 0) { ++ tmp = ctx->deadlock_inject_interval; ++ if (tmp > UINT_MAX/4) ++ tmp = UINT_MAX; ++ else ++ tmp = tmp*2 + tmp + tmp/2; ++ ++ ctx->deadlock_inject_interval = tmp; ++ ctx->deadlock_inject_countdown = tmp; ++ ctx->contending_lock = lock; ++ ++ ww_mutex_unlock(lock); ++ ++ return -EDEADLK; ++ } ++#endif ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PREEMPT_RT ++int __sched ++ww_mutex_lock_interruptible(struct ww_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++ int ret; ++ ++ might_sleep(); ++ ++ mutex_acquire_nest(&lock->base.dep_map, 0, 0, ++ ctx ? &ctx->dep_map : NULL, _RET_IP_); ++ ret = rt_mutex_slowlock(&lock->base.lock, TASK_INTERRUPTIBLE, NULL, 0, ++ ctx); ++ if (ret) ++ mutex_release(&lock->base.dep_map, _RET_IP_); ++ else if (!ret && ctx && ctx->acquired > 1) ++ return ww_mutex_deadlock_injection(lock, ctx); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(ww_mutex_lock_interruptible); ++ ++int __sched ++ww_mutex_lock(struct ww_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++ int ret; ++ ++ might_sleep(); ++ ++ mutex_acquire_nest(&lock->base.dep_map, 0, 0, ++ ctx ? &ctx->dep_map : NULL, _RET_IP_); ++ ret = rt_mutex_slowlock(&lock->base.lock, TASK_UNINTERRUPTIBLE, NULL, 0, ++ ctx); ++ if (ret) ++ mutex_release(&lock->base.dep_map, _RET_IP_); ++ else if (!ret && ctx && ctx->acquired > 1) ++ return ww_mutex_deadlock_injection(lock, ctx); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(ww_mutex_lock); ++ ++void __sched ww_mutex_unlock(struct ww_mutex *lock) ++{ ++ /* ++ * The unlocking fastpath is the 0->1 transition from 'locked' ++ * into 'unlocked' state: ++ */ ++ if (lock->ctx) { ++#ifdef CONFIG_DEBUG_MUTEXES ++ DEBUG_LOCKS_WARN_ON(!lock->ctx->acquired); ++#endif ++ if (lock->ctx->acquired > 0) ++ lock->ctx->acquired--; ++ lock->ctx = NULL; ++ } ++ ++ mutex_release(&lock->base.dep_map, _RET_IP_); ++ __rt_mutex_unlock(&lock->base.lock); ++} ++EXPORT_SYMBOL(ww_mutex_unlock); ++ ++int __rt_mutex_owner_current(struct rt_mutex *lock) ++{ ++ return rt_mutex_owner(lock) == current; ++} ++EXPORT_SYMBOL(__rt_mutex_owner_current); ++#endif +diff --git a/kernel/locking/rtmutex.h b/kernel/locking/rtmutex.h +index 732f96abf..338ccd291 100644 +--- a/kernel/locking/rtmutex.h ++++ b/kernel/locking/rtmutex.h +@@ -19,15 +19,8 @@ + #define debug_rt_mutex_proxy_unlock(l) do { } while (0) + #define debug_rt_mutex_unlock(l) do { } while (0) + #define debug_rt_mutex_init(m, n, k) do { } while (0) +-#define debug_rt_mutex_deadlock(d, a ,l) do { } while (0) +-#define debug_rt_mutex_print_deadlock(w) do { } while (0) + #define debug_rt_mutex_reset_waiter(w) do { } while (0) + +-static inline void rt_mutex_print_deadlock(struct rt_mutex_waiter *w) +-{ +- WARN(1, "rtmutex deadlock detected\n"); +-} +- + static inline bool debug_rt_mutex_detect_deadlock(struct rt_mutex_waiter *w, + enum rtmutex_chainwalk walk) + { +diff --git a/kernel/locking/rtmutex_common.h b/kernel/locking/rtmutex_common.h +index ca6fb4890..248a7d915 100644 +--- a/kernel/locking/rtmutex_common.h ++++ b/kernel/locking/rtmutex_common.h +@@ -15,6 +15,7 @@ + + #include + #include ++#include + + /* + * This is the control structure for tasks blocked on a rt_mutex, +@@ -29,12 +30,8 @@ struct rt_mutex_waiter { + struct rb_node pi_tree_entry; + struct task_struct *task; + struct rt_mutex *lock; +-#ifdef CONFIG_DEBUG_RT_MUTEXES +- unsigned long ip; +- struct pid *deadlock_task_pid; +- struct rt_mutex *deadlock_lock; +-#endif + int prio; ++ bool savestate; + u64 deadline; + }; + +@@ -130,11 +127,14 @@ enum rtmutex_chainwalk { + /* + * PI-futex support (proxy locking functions, etc.): + */ ++#define PI_WAKEUP_INPROGRESS ((struct rt_mutex_waiter *) 1) ++#define PI_REQUEUE_INPROGRESS ((struct rt_mutex_waiter *) 2) ++ + extern struct task_struct *rt_mutex_next_owner(struct rt_mutex *lock); + extern void rt_mutex_init_proxy_locked(struct rt_mutex *lock, + struct task_struct *proxy_owner); + extern void rt_mutex_proxy_unlock(struct rt_mutex *lock); +-extern void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter); ++extern void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter, bool savetate); + extern int __rt_mutex_start_proxy_lock(struct rt_mutex *lock, + struct rt_mutex_waiter *waiter, + struct task_struct *task); +@@ -152,9 +152,27 @@ extern int __rt_mutex_futex_trylock(struct rt_mutex *l); + + extern void rt_mutex_futex_unlock(struct rt_mutex *lock); + extern bool __rt_mutex_futex_unlock(struct rt_mutex *lock, +- struct wake_q_head *wqh); +- +-extern void rt_mutex_postunlock(struct wake_q_head *wake_q); ++ struct wake_q_head *wqh, ++ struct wake_q_head *wq_sleeper); ++ ++extern void rt_mutex_postunlock(struct wake_q_head *wake_q, ++ struct wake_q_head *wake_sleeper_q); ++ ++/* RW semaphore special interface */ ++struct ww_acquire_ctx; ++ ++extern int __rt_mutex_lock_state(struct rt_mutex *lock, int state); ++extern int __rt_mutex_trylock(struct rt_mutex *lock); ++extern void __rt_mutex_unlock(struct rt_mutex *lock); ++int __sched rt_mutex_slowlock_locked(struct rt_mutex *lock, int state, ++ struct hrtimer_sleeper *timeout, ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx, ++ struct rt_mutex_waiter *waiter); ++void __sched rt_spin_lock_slowlock_locked(struct rt_mutex *lock, ++ struct rt_mutex_waiter *waiter, ++ unsigned long flags); ++void __sched rt_spin_lock_slowunlock(struct rt_mutex *lock); + + #ifdef CONFIG_DEBUG_RT_MUTEXES + # include "rtmutex-debug.h" +diff --git a/kernel/locking/rwlock-rt.c b/kernel/locking/rwlock-rt.c +new file mode 100644 +index 000000000..3d2d1f14b +--- /dev/null ++++ b/kernel/locking/rwlock-rt.c +@@ -0,0 +1,334 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++#include ++#include ++ ++#include "rtmutex_common.h" ++#include ++ ++/* ++ * RT-specific reader/writer locks ++ * ++ * write_lock() ++ * 1) Lock lock->rtmutex ++ * 2) Remove the reader BIAS to force readers into the slow path ++ * 3) Wait until all readers have left the critical region ++ * 4) Mark it write locked ++ * ++ * write_unlock() ++ * 1) Remove the write locked marker ++ * 2) Set the reader BIAS so readers can use the fast path again ++ * 3) Unlock lock->rtmutex to release blocked readers ++ * ++ * read_lock() ++ * 1) Try fast path acquisition (reader BIAS is set) ++ * 2) Take lock->rtmutex.wait_lock which protects the writelocked flag ++ * 3) If !writelocked, acquire it for read ++ * 4) If writelocked, block on lock->rtmutex ++ * 5) unlock lock->rtmutex, goto 1) ++ * ++ * read_unlock() ++ * 1) Try fast path release (reader count != 1) ++ * 2) Wake the writer waiting in write_lock()#3 ++ * ++ * read_lock()#3 has the consequence, that rw locks on RT are not writer ++ * fair, but writers, which should be avoided in RT tasks (think tasklist ++ * lock), are subject to the rtmutex priority/DL inheritance mechanism. ++ * ++ * It's possible to make the rw locks writer fair by keeping a list of ++ * active readers. A blocked writer would force all newly incoming readers ++ * to block on the rtmutex, but the rtmutex would have to be proxy locked ++ * for one reader after the other. We can't use multi-reader inheritance ++ * because there is no way to support that with ++ * SCHED_DEADLINE. Implementing the one by one reader boosting/handover ++ * mechanism is a major surgery for a very dubious value. ++ * ++ * The risk of writer starvation is there, but the pathological use cases ++ * which trigger it are not necessarily the typical RT workloads. ++ */ ++ ++void __rwlock_biased_rt_init(struct rt_rw_lock *lock, const char *name, ++ struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held semaphore: ++ */ ++ debug_check_no_locks_freed((void *)lock, sizeof(*lock)); ++ lockdep_init_map(&lock->dep_map, name, key, 0); ++#endif ++ atomic_set(&lock->readers, READER_BIAS); ++ rt_mutex_init(&lock->rtmutex); ++ lock->rtmutex.save_state = 1; ++} ++ ++static int __read_rt_trylock(struct rt_rw_lock *lock) ++{ ++ int r, old; ++ ++ /* ++ * Increment reader count, if lock->readers < 0, i.e. READER_BIAS is ++ * set. ++ */ ++ for (r = atomic_read(&lock->readers); r < 0;) { ++ old = atomic_cmpxchg(&lock->readers, r, r + 1); ++ if (likely(old == r)) ++ return 1; ++ r = old; ++ } ++ return 0; ++} ++ ++static void __read_rt_lock(struct rt_rw_lock *lock) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ struct rt_mutex_waiter waiter; ++ unsigned long flags; ++ ++ if (__read_rt_trylock(lock)) ++ return; ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ /* ++ * Allow readers as long as the writer has not completely ++ * acquired the semaphore for write. ++ */ ++ if (atomic_read(&lock->readers) != WRITER_BIAS) { ++ atomic_inc(&lock->readers); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ return; ++ } ++ ++ /* ++ * Call into the slow lock path with the rtmutex->wait_lock ++ * held, so this can't result in the following race: ++ * ++ * Reader1 Reader2 Writer ++ * read_lock() ++ * write_lock() ++ * rtmutex_lock(m) ++ * swait() ++ * read_lock() ++ * unlock(m->wait_lock) ++ * read_unlock() ++ * swake() ++ * lock(m->wait_lock) ++ * lock->writelocked=true ++ * unlock(m->wait_lock) ++ * ++ * write_unlock() ++ * lock->writelocked=false ++ * rtmutex_unlock(m) ++ * read_lock() ++ * write_lock() ++ * rtmutex_lock(m) ++ * swait() ++ * rtmutex_lock(m) ++ * ++ * That would put Reader1 behind the writer waiting on ++ * Reader2 to call read_unlock() which might be unbound. ++ */ ++ rt_mutex_init_waiter(&waiter, true); ++ rt_spin_lock_slowlock_locked(m, &waiter, flags); ++ /* ++ * The slowlock() above is guaranteed to return with the rtmutex is ++ * now held, so there can't be a writer active. Increment the reader ++ * count and immediately drop the rtmutex again. ++ */ ++ atomic_inc(&lock->readers); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ rt_spin_lock_slowunlock(m); ++ ++ debug_rt_mutex_free_waiter(&waiter); ++} ++ ++static void __read_rt_unlock(struct rt_rw_lock *lock) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ struct task_struct *tsk; ++ ++ /* ++ * sem->readers can only hit 0 when a writer is waiting for the ++ * active readers to leave the critical region. ++ */ ++ if (!atomic_dec_and_test(&lock->readers)) ++ return; ++ ++ raw_spin_lock_irq(&m->wait_lock); ++ /* ++ * Wake the writer, i.e. the rtmutex owner. It might release the ++ * rtmutex concurrently in the fast path, but to clean up the rw ++ * lock it needs to acquire m->wait_lock. The worst case which can ++ * happen is a spurious wakeup. ++ */ ++ tsk = rt_mutex_owner(m); ++ if (tsk) ++ wake_up_process(tsk); ++ ++ raw_spin_unlock_irq(&m->wait_lock); ++} ++ ++static void __write_unlock_common(struct rt_rw_lock *lock, int bias, ++ unsigned long flags) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ ++ atomic_add(READER_BIAS - bias, &lock->readers); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ rt_spin_lock_slowunlock(m); ++} ++ ++static void __write_rt_lock(struct rt_rw_lock *lock) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ struct task_struct *self = current; ++ unsigned long flags; ++ ++ /* Take the rtmutex as a first step */ ++ __rt_spin_lock(m); ++ ++ /* Force readers into slow path */ ++ atomic_sub(READER_BIAS, &lock->readers); ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ ++ raw_spin_lock(&self->pi_lock); ++ self->saved_state = self->state; ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ raw_spin_unlock(&self->pi_lock); ++ ++ for (;;) { ++ /* Have all readers left the critical region? */ ++ if (!atomic_read(&lock->readers)) { ++ atomic_set(&lock->readers, WRITER_BIAS); ++ raw_spin_lock(&self->pi_lock); ++ __set_current_state_no_track(self->saved_state); ++ self->saved_state = TASK_RUNNING; ++ raw_spin_unlock(&self->pi_lock); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ return; ++ } ++ ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ ++ if (atomic_read(&lock->readers) != 0) ++ preempt_schedule_lock(); ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ ++ raw_spin_lock(&self->pi_lock); ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ raw_spin_unlock(&self->pi_lock); ++ } ++} ++ ++static int __write_rt_trylock(struct rt_rw_lock *lock) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ unsigned long flags; ++ ++ if (!__rt_mutex_trylock(m)) ++ return 0; ++ ++ atomic_sub(READER_BIAS, &lock->readers); ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ if (!atomic_read(&lock->readers)) { ++ atomic_set(&lock->readers, WRITER_BIAS); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ return 1; ++ } ++ __write_unlock_common(lock, 0, flags); ++ return 0; ++} ++ ++static void __write_rt_unlock(struct rt_rw_lock *lock) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ __write_unlock_common(lock, WRITER_BIAS, flags); ++} ++ ++int __lockfunc rt_read_can_lock(rwlock_t *rwlock) ++{ ++ return atomic_read(&rwlock->readers) < 0; ++} ++ ++int __lockfunc rt_write_can_lock(rwlock_t *rwlock) ++{ ++ return atomic_read(&rwlock->readers) == READER_BIAS; ++} ++ ++/* ++ * The common functions which get wrapped into the rwlock API. ++ */ ++int __lockfunc rt_read_trylock(rwlock_t *rwlock) ++{ ++ int ret; ++ ++ ret = __read_rt_trylock(rwlock); ++ if (ret) { ++ rwlock_acquire_read(&rwlock->dep_map, 0, 1, _RET_IP_); ++ rcu_read_lock(); ++ migrate_disable(); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(rt_read_trylock); ++ ++int __lockfunc rt_write_trylock(rwlock_t *rwlock) ++{ ++ int ret; ++ ++ ret = __write_rt_trylock(rwlock); ++ if (ret) { ++ rwlock_acquire(&rwlock->dep_map, 0, 1, _RET_IP_); ++ rcu_read_lock(); ++ migrate_disable(); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(rt_write_trylock); ++ ++void __lockfunc rt_read_lock(rwlock_t *rwlock) ++{ ++ rwlock_acquire_read(&rwlock->dep_map, 0, 0, _RET_IP_); ++ __read_rt_lock(rwlock); ++ rcu_read_lock(); ++ migrate_disable(); ++} ++EXPORT_SYMBOL(rt_read_lock); ++ ++void __lockfunc rt_write_lock(rwlock_t *rwlock) ++{ ++ rwlock_acquire(&rwlock->dep_map, 0, 0, _RET_IP_); ++ __write_rt_lock(rwlock); ++ rcu_read_lock(); ++ migrate_disable(); ++} ++EXPORT_SYMBOL(rt_write_lock); ++ ++void __lockfunc rt_read_unlock(rwlock_t *rwlock) ++{ ++ rwlock_release(&rwlock->dep_map, _RET_IP_); ++ migrate_enable(); ++ rcu_read_unlock(); ++ __read_rt_unlock(rwlock); ++} ++EXPORT_SYMBOL(rt_read_unlock); ++ ++void __lockfunc rt_write_unlock(rwlock_t *rwlock) ++{ ++ rwlock_release(&rwlock->dep_map, _RET_IP_); ++ migrate_enable(); ++ rcu_read_unlock(); ++ __write_rt_unlock(rwlock); ++} ++EXPORT_SYMBOL(rt_write_unlock); ++ ++void __rt_rwlock_init(rwlock_t *rwlock, char *name, struct lock_class_key *key) ++{ ++ __rwlock_biased_rt_init(rwlock, name, key); ++} ++EXPORT_SYMBOL(__rt_rwlock_init); +diff --git a/kernel/locking/rwsem-rt.c b/kernel/locking/rwsem-rt.c +new file mode 100644 +index 000000000..b61edc4dc +--- /dev/null ++++ b/kernel/locking/rwsem-rt.c +@@ -0,0 +1,317 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++#include ++#include ++#include ++#include ++#include ++ ++#include "rtmutex_common.h" ++ ++/* ++ * RT-specific reader/writer semaphores ++ * ++ * down_write() ++ * 1) Lock sem->rtmutex ++ * 2) Remove the reader BIAS to force readers into the slow path ++ * 3) Wait until all readers have left the critical region ++ * 4) Mark it write locked ++ * ++ * up_write() ++ * 1) Remove the write locked marker ++ * 2) Set the reader BIAS so readers can use the fast path again ++ * 3) Unlock sem->rtmutex to release blocked readers ++ * ++ * down_read() ++ * 1) Try fast path acquisition (reader BIAS is set) ++ * 2) Take sem->rtmutex.wait_lock which protects the writelocked flag ++ * 3) If !writelocked, acquire it for read ++ * 4) If writelocked, block on sem->rtmutex ++ * 5) unlock sem->rtmutex, goto 1) ++ * ++ * up_read() ++ * 1) Try fast path release (reader count != 1) ++ * 2) Wake the writer waiting in down_write()#3 ++ * ++ * down_read()#3 has the consequence, that rw semaphores on RT are not writer ++ * fair, but writers, which should be avoided in RT tasks (think mmap_sem), ++ * are subject to the rtmutex priority/DL inheritance mechanism. ++ * ++ * It's possible to make the rw semaphores writer fair by keeping a list of ++ * active readers. A blocked writer would force all newly incoming readers to ++ * block on the rtmutex, but the rtmutex would have to be proxy locked for one ++ * reader after the other. We can't use multi-reader inheritance because there ++ * is no way to support that with SCHED_DEADLINE. Implementing the one by one ++ * reader boosting/handover mechanism is a major surgery for a very dubious ++ * value. ++ * ++ * The risk of writer starvation is there, but the pathological use cases ++ * which trigger it are not necessarily the typical RT workloads. ++ */ ++ ++void __rwsem_init(struct rw_semaphore *sem, const char *name, ++ struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held semaphore: ++ */ ++ debug_check_no_locks_freed((void *)sem, sizeof(*sem)); ++ lockdep_init_map(&sem->dep_map, name, key, 0); ++#endif ++ atomic_set(&sem->readers, READER_BIAS); ++} ++EXPORT_SYMBOL(__rwsem_init); ++ ++int __down_read_trylock(struct rw_semaphore *sem) ++{ ++ int r, old; ++ ++ /* ++ * Increment reader count, if sem->readers < 0, i.e. READER_BIAS is ++ * set. ++ */ ++ for (r = atomic_read(&sem->readers); r < 0;) { ++ old = atomic_cmpxchg(&sem->readers, r, r + 1); ++ if (likely(old == r)) ++ return 1; ++ r = old; ++ } ++ return 0; ++} ++ ++static int __sched __down_read_common(struct rw_semaphore *sem, int state) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ struct rt_mutex_waiter waiter; ++ int ret; ++ ++ if (__down_read_trylock(sem)) ++ return 0; ++ ++ /* ++ * Flush blk before ->pi_blocked_on is set. At schedule() time it is too ++ * late if one of the callbacks needs to acquire a sleeping lock. ++ */ ++ if (blk_needs_flush_plug(current)) ++ blk_schedule_flush_plug(current); ++ ++ might_sleep(); ++ raw_spin_lock_irq(&m->wait_lock); ++ /* ++ * Allow readers as long as the writer has not completely ++ * acquired the semaphore for write. ++ */ ++ if (atomic_read(&sem->readers) != WRITER_BIAS) { ++ atomic_inc(&sem->readers); ++ raw_spin_unlock_irq(&m->wait_lock); ++ return 0; ++ } ++ ++ /* ++ * Call into the slow lock path with the rtmutex->wait_lock ++ * held, so this can't result in the following race: ++ * ++ * Reader1 Reader2 Writer ++ * down_read() ++ * down_write() ++ * rtmutex_lock(m) ++ * swait() ++ * down_read() ++ * unlock(m->wait_lock) ++ * up_read() ++ * swake() ++ * lock(m->wait_lock) ++ * sem->writelocked=true ++ * unlock(m->wait_lock) ++ * ++ * up_write() ++ * sem->writelocked=false ++ * rtmutex_unlock(m) ++ * down_read() ++ * down_write() ++ * rtmutex_lock(m) ++ * swait() ++ * rtmutex_lock(m) ++ * ++ * That would put Reader1 behind the writer waiting on ++ * Reader2 to call up_read() which might be unbound. ++ */ ++ rt_mutex_init_waiter(&waiter, false); ++ ret = rt_mutex_slowlock_locked(m, state, NULL, RT_MUTEX_MIN_CHAINWALK, ++ NULL, &waiter); ++ /* ++ * The slowlock() above is guaranteed to return with the rtmutex (for ++ * ret = 0) is now held, so there can't be a writer active. Increment ++ * the reader count and immediately drop the rtmutex again. ++ * For ret != 0 we don't hold the rtmutex and need unlock the wait_lock. ++ * We don't own the lock then. ++ */ ++ if (!ret) ++ atomic_inc(&sem->readers); ++ raw_spin_unlock_irq(&m->wait_lock); ++ if (!ret) ++ __rt_mutex_unlock(m); ++ ++ debug_rt_mutex_free_waiter(&waiter); ++ return ret; ++} ++ ++void __down_read(struct rw_semaphore *sem) ++{ ++ int ret; ++ ++ ret = __down_read_common(sem, TASK_UNINTERRUPTIBLE); ++ WARN_ON_ONCE(ret); ++} ++ ++int __down_read_interruptible(struct rw_semaphore *sem) ++{ ++ int ret; ++ ++ ret = __down_read_common(sem, TASK_INTERRUPTIBLE); ++ if (likely(!ret)) ++ return ret; ++ WARN_ONCE(ret != -EINTR, "Unexpected state: %d\n", ret); ++ return -EINTR; ++} ++ ++int __down_read_killable(struct rw_semaphore *sem) ++{ ++ int ret; ++ ++ ret = __down_read_common(sem, TASK_KILLABLE); ++ if (likely(!ret)) ++ return ret; ++ WARN_ONCE(ret != -EINTR, "Unexpected state: %d\n", ret); ++ return -EINTR; ++} ++ ++void __up_read(struct rw_semaphore *sem) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ struct task_struct *tsk; ++ ++ /* ++ * sem->readers can only hit 0 when a writer is waiting for the ++ * active readers to leave the critical region. ++ */ ++ if (!atomic_dec_and_test(&sem->readers)) ++ return; ++ ++ raw_spin_lock_irq(&m->wait_lock); ++ /* ++ * Wake the writer, i.e. the rtmutex owner. It might release the ++ * rtmutex concurrently in the fast path (due to a signal), but to ++ * clean up the rwsem it needs to acquire m->wait_lock. The worst ++ * case which can happen is a spurious wakeup. ++ */ ++ tsk = rt_mutex_owner(m); ++ if (tsk) ++ wake_up_process(tsk); ++ ++ raw_spin_unlock_irq(&m->wait_lock); ++} ++ ++static void __up_write_unlock(struct rw_semaphore *sem, int bias, ++ unsigned long flags) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ ++ atomic_add(READER_BIAS - bias, &sem->readers); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ __rt_mutex_unlock(m); ++} ++ ++static int __sched __down_write_common(struct rw_semaphore *sem, int state) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ unsigned long flags; ++ ++ /* ++ * Flush blk before ->pi_blocked_on is set. At schedule() time it is too ++ * late if one of the callbacks needs to acquire a sleeping lock. ++ */ ++ if (blk_needs_flush_plug(current)) ++ blk_schedule_flush_plug(current); ++ ++ /* Take the rtmutex as a first step */ ++ if (__rt_mutex_lock_state(m, state)) ++ return -EINTR; ++ ++ /* Force readers into slow path */ ++ atomic_sub(READER_BIAS, &sem->readers); ++ might_sleep(); ++ ++ set_current_state(state); ++ for (;;) { ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ /* Have all readers left the critical region? */ ++ if (!atomic_read(&sem->readers)) { ++ atomic_set(&sem->readers, WRITER_BIAS); ++ __set_current_state(TASK_RUNNING); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ return 0; ++ } ++ ++ if (signal_pending_state(state, current)) { ++ __set_current_state(TASK_RUNNING); ++ __up_write_unlock(sem, 0, flags); ++ return -EINTR; ++ } ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ ++ if (atomic_read(&sem->readers) != 0) { ++ schedule(); ++ set_current_state(state); ++ } ++ } ++} ++ ++void __sched __down_write(struct rw_semaphore *sem) ++{ ++ __down_write_common(sem, TASK_UNINTERRUPTIBLE); ++} ++ ++int __sched __down_write_killable(struct rw_semaphore *sem) ++{ ++ return __down_write_common(sem, TASK_KILLABLE); ++} ++ ++int __down_write_trylock(struct rw_semaphore *sem) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ unsigned long flags; ++ ++ if (!__rt_mutex_trylock(m)) ++ return 0; ++ ++ atomic_sub(READER_BIAS, &sem->readers); ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ if (!atomic_read(&sem->readers)) { ++ atomic_set(&sem->readers, WRITER_BIAS); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ return 1; ++ } ++ __up_write_unlock(sem, 0, flags); ++ return 0; ++} ++ ++void __up_write(struct rw_semaphore *sem) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ __up_write_unlock(sem, WRITER_BIAS, flags); ++} ++ ++void __downgrade_write(struct rw_semaphore *sem) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ /* Release it and account current as reader */ ++ __up_write_unlock(sem, WRITER_BIAS - 1, flags); ++} +diff --git a/kernel/locking/rwsem.c b/kernel/locking/rwsem.c +index cc5cc889b..f7c909ef1 100644 +--- a/kernel/locking/rwsem.c ++++ b/kernel/locking/rwsem.c +@@ -28,6 +28,7 @@ + #include + #include + ++#ifndef CONFIG_PREEMPT_RT + #include "lock_events.h" + + /* +@@ -1494,6 +1495,7 @@ static inline void __downgrade_write(struct rw_semaphore *sem) + if (tmp & RWSEM_FLAG_WAITERS) + rwsem_downgrade_wake(sem); + } ++#endif + + /* + * lock for reading +@@ -1657,7 +1659,9 @@ void down_read_non_owner(struct rw_semaphore *sem) + { + might_sleep(); + __down_read(sem); ++#ifndef CONFIG_PREEMPT_RT + __rwsem_set_reader_owned(sem, NULL); ++#endif + } + EXPORT_SYMBOL(down_read_non_owner); + +@@ -1686,7 +1690,9 @@ EXPORT_SYMBOL(down_write_killable_nested); + + void up_read_non_owner(struct rw_semaphore *sem) + { ++#ifndef CONFIG_PREEMPT_RT + DEBUG_RWSEMS_WARN_ON(!is_rwsem_reader_owned(sem), sem); ++#endif + __up_read(sem); + } + EXPORT_SYMBOL(up_read_non_owner); +diff --git a/kernel/locking/spinlock.c b/kernel/locking/spinlock.c +index 0ff08380f..45445a2f1 100644 +--- a/kernel/locking/spinlock.c ++++ b/kernel/locking/spinlock.c +@@ -124,8 +124,11 @@ void __lockfunc __raw_##op##_lock_bh(locktype##_t *lock) \ + * __[spin|read|write]_lock_bh() + */ + BUILD_LOCK_OPS(spin, raw_spinlock); ++ ++#ifndef CONFIG_PREEMPT_RT + BUILD_LOCK_OPS(read, rwlock); + BUILD_LOCK_OPS(write, rwlock); ++#endif + + #endif + +@@ -209,6 +212,8 @@ void __lockfunc _raw_spin_unlock_bh(raw_spinlock_t *lock) + EXPORT_SYMBOL(_raw_spin_unlock_bh); + #endif + ++#ifndef CONFIG_PREEMPT_RT ++ + #ifndef CONFIG_INLINE_READ_TRYLOCK + int __lockfunc _raw_read_trylock(rwlock_t *lock) + { +@@ -353,6 +358,8 @@ void __lockfunc _raw_write_unlock_bh(rwlock_t *lock) + EXPORT_SYMBOL(_raw_write_unlock_bh); + #endif + ++#endif /* !PREEMPT_RT */ ++ + #ifdef CONFIG_DEBUG_LOCK_ALLOC + + void __lockfunc _raw_spin_lock_nested(raw_spinlock_t *lock, int subclass) +diff --git a/kernel/locking/spinlock_debug.c b/kernel/locking/spinlock_debug.c +index b9d93087e..72e306e0e 100644 +--- a/kernel/locking/spinlock_debug.c ++++ b/kernel/locking/spinlock_debug.c +@@ -31,6 +31,7 @@ void __raw_spin_lock_init(raw_spinlock_t *lock, const char *name, + + EXPORT_SYMBOL(__raw_spin_lock_init); + ++#ifndef CONFIG_PREEMPT_RT + void __rwlock_init(rwlock_t *lock, const char *name, + struct lock_class_key *key) + { +@@ -48,6 +49,7 @@ void __rwlock_init(rwlock_t *lock, const char *name, + } + + EXPORT_SYMBOL(__rwlock_init); ++#endif + + static void spin_dump(raw_spinlock_t *lock, const char *msg) + { +@@ -139,6 +141,7 @@ void do_raw_spin_unlock(raw_spinlock_t *lock) + arch_spin_unlock(&lock->raw_lock); + } + ++#ifndef CONFIG_PREEMPT_RT + static void rwlock_bug(rwlock_t *lock, const char *msg) + { + if (!debug_locks_off()) +@@ -228,3 +231,5 @@ void do_raw_write_unlock(rwlock_t *lock) + debug_write_unlock(lock); + arch_write_unlock(&lock->raw_lock); + } ++ ++#endif +diff --git a/kernel/notifier.c b/kernel/notifier.c +index 1b019cbca..c20782f07 100644 +--- a/kernel/notifier.c ++++ b/kernel/notifier.c +@@ -142,9 +142,9 @@ int atomic_notifier_chain_register(struct atomic_notifier_head *nh, + unsigned long flags; + int ret; + +- spin_lock_irqsave(&nh->lock, flags); ++ raw_spin_lock_irqsave(&nh->lock, flags); + ret = notifier_chain_register(&nh->head, n); +- spin_unlock_irqrestore(&nh->lock, flags); ++ raw_spin_unlock_irqrestore(&nh->lock, flags); + return ret; + } + EXPORT_SYMBOL_GPL(atomic_notifier_chain_register); +@@ -164,9 +164,9 @@ int atomic_notifier_chain_unregister(struct atomic_notifier_head *nh, + unsigned long flags; + int ret; + +- spin_lock_irqsave(&nh->lock, flags); ++ raw_spin_lock_irqsave(&nh->lock, flags); + ret = notifier_chain_unregister(&nh->head, n); +- spin_unlock_irqrestore(&nh->lock, flags); ++ raw_spin_unlock_irqrestore(&nh->lock, flags); + synchronize_rcu(); + return ret; + } +@@ -182,9 +182,9 @@ int atomic_notifier_call_chain_robust(struct atomic_notifier_head *nh, + * Musn't use RCU; because then the notifier list can + * change between the up and down traversal. + */ +- spin_lock_irqsave(&nh->lock, flags); ++ raw_spin_lock_irqsave(&nh->lock, flags); + ret = notifier_call_chain_robust(&nh->head, val_up, val_down, v); +- spin_unlock_irqrestore(&nh->lock, flags); ++ raw_spin_unlock_irqrestore(&nh->lock, flags); + + return ret; + } +diff --git a/kernel/panic.c b/kernel/panic.c +index 04bf62b7c..578cc041c 100644 +--- a/kernel/panic.c ++++ b/kernel/panic.c +@@ -241,11 +241,26 @@ void check_panic_on_warn(const char *origin) + void panic(const char *fmt, ...) + { + static char buf[1024]; ++ va_list args2; + va_list args; + long i, i_next = 0, len; + int state = 0; + int old_cpu, this_cpu; + bool _crash_kexec_post_notifiers = crash_kexec_post_notifiers; ++ console_verbose(); ++ pr_emerg("Kernel panic - not syncing:\n"); ++ va_start(args2, fmt); ++ va_copy(args, args2); ++ vprintk(fmt, args2); ++ va_end(args2); ++#ifdef CONFIG_DEBUG_BUGVERBOSE ++ /* ++ * Avoid nested stack-dumping if a panic occurs during oops processing ++ */ ++ if (!test_taint(TAINT_DIE) && oops_in_progress <= 1) ++ dump_stack(); ++#endif ++ pr_flush(1000, true); + + if (panic_on_warn) { + /* +@@ -287,24 +302,13 @@ void panic(const char *fmt, ...) + if (old_cpu != PANIC_CPU_INVALID && old_cpu != this_cpu) + panic_smp_self_stop(); + +- console_verbose(); + bust_spinlocks(1); +- va_start(args, fmt); + len = vscnprintf(buf, sizeof(buf), fmt, args); + va_end(args); + + if (len && buf[len - 1] == '\n') + buf[len - 1] = '\0'; + +- pr_emerg("Kernel panic - not syncing: %s\n", buf); +-#ifdef CONFIG_DEBUG_BUGVERBOSE +- /* +- * Avoid nested stack-dumping if a panic occurs during oops processing +- */ +- if (!test_taint(TAINT_DIE) && oops_in_progress <= 1) +- dump_stack(); +-#endif +- + /* + * If kgdb is enabled, give it a chance to run before we stop all + * the other CPUs or else we won't be able to debug processes left +@@ -321,7 +325,6 @@ void panic(const char *fmt, ...) + * Bypass the panic_cpu check and call __crash_kexec directly. + */ + if (!_crash_kexec_post_notifiers) { +- printk_safe_flush_on_panic(); + __crash_kexec(NULL); + + /* +@@ -372,8 +375,6 @@ void panic(const char *fmt, ...) + */ + atomic_notifier_call_chain(&panic_notifier_list, 0, buf); + +- /* Call flush even twice. It tries harder with a single online CPU */ +- printk_safe_flush_on_panic(); + kmsg_dump(KMSG_DUMP_PANIC); + + /* +@@ -643,9 +644,11 @@ static u64 oops_id; + + static int init_oops_id(void) + { ++#ifndef CONFIG_PREEMPT_RT + if (!oops_id) + get_random_bytes(&oops_id, sizeof(oops_id)); + else ++#endif + oops_id++; + + return 0; +@@ -656,6 +659,7 @@ static void print_oops_end_marker(void) + { + init_oops_id(); + pr_warn("---[ end trace %016llx ]---\n", (unsigned long long)oops_id); ++ pr_flush(1000, true); + } + + /* +diff --git a/kernel/printk/Makefile b/kernel/printk/Makefile +index eee3dc9b6..59cb24e25 100644 +--- a/kernel/printk/Makefile ++++ b/kernel/printk/Makefile +@@ -1,5 +1,4 @@ + # SPDX-License-Identifier: GPL-2.0-only + obj-y = printk.o +-obj-$(CONFIG_PRINTK) += printk_safe.o + obj-$(CONFIG_A11Y_BRAILLE_CONSOLE) += braille.o + obj-$(CONFIG_PRINTK) += printk_ringbuffer.o +diff --git a/kernel/printk/internal.h b/kernel/printk/internal.h +index b1c155328..059c3d876 100644 +--- a/kernel/printk/internal.h ++++ b/kernel/printk/internal.h +@@ -12,8 +12,6 @@ + + #define PRINTK_NMI_CONTEXT_OFFSET 0x010000000 + +-extern raw_spinlock_t logbuf_lock; +- + __printf(4, 0) + int vprintk_store(int facility, int level, + const struct dev_printk_info *dev_info, +@@ -23,7 +21,6 @@ __printf(1, 0) int vprintk_default(const char *fmt, va_list args); + __printf(1, 0) int vprintk_deferred(const char *fmt, va_list args); + __printf(1, 0) int vprintk_func(const char *fmt, va_list args); + +-void printk_safe_init(void); + bool printk_percpu_data_ready(void); + + void defer_console_output(void); +@@ -32,6 +29,5 @@ void defer_console_output(void); + + __printf(1, 0) int vprintk_func(const char *fmt, va_list args) { return 0; } + +-static inline void printk_safe_init(void) { } + static inline bool printk_percpu_data_ready(void) { return false; } + #endif /* CONFIG_PRINTK */ +diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c +index ecd28d4fa..e95b00f24 100644 +--- a/kernel/printk/printk.c ++++ b/kernel/printk/printk.c +@@ -44,6 +44,9 @@ + #include + #include + #include ++#include ++#include ++#include + #include + #include + #include +@@ -58,7 +61,6 @@ + #include "printk_ringbuffer.h" + #include "console_cmdline.h" + #include "braille.h" +-#include "internal.h" + + int console_printk[4] = { + CONSOLE_LOGLEVEL_DEFAULT, /* console_loglevel */ +@@ -227,19 +229,7 @@ static int nr_ext_console_drivers; + + static int __down_trylock_console_sem(unsigned long ip) + { +- int lock_failed; +- unsigned long flags; +- +- /* +- * Here and in __up_console_sem() we need to be in safe mode, +- * because spindump/WARN/etc from under console ->lock will +- * deadlock in printk()->down_trylock_console_sem() otherwise. +- */ +- printk_safe_enter_irqsave(flags); +- lock_failed = down_trylock(&console_sem); +- printk_safe_exit_irqrestore(flags); +- +- if (lock_failed) ++ if (down_trylock(&console_sem)) + return 1; + mutex_acquire(&console_lock_dep_map, 0, 1, ip); + return 0; +@@ -248,13 +238,9 @@ static int __down_trylock_console_sem(unsigned long ip) + + static void __up_console_sem(unsigned long ip) + { +- unsigned long flags; +- + mutex_release(&console_lock_dep_map, ip); + +- printk_safe_enter_irqsave(flags); + up(&console_sem); +- printk_safe_exit_irqrestore(flags); + } + #define up_console_sem() __up_console_sem(_RET_IP_) + +@@ -268,11 +254,6 @@ static void __up_console_sem(unsigned long ip) + */ + static int console_locked, console_suspended; + +-/* +- * If exclusive_console is non-NULL then only this console is to be printed to. +- */ +-static struct console *exclusive_console; +- + /* + * Array of consoles built from command line options (console=) + */ +@@ -357,61 +338,43 @@ enum log_flags { + LOG_CONT = 8, /* text is a fragment of a continuation line */ + }; + +-/* +- * The logbuf_lock protects kmsg buffer, indices, counters. This can be taken +- * within the scheduler's rq lock. It must be released before calling +- * console_unlock() or anything else that might wake up a process. +- */ +-DEFINE_RAW_SPINLOCK(logbuf_lock); ++#ifdef CONFIG_PRINTK ++/* syslog_lock protects syslog_* variables and write access to clear_seq. */ ++static DEFINE_SPINLOCK(syslog_lock); + +-/* +- * Helper macros to lock/unlock logbuf_lock and switch between +- * printk-safe/unsafe modes. +- */ +-#define logbuf_lock_irq() \ +- do { \ +- printk_safe_enter_irq(); \ +- raw_spin_lock(&logbuf_lock); \ +- } while (0) +- +-#define logbuf_unlock_irq() \ +- do { \ +- raw_spin_unlock(&logbuf_lock); \ +- printk_safe_exit_irq(); \ +- } while (0) +- +-#define logbuf_lock_irqsave(flags) \ +- do { \ +- printk_safe_enter_irqsave(flags); \ +- raw_spin_lock(&logbuf_lock); \ +- } while (0) +- +-#define logbuf_unlock_irqrestore(flags) \ +- do { \ +- raw_spin_unlock(&logbuf_lock); \ +- printk_safe_exit_irqrestore(flags); \ +- } while (0) ++/* Set to enable sync mode. Once set, it is never cleared. */ ++static bool sync_mode; + +-#ifdef CONFIG_PRINTK + DECLARE_WAIT_QUEUE_HEAD(log_wait); ++/* All 3 protected by @syslog_lock. */ + /* the next printk record to read by syslog(READ) or /proc/kmsg */ + static u64 syslog_seq; + static size_t syslog_partial; + static bool syslog_time; + +-/* the next printk record to write to the console */ +-static u64 console_seq; +-static u64 exclusive_console_stop_seq; +-static unsigned long console_dropped; ++struct latched_seq { ++ seqcount_latch_t latch; ++ u64 val[2]; ++}; + +-/* the next printk record to read after the last 'clear' command */ +-static u64 clear_seq; ++/* ++ * The next printk record to read after the last 'clear' command. There are ++ * two copies (updated with seqcount_latch) so that reads can locklessly ++ * access a valid value. Writers are synchronized by @syslog_lock. ++ */ ++static struct latched_seq clear_seq = { ++ .latch = SEQCNT_LATCH_ZERO(clear_seq.latch), ++ .val[0] = 0, ++ .val[1] = 0, ++}; + + #ifdef CONFIG_PRINTK_CALLER + #define PREFIX_MAX 48 + #else + #define PREFIX_MAX 32 + #endif ++ ++/* the maximum size allowed to be reserved for a record */ + #define LOG_LINE_MAX (1024 - PREFIX_MAX) + + #define LOG_LEVEL(v) ((v) & 0x07) +@@ -449,11 +412,36 @@ static struct printk_ringbuffer *prb = &printk_rb_static; + */ + static bool __printk_percpu_data_ready __read_mostly; + +-bool printk_percpu_data_ready(void) ++static bool printk_percpu_data_ready(void) + { + return __printk_percpu_data_ready; + } + ++/* Must be called under syslog_lock. */ ++static void latched_seq_write(struct latched_seq *ls, u64 val) ++{ ++ raw_write_seqcount_latch(&ls->latch); ++ ls->val[0] = val; ++ raw_write_seqcount_latch(&ls->latch); ++ ls->val[1] = val; ++} ++ ++/* Can be called from any context. */ ++static u64 latched_seq_read_nolock(struct latched_seq *ls) ++{ ++ unsigned int seq; ++ unsigned int idx; ++ u64 val; ++ ++ do { ++ seq = raw_read_seqcount_latch(&ls->latch); ++ idx = seq & 0x1; ++ val = ls->val[idx]; ++ } while (read_seqcount_latch_retry(&ls->latch, seq)); ++ ++ return val; ++} ++ + /* Return log buffer address */ + char *log_buf_addr_get(void) + { +@@ -495,52 +483,6 @@ static void truncate_msg(u16 *text_len, u16 *trunc_msg_len) + *trunc_msg_len = 0; + } + +-/* insert record into the buffer, discard old ones, update heads */ +-static int log_store(u32 caller_id, int facility, int level, +- enum log_flags flags, u64 ts_nsec, +- const struct dev_printk_info *dev_info, +- const char *text, u16 text_len) +-{ +- struct prb_reserved_entry e; +- struct printk_record r; +- u16 trunc_msg_len = 0; +- +- prb_rec_init_wr(&r, text_len); +- +- if (!prb_reserve(&e, prb, &r)) { +- /* truncate the message if it is too long for empty buffer */ +- truncate_msg(&text_len, &trunc_msg_len); +- prb_rec_init_wr(&r, text_len + trunc_msg_len); +- /* survive when the log buffer is too small for trunc_msg */ +- if (!prb_reserve(&e, prb, &r)) +- return 0; +- } +- +- /* fill message */ +- memcpy(&r.text_buf[0], text, text_len); +- if (trunc_msg_len) +- memcpy(&r.text_buf[text_len], trunc_msg, trunc_msg_len); +- r.info->text_len = text_len + trunc_msg_len; +- r.info->facility = facility; +- r.info->level = level & 7; +- r.info->flags = flags & 0x1f; +- if (ts_nsec > 0) +- r.info->ts_nsec = ts_nsec; +- else +- r.info->ts_nsec = local_clock(); +- r.info->caller_id = caller_id; +- if (dev_info) +- memcpy(&r.info->dev_info, dev_info, sizeof(r.info->dev_info)); +- +- /* A message without a trailing newline can be continued. */ +- if (!(flags & LOG_NEWLINE)) +- prb_commit(&e); +- else +- prb_final_commit(&e); +- +- return (text_len + trunc_msg_len); +-} +- + int dmesg_restrict = IS_ENABLED(CONFIG_SECURITY_DMESG_RESTRICT); + + static int syslog_action_restricted(int type) +@@ -669,7 +611,7 @@ static ssize_t msg_print_ext_body(char *buf, size_t size, + + /* /dev/kmsg - userspace message inject/listen interface */ + struct devkmsg_user { +- u64 seq; ++ atomic64_t seq; + struct ratelimit_state rs; + struct mutex lock; + char buf[CONSOLE_EXT_LOG_MAX]; +@@ -770,27 +712,22 @@ static ssize_t devkmsg_read(struct file *file, char __user *buf, + if (ret) + return ret; + +- logbuf_lock_irq(); +- if (!prb_read_valid(prb, user->seq, r)) { ++ if (!prb_read_valid(prb, atomic64_read(&user->seq), r)) { + if (file->f_flags & O_NONBLOCK) { + ret = -EAGAIN; +- logbuf_unlock_irq(); + goto out; + } + +- logbuf_unlock_irq(); + ret = wait_event_interruptible(log_wait, +- prb_read_valid(prb, user->seq, r)); ++ prb_read_valid(prb, atomic64_read(&user->seq), r)); + if (ret) + goto out; +- logbuf_lock_irq(); + } + +- if (r->info->seq != user->seq) { ++ if (r->info->seq != atomic64_read(&user->seq)) { + /* our last seen message is gone, return error and reset */ +- user->seq = r->info->seq; ++ atomic64_set(&user->seq, r->info->seq); + ret = -EPIPE; +- logbuf_unlock_irq(); + goto out; + } + +@@ -799,8 +736,7 @@ static ssize_t devkmsg_read(struct file *file, char __user *buf, + &r->text_buf[0], r->info->text_len, + &r->info->dev_info); + +- user->seq = r->info->seq + 1; +- logbuf_unlock_irq(); ++ atomic64_set(&user->seq, r->info->seq + 1); + + if (len > count) { + ret = -EINVAL; +@@ -835,11 +771,10 @@ static loff_t devkmsg_llseek(struct file *file, loff_t offset, int whence) + if (offset) + return -ESPIPE; + +- logbuf_lock_irq(); + switch (whence) { + case SEEK_SET: + /* the first record */ +- user->seq = prb_first_valid_seq(prb); ++ atomic64_set(&user->seq, prb_first_valid_seq(prb)); + break; + case SEEK_DATA: + /* +@@ -847,16 +782,15 @@ static loff_t devkmsg_llseek(struct file *file, loff_t offset, int whence) + * like issued by 'dmesg -c'. Reading /dev/kmsg itself + * changes no global state, and does not clear anything. + */ +- user->seq = clear_seq; ++ atomic64_set(&user->seq, latched_seq_read_nolock(&clear_seq)); + break; + case SEEK_END: + /* after the last record */ +- user->seq = prb_next_seq(prb); ++ atomic64_set(&user->seq, prb_next_seq(prb)); + break; + default: + ret = -EINVAL; + } +- logbuf_unlock_irq(); + return ret; + } + +@@ -871,15 +805,13 @@ static __poll_t devkmsg_poll(struct file *file, poll_table *wait) + + poll_wait(file, &log_wait, wait); + +- logbuf_lock_irq(); +- if (prb_read_valid_info(prb, user->seq, &info, NULL)) { ++ if (prb_read_valid_info(prb, atomic64_read(&user->seq), &info, NULL)) { + /* return error when data has vanished underneath us */ +- if (info.seq != user->seq) ++ if (info.seq != atomic64_read(&user->seq)) + ret = EPOLLIN|EPOLLRDNORM|EPOLLERR|EPOLLPRI; + else + ret = EPOLLIN|EPOLLRDNORM; + } +- logbuf_unlock_irq(); + + return ret; + } +@@ -912,9 +844,7 @@ static int devkmsg_open(struct inode *inode, struct file *file) + prb_rec_init_rd(&user->record, &user->info, + &user->text_buf[0], sizeof(user->text_buf)); + +- logbuf_lock_irq(); +- user->seq = prb_first_valid_seq(prb); +- logbuf_unlock_irq(); ++ atomic64_set(&user->seq, prb_first_valid_seq(prb)); + + file->private_data = user; + return 0; +@@ -1006,6 +936,9 @@ void log_buf_vmcoreinfo_setup(void) + + VMCOREINFO_SIZE(atomic_long_t); + VMCOREINFO_TYPE_OFFSET(atomic_long_t, counter); ++ ++ VMCOREINFO_STRUCT_SIZE(latched_seq); ++ VMCOREINFO_OFFSET(latched_seq, val); + } + #endif + +@@ -1077,9 +1010,6 @@ static inline void log_buf_add_cpu(void) {} + + static void __init set_percpu_data_ready(void) + { +- printk_safe_init(); +- /* Make sure we set this flag only after printk_safe() init is done */ +- barrier(); + __printk_percpu_data_ready = true; + } + +@@ -1119,7 +1049,6 @@ void __init setup_log_buf(int early) + struct printk_record r; + size_t new_descs_size; + size_t new_infos_size; +- unsigned long flags; + char *new_log_buf; + unsigned int free; + u64 seq; +@@ -1177,8 +1106,6 @@ void __init setup_log_buf(int early) + new_descs, ilog2(new_descs_count), + new_infos); + +- logbuf_lock_irqsave(flags); +- + log_buf_len = new_log_buf_len; + log_buf = new_log_buf; + new_log_buf_len = 0; +@@ -1194,8 +1121,6 @@ void __init setup_log_buf(int early) + */ + prb = &printk_rb_dynamic; + +- logbuf_unlock_irqrestore(flags); +- + if (seq != prb_next_seq(&printk_rb_static)) { + pr_err("dropped %llu messages\n", + prb_next_seq(&printk_rb_static) - seq); +@@ -1472,6 +1397,50 @@ static size_t get_record_print_text_size(struct printk_info *info, + return ((prefix_len * line_count) + info->text_len + 1); + } + ++/* ++ * Beginning with @start_seq, find the first record where it and all following ++ * records up to (but not including) @max_seq fit into @size. ++ * ++ * @max_seq is simply an upper bound and does not need to exist. If the caller ++ * does not require an upper bound, -1 can be used for @max_seq. ++ */ ++static u64 find_first_fitting_seq(u64 start_seq, u64 max_seq, size_t size, ++ bool syslog, bool time) ++{ ++ struct printk_info info; ++ unsigned int line_count; ++ size_t len = 0; ++ u64 seq; ++ ++ /* Determine the size of the records up to @max_seq. */ ++ prb_for_each_info(start_seq, prb, seq, &info, &line_count) { ++ if (info.seq >= max_seq) ++ break; ++ len += get_record_print_text_size(&info, line_count, syslog, time); ++ } ++ ++ /* ++ * Adjust the upper bound for the next loop to avoid subtracting ++ * lengths that were never added. ++ */ ++ if (seq < max_seq) ++ max_seq = seq; ++ ++ /* ++ * Move first record forward until length fits into the buffer. Ignore ++ * newest messages that were not counted in the above cycle. Messages ++ * might appear and get lost in the meantime. This is a best effort ++ * that prevents an infinite loop that could occur with a retry. ++ */ ++ prb_for_each_info(start_seq, prb, seq, &info, &line_count) { ++ if (len <= size || info.seq >= max_seq) ++ break; ++ len -= get_record_print_text_size(&info, line_count, syslog, time); ++ } ++ ++ return seq; ++} ++ + static int syslog_print(char __user *buf, int size) + { + struct printk_info info; +@@ -1479,19 +1448,19 @@ static int syslog_print(char __user *buf, int size) + char *text; + int len = 0; + +- text = kmalloc(LOG_LINE_MAX + PREFIX_MAX, GFP_KERNEL); ++ text = kmalloc(CONSOLE_LOG_MAX, GFP_KERNEL); + if (!text) + return -ENOMEM; + +- prb_rec_init_rd(&r, &info, text, LOG_LINE_MAX + PREFIX_MAX); ++ prb_rec_init_rd(&r, &info, text, CONSOLE_LOG_MAX); + + while (size > 0) { + size_t n; + size_t skip; + +- logbuf_lock_irq(); ++ spin_lock_irq(&syslog_lock); + if (!prb_read_valid(prb, syslog_seq, &r)) { +- logbuf_unlock_irq(); ++ spin_unlock_irq(&syslog_lock); + break; + } + if (r.info->seq != syslog_seq) { +@@ -1520,7 +1489,7 @@ static int syslog_print(char __user *buf, int size) + syslog_partial += n; + } else + n = 0; +- logbuf_unlock_irq(); ++ spin_unlock_irq(&syslog_lock); + + if (!n) + break; +@@ -1543,34 +1512,25 @@ static int syslog_print(char __user *buf, int size) + static int syslog_print_all(char __user *buf, int size, bool clear) + { + struct printk_info info; +- unsigned int line_count; + struct printk_record r; + char *text; + int len = 0; + u64 seq; + bool time; + +- text = kmalloc(LOG_LINE_MAX + PREFIX_MAX, GFP_KERNEL); ++ text = kmalloc(CONSOLE_LOG_MAX, GFP_KERNEL); + if (!text) + return -ENOMEM; + + time = printk_time; +- logbuf_lock_irq(); + /* + * Find first record that fits, including all following records, + * into the user-provided buffer for this dump. + */ +- prb_for_each_info(clear_seq, prb, seq, &info, &line_count) +- len += get_record_print_text_size(&info, line_count, true, time); +- +- /* move first record forward until length fits into the buffer */ +- prb_for_each_info(clear_seq, prb, seq, &info, &line_count) { +- if (len <= size) +- break; +- len -= get_record_print_text_size(&info, line_count, true, time); +- } ++ seq = find_first_fitting_seq(latched_seq_read_nolock(&clear_seq), -1, ++ size, true, time); + +- prb_rec_init_rd(&r, &info, text, LOG_LINE_MAX + PREFIX_MAX); ++ prb_rec_init_rd(&r, &info, text, CONSOLE_LOG_MAX); + + len = 0; + prb_for_each_record(seq, prb, seq, &r) { +@@ -1583,20 +1543,20 @@ static int syslog_print_all(char __user *buf, int size, bool clear) + break; + } + +- logbuf_unlock_irq(); + if (copy_to_user(buf + len, text, textlen)) + len = -EFAULT; + else + len += textlen; +- logbuf_lock_irq(); + + if (len < 0) + break; + } + +- if (clear) +- clear_seq = seq; +- logbuf_unlock_irq(); ++ if (clear) { ++ spin_lock_irq(&syslog_lock); ++ latched_seq_write(&clear_seq, seq); ++ spin_unlock_irq(&syslog_lock); ++ } + + kfree(text); + return len; +@@ -1604,9 +1564,21 @@ static int syslog_print_all(char __user *buf, int size, bool clear) + + static void syslog_clear(void) + { +- logbuf_lock_irq(); +- clear_seq = prb_next_seq(prb); +- logbuf_unlock_irq(); ++ spin_lock_irq(&syslog_lock); ++ latched_seq_write(&clear_seq, prb_next_seq(prb)); ++ spin_unlock_irq(&syslog_lock); ++} ++ ++/* Return a consistent copy of @syslog_seq. */ ++static u64 read_syslog_seq_irq(void) ++{ ++ u64 seq; ++ ++ spin_lock_irq(&syslog_lock); ++ seq = syslog_seq; ++ spin_unlock_irq(&syslog_lock); ++ ++ return seq; + } + + int do_syslog(int type, char __user *buf, int len, int source) +@@ -1632,8 +1604,9 @@ int do_syslog(int type, char __user *buf, int len, int source) + return 0; + if (!access_ok(buf, len)) + return -EFAULT; ++ + error = wait_event_interruptible(log_wait, +- prb_read_valid(prb, syslog_seq, NULL)); ++ prb_read_valid(prb, read_syslog_seq_irq(), NULL)); + if (error) + return error; + error = syslog_print(buf, len); +@@ -1681,10 +1654,10 @@ int do_syslog(int type, char __user *buf, int len, int source) + break; + /* Number of chars in the log buffer */ + case SYSLOG_ACTION_SIZE_UNREAD: +- logbuf_lock_irq(); ++ spin_lock_irq(&syslog_lock); + if (!prb_read_valid_info(prb, syslog_seq, &info, NULL)) { + /* No unread messages. */ +- logbuf_unlock_irq(); ++ spin_unlock_irq(&syslog_lock); + return 0; + } + if (info.seq != syslog_seq) { +@@ -1712,7 +1685,7 @@ int do_syslog(int type, char __user *buf, int len, int source) + } + error -= syslog_partial; + } +- logbuf_unlock_irq(); ++ spin_unlock_irq(&syslog_lock); + break; + /* Size of the log buffer */ + case SYSLOG_ACTION_SIZE_BUFFER: +@@ -1731,221 +1704,191 @@ SYSCALL_DEFINE3(syslog, int, type, char __user *, buf, int, len) + return do_syslog(type, buf, len, SYSLOG_FROM_READER); + } + +-/* +- * Special console_lock variants that help to reduce the risk of soft-lockups. +- * They allow to pass console_lock to another printk() call using a busy wait. +- */ ++int printk_delay_msec __read_mostly; + +-#ifdef CONFIG_LOCKDEP +-static struct lockdep_map console_owner_dep_map = { +- .name = "console_owner" +-}; +-#endif ++static inline void printk_delay(int level) ++{ ++ boot_delay_msec(level); ++ ++ if (unlikely(printk_delay_msec)) { ++ int m = printk_delay_msec; + +-static DEFINE_RAW_SPINLOCK(console_owner_lock); +-static struct task_struct *console_owner; +-static bool console_waiter; ++ while (m--) { ++ mdelay(1); ++ touch_nmi_watchdog(); ++ } ++ } ++} + +-#if defined(CONFIG_X86) || defined(CONFIG_ARM64_PSEUDO_NMI) +-void zap_locks(void) ++static bool kernel_sync_mode(void) + { +- if (raw_spin_is_locked(&logbuf_lock)) { +- debug_locks_off(); +- raw_spin_lock_init(&logbuf_lock); +- } ++ return (oops_in_progress || sync_mode); ++} + +- if (raw_spin_is_locked(&console_owner_lock)) { +- raw_spin_lock_init(&console_owner_lock); +- } ++static bool console_can_sync(struct console *con) ++{ ++ if (!(con->flags & CON_ENABLED)) ++ return false; ++ if (con->write_atomic && kernel_sync_mode()) ++ return true; ++ if (con->write_atomic && (con->flags & CON_HANDOVER) && !con->thread) ++ return true; ++ if (con->write && (con->flags & CON_BOOT) && !con->thread) ++ return true; ++ return false; ++} + +- console_owner = NULL; +- console_waiter = false; ++static bool call_sync_console_driver(struct console *con, const char *text, size_t text_len) ++{ ++ if (!(con->flags & CON_ENABLED)) ++ return false; ++ if (con->write_atomic && kernel_sync_mode()) ++ con->write_atomic(con, text, text_len); ++ else if (con->write_atomic && (con->flags & CON_HANDOVER) && !con->thread) ++ con->write_atomic(con, text, text_len); ++ else if (con->write && (con->flags & CON_BOOT) && !con->thread) ++ con->write(con, text, text_len); ++ else ++ return false; + +- sema_init(&console_sem, 1); ++ return true; + } +-#endif + +-/** +- * console_lock_spinning_enable - mark beginning of code where another +- * thread might safely busy wait +- * +- * This basically converts console_lock into a spinlock. This marks +- * the section where the console_lock owner can not sleep, because +- * there may be a waiter spinning (like a spinlock). Also it must be +- * ready to hand over the lock at the end of the section. +- */ +-static void console_lock_spinning_enable(void) ++static bool have_atomic_console(void) + { +- raw_spin_lock(&console_owner_lock); +- console_owner = current; +- raw_spin_unlock(&console_owner_lock); ++ struct console *con; + +- /* The waiter may spin on us after setting console_owner */ +- spin_acquire(&console_owner_dep_map, 0, 0, _THIS_IP_); ++ for_each_console(con) { ++ if (!(con->flags & CON_ENABLED)) ++ continue; ++ if (con->write_atomic) ++ return true; ++ } ++ return false; + } + +-/** +- * console_lock_spinning_disable_and_check - mark end of code where another +- * thread was able to busy wait and check if there is a waiter +- * +- * This is called at the end of the section where spinning is allowed. +- * It has two functions. First, it is a signal that it is no longer +- * safe to start busy waiting for the lock. Second, it checks if +- * there is a busy waiter and passes the lock rights to her. +- * +- * Important: Callers lose the lock if there was a busy waiter. +- * They must not touch items synchronized by console_lock +- * in this case. +- * +- * Return: 1 if the lock rights were passed, 0 otherwise. +- */ +-static int console_lock_spinning_disable_and_check(void) ++static bool print_sync(struct console *con, u64 *seq) + { +- int waiter; ++ struct printk_info info; ++ struct printk_record r; ++ size_t text_len; + +- raw_spin_lock(&console_owner_lock); +- waiter = READ_ONCE(console_waiter); +- console_owner = NULL; +- raw_spin_unlock(&console_owner_lock); ++ prb_rec_init_rd(&r, &info, &con->sync_buf[0], sizeof(con->sync_buf)); + +- if (!waiter) { +- spin_release(&console_owner_dep_map, _THIS_IP_); +- return 0; +- } ++ if (!prb_read_valid(prb, *seq, &r)) ++ return false; + +- /* The waiter is now free to continue */ +- WRITE_ONCE(console_waiter, false); ++ text_len = record_print_text(&r, console_msg_format & MSG_FORMAT_SYSLOG, printk_time); + +- spin_release(&console_owner_dep_map, _THIS_IP_); ++ if (!call_sync_console_driver(con, &con->sync_buf[0], text_len)) ++ return false; + +- /* +- * Hand off console_lock to waiter. The waiter will perform +- * the up(). After this, the waiter is the console_lock owner. +- */ +- mutex_release(&console_lock_dep_map, _THIS_IP_); +- return 1; +-} ++ *seq = r.info->seq; + +-/** +- * console_trylock_spinning - try to get console_lock by busy waiting +- * +- * This allows to busy wait for the console_lock when the current +- * owner is running in specially marked sections. It means that +- * the current owner is running and cannot reschedule until it +- * is ready to lose the lock. +- * +- * Return: 1 if we got the lock, 0 othrewise +- */ +-static int console_trylock_spinning(void) +-{ +- struct task_struct *owner = NULL; +- bool waiter; +- bool spin = false; +- unsigned long flags; ++ touch_softlockup_watchdog_sync(); ++ clocksource_touch_watchdog(); ++ rcu_cpu_stall_reset(); ++ touch_nmi_watchdog(); + +- if (console_trylock()) +- return 1; ++ if (text_len) ++ printk_delay(r.info->level); + +- printk_safe_enter_irqsave(flags); ++ return true; ++} + +- raw_spin_lock(&console_owner_lock); +- owner = READ_ONCE(console_owner); +- waiter = READ_ONCE(console_waiter); +- if (!waiter && owner && owner != current) { +- WRITE_ONCE(console_waiter, true); +- spin = true; +- } +- raw_spin_unlock(&console_owner_lock); ++static void print_sync_until(struct console *con, u64 seq) ++{ ++ unsigned int flags; ++ u64 printk_seq; + +- /* +- * If there is an active printk() writing to the +- * consoles, instead of having it write our data too, +- * see if we can offload that load from the active +- * printer, and do some printing ourselves. +- * Go into a spin only if there isn't already a waiter +- * spinning, and there is an active printer, and +- * that active printer isn't us (recursive printk?). +- */ +- if (!spin) { +- printk_safe_exit_irqrestore(flags); +- return 0; ++ console_atomic_lock(&flags); ++ for (;;) { ++ printk_seq = atomic64_read(&con->printk_seq); ++ if (printk_seq >= seq) ++ break; ++ if (!print_sync(con, &printk_seq)) ++ break; ++ atomic64_set(&con->printk_seq, printk_seq + 1); + } ++ console_atomic_unlock(flags); ++} + +- /* We spin waiting for the owner to release us */ +- spin_acquire(&console_owner_dep_map, 0, 0, _THIS_IP_); +- /* Owner will clear console_waiter on hand off */ +- while (READ_ONCE(console_waiter)) +- cpu_relax(); +- spin_release(&console_owner_dep_map, _THIS_IP_); ++#if defined(CONFIG_X86) || defined(CONFIG_ARM64_PSEUDO_NMI) ++void zap_locks(void) ++{ ++// if (raw_spin_is_locked(&logbuf_lock)) { ++// debug_locks_off(); ++// raw_spin_lock_init(&logbuf_lock); ++// } + +- printk_safe_exit_irqrestore(flags); +- /* +- * The owner passed the console lock to us. +- * Since we did not spin on console lock, annotate +- * this as a trylock. Otherwise lockdep will +- * complain. +- */ +- mutex_acquire(&console_lock_dep_map, 0, 1, _THIS_IP_); ++// if (raw_spin_is_locked(&console_owner_lock)) { ++// raw_spin_lock_init(&console_owner_lock); ++// } + +- return 1; ++// console_owner = NULL; ++// console_waiter = false; ++ ++// sema_init(&console_sem, 1); + } ++#endif + +-/* +- * Call the console drivers, asking them to write out +- * log_buf[start] to log_buf[end - 1]. +- * The console_lock must be held. +- */ +-static void call_console_drivers(const char *ext_text, size_t ext_len, +- const char *text, size_t len) +-{ +- static char dropped_text[64]; +- size_t dropped_len = 0; +- struct console *con; ++#ifdef CONFIG_PRINTK_NMI ++#define NUM_RECURSION_CTX 2 ++#else ++#define NUM_RECURSION_CTX 1 ++#endif + +- trace_console_rcuidle(text, len); ++struct printk_recursion { ++ char count[NUM_RECURSION_CTX]; ++}; + +- if (!console_drivers) +- return; ++static DEFINE_PER_CPU(struct printk_recursion, percpu_printk_recursion); ++static char printk_recursion_count[NUM_RECURSION_CTX]; + +- if (console_dropped) { +- dropped_len = snprintf(dropped_text, sizeof(dropped_text), +- "** %lu printk messages dropped **\n", +- console_dropped); +- console_dropped = 0; +- } ++static char *printk_recursion_counter(void) ++{ ++ struct printk_recursion *rec; ++ char *count; + +- for_each_console(con) { +- if (exclusive_console && con != exclusive_console) +- continue; +- if (!(con->flags & CON_ENABLED)) +- continue; +- if (!con->write) +- continue; +- if (!cpu_online(smp_processor_id()) && +- !(con->flags & CON_ANYTIME)) +- continue; +- if (con->flags & CON_EXTENDED) +- con->write(con, ext_text, ext_len); +- else { +- if (dropped_len) +- con->write(con, dropped_text, dropped_len); +- con->write(con, text, len); +- } ++ if (!printk_percpu_data_ready()) { ++ count = &printk_recursion_count[0]; ++ } else { ++ rec = this_cpu_ptr(&percpu_printk_recursion); ++ ++ count = &rec->count[0]; + } +-} + +-int printk_delay_msec __read_mostly; ++#ifdef CONFIG_PRINTK_NMI ++ if (in_nmi()) ++ count++; ++#endif ++ ++ return count; ++} + +-static inline void printk_delay(void) ++static bool printk_enter_irqsave(unsigned long *flags) + { +- if (unlikely(printk_delay_msec)) { +- int m = printk_delay_msec; ++ char *count; + +- while (m--) { +- mdelay(1); +- touch_nmi_watchdog(); +- } ++ local_irq_save(*flags); ++ count = printk_recursion_counter(); ++ /* Only 1 level of recursion allowed. */ ++ if (*count > 1) { ++ local_irq_restore(*flags); ++ return false; + } ++ (*count)++; ++ ++ return true; ++} ++ ++static void printk_exit_irqrestore(unsigned long flags) ++{ ++ char *count; ++ ++ count = printk_recursion_counter(); ++ (*count)--; ++ local_irq_restore(flags); + } + + static inline u32 printk_caller_id(void) +@@ -1954,144 +1897,248 @@ static inline u32 printk_caller_id(void) + 0x80000000 + raw_smp_processor_id(); + } + +-static size_t log_output(int facility, int level, enum log_flags lflags, +- const struct dev_printk_info *dev_info, +- char *text, size_t text_len) ++/** ++ * parse_prefix - Parse level and control flags. ++ * ++ * @text: The terminated text message. ++ * @level: A pointer to the current level value, will be updated. ++ * @lflags: A pointer to the current log flags, will be updated. ++ * ++ * @level may be NULL if the caller is not interested in the parsed value. ++ * Otherwise the variable pointed to by @level must be set to ++ * LOGLEVEL_DEFAULT in order to be updated with the parsed value. ++ * ++ * @lflags may be NULL if the caller is not interested in the parsed value. ++ * Otherwise the variable pointed to by @lflags will be OR'd with the parsed ++ * value. ++ * ++ * Return: The length of the parsed level and control flags. ++ */ ++static u16 parse_prefix(char *text, int *level, enum log_flags *lflags) + { +- const u32 caller_id = printk_caller_id(); ++ u16 prefix_len = 0; ++ int kern_level; + +- if (lflags & LOG_CONT) { +- struct prb_reserved_entry e; +- struct printk_record r; ++ while (*text) { ++ kern_level = printk_get_level(text); ++ if (!kern_level) ++ break; + +- prb_rec_init_wr(&r, text_len); +- if (prb_reserve_in_last(&e, prb, &r, caller_id, LOG_LINE_MAX)) { +- memcpy(&r.text_buf[r.info->text_len], text, text_len); +- r.info->text_len += text_len; +- if (lflags & LOG_NEWLINE) { +- r.info->flags |= LOG_NEWLINE; +- prb_final_commit(&e); +- } else { +- prb_commit(&e); +- } +- return text_len; ++ switch (kern_level) { ++ case '0' ... '7': ++ if (level && *level == LOGLEVEL_DEFAULT) ++ *level = kern_level - '0'; ++ break; ++ case 'c': /* KERN_CONT */ ++ if (lflags) ++ *lflags |= LOG_CONT; + } ++ ++ prefix_len += 2; ++ text += 2; + } + +- /* Store it in the record log */ +- return log_store(caller_id, facility, level, lflags, 0, +- dev_info, text, text_len); ++ return prefix_len; + } + +-/* Must be called under logbuf_lock. */ +-int vprintk_store(int facility, int level, +- const struct dev_printk_info *dev_info, +- const char *fmt, va_list args) ++static u16 printk_sprint(char *text, u16 size, int facility, enum log_flags *lflags, ++ const char *fmt, va_list args) + { +- static char textbuf[LOG_LINE_MAX]; +- char *text = textbuf; +- size_t text_len; +- enum log_flags lflags = 0; ++ u16 text_len; + +- /* +- * The printf needs to come first; we need the syslog +- * prefix which might be passed-in as a parameter. +- */ +- text_len = vscnprintf(text, sizeof(textbuf), fmt, args); ++ text_len = vscnprintf(text, size, fmt, args); + +- /* mark and strip a trailing newline */ +- if (text_len && text[text_len-1] == '\n') { ++ /* Mark and strip a trailing newline. */ ++ if (text_len && text[text_len - 1] == '\n') { + text_len--; +- lflags |= LOG_NEWLINE; ++ *lflags |= LOG_NEWLINE; + } + +- /* strip kernel syslog prefix and extract log level or control flags */ ++ /* Strip log level and control flags. */ + if (facility == 0) { +- int kern_level; +- +- while ((kern_level = printk_get_level(text)) != 0) { +- switch (kern_level) { +- case '0' ... '7': +- if (level == LOGLEVEL_DEFAULT) +- level = kern_level - '0'; +- break; +- case 'c': /* KERN_CONT */ +- lflags |= LOG_CONT; +- } ++ u16 prefix_len; + +- text_len -= 2; +- text += 2; ++ prefix_len = parse_prefix(text, NULL, NULL); ++ if (prefix_len) { ++ text_len -= prefix_len; ++ memmove(text, text + prefix_len, text_len); + } + } + +- if (level == LOGLEVEL_DEFAULT) +- level = default_message_loglevel; +- +- if (dev_info) +- lflags |= LOG_NEWLINE; +- +- return log_output(facility, level, lflags, dev_info, text, text_len); ++ return text_len; + } + +-asmlinkage int vprintk_emit(int facility, int level, ++__printf(4, 0) ++static int vprintk_store(int facility, int level, ++ const struct dev_printk_info *dev_info, ++ const char *fmt, va_list args) ++{ ++ const u32 caller_id = printk_caller_id(); ++ struct prb_reserved_entry e; ++ enum log_flags lflags = 0; ++ bool final_commit = false; ++ struct printk_record r; ++ unsigned long irqflags; ++ u16 trunc_msg_len = 0; ++ char prefix_buf[8]; ++ u16 reserve_size; ++ va_list args2; ++ u16 text_len; ++ int ret = 0; ++ u64 ts_nsec; ++ u64 seq; ++ ++ /* ++ * Since the duration of printk() can vary depending on the message ++ * and state of the ringbuffer, grab the timestamp now so that it is ++ * close to the call of printk(). This provides a more deterministic ++ * timestamp with respect to the caller. ++ */ ++ ts_nsec = local_clock(); ++ ++ if (!printk_enter_irqsave(&irqflags)) ++ return 0; ++ ++ /* ++ * The sprintf needs to come first since the syslog prefix might be ++ * passed in as a parameter. An extra byte must be reserved so that ++ * later the vscnprintf() into the reserved buffer has room for the ++ * terminating '\0', which is not counted by vsnprintf(). ++ */ ++ va_copy(args2, args); ++ reserve_size = vsnprintf(&prefix_buf[0], sizeof(prefix_buf), fmt, args2) + 1; ++ va_end(args2); ++ ++ if (reserve_size > LOG_LINE_MAX) ++ reserve_size = LOG_LINE_MAX; ++ ++ /* Extract log level or control flags. */ ++ if (facility == 0) ++ parse_prefix(&prefix_buf[0], &level, &lflags); ++ ++ if (level == LOGLEVEL_DEFAULT) ++ level = default_message_loglevel; ++ ++ if (dev_info) ++ lflags |= LOG_NEWLINE; ++ ++ if (lflags & LOG_CONT) { ++ prb_rec_init_wr(&r, reserve_size); ++ if (prb_reserve_in_last(&e, prb, &r, caller_id, LOG_LINE_MAX)) { ++ seq = r.info->seq; ++ text_len = printk_sprint(&r.text_buf[r.info->text_len], reserve_size, ++ facility, &lflags, fmt, args); ++ r.info->text_len += text_len; ++ ++ if (lflags & LOG_NEWLINE) { ++ r.info->flags |= LOG_NEWLINE; ++ prb_final_commit(&e); ++ final_commit = true; ++ } else { ++ prb_commit(&e); ++ } ++ ++ ret = text_len; ++ goto out; ++ } ++ } ++ ++ /* ++ * Explicitly initialize the record before every prb_reserve() call. ++ * prb_reserve_in_last() and prb_reserve() purposely invalidate the ++ * structure when they fail. ++ */ ++ prb_rec_init_wr(&r, reserve_size); ++ if (!prb_reserve(&e, prb, &r)) { ++ /* truncate the message if it is too long for empty buffer */ ++ truncate_msg(&reserve_size, &trunc_msg_len); ++ ++ prb_rec_init_wr(&r, reserve_size + trunc_msg_len); ++ if (!prb_reserve(&e, prb, &r)) ++ goto out; ++ } ++ ++ seq = r.info->seq; ++ ++ /* fill message */ ++ text_len = printk_sprint(&r.text_buf[0], reserve_size, facility, &lflags, fmt, args); ++ if (trunc_msg_len) ++ memcpy(&r.text_buf[text_len], trunc_msg, trunc_msg_len); ++ r.info->text_len = text_len + trunc_msg_len; ++ r.info->facility = facility; ++ r.info->level = level & 7; ++ r.info->flags = lflags & 0x1f; ++ r.info->ts_nsec = ts_nsec; ++ r.info->caller_id = caller_id; ++ if (dev_info) ++ memcpy(&r.info->dev_info, dev_info, sizeof(r.info->dev_info)); ++ ++ /* A message without a trailing newline can be continued. */ ++ if (!(lflags & LOG_NEWLINE)) { ++ prb_commit(&e); ++ } else { ++ prb_final_commit(&e); ++ final_commit = true; ++ } ++ ++ ret = text_len + trunc_msg_len; ++out: ++ /* only the kernel may perform synchronous printing */ ++ if (facility == 0 && final_commit) { ++ struct console *con; ++ ++ for_each_console(con) { ++ if (console_can_sync(con)) ++ print_sync_until(con, seq + 1); ++ } ++ } ++ ++ printk_exit_irqrestore(irqflags); ++ return ret; ++} ++ ++asmlinkage int vprintk_emit(int facility, int level, + const struct dev_printk_info *dev_info, + const char *fmt, va_list args) + { + int printed_len; +- bool in_sched = false; +- unsigned long flags; + + /* Suppress unimportant messages after panic happens */ + if (unlikely(suppress_printk)) + return 0; + +- if (level == LOGLEVEL_SCHED) { ++ if (level == LOGLEVEL_SCHED) + level = LOGLEVEL_DEFAULT; +- in_sched = true; +- } +- +- boot_delay_msec(level); +- printk_delay(); + +- /* This stops the holder of console_sem just where we want him */ +- logbuf_lock_irqsave(flags); + printed_len = vprintk_store(facility, level, dev_info, fmt, args); +- logbuf_unlock_irqrestore(flags); +- +- /* If called from the scheduler, we can not call up(). */ +- if (!in_sched) { +- /* +- * Disable preemption to avoid being preempted while holding +- * console_sem which would prevent anyone from printing to +- * console +- */ +- preempt_disable(); +- /* +- * Try to acquire and then immediately release the console +- * semaphore. The release will print out buffers and wake up +- * /dev/kmsg and syslog() users. +- */ +- if (console_trylock_spinning()) +- console_unlock(); +- preempt_enable(); +- } + + wake_up_klogd(); + return printed_len; + } + EXPORT_SYMBOL(vprintk_emit); + +-asmlinkage int vprintk(const char *fmt, va_list args) ++__printf(1, 0) ++static int vprintk_default(const char *fmt, va_list args) + { +- return vprintk_func(fmt, args); ++ return vprintk_emit(0, LOGLEVEL_DEFAULT, NULL, fmt, args); + } +-EXPORT_SYMBOL(vprintk); + +-int vprintk_default(const char *fmt, va_list args) ++__printf(1, 0) ++static int vprintk_func(const char *fmt, va_list args) + { +- return vprintk_emit(0, LOGLEVEL_DEFAULT, NULL, fmt, args); ++#ifdef CONFIG_KGDB_KDB ++ /* Allow to pass printk() to kdb but avoid a recursion. */ ++ if (unlikely(kdb_trap_printk && kdb_printf_cpu < 0)) ++ return vkdb_printf(KDB_MSGSRC_PRINTK, fmt, args); ++#endif ++ return vprintk_default(fmt, args); + } +-EXPORT_SYMBOL_GPL(vprintk_default); ++ ++asmlinkage int vprintk(const char *fmt, va_list args) ++{ ++ return vprintk_func(fmt, args); ++} ++EXPORT_SYMBOL(vprintk); + + /** + * printk - print a kernel message +@@ -2127,38 +2174,158 @@ asmlinkage __visible int printk(const char *fmt, ...) + } + EXPORT_SYMBOL(printk); + +-#else /* CONFIG_PRINTK */ ++static int printk_kthread_func(void *data) ++{ ++ struct console *con = data; ++ unsigned long dropped = 0; ++ char *dropped_text = NULL; ++ struct printk_info info; ++ struct printk_record r; ++ char *ext_text = NULL; ++ size_t dropped_len; ++ int ret = -ENOMEM; ++ char *text = NULL; ++ char *write_text; ++ u64 printk_seq; ++ size_t len; ++ int error; ++ u64 seq; + +-#define LOG_LINE_MAX 0 +-#define PREFIX_MAX 0 +-#define printk_time false ++ if (con->flags & CON_EXTENDED) { ++ ext_text = kmalloc(CONSOLE_EXT_LOG_MAX, GFP_KERNEL); ++ if (!ext_text) ++ goto out; ++ } ++ text = kmalloc(LOG_LINE_MAX + PREFIX_MAX, GFP_KERNEL); ++ dropped_text = kmalloc(64, GFP_KERNEL); ++ if (!text || !dropped_text) ++ goto out; + +-#define prb_read_valid(rb, seq, r) false +-#define prb_first_valid_seq(rb) 0 ++ if (con->flags & CON_EXTENDED) ++ write_text = ext_text; ++ else ++ write_text = text; + +-static u64 syslog_seq; +-static u64 console_seq; +-static u64 exclusive_console_stop_seq; +-static unsigned long console_dropped; ++ seq = atomic64_read(&con->printk_seq); ++ ++ prb_rec_init_rd(&r, &info, text, LOG_LINE_MAX + PREFIX_MAX); ++ ++ for (;;) { ++ error = wait_event_interruptible(log_wait, ++ prb_read_valid(prb, seq, &r) || kthread_should_stop()); ++ ++ if (kthread_should_stop()) ++ break; + +-static size_t record_print_text(const struct printk_record *r, +- bool syslog, bool time) ++ if (error) ++ continue; ++ ++ if (seq != r.info->seq) { ++ dropped += r.info->seq - seq; ++ seq = r.info->seq; ++ } ++ ++ seq++; ++ ++ if (!(con->flags & CON_ENABLED)) ++ continue; ++ ++ if (suppress_message_printing(r.info->level)) ++ continue; ++ ++ if (con->flags & CON_EXTENDED) { ++ len = info_print_ext_header(ext_text, ++ CONSOLE_EXT_LOG_MAX, ++ r.info); ++ len += msg_print_ext_body(ext_text + len, ++ CONSOLE_EXT_LOG_MAX - len, ++ &r.text_buf[0], r.info->text_len, ++ &r.info->dev_info); ++ } else { ++ len = record_print_text(&r, ++ console_msg_format & MSG_FORMAT_SYSLOG, ++ printk_time); ++ } ++ ++ printk_seq = atomic64_read(&con->printk_seq); ++ ++ console_lock(); ++ console_may_schedule = 0; ++ ++ if (kernel_sync_mode() && con->write_atomic) { ++ console_unlock(); ++ break; ++ } ++ ++ if (!(con->flags & CON_EXTENDED) && dropped) { ++ dropped_len = snprintf(dropped_text, 64, ++ "** %lu printk messages dropped **\n", ++ dropped); ++ dropped = 0; ++ ++ con->write(con, dropped_text, dropped_len); ++ printk_delay(r.info->level); ++ } ++ ++ con->write(con, write_text, len); ++ if (len) ++ printk_delay(r.info->level); ++ ++ atomic64_cmpxchg_relaxed(&con->printk_seq, printk_seq, seq); ++ ++ console_unlock(); ++ } ++out: ++ kfree(dropped_text); ++ kfree(text); ++ kfree(ext_text); ++ pr_info("%sconsole [%s%d]: printing thread stopped\n", ++ (con->flags & CON_BOOT) ? "boot" : "", ++ con->name, con->index); ++ return ret; ++} ++ ++/* Must be called within console_lock(). */ ++static void start_printk_kthread(struct console *con) + { +- return 0; ++ con->thread = kthread_run(printk_kthread_func, con, ++ "pr/%s%d", con->name, con->index); ++ if (IS_ERR(con->thread)) { ++ pr_err("%sconsole [%s%d]: unable to start printing thread\n", ++ (con->flags & CON_BOOT) ? "boot" : "", ++ con->name, con->index); ++ return; ++ } ++ pr_info("%sconsole [%s%d]: printing thread started\n", ++ (con->flags & CON_BOOT) ? "boot" : "", ++ con->name, con->index); + } +-static ssize_t info_print_ext_header(char *buf, size_t size, +- struct printk_info *info) ++ ++/* protected by console_lock */ ++static bool kthreads_started; ++ ++/* Must be called within console_lock(). */ ++static void console_try_thread(struct console *con) + { +- return 0; ++ if (kthreads_started) { ++ start_printk_kthread(con); ++ return; ++ } ++ ++ /* ++ * The printing threads have not been started yet. If this console ++ * can print synchronously, print all unprinted messages. ++ */ ++ if (console_can_sync(con)) ++ print_sync_until(con, prb_next_seq(prb)); + } +-static ssize_t msg_print_ext_body(char *buf, size_t size, +- char *text, size_t text_len, +- struct dev_printk_info *dev_info) { return 0; } +-static void console_lock_spinning_enable(void) { } +-static int console_lock_spinning_disable_and_check(void) { return 0; } +-static void call_console_drivers(const char *ext_text, size_t ext_len, +- const char *text, size_t len) {} +-static bool suppress_message_printing(int level) { return false; } ++ ++#else /* CONFIG_PRINTK */ ++ ++#define prb_first_valid_seq(rb) 0 ++#define prb_next_seq(rb) 0 ++ ++#define console_try_thread(con) + + #endif /* CONFIG_PRINTK */ + +@@ -2403,34 +2570,6 @@ int is_console_locked(void) + } + EXPORT_SYMBOL(is_console_locked); + +-/* +- * Check if we have any console that is capable of printing while cpu is +- * booting or shutting down. Requires console_sem. +- */ +-static int have_callable_console(void) +-{ +- struct console *con; +- +- for_each_console(con) +- if ((con->flags & CON_ENABLED) && +- (con->flags & CON_ANYTIME)) +- return 1; +- +- return 0; +-} +- +-/* +- * Can we actually use the console at this time on this cpu? +- * +- * Console drivers may assume that per-cpu resources have been allocated. So +- * unless they're explicitly marked as being able to cope (CON_ANYTIME) don't +- * call them until this CPU is officially up. +- */ +-static inline int can_use_console(void) +-{ +- return cpu_online(raw_smp_processor_id()) || have_callable_console(); +-} +- + /** + * console_unlock - unlock the console system + * +@@ -2447,142 +2586,14 @@ static inline int can_use_console(void) + */ + void console_unlock(void) + { +- static char ext_text[CONSOLE_EXT_LOG_MAX]; +- static char text[LOG_LINE_MAX + PREFIX_MAX]; +- unsigned long flags; +- bool do_cond_resched, retry; +- struct printk_info info; +- struct printk_record r; +- + if (console_suspended) { + up_console_sem(); + return; + } + +- prb_rec_init_rd(&r, &info, text, sizeof(text)); +- +- /* +- * Console drivers are called with interrupts disabled, so +- * @console_may_schedule should be cleared before; however, we may +- * end up dumping a lot of lines, for example, if called from +- * console registration path, and should invoke cond_resched() +- * between lines if allowable. Not doing so can cause a very long +- * scheduling stall on a slow console leading to RCU stall and +- * softlockup warnings which exacerbate the issue with more +- * messages practically incapacitating the system. +- * +- * console_trylock() is not able to detect the preemptive +- * context reliably. Therefore the value must be stored before +- * and cleared after the "again" goto label. +- */ +- do_cond_resched = console_may_schedule; +-again: +- console_may_schedule = 0; +- +- /* +- * We released the console_sem lock, so we need to recheck if +- * cpu is online and (if not) is there at least one CON_ANYTIME +- * console. +- */ +- if (!can_use_console()) { +- console_locked = 0; +- up_console_sem(); +- return; +- } +- +- for (;;) { +- size_t ext_len = 0; +- size_t len; +- +- printk_safe_enter_irqsave(flags); +- raw_spin_lock(&logbuf_lock); +-skip: +- if (!prb_read_valid(prb, console_seq, &r)) +- break; +- +- if (console_seq != r.info->seq) { +- console_dropped += r.info->seq - console_seq; +- console_seq = r.info->seq; +- } +- +- if (suppress_message_printing(r.info->level)) { +- /* +- * Skip record we have buffered and already printed +- * directly to the console when we received it, and +- * record that has level above the console loglevel. +- */ +- console_seq++; +- goto skip; +- } +- +- /* Output to all consoles once old messages replayed. */ +- if (unlikely(exclusive_console && +- console_seq >= exclusive_console_stop_seq)) { +- exclusive_console = NULL; +- } +- +- /* +- * Handle extended console text first because later +- * record_print_text() will modify the record buffer in-place. +- */ +- if (nr_ext_console_drivers) { +- ext_len = info_print_ext_header(ext_text, +- sizeof(ext_text), +- r.info); +- ext_len += msg_print_ext_body(ext_text + ext_len, +- sizeof(ext_text) - ext_len, +- &r.text_buf[0], +- r.info->text_len, +- &r.info->dev_info); +- } +- len = record_print_text(&r, +- console_msg_format & MSG_FORMAT_SYSLOG, +- printk_time); +- console_seq++; +- raw_spin_unlock(&logbuf_lock); +- +- /* +- * While actively printing out messages, if another printk() +- * were to occur on another CPU, it may wait for this one to +- * finish. This task can not be preempted if there is a +- * waiter waiting to take over. +- */ +- console_lock_spinning_enable(); +- +- stop_critical_timings(); /* don't trace print latency */ +- call_console_drivers(ext_text, ext_len, text, len); +- start_critical_timings(); +- +- if (console_lock_spinning_disable_and_check()) { +- printk_safe_exit_irqrestore(flags); +- return; +- } +- +- printk_safe_exit_irqrestore(flags); +- +- if (do_cond_resched) +- cond_resched(); +- } +- + console_locked = 0; + +- raw_spin_unlock(&logbuf_lock); +- + up_console_sem(); +- +- /* +- * Someone could have filled up the buffer again, so re-check if there's +- * something to flush. In case we cannot trylock the console_sem again, +- * there's a new owner and the console_unlock() from them will do the +- * flush, no worries. +- */ +- raw_spin_lock(&logbuf_lock); +- retry = prb_read_valid(prb, console_seq, NULL); +- raw_spin_unlock(&logbuf_lock); +- printk_safe_exit_irqrestore(flags); +- +- if (retry && console_trylock()) +- goto again; + } + EXPORT_SYMBOL(console_unlock); + +@@ -2632,23 +2643,20 @@ void console_unblank(void) + */ + void console_flush_on_panic(enum con_flush_mode mode) + { +- /* +- * If someone else is holding the console lock, trylock will fail +- * and may_schedule may be set. Ignore and proceed to unlock so +- * that messages are flushed out. As this can be called from any +- * context and we don't want to get preempted while flushing, +- * ensure may_schedule is cleared. +- */ +- console_trylock(); ++ struct console *c; ++ u64 seq; ++ ++ if (!console_trylock()) ++ return; ++ + console_may_schedule = 0; + +- if (mode == CONSOLE_REPLAY_ALL) { +- unsigned long flags; ++ if (mode == CONSOLE_REPLAY_ALL) { ++ seq = prb_first_valid_seq(prb); ++ for_each_console(c) ++ atomic64_set(&c->printk_seq, seq); ++ } + +- logbuf_lock_irqsave(flags); +- console_seq = prb_first_valid_seq(prb); +- logbuf_unlock_irqrestore(flags); +- } + console_unlock(); + } + EXPORT_SYMBOL(console_flush_on_panic); +@@ -2784,7 +2792,6 @@ static int try_enable_new_console(struct console *newcon, bool user_specified) + */ + void register_console(struct console *newcon) + { +- unsigned long flags; + struct console *bcon = NULL; + int err; + +@@ -2808,6 +2815,8 @@ void register_console(struct console *newcon) + } + } + ++ newcon->thread = NULL; ++ + if (console_drivers && console_drivers->flags & CON_BOOT) + bcon = console_drivers; + +@@ -2849,8 +2858,10 @@ void register_console(struct console *newcon) + * the real console are the same physical device, it's annoying to + * see the beginning boot messages twice + */ +- if (bcon && ((newcon->flags & (CON_CONSDEV | CON_BOOT)) == CON_CONSDEV)) ++ if (bcon && ((newcon->flags & (CON_CONSDEV | CON_BOOT)) == CON_CONSDEV)) { + newcon->flags &= ~CON_PRINTBUFFER; ++ newcon->flags |= CON_HANDOVER; ++ } + + /* + * Put this console in the list - keep the +@@ -2872,26 +2883,12 @@ void register_console(struct console *newcon) + if (newcon->flags & CON_EXTENDED) + nr_ext_console_drivers++; + +- if (newcon->flags & CON_PRINTBUFFER) { +- /* +- * console_unlock(); will print out the buffered messages +- * for us. +- */ +- logbuf_lock_irqsave(flags); +- /* +- * We're about to replay the log buffer. Only do this to the +- * just-registered console to avoid excessive message spam to +- * the already-registered consoles. +- * +- * Set exclusive_console with disabled interrupts to reduce +- * race window with eventual console_flush_on_panic() that +- * ignores console_lock. +- */ +- exclusive_console = newcon; +- exclusive_console_stop_seq = console_seq; +- console_seq = syslog_seq; +- logbuf_unlock_irqrestore(flags); +- } ++ if (newcon->flags & CON_PRINTBUFFER) ++ atomic64_set(&newcon->printk_seq, 0); ++ else ++ atomic64_set(&newcon->printk_seq, prb_next_seq(prb)); ++ ++ console_try_thread(newcon); + console_unlock(); + console_sysfs_notify(); + +@@ -2965,6 +2962,9 @@ int unregister_console(struct console *console) + console_unlock(); + console_sysfs_notify(); + ++ if (console->thread && !IS_ERR(console->thread)) ++ kthread_stop(console->thread); ++ + if (console->exit) + res = console->exit(console); + +@@ -3047,6 +3047,15 @@ static int __init printk_late_init(void) + unregister_console(con); + } + } ++ ++#ifdef CONFIG_PRINTK ++ console_lock(); ++ for_each_console(con) ++ start_printk_kthread(con); ++ kthreads_started = true; ++ console_unlock(); ++#endif ++ + ret = cpuhp_setup_state_nocalls(CPUHP_PRINTK_DEAD, "printk:dead", NULL, + console_cpu_notify); + WARN_ON(ret < 0); +@@ -3062,7 +3071,6 @@ late_initcall(printk_late_init); + * Delayed printk version, for scheduler-internal messages: + */ + #define PRINTK_PENDING_WAKEUP 0x01 +-#define PRINTK_PENDING_OUTPUT 0x02 + + static DEFINE_PER_CPU(int, printk_pending); + +@@ -3070,14 +3078,8 @@ static void wake_up_klogd_work_func(struct irq_work *irq_work) + { + int pending = __this_cpu_xchg(printk_pending, 0); + +- if (pending & PRINTK_PENDING_OUTPUT) { +- /* If trylock fails, someone else is doing the printing */ +- if (console_trylock()) +- console_unlock(); +- } +- + if (pending & PRINTK_PENDING_WAKEUP) +- wake_up_interruptible(&log_wait); ++ wake_up_interruptible_all(&log_wait); + } + + static DEFINE_PER_CPU(struct irq_work, wake_up_klogd_work) = +@@ -3096,25 +3098,10 @@ void wake_up_klogd(void) + preempt_enable(); + } + +-void defer_console_output(void) ++__printf(1, 0) ++static int vprintk_deferred(const char *fmt, va_list args) + { +- if (!printk_percpu_data_ready()) +- return; +- +- preempt_disable(); +- __this_cpu_or(printk_pending, PRINTK_PENDING_OUTPUT); +- irq_work_queue(this_cpu_ptr(&wake_up_klogd_work)); +- preempt_enable(); +-} +- +-int vprintk_deferred(const char *fmt, va_list args) +-{ +- int r; +- +- r = vprintk_emit(0, LOGLEVEL_SCHED, NULL, fmt, args); +- defer_console_output(); +- +- return r; ++ return vprintk_emit(0, LOGLEVEL_DEFAULT, NULL, fmt, args); + } + + int printk_deferred(const char *fmt, ...) +@@ -3253,8 +3240,26 @@ EXPORT_SYMBOL_GPL(kmsg_dump_reason_str); + */ + void kmsg_dump(enum kmsg_dump_reason reason) + { ++ struct kmsg_dumper_iter iter; + struct kmsg_dumper *dumper; +- unsigned long flags; ++ ++ if (!oops_in_progress) { ++ /* ++ * If atomic consoles are available, activate kernel sync mode ++ * to make sure any final messages are visible. The trailing ++ * printk message is important to flush any pending messages. ++ */ ++ if (have_atomic_console()) { ++ sync_mode = true; ++ pr_info("enabled sync mode\n"); ++ } ++ ++ /* ++ * Give the printing threads time to flush, allowing up to ++ * 1s of no printing forward progress before giving up. ++ */ ++ pr_flush(1000, true); ++ } + + rcu_read_lock(); + list_for_each_entry_rcu(dumper, &dump_list, list) { +@@ -3272,25 +3277,18 @@ void kmsg_dump(enum kmsg_dump_reason reason) + continue; + + /* initialize iterator with data about the stored records */ +- dumper->active = true; +- +- logbuf_lock_irqsave(flags); +- dumper->cur_seq = clear_seq; +- dumper->next_seq = prb_next_seq(prb); +- logbuf_unlock_irqrestore(flags); ++ iter.active = true; ++ kmsg_dump_rewind(&iter); + + /* invoke dumper which will iterate over records */ +- dumper->dump(dumper, reason); +- +- /* reset iterator */ +- dumper->active = false; ++ dumper->dump(dumper, reason, &iter); + } + rcu_read_unlock(); + } + + /** +- * kmsg_dump_get_line_nolock - retrieve one kmsg log line (unlocked version) +- * @dumper: registered kmsg dumper ++ * kmsg_dump_get_line - retrieve one kmsg log line ++ * @iter: kmsg dumper iterator + * @syslog: include the "<4>" prefixes + * @line: buffer to copy the line to + * @size: maximum size of the buffer +@@ -3304,11 +3302,9 @@ void kmsg_dump(enum kmsg_dump_reason reason) + * + * A return value of FALSE indicates that there are no more records to + * read. +- * +- * The function is similar to kmsg_dump_get_line(), but grabs no locks. + */ +-bool kmsg_dump_get_line_nolock(struct kmsg_dumper *dumper, bool syslog, +- char *line, size_t size, size_t *len) ++bool kmsg_dump_get_line(struct kmsg_dumper_iter *iter, bool syslog, ++ char *line, size_t size, size_t *len) + { + struct printk_info info; + unsigned int line_count; +@@ -3318,16 +3314,16 @@ bool kmsg_dump_get_line_nolock(struct kmsg_dumper *dumper, bool syslog, + + prb_rec_init_rd(&r, &info, line, size); + +- if (!dumper->active) ++ if (!iter->active) + goto out; + + /* Read text or count text lines? */ + if (line) { +- if (!prb_read_valid(prb, dumper->cur_seq, &r)) ++ if (!prb_read_valid(prb, iter->cur_seq, &r)) + goto out; + l = record_print_text(&r, syslog, printk_time); + } else { +- if (!prb_read_valid_info(prb, dumper->cur_seq, ++ if (!prb_read_valid_info(prb, iter->cur_seq, + &info, &line_count)) { + goto out; + } +@@ -3336,48 +3332,18 @@ bool kmsg_dump_get_line_nolock(struct kmsg_dumper *dumper, bool syslog, + + } + +- dumper->cur_seq = r.info->seq + 1; ++ iter->cur_seq = r.info->seq + 1; + ret = true; + out: + if (len) + *len = l; + return ret; + } +- +-/** +- * kmsg_dump_get_line - retrieve one kmsg log line +- * @dumper: registered kmsg dumper +- * @syslog: include the "<4>" prefixes +- * @line: buffer to copy the line to +- * @size: maximum size of the buffer +- * @len: length of line placed into buffer +- * +- * Start at the beginning of the kmsg buffer, with the oldest kmsg +- * record, and copy one record into the provided buffer. +- * +- * Consecutive calls will return the next available record moving +- * towards the end of the buffer with the youngest messages. +- * +- * A return value of FALSE indicates that there are no more records to +- * read. +- */ +-bool kmsg_dump_get_line(struct kmsg_dumper *dumper, bool syslog, +- char *line, size_t size, size_t *len) +-{ +- unsigned long flags; +- bool ret; +- +- logbuf_lock_irqsave(flags); +- ret = kmsg_dump_get_line_nolock(dumper, syslog, line, size, len); +- logbuf_unlock_irqrestore(flags); +- +- return ret; +-} + EXPORT_SYMBOL_GPL(kmsg_dump_get_line); + + /** + * kmsg_dump_get_buffer - copy kmsg log lines +- * @dumper: registered kmsg dumper ++ * @iter: kmsg dumper iterator + * @syslog: include the "<4>" prefixes + * @buf: buffer to copy the line to + * @size: maximum size of the buffer +@@ -3394,116 +3360,256 @@ EXPORT_SYMBOL_GPL(kmsg_dump_get_line); + * A return value of FALSE indicates that there are no more records to + * read. + */ +-bool kmsg_dump_get_buffer(struct kmsg_dumper *dumper, bool syslog, +- char *buf, size_t size, size_t *len) ++bool kmsg_dump_get_buffer(struct kmsg_dumper_iter *iter, bool syslog, ++ char *buf, size_t size, size_t *len_out) + { + struct printk_info info; +- unsigned int line_count; + struct printk_record r; +- unsigned long flags; + u64 seq; + u64 next_seq; +- size_t l = 0; ++ size_t len = 0; + bool ret = false; + bool time = printk_time; + +- prb_rec_init_rd(&r, &info, buf, size); +- +- if (!dumper->active || !buf || !size) ++ if (!iter->active || !buf || !size) + goto out; + +- logbuf_lock_irqsave(flags); +- if (prb_read_valid_info(prb, dumper->cur_seq, &info, NULL)) { +- if (info.seq != dumper->cur_seq) { ++ if (prb_read_valid_info(prb, iter->cur_seq, &info, NULL)) { ++ if (info.seq != iter->cur_seq) { + /* messages are gone, move to first available one */ +- dumper->cur_seq = info.seq; ++ iter->cur_seq = info.seq; + } + } + + /* last entry */ +- if (dumper->cur_seq >= dumper->next_seq) { +- logbuf_unlock_irqrestore(flags); ++ if (iter->cur_seq >= iter->next_seq) + goto out; +- } + +- /* calculate length of entire buffer */ +- seq = dumper->cur_seq; +- while (prb_read_valid_info(prb, seq, &info, &line_count)) { +- if (r.info->seq >= dumper->next_seq) +- break; +- l += get_record_print_text_size(&info, line_count, syslog, time); +- seq = r.info->seq + 1; +- } +- +- /* move first record forward until length fits into the buffer */ +- seq = dumper->cur_seq; +- while (l >= size && prb_read_valid_info(prb, seq, +- &info, &line_count)) { +- if (r.info->seq >= dumper->next_seq) +- break; +- l -= get_record_print_text_size(&info, line_count, syslog, time); +- seq = r.info->seq + 1; +- } ++ /* ++ * Find first record that fits, including all following records, ++ * into the user-provided buffer for this dump. Pass in size-1 ++ * because this function (by way of record_print_text()) will ++ * not write more than size-1 bytes of text into @buf. ++ */ ++ seq = find_first_fitting_seq(iter->cur_seq, iter->next_seq, ++ size - 1, syslog, time); + +- /* last message in next interation */ ++ /* ++ * Next kmsg_dump_get_buffer() invocation will dump block of ++ * older records stored right before this one. ++ */ + next_seq = seq; + +- /* actually read text into the buffer now */ +- l = 0; +- while (prb_read_valid(prb, seq, &r)) { +- if (r.info->seq >= dumper->next_seq) +- break; ++ prb_rec_init_rd(&r, &info, buf, size); + +- l += record_print_text(&r, syslog, time); ++ len = 0; ++ prb_for_each_record(seq, prb, seq, &r) { ++ if (r.info->seq >= iter->next_seq) ++ break; + +- /* adjust record to store to remaining buffer space */ +- prb_rec_init_rd(&r, &info, buf + l, size - l); ++ len += record_print_text(&r, syslog, time); + +- seq = r.info->seq + 1; ++ /* Adjust record to store to remaining buffer space. */ ++ prb_rec_init_rd(&r, &info, buf + len, size - len); + } + +- dumper->next_seq = next_seq; ++ iter->next_seq = next_seq; + ret = true; +- logbuf_unlock_irqrestore(flags); + out: +- if (len) +- *len = l; ++ if (len_out) ++ *len_out = len; + return ret; + } + EXPORT_SYMBOL_GPL(kmsg_dump_get_buffer); + + /** +- * kmsg_dump_rewind_nolock - reset the iterator (unlocked version) +- * @dumper: registered kmsg dumper ++ * kmsg_dump_rewind - reset the iterator ++ * @iter: kmsg dumper iterator + * + * Reset the dumper's iterator so that kmsg_dump_get_line() and + * kmsg_dump_get_buffer() can be called again and used multiple + * times within the same dumper.dump() callback. ++ */ ++void kmsg_dump_rewind(struct kmsg_dumper_iter *iter) ++{ ++ iter->cur_seq = latched_seq_read_nolock(&clear_seq); ++ iter->next_seq = prb_next_seq(prb); ++} ++EXPORT_SYMBOL_GPL(kmsg_dump_rewind); ++ ++#endif ++ ++struct prb_cpulock { ++ atomic_t owner; ++ unsigned long __percpu *irqflags; ++}; ++ ++#define DECLARE_STATIC_PRINTKRB_CPULOCK(name) \ ++static DEFINE_PER_CPU(unsigned long, _##name##_percpu_irqflags); \ ++static struct prb_cpulock name = { \ ++ .owner = ATOMIC_INIT(-1), \ ++ .irqflags = &_##name##_percpu_irqflags, \ ++} ++ ++static bool __prb_trylock(struct prb_cpulock *cpu_lock, ++ unsigned int *cpu_store) ++{ ++ unsigned long *flags; ++ unsigned int cpu; ++ ++ cpu = get_cpu(); ++ ++ *cpu_store = atomic_read(&cpu_lock->owner); ++ /* memory barrier to ensure the current lock owner is visible */ ++ smp_rmb(); ++ if (*cpu_store == -1) { ++ flags = per_cpu_ptr(cpu_lock->irqflags, cpu); ++ local_irq_save(*flags); ++ if (atomic_try_cmpxchg_acquire(&cpu_lock->owner, ++ cpu_store, cpu)) { ++ return true; ++ } ++ local_irq_restore(*flags); ++ } else if (*cpu_store == cpu) { ++ return true; ++ } ++ ++ put_cpu(); ++ return false; ++} ++ ++/* ++ * prb_lock: Perform a processor-reentrant spin lock. ++ * @cpu_lock: A pointer to the lock object. ++ * @cpu_store: A "flags" pointer to store lock status information. ++ * ++ * If no processor has the lock, the calling processor takes the lock and ++ * becomes the owner. If the calling processor is already the owner of the ++ * lock, this function succeeds immediately. If lock is locked by another ++ * processor, this function spins until the calling processor becomes the ++ * owner. + * +- * The function is similar to kmsg_dump_rewind(), but grabs no locks. ++ * It is safe to call this function from any context and state. + */ +-void kmsg_dump_rewind_nolock(struct kmsg_dumper *dumper) ++static void prb_lock(struct prb_cpulock *cpu_lock, unsigned int *cpu_store) + { +- dumper->cur_seq = clear_seq; +- dumper->next_seq = prb_next_seq(prb); ++ for (;;) { ++ if (__prb_trylock(cpu_lock, cpu_store)) ++ break; ++ cpu_relax(); ++ } + } + +-/** +- * kmsg_dump_rewind - reset the iterator +- * @dumper: registered kmsg dumper ++/* ++ * prb_unlock: Perform a processor-reentrant spin unlock. ++ * @cpu_lock: A pointer to the lock object. ++ * @cpu_store: A "flags" object storing lock status information. + * +- * Reset the dumper's iterator so that kmsg_dump_get_line() and +- * kmsg_dump_get_buffer() can be called again and used multiple +- * times within the same dumper.dump() callback. ++ * Release the lock. The calling processor must be the owner of the lock. ++ * ++ * It is safe to call this function from any context and state. + */ +-void kmsg_dump_rewind(struct kmsg_dumper *dumper) ++static void prb_unlock(struct prb_cpulock *cpu_lock, unsigned int cpu_store) + { +- unsigned long flags; ++ unsigned long *flags; ++ unsigned int cpu; ++ ++ cpu = atomic_read(&cpu_lock->owner); ++ atomic_set_release(&cpu_lock->owner, cpu_store); ++ ++ if (cpu_store == -1) { ++ flags = per_cpu_ptr(cpu_lock->irqflags, cpu); ++ local_irq_restore(*flags); ++ } + +- logbuf_lock_irqsave(flags); +- kmsg_dump_rewind_nolock(dumper); +- logbuf_unlock_irqrestore(flags); ++ put_cpu(); + } +-EXPORT_SYMBOL_GPL(kmsg_dump_rewind); + +-#endif ++DECLARE_STATIC_PRINTKRB_CPULOCK(printk_cpulock); ++ ++void console_atomic_lock(unsigned int *flags) ++{ ++ prb_lock(&printk_cpulock, flags); ++} ++EXPORT_SYMBOL(console_atomic_lock); ++ ++void console_atomic_unlock(unsigned int flags) ++{ ++ prb_unlock(&printk_cpulock, flags); ++} ++EXPORT_SYMBOL(console_atomic_unlock); ++ ++static void pr_msleep(bool may_sleep, int ms) ++{ ++ if (may_sleep) { ++ msleep(ms); ++ } else { ++ while (ms--) ++ udelay(1000); ++ } ++} ++ ++/** ++ * pr_flush() - Wait for printing threads to catch up. ++ * ++ * @timeout_ms: The maximum time (in ms) to wait. ++ * @reset_on_progress: Reset the timeout if forward progress is seen. ++ * ++ * A value of 0 for @timeout_ms means no waiting will occur. A value of -1 ++ * represents infinite waiting. ++ * ++ * If @reset_on_progress is true, the timeout will be reset whenever any ++ * printer has been seen to make some forward progress. ++ * ++ * Context: Any context. ++ * Return: true if all enabled printers are caught up. ++ */ ++bool pr_flush(int timeout_ms, bool reset_on_progress) ++{ ++ int remaining = timeout_ms; ++ struct console *con; ++ u64 last_diff = 0; ++ bool may_sleep; ++ u64 printk_seq; ++ u64 diff; ++ u64 seq; ++ ++ may_sleep = (preemptible() && ++ !in_softirq() && ++ system_state >= SYSTEM_RUNNING); ++ ++ seq = prb_next_seq(prb); ++ ++ for (;;) { ++ diff = 0; ++ ++ for_each_console(con) { ++ if (!(con->flags & CON_ENABLED)) ++ continue; ++ printk_seq = atomic64_read(&con->printk_seq); ++ if (printk_seq < seq) ++ diff += seq - printk_seq; ++ } ++ ++ if (diff != last_diff && reset_on_progress) ++ remaining = timeout_ms; ++ ++ if (!diff || remaining == 0) ++ break; ++ ++ if (remaining < 0) { ++ pr_msleep(may_sleep, 100); ++ } else if (remaining < 100) { ++ pr_msleep(may_sleep, remaining); ++ remaining = 0; ++ } else { ++ pr_msleep(may_sleep, 100); ++ remaining -= 100; ++ } ++ ++ last_diff = diff; ++ } ++ ++ return (diff == 0); ++} ++EXPORT_SYMBOL(pr_flush); +diff --git a/kernel/printk/printk_safe.c b/kernel/printk/printk_safe.c +index b774685cc..218e42566 100644 +--- a/kernel/printk/printk_safe.c ++++ b/kernel/printk/printk_safe.c +@@ -15,295 +15,9 @@ + + #include "internal.h" + +-/* +- * printk() could not take logbuf_lock in NMI context. Instead, +- * it uses an alternative implementation that temporary stores +- * the strings into a per-CPU buffer. The content of the buffer +- * is later flushed into the main ring buffer via IRQ work. +- * +- * The alternative implementation is chosen transparently +- * by examining current printk() context mask stored in @printk_context +- * per-CPU variable. +- * +- * The implementation allows to flush the strings also from another CPU. +- * There are situations when we want to make sure that all buffers +- * were handled or when IRQs are blocked. +- */ +- +-#define SAFE_LOG_BUF_LEN ((1 << CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT) - \ +- sizeof(atomic_t) - \ +- sizeof(atomic_t) - \ +- sizeof(struct irq_work)) +- +-struct printk_safe_seq_buf { +- atomic_t len; /* length of written data */ +- atomic_t message_lost; +- struct irq_work work; /* IRQ work that flushes the buffer */ +- unsigned char buffer[SAFE_LOG_BUF_LEN]; +-}; +- +-static DEFINE_PER_CPU(struct printk_safe_seq_buf, safe_print_seq); + static DEFINE_PER_CPU(int, printk_context); + +-static DEFINE_RAW_SPINLOCK(safe_read_lock); +- + #ifdef CONFIG_PRINTK_NMI +-static DEFINE_PER_CPU(struct printk_safe_seq_buf, nmi_print_seq); +-#endif +- +-/* Get flushed in a more safe context. */ +-static void queue_flush_work(struct printk_safe_seq_buf *s) +-{ +- if (printk_percpu_data_ready()) +- irq_work_queue(&s->work); +-} +- +-/* +- * Add a message to per-CPU context-dependent buffer. NMI and printk-safe +- * have dedicated buffers, because otherwise printk-safe preempted by +- * NMI-printk would have overwritten the NMI messages. +- * +- * The messages are flushed from irq work (or from panic()), possibly, +- * from other CPU, concurrently with printk_safe_log_store(). Should this +- * happen, printk_safe_log_store() will notice the buffer->len mismatch +- * and repeat the write. +- */ +-static __printf(2, 0) int printk_safe_log_store(struct printk_safe_seq_buf *s, +- const char *fmt, va_list args) +-{ +- int add; +- size_t len; +- va_list ap; +- +-again: +- len = atomic_read(&s->len); +- +- /* The trailing '\0' is not counted into len. */ +- if (len >= sizeof(s->buffer) - 1) { +- atomic_inc(&s->message_lost); +- queue_flush_work(s); +- return 0; +- } +- +- /* +- * Make sure that all old data have been read before the buffer +- * was reset. This is not needed when we just append data. +- */ +- if (!len) +- smp_rmb(); +- +- va_copy(ap, args); +- add = vscnprintf(s->buffer + len, sizeof(s->buffer) - len, fmt, ap); +- va_end(ap); +- if (!add) +- return 0; +- +- /* +- * Do it once again if the buffer has been flushed in the meantime. +- * Note that atomic_cmpxchg() is an implicit memory barrier that +- * makes sure that the data were written before updating s->len. +- */ +- if (atomic_cmpxchg(&s->len, len, len + add) != len) +- goto again; +- +- queue_flush_work(s); +- return add; +-} +- +-static inline void printk_safe_flush_line(const char *text, int len) +-{ +- /* +- * Avoid any console drivers calls from here, because we may be +- * in NMI or printk_safe context (when in panic). The messages +- * must go only into the ring buffer at this stage. Consoles will +- * get explicitly called later when a crashdump is not generated. +- */ +- printk_deferred("%.*s", len, text); +-} +- +-/* printk part of the temporary buffer line by line */ +-static int printk_safe_flush_buffer(const char *start, size_t len) +-{ +- const char *c, *end; +- bool header; +- +- c = start; +- end = start + len; +- header = true; +- +- /* Print line by line. */ +- while (c < end) { +- if (*c == '\n') { +- printk_safe_flush_line(start, c - start + 1); +- start = ++c; +- header = true; +- continue; +- } +- +- /* Handle continuous lines or missing new line. */ +- if ((c + 1 < end) && printk_get_level(c)) { +- if (header) { +- c = printk_skip_level(c); +- continue; +- } +- +- printk_safe_flush_line(start, c - start); +- start = c++; +- header = true; +- continue; +- } +- +- header = false; +- c++; +- } +- +- /* Check if there was a partial line. Ignore pure header. */ +- if (start < end && !header) { +- static const char newline[] = KERN_CONT "\n"; +- +- printk_safe_flush_line(start, end - start); +- printk_safe_flush_line(newline, strlen(newline)); +- } +- +- return len; +-} +- +-static void report_message_lost(struct printk_safe_seq_buf *s) +-{ +- int lost = atomic_xchg(&s->message_lost, 0); +- +- if (lost) +- printk_deferred("Lost %d message(s)!\n", lost); +-} +- +-/* +- * Flush data from the associated per-CPU buffer. The function +- * can be called either via IRQ work or independently. +- */ +-static void __printk_safe_flush(struct irq_work *work) +-{ +- struct printk_safe_seq_buf *s = +- container_of(work, struct printk_safe_seq_buf, work); +- unsigned long flags; +- size_t len; +- int i; +- +- /* +- * The lock has two functions. First, one reader has to flush all +- * available message to make the lockless synchronization with +- * writers easier. Second, we do not want to mix messages from +- * different CPUs. This is especially important when printing +- * a backtrace. +- */ +- raw_spin_lock_irqsave(&safe_read_lock, flags); +- +- i = 0; +-more: +- len = atomic_read(&s->len); +- +- /* +- * This is just a paranoid check that nobody has manipulated +- * the buffer an unexpected way. If we printed something then +- * @len must only increase. Also it should never overflow the +- * buffer size. +- */ +- if ((i && i >= len) || len > sizeof(s->buffer)) { +- const char *msg = "printk_safe_flush: internal error\n"; +- +- printk_safe_flush_line(msg, strlen(msg)); +- len = 0; +- } +- +- if (!len) +- goto out; /* Someone else has already flushed the buffer. */ +- +- /* Make sure that data has been written up to the @len */ +- smp_rmb(); +- i += printk_safe_flush_buffer(s->buffer + i, len - i); +- +- /* +- * Check that nothing has got added in the meantime and truncate +- * the buffer. Note that atomic_cmpxchg() is an implicit memory +- * barrier that makes sure that the data were copied before +- * updating s->len. +- */ +- if (atomic_cmpxchg(&s->len, len, 0) != len) +- goto more; +- +-out: +- report_message_lost(s); +- raw_spin_unlock_irqrestore(&safe_read_lock, flags); +-} +- +-/** +- * printk_safe_flush - flush all per-cpu nmi buffers. +- * +- * The buffers are flushed automatically via IRQ work. This function +- * is useful only when someone wants to be sure that all buffers have +- * been flushed at some point. +- */ +-void printk_safe_flush(void) +-{ +- int cpu; +- +- for_each_possible_cpu(cpu) { +-#ifdef CONFIG_PRINTK_NMI +- __printk_safe_flush(&per_cpu(nmi_print_seq, cpu).work); +-#endif +- __printk_safe_flush(&per_cpu(safe_print_seq, cpu).work); +- } +-} +- +-/** +- * printk_safe_flush_on_panic - flush all per-cpu nmi buffers when the system +- * goes down. +- * +- * Similar to printk_safe_flush() but it can be called even in NMI context when +- * the system goes down. It does the best effort to get NMI messages into +- * the main ring buffer. +- * +- * Note that it could try harder when there is only one CPU online. +- */ +-void printk_safe_flush_on_panic(void) +-{ +- /* +- * Make sure that we could access the main ring buffer. +- * Do not risk a double release when more CPUs are up. +- */ +- if (raw_spin_is_locked(&logbuf_lock)) { +- if (num_online_cpus() > 1) +- return; +- +- debug_locks_off(); +- raw_spin_lock_init(&logbuf_lock); +- } +- +- if (raw_spin_is_locked(&safe_read_lock)) { +- if (num_online_cpus() > 1) +- return; +- +- debug_locks_off(); +- raw_spin_lock_init(&safe_read_lock); +- } +- +- printk_safe_flush(); +-} +-EXPORT_SYMBOL_GPL(printk_safe_flush_on_panic); +- +-#ifdef CONFIG_PRINTK_NMI +-/* +- * Safe printk() for NMI context. It uses a per-CPU buffer to +- * store the message. NMIs are not nested, so there is always only +- * one writer running. But the buffer might get flushed from another +- * CPU, so we need to be careful. +- */ +-static __printf(1, 0) int vprintk_nmi(const char *fmt, va_list args) +-{ +- struct printk_safe_seq_buf *s = this_cpu_ptr(&nmi_print_seq); +- +- return printk_safe_log_store(s, fmt, args); +-} +- + void noinstr printk_nmi_enter(void) + { + this_cpu_add(printk_context, PRINTK_NMI_CONTEXT_OFFSET); +@@ -318,11 +32,6 @@ void noinstr printk_nmi_exit(void) + * Marks a code that might produce many messages in NMI context + * and the risk of losing them is more critical than eventual + * reordering. +- * +- * It has effect only when called in NMI context. Then printk() +- * will try to store the messages into the main logbuf directly +- * and use the per-CPU buffers only as a fallback when the lock +- * is not available. + */ + void printk_nmi_direct_enter(void) + { +@@ -335,27 +44,8 @@ void printk_nmi_direct_exit(void) + this_cpu_and(printk_context, ~PRINTK_NMI_DIRECT_CONTEXT_MASK); + } + +-#else +- +-static __printf(1, 0) int vprintk_nmi(const char *fmt, va_list args) +-{ +- return 0; +-} +- + #endif /* CONFIG_PRINTK_NMI */ + +-/* +- * Lock-less printk(), to avoid deadlocks should the printk() recurse +- * into itself. It uses a per-CPU buffer to store the message, just like +- * NMI. +- */ +-static __printf(1, 0) int vprintk_safe(const char *fmt, va_list args) +-{ +- struct printk_safe_seq_buf *s = this_cpu_ptr(&safe_print_seq); +- +- return printk_safe_log_store(s, fmt, args); +-} +- + /* Can be preempted by NMI. */ + void printk_safe_enter(void) + { +@@ -379,47 +69,22 @@ __printf(1, 0) int vprintk_func(const char *fmt, va_list args) + #endif + + /* +- * Try to use the main logbuf even in NMI. But avoid calling console ++ * Use the main logbuf even in NMI. But avoid calling console + * drivers that might have their own locks. + */ +- if ((this_cpu_read(printk_context) & PRINTK_NMI_DIRECT_CONTEXT_MASK) && +- raw_spin_trylock(&logbuf_lock)) { ++ if (this_cpu_read(printk_context) & ++ (PRINTK_NMI_DIRECT_CONTEXT_MASK | ++ PRINTK_NMI_CONTEXT_MASK | ++ PRINTK_SAFE_CONTEXT_MASK)) { + int len; + ++ printk_safe_enter_irqsave(flags); + len = vprintk_store(0, LOGLEVEL_DEFAULT, NULL, fmt, args); +- raw_spin_unlock(&logbuf_lock); ++ printk_safe_exit_irqrestore(flags); + defer_console_output(); + return len; + } + +- /* Use extra buffer in NMI when logbuf_lock is taken or in safe mode. */ +- if (this_cpu_read(printk_context) & PRINTK_NMI_CONTEXT_MASK) +- return vprintk_nmi(fmt, args); +- +- /* Use extra buffer to prevent a recursion deadlock in safe mode. */ +- if (this_cpu_read(printk_context) & PRINTK_SAFE_CONTEXT_MASK) +- return vprintk_safe(fmt, args); +- + /* No obstacles. */ + return vprintk_default(fmt, args); + } +- +-void __init printk_safe_init(void) +-{ +- int cpu; +- +- for_each_possible_cpu(cpu) { +- struct printk_safe_seq_buf *s; +- +- s = &per_cpu(safe_print_seq, cpu); +- init_irq_work(&s->work, __printk_safe_flush); +- +-#ifdef CONFIG_PRINTK_NMI +- s = &per_cpu(nmi_print_seq, cpu); +- init_irq_work(&s->work, __printk_safe_flush); +-#endif +- } +- +- /* Flush pending messages that did not have scheduled IRQ works. */ +- printk_safe_flush(); +-} +diff --git a/kernel/ptrace.c b/kernel/ptrace.c +index 6d82fba43..8a65ec16c 100644 +--- a/kernel/ptrace.c ++++ b/kernel/ptrace.c +@@ -197,7 +197,14 @@ static bool ptrace_freeze_traced(struct task_struct *task) + spin_lock_irq(&task->sighand->siglock); + if (task_is_traced(task) && !looks_like_a_spurious_pid(task) && + !__fatal_signal_pending(task)) { +- task->state = __TASK_TRACED; ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&task->pi_lock, flags); ++ if (task->state & __TASK_TRACED) ++ task->state = __TASK_TRACED; ++ else ++ task->saved_state = __TASK_TRACED; ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); + ret = true; + } + spin_unlock_irq(&task->sighand->siglock); +@@ -207,8 +214,8 @@ static bool ptrace_freeze_traced(struct task_struct *task) + + static void ptrace_unfreeze_traced(struct task_struct *task) + { +- if (task->state != __TASK_TRACED) +- return; ++ unsigned long flags; ++ bool frozen = true; + + WARN_ON(!task->ptrace || task->parent != current); + +@@ -217,12 +224,19 @@ static void ptrace_unfreeze_traced(struct task_struct *task) + * Recheck state under the lock to close this race. + */ + spin_lock_irq(&task->sighand->siglock); +- if (task->state == __TASK_TRACED) { +- if (__fatal_signal_pending(task)) +- wake_up_state(task, __TASK_TRACED); +- else +- task->state = TASK_TRACED; +- } ++ ++ raw_spin_lock_irqsave(&task->pi_lock, flags); ++ if (task->state == __TASK_TRACED) ++ task->state = TASK_TRACED; ++ else if (task->saved_state == __TASK_TRACED) ++ task->saved_state = TASK_TRACED; ++ else ++ frozen = false; ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); ++ ++ if (frozen && __fatal_signal_pending(task)) ++ wake_up_state(task, __TASK_TRACED); ++ + spin_unlock_irq(&task->sighand->siglock); + } + +diff --git a/kernel/rcu/Kconfig b/kernel/rcu/Kconfig +index b1d7aef10..5e11e30f4 100644 +--- a/kernel/rcu/Kconfig ++++ b/kernel/rcu/Kconfig +@@ -190,8 +190,8 @@ config RCU_FAST_NO_HZ + + config RCU_BOOST + bool "Enable RCU priority boosting" +- depends on RT_MUTEXES && PREEMPT_RCU && RCU_EXPERT +- default n ++ depends on (RT_MUTEXES && PREEMPT_RCU && RCU_EXPERT) || PREEMPT_RT ++ default y if PREEMPT_RT + help + This option boosts the priority of preempted RCU readers that + block the current preemptible RCU grace period for too long. +diff --git a/kernel/rcu/tree.c b/kernel/rcu/tree.c +index a128743af..03e9af9d8 100644 +--- a/kernel/rcu/tree.c ++++ b/kernel/rcu/tree.c +@@ -100,8 +100,10 @@ static struct rcu_state rcu_state = { + static bool dump_tree; + module_param(dump_tree, bool, 0444); + /* By default, use RCU_SOFTIRQ instead of rcuc kthreads. */ +-static bool use_softirq = true; ++static bool use_softirq = !IS_ENABLED(CONFIG_PREEMPT_RT); ++#ifndef CONFIG_PREEMPT_RT + module_param(use_softirq, bool, 0444); ++#endif + /* Control rcu_node-tree auto-balancing at boot time. */ + static bool rcu_fanout_exact; + module_param(rcu_fanout_exact, bool, 0444); +diff --git a/kernel/rcu/update.c b/kernel/rcu/update.c +index 849f0aa99..dd94a602a 100644 +--- a/kernel/rcu/update.c ++++ b/kernel/rcu/update.c +@@ -56,8 +56,10 @@ + #ifndef CONFIG_TINY_RCU + module_param(rcu_expedited, int, 0); + module_param(rcu_normal, int, 0); +-static int rcu_normal_after_boot; ++static int rcu_normal_after_boot = IS_ENABLED(CONFIG_PREEMPT_RT); ++#ifndef CONFIG_PREEMPT_RT + module_param(rcu_normal_after_boot, int, 0); ++#endif + #endif /* #ifndef CONFIG_TINY_RCU */ + + #ifdef CONFIG_DEBUG_LOCK_ALLOC +diff --git a/kernel/sched/core.c b/kernel/sched/core.c +index b7c0cf2d5..df7a69e2e 100644 +--- a/kernel/sched/core.c ++++ b/kernel/sched/core.c +@@ -65,7 +65,11 @@ const_debug unsigned int sysctl_sched_features = + * Number of tasks to iterate in a single balance run. + * Limited because this is done with IRQs disabled. + */ ++#ifdef CONFIG_PREEMPT_RT ++const_debug unsigned int sysctl_sched_nr_migrate = 8; ++#else + const_debug unsigned int sysctl_sched_nr_migrate = 32; ++#endif + + /* + * period over which we measure -rt task CPU usage in us. +@@ -856,9 +860,15 @@ static bool set_nr_if_polling(struct task_struct *p) + #endif + #endif + +-static bool __wake_q_add(struct wake_q_head *head, struct task_struct *task) ++static bool __wake_q_add(struct wake_q_head *head, struct task_struct *task, ++ bool sleeper) + { +- struct wake_q_node *node = &task->wake_q; ++ struct wake_q_node *node; ++ ++ if (sleeper) ++ node = &task->wake_q_sleeper; ++ else ++ node = &task->wake_q; + + /* + * Atomically grab the task, if ->wake_q is !nil already it means +@@ -894,7 +904,13 @@ static bool __wake_q_add(struct wake_q_head *head, struct task_struct *task) + */ + void wake_q_add(struct wake_q_head *head, struct task_struct *task) + { +- if (__wake_q_add(head, task)) ++ if (__wake_q_add(head, task, false)) ++ get_task_struct(task); ++} ++ ++void wake_q_add_sleeper(struct wake_q_head *head, struct task_struct *task) ++{ ++ if (__wake_q_add(head, task, true)) + get_task_struct(task); + } + +@@ -917,28 +933,39 @@ void wake_q_add(struct wake_q_head *head, struct task_struct *task) + */ + void wake_q_add_safe(struct wake_q_head *head, struct task_struct *task) + { +- if (!__wake_q_add(head, task)) ++ if (!__wake_q_add(head, task, false)) + put_task_struct(task); + } + +-void wake_up_q(struct wake_q_head *head) ++void __wake_up_q(struct wake_q_head *head, bool sleeper) + { + struct wake_q_node *node = head->first; + + while (node != WAKE_Q_TAIL) { + struct task_struct *task; + +- task = container_of(node, struct task_struct, wake_q); ++ if (sleeper) ++ task = container_of(node, struct task_struct, wake_q_sleeper); ++ else ++ task = container_of(node, struct task_struct, wake_q); ++ + BUG_ON(!task); + /* Task can safely be re-inserted now: */ + node = node->next; +- task->wake_q.next = NULL; + ++ if (sleeper) ++ task->wake_q_sleeper.next = NULL; ++ else ++ task->wake_q.next = NULL; + /* + * wake_up_process() executes a full barrier, which pairs with + * the queueing in wake_q_add() so as not to miss wakeups. + */ +- wake_up_process(task); ++ if (sleeper) ++ wake_up_lock_sleeper(task); ++ else ++ wake_up_process(task); ++ + put_task_struct(task); + } + } +@@ -974,6 +1001,48 @@ void resched_curr(struct rq *rq) + trace_sched_wake_idle_without_ipi(cpu); + } + ++#ifdef CONFIG_PREEMPT_LAZY ++ ++static int tsk_is_polling(struct task_struct *p) ++{ ++#ifdef TIF_POLLING_NRFLAG ++ return test_tsk_thread_flag(p, TIF_POLLING_NRFLAG); ++#else ++ return 0; ++#endif ++} ++ ++void resched_curr_lazy(struct rq *rq) ++{ ++ struct task_struct *curr = rq->curr; ++ int cpu; ++ ++ if (!sched_feat(PREEMPT_LAZY)) { ++ resched_curr(rq); ++ return; ++ } ++ ++ lockdep_assert_held(&rq->__lock); ++ ++ if (test_tsk_need_resched(curr)) ++ return; ++ ++ if (test_tsk_need_resched_lazy(curr)) ++ return; ++ ++ set_tsk_need_resched_lazy(curr); ++ ++ cpu = cpu_of(rq); ++ if (cpu == smp_processor_id()) ++ return; ++ ++ /* NEED_RESCHED_LAZY must be visible before we test polling */ ++ smp_mb(); ++ if (!tsk_is_polling(curr)) ++ smp_send_reschedule(cpu); ++} ++#endif ++ + void resched_cpu(int cpu) + { + struct rq *rq = cpu_rq(cpu); +@@ -2063,6 +2132,82 @@ void check_preempt_curr(struct rq *rq, struct task_struct *p, int flags) + + #ifdef CONFIG_SMP + ++static void ++__do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask, u32 flags); ++ ++static int __set_cpus_allowed_ptr(struct task_struct *p, ++ const struct cpumask *new_mask, ++ u32 flags); ++ ++static void migrate_disable_switch(struct rq *rq, struct task_struct *p) ++{ ++ if (likely(!p->migration_disabled)) ++ return; ++ ++ if (p->cpus_ptr != &p->cpus_mask) ++ return; ++ ++ /* ++ * Violates locking rules! see comment in __do_set_cpus_allowed(). ++ */ ++ __do_set_cpus_allowed(p, cpumask_of(rq->cpu), SCA_MIGRATE_DISABLE); ++} ++ ++void migrate_disable(void) ++{ ++ struct task_struct *p = current; ++ ++ if (p->migration_disabled) { ++ p->migration_disabled++; ++ return; ++ } ++ ++ trace_sched_migrate_disable_tp(p); ++ ++ preempt_disable(); ++ this_rq()->nr_pinned++; ++ p->migration_disabled = 1; ++ preempt_lazy_disable(); ++ preempt_enable(); ++} ++EXPORT_SYMBOL_GPL(migrate_disable); ++ ++void migrate_enable(void) ++{ ++ struct task_struct *p = current; ++ ++ if (p->migration_disabled > 1) { ++ p->migration_disabled--; ++ return; ++ } ++ ++ /* ++ * Ensure stop_task runs either before or after this, and that ++ * __set_cpus_allowed_ptr(SCA_MIGRATE_ENABLE) doesn't schedule(). ++ */ ++ preempt_disable(); ++ if (p->cpus_ptr != &p->cpus_mask) ++ __set_cpus_allowed_ptr(p, &p->cpus_mask, SCA_MIGRATE_ENABLE); ++ /* ++ * Mustn't clear migration_disabled() until cpus_ptr points back at the ++ * regular cpus_mask, otherwise things that race (eg. ++ * select_fallback_rq) get confused. ++ */ ++ barrier(); ++ p->migration_disabled = 0; ++ this_rq()->nr_pinned--; ++ preempt_lazy_enable(); ++ preempt_enable(); ++ ++ trace_sched_migrate_enable_tp(p); ++} ++EXPORT_SYMBOL_GPL(migrate_enable); ++ ++static inline bool rq_has_pinned_tasks(struct rq *rq) ++{ ++ return rq->nr_pinned; ++} ++ + /* + * Per-CPU kthreads are allowed to run on !active && online CPUs, see + * __set_cpus_allowed_ptr() and select_fallback_rq(). +@@ -2072,7 +2217,7 @@ static inline bool is_cpu_allowed(struct task_struct *p, int cpu) + if (!cpumask_test_cpu(cpu, p->cpus_ptr)) + return false; + +- if (is_per_cpu_kthread(p)) ++ if (is_per_cpu_kthread(p) || is_migration_disabled(p)) + return cpu_online(cpu); + + return cpu_active(cpu); +@@ -2117,8 +2262,21 @@ static struct rq *move_queued_task(struct rq *rq, struct rq_flags *rf, + } + + struct migration_arg { +- struct task_struct *task; +- int dest_cpu; ++ struct task_struct *task; ++ int dest_cpu; ++ struct set_affinity_pending *pending; ++}; ++ ++/* ++ * @refs: number of wait_for_completion() ++ * @stop_pending: is @stop_work in use ++ */ ++struct set_affinity_pending { ++ refcount_t refs; ++ unsigned int stop_pending; ++ struct completion done; ++ struct cpu_stop_work stop_work; ++ struct migration_arg arg; + }; + + /* +@@ -2151,15 +2309,17 @@ static struct rq *__migrate_task(struct rq *rq, struct rq_flags *rf, + static int migration_cpu_stop(void *data) + { + struct migration_arg *arg = data; ++ struct set_affinity_pending *pending = arg->pending; + struct task_struct *p = arg->task; + struct rq *rq = this_rq(); ++ bool complete = false; + struct rq_flags rf; + + /* + * The original target CPU might have gone down and we might + * be on another CPU but it doesn't matter. + */ +- local_irq_disable(); ++ local_irq_save(rf.flags); + /* + * We need to explicitly wake pending tasks before running + * __migrate_task() such that we will not miss enforcing cpus_ptr +@@ -2169,21 +2329,121 @@ static int migration_cpu_stop(void *data) + + raw_spin_lock(&p->pi_lock); + rq_lock(rq, &rf); ++ + /* + * If task_rq(p) != rq, it cannot be migrated here, because we're + * holding rq->lock, if p->on_rq == 0 it cannot get enqueued because + * we're holding p->pi_lock. + */ + if (task_rq(p) == rq) { ++ if (is_migration_disabled(p)) ++ goto out; ++ ++ if (pending) { ++ if (p->migration_pending == pending) ++ p->migration_pending = NULL; ++ complete = true; ++ ++ if (cpumask_test_cpu(task_cpu(p), &p->cpus_mask)) ++ goto out; ++ } ++ + if (task_on_rq_queued(p)) + rq = __migrate_task(rq, &rf, p, arg->dest_cpu); + else + p->wake_cpu = arg->dest_cpu; ++ ++ /* ++ * XXX __migrate_task() can fail, at which point we might end ++ * up running on a dodgy CPU, AFAICT this can only happen ++ * during CPU hotplug, at which point we'll get pushed out ++ * anyway, so it's probably not a big deal. ++ */ ++ ++ } else if (pending) { ++ /* ++ * This happens when we get migrated between migrate_enable()'s ++ * preempt_enable() and scheduling the stopper task. At that ++ * point we're a regular task again and not current anymore. ++ * ++ * A !PREEMPT kernel has a giant hole here, which makes it far ++ * more likely. ++ */ ++ ++ /* ++ * The task moved before the stopper got to run. We're holding ++ * ->pi_lock, so the allowed mask is stable - if it got ++ * somewhere allowed, we're done. ++ */ ++ if (cpumask_test_cpu(task_cpu(p), p->cpus_ptr)) { ++ if (p->migration_pending == pending) ++ p->migration_pending = NULL; ++ complete = true; ++ goto out; ++ } ++ ++ /* ++ * When migrate_enable() hits a rq mis-match we can't reliably ++ * determine is_migration_disabled() and so have to chase after ++ * it. ++ */ ++ WARN_ON_ONCE(!pending->stop_pending); ++ task_rq_unlock(rq, p, &rf); ++ stop_one_cpu_nowait(task_cpu(p), migration_cpu_stop, ++ &pending->arg, &pending->stop_work); ++ return 0; + } +- rq_unlock(rq, &rf); +- raw_spin_unlock(&p->pi_lock); ++out: ++ if (pending) ++ pending->stop_pending = false; ++ task_rq_unlock(rq, p, &rf); ++ ++ if (complete) ++ complete_all(&pending->done); + +- local_irq_enable(); ++ return 0; ++} ++ ++int push_cpu_stop(void *arg) ++{ ++ struct rq *lowest_rq = NULL, *rq = this_rq(); ++ struct task_struct *p = arg; ++ ++ raw_spin_lock_irq(&p->pi_lock); ++ raw_spin_lock(&rq->__lock); ++ ++ if (task_rq(p) != rq) ++ goto out_unlock; ++ ++ if (is_migration_disabled(p)) { ++ p->migration_flags |= MDF_PUSH; ++ goto out_unlock; ++ } ++ ++ p->migration_flags &= ~MDF_PUSH; ++ ++ if (p->sched_class->find_lock_rq) ++ lowest_rq = p->sched_class->find_lock_rq(p, rq); ++ ++ if (!lowest_rq) ++ goto out_unlock; ++ ++ // XXX validate p is still the highest prio task ++ if (task_rq(p) == rq) { ++ deactivate_task(rq, p, 0); ++ set_task_cpu(p, lowest_rq->cpu); ++ activate_task(lowest_rq, p, 0); ++ resched_curr(lowest_rq); ++ } ++ ++ double_unlock_balance(rq, lowest_rq); ++ ++out_unlock: ++ rq->push_busy = false; ++ raw_spin_unlock(&rq->__lock); ++ raw_spin_unlock_irq(&p->pi_lock); ++ ++ put_task_struct(p); + return 0; + } + +@@ -2191,18 +2451,39 @@ static int migration_cpu_stop(void *data) + * sched_class::set_cpus_allowed must do the below, but is not required to + * actually call this function. + */ +-void set_cpus_allowed_common(struct task_struct *p, const struct cpumask *new_mask) ++void set_cpus_allowed_common(struct task_struct *p, const struct cpumask *new_mask, u32 flags) + { ++ if (flags & (SCA_MIGRATE_ENABLE | SCA_MIGRATE_DISABLE)) { ++ p->cpus_ptr = new_mask; ++ return; ++ } ++ + cpumask_copy(&p->cpus_mask, new_mask); + p->nr_cpus_allowed = cpumask_weight(new_mask); + } + +-void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) ++static void ++__do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask, u32 flags) + { + struct rq *rq = task_rq(p); + bool queued, running; + +- lockdep_assert_held(&p->pi_lock); ++ /* ++ * This here violates the locking rules for affinity, since we're only ++ * supposed to change these variables while holding both rq->lock and ++ * p->pi_lock. ++ * ++ * HOWEVER, it magically works, because ttwu() is the only code that ++ * accesses these variables under p->pi_lock and only does so after ++ * smp_cond_load_acquire(&p->on_cpu, !VAL), and we're in __schedule() ++ * before finish_task(). ++ * ++ * XXX do further audits, this smells like something putrid. ++ */ ++ if (flags & SCA_MIGRATE_DISABLE) ++ SCHED_WARN_ON(!p->on_cpu); ++ else ++ lockdep_assert_held(&p->pi_lock); + + queued = task_on_rq_queued(p); + running = task_current(rq, p); +@@ -2218,7 +2499,7 @@ void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) + if (running) + put_prev_task(rq, p); + +- p->sched_class->set_cpus_allowed(p, new_mask); ++ p->sched_class->set_cpus_allowed(p, new_mask, flags); + + if (queued) + enqueue_task(rq, p, ENQUEUE_RESTORE | ENQUEUE_NOCLOCK); +@@ -2226,6 +2507,222 @@ void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) + set_next_task(rq, p); + } + ++void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) ++{ ++ __do_set_cpus_allowed(p, new_mask, 0); ++} ++ ++/* ++ * This function is wildly self concurrent; here be dragons. ++ * ++ * ++ * When given a valid mask, __set_cpus_allowed_ptr() must block until the ++ * designated task is enqueued on an allowed CPU. If that task is currently ++ * running, we have to kick it out using the CPU stopper. ++ * ++ * Migrate-Disable comes along and tramples all over our nice sandcastle. ++ * Consider: ++ * ++ * Initial conditions: P0->cpus_mask = [0, 1] ++ * ++ * P0@CPU0 P1 ++ * ++ * migrate_disable(); ++ * ++ * set_cpus_allowed_ptr(P0, [1]); ++ * ++ * P1 *cannot* return from this set_cpus_allowed_ptr() call until P0 executes ++ * its outermost migrate_enable() (i.e. it exits its Migrate-Disable region). ++ * This means we need the following scheme: ++ * ++ * P0@CPU0 P1 ++ * ++ * migrate_disable(); ++ * ++ * set_cpus_allowed_ptr(P0, [1]); ++ * ++ * ++ * migrate_enable(); ++ * __set_cpus_allowed_ptr(); ++ * ++ * `--> ++ * ++ * Now the fun stuff: there may be several P1-like tasks, i.e. multiple ++ * concurrent set_cpus_allowed_ptr(P0, [*]) calls. CPU affinity changes of any ++ * task p are serialized by p->pi_lock, which we can leverage: the one that ++ * should come into effect at the end of the Migrate-Disable region is the last ++ * one. This means we only need to track a single cpumask (i.e. p->cpus_mask), ++ * but we still need to properly signal those waiting tasks at the appropriate ++ * moment. ++ * ++ * This is implemented using struct set_affinity_pending. The first ++ * __set_cpus_allowed_ptr() caller within a given Migrate-Disable region will ++ * setup an instance of that struct and install it on the targeted task_struct. ++ * Any and all further callers will reuse that instance. Those then wait for ++ * a completion signaled at the tail of the CPU stopper callback (1), triggered ++ * on the end of the Migrate-Disable region (i.e. outermost migrate_enable()). ++ * ++ * ++ * (1) In the cases covered above. There is one more where the completion is ++ * signaled within affine_move_task() itself: when a subsequent affinity request ++ * cancels the need for an active migration. Consider: ++ * ++ * Initial conditions: P0->cpus_mask = [0, 1] ++ * ++ * P0@CPU0 P1 P2 ++ * ++ * migrate_disable(); ++ * ++ * set_cpus_allowed_ptr(P0, [1]); ++ * ++ * set_cpus_allowed_ptr(P0, [0, 1]); ++ * ++ * ++ * ++ * Note that the above is safe vs a concurrent migrate_enable(), as any ++ * pending affinity completion is preceded an uninstallion of ++ * p->migration_pending done with p->pi_lock held. ++ */ ++static int affine_move_task(struct rq *rq, struct task_struct *p, struct rq_flags *rf, ++ int dest_cpu, unsigned int flags) ++{ ++ struct set_affinity_pending my_pending = { }, *pending = NULL; ++ bool stop_pending, complete = false; ++ ++ /* Can the task run on the task's current CPU? If so, we're done */ ++ if (cpumask_test_cpu(task_cpu(p), &p->cpus_mask)) { ++ struct task_struct *push_task = NULL; ++ ++ if ((flags & SCA_MIGRATE_ENABLE) && ++ (p->migration_flags & MDF_PUSH) && !rq->push_busy) { ++ rq->push_busy = true; ++ push_task = get_task_struct(p); ++ } ++ ++ /* ++ * If there are pending waiters, but no pending stop_work, ++ * then complete now. ++ */ ++ pending = p->migration_pending; ++ if (pending && !pending->stop_pending) { ++ p->migration_pending = NULL; ++ complete = true; ++ } ++ ++ task_rq_unlock(rq, p, rf); ++ ++ if (push_task) { ++ stop_one_cpu_nowait(rq->cpu, push_cpu_stop, ++ p, &rq->push_work); ++ } ++ ++ if (complete) ++ complete_all(&pending->done); ++ ++ return 0; ++ } ++ ++ if (!(flags & SCA_MIGRATE_ENABLE)) { ++ /* serialized by p->pi_lock */ ++ if (!p->migration_pending) { ++ /* Install the request */ ++ refcount_set(&my_pending.refs, 1); ++ init_completion(&my_pending.done); ++ my_pending.arg = (struct migration_arg) { ++ .task = p, ++ .dest_cpu = dest_cpu, ++ .pending = &my_pending, ++ }; ++ ++ p->migration_pending = &my_pending; ++ } else { ++ pending = p->migration_pending; ++ refcount_inc(&pending->refs); ++ /* ++ * Affinity has changed, but we've already installed a ++ * pending. migration_cpu_stop() *must* see this, else ++ * we risk a completion of the pending despite having a ++ * task on a disallowed CPU. ++ * ++ * Serialized by p->pi_lock, so this is safe. ++ */ ++ pending->arg.dest_cpu = dest_cpu; ++ } ++ } ++ pending = p->migration_pending; ++ /* ++ * - !MIGRATE_ENABLE: ++ * we'll have installed a pending if there wasn't one already. ++ * ++ * - MIGRATE_ENABLE: ++ * we're here because the current CPU isn't matching anymore, ++ * the only way that can happen is because of a concurrent ++ * set_cpus_allowed_ptr() call, which should then still be ++ * pending completion. ++ * ++ * Either way, we really should have a @pending here. ++ */ ++ if (WARN_ON_ONCE(!pending)) { ++ task_rq_unlock(rq, p, rf); ++ return -EINVAL; ++ } ++ ++ if (task_running(rq, p) || p->state == TASK_WAKING) { ++ /* ++ * MIGRATE_ENABLE gets here because 'p == current', but for ++ * anything else we cannot do is_migration_disabled(), punt ++ * and have the stopper function handle it all race-free. ++ */ ++ stop_pending = pending->stop_pending; ++ if (!stop_pending) ++ pending->stop_pending = true; ++ ++ if (flags & SCA_MIGRATE_ENABLE) ++ p->migration_flags &= ~MDF_PUSH; ++ ++ task_rq_unlock(rq, p, rf); ++ ++ if (!stop_pending) { ++ stop_one_cpu_nowait(cpu_of(rq), migration_cpu_stop, ++ &pending->arg, &pending->stop_work); ++ } ++ ++ if (flags & SCA_MIGRATE_ENABLE) ++ return 0; ++ } else { ++ ++ if (!is_migration_disabled(p)) { ++ if (task_on_rq_queued(p)) ++ rq = move_queued_task(rq, rf, p, dest_cpu); ++ ++ if (!pending->stop_pending) { ++ p->migration_pending = NULL; ++ complete = true; ++ } ++ } ++ task_rq_unlock(rq, p, rf); ++ ++ if (complete) ++ complete_all(&pending->done); ++ } ++ ++ wait_for_completion(&pending->done); ++ ++ if (refcount_dec_and_test(&pending->refs)) ++ wake_up_var(&pending->refs); /* No UaF, just an address */ ++ ++ /* ++ * Block the original owner of &pending until all subsequent callers ++ * have seen the completion and decremented the refcount ++ */ ++ wait_var_event(&my_pending.refs, !refcount_read(&my_pending.refs)); ++ ++ /* ARGH */ ++ WARN_ON_ONCE(my_pending.stop_pending); ++ ++ return 0; ++} ++ + /* + * Change a given task's CPU affinity. Migrate the thread to a + * proper CPU and schedule it away if the CPU it's executing on +@@ -2236,7 +2733,8 @@ void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) + * call is not atomic; no spinlocks may be held. + */ + static int __set_cpus_allowed_ptr(struct task_struct *p, +- const struct cpumask *new_mask, bool check) ++ const struct cpumask *new_mask, ++ u32 flags) + { + const struct cpumask *cpu_valid_mask = cpu_active_mask; + unsigned int dest_cpu; +@@ -2247,9 +2745,14 @@ static int __set_cpus_allowed_ptr(struct task_struct *p, + rq = task_rq_lock(p, &rf); + update_rq_clock(rq); + +- if (p->flags & PF_KTHREAD) { ++ if (p->flags & PF_KTHREAD || is_migration_disabled(p)) { + /* +- * Kernel threads are allowed on online && !active CPUs ++ * Kernel threads are allowed on online && !active CPUs. ++ * ++ * Specifically, migration_disabled() tasks must not fail the ++ * cpumask_any_and_distribute() pick below, esp. so on ++ * SCA_MIGRATE_ENABLE, otherwise we'll not call ++ * set_cpus_allowed_common() and actually reset p->cpus_ptr. + */ + cpu_valid_mask = cpu_online_mask; + } +@@ -2258,13 +2761,22 @@ static int __set_cpus_allowed_ptr(struct task_struct *p, + * Must re-check here, to close a race against __kthread_bind(), + * sched_setaffinity() is not guaranteed to observe the flag. + */ +- if (check && (p->flags & PF_NO_SETAFFINITY)) { ++ if ((flags & SCA_CHECK) && (p->flags & PF_NO_SETAFFINITY)) { + ret = -EINVAL; + goto out; + } + +- if (cpumask_equal(&p->cpus_mask, new_mask)) +- goto out; ++ if (!(flags & SCA_MIGRATE_ENABLE)) { ++ if (cpumask_equal(&p->cpus_mask, new_mask)) ++ goto out; ++ ++ if (WARN_ON_ONCE(p == current && ++ is_migration_disabled(p) && ++ !cpumask_test_cpu(task_cpu(p), new_mask))) { ++ ret = -EBUSY; ++ goto out; ++ } ++ } + + /* + * Picking a ~random cpu helps in cases where we are changing affinity +@@ -2277,7 +2789,7 @@ static int __set_cpus_allowed_ptr(struct task_struct *p, + goto out; + } + +- do_set_cpus_allowed(p, new_mask); ++ __do_set_cpus_allowed(p, new_mask, flags); + + if (p->flags & PF_KTHREAD) { + /* +@@ -2289,23 +2801,8 @@ static int __set_cpus_allowed_ptr(struct task_struct *p, + p->nr_cpus_allowed != 1); + } + +- /* Can the task run on the task's current CPU? If so, we're done */ +- if (cpumask_test_cpu(task_cpu(p), new_mask)) +- goto out; ++ return affine_move_task(rq, p, &rf, dest_cpu, flags); + +- if (task_running(rq, p) || p->state == TASK_WAKING) { +- struct migration_arg arg = { p, dest_cpu }; +- /* Need help from migration thread: drop lock and wait. */ +- task_rq_unlock(rq, p, &rf); +- stop_one_cpu(cpu_of(rq), migration_cpu_stop, &arg); +- return 0; +- } else if (task_on_rq_queued(p)) { +- /* +- * OK, since we're going to drop the lock immediately +- * afterwards anyway. +- */ +- rq = move_queued_task(rq, &rf, p, dest_cpu); +- } + out: + task_rq_unlock(rq, p, &rf); + +@@ -2314,7 +2811,7 @@ static int __set_cpus_allowed_ptr(struct task_struct *p, + + int set_cpus_allowed_ptr(struct task_struct *p, const struct cpumask *new_mask) + { +- return __set_cpus_allowed_ptr(p, new_mask, false); ++ return __set_cpus_allowed_ptr(p, new_mask, 0); + } + EXPORT_SYMBOL_GPL(set_cpus_allowed_ptr); + +@@ -2355,6 +2852,8 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu) + * Clearly, migrating tasks to offline CPUs is a fairly daft thing. + */ + WARN_ON_ONCE(!cpu_online(new_cpu)); ++ ++ WARN_ON_ONCE(is_migration_disabled(p)); + #endif + + trace_sched_migrate_task(p, new_cpu); +@@ -2487,6 +2986,18 @@ int migrate_swap(struct task_struct *cur, struct task_struct *p, + } + #endif /* CONFIG_NUMA_BALANCING */ + ++static bool check_task_state(struct task_struct *p, long match_state) ++{ ++ bool match = false; ++ ++ raw_spin_lock_irq(&p->pi_lock); ++ if (p->state == match_state || p->saved_state == match_state) ++ match = true; ++ raw_spin_unlock_irq(&p->pi_lock); ++ ++ return match; ++} ++ + /* + * wait_task_inactive - wait for a thread to unschedule. + * +@@ -2531,7 +3042,7 @@ unsigned long wait_task_inactive(struct task_struct *p, long match_state) + * is actually now running somewhere else! + */ + while (task_running(rq, p)) { +- if (match_state && unlikely(p->state != match_state)) ++ if (match_state && !check_task_state(p, match_state)) + return 0; + cpu_relax(); + } +@@ -2546,7 +3057,8 @@ unsigned long wait_task_inactive(struct task_struct *p, long match_state) + running = task_running(rq, p); + queued = task_on_rq_queued(p); + ncsw = 0; +- if (!match_state || p->state == match_state) ++ if (!match_state || p->state == match_state || ++ p->saved_state == match_state) + ncsw = p->nvcsw | LONG_MIN; /* sets MSB */ + task_rq_unlock(rq, p, &rf); + +@@ -2580,7 +3092,7 @@ unsigned long wait_task_inactive(struct task_struct *p, long match_state) + ktime_t to = NSEC_PER_SEC / HZ; + + set_current_state(TASK_UNINTERRUPTIBLE); +- schedule_hrtimeout(&to, HRTIMER_MODE_REL); ++ schedule_hrtimeout(&to, HRTIMER_MODE_REL_HARD); + continue; + } + +@@ -2685,6 +3197,12 @@ static int select_fallback_rq(int cpu, struct task_struct *p) + } + fallthrough; + case possible: ++ /* ++ * XXX When called from select_task_rq() we only ++ * hold p->pi_lock and again violate locking order. ++ * ++ * More yuck to audit. ++ */ + do_set_cpus_allowed(p, cpu_possible_mask); + state = fail; + break; +@@ -2719,7 +3237,7 @@ int select_task_rq(struct task_struct *p, int cpu, int sd_flags, int wake_flags) + { + lockdep_assert_held(&p->pi_lock); + +- if (p->nr_cpus_allowed > 1) ++ if (p->nr_cpus_allowed > 1 && !is_migration_disabled(p)) + cpu = p->sched_class->select_task_rq(p, cpu, sd_flags, wake_flags); + else + cpu = cpumask_any(p->cpus_ptr); +@@ -2742,6 +3260,7 @@ int select_task_rq(struct task_struct *p, int cpu, int sd_flags, int wake_flags) + + void sched_set_stop_task(int cpu, struct task_struct *stop) + { ++ static struct lock_class_key stop_pi_lock; + struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 }; + struct task_struct *old_stop = cpu_rq(cpu)->stop; + +@@ -2757,6 +3276,20 @@ void sched_set_stop_task(int cpu, struct task_struct *stop) + sched_setscheduler_nocheck(stop, SCHED_FIFO, ¶m); + + stop->sched_class = &stop_sched_class; ++ ++ /* ++ * The PI code calls rt_mutex_setprio() with ->pi_lock held to ++ * adjust the effective priority of a task. As a result, ++ * rt_mutex_setprio() can trigger (RT) balancing operations, ++ * which can then trigger wakeups of the stop thread to push ++ * around the current task. ++ * ++ * The stop task itself will never be part of the PI-chain, it ++ * never blocks, therefore that ->pi_lock recursion is safe. ++ * Tell lockdep about this by placing the stop->pi_lock in its ++ * own class. ++ */ ++ lockdep_set_class(&stop->pi_lock, &stop_pi_lock); + } + + cpu_rq(cpu)->stop = stop; +@@ -2770,15 +3303,23 @@ void sched_set_stop_task(int cpu, struct task_struct *stop) + } + } + +-#else ++#else /* CONFIG_SMP */ + + static inline int __set_cpus_allowed_ptr(struct task_struct *p, +- const struct cpumask *new_mask, bool check) ++ const struct cpumask *new_mask, ++ u32 flags) + { + return set_cpus_allowed_ptr(p, new_mask); + } + +-#endif /* CONFIG_SMP */ ++static inline void migrate_disable_switch(struct rq *rq, struct task_struct *p) { } ++ ++static inline bool rq_has_pinned_tasks(struct rq *rq) ++{ ++ return false; ++} ++ ++#endif /* !CONFIG_SMP */ + + static void + ttwu_stat(struct task_struct *p, int cpu, int wake_flags) +@@ -3220,7 +3761,7 @@ try_to_wake_up(struct task_struct *p, unsigned int state, int wake_flags) + int cpu, success = 0; + + preempt_disable(); +- if (p == current) { ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT) && p == current) { + /* + * We're waking current, this means 'p->on_rq' and 'task_cpu(p) + * == smp_processor_id()'. Together this means we can special +@@ -3250,8 +3791,26 @@ try_to_wake_up(struct task_struct *p, unsigned int state, int wake_flags) + */ + raw_spin_lock_irqsave(&p->pi_lock, flags); + smp_mb__after_spinlock(); +- if (!(p->state & state)) ++ if (!(p->state & state)) { ++ /* ++ * The task might be running due to a spinlock sleeper ++ * wakeup. Check the saved state and set it to running ++ * if the wakeup condition is true. ++ */ ++ if (!(wake_flags & WF_LOCK_SLEEPER)) { ++ if (p->saved_state & state) { ++ p->saved_state = TASK_RUNNING; ++ success = 1; ++ } ++ } + goto unlock; ++ } ++ /* ++ * If this is a regular wakeup, then we can unconditionally ++ * clear the saved state of a "lock sleeper". ++ */ ++ if (!(wake_flags & WF_LOCK_SLEEPER)) ++ p->saved_state = TASK_RUNNING; + + trace_sched_waking(p); + +@@ -3440,6 +3999,18 @@ int wake_up_process(struct task_struct *p) + } + EXPORT_SYMBOL(wake_up_process); + ++/** ++ * wake_up_lock_sleeper - Wake up a specific process blocked on a "sleeping lock" ++ * @p: The process to be woken up. ++ * ++ * Same as wake_up_process() above, but wake_flags=WF_LOCK_SLEEPER to indicate ++ * the nature of the wakeup. ++ */ ++int wake_up_lock_sleeper(struct task_struct *p) ++{ ++ return try_to_wake_up(p, TASK_UNINTERRUPTIBLE, WF_LOCK_SLEEPER); ++} ++ + int wake_up_state(struct task_struct *p, unsigned int state) + { + return try_to_wake_up(p, state, 0); +@@ -3493,6 +4064,7 @@ static void __sched_fork(unsigned long clone_flags, struct task_struct *p) + init_numa_balancing(clone_flags, p); + #ifdef CONFIG_SMP + p->wake_entry.u_flags = CSD_TYPE_TTWU; ++ p->migration_pending = NULL; + #endif + #ifdef CONFIG_BPF_SCHED + p->tag = 0; +@@ -3701,6 +4273,9 @@ int sched_fork(unsigned long clone_flags, struct task_struct *p) + p->on_cpu = 0; + #endif + init_task_preempt_count(p); ++#ifdef CONFIG_HAVE_PREEMPT_LAZY ++ task_thread_info(p)->preempt_lazy_count = 0; ++#endif + #ifdef CONFIG_SMP + plist_node_init(&p->pushable_tasks, MAX_PRIO); + RB_CLEAR_NODE(&p->pushable_dl_tasks); +@@ -3871,60 +4446,145 @@ __fire_sched_out_preempt_notifiers(struct task_struct *curr, + notifier->ops->sched_out(notifier, next); + } + +-static __always_inline void +-fire_sched_out_preempt_notifiers(struct task_struct *curr, +- struct task_struct *next) ++ ++static __always_inline void ++fire_sched_out_preempt_notifiers(struct task_struct *curr, ++ struct task_struct *next) ++{ ++ if (static_branch_unlikely(&preempt_notifier_key)) ++ __fire_sched_out_preempt_notifiers(curr, next); ++} ++ ++#else /* !CONFIG_PREEMPT_NOTIFIERS */ ++ ++static inline void fire_sched_in_preempt_notifiers(struct task_struct *curr) ++{ ++} ++ ++static inline void ++fire_sched_out_preempt_notifiers(struct task_struct *curr, ++ struct task_struct *next) ++{ ++} ++ ++#endif /* CONFIG_PREEMPT_NOTIFIERS */ ++ ++static inline void prepare_task(struct task_struct *next) ++{ ++#ifdef CONFIG_SMP ++ /* ++ * Claim the task as running, we do this before switching to it ++ * such that any running task will have this set. ++ * ++ * See the ttwu() WF_ON_CPU case and its ordering comment. ++ */ ++ WRITE_ONCE(next->on_cpu, 1); ++#endif ++} ++ ++static inline void finish_task(struct task_struct *prev) ++{ ++#ifdef CONFIG_SMP ++ /* ++ * This must be the very last reference to @prev from this CPU. After ++ * p->on_cpu is cleared, the task can be moved to a different CPU. We ++ * must ensure this doesn't happen until the switch is completely ++ * finished. ++ * ++ * In particular, the load of prev->state in finish_task_switch() must ++ * happen before this. ++ * ++ * Pairs with the smp_cond_load_acquire() in try_to_wake_up(). ++ */ ++ smp_store_release(&prev->on_cpu, 0); ++#endif ++} ++ ++#ifdef CONFIG_SMP ++ ++static void do_balance_callbacks(struct rq *rq, struct callback_head *head) ++{ ++ void (*func)(struct rq *rq); ++ struct callback_head *next; ++ ++ lockdep_assert_held(&rq->__lock); ++ ++ while (head) { ++ func = (void (*)(struct rq *))head->func; ++ next = head->next; ++ head->next = NULL; ++ head = next; ++ ++ func(rq); ++ } ++} ++ ++static inline struct callback_head *splice_balance_callbacks(struct rq *rq) ++{ ++ struct callback_head *head = rq->balance_callback; ++ ++ lockdep_assert_held(&rq->__lock); ++ if (head) { ++ rq->balance_callback = NULL; ++ rq->balance_flags &= ~BALANCE_WORK; ++ } ++ ++ return head; ++} ++ ++static void __balance_callbacks(struct rq *rq) ++{ ++ do_balance_callbacks(rq, splice_balance_callbacks(rq)); ++} ++ ++static inline void balance_callbacks(struct rq *rq, struct callback_head *head) ++{ ++ unsigned long flags; ++ ++ if (unlikely(head)) { ++ raw_spin_lock_irqsave(&rq->__lock, flags); ++ do_balance_callbacks(rq, head); ++ raw_spin_unlock_irqrestore(&rq->__lock, flags); ++ } ++} ++ ++static void balance_push(struct rq *rq); ++ ++static inline void balance_switch(struct rq *rq) + { +- if (static_branch_unlikely(&preempt_notifier_key)) +- __fire_sched_out_preempt_notifiers(curr, next); ++ if (likely(!rq->balance_flags)) ++ return; ++ ++ if (rq->balance_flags & BALANCE_PUSH) { ++ balance_push(rq); ++ return; ++ } ++ ++ __balance_callbacks(rq); + } + +-#else /* !CONFIG_PREEMPT_NOTIFIERS */ ++#else + +-static inline void fire_sched_in_preempt_notifiers(struct task_struct *curr) ++static inline void __balance_callbacks(struct rq *rq) + { + } + +-static inline void +-fire_sched_out_preempt_notifiers(struct task_struct *curr, +- struct task_struct *next) ++static inline struct callback_head *splice_balance_callbacks(struct rq *rq) + { ++ return NULL; + } + +-#endif /* CONFIG_PREEMPT_NOTIFIERS */ +- +-static inline void prepare_task(struct task_struct *next) ++static inline void balance_callbacks(struct rq *rq, struct callback_head *head) + { +-#ifdef CONFIG_SMP +- /* +- * Claim the task as running, we do this before switching to it +- * such that any running task will have this set. +- * +- * See the smp_load_acquire(&p->on_cpu) case in ttwu() and +- * its ordering comment. +- */ +- WRITE_ONCE(next->on_cpu, 1); +-#endif + } + +-static inline void finish_task(struct task_struct *prev) ++static inline void balance_switch(struct rq *rq) + { +-#ifdef CONFIG_SMP +- /* +- * This must be the very last reference to @prev from this CPU. After +- * p->on_cpu is cleared, the task can be moved to a different CPU. We +- * must ensure this doesn't happen until the switch is completely +- * finished. +- * +- * In particular, the load of prev->state in finish_task_switch() must +- * happen before this. +- * +- * Pairs with the smp_cond_load_acquire() in try_to_wake_up(). +- */ +- smp_store_release(&prev->on_cpu, 0); +-#endif + } + ++#endif ++ ++ + static inline void + prepare_lock_switch(struct rq *rq, struct task_struct *next, struct rq_flags *rf) + { +@@ -3965,6 +4625,22 @@ static inline void finish_lock_switch(struct rq *rq) + # define finish_arch_post_lock_switch() do { } while (0) + #endif + ++static inline void kmap_local_sched_out(void) ++{ ++#ifdef CONFIG_KMAP_LOCAL ++ if (unlikely(current->kmap_ctrl.idx)) ++ __kmap_local_sched_out(); ++#endif ++} ++ ++static inline void kmap_local_sched_in(void) ++{ ++#ifdef CONFIG_KMAP_LOCAL ++ if (unlikely(current->kmap_ctrl.idx)) ++ __kmap_local_sched_in(); ++#endif ++} ++ + /** + * prepare_task_switch - prepare to switch tasks + * @rq: the runqueue preparing to switch +@@ -3987,6 +4663,7 @@ prepare_task_switch(struct rq *rq, struct task_struct *prev, + perf_event_task_sched_out(prev, next); + rseq_preempt(prev); + fire_sched_out_preempt_notifiers(prev, next); ++ kmap_local_sched_out(); + prepare_task(next); + prepare_arch_switch(next); + } +@@ -4054,6 +4731,7 @@ static struct rq *finish_task_switch(struct task_struct *prev) + finish_lock_switch(rq); + finish_arch_post_lock_switch(); + kcov_finish_switch(current); ++ kmap_local_sched_in(); + + fire_sched_in_preempt_notifiers(current); + /* +@@ -4070,63 +4748,19 @@ static struct rq *finish_task_switch(struct task_struct *prev) + */ + if (mm) { + membarrier_mm_sync_core_before_usermode(mm); +- mmdrop(mm); ++ mmdrop_delayed(mm); + } + if (unlikely(prev_state == TASK_DEAD)) { + if (prev->sched_class->task_dead) + prev->sched_class->task_dead(prev); + +- /* +- * Remove function-return probe instances associated with this +- * task and put them back on the free list. +- */ +- kprobe_flush_task(prev); +- +- /* Task is done with its stack. */ +- put_task_stack(prev); +- + put_task_struct_rcu_user(prev); + } + + return rq; + } + +-#ifdef CONFIG_SMP +- +-/* rq->lock is NOT held, but preemption is disabled */ +-static void __balance_callback(struct rq *rq) +-{ +- struct callback_head *head, *next; +- void (*func)(struct rq *rq); +- unsigned long flags; +- +- raw_spin_rq_lock_irqsave(rq, flags); +- head = rq->balance_callback; +- rq->balance_callback = NULL; +- while (head) { +- func = (void (*)(struct rq *))head->func; +- next = head->next; +- head->next = NULL; +- head = next; +- +- func(rq); +- } +- raw_spin_rq_unlock_irqrestore(rq, flags); +-} +- +-static inline void balance_callback(struct rq *rq) +-{ +- if (unlikely(rq->balance_callback)) +- __balance_callback(rq); +-} +- +-#else +- +-static inline void balance_callback(struct rq *rq) +-{ +-} + +-#endif + + /** + * schedule_tail - first thing a freshly forked thread must call. +@@ -4147,7 +4781,6 @@ asmlinkage __visible void schedule_tail(struct task_struct *prev) + */ + + rq = finish_task_switch(prev); +- balance_callback(rq); + preempt_enable(); + + if (current->set_child_tid) +@@ -5303,7 +5936,7 @@ pick_next_task(struct rq *rq, struct task_struct *prev, struct rq_flags *rf) + * + * WARNING: must be called with preemption disabled! + */ +-static void __sched notrace __schedule(bool preempt) ++static void __sched notrace __schedule(bool preempt, bool spinning_lock) + { + struct task_struct *prev, *next; + unsigned long *switch_count; +@@ -5356,7 +5989,7 @@ static void __sched notrace __schedule(bool preempt) + * - ptrace_{,un}freeze_traced() can change ->state underneath us. + */ + prev_state = prev->state; +- if (!preempt && prev_state) { ++ if ((!preempt || spinning_lock) && prev_state) { + if (signal_pending_state(prev_state, prev)) { + prev->state = TASK_RUNNING; + } else { +@@ -5391,6 +6024,7 @@ static void __sched notrace __schedule(bool preempt) + + next = pick_next_task(rq, prev, &rf); + clear_tsk_need_resched(prev); ++ clear_tsk_need_resched_lazy(prev); + clear_preempt_need_resched(); + + if (likely(prev != next)) { +@@ -5416,6 +6050,7 @@ static void __sched notrace __schedule(bool preempt) + */ + ++*switch_count; + ++ migrate_disable_switch(rq, prev); + psi_sched_switch(prev, next, !task_on_rq_queued(prev)); + + trace_sched_switch(preempt, prev, next); +@@ -5424,10 +6059,11 @@ static void __sched notrace __schedule(bool preempt) + rq = context_switch(rq, prev, next, &rf); + } else { + rq->clock_update_flags &= ~(RQCF_ACT_SKIP|RQCF_REQ_SKIP); +- rq_unlock_irq(rq, &rf); +- } + +- balance_callback(rq); ++ rq_unpin_lock(rq, &rf); ++ __balance_callbacks(rq); ++ raw_spin_unlock_irq(&rq->__lock); ++ } + } + + void __noreturn do_task_dead(void) +@@ -5438,7 +6074,7 @@ void __noreturn do_task_dead(void) + /* Tell freezer to ignore us: */ + current->flags |= PF_NOFREEZE; + +- __schedule(false); ++ __schedule(false, false); + BUG(); + + /* Avoid "noreturn function does return" - but don't continue if BUG() is a NOP: */ +@@ -5471,9 +6107,6 @@ static inline void sched_submit_work(struct task_struct *tsk) + preempt_enable_no_resched(); + } + +- if (tsk_is_pi_blocked(tsk)) +- return; +- + /* + * If we are going to sleep and we have plugged IO queued, + * make sure to submit it to avoid deadlocks. +@@ -5499,7 +6132,7 @@ asmlinkage __visible void __sched schedule(void) + sched_submit_work(tsk); + do { + preempt_disable(); +- __schedule(false); ++ __schedule(false, false); + sched_preempt_enable_no_resched(); + } while (need_resched()); + sched_update_worker(tsk); +@@ -5527,7 +6160,7 @@ void __sched schedule_idle(void) + */ + WARN_ON_ONCE(current->state); + do { +- __schedule(false); ++ __schedule(false, false); + } while (need_resched()); + } + +@@ -5580,7 +6213,7 @@ static void __sched notrace preempt_schedule_common(void) + */ + preempt_disable_notrace(); + preempt_latency_start(1); +- __schedule(true); ++ __schedule(true, false); + preempt_latency_stop(1); + preempt_enable_no_resched_notrace(); + +@@ -5591,6 +6224,30 @@ static void __sched notrace preempt_schedule_common(void) + } while (need_resched()); + } + ++#ifdef CONFIG_PREEMPT_LAZY ++/* ++ * If TIF_NEED_RESCHED is then we allow to be scheduled away since this is ++ * set by a RT task. Oterwise we try to avoid beeing scheduled out as long as ++ * preempt_lazy_count counter >0. ++ */ ++static __always_inline int preemptible_lazy(void) ++{ ++ if (test_thread_flag(TIF_NEED_RESCHED)) ++ return 1; ++ if (current_thread_info()->preempt_lazy_count) ++ return 0; ++ return 1; ++} ++ ++#else ++ ++static inline int preemptible_lazy(void) ++{ ++ return 1; ++} ++ ++#endif ++ + #ifdef CONFIG_PREEMPTION + /* + * This is the entry point to schedule() from in-kernel preemption +@@ -5604,12 +6261,26 @@ asmlinkage __visible void __sched notrace preempt_schedule(void) + */ + if (likely(!preemptible())) + return; +- ++ if (!preemptible_lazy()) ++ return; + preempt_schedule_common(); + } + NOKPROBE_SYMBOL(preempt_schedule); + EXPORT_SYMBOL(preempt_schedule); + ++#ifdef CONFIG_PREEMPT_RT ++void __sched notrace preempt_schedule_lock(void) ++{ ++ do { ++ preempt_disable(); ++ __schedule(true, true); ++ sched_preempt_enable_no_resched(); ++ } while (need_resched()); ++} ++NOKPROBE_SYMBOL(preempt_schedule_lock); ++EXPORT_SYMBOL(preempt_schedule_lock); ++#endif ++ + #ifdef CONFIG_PREEMPT_DYNAMIC + DEFINE_STATIC_CALL(preempt_schedule, __preempt_schedule_func); + EXPORT_STATIC_CALL(preempt_schedule); +@@ -5637,6 +6308,9 @@ asmlinkage __visible void __sched notrace preempt_schedule_notrace(void) + if (likely(!preemptible())) + return; + ++ if (!preemptible_lazy()) ++ return; ++ + do { + /* + * Because the function tracer can trace preempt_count_sub() +@@ -5659,7 +6333,7 @@ asmlinkage __visible void __sched notrace preempt_schedule_notrace(void) + * an infinite recursion. + */ + prev_ctx = exception_enter(); +- __schedule(true); ++ __schedule(true, false); + exception_exit(prev_ctx); + + preempt_latency_stop(1); +@@ -5877,7 +6551,7 @@ asmlinkage __visible void __sched preempt_schedule_irq(void) + do { + preempt_disable(); + local_irq_enable(); +- __schedule(true); ++ __schedule(true, false); + local_irq_disable(); + sched_preempt_enable_no_resched(); + } while (need_resched()); +@@ -6043,9 +6717,11 @@ void rt_mutex_setprio(struct task_struct *p, struct task_struct *pi_task) + out_unlock: + /* Avoid rq from going away on us: */ + preempt_disable(); +- __task_rq_unlock(rq, &rf); + +- balance_callback(rq); ++ rq_unpin_lock(rq, &rf); ++ __balance_callbacks(rq); ++ raw_spin_unlock(&rq->__lock); ++ + preempt_enable(); + } + #else +@@ -6288,6 +6964,7 @@ static int __sched_setscheduler(struct task_struct *p, + int oldpolicy = -1, policy = attr->sched_policy; + int retval, oldprio, newprio, queued, running; + const struct sched_class *prev_class; ++ struct callback_head *head; + struct rq_flags rf; + int reset_on_fork; + int queue_flags = DEQUEUE_SAVE | DEQUEUE_MOVE | DEQUEUE_NOCLOCK; +@@ -6542,6 +7219,7 @@ static int __sched_setscheduler(struct task_struct *p, + + /* Avoid rq from going away on us: */ + preempt_disable(); ++ head = splice_balance_callbacks(rq); + task_rq_unlock(rq, p, &rf); + + if (pi) { +@@ -6550,7 +7228,7 @@ static int __sched_setscheduler(struct task_struct *p, + } + + /* Run balance callbacks after we've adjusted the PI chain: */ +- balance_callback(rq); ++ balance_callbacks(rq, head); + preempt_enable(); + + return 0; +@@ -7046,7 +7724,7 @@ long sched_setaffinity(pid_t pid, const struct cpumask *in_mask) + } + #endif + again: +- retval = __set_cpus_allowed_ptr(p, new_mask, true); ++ retval = __set_cpus_allowed_ptr(p, new_mask, SCA_CHECK); + + if (!retval) { + cpuset_cpus_allowed(p, cpus_allowed); +@@ -7632,7 +8310,7 @@ void __init init_idle(struct task_struct *idle, int cpu) + * + * And since this is boot we can forgo the serialization. + */ +- set_cpus_allowed_common(idle, cpumask_of(cpu)); ++ set_cpus_allowed_common(idle, cpumask_of(cpu), 0); + #endif + /* + * We're having a chicken and egg problem, even though we are +@@ -7659,7 +8337,9 @@ void __init init_idle(struct task_struct *idle, int cpu) + + /* Set the preempt count _outside_ the spinlocks! */ + init_idle_preempt_count(idle, cpu); +- ++#ifdef CONFIG_HAVE_PREEMPT_LAZY ++ task_thread_info(idle)->preempt_lazy_count = 0; ++#endif + /* + * The idle tasks have their own, simple scheduling class: + */ +@@ -7769,6 +8449,7 @@ void sched_setnuma(struct task_struct *p, int nid) + #endif /* CONFIG_NUMA_BALANCING */ + + #ifdef CONFIG_HOTPLUG_CPU ++ + /* + * Ensure that the idle task is using init_mm right before its CPU goes + * offline. +@@ -7788,119 +8469,126 @@ void idle_task_exit(void) + /* finish_cpu(), as ran on the BP, will clean up the active_mm state */ + } + +-/* +- * Since this CPU is going 'away' for a while, fold any nr_active delta +- * we might have. Assumes we're called after migrate_tasks() so that the +- * nr_active count is stable. We need to take the teardown thread which +- * is calling this into account, so we hand in adjust = 1 to the load +- * calculation. +- * +- * Also see the comment "Global load-average calculations". +- */ +-static void calc_load_migrate(struct rq *rq) ++static int __balance_push_cpu_stop(void *arg) + { +- long delta = calc_load_fold_active(rq, 1); +- if (delta) +- atomic_long_add(delta, &calc_load_tasks); +-} ++ struct task_struct *p = arg; ++ struct rq *rq = this_rq(); ++ struct rq_flags rf; ++ int cpu; + +-static struct task_struct *__pick_migrate_task(struct rq *rq) +-{ +- const struct sched_class *class; +- struct task_struct *next; ++ raw_spin_lock_irq(&p->pi_lock); ++ rq_lock(rq, &rf); + +- for_each_class(class) { +- next = class->pick_next_task(rq); +- if (next) { +- next->sched_class->put_prev_task(rq, next); +- return next; +- } ++ update_rq_clock(rq); ++ ++ if (task_rq(p) == rq && task_on_rq_queued(p)) { ++ cpu = select_fallback_rq(rq->cpu, p); ++ rq = __migrate_task(rq, &rf, p, cpu); + } + +- /* The idle class should always have a runnable task */ +- BUG(); ++ rq_unlock(rq, &rf); ++ raw_spin_unlock_irq(&p->pi_lock); ++ ++ put_task_struct(p); ++ ++ return 0; + } + ++static DEFINE_PER_CPU(struct cpu_stop_work, push_work); ++ + /* +- * Migrate all tasks from the rq, sleeping tasks will be migrated by +- * try_to_wake_up()->select_task_rq(). +- * +- * Called with rq->lock held even though we'er in stop_machine() and +- * there's no concurrency possible, we hold the required locks anyway +- * because of lock validation efforts. ++ * Ensure we only run per-cpu kthreads once the CPU goes !active. + */ +-static void migrate_tasks(struct rq *dead_rq, struct rq_flags *rf) ++static void balance_push(struct rq *rq) + { +- struct rq *rq = dead_rq; +- struct task_struct *next, *stop = rq->stop; +- struct rq_flags orf = *rf; +- int dest_cpu; ++ struct task_struct *push_task = rq->curr; ++ ++ lockdep_assert_held(&rq->__lock); ++ SCHED_WARN_ON(rq->cpu != smp_processor_id()); + + /* +- * Fudge the rq selection such that the below task selection loop +- * doesn't get stuck on the currently eligible stop task. +- * +- * We're currently inside stop_machine() and the rq is either stuck +- * in the stop_machine_cpu_stop() loop, or we're executing this code, +- * either way we should never end up calling schedule() until we're +- * done here. ++ * Both the cpu-hotplug and stop task are in this case and are ++ * required to complete the hotplug process. + */ +- rq->stop = NULL; ++ if (is_per_cpu_kthread(push_task) || is_migration_disabled(push_task)) { ++ /* ++ * If this is the idle task on the outgoing CPU try to wake ++ * up the hotplug control thread which might wait for the ++ * last task to vanish. The rcuwait_active() check is ++ * accurate here because the waiter is pinned on this CPU ++ * and can't obviously be running in parallel. ++ * ++ * On RT kernels this also has to check whether there are ++ * pinned and scheduled out tasks on the runqueue. They ++ * need to leave the migrate disabled section first. ++ */ ++ if (!rq->nr_running && !rq_has_pinned_tasks(rq) && ++ rcuwait_active(&rq->hotplug_wait)) { ++ raw_spin_unlock(&rq->__lock); ++ rcuwait_wake_up(&rq->hotplug_wait); ++ raw_spin_lock(&rq->__lock); ++ } ++ return; ++ } + ++ get_task_struct(push_task); + /* +- * put_prev_task() and pick_next_task() sched +- * class method both need to have an up-to-date +- * value of rq->clock[_task] ++ * Temporarily drop rq->lock such that we can wake-up the stop task. ++ * Both preemption and IRQs are still disabled. + */ +- update_rq_clock(rq); ++ raw_spin_unlock(&rq->__lock); ++ stop_one_cpu_nowait(rq->cpu, __balance_push_cpu_stop, push_task, ++ this_cpu_ptr(&push_work)); ++ /* ++ * At this point need_resched() is true and we'll take the loop in ++ * schedule(). The next pick is obviously going to be the stop task ++ * which is_per_cpu_kthread() and will push this task away. ++ */ ++ raw_spin_lock(&rq->__lock); ++} + +- for (;;) { +- /* +- * There's this thread running, bail when that's the only +- * remaining thread: +- */ +- if (rq->nr_running == 1) +- break; ++static void balance_push_set(int cpu, bool on) ++{ ++ struct rq *rq = cpu_rq(cpu); ++ struct rq_flags rf; + +- next = __pick_migrate_task(rq); ++ rq_lock_irqsave(rq, &rf); ++ if (on) ++ rq->balance_flags |= BALANCE_PUSH; ++ else ++ rq->balance_flags &= ~BALANCE_PUSH; ++ rq_unlock_irqrestore(rq, &rf); ++} + +- /* +- * Rules for changing task_struct::cpus_mask are holding +- * both pi_lock and rq->lock, such that holding either +- * stabilizes the mask. +- * +- * Drop rq->lock is not quite as disastrous as it usually is +- * because !cpu_active at this point, which means load-balance +- * will not interfere. Also, stop-machine. +- */ +- rq_unlock(rq, rf); +- raw_spin_lock(&next->pi_lock); +- rq_relock(rq, rf); ++/* ++ * Invoked from a CPUs hotplug control thread after the CPU has been marked ++ * inactive. All tasks which are not per CPU kernel threads are either ++ * pushed off this CPU now via balance_push() or placed on a different CPU ++ * during wakeup. Wait until the CPU is quiescent. ++ */ ++static void balance_hotplug_wait(void) ++{ ++ struct rq *rq = this_rq(); + +- /* +- * Since we're inside stop-machine, _nothing_ should have +- * changed the task, WARN if weird stuff happened, because in +- * that case the above rq->lock drop is a fail too. +- */ +- if (WARN_ON(task_rq(next) != rq || !task_on_rq_queued(next))) { +- raw_spin_unlock(&next->pi_lock); +- continue; +- } ++ rcuwait_wait_event(&rq->hotplug_wait, ++ rq->nr_running == 1 && !rq_has_pinned_tasks(rq), ++ TASK_UNINTERRUPTIBLE); ++} + +- /* Find suitable destination for @next, with force if needed. */ +- dest_cpu = select_fallback_rq(dead_rq->cpu, next); +- rq = __migrate_task(rq, rf, next, dest_cpu); +- if (rq != dead_rq) { +- rq_unlock(rq, rf); +- rq = dead_rq; +- *rf = orf; +- rq_relock(rq, rf); +- } +- raw_spin_unlock(&next->pi_lock); +- } ++#else ++ ++static inline void balance_push(struct rq *rq) ++{ ++} + +- rq->stop = stop; ++static inline void balance_push_set(int cpu, bool on) ++{ ++} ++ ++static inline void balance_hotplug_wait(void) ++{ + } ++ + #endif /* CONFIG_HOTPLUG_CPU */ + + void set_rq_online(struct rq *rq) +@@ -7988,6 +8676,8 @@ int sched_cpu_activate(unsigned int cpu) + struct rq *rq = cpu_rq(cpu); + struct rq_flags rf; + ++ balance_push_set(cpu, false); ++ + #ifdef CONFIG_SCHED_SMT + /* + * When going up, increment the number of cores with SMT present. +@@ -8023,6 +8713,8 @@ int sched_cpu_activate(unsigned int cpu) + + int sched_cpu_deactivate(unsigned int cpu) + { ++ struct rq *rq = cpu_rq(cpu); ++ struct rq_flags rf; + int ret; + + set_cpu_active(cpu, false); +@@ -8035,6 +8727,16 @@ int sched_cpu_deactivate(unsigned int cpu) + */ + synchronize_rcu(); + ++ balance_push_set(cpu, true); ++ ++ rq_lock_irqsave(rq, &rf); ++ if (rq->rd) { ++ update_rq_clock(rq); ++ BUG_ON(!cpumask_test_cpu(cpu, rq->rd->span)); ++ set_rq_offline(rq); ++ } ++ rq_unlock_irqrestore(rq, &rf); ++ + #ifdef CONFIG_SCHED_SMT + /* + * When going down, decrement the number of cores with SMT present. +@@ -8074,6 +8776,41 @@ int sched_cpu_starting(unsigned int cpu) + } + + #ifdef CONFIG_HOTPLUG_CPU ++ ++/* ++ * Invoked immediately before the stopper thread is invoked to bring the ++ * CPU down completely. At this point all per CPU kthreads except the ++ * hotplug thread (current) and the stopper thread (inactive) have been ++ * either parked or have been unbound from the outgoing CPU. Ensure that ++ * any of those which might be on the way out are gone. ++ * ++ * If after this point a bound task is being woken on this CPU then the ++ * responsible hotplug callback has failed to do it's job. ++ * sched_cpu_dying() will catch it with the appropriate fireworks. ++ */ ++int sched_cpu_wait_empty(unsigned int cpu) ++{ ++ balance_hotplug_wait(); ++ return 0; ++} ++ ++/* ++ * Since this CPU is going 'away' for a while, fold any nr_active delta we ++ * might have. Called from the CPU stopper task after ensuring that the ++ * stopper is the last running task on the CPU, so nr_active count is ++ * stable. We need to take the teardown thread which is calling this into ++ * account, so we hand in adjust = 1 to the load calculation. ++ * ++ * Also see the comment "Global load-average calculations". ++ */ ++static void calc_load_migrate(struct rq *rq) ++{ ++ long delta = calc_load_fold_active(rq, 1); ++ ++ if (delta) ++ atomic_long_add(delta, &calc_load_tasks); ++} ++ + int sched_cpu_dying(unsigned int cpu) + { + struct rq *rq = cpu_rq(cpu); +@@ -8083,12 +8820,7 @@ int sched_cpu_dying(unsigned int cpu) + sched_tick_stop(cpu); + + rq_lock_irqsave(rq, &rf); +- if (rq->rd) { +- BUG_ON(!cpumask_test_cpu(cpu, rq->rd->span)); +- set_rq_offline(rq); +- } +- migrate_tasks(rq, &rf); +- BUG_ON(rq->nr_running != 1); ++ BUG_ON(rq->nr_running != 1 || rq_has_pinned_tasks(rq)); + rq_unlock_irqrestore(rq, &rf); + + calc_load_migrate(rq); +@@ -8303,6 +9035,9 @@ void __init sched_init(void) + + INIT_CSD(&rq->nohz_csd, nohz_csd_func, rq); + #endif ++#ifdef CONFIG_HOTPLUG_CPU ++ rcuwait_init(&rq->hotplug_wait); ++#endif + #endif /* CONFIG_SMP */ + hrtick_rq_init(rq); + atomic_set(&rq->nr_iowait, 0); +@@ -8353,7 +9088,7 @@ void __init sched_init(void) + #ifdef CONFIG_DEBUG_ATOMIC_SLEEP + static inline int preempt_count_equals(int preempt_offset) + { +- int nested = preempt_count() + rcu_preempt_depth(); ++ int nested = preempt_count() + sched_rcu_preempt_depth(); + + return (nested == preempt_offset); + } +@@ -8450,6 +9185,39 @@ void __cant_sleep(const char *file, int line, int preempt_offset) + add_taint(TAINT_WARN, LOCKDEP_STILL_OK); + } + EXPORT_SYMBOL_GPL(__cant_sleep); ++ ++#ifdef CONFIG_SMP ++void __cant_migrate(const char *file, int line) ++{ ++ static unsigned long prev_jiffy; ++ ++ if (irqs_disabled()) ++ return; ++ ++ if (is_migration_disabled(current)) ++ return; ++ ++ if (!IS_ENABLED(CONFIG_PREEMPT_COUNT)) ++ return; ++ ++ if (preempt_count() > 0) ++ return; ++ ++ if (time_before(jiffies, prev_jiffy + HZ) && prev_jiffy) ++ return; ++ prev_jiffy = jiffies; ++ ++ pr_err("BUG: assuming non migratable context at %s:%d\n", file, line); ++ pr_err("in_atomic(): %d, irqs_disabled(): %d, migration_disabled() %u pid: %d, name: %s\n", ++ in_atomic(), irqs_disabled(), is_migration_disabled(current), ++ current->pid, current->comm); ++ ++ debug_show_held_locks(current); ++ dump_stack(); ++ add_taint(TAINT_WARN, LOCKDEP_STILL_OK); ++} ++EXPORT_SYMBOL_GPL(__cant_migrate); ++#endif + #endif + + #ifdef CONFIG_MAGIC_SYSRQ +diff --git a/kernel/sched/cpudeadline.c b/kernel/sched/cpudeadline.c +index 8cb06c8c7..ceb03d76c 100644 +--- a/kernel/sched/cpudeadline.c ++++ b/kernel/sched/cpudeadline.c +@@ -120,7 +120,7 @@ int cpudl_find(struct cpudl *cp, struct task_struct *p, + const struct sched_dl_entity *dl_se = &p->dl; + + if (later_mask && +- cpumask_and(later_mask, cp->free_cpus, p->cpus_ptr)) { ++ cpumask_and(later_mask, cp->free_cpus, &p->cpus_mask)) { + unsigned long cap, max_cap = 0; + int cpu, max_cpu = -1; + +@@ -151,7 +151,7 @@ int cpudl_find(struct cpudl *cp, struct task_struct *p, + + WARN_ON(best_cpu != -1 && !cpu_present(best_cpu)); + +- if (cpumask_test_cpu(best_cpu, p->cpus_ptr) && ++ if (cpumask_test_cpu(best_cpu, &p->cpus_mask) && + dl_time_before(dl_se->deadline, cp->elements[0].dl)) { + if (later_mask) + cpumask_set_cpu(best_cpu, later_mask); +diff --git a/kernel/sched/cpupri.c b/kernel/sched/cpupri.c +index 0033731a0..11c4df201 100644 +--- a/kernel/sched/cpupri.c ++++ b/kernel/sched/cpupri.c +@@ -73,11 +73,11 @@ static inline int __cpupri_find(struct cpupri *cp, struct task_struct *p, + if (skip) + return 0; + +- if (cpumask_any_and(p->cpus_ptr, vec->mask) >= nr_cpu_ids) ++ if (cpumask_any_and(&p->cpus_mask, vec->mask) >= nr_cpu_ids) + return 0; + + if (lowest_mask) { +- cpumask_and(lowest_mask, p->cpus_ptr, vec->mask); ++ cpumask_and(lowest_mask, &p->cpus_mask, vec->mask); + + /* + * We have to ensure that we have at least one bit +diff --git a/kernel/sched/cputime.c b/kernel/sched/cputime.c +index ca0eef7d3..02a5aa60f 100644 +--- a/kernel/sched/cputime.c ++++ b/kernel/sched/cputime.c +@@ -44,12 +44,13 @@ static void irqtime_account_delta(struct irqtime *irqtime, u64 delta, + } + + /* +- * Called before incrementing preempt_count on {soft,}irq_enter ++ * Called after incrementing preempt_count on {soft,}irq_enter + * and before decrementing preempt_count on {soft,}irq_exit. + */ +-void irqtime_account_irq(struct task_struct *curr) ++void irqtime_account_irq(struct task_struct *curr, unsigned int offset) + { + struct irqtime *irqtime = this_cpu_ptr(&cpu_irqtime); ++ unsigned int pc; + s64 delta; + int cpu; + +@@ -59,6 +60,7 @@ void irqtime_account_irq(struct task_struct *curr) + cpu = smp_processor_id(); + delta = sched_clock_cpu(cpu) - irqtime->irq_start_time; + irqtime->irq_start_time += delta; ++ pc = irq_count() - offset; + + /* + * We do not account for softirq time from ksoftirqd here. +@@ -66,12 +68,11 @@ void irqtime_account_irq(struct task_struct *curr) + * in that case, so as not to confuse scheduler with a special task + * that do not consume any time, but still wants to run. + */ +- if (hardirq_count()) ++ if (pc & HARDIRQ_MASK) + irqtime_account_delta(irqtime, delta, CPUTIME_IRQ); +- else if (in_serving_softirq() && curr != this_cpu_ksoftirqd()) ++ else if ((pc & SOFTIRQ_OFFSET) && curr != this_cpu_ksoftirqd()) + irqtime_account_delta(irqtime, delta, CPUTIME_SOFTIRQ); + } +-EXPORT_SYMBOL_GPL(irqtime_account_irq); + + static u64 irqtime_tick_accounted(u64 maxtime) + { +@@ -418,24 +419,21 @@ void vtime_task_switch(struct task_struct *prev) + } + # endif + +-/* +- * Archs that account the whole time spent in the idle task +- * (outside irq) as idle time can rely on this and just implement +- * vtime_account_kernel() and vtime_account_idle(). Archs that +- * have other meaning of the idle time (s390 only includes the +- * time spent by the CPU when it's in low power mode) must override +- * vtime_account(). +- */ +-#ifndef __ARCH_HAS_VTIME_ACCOUNT +-void vtime_account_irq_enter(struct task_struct *tsk) ++void vtime_account_irq(struct task_struct *tsk, unsigned int offset) + { +- if (!in_interrupt() && is_idle_task(tsk)) ++ unsigned int pc = irq_count() - offset; ++ ++ if (pc & HARDIRQ_OFFSET) { ++ vtime_account_hardirq(tsk); ++ } else if (pc & SOFTIRQ_OFFSET) { ++ vtime_account_softirq(tsk); ++ } else if (!IS_ENABLED(CONFIG_HAVE_VIRT_CPU_ACCOUNTING_IDLE) && ++ is_idle_task(tsk)) { + vtime_account_idle(tsk); +- else ++ } else { + vtime_account_kernel(tsk); ++ } + } +-EXPORT_SYMBOL_GPL(vtime_account_irq_enter); +-#endif /* __ARCH_HAS_VTIME_ACCOUNT */ + + void cputime_adjust(struct task_cputime *curr, struct prev_cputime *prev, + u64 *ut, u64 *st) +diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c +index c4c0d760d..14252d5be 100644 +--- a/kernel/sched/deadline.c ++++ b/kernel/sched/deadline.c +@@ -551,7 +551,7 @@ static int push_dl_task(struct rq *rq); + + static inline bool need_pull_dl_task(struct rq *rq, struct task_struct *prev) + { +- return dl_task(prev); ++ return rq->online && dl_task(prev); + } + + static DEFINE_PER_CPU(struct callback_head, dl_push_head); +@@ -1913,7 +1913,7 @@ static void task_fork_dl(struct task_struct *p) + static int pick_dl_task(struct rq *rq, struct task_struct *p, int cpu) + { + if (!task_running(rq, p) && +- cpumask_test_cpu(cpu, p->cpus_ptr)) ++ cpumask_test_cpu(cpu, &p->cpus_mask)) + return 1; + return 0; + } +@@ -2003,8 +2003,8 @@ static int find_later_rq(struct task_struct *task) + return this_cpu; + } + +- best_cpu = cpumask_first_and(later_mask, +- sched_domain_span(sd)); ++ best_cpu = cpumask_any_and_distribute(later_mask, ++ sched_domain_span(sd)); + /* + * Last chance: if a CPU being in both later_mask + * and current sd span is valid, that becomes our +@@ -2026,7 +2026,7 @@ static int find_later_rq(struct task_struct *task) + if (this_cpu != -1) + return this_cpu; + +- cpu = cpumask_any(later_mask); ++ cpu = cpumask_any_distribute(later_mask); + if (cpu < nr_cpu_ids) + return cpu; + +@@ -2091,7 +2091,7 @@ static struct rq *find_lock_later_rq(struct task_struct *task, struct rq *rq) + */ + next_task = pick_next_pushable_dl_task(rq); + if (unlikely(next_task != task || +- !cpumask_test_cpu(later_rq->cpu, task->cpus_ptr))) { ++ !cpumask_test_cpu(later_rq->cpu, &task->cpus_mask))) { + double_unlock_balance(rq, later_rq); + later_rq = NULL; + break; +@@ -2135,6 +2135,9 @@ static int push_dl_task(struct rq *rq) + return 0; + + retry: ++ if (is_migration_disabled(next_task)) ++ return 0; ++ + if (WARN_ON(next_task == rq->curr)) + return 0; + +@@ -2212,7 +2215,7 @@ static void push_dl_tasks(struct rq *rq) + static void pull_dl_task(struct rq *this_rq) + { + int this_cpu = this_rq->cpu, cpu; +- struct task_struct *p; ++ struct task_struct *p, *push_task; + bool resched = false; + struct rq *src_rq; + u64 dmin = LONG_MAX; +@@ -2242,6 +2245,7 @@ static void pull_dl_task(struct rq *this_rq) + continue; + + /* Might drop this_rq->lock */ ++ push_task = NULL; + double_lock_balance(this_rq, src_rq); + + /* +@@ -2273,17 +2277,28 @@ static void pull_dl_task(struct rq *this_rq) + src_rq->curr->dl.deadline)) + goto skip; + +- resched = true; +- +- deactivate_task(src_rq, p, 0); +- set_task_cpu(p, this_cpu); +- activate_task(this_rq, p, 0); +- dmin = p->dl.deadline; ++ if (is_migration_disabled(p)) { ++ trace_sched_migrate_pull_tp(p); ++ push_task = get_push_task(src_rq); ++ } else { ++ deactivate_task(src_rq, p, 0); ++ set_task_cpu(p, this_cpu); ++ activate_task(this_rq, p, 0); ++ dmin = p->dl.deadline; ++ resched = true; ++ } + + /* Is there any other task even earlier? */ + } + skip: + double_unlock_balance(this_rq, src_rq); ++ ++ if (push_task) { ++ raw_spin_unlock(&this_rq->__lock); ++ stop_one_cpu_nowait(src_rq->cpu, push_cpu_stop, ++ push_task, &src_rq->push_work); ++ raw_spin_lock(&this_rq->__lock); ++ } + } + + if (resched) +@@ -2307,7 +2322,8 @@ static void task_woken_dl(struct rq *rq, struct task_struct *p) + } + + static void set_cpus_allowed_dl(struct task_struct *p, +- const struct cpumask *new_mask) ++ const struct cpumask *new_mask, ++ u32 flags) + { + struct root_domain *src_rd; + struct rq *rq; +@@ -2336,7 +2352,7 @@ static void set_cpus_allowed_dl(struct task_struct *p, + raw_spin_unlock(&src_dl_b->lock); + } + +- set_cpus_allowed_common(p, new_mask); ++ set_cpus_allowed_common(p, new_mask, flags); + } + + /* Assumes rq->lock is held */ +@@ -2532,6 +2548,7 @@ const struct sched_class dl_sched_class + .rq_online = rq_online_dl, + .rq_offline = rq_offline_dl, + .task_woken = task_woken_dl, ++ .find_lock_rq = find_lock_later_rq, + #endif + + .task_tick = task_tick_dl, +diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c +index 2ea70af5c..d5bcbb24c 100644 +--- a/kernel/sched/fair.c ++++ b/kernel/sched/fair.c +@@ -4670,7 +4670,7 @@ check_preempt_tick(struct cfs_rq *cfs_rq, struct sched_entity *curr) + #endif + + if (delta_exec > ideal_runtime) { +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + /* + * The current task ran long enough, ensure it doesn't get + * re-elected due to buddy favours. +@@ -4694,7 +4694,7 @@ check_preempt_tick(struct cfs_rq *cfs_rq, struct sched_entity *curr) + return; + + if (delta > ideal_runtime) +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + } + + static void +@@ -4837,7 +4837,7 @@ entity_tick(struct cfs_rq *cfs_rq, struct sched_entity *curr, int queued) + * validating it and just reschedule. + */ + if (queued) { +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + return; + } + /* +@@ -4986,7 +4986,7 @@ static void __account_cfs_rq_runtime(struct cfs_rq *cfs_rq, u64 delta_exec) + * hierarchy can be throttled + */ + if (!assign_cfs_rq_runtime(cfs_rq) && likely(cfs_rq->curr)) +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + } + + static __always_inline +@@ -5767,7 +5767,7 @@ static void hrtick_start_fair(struct rq *rq, struct task_struct *p) + + if (delta < 0) { + if (rq->curr == p) +- resched_curr(rq); ++ resched_curr_lazy(rq); + return; + } + hrtick_start(rq, delta); +@@ -7690,7 +7690,7 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p, int wake_ + return; + + preempt: +- resched_curr(rq); ++ resched_curr_lazy(rq); + /* + * Only set the backward buddy when the current task is still + * on the rq. This can happen when a wakeup gets interleaved +@@ -12533,7 +12533,7 @@ static void task_fork_fair(struct task_struct *p) + * 'current' within the tree based on its new key value. + */ + swap(curr->vruntime, se->vruntime); +- resched_curr(rq); ++ resched_curr_lazy(rq); + } + + se->vruntime -= cfs_rq->min_vruntime; +@@ -12560,7 +12560,7 @@ prio_changed_fair(struct rq *rq, struct task_struct *p, int oldprio) + */ + if (rq->curr == p) { + if (p->prio > oldprio) +- resched_curr(rq); ++ resched_curr_lazy(rq); + } else + check_preempt_curr(rq, p, 0); + } +diff --git a/kernel/sched/features.h b/kernel/sched/features.h +index fef48f5be..f8a556887 100644 +--- a/kernel/sched/features.h ++++ b/kernel/sched/features.h +@@ -45,11 +45,19 @@ SCHED_FEAT(DOUBLE_TICK, false) + */ + SCHED_FEAT(NONTASK_CAPACITY, true) + ++#ifdef CONFIG_PREEMPT_RT ++SCHED_FEAT(TTWU_QUEUE, false) ++# ifdef CONFIG_PREEMPT_LAZY ++SCHED_FEAT(PREEMPT_LAZY, true) ++# endif ++#else ++ + /* + * Queue remote wakeups on the target CPU and process them + * using the scheduler IPI. Reduces rq->lock contention/bounces. + */ + SCHED_FEAT(TTWU_QUEUE, true) ++#endif + + /* + * When doing wakeups, attempt to limit superfluous scans of the LLC domain. +diff --git a/kernel/sched/rt.c b/kernel/sched/rt.c +index 0f349d8d0..9cfb0948e 100644 +--- a/kernel/sched/rt.c ++++ b/kernel/sched/rt.c +@@ -270,7 +270,7 @@ static void pull_rt_task(struct rq *this_rq); + static inline bool need_pull_rt_task(struct rq *rq, struct task_struct *prev) + { + /* Try to pull RT tasks here if we lower this rq's prio */ +- return rq->rt.highest_prio.curr > prev->prio; ++ return rq->online && rq->rt.highest_prio.curr > prev->prio; + } + + static inline int rt_overloaded(struct rq *rq) +@@ -1679,7 +1679,7 @@ static void put_prev_task_rt(struct rq *rq, struct task_struct *p) + static int pick_rt_task(struct rq *rq, struct task_struct *p, int cpu) + { + if (!task_running(rq, p) && +- cpumask_test_cpu(cpu, p->cpus_ptr)) ++ cpumask_test_cpu(cpu, &p->cpus_mask)) + return 1; + + return 0; +@@ -1773,8 +1773,8 @@ static int find_lowest_rq(struct task_struct *task) + return this_cpu; + } + +- best_cpu = cpumask_first_and(lowest_mask, +- sched_domain_span(sd)); ++ best_cpu = cpumask_any_and_distribute(lowest_mask, ++ sched_domain_span(sd)); + if (best_cpu < nr_cpu_ids) { + rcu_read_unlock(); + return best_cpu; +@@ -1791,7 +1791,7 @@ static int find_lowest_rq(struct task_struct *task) + if (this_cpu != -1) + return this_cpu; + +- cpu = cpumask_any(lowest_mask); ++ cpu = cpumask_any_distribute(lowest_mask); + if (cpu < nr_cpu_ids) + return cpu; + +@@ -1852,7 +1852,7 @@ static struct rq *find_lock_lowest_rq(struct task_struct *task, struct rq *rq) + */ + struct task_struct *next_task = pick_next_pushable_task(rq); + if (unlikely(next_task != task || +- !cpumask_test_cpu(lowest_rq->cpu, task->cpus_ptr))) { ++ !cpumask_test_cpu(lowest_rq->cpu, &task->cpus_mask))) { + double_unlock_balance(rq, lowest_rq); + lowest_rq = NULL; + break; +@@ -1876,7 +1876,7 @@ static struct rq *find_lock_lowest_rq(struct task_struct *task, struct rq *rq) + * running task can migrate over to a CPU that is running a task + * of lesser priority. + */ +-static int push_rt_task(struct rq *rq) ++static int push_rt_task(struct rq *rq, bool pull) + { + struct task_struct *next_task; + struct rq *lowest_rq; +@@ -1890,6 +1890,39 @@ static int push_rt_task(struct rq *rq) + return 0; + + retry: ++ if (is_migration_disabled(next_task)) { ++ struct task_struct *push_task = NULL; ++ int cpu; ++ ++ if (!pull) ++ return 0; ++ ++ trace_sched_migrate_pull_tp(next_task); ++ ++ if (rq->push_busy) ++ return 0; ++ ++ cpu = find_lowest_rq(rq->curr); ++ if (cpu == -1 || cpu == rq->cpu) ++ return 0; ++ ++ /* ++ * Given we found a CPU with lower priority than @next_task, ++ * therefore it should be running. However we cannot migrate it ++ * to this other CPU, instead attempt to push the current ++ * running task on this CPU away. ++ */ ++ push_task = get_push_task(rq); ++ if (push_task) { ++ raw_spin_unlock(&rq->__lock); ++ stop_one_cpu_nowait(rq->cpu, push_cpu_stop, ++ push_task, &rq->push_work); ++ raw_spin_lock(&rq->__lock); ++ } ++ ++ return 0; ++ } ++ + if (WARN_ON(next_task == rq->curr)) + return 0; + +@@ -1944,12 +1977,10 @@ static int push_rt_task(struct rq *rq) + deactivate_task(rq, next_task, 0); + set_task_cpu(next_task, lowest_rq->cpu); + activate_task(lowest_rq, next_task, 0); +- ret = 1; +- + resched_curr(lowest_rq); ++ ret = 1; + + double_unlock_balance(rq, lowest_rq); +- + out: + put_task_struct(next_task); + +@@ -1959,7 +1990,7 @@ static int push_rt_task(struct rq *rq) + static void push_rt_tasks(struct rq *rq) + { + /* push_rt_task will return true if it moved an RT */ +- while (push_rt_task(rq)) ++ while (push_rt_task(rq, false)) + ; + } + +@@ -2112,7 +2143,10 @@ void rto_push_irq_work_func(struct irq_work *work) + */ + if (has_pushable_tasks(rq)) { + raw_spin_rq_lock(rq); +- push_rt_tasks(rq); ++ ++ while (push_rt_task(rq, true)) ++ ; ++ + raw_spin_rq_unlock(rq); + } + +@@ -2137,7 +2171,7 @@ static void pull_rt_task(struct rq *this_rq) + { + int this_cpu = this_rq->cpu, cpu; + bool resched = false; +- struct task_struct *p; ++ struct task_struct *p, *push_task; + struct rq *src_rq; + int rt_overload_count = rt_overloaded(this_rq); + +@@ -2184,6 +2218,7 @@ static void pull_rt_task(struct rq *this_rq) + * double_lock_balance, and another CPU could + * alter this_rq + */ ++ push_task = NULL; + double_lock_balance(this_rq, src_rq); + + /* +@@ -2211,11 +2246,15 @@ static void pull_rt_task(struct rq *this_rq) + if (p->prio < src_rq->curr->prio) + goto skip; + +- resched = true; +- +- deactivate_task(src_rq, p, 0); +- set_task_cpu(p, this_cpu); +- activate_task(this_rq, p, 0); ++ if (is_migration_disabled(p)) { ++ trace_sched_migrate_pull_tp(p); ++ push_task = get_push_task(src_rq); ++ } else { ++ deactivate_task(src_rq, p, 0); ++ set_task_cpu(p, this_cpu); ++ activate_task(this_rq, p, 0); ++ resched = true; ++ } + /* + * We continue with the search, just in + * case there's an even higher prio task +@@ -2225,6 +2264,13 @@ static void pull_rt_task(struct rq *this_rq) + } + skip: + double_unlock_balance(this_rq, src_rq); ++ ++ if (push_task) { ++ raw_spin_unlock(&this_rq->__lock); ++ stop_one_cpu_nowait(src_rq->cpu, push_cpu_stop, ++ push_task, &src_rq->push_work); ++ raw_spin_lock(&this_rq->__lock); ++ } + } + + if (resched) +@@ -2474,6 +2520,7 @@ const struct sched_class rt_sched_class + .rq_offline = rq_offline_rt, + .task_woken = task_woken_rt, + .switched_from = switched_from_rt, ++ .find_lock_rq = find_lock_lowest_rq, + #endif + + .task_tick = task_tick_rt, +diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h +index 84ddc5506..d1de5ffe2 100644 +--- a/kernel/sched/sched.h ++++ b/kernel/sched/sched.h +@@ -1038,6 +1038,7 @@ struct rq { + unsigned long cpu_capacity_orig; + + struct callback_head *balance_callback; ++ unsigned char balance_flags; + + unsigned char nohz_idle_balance; + unsigned char idle_balance; +@@ -1068,6 +1069,10 @@ struct rq { + + /* This is used to determine avg_idle's max value */ + u64 max_idle_balance_cost; ++ ++#ifdef CONFIG_HOTPLUG_CPU ++ struct rcuwait hotplug_wait; ++#endif + #endif /* CONFIG_SMP */ + + #ifdef CONFIG_IRQ_TIME_ACCOUNTING +@@ -1141,6 +1146,11 @@ struct rq { + unsigned char core_forceidle; + unsigned int core_forceidle_seq; + #endif ++#ifdef CONFIG_SMP ++ unsigned int nr_pinned; ++#endif ++ unsigned int push_busy; ++ struct cpu_stop_work push_work; + + #if defined(CONFIG_QOS_SCHED_PRIO_LB) && !defined(__GENKSYMS__) + struct list_head cfs_offline_tasks; +@@ -1180,6 +1190,16 @@ static inline int cpu_of(struct rq *rq) + return 0; + #endif + } ++#define MDF_PUSH 0x01 ++ ++static inline bool is_migration_disabled(struct task_struct *p) ++{ ++#ifdef CONFIG_SMP ++ return p->migration_disabled; ++#else ++ return false; ++#endif ++} + + #ifdef CONFIG_QOS_SCHED + #ifdef CONFIG_QOS_SCHED_MULTILEVEL +@@ -1584,6 +1604,9 @@ static inline void rq_pin_lock(struct rq *rq, struct rq_flags *rf) + rq->clock_update_flags &= (RQCF_REQ_SKIP|RQCF_ACT_SKIP); + rf->clock_update_flags = 0; + #endif ++#ifdef CONFIG_SMP ++ SCHED_WARN_ON(rq->balance_callback); ++#endif + } + + static inline void rq_unpin_lock(struct rq *rq, struct rq_flags *rf) +@@ -1755,6 +1778,9 @@ init_numa_balancing(unsigned long clone_flags, struct task_struct *p) + + #ifdef CONFIG_SMP + ++#define BALANCE_WORK 0x01 ++#define BALANCE_PUSH 0x02 ++ + static inline void + queue_balance_callback(struct rq *rq, + struct callback_head *head, +@@ -1762,12 +1788,13 @@ queue_balance_callback(struct rq *rq, + { + lockdep_assert_rq_held(rq); + +- if (unlikely(head->next)) ++ if (unlikely(head->next || (rq->balance_flags & BALANCE_PUSH))) + return; + + head->func = (void (*)(struct callback_head *))func; + head->next = rq->balance_callback; + rq->balance_callback = head; ++ rq->balance_flags |= BALANCE_WORK; + } + + #define rcu_dereference_check_sched_domain(p) \ +@@ -2094,7 +2121,7 @@ static inline int task_on_rq_migrating(struct task_struct *p) + #define WF_SYNC 0x01 /* Waker goes to sleep after wakeup */ + #define WF_FORK 0x02 /* Child wakeup after fork */ + #define WF_MIGRATED 0x04 /* Internal use, task got migrated */ +- ++#define WF_LOCK_SLEEPER 0x10 /* Wakeup spinlock "sleeper" */ + /* + * To aid in avoiding the subversion of "niceness" due to uneven distribution + * of tasks with abnormal "nice" values across CPUs the contribution that +@@ -2175,10 +2202,13 @@ struct sched_class { + void (*task_woken)(struct rq *this_rq, struct task_struct *task); + + void (*set_cpus_allowed)(struct task_struct *p, +- const struct cpumask *newmask); ++ const struct cpumask *newmask, ++ u32 flags); + + void (*rq_online)(struct rq *rq); + void (*rq_offline)(struct rq *rq); ++ ++ struct rq *(*find_lock_rq)(struct task_struct *p, struct rq *rq); + #endif + + void (*task_tick)(struct rq *rq, struct task_struct *p, int queued); +@@ -2268,13 +2298,38 @@ static inline bool sched_fair_runnable(struct rq *rq) + extern struct task_struct *pick_next_task_fair(struct rq *rq, struct task_struct *prev, struct rq_flags *rf); + extern struct task_struct *pick_next_task_idle(struct rq *rq); + ++#define SCA_CHECK 0x01 ++#define SCA_MIGRATE_DISABLE 0x02 ++#define SCA_MIGRATE_ENABLE 0x04 ++ + #ifdef CONFIG_SMP + + extern void update_group_capacity(struct sched_domain *sd, int cpu); + + extern void trigger_load_balance(struct rq *rq); + +-extern void set_cpus_allowed_common(struct task_struct *p, const struct cpumask *new_mask); ++extern void set_cpus_allowed_common(struct task_struct *p, const struct cpumask *new_mask, u32 flags); ++ ++static inline struct task_struct *get_push_task(struct rq *rq) ++{ ++ struct task_struct *p = rq->curr; ++ ++ lockdep_assert_held(&rq->__lock); ++ ++ if (rq->push_busy) ++ return NULL; ++ ++ if (p->nr_cpus_allowed == 1) ++ return NULL; ++ ++ if (p->migration_disabled) ++ return NULL; ++ ++ rq->push_busy = true; ++ return get_task_struct(p); ++} ++ ++extern int push_cpu_stop(void *arg); + + #endif + +@@ -2318,6 +2373,15 @@ extern void reweight_task(struct task_struct *p, int prio); + extern void resched_curr(struct rq *rq); + extern void resched_cpu(int cpu); + ++#ifdef CONFIG_PREEMPT_LAZY ++extern void resched_curr_lazy(struct rq *rq); ++#else ++static inline void resched_curr_lazy(struct rq *rq) ++{ ++ resched_curr(rq); ++} ++#endif ++ + extern struct rt_bandwidth def_rt_bandwidth; + extern void init_rt_bandwidth(struct rt_bandwidth *rt_b, u64 period, u64 runtime); + +diff --git a/kernel/sched/swait.c b/kernel/sched/swait.c +index e1c655f92..f230b1ac7 100644 +--- a/kernel/sched/swait.c ++++ b/kernel/sched/swait.c +@@ -64,6 +64,7 @@ void swake_up_all(struct swait_queue_head *q) + struct swait_queue *curr; + LIST_HEAD(tmp); + ++ WARN_ON(irqs_disabled()); + raw_spin_lock_irq(&q->lock); + list_splice_init(&q->task_list, &tmp); + while (!list_empty(&tmp)) { +diff --git a/kernel/signal.c b/kernel/signal.c +index fc0314a82..2230c45fd 100644 +--- a/kernel/signal.c ++++ b/kernel/signal.c +@@ -20,6 +20,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -406,13 +407,30 @@ void task_join_group_stop(struct task_struct *task) + task_set_jobctl_pending(task, mask | JOBCTL_STOP_PENDING); + } + ++static inline struct sigqueue *get_task_cache(struct task_struct *t) ++{ ++ struct sigqueue *q = t->sigqueue_cache; ++ ++ if (cmpxchg(&t->sigqueue_cache, q, NULL) != q) ++ return NULL; ++ return q; ++} ++ ++static inline int put_task_cache(struct task_struct *t, struct sigqueue *q) ++{ ++ if (cmpxchg(&t->sigqueue_cache, NULL, q) == NULL) ++ return 0; ++ return 1; ++} ++ + /* + * allocate a new signal queue record + * - this may be called without locks if and only if t == current, otherwise an + * appropriate lock must be held to stop the target task from exiting + */ + static struct sigqueue * +-__sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, int override_rlimit) ++__sigqueue_do_alloc(int sig, struct task_struct *t, gfp_t flags, ++ int override_rlimit, int fromslab) + { + struct sigqueue *q = NULL; + struct user_struct *user; +@@ -434,7 +452,10 @@ __sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, int override_rlimi + rcu_read_unlock(); + + if (override_rlimit || likely(sigpending <= task_rlimit(t, RLIMIT_SIGPENDING))) { +- q = kmem_cache_alloc(sigqueue_cachep, flags); ++ if (!fromslab) ++ q = get_task_cache(t); ++ if (!q) ++ q = kmem_cache_alloc(sigqueue_cachep, flags); + } else { + print_dropped_signal(sig); + } +@@ -451,6 +472,13 @@ __sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, int override_rlimi + return q; + } + ++static struct sigqueue * ++__sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, ++ int override_rlimit) ++{ ++ return __sigqueue_do_alloc(sig, t, flags, override_rlimit, 0); ++} ++ + static void __sigqueue_free(struct sigqueue *q) + { + if (q->flags & SIGQUEUE_PREALLOC) +@@ -460,6 +488,21 @@ static void __sigqueue_free(struct sigqueue *q) + kmem_cache_free(sigqueue_cachep, q); + } + ++static void sigqueue_free_current(struct sigqueue *q) ++{ ++ struct user_struct *up; ++ ++ if (q->flags & SIGQUEUE_PREALLOC) ++ return; ++ ++ up = q->user; ++ if (rt_prio(current->normal_prio) && !put_task_cache(current, q)) { ++ if (atomic_dec_and_test(&up->sigpending)) ++ free_uid(up); ++ } else ++ __sigqueue_free(q); ++} ++ + void flush_sigqueue(struct sigpending *queue) + { + struct sigqueue *q; +@@ -472,6 +515,21 @@ void flush_sigqueue(struct sigpending *queue) + } + } + ++/* ++ * Called from __exit_signal. Flush tsk->pending and ++ * tsk->sigqueue_cache ++ */ ++void flush_task_sigqueue(struct task_struct *tsk) ++{ ++ struct sigqueue *q; ++ ++ flush_sigqueue(&tsk->pending); ++ ++ q = get_task_cache(tsk); ++ if (q) ++ kmem_cache_free(sigqueue_cachep, q); ++} ++ + /* + * Flush all pending signals for this kthread. + */ +@@ -596,7 +654,7 @@ static void collect_signal(int sig, struct sigpending *list, kernel_siginfo_t *i + (info->si_code == SI_TIMER) && + (info->si_sys_private); + +- __sigqueue_free(first); ++ sigqueue_free_current(first); + } else { + /* + * Ok, it wasn't in the queue. This must be +@@ -633,6 +691,8 @@ int dequeue_signal(struct task_struct *tsk, sigset_t *mask, kernel_siginfo_t *in + bool resched_timer = false; + int signr; + ++ WARN_ON_ONCE(tsk != current); ++ + /* We only dequeue private signals from ourselves, we don't let + * signalfd steal them + */ +@@ -1320,6 +1380,34 @@ force_sig_info_to_task(struct kernel_siginfo *info, struct task_struct *t) + struct k_sigaction *action; + int sig = info->si_signo; + ++ /* ++ * On some archs, PREEMPT_RT has to delay sending a signal from a trap ++ * since it can not enable preemption, and the signal code's spin_locks ++ * turn into mutexes. Instead, it must set TIF_NOTIFY_RESUME which will ++ * send the signal on exit of the trap. ++ */ ++#ifdef ARCH_RT_DELAYS_SIGNAL_SEND ++ if (in_atomic()) { ++ struct task_struct *t = current; ++ ++ if (WARN_ON_ONCE(t->forced_info.si_signo)) ++ return 0; ++ ++ if (is_si_special(info)) { ++ WARN_ON_ONCE(info != SEND_SIG_PRIV); ++ t->forced_info.si_signo = info->si_signo; ++ t->forced_info.si_errno = 0; ++ t->forced_info.si_code = SI_KERNEL; ++ t->forced_info.si_pid = 0; ++ t->forced_info.si_uid = 0; ++ } else { ++ t->forced_info = *info; ++ } ++ ++ set_tsk_thread_flag(t, TIF_NOTIFY_RESUME); ++ return 0; ++ } ++#endif + spin_lock_irqsave(&t->sighand->siglock, flags); + action = &t->sighand->action[sig-1]; + ignored = action->sa.sa_handler == SIG_IGN; +@@ -1813,7 +1901,8 @@ EXPORT_SYMBOL(kill_pid); + */ + struct sigqueue *sigqueue_alloc(void) + { +- struct sigqueue *q = __sigqueue_alloc(-1, current, GFP_KERNEL, 0); ++ /* Preallocated sigqueue objects always from the slabcache ! */ ++ struct sigqueue *q = __sigqueue_do_alloc(-1, current, GFP_KERNEL, 0, 1); + + if (q) + q->flags |= SIGQUEUE_PREALLOC; +@@ -2199,16 +2288,8 @@ static void ptrace_stop(int exit_code, int why, int clear_code, kernel_siginfo_t + if (gstop_done && ptrace_reparented(current)) + do_notify_parent_cldstop(current, false, why); + +- /* +- * Don't want to allow preemption here, because +- * sys_ptrace() needs this task to be inactive. +- * +- * XXX: implement read_unlock_no_resched(). +- */ +- preempt_disable(); + read_unlock(&tasklist_lock); + cgroup_enter_frozen(); +- preempt_enable_no_resched(); + freezable_schedule(); + cgroup_leave_frozen(true); + } else { +diff --git a/kernel/smp.c b/kernel/smp.c +index 114776d0d..6d35929a1 100644 +--- a/kernel/smp.c ++++ b/kernel/smp.c +@@ -480,8 +480,18 @@ void flush_smp_call_function_from_idle(void) + + local_irq_save(flags); + flush_smp_call_function_queue(true); +- if (local_softirq_pending()) +- do_softirq(); ++ ++ if (local_softirq_pending()) { ++ ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT)) { ++ do_softirq(); ++ } else { ++ struct task_struct *ksoftirqd = this_cpu_ksoftirqd(); ++ ++ if (ksoftirqd && ksoftirqd->state != TASK_RUNNING) ++ wake_up_process(ksoftirqd); ++ } ++ } + + local_irq_restore(flags); + } +diff --git a/kernel/softirq.c b/kernel/softirq.c +index 4196b9f84..aebf2d468 100644 +--- a/kernel/softirq.c ++++ b/kernel/softirq.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -25,6 +26,7 @@ + #include + #include + #include ++#include + + #define CREATE_TRACE_POINTS + #include +@@ -92,27 +94,212 @@ static bool ksoftirqd_running(unsigned long pending) + !__kthread_should_park(tsk); + } + ++#ifdef CONFIG_TRACE_IRQFLAGS ++DEFINE_PER_CPU(int, hardirqs_enabled); ++DEFINE_PER_CPU(int, hardirq_context); ++EXPORT_PER_CPU_SYMBOL_GPL(hardirqs_enabled); ++EXPORT_PER_CPU_SYMBOL_GPL(hardirq_context); ++#endif ++ + /* +- * preempt_count and SOFTIRQ_OFFSET usage: +- * - preempt_count is changed by SOFTIRQ_OFFSET on entering or leaving +- * softirq processing. +- * - preempt_count is changed by SOFTIRQ_DISABLE_OFFSET (= 2 * SOFTIRQ_OFFSET) ++ * SOFTIRQ_OFFSET usage: ++ * ++ * On !RT kernels 'count' is the preempt counter, on RT kernels this applies ++ * to a per CPU counter and to task::softirqs_disabled_cnt. ++ * ++ * - count is changed by SOFTIRQ_OFFSET on entering or leaving softirq ++ * processing. ++ * ++ * - count is changed by SOFTIRQ_DISABLE_OFFSET (= 2 * SOFTIRQ_OFFSET) + * on local_bh_disable or local_bh_enable. ++ * + * This lets us distinguish between whether we are currently processing + * softirq and whether we just have bh disabled. + */ ++#ifdef CONFIG_PREEMPT_RT + + /* +- * This one is for softirq.c-internal use, +- * where hardirqs are disabled legitimately: ++ * RT accounts for BH disabled sections in task::softirqs_disabled_cnt and ++ * also in per CPU softirq_ctrl::cnt. This is necessary to allow tasks in a ++ * softirq disabled section to be preempted. ++ * ++ * The per task counter is used for softirq_count(), in_softirq() and ++ * in_serving_softirqs() because these counts are only valid when the task ++ * holding softirq_ctrl::lock is running. ++ * ++ * The per CPU counter prevents pointless wakeups of ksoftirqd in case that ++ * the task which is in a softirq disabled section is preempted or blocks. + */ +-#ifdef CONFIG_TRACE_IRQFLAGS ++struct softirq_ctrl { ++ local_lock_t lock; ++ int cnt; ++}; + +-DEFINE_PER_CPU(int, hardirqs_enabled); +-DEFINE_PER_CPU(int, hardirq_context); +-EXPORT_PER_CPU_SYMBOL_GPL(hardirqs_enabled); +-EXPORT_PER_CPU_SYMBOL_GPL(hardirq_context); ++static DEFINE_PER_CPU(struct softirq_ctrl, softirq_ctrl) = { ++ .lock = INIT_LOCAL_LOCK(softirq_ctrl.lock), ++}; ++ ++/** ++ * local_bh_blocked() - Check for idle whether BH processing is blocked ++ * ++ * Returns false if the per CPU softirq::cnt is 0 otherwise true. ++ * ++ * This is invoked from the idle task to guard against false positive ++ * softirq pending warnings, which would happen when the task which holds ++ * softirq_ctrl::lock was the only running task on the CPU and blocks on ++ * some other lock. ++ */ ++bool local_bh_blocked(void) ++{ ++ return __this_cpu_read(softirq_ctrl.cnt) != 0; ++} ++ ++void __local_bh_disable_ip(unsigned long ip, unsigned int cnt) ++{ ++ unsigned long flags; ++ int newcnt; ++ ++ WARN_ON_ONCE(in_hardirq()); ++ ++ /* First entry of a task into a BH disabled section? */ ++ if (!current->softirq_disable_cnt) { ++ if (preemptible()) { ++ local_lock(&softirq_ctrl.lock); ++ /* Required to meet the RCU bottomhalf requirements. */ ++ rcu_read_lock(); ++ } else { ++ DEBUG_LOCKS_WARN_ON(this_cpu_read(softirq_ctrl.cnt)); ++ } ++ } ++ ++ /* ++ * Track the per CPU softirq disabled state. On RT this is per CPU ++ * state to allow preemption of bottom half disabled sections. ++ */ ++ newcnt = __this_cpu_add_return(softirq_ctrl.cnt, cnt); ++ /* ++ * Reflect the result in the task state to prevent recursion on the ++ * local lock and to make softirq_count() & al work. ++ */ ++ current->softirq_disable_cnt = newcnt; ++ ++ if (IS_ENABLED(CONFIG_TRACE_IRQFLAGS) && newcnt == cnt) { ++ raw_local_irq_save(flags); ++ lockdep_softirqs_off(ip); ++ raw_local_irq_restore(flags); ++ } ++} ++EXPORT_SYMBOL(__local_bh_disable_ip); ++ ++static void __local_bh_enable(unsigned int cnt, bool unlock) ++{ ++ unsigned long flags; ++ int newcnt; ++ ++ DEBUG_LOCKS_WARN_ON(current->softirq_disable_cnt != ++ this_cpu_read(softirq_ctrl.cnt)); ++ ++ if (IS_ENABLED(CONFIG_TRACE_IRQFLAGS) && softirq_count() == cnt) { ++ raw_local_irq_save(flags); ++ lockdep_softirqs_on(_RET_IP_); ++ raw_local_irq_restore(flags); ++ } ++ ++ newcnt = __this_cpu_sub_return(softirq_ctrl.cnt, cnt); ++ current->softirq_disable_cnt = newcnt; ++ ++ if (!newcnt && unlock) { ++ rcu_read_unlock(); ++ local_unlock(&softirq_ctrl.lock); ++ } ++} ++ ++void __local_bh_enable_ip(unsigned long ip, unsigned int cnt) ++{ ++ bool preempt_on = preemptible(); ++ unsigned long flags; ++ u32 pending; ++ int curcnt; ++ ++ WARN_ON_ONCE(in_irq()); ++ lockdep_assert_irqs_enabled(); + ++ local_irq_save(flags); ++ curcnt = __this_cpu_read(softirq_ctrl.cnt); ++ ++ /* ++ * If this is not reenabling soft interrupts, no point in trying to ++ * run pending ones. ++ */ ++ if (curcnt != cnt) ++ goto out; ++ ++ pending = local_softirq_pending(); ++ if (!pending || ksoftirqd_running(pending)) ++ goto out; ++ ++ /* ++ * If this was called from non preemptible context, wake up the ++ * softirq daemon. ++ */ ++ if (!preempt_on) { ++ wakeup_softirqd(); ++ goto out; ++ } ++ ++ /* ++ * Adjust softirq count to SOFTIRQ_OFFSET which makes ++ * in_serving_softirq() become true. ++ */ ++ cnt = SOFTIRQ_OFFSET; ++ __local_bh_enable(cnt, false); ++ __do_softirq(); ++ ++out: ++ __local_bh_enable(cnt, preempt_on); ++ local_irq_restore(flags); ++} ++EXPORT_SYMBOL(__local_bh_enable_ip); ++ ++/* ++ * Invoked from ksoftirqd_run() outside of the interrupt disabled section ++ * to acquire the per CPU local lock for reentrancy protection. ++ */ ++static inline void ksoftirqd_run_begin(void) ++{ ++ __local_bh_disable_ip(_RET_IP_, SOFTIRQ_OFFSET); ++ local_irq_disable(); ++} ++ ++/* Counterpart to ksoftirqd_run_begin() */ ++static inline void ksoftirqd_run_end(void) ++{ ++ __local_bh_enable(SOFTIRQ_OFFSET, true); ++ WARN_ON_ONCE(in_interrupt()); ++ local_irq_enable(); ++} ++ ++static inline void softirq_handle_begin(void) { } ++static inline void softirq_handle_end(void) { } ++ ++static inline bool should_wake_ksoftirqd(void) ++{ ++ return !this_cpu_read(softirq_ctrl.cnt); ++} ++ ++static inline void invoke_softirq(void) ++{ ++ if (should_wake_ksoftirqd()) ++ wakeup_softirqd(); ++} ++ ++#else /* CONFIG_PREEMPT_RT */ ++ ++/* ++ * This one is for softirq.c-internal use, where hardirqs are disabled ++ * legitimately: ++ */ ++#ifdef CONFIG_TRACE_IRQFLAGS + void __local_bh_disable_ip(unsigned long ip, unsigned int cnt) + { + unsigned long flags; +@@ -203,6 +390,78 @@ void __local_bh_enable_ip(unsigned long ip, unsigned int cnt) + } + EXPORT_SYMBOL(__local_bh_enable_ip); + ++static inline void softirq_handle_begin(void) ++{ ++ __local_bh_disable_ip(_RET_IP_, SOFTIRQ_OFFSET); ++} ++ ++static inline void softirq_handle_end(void) ++{ ++ __local_bh_enable(SOFTIRQ_OFFSET); ++ WARN_ON_ONCE(in_interrupt()); ++} ++ ++static inline void ksoftirqd_run_begin(void) ++{ ++ local_irq_disable(); ++} ++ ++static inline void ksoftirqd_run_end(void) ++{ ++ local_irq_enable(); ++} ++ ++static inline bool should_wake_ksoftirqd(void) ++{ ++ return true; ++} ++ ++static inline void invoke_softirq(void) ++{ ++ if (ksoftirqd_running(local_softirq_pending())) ++ return; ++ ++ if (!force_irqthreads) { ++#ifdef CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK ++ /* ++ * We can safely execute softirq on the current stack if ++ * it is the irq stack, because it should be near empty ++ * at this stage. ++ */ ++ __do_softirq(); ++#else ++ /* ++ * Otherwise, irq_exit() is called on the task stack that can ++ * be potentially deep already. So call softirq in its own stack ++ * to prevent from any overrun. ++ */ ++ do_softirq_own_stack(); ++#endif ++ } else { ++ wakeup_softirqd(); ++ } ++} ++ ++asmlinkage __visible void do_softirq(void) ++{ ++ __u32 pending; ++ unsigned long flags; ++ ++ if (in_interrupt()) ++ return; ++ ++ local_irq_save(flags); ++ ++ pending = local_softirq_pending(); ++ ++ if (pending && !ksoftirqd_running(pending)) ++ do_softirq_own_stack(); ++ ++ local_irq_restore(flags); ++} ++ ++#endif /* !CONFIG_PREEMPT_RT */ ++ + /* + * We restart softirq processing for at most MAX_SOFTIRQ_RESTART times, + * but break the loop if need_resched() is set or after 2 ms. +@@ -270,10 +529,10 @@ asmlinkage __visible void __softirq_entry __do_softirq(void) + current->flags &= ~PF_MEMALLOC; + + pending = local_softirq_pending(); +- account_irq_enter_time(current); + +- __local_bh_disable_ip(_RET_IP_, SOFTIRQ_OFFSET); ++ softirq_handle_begin(); + in_hardirq = lockdep_softirq_start(); ++ account_softirq_enter(current); + + restart: + /* Reset the pending bitmask before enabling irqs */ +@@ -307,8 +566,10 @@ asmlinkage __visible void __softirq_entry __do_softirq(void) + pending >>= softirq_bit; + } + +- if (__this_cpu_read(ksoftirqd) == current) ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT) && ++ __this_cpu_read(ksoftirqd) == current) + rcu_softirq_qs(); ++ + local_irq_disable(); + + pending = local_softirq_pending(); +@@ -320,29 +581,10 @@ asmlinkage __visible void __softirq_entry __do_softirq(void) + wakeup_softirqd(); + } + +- lockdep_softirq_end(in_hardirq); +- account_irq_exit_time(current); +- __local_bh_enable(SOFTIRQ_OFFSET); +- WARN_ON_ONCE(in_interrupt()); +- current_restore_flags(old_flags, PF_MEMALLOC); +-} +- +-asmlinkage __visible void do_softirq(void) +-{ +- __u32 pending; +- unsigned long flags; +- +- if (in_interrupt()) +- return; +- +- local_irq_save(flags); +- +- pending = local_softirq_pending(); +- +- if (pending && !ksoftirqd_running(pending)) +- do_softirq_own_stack(); +- +- local_irq_restore(flags); ++ account_softirq_exit(current); ++ lockdep_softirq_end(in_hardirq); ++ softirq_handle_end(); ++ current_restore_flags(old_flags, PF_MEMALLOC); + } + + /** +@@ -350,17 +592,12 @@ asmlinkage __visible void do_softirq(void) + */ + void irq_enter_rcu(void) + { +- if (tick_nohz_full_cpu(smp_processor_id()) || +- (is_idle_task(current) && !in_interrupt())) { +- /* +- * Prevent raise_softirq from needlessly waking up ksoftirqd +- * here, as softirq will be serviced on return from interrupt. +- */ +- local_bh_disable(); ++ __irq_enter_raw(); ++ ++ if (is_idle_task(current) && (irq_count() == HARDIRQ_OFFSET)) + tick_irq_enter(); +- _local_bh_enable(); +- } +- __irq_enter(); ++ ++ account_hardirq_enter(current); + } + + /** +@@ -372,31 +609,7 @@ void irq_enter(void) + irq_enter_rcu(); + } + +-static inline void invoke_softirq(void) +-{ +- if (ksoftirqd_running(local_softirq_pending())) +- return; + +- if (!force_irqthreads || !__this_cpu_read(ksoftirqd)) { +-#ifdef CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK +- /* +- * We can safely execute softirq on the current stack if +- * it is the irq stack, because it should be near empty +- * at this stage. +- */ +- __do_softirq(); +-#else +- /* +- * Otherwise, irq_exit() is called on the task stack that can +- * be potentially deep already. So call softirq in its own stack +- * to prevent from any overrun. +- */ +- do_softirq_own_stack(); +-#endif +- } else { +- wakeup_softirqd(); +- } +-} + + static inline void tick_irq_exit(void) + { +@@ -418,7 +631,7 @@ static inline void __irq_exit_rcu(void) + #else + lockdep_assert_irqs_disabled(); + #endif +- account_irq_exit_time(current); ++ account_hardirq_exit(current); + preempt_count_sub(HARDIRQ_OFFSET); + if (!in_interrupt() && local_softirq_pending()) + invoke_softirq(); +@@ -467,7 +680,7 @@ inline void raise_softirq_irqoff(unsigned int nr) + * Otherwise we wake up ksoftirqd to make sure we + * schedule the softirq soon. + */ +- if (!in_interrupt()) ++ if (!in_interrupt() && should_wake_ksoftirqd()) + wakeup_softirqd(); + } + +@@ -533,6 +746,16 @@ void __tasklet_hi_schedule(struct tasklet_struct *t) + } + EXPORT_SYMBOL(__tasklet_hi_schedule); + ++static inline bool tasklet_clear_sched(struct tasklet_struct *t) ++{ ++ if (test_and_clear_bit(TASKLET_STATE_SCHED, &t->state)) { ++ wake_up_var(&t->state); ++ return true; ++ } ++ ++ return false; ++} ++ + static void tasklet_action_common(struct softirq_action *a, + struct tasklet_head *tl_head, + unsigned int softirq_nr) +@@ -552,8 +775,7 @@ static void tasklet_action_common(struct softirq_action *a, + + if (tasklet_trylock(t)) { + if (!atomic_read(&t->count)) { +- if (!test_and_clear_bit(TASKLET_STATE_SCHED, +- &t->state)) ++ if (!tasklet_clear_sched(t)) + BUG(); + if (t->use_callback) + t->callback(t); +@@ -608,21 +830,62 @@ void tasklet_init(struct tasklet_struct *t, + } + EXPORT_SYMBOL(tasklet_init); + ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT) ++/* ++ * Do not use in new code. Waiting for tasklets from atomic contexts is ++ * error prone and should be avoided. ++ */ ++void tasklet_unlock_spin_wait(struct tasklet_struct *t) ++{ ++ while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) { ++ /* ++ * Prevent a live lock when current preempted soft ++ * interrupt processing or prevents ksoftirqd from ++ * running. If the tasklet runs on a different CPU ++ * then this has no effect other than doing the BH ++ * disable/enable dance for nothing. ++ */ ++ local_bh_disable(); ++ local_bh_enable(); ++ } else { ++ cpu_relax(); ++ } ++ } ++} ++EXPORT_SYMBOL(tasklet_unlock_spin_wait); ++#endif ++ + void tasklet_kill(struct tasklet_struct *t) + { + if (in_interrupt()) + pr_notice("Attempt to kill tasklet from interrupt\n"); + +- while (test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) { +- do { +- yield(); +- } while (test_bit(TASKLET_STATE_SCHED, &t->state)); +- } ++ while (test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) ++ wait_var_event(&t->state, !test_bit(TASKLET_STATE_SCHED, &t->state)); ++ + tasklet_unlock_wait(t); +- clear_bit(TASKLET_STATE_SCHED, &t->state); ++ tasklet_clear_sched(t); + } + EXPORT_SYMBOL(tasklet_kill); + ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT) ++void tasklet_unlock(struct tasklet_struct *t) ++{ ++ smp_mb__before_atomic(); ++ clear_bit(TASKLET_STATE_RUN, &t->state); ++ smp_mb__after_atomic(); ++ wake_up_var(&t->state); ++} ++EXPORT_SYMBOL_GPL(tasklet_unlock); ++ ++void tasklet_unlock_wait(struct tasklet_struct *t) ++{ ++ wait_var_event(&t->state, !test_bit(TASKLET_STATE_RUN, &t->state)); ++} ++EXPORT_SYMBOL_GPL(tasklet_unlock_wait); ++#endif ++ + void __init softirq_init(void) + { + int cpu; +@@ -645,18 +908,18 @@ static int ksoftirqd_should_run(unsigned int cpu) + + static void run_ksoftirqd(unsigned int cpu) + { +- local_irq_disable(); ++ ksoftirqd_run_begin(); + if (local_softirq_pending()) { + /* + * We can safely run softirq on inline stack, as we are not deep + * in the task stack here. + */ + __do_softirq(); +- local_irq_enable(); ++ ksoftirqd_run_end(); + cond_resched(); + return; + } +- local_irq_enable(); ++ ksoftirqd_run_end(); + } + + #ifdef CONFIG_HOTPLUG_CPU +diff --git a/kernel/stop_machine.c b/kernel/stop_machine.c +index d0bf6da49..7a74b501a 100644 +--- a/kernel/stop_machine.c ++++ b/kernel/stop_machine.c +@@ -47,11 +47,27 @@ struct cpu_stopper { + struct list_head works; /* list of pending works */ + + struct cpu_stop_work stop_work; /* for stop_cpus */ ++ unsigned long caller; ++ cpu_stop_fn_t fn; + }; + + static DEFINE_PER_CPU(struct cpu_stopper, cpu_stopper); + static bool stop_machine_initialized = false; + ++void print_stop_info(const char *log_lvl, struct task_struct *task) ++{ ++ /* ++ * If @task is a stopper task, it cannot migrate and task_cpu() is ++ * stable. ++ */ ++ struct cpu_stopper *stopper = per_cpu_ptr(&cpu_stopper, task_cpu(task)); ++ ++ if (task != stopper->thread) ++ return; ++ ++ printk("%sStopper: %pS <- %pS\n", log_lvl, stopper->fn, (void *)stopper->caller); ++} ++ + /* static data for stop_cpus */ + static DEFINE_MUTEX(stop_cpus_mutex); + static bool stop_cpus_in_progress; +@@ -128,7 +144,7 @@ static bool cpu_stop_queue_work(unsigned int cpu, struct cpu_stop_work *work) + int stop_one_cpu(unsigned int cpu, cpu_stop_fn_t fn, void *arg) + { + struct cpu_stop_done done; +- struct cpu_stop_work work = { .fn = fn, .arg = arg, .done = &done }; ++ struct cpu_stop_work work = { .fn = fn, .arg = arg, .done = &done, .caller = _RET_IP_ }; + + cpu_stop_init_done(&done, 1); + if (!cpu_stop_queue_work(cpu, &work)) +@@ -344,7 +360,8 @@ int stop_two_cpus(unsigned int cpu1, unsigned int cpu2, cpu_stop_fn_t fn, void * + work1 = work2 = (struct cpu_stop_work){ + .fn = multi_cpu_stop, + .arg = &msdata, +- .done = &done ++ .done = &done, ++ .caller = _RET_IP_, + }; + + cpu_stop_init_done(&done, 2); +@@ -380,7 +397,7 @@ int stop_two_cpus(unsigned int cpu1, unsigned int cpu2, cpu_stop_fn_t fn, void * + bool stop_one_cpu_nowait(unsigned int cpu, cpu_stop_fn_t fn, void *arg, + struct cpu_stop_work *work_buf) + { +- *work_buf = (struct cpu_stop_work){ .fn = fn, .arg = arg, }; ++ *work_buf = (struct cpu_stop_work){ .fn = fn, .arg = arg, .caller = _RET_IP_, }; + return cpu_stop_queue_work(cpu, work_buf); + } + +@@ -500,6 +517,8 @@ static void cpu_stopper_thread(unsigned int cpu) + int ret; + + /* cpu stop callbacks must not sleep, make in_atomic() == T */ ++ stopper->caller = work->caller; ++ stopper->fn = fn; + preempt_count_inc(); + ret = fn(arg); + if (done) { +@@ -508,6 +527,8 @@ static void cpu_stopper_thread(unsigned int cpu) + cpu_stop_signal_done(done); + } + preempt_count_dec(); ++ stopper->fn = NULL; ++ stopper->caller = 0; + WARN_ONCE(preempt_count(), + "cpu_stop: %ps(%p) leaked preempt count\n", fn, arg); + goto repeat; +diff --git a/kernel/time/hrtimer.c b/kernel/time/hrtimer.c +index 544ce87ba..3db616aec 100644 +--- a/kernel/time/hrtimer.c ++++ b/kernel/time/hrtimer.c +@@ -2052,6 +2052,36 @@ SYSCALL_DEFINE2(nanosleep_time32, struct old_timespec32 __user *, rqtp, + } + #endif + ++#ifdef CONFIG_PREEMPT_RT ++/* ++ * Sleep for 1 ms in hope whoever holds what we want will let it go. ++ */ ++void cpu_chill(void) ++{ ++ unsigned int freeze_flag = current->flags & PF_NOFREEZE; ++ struct task_struct *self = current; ++ ktime_t chill_time; ++ ++ raw_spin_lock_irq(&self->pi_lock); ++ self->saved_state = self->state; ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ raw_spin_unlock_irq(&self->pi_lock); ++ ++ chill_time = ktime_set(0, NSEC_PER_MSEC); ++ ++ current->flags |= PF_NOFREEZE; ++ schedule_hrtimeout(&chill_time, HRTIMER_MODE_REL_HARD); ++ if (!freeze_flag) ++ current->flags &= ~PF_NOFREEZE; ++ ++ raw_spin_lock_irq(&self->pi_lock); ++ __set_current_state_no_track(self->saved_state); ++ self->saved_state = TASK_RUNNING; ++ raw_spin_unlock_irq(&self->pi_lock); ++} ++EXPORT_SYMBOL(cpu_chill); ++#endif ++ + /* + * Functions related to boot-time initialization: + */ +diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c +index aed5d6b6c..c26a7168f 100644 +--- a/kernel/time/tick-sched.c ++++ b/kernel/time/tick-sched.c +@@ -989,7 +989,7 @@ static bool can_stop_idle_tick(int cpu, struct tick_sched *ts) + if (unlikely(local_softirq_pending())) { + static int ratelimit; + +- if (ratelimit < 10 && ++ if (ratelimit < 10 && !local_bh_blocked() && + (local_softirq_pending() & SOFTIRQ_STOP_IDLE_MASK)) { + pr_warn("NOHZ tick-stop error: Non-RCU local softirq work is pending, handler #%02x!!!\n", + (unsigned int) local_softirq_pending()); +diff --git a/kernel/time/timer.c b/kernel/time/timer.c +index c1b52dab3..101a73eea 100644 +--- a/kernel/time/timer.c ++++ b/kernel/time/timer.c +@@ -1454,7 +1454,7 @@ static void del_timer_wait_running(struct timer_list *timer) + u32 tf; + + tf = READ_ONCE(timer->flags); +- if (!(tf & TIMER_MIGRATING)) { ++ if (!(tf & (TIMER_MIGRATING | TIMER_IRQSAFE))) { + struct timer_base *base = get_timer_base(tf); + + /* +@@ -1522,6 +1522,12 @@ static int __timer_delete_sync(struct timer_list *timer, bool shutdown) + * could lead to deadlock. + */ + WARN_ON(in_irq() && !(timer->flags & TIMER_IRQSAFE)); ++ /* ++ * Must be able to sleep on PREEMPT_RT because of the slowpath in ++ * del_timer_wait_running(). ++ */ ++ if (IS_ENABLED(CONFIG_PREEMPT_RT) && !(timer->flags & TIMER_IRQSAFE)) ++ lockdep_assert_preemption_enabled(); + + do { + ret = __try_to_del_timer_sync(timer, shutdown); +diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c +index d003e1403..0d675726a 100644 +--- a/kernel/trace/trace.c ++++ b/kernel/trace/trace.c +@@ -2607,60 +2607,43 @@ enum print_line_t trace_handle_return(struct trace_seq *s) + } + EXPORT_SYMBOL_GPL(trace_handle_return); + +-unsigned int tracing_gen_ctx_flags(unsigned long irqflags) ++static unsigned short migration_disable_value(void) + { +- unsigned int trace_flags = 0; ++#if defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT) ++ return current->migration_disabled; ++#else ++ return 0; ++#endif ++} ++ ++unsigned int tracing_gen_ctx_irq_test(unsigned int irqs_status) ++{ ++ unsigned int trace_flags = irqs_status; + unsigned int pc; + + pc = preempt_count(); + +-#ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT +- if (irqs_disabled_flags(irqflags)) +- trace_flags |= TRACE_FLAG_IRQS_OFF; +-#else +- trace_flags |= TRACE_FLAG_IRQS_NOSUPPORT; +-#endif +- + if (pc & NMI_MASK) + trace_flags |= TRACE_FLAG_NMI; + if (pc & HARDIRQ_MASK) + trace_flags |= TRACE_FLAG_HARDIRQ; +- +- if (pc & SOFTIRQ_OFFSET) ++ if (in_serving_softirq()) + trace_flags |= TRACE_FLAG_SOFTIRQ; + + if (tif_need_resched()) + trace_flags |= TRACE_FLAG_NEED_RESCHED; + if (test_preempt_need_resched()) + trace_flags |= TRACE_FLAG_PREEMPT_RESCHED; +- return (trace_flags << 16) | (pc & 0xff); +-} + +-unsigned int tracing_gen_ctx(void) +-{ +- unsigned long irqflags; +- +-#ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT +- local_save_flags(irqflags); +-#else +- irqflags = 0; ++#ifdef CONFIG_PREEMPT_LAZY ++ if (need_resched_lazy()) ++ trace_flags |= TRACE_FLAG_NEED_RESCHED_LAZY; + #endif +- return tracing_gen_ctx_flags(irqflags); +-} + +-unsigned int tracing_gen_ctx_dec(void) +-{ +- unsigned int trace_ctx; +- +- trace_ctx = tracing_gen_ctx(); +- +- /* +- * Subtract one from the preeption counter if preemption is enabled, +- * see trace_event_buffer_reserve()for details. +- */ +- if (IS_ENABLED(CONFIG_PREEMPTION)) +- trace_ctx--; +- return trace_ctx; ++ return (pc & 0xff) | ++ (migration_disable_value() & 0xff) << 8 | ++ (preempt_lazy_count() & 0xff) << 16 | ++ (trace_flags << 24); + } + + struct ring_buffer_event * +@@ -3856,14 +3839,17 @@ unsigned long trace_total_entries(struct trace_array *tr) + + static void print_lat_help_header(struct seq_file *m) + { +- seq_puts(m, "# _------=> CPU# \n" +- "# / _-----=> irqs-off \n" +- "# | / _----=> need-resched \n" +- "# || / _---=> hardirq/softirq \n" +- "# ||| / _--=> preempt-depth \n" +- "# |||| / delay \n" +- "# cmd pid ||||| time | caller \n" +- "# \\ / ||||| \\ | / \n"); ++ seq_puts(m, "# _--------=> CPU# \n" ++ "# / _-------=> irqs-off \n" ++ "# | / _------=> need-resched \n" ++ "# || / _-----=> need-resched-lazy\n" ++ "# ||| / _----=> hardirq/softirq \n" ++ "# |||| / _---=> preempt-depth \n" ++ "# ||||| / _--=> preempt-lazy-depth\n" ++ "# |||||| / _-=> migrate-disable \n" ++ "# ||||||| / delay \n" ++ "# cmd pid |||||||| time | caller \n" ++ "# \\ / |||||||| \\ | / \n"); + } + + static void print_event_info(struct array_buffer *buf, struct seq_file *m) +@@ -3897,13 +3883,16 @@ static void print_func_help_header_irq(struct array_buffer *buf, struct seq_file + + print_event_info(buf, m); + +- seq_printf(m, "# %.*s _-----=> irqs-off\n", prec, space); +- seq_printf(m, "# %.*s / _----=> need-resched\n", prec, space); +- seq_printf(m, "# %.*s| / _---=> hardirq/softirq\n", prec, space); +- seq_printf(m, "# %.*s|| / _--=> preempt-depth\n", prec, space); +- seq_printf(m, "# %.*s||| / delay\n", prec, space); +- seq_printf(m, "# TASK-PID %.*s CPU# |||| TIMESTAMP FUNCTION\n", prec, " TGID "); +- seq_printf(m, "# | | %.*s | |||| | |\n", prec, " | "); ++ seq_printf(m, "# %.*s _-------=> irqs-off\n", prec, space); ++ seq_printf(m, "# %.*s / _------=> need-resched\n", prec, space); ++ seq_printf(m, "# %.*s| / _-----=> need-resched-lazy\n", prec, space); ++ seq_printf(m, "# %.*s|| / _----=> hardirq/softirq\n", prec, space); ++ seq_printf(m, "# %.*s||| / _---=> preempt-depth\n", prec, space); ++ seq_printf(m, "# %.*s|||| / _--=> preempt-lazy-depth\n", prec, space); ++ seq_printf(m, "# %.*s||||| / _-=> migrate-disable\n", prec, space); ++ seq_printf(m, "# %.*s|||||| / delay\n", prec, space); ++ seq_printf(m, "# TASK-PID %.*s CPU# ||||||| TIMESTAMP FUNCTION\n", prec, " TGID "); ++ seq_printf(m, "# | | %.*s | ||||||| | |\n", prec, " | "); + } + + void +@@ -9464,7 +9453,6 @@ void ftrace_dump(enum ftrace_dump_mode oops_dump_mode) + tracing_off(); + + local_irq_save(flags); +- printk_nmi_direct_enter(); + + /* Simulate the iterator */ + trace_init_global_iter(&iter); +@@ -9544,7 +9532,6 @@ void ftrace_dump(enum ftrace_dump_mode oops_dump_mode) + atomic_dec(&per_cpu_ptr(iter.array_buffer->data, cpu)->disabled); + } + atomic_dec(&dump_running); +- printk_nmi_direct_exit(); + local_irq_restore(flags); + } + EXPORT_SYMBOL_GPL(ftrace_dump); +diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h +index 045cd3b14..b2a72a370 100644 +--- a/kernel/trace/trace.h ++++ b/kernel/trace/trace.h +@@ -141,25 +141,6 @@ struct kretprobe_trace_entry_head { + unsigned long ret_ip; + }; + +-/* +- * trace_flag_type is an enumeration that holds different +- * states when a trace occurs. These are: +- * IRQS_OFF - interrupts were disabled +- * IRQS_NOSUPPORT - arch does not support irqs_disabled_flags +- * NEED_RESCHED - reschedule is requested +- * HARDIRQ - inside an interrupt handler +- * SOFTIRQ - inside a softirq handler +- */ +-enum trace_flag_type { +- TRACE_FLAG_IRQS_OFF = 0x01, +- TRACE_FLAG_IRQS_NOSUPPORT = 0x02, +- TRACE_FLAG_NEED_RESCHED = 0x04, +- TRACE_FLAG_HARDIRQ = 0x08, +- TRACE_FLAG_SOFTIRQ = 0x10, +- TRACE_FLAG_PREEMPT_RESCHED = 0x20, +- TRACE_FLAG_NMI = 0x40, +-}; +- + #define TRACE_BUF_SIZE 1024 + + struct trace_array; +diff --git a/kernel/trace/trace_events.c b/kernel/trace/trace_events.c +index f0dede12b..e706c3039 100644 +--- a/kernel/trace/trace_events.c ++++ b/kernel/trace/trace_events.c +@@ -184,6 +184,8 @@ static int trace_define_common_fields(void) + __common_field(unsigned char, flags); + __common_field(unsigned char, preempt_count); + __common_field(int, pid); ++ __common_field(unsigned char, migrate_disable); ++ __common_field(unsigned char, preempt_lazy_count); + + return ret; + } +diff --git a/kernel/trace/trace_output.c b/kernel/trace/trace_output.c +index 4778cecee..0c4cc486c 100644 +--- a/kernel/trace/trace_output.c ++++ b/kernel/trace/trace_output.c +@@ -441,6 +441,7 @@ int trace_print_lat_fmt(struct trace_seq *s, struct trace_entry *entry) + { + char hardsoft_irq; + char need_resched; ++ char need_resched_lazy; + char irqs_off; + int hardirq; + int softirq; +@@ -471,6 +472,9 @@ int trace_print_lat_fmt(struct trace_seq *s, struct trace_entry *entry) + break; + } + ++ need_resched_lazy = ++ (entry->flags & TRACE_FLAG_NEED_RESCHED_LAZY) ? 'L' : '.'; ++ + hardsoft_irq = + (nmi && hardirq) ? 'Z' : + nmi ? 'z' : +@@ -479,14 +483,25 @@ int trace_print_lat_fmt(struct trace_seq *s, struct trace_entry *entry) + softirq ? 's' : + '.' ; + +- trace_seq_printf(s, "%c%c%c", +- irqs_off, need_resched, hardsoft_irq); ++ trace_seq_printf(s, "%c%c%c%c", ++ irqs_off, need_resched, need_resched_lazy, ++ hardsoft_irq); + + if (entry->preempt_count) + trace_seq_printf(s, "%x", entry->preempt_count); + else + trace_seq_putc(s, '.'); + ++ if (entry->preempt_lazy_count) ++ trace_seq_printf(s, "%x", entry->preempt_lazy_count); ++ else ++ trace_seq_putc(s, '.'); ++ ++ if (entry->migrate_disable) ++ trace_seq_printf(s, "%x", entry->migrate_disable); ++ else ++ trace_seq_putc(s, '.'); ++ + return !trace_seq_has_overflowed(s); + } + +diff --git a/kernel/workqueue.c b/kernel/workqueue.c +index 9db32d973..663f295f9 100644 +--- a/kernel/workqueue.c ++++ b/kernel/workqueue.c +@@ -4816,9 +4816,7 @@ void show_workqueue_state(void) + * drivers that queue work while holding locks + * also taken in their write paths. + */ +- printk_safe_enter(); + show_pwq(pwq); +- printk_safe_exit(); + } + raw_spin_unlock_irqrestore(&pwq->pool->lock, flags); + /* +@@ -4842,7 +4840,6 @@ void show_workqueue_state(void) + * queue work while holding locks also taken in their write + * paths. + */ +- printk_safe_enter(); + pr_info("pool %d:", pool->id); + pr_cont_pool_info(pool); + pr_cont(" hung=%us workers=%d", +@@ -4857,7 +4854,6 @@ void show_workqueue_state(void) + first = false; + } + pr_cont("\n"); +- printk_safe_exit(); + next_pool: + raw_spin_unlock_irqrestore(&pool->lock, flags); + /* +@@ -4949,6 +4945,10 @@ static void unbind_workers(int cpu) + pool->flags |= POOL_DISASSOCIATED; + + raw_spin_unlock_irq(&pool->lock); ++ ++ for_each_pool_worker(worker, pool) ++ WARN_ON_ONCE(set_cpus_allowed_ptr(worker->task, cpu_active_mask) < 0); ++ + mutex_unlock(&wq_pool_attach_mutex); + + /* +diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug +index 5839cfdc1..cd5433600 100644 +--- a/lib/Kconfig.debug ++++ b/lib/Kconfig.debug +@@ -1420,7 +1420,7 @@ config DEBUG_ATOMIC_SLEEP + + config DEBUG_LOCKING_API_SELFTESTS + bool "Locking API boot-time self-tests" +- depends on DEBUG_KERNEL ++ depends on DEBUG_KERNEL && !PREEMPT_RT + help + Say Y here if you want the kernel to run a short self-test during + bootup. The self-test checks whether common types of locking bugs +diff --git a/lib/bug.c b/lib/bug.c +index 4ab398a2d..9c681f29e 100644 +--- a/lib/bug.c ++++ b/lib/bug.c +@@ -202,6 +202,7 @@ enum bug_trap_type report_bug(unsigned long bugaddr, struct pt_regs *regs) + else + pr_crit("Kernel BUG at %pB [verbose debug info unavailable]\n", + (void *)bugaddr); ++ pr_flush(1000, true); + + return BUG_TRAP_TYPE_BUG; + } +diff --git a/lib/cpumask.c b/lib/cpumask.c +index fb22fb266..c3c76b833 100644 +--- a/lib/cpumask.c ++++ b/lib/cpumask.c +@@ -261,3 +261,21 @@ int cpumask_any_and_distribute(const struct cpumask *src1p, + return next; + } + EXPORT_SYMBOL(cpumask_any_and_distribute); ++ ++int cpumask_any_distribute(const struct cpumask *srcp) ++{ ++ int next, prev; ++ ++ /* NOTE: our first selection will skip 0. */ ++ prev = __this_cpu_read(distribute_cpu_mask_prev); ++ ++ next = cpumask_next(prev, srcp); ++ if (next >= nr_cpu_ids) ++ next = cpumask_first(srcp); ++ ++ if (next < nr_cpu_ids) ++ __this_cpu_write(distribute_cpu_mask_prev, next); ++ ++ return next; ++} ++EXPORT_SYMBOL(cpumask_any_distribute); +diff --git a/lib/debugobjects.c b/lib/debugobjects.c +index 71bdc167a..e5ab016ca 100644 +--- a/lib/debugobjects.c ++++ b/lib/debugobjects.c +@@ -564,7 +564,10 @@ __debug_object_init(void *addr, const struct debug_obj_descr *descr, int onstack + struct debug_obj *obj; + unsigned long flags; + +- fill_pool(); ++#ifdef CONFIG_PREEMPT_RT ++ if (preempt_count() == 0 && !irqs_disabled()) ++#endif ++ fill_pool(); + + db = get_bucket((unsigned long) addr); + +diff --git a/lib/dump_stack.c b/lib/dump_stack.c +index a00ee6eed..f5a33b6f7 100644 +--- a/lib/dump_stack.c ++++ b/lib/dump_stack.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + + static char dump_stack_arch_desc_str[128]; + +@@ -57,6 +58,7 @@ void dump_stack_print_info(const char *log_lvl) + log_lvl, dump_stack_arch_desc_str); + + print_worker_info(log_lvl, current); ++ print_stop_info(log_lvl, current); + } + + /** +diff --git a/lib/irq_poll.c b/lib/irq_poll.c +index 2f17b488d..7557bf7ec 100644 +--- a/lib/irq_poll.c ++++ b/lib/irq_poll.c +@@ -37,6 +37,7 @@ void irq_poll_sched(struct irq_poll *iop) + list_add_tail(&iop->list, this_cpu_ptr(&blk_cpu_iopoll)); + raise_softirq_irqoff(IRQ_POLL_SOFTIRQ); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(irq_poll_sched); + +@@ -72,6 +73,7 @@ void irq_poll_complete(struct irq_poll *iop) + local_irq_save(flags); + __irq_poll_complete(iop); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(irq_poll_complete); + +@@ -96,6 +98,7 @@ static void __latent_entropy irq_poll_softirq(struct softirq_action *h) + } + + local_irq_enable(); ++ preempt_check_resched_rt(); + + /* Even though interrupts have been re-enabled, this + * access is safe because interrupts can only add new +@@ -133,6 +136,7 @@ static void __latent_entropy irq_poll_softirq(struct softirq_action *h) + __raise_softirq_irqoff(IRQ_POLL_SOFTIRQ); + + local_irq_enable(); ++ preempt_check_resched_rt(); + } + + /** +@@ -196,6 +200,7 @@ static int irq_poll_cpu_dead(unsigned int cpu) + this_cpu_ptr(&blk_cpu_iopoll)); + __raise_softirq_irqoff(IRQ_POLL_SOFTIRQ); + local_irq_enable(); ++ preempt_check_resched_rt(); + + return 0; + } +diff --git a/lib/locking-selftest.c b/lib/locking-selftest.c +index 76c52b0b7..98c376b02 100644 +--- a/lib/locking-selftest.c ++++ b/lib/locking-selftest.c +@@ -787,6 +787,8 @@ GENERATE_TESTCASE(init_held_rtmutex); + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_hard_rlock) + +@@ -802,9 +804,12 @@ GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_soft_rlock) + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + ++#ifndef CONFIG_PREEMPT_RT + /* + * Enabling hardirqs with a softirq-safe lock held: + */ +@@ -837,6 +842,8 @@ GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2A_rlock) + #undef E1 + #undef E2 + ++#endif ++ + /* + * Enabling irqs with an irq-safe lock held: + */ +@@ -860,6 +867,8 @@ GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2A_rlock) + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_hard_rlock) + +@@ -875,6 +884,8 @@ GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_soft_rlock) + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + +@@ -906,6 +917,8 @@ GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_soft_wlock) + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_hard_rlock) + +@@ -921,6 +934,8 @@ GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_soft_rlock) + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + #undef E3 +@@ -954,6 +969,8 @@ GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_soft_wlock) + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_hard_rlock) + +@@ -969,10 +986,14 @@ GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_soft_rlock) + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + #undef E3 + ++#ifndef CONFIG_PREEMPT_RT ++ + /* + * read-lock / write-lock irq inversion. + * +@@ -1162,6 +1183,11 @@ GENERATE_PERMUTATIONS_3_EVENTS(W1W2_R2R3_R3W1) + #undef E1 + #undef E2 + #undef E3 ++ ++#endif ++ ++#ifndef CONFIG_PREEMPT_RT ++ + /* + * read-lock / write-lock recursion that is actually safe. + */ +@@ -1208,6 +1234,8 @@ GENERATE_PERMUTATIONS_3_EVENTS(irq_read_recursion_soft_wlock) + #undef E2 + #undef E3 + ++#endif ++ + /* + * read-lock / write-lock recursion that is unsafe. + */ +@@ -2456,6 +2484,7 @@ void locking_selftest(void) + + printk(" --------------------------------------------------------------------------\n"); + ++#ifndef CONFIG_PREEMPT_RT + /* + * irq-context testcases: + */ +@@ -2470,6 +2499,28 @@ void locking_selftest(void) + DO_TESTCASE_6x2x2RW("irq read-recursion #2", irq_read_recursion2); + DO_TESTCASE_6x2x2RW("irq read-recursion #3", irq_read_recursion3); + ++#else ++ /* On -rt, we only do hardirq context test for raw spinlock */ ++ DO_TESTCASE_1B("hard-irqs-on + irq-safe-A", irqsafe1_hard_spin, 12); ++ DO_TESTCASE_1B("hard-irqs-on + irq-safe-A", irqsafe1_hard_spin, 21); ++ ++ DO_TESTCASE_1B("hard-safe-A + irqs-on", irqsafe2B_hard_spin, 12); ++ DO_TESTCASE_1B("hard-safe-A + irqs-on", irqsafe2B_hard_spin, 21); ++ ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 123); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 132); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 213); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 231); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 312); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 321); ++ ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 123); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 132); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 213); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 231); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 312); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 321); ++#endif + ww_tests(); + + force_read_lock_recursive = 0; +diff --git a/lib/nmi_backtrace.c b/lib/nmi_backtrace.c +index 8abe1870d..b09a490f5 100644 +--- a/lib/nmi_backtrace.c ++++ b/lib/nmi_backtrace.c +@@ -75,12 +75,6 @@ void nmi_trigger_cpumask_backtrace(const cpumask_t *mask, + touch_softlockup_watchdog(); + } + +- /* +- * Force flush any remote buffers that might be stuck in IRQ context +- * and therefore could not run their irq_work. +- */ +- printk_safe_flush(); +- + clear_bit_unlock(0, &backtrace_flag); + put_cpu(); + } +diff --git a/lib/scatterlist.c b/lib/scatterlist.c +index a59778946..907f59045 100644 +--- a/lib/scatterlist.c ++++ b/lib/scatterlist.c +@@ -892,7 +892,7 @@ void sg_miter_stop(struct sg_mapping_iter *miter) + flush_kernel_dcache_page(miter->page); + + if (miter->__flags & SG_MITER_ATOMIC) { +- WARN_ON_ONCE(preemptible()); ++ WARN_ON_ONCE(!pagefault_disabled()); + kunmap_atomic(miter->addr); + } else + kunmap(miter->page); +diff --git a/lib/smp_processor_id.c b/lib/smp_processor_id.c +index 2916606a9..0c0c42b14 100644 +--- a/lib/smp_processor_id.c ++++ b/lib/smp_processor_id.c +@@ -26,6 +26,11 @@ unsigned int check_preemption_disabled(const char *what1, const char *what2) + if (current->nr_cpus_allowed == 1) + goto out; + ++#ifdef CONFIG_SMP ++ if (current->migration_disabled) ++ goto out; ++#endif ++ + /* + * It is valid to assume CPU-locality during early bootup: + */ +diff --git a/lib/test_lockup.c b/lib/test_lockup.c +index 78a630bbd..d27a80502 100644 +--- a/lib/test_lockup.c ++++ b/lib/test_lockup.c +@@ -485,6 +485,21 @@ static int __init test_lockup_init(void) + return -EINVAL; + + #ifdef CONFIG_DEBUG_SPINLOCK ++#ifdef CONFIG_PREEMPT_RT ++ if (test_magic(lock_spinlock_ptr, ++ offsetof(spinlock_t, lock.wait_lock.magic), ++ SPINLOCK_MAGIC) || ++ test_magic(lock_rwlock_ptr, ++ offsetof(rwlock_t, rtmutex.wait_lock.magic), ++ SPINLOCK_MAGIC) || ++ test_magic(lock_mutex_ptr, ++ offsetof(struct mutex, lock.wait_lock.magic), ++ SPINLOCK_MAGIC) || ++ test_magic(lock_rwsem_ptr, ++ offsetof(struct rw_semaphore, rtmutex.wait_lock.magic), ++ SPINLOCK_MAGIC)) ++ return -EINVAL; ++#else + if (test_magic(lock_spinlock_ptr, + offsetof(spinlock_t, rlock.magic), + SPINLOCK_MAGIC) || +@@ -498,6 +513,7 @@ static int __init test_lockup_init(void) + offsetof(struct rw_semaphore, wait_lock.magic), + SPINLOCK_MAGIC)) + return -EINVAL; ++#endif + #endif + + if ((wait_state != TASK_RUNNING || +diff --git a/mm/Kconfig b/mm/Kconfig +index f66457168..fccd4ebdb 100644 +--- a/mm/Kconfig ++++ b/mm/Kconfig +@@ -404,7 +404,7 @@ config NOMMU_INITIAL_TRIM_EXCESS + + config TRANSPARENT_HUGEPAGE + bool "Transparent Hugepage Support" +- depends on HAVE_ARCH_TRANSPARENT_HUGEPAGE ++ depends on HAVE_ARCH_TRANSPARENT_HUGEPAGE && !PREEMPT_RT + select COMPACTION + select XARRAY_MULTI + help +@@ -943,6 +943,9 @@ config ARCH_HAS_HUGEPD + config MAPPING_DIRTY_HELPERS + bool + ++config KMAP_LOCAL ++ bool ++ + config PIN_MEMORY + bool "Support for pin memory" + depends on MMU && ARM64 +diff --git a/mm/highmem.c b/mm/highmem.c +index efe38ab47..ad72e587c 100644 +--- a/mm/highmem.c ++++ b/mm/highmem.c +@@ -31,10 +31,6 @@ + #include + #include + +-#if defined(CONFIG_HIGHMEM) || defined(CONFIG_X86_32) +-DEFINE_PER_CPU(int, __kmap_atomic_idx); +-#endif +- + /* + * Virtual_count is not a pure "count". + * 0 means that it is not mapped, and has not been mapped +@@ -108,9 +104,7 @@ static inline wait_queue_head_t *get_pkmap_wait_queue_head(unsigned int color) + atomic_long_t _totalhigh_pages __read_mostly; + EXPORT_SYMBOL(_totalhigh_pages); + +-EXPORT_PER_CPU_SYMBOL(__kmap_atomic_idx); +- +-unsigned int nr_free_highpages (void) ++unsigned int __nr_free_highpages (void) + { + struct zone *zone; + unsigned int pages = 0; +@@ -147,7 +141,7 @@ pte_t * pkmap_page_table; + do { spin_unlock(&kmap_lock); (void)(flags); } while (0) + #endif + +-struct page *kmap_to_page(void *vaddr) ++struct page *__kmap_to_page(void *vaddr) + { + unsigned long addr = (unsigned long)vaddr; + +@@ -158,7 +152,7 @@ struct page *kmap_to_page(void *vaddr) + + return virt_to_page(addr); + } +-EXPORT_SYMBOL(kmap_to_page); ++EXPORT_SYMBOL(__kmap_to_page); + + static void flush_all_zero_pkmaps(void) + { +@@ -200,10 +194,7 @@ static void flush_all_zero_pkmaps(void) + flush_tlb_kernel_range(PKMAP_ADDR(0), PKMAP_ADDR(LAST_PKMAP)); + } + +-/** +- * kmap_flush_unused - flush all unused kmap mappings in order to remove stray mappings +- */ +-void kmap_flush_unused(void) ++void __kmap_flush_unused(void) + { + lock_kmap(); + flush_all_zero_pkmaps(); +@@ -428,7 +419,250 @@ void zero_user_segments(struct page *page, unsigned start1, unsigned end1, + } + EXPORT_SYMBOL(zero_user_segments); + #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ +-#endif /* CONFIG_HIGHMEM */ ++#endif /* CONFIG_HIGHMEM */ ++ ++#ifdef CONFIG_KMAP_LOCAL ++ ++#include ++ ++/* ++ * With DEBUG_HIGHMEM the stack depth is doubled and every second ++ * slot is unused which acts as a guard page ++ */ ++#ifdef CONFIG_DEBUG_HIGHMEM ++# define KM_INCR 2 ++#else ++# define KM_INCR 1 ++#endif ++ ++static inline int kmap_local_idx_push(void) ++{ ++ WARN_ON_ONCE(in_irq() && !irqs_disabled()); ++ current->kmap_ctrl.idx += KM_INCR; ++ BUG_ON(current->kmap_ctrl.idx >= KM_MAX_IDX); ++ return current->kmap_ctrl.idx - 1; ++ ++} ++ ++static inline int kmap_local_idx(void) ++{ ++ return current->kmap_ctrl.idx - 1; ++} ++ ++static inline void kmap_local_idx_pop(void) ++{ ++ current->kmap_ctrl.idx -= KM_INCR; ++ BUG_ON(current->kmap_ctrl.idx < 0); ++} ++ ++#ifndef arch_kmap_local_post_map ++# define arch_kmap_local_post_map(vaddr, pteval) do { } while (0) ++#endif ++ ++#ifndef arch_kmap_local_pre_unmap ++# define arch_kmap_local_pre_unmap(vaddr) do { } while (0) ++#endif ++ ++#ifndef arch_kmap_local_post_unmap ++# define arch_kmap_local_post_unmap(vaddr) do { } while (0) ++#endif ++ ++#ifndef arch_kmap_local_map_idx ++#define arch_kmap_local_map_idx(idx, pfn) kmap_local_calc_idx(idx) ++#endif ++ ++#ifndef arch_kmap_local_unmap_idx ++#define arch_kmap_local_unmap_idx(idx, vaddr) kmap_local_calc_idx(idx) ++#endif ++ ++#ifndef arch_kmap_local_high_get ++static inline void *arch_kmap_local_high_get(struct page *page) ++{ ++ return NULL; ++} ++#endif ++ ++/* Unmap a local mapping which was obtained by kmap_high_get() */ ++static inline bool kmap_high_unmap_local(unsigned long vaddr) ++{ ++#ifdef ARCH_NEEDS_KMAP_HIGH_GET ++ if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) { ++ kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)])); ++ return true; ++ } ++#endif ++ return false; ++} ++ ++static inline int kmap_local_calc_idx(int idx) ++{ ++ return idx + KM_MAX_IDX * smp_processor_id(); ++} ++ ++static pte_t *__kmap_pte; ++ ++static pte_t *kmap_get_pte(void) ++{ ++ if (!__kmap_pte) ++ __kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN)); ++ return __kmap_pte; ++} ++ ++void *__kmap_local_pfn_prot(unsigned long pfn, pgprot_t prot) ++{ ++ pte_t pteval, *kmap_pte = kmap_get_pte(); ++ unsigned long vaddr; ++ int idx; ++ ++ /* ++ * Disable migration so resulting virtual address is stable ++ * accross preemption. ++ */ ++ migrate_disable(); ++ preempt_disable(); ++ idx = arch_kmap_local_map_idx(kmap_local_idx_push(), pfn); ++ vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); ++ BUG_ON(!pte_none(*(kmap_pte - idx))); ++ pteval = pfn_pte(pfn, prot); ++ set_pte_at(&init_mm, vaddr, kmap_pte - idx, pteval); ++ arch_kmap_local_post_map(vaddr, pteval); ++ current->kmap_ctrl.pteval[kmap_local_idx()] = pteval; ++ preempt_enable(); ++ ++ return (void *)vaddr; ++} ++EXPORT_SYMBOL_GPL(__kmap_local_pfn_prot); ++ ++void *__kmap_local_page_prot(struct page *page, pgprot_t prot) ++{ ++ void *kmap; ++ ++ if (!PageHighMem(page)) ++ return page_address(page); ++ ++ /* Try kmap_high_get() if architecture has it enabled */ ++ kmap = arch_kmap_local_high_get(page); ++ if (kmap) ++ return kmap; ++ ++ return __kmap_local_pfn_prot(page_to_pfn(page), prot); ++} ++EXPORT_SYMBOL(__kmap_local_page_prot); ++ ++void kunmap_local_indexed(void *vaddr) ++{ ++ unsigned long addr = (unsigned long) vaddr & PAGE_MASK; ++ pte_t *kmap_pte = kmap_get_pte(); ++ int idx; ++ ++ if (addr < __fix_to_virt(FIX_KMAP_END) || ++ addr > __fix_to_virt(FIX_KMAP_BEGIN)) { ++ /* ++ * Handle mappings which were obtained by kmap_high_get() ++ * first as the virtual address of such mappings is below ++ * PAGE_OFFSET. Warn for all other addresses which are in ++ * the user space part of the virtual address space. ++ */ ++ if (!kmap_high_unmap_local(addr)) ++ WARN_ON_ONCE(addr < PAGE_OFFSET); ++ return; ++ } ++ ++ preempt_disable(); ++ idx = arch_kmap_local_unmap_idx(kmap_local_idx(), addr); ++ WARN_ON_ONCE(addr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); ++ ++ arch_kmap_local_pre_unmap(addr); ++ pte_clear(&init_mm, addr, kmap_pte - idx); ++ arch_kmap_local_post_unmap(addr); ++ current->kmap_ctrl.pteval[kmap_local_idx()] = __pte(0); ++ kmap_local_idx_pop(); ++ preempt_enable(); ++ migrate_enable(); ++} ++EXPORT_SYMBOL(kunmap_local_indexed); ++ ++/* ++ * Invoked before switch_to(). This is safe even when during or after ++ * clearing the maps an interrupt which needs a kmap_local happens because ++ * the task::kmap_ctrl.idx is not modified by the unmapping code so a ++ * nested kmap_local will use the next unused index and restore the index ++ * on unmap. The already cleared kmaps of the outgoing task are irrelevant ++ * because the interrupt context does not know about them. The same applies ++ * when scheduling back in for an interrupt which happens before the ++ * restore is complete. ++ */ ++void __kmap_local_sched_out(void) ++{ ++ struct task_struct *tsk = current; ++ pte_t *kmap_pte = kmap_get_pte(); ++ int i; ++ ++ /* Clear kmaps */ ++ for (i = 0; i < tsk->kmap_ctrl.idx; i++) { ++ pte_t pteval = tsk->kmap_ctrl.pteval[i]; ++ unsigned long addr; ++ int idx; ++ ++ /* With debug all even slots are unmapped and act as guard */ ++ if (IS_ENABLED(CONFIG_DEBUG_HIGHMEM) && !(i & 0x01)) { ++ WARN_ON_ONCE(!pte_none(pteval)); ++ continue; ++ } ++ if (WARN_ON_ONCE(pte_none(pteval))) ++ continue; ++ ++ /* ++ * This is a horrible hack for XTENSA to calculate the ++ * coloured PTE index. Uses the PFN encoded into the pteval ++ * and the map index calculation because the actual mapped ++ * virtual address is not stored in task::kmap_ctrl. ++ * For any sane architecture this is optimized out. ++ */ ++ idx = arch_kmap_local_map_idx(i, pte_pfn(pteval)); ++ ++ addr = __fix_to_virt(FIX_KMAP_BEGIN + idx); ++ arch_kmap_local_pre_unmap(addr); ++ pte_clear(&init_mm, addr, kmap_pte - idx); ++ arch_kmap_local_post_unmap(addr); ++ } ++} ++ ++void __kmap_local_sched_in(void) ++{ ++ struct task_struct *tsk = current; ++ pte_t *kmap_pte = kmap_get_pte(); ++ int i; ++ ++ /* Restore kmaps */ ++ for (i = 0; i < tsk->kmap_ctrl.idx; i++) { ++ pte_t pteval = tsk->kmap_ctrl.pteval[i]; ++ unsigned long addr; ++ int idx; ++ ++ /* With debug all even slots are unmapped and act as guard */ ++ if (IS_ENABLED(CONFIG_DEBUG_HIGHMEM) && !(i & 0x01)) { ++ WARN_ON_ONCE(!pte_none(pteval)); ++ continue; ++ } ++ if (WARN_ON_ONCE(pte_none(pteval))) ++ continue; ++ ++ /* See comment in __kmap_local_sched_out() */ ++ idx = arch_kmap_local_map_idx(i, pte_pfn(pteval)); ++ addr = __fix_to_virt(FIX_KMAP_BEGIN + idx); ++ set_pte_at(&init_mm, addr, kmap_pte - idx, pteval); ++ arch_kmap_local_post_map(addr, pteval); ++ } ++} ++ ++void kmap_local_fork(struct task_struct *tsk) ++{ ++ if (WARN_ON_ONCE(tsk->kmap_ctrl.idx)) ++ memset(&tsk->kmap_ctrl, 0, sizeof(tsk->kmap_ctrl)); ++} ++ ++#endif + + #if defined(HASHED_PAGE_VIRTUAL) + +diff --git a/mm/memcontrol.c b/mm/memcontrol.c +index 710903654..6ddd19d33 100644 +--- a/mm/memcontrol.c ++++ b/mm/memcontrol.c +@@ -67,6 +67,7 @@ + #include + #include + #include "slab.h" ++#include + + #include + +@@ -100,6 +101,14 @@ bool cgroup_memory_noswap __read_mostly; + static DECLARE_WAIT_QUEUE_HEAD(memcg_cgwb_frn_waitq); + #endif + ++ ++struct event_lock { ++ local_lock_t l; ++}; ++static DEFINE_PER_CPU(struct event_lock, event_lock) = { ++ .l = INIT_LOCAL_LOCK(l), ++}; ++ + /* Whether legacy memory+swap accounting is active */ + static bool do_memsw_account(void) + { +@@ -764,6 +773,7 @@ void __mod_memcg_lruvec_state(struct lruvec *lruvec, enum node_stat_item idx, + pn = container_of(lruvec, struct mem_cgroup_per_node, lruvec); + memcg = pn->memcg; + ++ preempt_disable_rt(); + /* Update memcg */ + __this_cpu_add(memcg->vmstats_percpu->state[idx], val); + +@@ -771,6 +781,7 @@ void __mod_memcg_lruvec_state(struct lruvec *lruvec, enum node_stat_item idx, + __this_cpu_add(pn->lruvec_stats_percpu->state[idx], val); + + memcg_rstat_updated(memcg); ++ preempt_enable_rt(); + } + + /** +@@ -2174,6 +2185,7 @@ void unlock_page_memcg(struct page *page) + EXPORT_SYMBOL(unlock_page_memcg); + + struct memcg_stock_pcp { ++ local_lock_t lock; + struct mem_cgroup *cached; /* this never be root cgroup */ + unsigned int nr_pages; + +@@ -2225,7 +2237,7 @@ static bool consume_stock(struct mem_cgroup *memcg, unsigned int nr_pages) + if (nr_pages > MEMCG_CHARGE_BATCH) + return ret; + +- local_irq_save(flags); ++ local_lock_irqsave(&memcg_stock.lock, flags); + + stock = this_cpu_ptr(&memcg_stock); + if (memcg == stock->cached && stock->nr_pages >= nr_pages) { +@@ -2233,7 +2245,7 @@ static bool consume_stock(struct mem_cgroup *memcg, unsigned int nr_pages) + ret = true; + } + +- local_irq_restore(flags); ++ local_unlock_irqrestore(&memcg_stock.lock, flags); + + return ret; + } +@@ -2268,14 +2280,14 @@ static void drain_local_stock(struct work_struct *dummy) + * The only protection from memory hotplug vs. drain_stock races is + * that we always operate on local CPU stock here with IRQ disabled + */ +- local_irq_save(flags); ++ local_lock_irqsave(&memcg_stock.lock, flags); + + stock = this_cpu_ptr(&memcg_stock); + drain_obj_stock(stock); + drain_stock(stock); + clear_bit(FLUSHING_CACHED_CHARGE, &stock->flags); + +- local_irq_restore(flags); ++ local_unlock_irqrestore(&memcg_stock.lock, flags); + } + + /* +@@ -2287,7 +2299,7 @@ static void refill_stock(struct mem_cgroup *memcg, unsigned int nr_pages) + struct memcg_stock_pcp *stock; + unsigned long flags; + +- local_irq_save(flags); ++ local_lock_irqsave(&memcg_stock.lock, flags); + + stock = this_cpu_ptr(&memcg_stock); + if (stock->cached != memcg) { /* reset if necessary */ +@@ -2300,7 +2312,7 @@ static void refill_stock(struct mem_cgroup *memcg, unsigned int nr_pages) + if (stock->nr_pages > MEMCG_CHARGE_BATCH) + drain_stock(stock); + +- local_irq_restore(flags); ++ local_unlock_irqrestore(&memcg_stock.lock, flags); + } + + /* +@@ -2320,7 +2332,7 @@ static void drain_all_stock(struct mem_cgroup *root_memcg) + * as well as workers from this path always operate on the local + * per-cpu data. CPU up doesn't touch memcg_stock at all. + */ +- curcpu = get_cpu(); ++ curcpu = get_cpu_light(); + for_each_online_cpu(cpu) { + struct memcg_stock_pcp *stock = &per_cpu(memcg_stock, cpu); + struct mem_cgroup *memcg; +@@ -2343,7 +2355,7 @@ static void drain_all_stock(struct mem_cgroup *root_memcg) + schedule_work_on(cpu, &stock->work); + } + } +- put_cpu(); ++ put_cpu_light(); + mutex_unlock(&percpu_charge_mutex); + } + +@@ -3145,7 +3157,7 @@ static bool consume_obj_stock(struct obj_cgroup *objcg, unsigned int nr_bytes) + unsigned long flags; + bool ret = false; + +- local_irq_save(flags); ++ local_lock_irqsave(&memcg_stock.lock, flags); + + stock = this_cpu_ptr(&memcg_stock); + if (objcg == stock->cached_objcg && stock->nr_bytes >= nr_bytes) { +@@ -3153,7 +3165,7 @@ static bool consume_obj_stock(struct obj_cgroup *objcg, unsigned int nr_bytes) + ret = true; + } + +- local_irq_restore(flags); ++ local_unlock_irqrestore(&memcg_stock.lock, flags); + + return ret; + } +@@ -3209,7 +3221,7 @@ static void refill_obj_stock(struct obj_cgroup *objcg, unsigned int nr_bytes) + struct memcg_stock_pcp *stock; + unsigned long flags; + +- local_irq_save(flags); ++ local_lock_irqsave(&memcg_stock.lock, flags); + + stock = this_cpu_ptr(&memcg_stock); + if (stock->cached_objcg != objcg) { /* reset if necessary */ +@@ -3223,7 +3235,7 @@ static void refill_obj_stock(struct obj_cgroup *objcg, unsigned int nr_bytes) + if (stock->nr_bytes > PAGE_SIZE) + drain_obj_stock(stock); + +- local_irq_restore(flags); ++ local_unlock_irqrestore(&memcg_stock.lock, flags); + } + + int obj_cgroup_charge(struct obj_cgroup *objcg, gfp_t gfp, size_t size) +@@ -6426,12 +6438,12 @@ static int mem_cgroup_move_account(struct page *page, + + ret = 0; + +- local_irq_disable(); ++ local_lock_irq(&event_lock.l); + mem_cgroup_charge_statistics(to, page, nr_pages); + memcg_check_events(to, page); + mem_cgroup_charge_statistics(from, page, -nr_pages); + memcg_check_events(from, page); +- local_irq_enable(); ++ local_unlock_irq(&event_lock.l); + out_unlock: + unlock_page(page); + out: +@@ -7408,10 +7420,10 @@ int mem_cgroup_charge(struct page *page, struct mm_struct *mm, gfp_t gfp_mask) + css_get(&memcg->css); + commit_charge(page, memcg); + +- local_irq_disable(); ++ local_lock_irq(&event_lock.l); + mem_cgroup_charge_statistics(memcg, page, nr_pages); + memcg_check_events(memcg, page); +- local_irq_enable(); ++ local_unlock_irq(&event_lock.l); + + /* + * Cgroup1's unified memory+swap counter has been charged with the +@@ -7467,11 +7479,11 @@ static void uncharge_batch(const struct uncharge_gather *ug) + memcg_oom_recover(ug->memcg); + } + +- local_irq_save(flags); ++ local_lock_irqsave(&event_lock.l, flags); + __count_memcg_events(ug->memcg, PGPGOUT, ug->pgpgout); + __this_cpu_add(ug->memcg->vmstats_percpu->nr_page_events, ug->nr_memory); + memcg_check_events(ug->memcg, ug->dummy_page); +- local_irq_restore(flags); ++ local_unlock_irqrestore(&event_lock.l, flags); + + /* drop reference from uncharge_page */ + css_put(&ug->memcg->css); +@@ -7643,10 +7655,10 @@ void mem_cgroup_migrate(struct page *oldpage, struct page *newpage) + css_get(&memcg->css); + commit_charge(newpage, memcg); + +- local_irq_save(flags); ++ local_lock_irqsave(&event_lock.l, flags); + mem_cgroup_charge_statistics(memcg, newpage, nr_pages); + memcg_check_events(memcg, newpage); +- local_irq_restore(flags); ++ local_unlock_irqrestore(&event_lock.l, flags); + } + + DEFINE_STATIC_KEY_FALSE(memcg_sockets_enabled_key); +@@ -7776,9 +7788,13 @@ static int __init mem_cgroup_init(void) + cpuhp_setup_state_nocalls(CPUHP_MM_MEMCQ_DEAD, "mm/memctrl:dead", NULL, + memcg_hotplug_cpu_dead); + +- for_each_possible_cpu(cpu) +- INIT_WORK(&per_cpu_ptr(&memcg_stock, cpu)->work, +- drain_local_stock); ++ for_each_possible_cpu(cpu) { ++ struct memcg_stock_pcp *stock; ++ ++ stock = per_cpu_ptr(&memcg_stock, cpu); ++ INIT_WORK(&stock->work, drain_local_stock); ++ local_lock_init(&stock->lock); ++ } + + for_each_node(node) { + struct mem_cgroup_tree_per_node *rtpn; +@@ -7829,6 +7845,7 @@ void mem_cgroup_swapout(struct page *page, swp_entry_t entry) + struct mem_cgroup *memcg, *swap_memcg; + unsigned int nr_entries; + unsigned short oldid; ++ unsigned long flags; + + VM_BUG_ON_PAGE(PageLRU(page), page); + VM_BUG_ON_PAGE(page_count(page), page); +@@ -7874,9 +7891,13 @@ void mem_cgroup_swapout(struct page *page, swp_entry_t entry) + * important here to have the interrupts disabled because it is the + * only synchronisation we have for updating the per-CPU variables. + */ ++ local_lock_irqsave(&event_lock.l, flags); ++#ifndef CONFIG_PREEMPT_RT + VM_BUG_ON(!irqs_disabled()); ++#endif + mem_cgroup_charge_statistics(memcg, page, -nr_entries); + memcg_check_events(memcg, page); ++ local_unlock_irqrestore(&event_lock.l, flags); + + css_put(&memcg->css); + } +diff --git a/mm/page_alloc.c b/mm/page_alloc.c +index 9e85e8b52..8f0d4b6c3 100644 +--- a/mm/page_alloc.c ++++ b/mm/page_alloc.c +@@ -61,6 +61,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -393,6 +394,13 @@ EXPORT_SYMBOL(nr_node_ids); + EXPORT_SYMBOL(nr_online_nodes); + #endif + ++struct pa_lock { ++ local_lock_t l; ++}; ++static DEFINE_PER_CPU(struct pa_lock, pa_lock) = { ++ .l = INIT_LOCAL_LOCK(l), ++}; ++ + int page_group_by_mobility_disabled __read_mostly; + + #ifdef CONFIG_DEFERRED_STRUCT_PAGE_INIT +@@ -1337,7 +1345,7 @@ static inline void prefetch_buddy(struct page *page) + } + + /* +- * Frees a number of pages from the PCP lists ++ * Frees a number of pages which have been collected from the pcp lists. + * Assumes all pages on list are in same zone, and of same order. + * count is the number of pages to free. + * +@@ -1347,15 +1355,56 @@ static inline void prefetch_buddy(struct page *page) + * And clear the zone's pages_scanned counter, to hold off the "all pages are + * pinned" detection logic. + */ +-static void free_pcppages_bulk(struct zone *zone, int count, +- struct per_cpu_pages *pcp) ++static void free_pcppages_bulk(struct zone *zone, struct list_head *head, ++ bool zone_retry) ++{ ++ bool isolated_pageblocks; ++ struct page *page, *tmp; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&zone->lock, flags); ++ isolated_pageblocks = has_isolate_pageblock(zone); ++ ++ /* ++ * Use safe version since after __free_one_page(), ++ * page->lru.next will not point to original list. ++ */ ++ list_for_each_entry_safe(page, tmp, head, lru) { ++ int mt = get_pcppage_migratetype(page); ++ ++ if (page_zone(page) != zone) { ++ /* ++ * free_unref_page_list() sorts pages by zone. If we end ++ * up with pages from a different NUMA nodes belonging ++ * to the same ZONE index then we need to redo with the ++ * correct ZONE pointer. Skip the page for now, redo it ++ * on the next iteration. ++ */ ++ WARN_ON_ONCE(zone_retry == false); ++ if (zone_retry) ++ continue; ++ } ++ ++ /* MIGRATE_ISOLATE page should not go to pcplists */ ++ VM_BUG_ON_PAGE(is_migrate_isolate(mt), page); ++ /* Pageblock could have been isolated meanwhile */ ++ if (unlikely(isolated_pageblocks)) ++ mt = get_pageblock_migratetype(page); ++ ++ list_del(&page->lru); ++ __free_one_page(page, page_to_pfn(page), zone, 0, mt, FPI_NONE); ++ trace_mm_page_pcpu_drain(page, 0, mt); ++ } ++ spin_unlock_irqrestore(&zone->lock, flags); ++} ++ ++static void isolate_pcp_pages(int count, struct per_cpu_pages *pcp, ++ struct list_head *dst) + { + int migratetype = 0; + int batch_free = 0; + int prefetch_nr = READ_ONCE(pcp->batch); +- bool isolated_pageblocks; +- struct page *page, *tmp; +- LIST_HEAD(head); ++ struct page *page; + + /* + * Ensure proper count is passed which otherwise would stuck in the +@@ -1392,7 +1441,7 @@ static void free_pcppages_bulk(struct zone *zone, int count, + if (bulkfree_pcp_prepare(page)) + continue; + +- list_add_tail(&page->lru, &head); ++ list_add_tail(&page->lru, dst); + + /* + * We are going to put the page back to the global +@@ -1409,26 +1458,6 @@ static void free_pcppages_bulk(struct zone *zone, int count, + } + } while (--count && --batch_free && !list_empty(list)); + } +- +- spin_lock(&zone->lock); +- isolated_pageblocks = has_isolate_pageblock(zone); +- +- /* +- * Use safe version since after __free_one_page(), +- * page->lru.next will not point to original list. +- */ +- list_for_each_entry_safe(page, tmp, &head, lru) { +- int mt = get_pcppage_migratetype(page); +- /* MIGRATE_ISOLATE page should not go to pcplists */ +- VM_BUG_ON_PAGE(is_migrate_isolate(mt), page); +- /* Pageblock could have been isolated meanwhile */ +- if (unlikely(isolated_pageblocks)) +- mt = get_pageblock_migratetype(page); +- +- __free_one_page(page, page_to_pfn(page), zone, 0, mt, FPI_NONE); +- trace_mm_page_pcpu_drain(page, 0, mt); +- } +- spin_unlock(&zone->lock); + } + + static void free_one_page(struct zone *zone, +@@ -1530,11 +1559,11 @@ static void __free_pages_ok(struct page *page, unsigned int order, + return; + + migratetype = get_pfnblock_migratetype(page, pfn); +- local_irq_save(flags); ++ local_lock_irqsave(&pa_lock.l, flags); + __count_vm_events(PGFREE, 1 << order); + free_one_page(page_zone(page), page, pfn, order, migratetype, + fpi_flags); +- local_irq_restore(flags); ++ local_unlock_irqrestore(&pa_lock.l, flags); + } + + void __free_pages_core(struct page *page, unsigned int order) +@@ -2945,13 +2974,18 @@ void drain_zone_pages(struct zone *zone, struct per_cpu_pages *pcp) + { + unsigned long flags; + int to_drain, batch; ++ LIST_HEAD(dst); + +- local_irq_save(flags); ++ local_lock_irqsave(&pa_lock.l, flags); + batch = READ_ONCE(pcp->batch); + to_drain = min(pcp->count, batch); + if (to_drain > 0) +- free_pcppages_bulk(zone, to_drain, pcp); +- local_irq_restore(flags); ++ isolate_pcp_pages(to_drain, pcp, &dst); ++ ++ local_unlock_irqrestore(&pa_lock.l, flags); ++ ++ if (to_drain > 0) ++ free_pcppages_bulk(zone, &dst, false); + } + #endif + +@@ -2967,14 +3001,21 @@ static void drain_pages_zone(unsigned int cpu, struct zone *zone) + unsigned long flags; + struct per_cpu_pageset *pset; + struct per_cpu_pages *pcp; ++ LIST_HEAD(dst); ++ int count; + +- local_irq_save(flags); ++ local_lock_irqsave(&pa_lock.l, flags); + pset = per_cpu_ptr(zone->pageset, cpu); + + pcp = &pset->pcp; +- if (pcp->count) +- free_pcppages_bulk(zone, pcp->count, pcp); +- local_irq_restore(flags); ++ count = pcp->count; ++ if (count) ++ isolate_pcp_pages(count, pcp, &dst); ++ ++ local_unlock_irqrestore(&pa_lock.l, flags); ++ ++ if (count) ++ free_pcppages_bulk(zone, &dst, false); + } + + /* +@@ -3022,9 +3063,9 @@ static void drain_local_pages_wq(struct work_struct *work) + * cpu which is allright but we also have to make sure to not move to + * a different one. + */ +- preempt_disable(); ++ migrate_disable(); + drain_local_pages(drain->zone); +- preempt_enable(); ++ migrate_enable(); + } + + /* +@@ -3194,7 +3235,8 @@ static bool free_unref_page_prepare(struct page *page, unsigned long pfn) + return true; + } + +-static void free_unref_page_commit(struct page *page, unsigned long pfn) ++static void free_unref_page_commit(struct page *page, unsigned long pfn, ++ struct list_head *dst) + { + struct zone *zone = page_zone(page); + struct per_cpu_pages *pcp; +@@ -3223,7 +3265,8 @@ static void free_unref_page_commit(struct page *page, unsigned long pfn) + list_add(&page->lru, &pcp->lists[migratetype]); + pcp->count++; + if (pcp->count >= READ_ONCE(pcp->high)) +- free_pcppages_bulk(zone, READ_ONCE(pcp->batch), pcp); ++ ++ isolate_pcp_pages(READ_ONCE(pcp->batch), pcp, dst); + } + + /* +@@ -3233,6 +3276,8 @@ void free_unref_page(struct page *page) + { + unsigned long flags; + unsigned long pfn = page_to_pfn(page); ++ struct zone *zone = page_zone(page); ++ LIST_HEAD(dst); + + /* Free dynamic hugetlb page */ + if (free_page_to_dhugetlb_pool(page)) +@@ -3241,9 +3286,11 @@ void free_unref_page(struct page *page) + if (!free_unref_page_prepare(page, pfn)) + return; + +- local_irq_save(flags); +- free_unref_page_commit(page, pfn); +- local_irq_restore(flags); ++ local_lock_irqsave(&pa_lock.l, flags); ++ free_unref_page_commit(page, pfn, &dst); ++ local_unlock_irqrestore(&pa_lock.l, flags); ++ if (!list_empty(&dst)) ++ free_pcppages_bulk(zone, &dst, false); + } + + /* +@@ -3254,6 +3301,11 @@ void free_unref_page_list(struct list_head *list) + struct page *page, *next; + unsigned long flags, pfn; + int batch_count = 0; ++ struct list_head dsts[__MAX_NR_ZONES]; ++ int i; ++ ++ for (i = 0; i < __MAX_NR_ZONES; i++) ++ INIT_LIST_HEAD(&dsts[i]); + + /* Free dynamic hugetlb page list */ + free_page_list_to_dhugetlb_pool(list); +@@ -3266,25 +3318,42 @@ void free_unref_page_list(struct list_head *list) + set_page_private(page, pfn); + } + +- local_irq_save(flags); ++ local_lock_irqsave(&pa_lock.l, flags); + list_for_each_entry_safe(page, next, list, lru) { + unsigned long pfn = page_private(page); ++ enum zone_type type; + + set_page_private(page, 0); + trace_mm_page_free_batched(page); +- free_unref_page_commit(page, pfn); ++ type = page_zonenum(page); ++ free_unref_page_commit(page, pfn, &dsts[type]); + + /* + * Guard against excessive IRQ disabled times when we get + * a large list of pages to free. + */ + if (++batch_count == SWAP_CLUSTER_MAX) { +- local_irq_restore(flags); ++ local_unlock_irqrestore(&pa_lock.l, flags); + batch_count = 0; +- local_irq_save(flags); ++ local_lock_irqsave(&pa_lock.l, flags); + } + } +- local_irq_restore(flags); ++ local_unlock_irqrestore(&pa_lock.l, flags); ++ ++ for (i = 0; i < __MAX_NR_ZONES; ) { ++ struct page *page; ++ struct zone *zone; ++ ++ if (list_empty(&dsts[i])) { ++ i++; ++ continue; ++ } ++ ++ page = list_first_entry(&dsts[i], struct page, lru); ++ zone = page_zone(page); ++ ++ free_pcppages_bulk(zone, &dsts[i], true); ++ } + } + + /* +@@ -3441,7 +3510,7 @@ static struct page *rmqueue_pcplist(struct zone *preferred_zone, + struct page *page; + unsigned long flags; + +- local_irq_save(flags); ++ local_lock_irqsave(&pa_lock.l, flags); + pcp = &this_cpu_ptr(zone->pageset)->pcp; + list = &pcp->lists[migratetype]; + page = __rmqueue_pcplist(zone, migratetype, alloc_flags, pcp, list); +@@ -3449,7 +3518,7 @@ static struct page *rmqueue_pcplist(struct zone *preferred_zone, + __count_zid_vm_events(PGALLOC, page_zonenum(page), 1); + zone_statistics(preferred_zone, zone); + } +- local_irq_restore(flags); ++ local_unlock_irqrestore(&pa_lock.l, flags); + return page; + } + +@@ -3483,7 +3552,8 @@ struct page *rmqueue(struct zone *preferred_zone, + * allocate greater than order-1 page units with __GFP_NOFAIL. + */ + WARN_ON_ONCE((gfp_flags & __GFP_NOFAIL) && (order > 1)); +- spin_lock_irqsave(&zone->lock, flags); ++ local_lock_irqsave(&pa_lock.l, flags); ++ spin_lock(&zone->lock); + + do { + page = NULL; +@@ -3509,7 +3579,7 @@ struct page *rmqueue(struct zone *preferred_zone, + + __count_zid_vm_events(PGALLOC, page_zonenum(page), 1 << order); + zone_statistics(preferred_zone, zone); +- local_irq_restore(flags); ++ local_unlock_irqrestore(&pa_lock.l, flags); + + out: + /* Separate test+clear to avoid unnecessary atomics */ +@@ -3522,7 +3592,7 @@ struct page *rmqueue(struct zone *preferred_zone, + return page; + + failed: +- local_irq_restore(flags); ++ local_unlock_irqrestore(&pa_lock.l, flags); + return NULL; + } + +@@ -9344,7 +9414,7 @@ void zone_pcp_reset(struct zone *zone) + struct per_cpu_pageset *pset; + + /* avoid races with drain_pages() */ +- local_irq_save(flags); ++ local_lock_irqsave(&pa_lock.l, flags); + if (zone->pageset != &boot_pageset) { + for_each_online_cpu(cpu) { + pset = per_cpu_ptr(zone->pageset, cpu); +@@ -9353,7 +9423,7 @@ void zone_pcp_reset(struct zone *zone) + free_percpu(zone->pageset); + zone->pageset = &boot_pageset; + } +- local_irq_restore(flags); ++ local_unlock_irqrestore(&pa_lock.l, flags); + } + + #ifdef CONFIG_MEMORY_HOTREMOVE +diff --git a/mm/shmem.c b/mm/shmem.c +index f7caf1dec..0ef372e7d 100644 +--- a/mm/shmem.c ++++ b/mm/shmem.c +@@ -307,10 +307,10 @@ static int shmem_reserve_inode(struct super_block *sb, ino_t *inop) + ino_t ino; + + if (!(sb->s_flags & SB_KERNMOUNT)) { +- spin_lock(&sbinfo->stat_lock); ++ raw_spin_lock(&sbinfo->stat_lock); + if (sbinfo->max_inodes) { + if (!sbinfo->free_inodes) { +- spin_unlock(&sbinfo->stat_lock); ++ raw_spin_unlock(&sbinfo->stat_lock); + return -ENOSPC; + } + sbinfo->free_inodes--; +@@ -333,7 +333,7 @@ static int shmem_reserve_inode(struct super_block *sb, ino_t *inop) + } + *inop = ino; + } +- spin_unlock(&sbinfo->stat_lock); ++ raw_spin_unlock(&sbinfo->stat_lock); + } else if (inop) { + /* + * __shmem_file_setup, one of our callers, is lock-free: it +@@ -348,13 +348,14 @@ static int shmem_reserve_inode(struct super_block *sb, ino_t *inop) + * to worry about things like glibc compatibility. + */ + ino_t *next_ino; ++ + next_ino = per_cpu_ptr(sbinfo->ino_batch, get_cpu()); + ino = *next_ino; + if (unlikely(ino % SHMEM_INO_BATCH == 0)) { +- spin_lock(&sbinfo->stat_lock); ++ raw_spin_lock(&sbinfo->stat_lock); + ino = sbinfo->next_ino; + sbinfo->next_ino += SHMEM_INO_BATCH; +- spin_unlock(&sbinfo->stat_lock); ++ raw_spin_unlock(&sbinfo->stat_lock); + if (unlikely(is_zero_ino(ino))) + ino++; + } +@@ -370,9 +371,9 @@ static void shmem_free_inode(struct super_block *sb) + { + struct shmem_sb_info *sbinfo = SHMEM_SB(sb); + if (sbinfo->max_inodes) { +- spin_lock(&sbinfo->stat_lock); ++ raw_spin_lock(&sbinfo->stat_lock); + sbinfo->free_inodes++; +- spin_unlock(&sbinfo->stat_lock); ++ raw_spin_unlock(&sbinfo->stat_lock); + } + } + +@@ -1471,10 +1472,10 @@ static struct mempolicy *shmem_get_sbmpol(struct shmem_sb_info *sbinfo) + { + struct mempolicy *mpol = NULL; + if (sbinfo->mpol) { +- spin_lock(&sbinfo->stat_lock); /* prevent replace/use races */ ++ raw_spin_lock(&sbinfo->stat_lock); /* prevent replace/use races */ + mpol = sbinfo->mpol; + mpol_get(mpol); +- spin_unlock(&sbinfo->stat_lock); ++ raw_spin_unlock(&sbinfo->stat_lock); + } + return mpol; + } +@@ -3575,9 +3576,10 @@ static int shmem_reconfigure(struct fs_context *fc) + struct shmem_options *ctx = fc->fs_private; + struct shmem_sb_info *sbinfo = SHMEM_SB(fc->root->d_sb); + unsigned long inodes; ++ struct mempolicy *mpol = NULL; + const char *err; + +- spin_lock(&sbinfo->stat_lock); ++ raw_spin_lock(&sbinfo->stat_lock); + inodes = sbinfo->max_inodes - sbinfo->free_inodes; + + if ((ctx->seen & SHMEM_SEEN_BLOCKS) && ctx->blocks) { +@@ -3623,14 +3625,15 @@ static int shmem_reconfigure(struct fs_context *fc) + * Preserve previous mempolicy unless mpol remount option was specified. + */ + if (ctx->mpol) { +- mpol_put(sbinfo->mpol); ++ mpol = sbinfo->mpol; + sbinfo->mpol = ctx->mpol; /* transfers initial ref */ + ctx->mpol = NULL; + } +- spin_unlock(&sbinfo->stat_lock); ++ raw_spin_unlock(&sbinfo->stat_lock); ++ mpol_put(mpol); + return 0; + out: +- spin_unlock(&sbinfo->stat_lock); ++ raw_spin_unlock(&sbinfo->stat_lock); + return invalfc(fc, "%s", err); + } + +@@ -3747,7 +3750,7 @@ static int shmem_fill_super(struct super_block *sb, struct fs_context *fc) + sbinfo->mpol = ctx->mpol; + ctx->mpol = NULL; + +- spin_lock_init(&sbinfo->stat_lock); ++ raw_spin_lock_init(&sbinfo->stat_lock); + if (percpu_counter_init(&sbinfo->used_blocks, 0, GFP_KERNEL)) + goto failed; + spin_lock_init(&sbinfo->shrinklist_lock); +diff --git a/mm/slab.c b/mm/slab.c +index ae84578f3..a65a5f169 100644 +--- a/mm/slab.c ++++ b/mm/slab.c +@@ -234,7 +234,7 @@ static void kmem_cache_node_init(struct kmem_cache_node *parent) + parent->shared = NULL; + parent->alien = NULL; + parent->colour_next = 0; +- spin_lock_init(&parent->list_lock); ++ raw_spin_lock_init(&parent->list_lock); + parent->free_objects = 0; + parent->free_touched = 0; + } +@@ -559,9 +559,9 @@ static noinline void cache_free_pfmemalloc(struct kmem_cache *cachep, + page_node = page_to_nid(page); + n = get_node(cachep, page_node); + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + free_block(cachep, &objp, 1, page_node, &list); +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + slabs_destroy(cachep, &list); + } +@@ -699,7 +699,7 @@ static void __drain_alien_cache(struct kmem_cache *cachep, + struct kmem_cache_node *n = get_node(cachep, node); + + if (ac->avail) { +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + /* + * Stuff objects into the remote nodes shared array first. + * That way we could avoid the overhead of putting the objects +@@ -710,7 +710,7 @@ static void __drain_alien_cache(struct kmem_cache *cachep, + + free_block(cachep, ac->entry, ac->avail, node, list); + ac->avail = 0; +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + } + } + +@@ -783,9 +783,9 @@ static int __cache_free_alien(struct kmem_cache *cachep, void *objp, + slabs_destroy(cachep, &list); + } else { + n = get_node(cachep, page_node); +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + free_block(cachep, &objp, 1, page_node, &list); +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + slabs_destroy(cachep, &list); + } + return 1; +@@ -826,10 +826,10 @@ static int init_cache_node(struct kmem_cache *cachep, int node, gfp_t gfp) + */ + n = get_node(cachep, node); + if (n) { +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + n->free_limit = (1 + nr_cpus_node(node)) * cachep->batchcount + + cachep->num; +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + + return 0; + } +@@ -908,7 +908,7 @@ static int setup_kmem_cache_node(struct kmem_cache *cachep, + goto fail; + + n = get_node(cachep, node); +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + if (n->shared && force_change) { + free_block(cachep, n->shared->entry, + n->shared->avail, node, &list); +@@ -926,7 +926,7 @@ static int setup_kmem_cache_node(struct kmem_cache *cachep, + new_alien = NULL; + } + +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + slabs_destroy(cachep, &list); + + /* +@@ -965,7 +965,7 @@ static void cpuup_canceled(long cpu) + if (!n) + continue; + +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + + /* Free limit for this kmem_cache_node */ + n->free_limit -= cachep->batchcount; +@@ -976,7 +976,7 @@ static void cpuup_canceled(long cpu) + nc->avail = 0; + + if (!cpumask_empty(mask)) { +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + goto free_slab; + } + +@@ -990,7 +990,7 @@ static void cpuup_canceled(long cpu) + alien = n->alien; + n->alien = NULL; + +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + + kfree(shared); + if (alien) { +@@ -1174,7 +1174,7 @@ static void __init init_list(struct kmem_cache *cachep, struct kmem_cache_node * + /* + * Do not assume that spinlocks can be initialized via memcpy: + */ +- spin_lock_init(&ptr->list_lock); ++ raw_spin_lock_init(&ptr->list_lock); + + MAKE_ALL_LISTS(cachep, ptr, nodeid); + cachep->node[nodeid] = ptr; +@@ -1345,11 +1345,11 @@ slab_out_of_memory(struct kmem_cache *cachep, gfp_t gfpflags, int nodeid) + for_each_kmem_cache_node(cachep, node, n) { + unsigned long total_slabs, free_slabs, free_objs; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + total_slabs = n->total_slabs; + free_slabs = n->free_slabs; + free_objs = n->free_objects; +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + + pr_warn(" node %d: slabs: %ld/%ld, objs: %ld/%ld\n", + node, total_slabs - free_slabs, total_slabs, +@@ -2106,7 +2106,7 @@ static void check_spinlock_acquired(struct kmem_cache *cachep) + { + #ifdef CONFIG_SMP + check_irq_off(); +- assert_spin_locked(&get_node(cachep, numa_mem_id())->list_lock); ++ assert_raw_spin_locked(&get_node(cachep, numa_mem_id())->list_lock); + #endif + } + +@@ -2114,7 +2114,7 @@ static void check_spinlock_acquired_node(struct kmem_cache *cachep, int node) + { + #ifdef CONFIG_SMP + check_irq_off(); +- assert_spin_locked(&get_node(cachep, node)->list_lock); ++ assert_raw_spin_locked(&get_node(cachep, node)->list_lock); + #endif + } + +@@ -2154,9 +2154,9 @@ static void do_drain(void *arg) + check_irq_off(); + ac = cpu_cache_get(cachep); + n = get_node(cachep, node); +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + free_block(cachep, ac->entry, ac->avail, node, &list); +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + ac->avail = 0; + slabs_destroy(cachep, &list); + } +@@ -2174,9 +2174,9 @@ static void drain_cpu_caches(struct kmem_cache *cachep) + drain_alien_cache(cachep, n->alien); + + for_each_kmem_cache_node(cachep, node, n) { +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + drain_array_locked(cachep, n->shared, node, true, &list); +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + + slabs_destroy(cachep, &list); + } +@@ -2198,10 +2198,10 @@ static int drain_freelist(struct kmem_cache *cache, + nr_freed = 0; + while (nr_freed < tofree && !list_empty(&n->slabs_free)) { + +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + p = n->slabs_free.prev; + if (p == &n->slabs_free) { +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + goto out; + } + +@@ -2214,7 +2214,7 @@ static int drain_freelist(struct kmem_cache *cache, + * to the cache. + */ + n->free_objects -= cache->num; +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + slab_destroy(cache, page); + nr_freed++; + } +@@ -2650,7 +2650,7 @@ static void cache_grow_end(struct kmem_cache *cachep, struct page *page) + INIT_LIST_HEAD(&page->slab_list); + n = get_node(cachep, page_to_nid(page)); + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + n->total_slabs++; + if (!page->active) { + list_add_tail(&page->slab_list, &n->slabs_free); +@@ -2660,7 +2660,7 @@ static void cache_grow_end(struct kmem_cache *cachep, struct page *page) + + STATS_INC_GROWN(cachep); + n->free_objects += cachep->num - page->active; +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + fixup_objfreelist_debug(cachep, &list); + } +@@ -2826,7 +2826,7 @@ static struct page *get_first_slab(struct kmem_cache_node *n, bool pfmemalloc) + { + struct page *page; + +- assert_spin_locked(&n->list_lock); ++ assert_raw_spin_locked(&n->list_lock); + page = list_first_entry_or_null(&n->slabs_partial, struct page, + slab_list); + if (!page) { +@@ -2853,10 +2853,10 @@ static noinline void *cache_alloc_pfmemalloc(struct kmem_cache *cachep, + if (!gfp_pfmemalloc_allowed(flags)) + return NULL; + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + page = get_first_slab(n, true); + if (!page) { +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + return NULL; + } + +@@ -2865,7 +2865,7 @@ static noinline void *cache_alloc_pfmemalloc(struct kmem_cache *cachep, + + fixup_slab_list(cachep, n, page, &list); + +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + fixup_objfreelist_debug(cachep, &list); + + return obj; +@@ -2924,7 +2924,7 @@ static void *cache_alloc_refill(struct kmem_cache *cachep, gfp_t flags) + if (!n->free_objects && (!shared || !shared->avail)) + goto direct_grow; + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + shared = READ_ONCE(n->shared); + + /* See if we can refill from the shared array */ +@@ -2948,7 +2948,7 @@ static void *cache_alloc_refill(struct kmem_cache *cachep, gfp_t flags) + must_grow: + n->free_objects -= ac->avail; + alloc_done: +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + fixup_objfreelist_debug(cachep, &list); + + direct_grow: +@@ -3173,7 +3173,7 @@ static void *____cache_alloc_node(struct kmem_cache *cachep, gfp_t flags, + BUG_ON(!n); + + check_irq_off(); +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + page = get_first_slab(n, false); + if (!page) + goto must_grow; +@@ -3191,12 +3191,12 @@ static void *____cache_alloc_node(struct kmem_cache *cachep, gfp_t flags, + + fixup_slab_list(cachep, n, page, &list); + +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + fixup_objfreelist_debug(cachep, &list); + return obj; + + must_grow: +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + page = cache_grow_begin(cachep, gfp_exact_node(flags), nodeid); + if (page) { + /* This slab isn't counted yet so don't update free_objects */ +@@ -3384,7 +3384,7 @@ static void cache_flusharray(struct kmem_cache *cachep, struct array_cache *ac) + + check_irq_off(); + n = get_node(cachep, node); +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + if (n->shared) { + struct array_cache *shared_array = n->shared; + int max = shared_array->limit - shared_array->avail; +@@ -3413,7 +3413,7 @@ static void cache_flusharray(struct kmem_cache *cachep, struct array_cache *ac) + STATS_SET_FREEABLE(cachep, i); + } + #endif +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + ac->avail -= batchcount; + memmove(ac->entry, &(ac->entry[batchcount]), sizeof(void *)*ac->avail); + slabs_destroy(cachep, &list); +@@ -3849,9 +3849,9 @@ static int do_tune_cpucache(struct kmem_cache *cachep, int limit, + + node = cpu_to_mem(cpu); + n = get_node(cachep, node); +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + free_block(cachep, ac->entry, ac->avail, node, &list); +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + slabs_destroy(cachep, &list); + } + free_percpu(prev); +@@ -3946,9 +3946,9 @@ static void drain_array(struct kmem_cache *cachep, struct kmem_cache_node *n, + return; + } + +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + drain_array_locked(cachep, ac, node, false, &list); +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + + slabs_destroy(cachep, &list); + } +@@ -4032,7 +4032,7 @@ void get_slabinfo(struct kmem_cache *cachep, struct slabinfo *sinfo) + + for_each_kmem_cache_node(cachep, node, n) { + check_irq_on(); +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + + total_slabs += n->total_slabs; + free_slabs += n->free_slabs; +@@ -4041,7 +4041,7 @@ void get_slabinfo(struct kmem_cache *cachep, struct slabinfo *sinfo) + if (n->shared) + shared_avail += n->shared->avail; + +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + } + num_objs = total_slabs * cachep->num; + active_slabs = total_slabs - free_slabs; +diff --git a/mm/slab.h b/mm/slab.h +index 8414c3451..d937f8673 100644 +--- a/mm/slab.h ++++ b/mm/slab.h +@@ -523,7 +523,7 @@ static inline void slab_post_alloc_hook(struct kmem_cache *s, + * The slab lists for all objects. + */ + struct kmem_cache_node { +- spinlock_t list_lock; ++ raw_spinlock_t list_lock; + + #ifdef CONFIG_SLAB + struct list_head slabs_partial; /* partial list first, better asm code */ +diff --git a/mm/slub.c b/mm/slub.c +index ec1c3a376..559fcc2a3 100644 +--- a/mm/slub.c ++++ b/mm/slub.c +@@ -458,7 +458,7 @@ static inline bool cmpxchg_double_slab(struct kmem_cache *s, struct page *page, + + #ifdef CONFIG_SLUB_DEBUG + static unsigned long object_map[BITS_TO_LONGS(MAX_OBJS_PER_PAGE)]; +-static DEFINE_SPINLOCK(object_map_lock); ++static DEFINE_RAW_SPINLOCK(object_map_lock); + + /* + * Determine a map of object in use on a page. +@@ -474,7 +474,7 @@ static unsigned long *get_map(struct kmem_cache *s, struct page *page) + + VM_BUG_ON(!irqs_disabled()); + +- spin_lock(&object_map_lock); ++ raw_spin_lock(&object_map_lock); + + bitmap_zero(object_map, page->objects); + +@@ -487,7 +487,7 @@ static unsigned long *get_map(struct kmem_cache *s, struct page *page) + static void put_map(unsigned long *map) __releases(&object_map_lock) + { + VM_BUG_ON(map != object_map); +- spin_unlock(&object_map_lock); ++ raw_spin_unlock(&object_map_lock); + } + + static inline unsigned int size_from_object(struct kmem_cache *s) +@@ -1238,7 +1238,7 @@ static noinline int free_debug_processing( + unsigned long flags; + int ret = 0; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + slab_lock(page); + + if (s->flags & SLAB_CONSISTENCY_CHECKS) { +@@ -1273,7 +1273,7 @@ static noinline int free_debug_processing( + bulk_cnt, cnt); + + slab_unlock(page); +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + if (!ret) + slab_fix(s, "Object at 0x%p not freed", object); + return ret; +@@ -1521,6 +1521,12 @@ static bool freelist_corrupted(struct kmem_cache *s, struct page *page, + } + #endif /* CONFIG_SLUB_DEBUG */ + ++struct slub_free_list { ++ raw_spinlock_t lock; ++ struct list_head list; ++}; ++static DEFINE_PER_CPU(struct slub_free_list, slub_free_list); ++ + /* + * Hooks for other subsystems that check memory allocations. In a typical + * production configuration these hooks all should produce no code at all. +@@ -1776,10 +1782,18 @@ static struct page *allocate_slab(struct kmem_cache *s, gfp_t flags, int node) + void *start, *p, *next; + int idx; + bool shuffle; ++ bool enableirqs = false; + + flags &= gfp_allowed_mask; + + if (gfpflags_allow_blocking(flags)) ++ enableirqs = true; ++ ++#ifdef CONFIG_PREEMPT_RT ++ if (system_state > SYSTEM_BOOTING && system_state < SYSTEM_SUSPEND) ++ enableirqs = true; ++#endif ++ if (enableirqs) + local_irq_enable(); + + flags |= s->allocflags; +@@ -1838,7 +1852,7 @@ static struct page *allocate_slab(struct kmem_cache *s, gfp_t flags, int node) + page->frozen = 1; + + out: +- if (gfpflags_allow_blocking(flags)) ++ if (enableirqs) + local_irq_disable(); + if (!page) + return NULL; +@@ -1881,6 +1895,16 @@ static void __free_slab(struct kmem_cache *s, struct page *page) + __free_pages(page, order); + } + ++static void free_delayed(struct list_head *h) ++{ ++ while (!list_empty(h)) { ++ struct page *page = list_first_entry(h, struct page, lru); ++ ++ list_del(&page->lru); ++ __free_slab(page->slab_cache, page); ++ } ++} ++ + static void rcu_free_slab(struct rcu_head *h) + { + struct page *page = container_of(h, struct page, rcu_head); +@@ -1892,6 +1916,12 @@ static void free_slab(struct kmem_cache *s, struct page *page) + { + if (unlikely(s->flags & SLAB_TYPESAFE_BY_RCU)) { + call_rcu(&page->rcu_head, rcu_free_slab); ++ } else if (irqs_disabled()) { ++ struct slub_free_list *f = this_cpu_ptr(&slub_free_list); ++ ++ raw_spin_lock(&f->lock); ++ list_add(&page->lru, &f->list); ++ raw_spin_unlock(&f->lock); + } else + __free_slab(s, page); + } +@@ -1999,7 +2029,7 @@ static void *get_partial_node(struct kmem_cache *s, struct kmem_cache_node *n, + if (!n || !n->nr_partial) + return NULL; + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + list_for_each_entry_safe(page, page2, &n->partial, slab_list) { + void *t; + +@@ -2024,7 +2054,7 @@ static void *get_partial_node(struct kmem_cache *s, struct kmem_cache_node *n, + break; + + } +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + return object; + } + +@@ -2267,7 +2297,7 @@ static void deactivate_slab(struct kmem_cache *s, struct page *page, + * that acquire_slab() will see a slab page that + * is frozen + */ +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + } + } else { + m = M_FULL; +@@ -2279,7 +2309,7 @@ static void deactivate_slab(struct kmem_cache *s, struct page *page, + * slabs from diagnostic functions will not see + * any frozen slabs. + */ +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + } + #endif + } +@@ -2304,7 +2334,7 @@ static void deactivate_slab(struct kmem_cache *s, struct page *page, + goto redo; + + if (lock) +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + if (m == M_PARTIAL) + stat(s, tail); +@@ -2344,10 +2374,10 @@ static void unfreeze_partials(struct kmem_cache *s, + n2 = get_node(s, page_to_nid(page)); + if (n != n2) { + if (n) +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + n = n2; +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + } + + do { +@@ -2376,7 +2406,7 @@ static void unfreeze_partials(struct kmem_cache *s, + } + + if (n) +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + while (discard_page) { + page = discard_page; +@@ -2413,14 +2443,21 @@ static void put_cpu_partial(struct kmem_cache *s, struct page *page, int drain) + pobjects = oldpage->pobjects; + pages = oldpage->pages; + if (drain && pobjects > slub_cpu_partial(s)) { ++ struct slub_free_list *f; + unsigned long flags; ++ LIST_HEAD(tofree); + /* + * partial array is full. Move the existing + * set to the per node partial list. + */ + local_irq_save(flags); + unfreeze_partials(s, this_cpu_ptr(s->cpu_slab)); ++ f = this_cpu_ptr(&slub_free_list); ++ raw_spin_lock(&f->lock); ++ list_splice_init(&f->list, &tofree); ++ raw_spin_unlock(&f->lock); + local_irq_restore(flags); ++ free_delayed(&tofree); + oldpage = NULL; + pobjects = 0; + pages = 0; +@@ -2486,7 +2523,19 @@ static bool has_cpu_slab(int cpu, void *info) + + static void flush_all(struct kmem_cache *s) + { ++ LIST_HEAD(tofree); ++ int cpu; ++ + on_each_cpu_cond(has_cpu_slab, flush_cpu_slab, s, 1); ++ for_each_online_cpu(cpu) { ++ struct slub_free_list *f; ++ ++ f = &per_cpu(slub_free_list, cpu); ++ raw_spin_lock_irq(&f->lock); ++ list_splice_init(&f->list, &tofree); ++ raw_spin_unlock_irq(&f->lock); ++ free_delayed(&tofree); ++ } + } + + /* +@@ -2541,10 +2590,10 @@ static unsigned long count_partial(struct kmem_cache_node *n, + unsigned long x = 0; + struct page *page; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + list_for_each_entry(page, &n->partial, slab_list) + x += get_count(page); +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + return x; + } + #endif /* CONFIG_SLUB_DEBUG || CONFIG_SYSFS */ +@@ -2683,8 +2732,10 @@ static inline void *get_freelist(struct kmem_cache *s, struct page *page) + * already disabled (which is the case for bulk allocation). + */ + static void *___slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, +- unsigned long addr, struct kmem_cache_cpu *c) ++ unsigned long addr, struct kmem_cache_cpu *c, ++ struct list_head *to_free) + { ++ struct slub_free_list *f; + void *freelist; + struct page *page; + +@@ -2753,6 +2804,13 @@ static void *___slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + VM_BUG_ON(!c->page->frozen); + c->freelist = get_freepointer(s, freelist); + c->tid = next_tid(c->tid); ++ ++out: ++ f = this_cpu_ptr(&slub_free_list); ++ raw_spin_lock(&f->lock); ++ list_splice_init(&f->list, to_free); ++ raw_spin_unlock(&f->lock); ++ + return freelist; + + new_slab: +@@ -2768,7 +2826,7 @@ static void *___slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + + if (unlikely(!freelist)) { + slab_out_of_memory(s, gfpflags, node); +- return NULL; ++ goto out; + } + + page = c->page; +@@ -2781,7 +2839,7 @@ static void *___slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + goto new_slab; /* Slab failed checks. Next slab needed */ + + deactivate_slab(s, page, get_freepointer(s, freelist), c); +- return freelist; ++ goto out; + } + + /* +@@ -2793,6 +2851,7 @@ static void *__slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + { + void *p; + unsigned long flags; ++ LIST_HEAD(tofree); + + local_irq_save(flags); + #ifdef CONFIG_PREEMPTION +@@ -2804,8 +2863,9 @@ static void *__slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + c = this_cpu_ptr(s->cpu_slab); + #endif + +- p = ___slab_alloc(s, gfpflags, node, addr, c); ++ p = ___slab_alloc(s, gfpflags, node, addr, c, &tofree); + local_irq_restore(flags); ++ free_delayed(&tofree); + return p; + } + +@@ -2839,6 +2899,10 @@ static __always_inline void *slab_alloc_node(struct kmem_cache *s, + unsigned long tid; + struct obj_cgroup *objcg = NULL; + ++ if (IS_ENABLED(CONFIG_PREEMPT_RT) && IS_ENABLED(CONFIG_DEBUG_ATOMIC_SLEEP)) ++ WARN_ON_ONCE(!preemptible() && ++ (system_state > SYSTEM_BOOTING && system_state < SYSTEM_SUSPEND)); ++ + s = slab_pre_alloc_hook(s, &objcg, 1, gfpflags); + if (!s) + return NULL; +@@ -3013,7 +3077,7 @@ static void __slab_free(struct kmem_cache *s, struct page *page, + + do { + if (unlikely(n)) { +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + n = NULL; + } + prior = page->freelist; +@@ -3045,7 +3109,7 @@ static void __slab_free(struct kmem_cache *s, struct page *page, + * Otherwise the list_lock will synchronize with + * other processors updating the list of slabs. + */ +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + + } + } +@@ -3087,7 +3151,7 @@ static void __slab_free(struct kmem_cache *s, struct page *page, + add_partial(n, page, DEACTIVATE_TO_TAIL); + stat(s, FREE_ADD_PARTIAL); + } +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + return; + + slab_empty: +@@ -3102,7 +3166,7 @@ static void __slab_free(struct kmem_cache *s, struct page *page, + remove_full(s, n, page); + } + +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + stat(s, FREE_SLAB); + discard_slab(s, page); + } +@@ -3329,9 +3393,14 @@ int kmem_cache_alloc_bulk(struct kmem_cache *s, gfp_t flags, size_t size, + void **p) + { + struct kmem_cache_cpu *c; ++ LIST_HEAD(to_free); + int i; + struct obj_cgroup *objcg = NULL; + ++ if (IS_ENABLED(CONFIG_PREEMPT_RT) && IS_ENABLED(CONFIG_DEBUG_ATOMIC_SLEEP)) ++ WARN_ON_ONCE(!preemptible() && ++ (system_state > SYSTEM_BOOTING && system_state < SYSTEM_SUSPEND)); ++ + /* memcg and kmem_cache debug support */ + s = slab_pre_alloc_hook(s, &objcg, size, flags); + if (unlikely(!s)) +@@ -3368,7 +3437,7 @@ int kmem_cache_alloc_bulk(struct kmem_cache *s, gfp_t flags, size_t size, + * of re-populating per CPU c->freelist + */ + p[i] = ___slab_alloc(s, flags, NUMA_NO_NODE, +- _RET_IP_, c); ++ _RET_IP_, c, &to_free); + if (unlikely(!p[i])) + goto error; + +@@ -3383,6 +3452,7 @@ int kmem_cache_alloc_bulk(struct kmem_cache *s, gfp_t flags, size_t size, + } + c->tid = next_tid(c->tid); + local_irq_enable(); ++ free_delayed(&to_free); + + /* Clear memory outside IRQ disabled fastpath loop */ + if (unlikely(slab_want_init_on_alloc(flags, s))) { +@@ -3397,6 +3467,7 @@ int kmem_cache_alloc_bulk(struct kmem_cache *s, gfp_t flags, size_t size, + return i; + error: + local_irq_enable(); ++ free_delayed(&to_free); + slab_post_alloc_hook(s, objcg, flags, i, p); + __kmem_cache_free_bulk(s, i, p); + return 0; +@@ -3532,7 +3603,7 @@ static void + init_kmem_cache_node(struct kmem_cache_node *n) + { + n->nr_partial = 0; +- spin_lock_init(&n->list_lock); ++ raw_spin_lock_init(&n->list_lock); + INIT_LIST_HEAD(&n->partial); + #ifdef CONFIG_SLUB_DEBUG + atomic_long_set(&n->nr_slabs, 0); +@@ -3927,7 +3998,7 @@ static void free_partial(struct kmem_cache *s, struct kmem_cache_node *n) + struct page *page, *h; + + BUG_ON(irqs_disabled()); +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + list_for_each_entry_safe(page, h, &n->partial, slab_list) { + if (!page->inuse) { + remove_partial(n, page); +@@ -3937,7 +4008,7 @@ static void free_partial(struct kmem_cache *s, struct kmem_cache_node *n) + "Objects remaining in %s on __kmem_cache_shutdown()"); + } + } +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + + list_for_each_entry_safe(page, h, &discard, slab_list) + discard_slab(s, page); +@@ -4206,7 +4277,7 @@ int __kmem_cache_shrink(struct kmem_cache *s) + for (i = 0; i < SHRINK_PROMOTE_MAX; i++) + INIT_LIST_HEAD(promote + i); + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + + /* + * Build lists of slabs to discard or promote. +@@ -4237,7 +4308,7 @@ int __kmem_cache_shrink(struct kmem_cache *s) + for (i = SHRINK_PROMOTE_MAX - 1; i >= 0; i--) + list_splice(promote + i, &n->partial); + +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + + /* Release empty slabs */ + list_for_each_entry_safe(page, t, &discard, slab_list) +@@ -4413,6 +4484,12 @@ void __init kmem_cache_init(void) + static __initdata struct kmem_cache boot_kmem_cache, + boot_kmem_cache_node; + int node; ++ int cpu; ++ ++ for_each_possible_cpu(cpu) { ++ raw_spin_lock_init(&per_cpu(slub_free_list, cpu).lock); ++ INIT_LIST_HEAD(&per_cpu(slub_free_list, cpu).list); ++ } + + if (debug_guardpage_minorder()) + slub_max_order = 0; +@@ -4611,7 +4688,7 @@ static int validate_slab_node(struct kmem_cache *s, + struct page *page; + unsigned long flags; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + + list_for_each_entry(page, &n->partial, slab_list) { + validate_slab(s, page); +@@ -4633,7 +4710,7 @@ static int validate_slab_node(struct kmem_cache *s, + s->name, count, atomic_long_read(&n->nr_slabs)); + + out: +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + return count; + } + +@@ -4684,6 +4761,9 @@ static int alloc_loc_track(struct loc_track *t, unsigned long max, gfp_t flags) + struct location *l; + int order; + ++ if (IS_ENABLED(CONFIG_PREEMPT_RT) && flags == GFP_ATOMIC) ++ return 0; ++ + order = get_order(sizeof(struct location) * max); + + l = (void *)__get_free_pages(flags, order); +@@ -4812,12 +4892,12 @@ static int list_locations(struct kmem_cache *s, char *buf, + if (!atomic_long_read(&n->nr_slabs)) + continue; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + list_for_each_entry(page, &n->partial, slab_list) + process_slab(&t, s, page, alloc); + list_for_each_entry(page, &n->full, slab_list) + process_slab(&t, s, page, alloc); +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + } + + for (i = 0; i < t.count; i++) { +diff --git a/mm/vmalloc.c b/mm/vmalloc.c +index e27cd716c..1285e5cb0 100644 +--- a/mm/vmalloc.c ++++ b/mm/vmalloc.c +@@ -1889,7 +1889,7 @@ static void *new_vmap_block(unsigned int order, gfp_t gfp_mask) + struct vmap_block *vb; + struct vmap_area *va; + unsigned long vb_idx; +- int node, err; ++ int node, err, cpu; + void *vaddr; + + node = numa_node_id(); +@@ -1926,11 +1926,12 @@ static void *new_vmap_block(unsigned int order, gfp_t gfp_mask) + return ERR_PTR(err); + } + +- vbq = &get_cpu_var(vmap_block_queue); ++ cpu = get_cpu_light(); ++ vbq = this_cpu_ptr(&vmap_block_queue); + spin_lock(&vbq->lock); + list_add_tail_rcu(&vb->free_list, &vbq->free); + spin_unlock(&vbq->lock); +- put_cpu_var(vmap_block_queue); ++ put_cpu_light(); + + return vaddr; + } +@@ -1995,6 +1996,7 @@ static void *vb_alloc(unsigned long size, gfp_t gfp_mask) + struct vmap_block *vb; + void *vaddr = NULL; + unsigned int order; ++ int cpu; + + BUG_ON(offset_in_page(size)); + BUG_ON(size > PAGE_SIZE*VMAP_MAX_ALLOC); +@@ -2009,7 +2011,8 @@ static void *vb_alloc(unsigned long size, gfp_t gfp_mask) + order = get_order(size); + + rcu_read_lock(); +- vbq = &get_cpu_var(vmap_block_queue); ++ cpu = get_cpu_light(); ++ vbq = this_cpu_ptr(&vmap_block_queue); + list_for_each_entry_rcu(vb, &vbq->free, free_list) { + unsigned long pages_off; + +@@ -2032,7 +2035,7 @@ static void *vb_alloc(unsigned long size, gfp_t gfp_mask) + break; + } + +- put_cpu_var(vmap_block_queue); ++ put_cpu_light(); + rcu_read_unlock(); + + /* Allocate new block if nothing was found */ +diff --git a/mm/vmstat.c b/mm/vmstat.c +index 05433f663..afb32defb 100644 +--- a/mm/vmstat.c ++++ b/mm/vmstat.c +@@ -321,6 +321,7 @@ void __mod_zone_page_state(struct zone *zone, enum zone_stat_item item, + long x; + long t; + ++ preempt_disable_rt(); + x = delta + __this_cpu_read(*p); + + t = __this_cpu_read(pcp->stat_threshold); +@@ -330,6 +331,7 @@ void __mod_zone_page_state(struct zone *zone, enum zone_stat_item item, + x = 0; + } + __this_cpu_write(*p, x); ++ preempt_enable_rt(); + } + EXPORT_SYMBOL(__mod_zone_page_state); + +@@ -346,6 +348,7 @@ void __mod_node_page_state(struct pglist_data *pgdat, enum node_stat_item item, + delta >>= PAGE_SHIFT; + } + ++ preempt_disable_rt(); + x = delta + __this_cpu_read(*p); + + t = __this_cpu_read(pcp->stat_threshold); +@@ -355,6 +358,7 @@ void __mod_node_page_state(struct pglist_data *pgdat, enum node_stat_item item, + x = 0; + } + __this_cpu_write(*p, x); ++ preempt_enable_rt(); + } + EXPORT_SYMBOL(__mod_node_page_state); + +@@ -387,6 +391,7 @@ void __inc_zone_state(struct zone *zone, enum zone_stat_item item) + s8 __percpu *p = pcp->vm_stat_diff + item; + s8 v, t; + ++ preempt_disable_rt(); + v = __this_cpu_inc_return(*p); + t = __this_cpu_read(pcp->stat_threshold); + if (unlikely(v > t)) { +@@ -395,6 +400,7 @@ void __inc_zone_state(struct zone *zone, enum zone_stat_item item) + zone_page_state_add(v + overstep, zone, item); + __this_cpu_write(*p, -overstep); + } ++ preempt_enable_rt(); + } + + void __inc_node_state(struct pglist_data *pgdat, enum node_stat_item item) +@@ -405,6 +411,7 @@ void __inc_node_state(struct pglist_data *pgdat, enum node_stat_item item) + + VM_WARN_ON_ONCE(vmstat_item_in_bytes(item)); + ++ preempt_disable_rt(); + v = __this_cpu_inc_return(*p); + t = __this_cpu_read(pcp->stat_threshold); + if (unlikely(v > t)) { +@@ -413,6 +420,7 @@ void __inc_node_state(struct pglist_data *pgdat, enum node_stat_item item) + node_page_state_add(v + overstep, pgdat, item); + __this_cpu_write(*p, -overstep); + } ++ preempt_enable_rt(); + } + + void __inc_zone_page_state(struct page *page, enum zone_stat_item item) +@@ -433,6 +441,7 @@ void __dec_zone_state(struct zone *zone, enum zone_stat_item item) + s8 __percpu *p = pcp->vm_stat_diff + item; + s8 v, t; + ++ preempt_disable_rt(); + v = __this_cpu_dec_return(*p); + t = __this_cpu_read(pcp->stat_threshold); + if (unlikely(v < - t)) { +@@ -441,6 +450,7 @@ void __dec_zone_state(struct zone *zone, enum zone_stat_item item) + zone_page_state_add(v - overstep, zone, item); + __this_cpu_write(*p, overstep); + } ++ preempt_enable_rt(); + } + + void __dec_node_state(struct pglist_data *pgdat, enum node_stat_item item) +@@ -451,6 +461,7 @@ void __dec_node_state(struct pglist_data *pgdat, enum node_stat_item item) + + VM_WARN_ON_ONCE(vmstat_item_in_bytes(item)); + ++ preempt_disable_rt(); + v = __this_cpu_dec_return(*p); + t = __this_cpu_read(pcp->stat_threshold); + if (unlikely(v < - t)) { +@@ -459,6 +470,7 @@ void __dec_node_state(struct pglist_data *pgdat, enum node_stat_item item) + node_page_state_add(v - overstep, pgdat, item); + __this_cpu_write(*p, overstep); + } ++ preempt_enable_rt(); + } + + void __dec_zone_page_state(struct page *page, enum zone_stat_item item) +diff --git a/mm/workingset.c b/mm/workingset.c +index 4a30e4a81..4c92584ca 100644 +--- a/mm/workingset.c ++++ b/mm/workingset.c +@@ -431,6 +431,8 @@ static struct list_lru shadow_nodes; + + void workingset_update_node(struct xa_node *node) + { ++ struct address_space *mapping; ++ + /* + * Track non-empty nodes that contain only shadow entries; + * unlink those that contain pages or are being freed. +@@ -439,7 +441,8 @@ void workingset_update_node(struct xa_node *node) + * already where they should be. The list_empty() test is safe + * as node->private_list is protected by the i_pages lock. + */ +- VM_WARN_ON_ONCE(!irqs_disabled()); /* For __inc_lruvec_page_state */ ++ mapping = container_of(node->array, struct address_space, i_pages); ++ lockdep_assert_held(&mapping->i_pages.xa_lock); + + if (node->count && node->count == node->nr_values) { + if (list_empty(&node->private_list)) { +diff --git a/mm/z3fold.c b/mm/z3fold.c +index f75c638c6..6fdf4774f 100644 +--- a/mm/z3fold.c ++++ b/mm/z3fold.c +@@ -623,14 +623,16 @@ static inline void add_to_unbuddied(struct z3fold_pool *pool, + { + if (zhdr->first_chunks == 0 || zhdr->last_chunks == 0 || + zhdr->middle_chunks == 0) { +- struct list_head *unbuddied = get_cpu_ptr(pool->unbuddied); +- ++ struct list_head *unbuddied; + int freechunks = num_free_chunks(zhdr); ++ ++ migrate_disable(); ++ unbuddied = this_cpu_ptr(pool->unbuddied); + spin_lock(&pool->lock); + list_add(&zhdr->buddy, &unbuddied[freechunks]); + spin_unlock(&pool->lock); + zhdr->cpu = smp_processor_id(); +- put_cpu_ptr(pool->unbuddied); ++ migrate_enable(); + } + } + +@@ -880,8 +882,9 @@ static inline struct z3fold_header *__z3fold_alloc(struct z3fold_pool *pool, + int chunks = size_to_chunks(size), i; + + lookup: ++ migrate_disable(); + /* First, try to find an unbuddied z3fold page. */ +- unbuddied = get_cpu_ptr(pool->unbuddied); ++ unbuddied = this_cpu_ptr(pool->unbuddied); + for_each_unbuddied_list(i, chunks) { + struct list_head *l = &unbuddied[i]; + +@@ -899,7 +902,7 @@ static inline struct z3fold_header *__z3fold_alloc(struct z3fold_pool *pool, + !z3fold_page_trylock(zhdr)) { + spin_unlock(&pool->lock); + zhdr = NULL; +- put_cpu_ptr(pool->unbuddied); ++ migrate_enable(); + if (can_sleep) + cond_resched(); + goto lookup; +@@ -913,7 +916,7 @@ static inline struct z3fold_header *__z3fold_alloc(struct z3fold_pool *pool, + test_bit(PAGE_CLAIMED, &page->private)) { + z3fold_page_unlock(zhdr); + zhdr = NULL; +- put_cpu_ptr(pool->unbuddied); ++ migrate_enable(); + if (can_sleep) + cond_resched(); + goto lookup; +@@ -928,7 +931,7 @@ static inline struct z3fold_header *__z3fold_alloc(struct z3fold_pool *pool, + kref_get(&zhdr->refcount); + break; + } +- put_cpu_ptr(pool->unbuddied); ++ migrate_enable(); + + if (!zhdr) { + int cpu; +diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c +index c18dc8e61..16ce2b05d 100644 +--- a/mm/zsmalloc.c ++++ b/mm/zsmalloc.c +@@ -57,6 +57,7 @@ + #include + #include + #include ++#include + + #define ZSPAGE_MAGIC 0x58 + +@@ -77,6 +78,20 @@ + + #define ZS_HANDLE_SIZE (sizeof(unsigned long)) + ++#ifdef CONFIG_PREEMPT_RT ++ ++struct zsmalloc_handle { ++ unsigned long addr; ++ spinlock_t lock; ++}; ++ ++#define ZS_HANDLE_ALLOC_SIZE (sizeof(struct zsmalloc_handle)) ++ ++#else ++ ++#define ZS_HANDLE_ALLOC_SIZE (sizeof(unsigned long)) ++#endif ++ + /* + * Object location (, ) is encoded as + * a single (unsigned long) handle value. +@@ -293,6 +308,7 @@ struct zspage { + }; + + struct mapping_area { ++ local_lock_t lock; + char *vm_buf; /* copy buffer for objects that span pages */ + char *vm_addr; /* address of kmap_atomic()'ed pages */ + enum zs_mapmode vm_mm; /* mapping mode */ +@@ -322,7 +338,7 @@ static void SetZsPageMovable(struct zs_pool *pool, struct zspage *zspage) {} + + static int create_cache(struct zs_pool *pool) + { +- pool->handle_cachep = kmem_cache_create("zs_handle", ZS_HANDLE_SIZE, ++ pool->handle_cachep = kmem_cache_create("zs_handle", ZS_HANDLE_ALLOC_SIZE, + 0, 0, NULL); + if (!pool->handle_cachep) + return 1; +@@ -346,10 +362,27 @@ static void destroy_cache(struct zs_pool *pool) + + static unsigned long cache_alloc_handle(struct zs_pool *pool, gfp_t gfp) + { +- return (unsigned long)kmem_cache_alloc(pool->handle_cachep, +- gfp & ~(__GFP_HIGHMEM|__GFP_MOVABLE)); ++ void *p; ++ ++ p = kmem_cache_alloc(pool->handle_cachep, ++ gfp & ~(__GFP_HIGHMEM|__GFP_MOVABLE)); ++#ifdef CONFIG_PREEMPT_RT ++ if (p) { ++ struct zsmalloc_handle *zh = p; ++ ++ spin_lock_init(&zh->lock); ++ } ++#endif ++ return (unsigned long)p; + } + ++#ifdef CONFIG_PREEMPT_RT ++static struct zsmalloc_handle *zs_get_pure_handle(unsigned long handle) ++{ ++ return (void *)(handle &~((1 << OBJ_TAG_BITS) - 1)); ++} ++#endif ++ + static void cache_free_handle(struct zs_pool *pool, unsigned long handle) + { + kmem_cache_free(pool->handle_cachep, (void *)handle); +@@ -368,12 +401,18 @@ static void cache_free_zspage(struct zs_pool *pool, struct zspage *zspage) + + static void record_obj(unsigned long handle, unsigned long obj) + { ++#ifdef CONFIG_PREEMPT_RT ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ WRITE_ONCE(zh->addr, obj); ++#else + /* + * lsb of @obj represents handle lock while other bits + * represent object value the handle is pointing so + * updating shouldn't do store tearing. + */ + WRITE_ONCE(*(unsigned long *)handle, obj); ++#endif + } + + /* zpool driver */ +@@ -455,7 +494,10 @@ MODULE_ALIAS("zpool-zsmalloc"); + #endif /* CONFIG_ZPOOL */ + + /* per-cpu VM mapping areas for zspage accesses that cross page boundaries */ +-static DEFINE_PER_CPU(struct mapping_area, zs_map_area); ++static DEFINE_PER_CPU(struct mapping_area, zs_map_area) = { ++ /* XXX remove this and use a spin_lock_t in pin_tag() */ ++ .lock = INIT_LOCAL_LOCK(lock), ++}; + + static bool is_zspage_isolated(struct zspage *zspage) + { +@@ -865,7 +907,13 @@ static unsigned long location_to_obj(struct page *page, unsigned int obj_idx) + + static unsigned long handle_to_obj(unsigned long handle) + { ++#ifdef CONFIG_PREEMPT_RT ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ return zh->addr; ++#else + return *(unsigned long *)handle; ++#endif + } + + static unsigned long obj_to_head(struct page *page, void *obj) +@@ -879,22 +927,46 @@ static unsigned long obj_to_head(struct page *page, void *obj) + + static inline int testpin_tag(unsigned long handle) + { ++#ifdef CONFIG_PREEMPT_RT ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ return spin_is_locked(&zh->lock); ++#else + return bit_spin_is_locked(HANDLE_PIN_BIT, (unsigned long *)handle); ++#endif + } + + static inline int trypin_tag(unsigned long handle) + { ++#ifdef CONFIG_PREEMPT_RT ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ return spin_trylock(&zh->lock); ++#else + return bit_spin_trylock(HANDLE_PIN_BIT, (unsigned long *)handle); ++#endif + } + + static void pin_tag(unsigned long handle) __acquires(bitlock) + { ++#ifdef CONFIG_PREEMPT_RT ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ return spin_lock(&zh->lock); ++#else + bit_spin_lock(HANDLE_PIN_BIT, (unsigned long *)handle); ++#endif + } + + static void unpin_tag(unsigned long handle) __releases(bitlock) + { ++#ifdef CONFIG_PREEMPT_RT ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ return spin_unlock(&zh->lock); ++#else + bit_spin_unlock(HANDLE_PIN_BIT, (unsigned long *)handle); ++#endif + } + + static void reset_page(struct page *page) +@@ -1278,7 +1350,8 @@ void *zs_map_object(struct zs_pool *pool, unsigned long handle, + class = pool->size_class[class_idx]; + off = (class->size * obj_idx) & ~PAGE_MASK; + +- area = &get_cpu_var(zs_map_area); ++ local_lock(&zs_map_area.lock); ++ area = this_cpu_ptr(&zs_map_area); + area->vm_mm = mm; + if (off + class->size <= PAGE_SIZE) { + /* this object is contained entirely within a page */ +@@ -1332,7 +1405,7 @@ void zs_unmap_object(struct zs_pool *pool, unsigned long handle) + + __zs_unmap_object(area, pages, off, class->size); + } +- put_cpu_var(zs_map_area); ++ local_unlock(&zs_map_area.lock); + + migrate_read_unlock(zspage); + unpin_tag(handle); +diff --git a/net/Kconfig b/net/Kconfig +index a22c3fb88..5a17bded7 100644 +--- a/net/Kconfig ++++ b/net/Kconfig +@@ -280,7 +280,7 @@ config CGROUP_NET_CLASSID + + config NET_RX_BUSY_POLL + bool +- default y ++ default y if !PREEMPT_RT + + config BQL + bool +diff --git a/net/core/dev.c b/net/core/dev.c +index 02bf39500..450202563 100644 +--- a/net/core/dev.c ++++ b/net/core/dev.c +@@ -221,14 +221,14 @@ static inline struct hlist_head *dev_index_hash(struct net *net, int ifindex) + static inline void rps_lock(struct softnet_data *sd) + { + #ifdef CONFIG_RPS +- spin_lock(&sd->input_pkt_queue.lock); ++ raw_spin_lock(&sd->input_pkt_queue.raw_lock); + #endif + } + + static inline void rps_unlock(struct softnet_data *sd) + { + #ifdef CONFIG_RPS +- spin_unlock(&sd->input_pkt_queue.lock); ++ raw_spin_unlock(&sd->input_pkt_queue.raw_lock); + #endif + } + +@@ -3051,6 +3051,7 @@ static void __netif_reschedule(struct Qdisc *q) + sd->output_queue_tailp = &q->next_sched; + raise_softirq_irqoff(NET_TX_SOFTIRQ); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + + void __netif_schedule(struct Qdisc *q) +@@ -3113,6 +3114,7 @@ void __dev_kfree_skb_irq(struct sk_buff *skb, enum skb_free_reason reason) + __this_cpu_write(softnet_data.completion_queue, skb); + raise_softirq_irqoff(NET_TX_SOFTIRQ); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(__dev_kfree_skb_irq); + +@@ -3791,7 +3793,11 @@ static inline int __dev_xmit_skb(struct sk_buff *skb, struct Qdisc *q, + * This permits qdisc->running owner to get the lock more + * often and dequeue packets faster. + */ ++#ifdef CONFIG_PREEMPT_RT ++ contended = true; ++#else + contended = qdisc_is_running(q); ++#endif + if (unlikely(contended)) + spin_lock(&q->busylock); + +@@ -4591,6 +4597,7 @@ static int enqueue_to_backlog(struct sk_buff *skb, int cpu, + rps_unlock(sd); + + local_irq_restore(flags); ++ preempt_check_resched_rt(); + + atomic_long_inc(&skb->dev->rx_dropped); + kfree_skb(skb); +@@ -4810,7 +4817,7 @@ static int netif_rx_internal(struct sk_buff *skb) + struct rps_dev_flow voidflow, *rflow = &voidflow; + int cpu; + +- preempt_disable(); ++ migrate_disable(); + rcu_read_lock(); + + cpu = get_rps_cpu(skb->dev, skb, &rflow); +@@ -4820,14 +4827,14 @@ static int netif_rx_internal(struct sk_buff *skb) + ret = enqueue_to_backlog(skb, cpu, &rflow->last_qtail); + + rcu_read_unlock(); +- preempt_enable(); ++ migrate_enable(); + } else + #endif + { + unsigned int qtail; + +- ret = enqueue_to_backlog(skb, get_cpu(), &qtail); +- put_cpu(); ++ ret = enqueue_to_backlog(skb, get_cpu_light(), &qtail); ++ put_cpu_light(); + } + return ret; + } +@@ -4866,11 +4873,9 @@ int netif_rx_ni(struct sk_buff *skb) + + trace_netif_rx_ni_entry(skb); + +- preempt_disable(); ++ local_bh_disable(); + err = netif_rx_internal(skb); +- if (local_softirq_pending()) +- do_softirq(); +- preempt_enable(); ++ local_bh_enable(); + trace_netif_rx_ni_exit(err); + + return err; +@@ -6346,12 +6351,14 @@ static void net_rps_action_and_irq_enable(struct softnet_data *sd) + sd->rps_ipi_list = NULL; + + local_irq_enable(); ++ preempt_check_resched_rt(); + + /* Send pending IPI's to kick RPS processing on remote cpus. */ + net_rps_send_ipi(remsd); + } else + #endif + local_irq_enable(); ++ preempt_check_resched_rt(); + } + + static bool sd_has_rps_ipi_waiting(struct softnet_data *sd) +@@ -6429,6 +6436,7 @@ void __napi_schedule(struct napi_struct *n) + local_irq_save(flags); + ____napi_schedule(this_cpu_ptr(&softnet_data), n); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(__napi_schedule); + +@@ -10976,6 +10984,7 @@ static int dev_cpu_dead(unsigned int oldcpu) + + raise_softirq_irqoff(NET_TX_SOFTIRQ); + local_irq_enable(); ++ preempt_check_resched_rt(); + + #ifdef CONFIG_RPS + remsd = oldsd->rps_ipi_list; +@@ -10989,7 +10998,7 @@ static int dev_cpu_dead(unsigned int oldcpu) + netif_rx_ni(skb); + input_queue_head_incr(oldsd); + } +- while ((skb = skb_dequeue(&oldsd->input_pkt_queue))) { ++ while ((skb = __skb_dequeue(&oldsd->input_pkt_queue))) { + netif_rx_ni(skb); + input_queue_head_incr(oldsd); + } +@@ -11305,7 +11314,7 @@ static int __init net_dev_init(void) + + INIT_WORK(flush, flush_backlog); + +- skb_queue_head_init(&sd->input_pkt_queue); ++ skb_queue_head_init_raw(&sd->input_pkt_queue); + skb_queue_head_init(&sd->process_queue); + #ifdef CONFIG_XFRM_OFFLOAD + skb_queue_head_init(&sd->xfrm_backlog); +diff --git a/net/core/gen_estimator.c b/net/core/gen_estimator.c +index 8e582e29a..e51f4854d 100644 +--- a/net/core/gen_estimator.c ++++ b/net/core/gen_estimator.c +@@ -42,7 +42,7 @@ + struct net_rate_estimator { + struct gnet_stats_basic_packed *bstats; + spinlock_t *stats_lock; +- seqcount_t *running; ++ net_seqlock_t *running; + struct gnet_stats_basic_cpu __percpu *cpu_bstats; + u8 ewma_log; + u8 intvl_log; /* period : (250ms << intvl_log) */ +@@ -125,7 +125,7 @@ int gen_new_estimator(struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu_bstats, + struct net_rate_estimator __rcu **rate_est, + spinlock_t *lock, +- seqcount_t *running, ++ net_seqlock_t *running, + struct nlattr *opt) + { + struct gnet_estimator *parm = nla_data(opt); +@@ -226,7 +226,7 @@ int gen_replace_estimator(struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu_bstats, + struct net_rate_estimator __rcu **rate_est, + spinlock_t *lock, +- seqcount_t *running, struct nlattr *opt) ++ net_seqlock_t *running, struct nlattr *opt) + { + return gen_new_estimator(bstats, cpu_bstats, rate_est, + lock, running, opt); +diff --git a/net/core/gen_stats.c b/net/core/gen_stats.c +index e491b083b..ef432cea2 100644 +--- a/net/core/gen_stats.c ++++ b/net/core/gen_stats.c +@@ -137,7 +137,7 @@ __gnet_stats_copy_basic_cpu(struct gnet_stats_basic_packed *bstats, + } + + void +-__gnet_stats_copy_basic(const seqcount_t *running, ++__gnet_stats_copy_basic(net_seqlock_t *running, + struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b) +@@ -150,15 +150,15 @@ __gnet_stats_copy_basic(const seqcount_t *running, + } + do { + if (running) +- seq = read_seqcount_begin(running); ++ seq = net_seq_begin(running); + bstats->bytes = b->bytes; + bstats->packets = b->packets; +- } while (running && read_seqcount_retry(running, seq)); ++ } while (running && net_seq_retry(running, seq)); + } + EXPORT_SYMBOL(__gnet_stats_copy_basic); + + static int +-___gnet_stats_copy_basic(const seqcount_t *running, ++___gnet_stats_copy_basic(net_seqlock_t *running, + struct gnet_dump *d, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b, +@@ -204,7 +204,7 @@ ___gnet_stats_copy_basic(const seqcount_t *running, + * if the room in the socket buffer was not sufficient. + */ + int +-gnet_stats_copy_basic(const seqcount_t *running, ++gnet_stats_copy_basic(net_seqlock_t *running, + struct gnet_dump *d, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b) +@@ -228,7 +228,7 @@ EXPORT_SYMBOL(gnet_stats_copy_basic); + * if the room in the socket buffer was not sufficient. + */ + int +-gnet_stats_copy_basic_hw(const seqcount_t *running, ++gnet_stats_copy_basic_hw(net_seqlock_t *running, + struct gnet_dump *d, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b) +diff --git a/net/core/sock.c b/net/core/sock.c +index d8d42ff15..d23b79afa 100644 +--- a/net/core/sock.c ++++ b/net/core/sock.c +@@ -3068,12 +3068,11 @@ void lock_sock_nested(struct sock *sk, int subclass) + if (sk->sk_lock.owned) + __lock_sock(sk); + sk->sk_lock.owned = 1; +- spin_unlock(&sk->sk_lock.slock); ++ spin_unlock_bh(&sk->sk_lock.slock); + /* + * The sk_lock has mutex_lock() semantics here: + */ + mutex_acquire(&sk->sk_lock.dep_map, subclass, 0, _RET_IP_); +- local_bh_enable(); + } + EXPORT_SYMBOL(lock_sock_nested); + +@@ -3122,12 +3121,11 @@ bool lock_sock_fast(struct sock *sk) + + __lock_sock(sk); + sk->sk_lock.owned = 1; +- spin_unlock(&sk->sk_lock.slock); ++ spin_unlock_bh(&sk->sk_lock.slock); + /* + * The sk_lock has mutex_lock() semantics here: + */ + mutex_acquire(&sk->sk_lock.dep_map, 0, 0, _RET_IP_); +- local_bh_enable(); + return true; + } + EXPORT_SYMBOL(lock_sock_fast); +diff --git a/net/sched/sch_api.c b/net/sched/sch_api.c +index b12a3502f..324f60e67 100644 +--- a/net/sched/sch_api.c ++++ b/net/sched/sch_api.c +@@ -1271,7 +1271,7 @@ static struct Qdisc *qdisc_create(struct net_device *dev, + rcu_assign_pointer(sch->stab, stab); + } + if (tca[TCA_RATE]) { +- seqcount_t *running; ++ net_seqlock_t *running; + + err = -EOPNOTSUPP; + if (sch->flags & TCQ_F_MQROOT) { +diff --git a/net/sched/sch_generic.c b/net/sched/sch_generic.c +index ecdd9e83f..73b5aa797 100644 +--- a/net/sched/sch_generic.c ++++ b/net/sched/sch_generic.c +@@ -578,7 +578,11 @@ struct Qdisc noop_qdisc = { + .ops = &noop_qdisc_ops, + .q.lock = __SPIN_LOCK_UNLOCKED(noop_qdisc.q.lock), + .dev_queue = &noop_netdev_queue, ++#ifdef CONFIG_PREEMPT_RT ++ .running = __SEQLOCK_UNLOCKED(noop_qdisc.running), ++#else + .running = SEQCNT_ZERO(noop_qdisc.running), ++#endif + .busylock = __SPIN_LOCK_UNLOCKED(noop_qdisc.busylock), + .gso_skb = { + .next = (struct sk_buff *)&noop_qdisc.gso_skb, +@@ -889,9 +893,15 @@ struct Qdisc *qdisc_alloc(struct netdev_queue *dev_queue, + lockdep_set_class(&sch->seqlock, + dev->qdisc_tx_busylock ?: &qdisc_tx_busylock); + ++#ifdef CONFIG_PREEMPT_RT ++ seqlock_init(&sch->running); ++ lockdep_set_class(&sch->running.lock, ++ dev->qdisc_running_key ?: &qdisc_running_key); ++#else + seqcount_init(&sch->running); + lockdep_set_class(&sch->running, + dev->qdisc_running_key ?: &qdisc_running_key); ++#endif + + sch->ops = ops; + sch->flags = ops->static_flags; +diff --git a/net/sunrpc/svc_xprt.c b/net/sunrpc/svc_xprt.c +index f56b4df6c..6cb833516 100644 +--- a/net/sunrpc/svc_xprt.c ++++ b/net/sunrpc/svc_xprt.c +@@ -422,7 +422,7 @@ void svc_xprt_do_enqueue(struct svc_xprt *xprt) + if (test_and_set_bit(XPT_BUSY, &xprt->xpt_flags)) + return; + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + pool = svc_pool_for_cpu(xprt->xpt_server, cpu); + + atomic_long_inc(&pool->sp_stats.packets); +@@ -446,7 +446,7 @@ void svc_xprt_do_enqueue(struct svc_xprt *xprt) + rqstp = NULL; + out_unlock: + rcu_read_unlock(); +- put_cpu(); ++ put_cpu_light(); + trace_svc_xprt_do_enqueue(xprt, rqstp); + } + EXPORT_SYMBOL_GPL(svc_xprt_do_enqueue); +diff --git a/net/xfrm/xfrm_state.c b/net/xfrm/xfrm_state.c +index ac2f1a733..84f421e6b 100644 +--- a/net/xfrm/xfrm_state.c ++++ b/net/xfrm/xfrm_state.c +@@ -2673,7 +2673,8 @@ int __net_init xfrm_state_init(struct net *net) + net->xfrm.state_num = 0; + INIT_WORK(&net->xfrm.state_hash_work, xfrm_hash_resize); + spin_lock_init(&net->xfrm.xfrm_state_lock); +- seqcount_init(&net->xfrm.xfrm_state_hash_generation); ++ seqcount_spinlock_init(&net->xfrm.xfrm_state_hash_generation, ++ &net->xfrm.xfrm_state_lock); + return 0; + + out_byspi: +-- +2.17.1 + diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/tf-a/0001-add-LDFLAGS-to-fix-compilation-errors.patch b/bsp/meta-hisilicon/recipes-kernel/linux/files/tf-a/0001-add-LDFLAGS-to-fix-compilation-errors.patch new file mode 100644 index 0000000000000000000000000000000000000000..3195559852301d8449afc7fcf092566067331e74 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/tf-a/0001-add-LDFLAGS-to-fix-compilation-errors.patch @@ -0,0 +1,40 @@ +From 62bd5528ccb54ecaa7abf9c1804161e477b815c6 Mon Sep 17 00:00:00 2001 +From: hanzongcheng +Date: Wed, 17 May 2023 01:43:14 +0800 +Subject: [PATCH] add $(LDFLAGS) to fix compilation errors + +When compiling host tools with native sdk, the shared libraries can not +linked correctly. So configure the search path by passing LDFLAGS to fix +this. + +Signed-off-by: hanzongcheng + +diff --git a/tools/cert_create/Makefile b/tools/cert_create/Makefile +index c03629a..9fe901f 100644 +--- a/tools/cert_create/Makefile ++++ b/tools/cert_create/Makefile +@@ -76,7 +76,7 @@ ${BINARY}: ${OBJECTS} Makefile + @echo 'const char build_msg[] = "Built : "__TIME__", "__DATE__; \ + const char platform_msg[] = "${PLAT_MSG}";' | \ + ${HOSTCC} -c ${HOSTCCFLAGS} -xc - -o src/build_msg.o +- ${Q}${HOSTCC} src/build_msg.o ${OBJECTS} ${LIB_DIR} ${LIB} -o $@ ++ ${Q}${HOSTCC} src/build_msg.o ${OBJECTS} ${LIB_DIR} ${LIB} ${BUILD_LDFLAGS} -o $@ + + %.o: %.c + @echo " HOSTCC $<" +diff --git a/tools/fiptool/Makefile b/tools/fiptool/Makefile +index ef35014..386e06e 100644 +--- a/tools/fiptool/Makefile ++++ b/tools/fiptool/Makefile +@@ -37,7 +37,7 @@ all: ${PROJECT} + + ${PROJECT}: ${OBJECTS} Makefile + @echo " HOSTLD $@" +- ${Q}${HOSTCC} ${OBJECTS} -o $@ ${LDLIBS} ++ ${Q}${HOSTCC} ${OBJECTS} -o $@ ${LDLIBS} ${BUILD_LDFLAGS} + @${ECHO_BLANK_LINE} + @echo "Built $@ successfully" + @${ECHO_BLANK_LINE} +-- +2.34.1 + diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/tools/mkimage b/bsp/meta-hisilicon/recipes-kernel/linux/files/tools/mkimage new file mode 100644 index 0000000000000000000000000000000000000000..7101799495b98e2731920adc7ba831a3180df335 Binary files /dev/null and b/bsp/meta-hisilicon/recipes-kernel/linux/files/tools/mkimage differ diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/hieulerpi1-tf-a.bb b/bsp/meta-hisilicon/recipes-kernel/linux/hieulerpi1-tf-a.bb new file mode 100644 index 0000000000000000000000000000000000000000..523bf57853d717b5b62b747721488cfe798c7b63 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/hieulerpi1-tf-a.bb @@ -0,0 +1,40 @@ +SUMMARY = "ARM Trusted Firmware for hieulerpi1" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +BPN = "trusted-firmware-a" +PV = "2.2" + +OPENEULER_LOCAL_NAME = "HiEuler-driver" + +SRC_URI = "file://HiEuler-driver/firmware/${BP}.tar.gz \ + file://HiEuler-driver/firmware/${BP}.patch \ + file://tf-a/0001-add-LDFLAGS-to-fix-compilation-errors.patch \ + " + +SRC_URI[md5sum] = "abb0e05dd2e719f094841790c81efa57" +SRC_URI[sha256sum] = "01d9190755f752929c82bdf6b0e16868dc7a818666b84e1dbdfa4726f6bb2731" + +# override LDFLAGS to fix compilation error: "aarch64-openeuler-linux-gnu-ld.bfd: unrecognized option '-Wl,-O1'" +# add --no-warn-rwx-segments to avoid: warning: has a LOAD segment with RWX permissions +export LDFLAGS=" --no-warn-rwx-segments " + +# tf-a requires dtc native +DEPENDS += "dtc-native" + +# uImage as BL33 +DEPENDS += "virtual/kernel" + +EXTRA_OEMAKE="CROSS_COMPILE=${TARGET_PREFIX} " + +do_compile:append() { + oe_runmake PLAT=ss928v100 SPD=none BL33=${WORKDIR}/recipe-sysroot/linux-img/uImage-pi CCI_UP=0 DEBUG=0 BL33_SEC=0 fip + cp ${B}/build/ss928v100/release/fip.bin ${B}/build/ss928v100/release/fip-pi.bin +} + +do_install:append() { + install -d ${D}/boot/ + install ${B}/build/ss928v100/release/fip-pi.bin ${D}/boot/kernel-pi +} + +FILES:${PN} += " /boot/kernel-pi " diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093-mpu.inc b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093-mpu.inc new file mode 100644 index 0000000000000000000000000000000000000000..abca36c29e475c5606266378ed08996c19be56e1 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093-mpu.inc @@ -0,0 +1,71 @@ +# add recipes-kernel path to find patch and defconfig +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +# for mkimage +DEPENDS += "u-boot-tools-native dtc-native" + +# add prebuild tools to make uImage +SRC_URI = " \ + file://kernel-5.10-tag3093 \ + file://tools \ + file://config/hi3093/defconfig \ + file://mpu_solution/src/non_real_time/adapter_for_hi3093/include/kbox \ + file://mpu_solution/platform/securec/include \ + file://mpu_solution/src/patches/openEuler \ + file://dtbs/hi3093_mcs_3with1.dts \ + file://dtbs/hi3093_mcs_2with2.dts \ + file://dtbs/hi3093.dts \ +" + +# add patch tool to solve patch apply +PATCHTOOL = "git" + +# add method to do_compile task to produce bootable Image +do_compile:append(){ + mkimage -A arm -O linux -T kernel -C none -a 0x98280000 -e 0x98280040 -n linux-5.10.0 -d ${KERNEL_OUTPUT_DIR}/zImage uImage + dtc -I dts -O dtb -o hi3093_mcs_3with1.dtb ${WORKDIR}/dtbs/hi3093_mcs_3with1.dts + dtc -I dts -O dtb -o hi3093_mcs_2with2.dtb ${WORKDIR}/dtbs/hi3093_mcs_2with2.dts + dtc -I dts -O dtb -o hi3093.dtb ${WORKDIR}/dtbs/hi3093.dts +} + +WORKDTB = "${@bb.utils.contains('MCS_FEATURES', 'openamp', 'hi3093_mcs_3with1.dtb', 'hi3093.dtb', d)}" + +# add uImage to $D +do_install:append(){ + cp uImage ${D}/boot + cp -f ${WORKDTB} ${D}/boot/hi1711_asic.dtb +} + +PACKAGES += "bootfile" +FILES:bootfile=" \ + /boot/uImage \ + /boot/hi1711_asic.dtb \ +" +RPROVIDES:${PN} += "bootfile" + +python do_fetch() { + # download src-openeuler/kernel repo for patches + d.setVar("OPENEULER_REPO_NAME", "kernel") + d.setVar("OPENEULER_LOCAL_NAME", 'src-kernel-5.10-tag3093') + bb.build.exec_func("do_openeuler_fetch", d) + + # download openeuler/kernel-5.10 repo for linux kernel src files + d.setVar("OPENEULER_REPO_NAME", "kernel-5.10") + d.setVar("OPENEULER_LOCAL_NAME", 'kernel-5.10-tag3093') + bb.build.exec_func("do_openeuler_fetch", d) +} + +S = "${WORKDIR}/kernel-5.10-tag3093" + +do_copy_headers() { + cd ${S}/ + # Due to the large number of patch hunks, + # yocto's built-in patch mechanism has abnormal failure issues. + # Here is a solution to avoid this issue + grep "Missing single sector read for large sector size" ${S}/drivers/mmc/core/block.c || patch -p1 < ${WORKDIR}/mpu_solution/src/patches/openEuler/kernel-22.03-lts-sp1-mmc.patch + cd - + cp -rf ${WORKDIR}/mpu_solution/platform/securec/include/* ${S}/include/linux + mkdir -p ${S}/include/linux/kbox + cp -rf ${WORKDIR}/mpu_solution/src/non_real_time/adapter_for_hi3093/include/kbox/* ${S}/include/linux/kbox +} +addtask do_copy_headers after do_patch before do_configure diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093.inc b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093.inc new file mode 100644 index 0000000000000000000000000000000000000000..bf0de7eebbabb753cb946b2193da515e23590fc4 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093.inc @@ -0,0 +1,21 @@ +# add recipes-kernel path to find patch and defconfig +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +SRC_URI = " \ + file://kernel-5.10-tag3093 \ + file://config/hi3093/defconfig \ +" + +python do_fetch() { + # download src-openeuler/kernel repo for patches + d.setVar("OPENEULER_REPO_NAME", "kernel") + d.setVar("OPENEULER_LOCAL_NAME", 'src-kernel-5.10-tag3093') + bb.build.exec_func("do_openeuler_fetch", d) + + # download openeuler/kernel-5.10 repo for linux kernel src files + d.setVar("OPENEULER_REPO_NAME", "kernel-5.10") + d.setVar("OPENEULER_LOCAL_NAME", 'kernel-5.10-tag3093') + bb.build.exec_func("do_openeuler_fetch", d) +} + +S = "${WORKDIR}/kernel-5.10-tag3093" diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-hieulerpi1.inc b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hieulerpi1.inc new file mode 100644 index 0000000000000000000000000000000000000000..65a9e14b5471f19d78317e4ce3b5306c79d7475d --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hieulerpi1.inc @@ -0,0 +1,102 @@ +inherit kernel-yocto + +# add recipes-kernel path to find patch and defconfig +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +# for mkimage +DEPENDS += "u-boot-tools-native dtc-native" + +SRC_URI = "file://kernel-5.10-tag928 \ + file://HiEuler-driver/linux/5.10.0-153.28.0.patch \ + file://dtbs/ss928-pi.dts \ + file://meta-data;type=kmeta;destsuffix=meta-data \ +" + +# remove default patch +SRC_URI:remove = " \ + file://patches/${ARCH}/0001-arm64-add-zImage-support-for-arm64.patch \ +" + +# add BL31 +SRC_URI:append = " file://HiEuler-driver/firmware/trusted-firmware-a-2.2.tar.gz " + +S = "${WORKDIR}/kernel-5.10-tag928" + +python do_fetch() { + # download HiEuler repo for patches + d.setVar("OPENEULER_REPO_NAME", "HiEuler-driver") + d.setVar("OPENEULER_LOCAL_NAME", 'HiEuler-driver') + bb.build.exec_func("do_openeuler_fetch", d) + + # download src-openeuler/kernel repo for patches + d.setVar("OPENEULER_REPO_NAME", "kernel") + d.setVar("OPENEULER_LOCAL_NAME", 'src-kernel-5.10-tag928') + bb.build.exec_func("do_openeuler_fetch", d) + + # download openeuler/kernel-5.10 repo for linux kernel src files + d.setVar("OPENEULER_REPO_NAME", "kernel-5.10") + d.setVar("OPENEULER_LOCAL_NAME", 'kernel-5.10-tag928') + bb.build.exec_func("do_openeuler_fetch", d) +} + +## handling for kernel meta data +# the original get_dirs_with_fragments will include OPENEULER_SP_DIR +# so that all the files under OPENEULER_SP_DIR will be in the file-checksums +# of do_kernel_metadata, which is not necessary +def get_dirs_with_metadata(d): + extrapaths = [] + extrafiles = [] + extrapathsvalue = (d.getVar("FILESEXTRAPATHS") or "") + + # Remove global openeuler src dir + openeuler_src_dir = d.getVar("OPENEULER_SP_DIR") + extrapathsvalue = extrapathsvalue.replace(openeuler_src_dir, "") + + # Remove default flag which was used for checking + extrapathsvalue = extrapathsvalue.replace("__default:", "") + extrapaths = extrapathsvalue.split(":") + + # add scc files + extrapaths += find_sccs(d) + + # add patches + extrapaths += find_patches(d, '') + for path in extrapaths: + if path and path + ":True" not in extrafiles: + extrafiles.append(path + ":" + str(os.path.exists(path))) + + return " ".join(extrafiles) + +# override the original get_dirs_with_fragments in kernel-yocto.bbclass +do_kernel_metadata[file-checksums] = "${@get_dirs_with_metadata(d)}" + + +# no external defconfig +OPENEULER_KERNEL_CONFIG = "" +# use in-tree defconfig, the defconfig is in src tree +# after patches are unpatched +KBUILD_DEFCONFIG = "hieulerpi1_defconfig" + +# add method to do_compile task to produce bootable Image +do_compile:append(){ + mkimage -A arm64 -O linux -T kernel -C none -a 0x080000 -e 0x080000 -n "Linux-5.10.0" -d ${KERNEL_OUTPUT_DIR}/Image uImage-tmp + oe_runmake dtbs + dtc -I dts -O dtb ${WORKDIR}/dtbs/ss928-pi.dts -o ${WORKDIR}/ss928-pi.dtb + cat uImage-tmp ${WORKDIR}/ss928-pi.dtb > ${KERNEL_OUTPUT_DIR}/uImage-pi +} + +# uImage as bl33, we need to use it to build the fip.bin. So add uImage to SYSROOT_DIR +# Since sysroot_stage_all() is rewritten as empty in meta/classes/kernel.bbclass, +# we can't use "SYSROOT_DIRS" directly, here we write a SYSROOT_PREPROCESS_FUNCS to add uImage +SYSROOT_DIRS += "/linux-img" +FILES:${KERNEL_PACKAGE_NAME} += "/linux-img" +do_install:append() { + install -d ${D}/linux-img + install -m 0644 ${KERNEL_OUTPUT_DIR}/uImage-pi ${D}/linux-img/uImage-pi +} + +SYSROOT_PREPROCESS_FUNCS += "additional_populate_sysroot" +additional_populate_sysroot() { + sysroot_stage_dir ${D}/linux-img ${SYSROOT_DESTDIR}/linux-img +} + diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler-rt.bbappend b/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler-rt.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..04c690de1d3b465a7b5a5e79d8753cd1eb3c0500 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler-rt.bbappend @@ -0,0 +1,14 @@ +# add COMPATIBLE_MACHINE +COMPATIBLE_MACHINE = "hi3093|hieulerpi1" + +require recipes-kernel/linux/${@bb.utils.contains('DISTRO_FEATURES', 'mpu_solution', 'linux-hi3093-mpu.inc', 'linux-${MACHINE}.inc', d)} + +SRC_URI:remove = " \ + file://src-kernel-5.10/0001-apply-preempt-RT-patch.patch \ + file://src-kernel-5.10/0001-modify-openeuler_defconfig-for-rt62.patch \ +" + +SRC_URI:append:hieulerpi1 = " \ + file://patch/0001-apply-preempt-RT-patch-b88a0de01.patch \ + file://src-kernel-5.10-tag928/0001-modify-openeuler_defconfig-for-rt62.patch \ +" diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler.bbappend b/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..e79121ce137fd1ad2679d73186119979635861c8 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler.bbappend @@ -0,0 +1,4 @@ +# add COMPATIBLE_MACHINE +COMPATIBLE_MACHINE = "hi3093|hieulerpi1" + +require recipes-kernel/linux/${@bb.utils.contains('DISTRO_FEATURES', 'mpu_solution', 'linux-hi3093-mpu.inc', 'linux-${MACHINE}.inc', d)} diff --git a/bsp/meta-openeuler-bsp/classes/sdcard_image-rpi.bbclass b/bsp/meta-openeuler-bsp/classes/sdcard_image-rpi.bbclass new file mode 100644 index 0000000000000000000000000000000000000000..3ba34a2a029ac85e0340f5ec4f2181b8473e4715 --- /dev/null +++ b/bsp/meta-openeuler-bsp/classes/sdcard_image-rpi.bbclass @@ -0,0 +1,209 @@ +# This is a copy of sdcard_image-rpi.bbclass from meta-raspberrypi +# +# NOTE: we add uefi_configuration here to make uefi configs before Burn Partitions + +inherit image_types + +# +# Create an image that can be written onto a SD card using dd. +# +# The disk layout used is: +# +# 0 -> IMAGE_ROOTFS_ALIGNMENT - reserved for other data +# IMAGE_ROOTFS_ALIGNMENT -> BOOT_SPACE - bootloader and kernel +# BOOT_SPACE -> SDIMG_SIZE - rootfs +# + +# Default Free space = 1.3x +# Use IMAGE_OVERHEAD_FACTOR to add more space +# <---------> +# 4MiB 48MiB SDIMG_ROOTFS +# <-----------------------> <----------> <----------------------> +# ------------------------ ------------ ------------------------ +# | IMAGE_ROOTFS_ALIGNMENT | BOOT_SPACE | ROOTFS_SIZE | +# ------------------------ ------------ ------------------------ +# ^ ^ ^ ^ +# | | | | +# 0 4MiB 4MiB + 48MiB 4MiB + 48Mib + SDIMG_ROOTFS + +# This image depends on the rootfs image +IMAGE_TYPEDEP:rpi-sdimg = "${SDIMG_ROOTFS_TYPE}" + +# Kernel image name +SDIMG_KERNELIMAGE:raspberrypi ?= "kernel.img" +SDIMG_KERNELIMAGE:raspberrypi2 ?= "kernel7.img" +SDIMG_KERNELIMAGE:raspberrypi3-64 ?= "kernel8.img" + +# Boot partition volume id +# Shorten raspberrypi to just rpi to keep it under 11 characters +# now enforced by mkfs.vfat from dosfstools-4.2 +BOOTDD_VOLUME_ID ?= "${@d.getVar('MACHINE').replace('raspberrypi', 'rpi')}" + +# Boot partition size [in KiB] (will be rounded up to IMAGE_ROOTFS_ALIGNMENT) +BOOT_SPACE ?= "49152" + +# Set alignment to 4MB [in KiB] +IMAGE_ROOTFS_ALIGNMENT = "4096" + +# Use an uncompressed ext3 by default as rootfs +SDIMG_ROOTFS_TYPE ?= "ext3" +SDIMG_ROOTFS = "${IMGDEPLOYDIR}/${IMAGE_LINK_NAME}.${SDIMG_ROOTFS_TYPE}" + +# For the names of kernel artifacts +inherit kernel-artifact-names + +RPI_SDIMG_EXTRA_DEPENDS ?= "" + +do_image_rpi_sdimg[depends] = " \ + parted-native:do_populate_sysroot \ + mtools-native:do_populate_sysroot \ + dosfstools-native:do_populate_sysroot \ + virtual/kernel:do_deploy \ + rpi-bootfiles:do_deploy \ + ${@bb.utils.contains('MACHINE_FEATURES', 'armstub', 'armstubs:do_deploy', '' ,d)} \ + ${@bb.utils.contains('RPI_USE_U_BOOT', '1', 'u-boot:do_deploy', '',d)} \ + ${@bb.utils.contains('RPI_USE_U_BOOT', '1', 'u-boot-default-script:do_deploy', '',d)} \ + ${RPI_SDIMG_EXTRA_DEPENDS} \ +" + +do_image_rpi_sdimg[recrdeps] = "do_build" + +# SD card image name +SDIMG = "${IMGDEPLOYDIR}/${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.rpi-sdimg" + +# Additional files and/or directories to be copied into the vfat partition from the IMAGE_ROOTFS. +FATPAYLOAD ?= "" + +# SD card vfat partition image name +SDIMG_VFAT_DEPLOY ?= "${RPI_USE_U_BOOT}" +SDIMG_VFAT = "${IMAGE_NAME}.vfat" +SDIMG_LINK_VFAT = "${IMGDEPLOYDIR}/${IMAGE_LINK_NAME}.vfat" + +uefi_configuration() { + # For uefi, install Image or fitImage by default. + if [ ! -z "${INITRAMFS_IMAGE}" -a "${INITRAMFS_IMAGE_BUNDLE}" = "1" ]; then + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${INITRAMFS_LINK_NAME}.bin ::${SDIMG_KERNELIMAGE} || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${INITRAMFS_LINK_NAME}.bin into boot.img" + else + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE} ::${SDIMG_KERNELIMAGE} || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE} into boot.img" + fi +} + +IMAGE_CMD:rpi-sdimg () { + + # Align partitions + BOOT_SPACE_ALIGNED=$(expr ${BOOT_SPACE} + ${IMAGE_ROOTFS_ALIGNMENT} - 1) + BOOT_SPACE_ALIGNED=$(expr ${BOOT_SPACE_ALIGNED} - ${BOOT_SPACE_ALIGNED} % ${IMAGE_ROOTFS_ALIGNMENT}) + SDIMG_SIZE=$(expr ${IMAGE_ROOTFS_ALIGNMENT} + ${BOOT_SPACE_ALIGNED} + $ROOTFS_SIZE) + + echo "Creating filesystem with Boot partition ${BOOT_SPACE_ALIGNED} KiB and RootFS $ROOTFS_SIZE KiB" + + # Check if we are building with device tree support + DTS="${@make_dtb_boot_files(d)}" + + # Initialize sdcard image file + dd if=/dev/zero of=${SDIMG} bs=1024 count=0 seek=${SDIMG_SIZE} + + # Create partition table + parted -s ${SDIMG} mklabel msdos + # Create boot partition and mark it as bootable + parted -s ${SDIMG} unit KiB mkpart primary fat32 ${IMAGE_ROOTFS_ALIGNMENT} $(expr ${BOOT_SPACE_ALIGNED} \+ ${IMAGE_ROOTFS_ALIGNMENT}) + parted -s ${SDIMG} set 1 boot on + # Create rootfs partition to the end of disk + parted -s ${SDIMG} -- unit KiB mkpart primary ext2 $(expr ${BOOT_SPACE_ALIGNED} \+ ${IMAGE_ROOTFS_ALIGNMENT}) -1s + parted ${SDIMG} print + + # Create a vfat image with boot files + BOOT_BLOCKS=$(LC_ALL=C parted -s ${SDIMG} unit b print | awk '/ 1 / { print substr($4, 1, length($4 -1)) / 512 /2 }') + rm -f ${WORKDIR}/boot.img + mkfs.vfat -F32 -n "${BOOTDD_VOLUME_ID}" -S 512 -C ${WORKDIR}/boot.img $BOOT_BLOCKS + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${BOOTFILES_DIR_NAME}/* ::/ || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/${BOOTFILES_DIR_NAME}/* into boot.img" + if [ "${@bb.utils.contains("MACHINE_FEATURES", "armstub", "1", "0", d)}" = "1" ]; then + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/armstubs/${ARMSTUB} ::/ || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/armstubs/${ARMSTUB} into boot.img" + fi + if test -n "${DTS}"; then + # Copy board device trees (including overlays) + # There is an assumption here - no DTB in other directories than root + # and root/overlays. mmd/mcopy are not very flexible tools. + mmd -i ${WORKDIR}/boot.img overlays + for entry in ${DTS} ; do + # Split entry at optional ';' + if [ $(echo "$entry" | grep -c \;) = "0" ] ; then + DEPLOY_FILE="$entry" + DEST_FILENAME="$entry" + else + DEPLOY_FILE="$(echo "$entry" | cut -f1 -d\;)" + DEST_FILENAME="$(echo "$entry" | cut -f2- -d\;)" + fi + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${DEPLOY_FILE} ::${DEST_FILENAME} || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/${DEPLOY_FILE} into boot.img" + done + fi + if [ "${RPI_USE_U_BOOT}" = "1" ]; then + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/u-boot.bin ::${SDIMG_KERNELIMAGE} || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/u-boot.bin into boot.img" + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/boot.scr ::boot.scr || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/boot.scr into boot.img" + if [ ! -z "${INITRAMFS_IMAGE}" -a "${INITRAMFS_IMAGE_BUNDLE}" = "1" ]; then + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${INITRAMFS_LINK_NAME}.bin ::${KERNEL_IMAGETYPE} || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${INITRAMFS_LINK_NAME}.bin into boot.img" + else + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE} ::${KERNEL_IMAGETYPE} || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE} into boot.img" + fi + else + uefi_configuration "" + fi + + # Add files (eg. hypervisor binaries) from the deploy dir + if [ -n "${DEPLOYPAYLOAD}" ] ; then + echo "Copying deploy file payload into VFAT" + for entry in ${DEPLOYPAYLOAD} ; do + # Split entry at optional ':' to enable file renaming for the destination + if [ $(echo "$entry" | grep -c :) = "0" ] ; then + DEPLOY_FILE="$entry" + DEST_FILENAME="$entry" + else + DEPLOY_FILE="$(echo "$entry" | cut -f1 -d:)" + DEST_FILENAME="$(echo "$entry" | cut -f2- -d:)" + fi + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${DEPLOY_FILE} ::${DEST_FILENAME} || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/${DEPLOY_FILE} into boot.img" + done + fi + + if [ -n "${FATPAYLOAD}" ] ; then + echo "Copying payload into VFAT" + for entry in ${FATPAYLOAD} ; do + # use bbwarn instead of bbfatal to stop aborting on vfat issues like not supporting .~lock files + mcopy -v -i ${WORKDIR}/boot.img -s ${IMAGE_ROOTFS}$entry :: || bbwarn "mcopy cannot copy ${IMAGE_ROOTFS}$entry into boot.img" + done + fi + + # Add stamp file + echo "${IMAGE_NAME}" > ${WORKDIR}/image-version-info + mcopy -v -i ${WORKDIR}/boot.img ${WORKDIR}/image-version-info :: || bbfatal "mcopy cannot copy ${WORKDIR}/image-version-info into boot.img" + + # Deploy vfat partition + if [ "${SDIMG_VFAT_DEPLOY}" = "1" ]; then + cp ${WORKDIR}/boot.img ${IMGDEPLOYDIR}/${SDIMG_VFAT} + ln -sf ${SDIMG_VFAT} ${SDIMG_LINK_VFAT} + fi + + # Burn Partitions + dd if=${WORKDIR}/boot.img of=${SDIMG} conv=notrunc seek=1 bs=$(expr ${IMAGE_ROOTFS_ALIGNMENT} \* 1024) + # If SDIMG_ROOTFS_TYPE is a .xz file use xzcat + if echo "${SDIMG_ROOTFS_TYPE}" | egrep -q "*\.xz" + then + xzcat ${SDIMG_ROOTFS} | dd of=${SDIMG} conv=notrunc seek=1 bs=$(expr 1024 \* ${BOOT_SPACE_ALIGNED} + ${IMAGE_ROOTFS_ALIGNMENT} \* 1024) + else + dd if=${SDIMG_ROOTFS} of=${SDIMG} conv=notrunc seek=1 bs=$(expr 1024 \* ${BOOT_SPACE_ALIGNED} + ${IMAGE_ROOTFS_ALIGNMENT} \* 1024) + fi +} + +ROOTFS_POSTPROCESS_COMMAND += " rpi_generate_sysctl_config ; " + +rpi_generate_sysctl_config() { + # systemd sysctl config + test -d ${IMAGE_ROOTFS}${sysconfdir}/sysctl.d && \ + echo "vm.min_free_kbytes = 8192" > ${IMAGE_ROOTFS}${sysconfdir}/sysctl.d/rpi-vm.conf + + # sysv sysctl config + IMAGE_SYSCTL_CONF="${IMAGE_ROOTFS}${sysconfdir}/sysctl.conf" + test -e ${IMAGE_ROOTFS}${sysconfdir}/sysctl.conf && \ + sed -e "/vm.min_free_kbytes/d" -i ${IMAGE_SYSCTL_CONF} + echo "" >> ${IMAGE_SYSCTL_CONF} && echo "vm.min_free_kbytes = 8192" >> ${IMAGE_SYSCTL_CONF} +} diff --git a/bsp/meta-openeuler-bsp/conf/distro/openeuler-bsp.conf b/bsp/meta-openeuler-bsp/conf/distro/openeuler-bsp.conf new file mode 100644 index 0000000000000000000000000000000000000000..29f80b6194e649ff06f992bb0ebc0e63133c12da --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/distro/openeuler-bsp.conf @@ -0,0 +1 @@ +include conf/machine/include/openeuler-${MACHINE}.conf diff --git a/bsp/meta-openeuler-bsp/conf/layer.conf b/bsp/meta-openeuler-bsp/conf/layer.conf new file mode 100644 index 0000000000000000000000000000000000000000..930f14275e8a3d3acfaf8946bb6da39e0e5efd83 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/layer.conf @@ -0,0 +1,55 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH =. "${LAYERDIR}:" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "openeuler-bsp" +BBFILE_PATTERN_openeuler-bsp = "^${LAYERDIR}/" +BBFILE_PRIORITY_openeuler-bsp = "25" + +LAYERSERIES_COMPAT_openeuler-bsp = "kirkstone" +#no bb file under meta-openeuler-bsp, set it to 1 to ignore "No bb files" warning +BBFILE_PATTERN_IGNORE_EMPTY_openeuler-bsp = "1" + + +#enable .bb under raspberrypi/ when exist meta-raspberrypi +BBFILES_DYNAMIC += " \ +raspberrypi:${LAYERDIR}/raspberrypi/*/*/*.bb \ +raspberrypi:${LAYERDIR}/raspberrypi/*/*/*.bbappend \ +" + +#enable find .inc under raspberrypi/, included in .bb +BBPATH:append = ":${LAYERDIR}/raspberrypi" + +#enable .bb under rockchip/ when exist yocto-meta-rockchip +BBFILES_DYNAMIC += " \ +rockchip:${LAYERDIR}/rockchip/*/*/*.bb \ +rockchip:${LAYERDIR}/rockchip/*/*/*.bbappend \ +" + +#enable find .inc under rockchip/, included in .bb +BBPATH:append = ":${LAYERDIR}/rockchip" + + +#enable .bb under renesas/ when exist yocto-meta-renesas +BBFILES_DYNAMIC += " \ +renesas-bsp:${LAYERDIR}/renesas/recipes-remi/recipes-*/*/*.bb \ +renesas-bsp:${LAYERDIR}/renesas/recipes-remi/recipes-*/*/*.bbappend \ +" + +#enable find .inc under renesas/, included in .bb +BBPATH:append = ":${LAYERDIR}/renesas/recipes-remi" + +#enable .bb under sunxi/ when exist yocto-meta-sunxi +BBFILES_DYNAMIC += " \ +sunxi:${LAYERDIR}/sunxi/*/*/*.bb \ +sunxi:${LAYERDIR}/sunxi/*/*/*.bbappend \ +" + +#enable .bb under ti/ when exist yocto-meta-ti +BBFILES_DYNAMIC += " \ +meta-ti-bsp:${LAYERDIR}/ti/*/*/*.bb \ +meta-ti-bsp:${LAYERDIR}/ti/*/*/*.bbappend \ +" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/myd-am62x.inc b/bsp/meta-openeuler-bsp/conf/machine/include/myd-am62x.inc new file mode 100644 index 0000000000000000000000000000000000000000..80e09ec0cd6f426ca3801d71500f762d7d633b06 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/myd-am62x.inc @@ -0,0 +1,29 @@ +require conf/machine/include/k3.inc +SOC_FAMILY:append = ":am62xx" + +MACHINE_FEATURES += "screen gpu" + +require conf/machine/include/mesa-pvr.inc +PREFERRED_PROVIDER_virtual/gpudriver ?= "ti-img-rogue-driver" + +# Default tiboot3.bin on AM62x is for HS-FS +IMAGE_BOOT_FILES += "tiboot3-am62x-hs-fs-evm.bin" + +# Since default tiboot3.bin on AM62x is for HS-FS, add a version for GP +IMAGE_BOOT_FILES += "tiboot3-am62x-gp-evm.bin" + +# Since default tiboot3.bin on AM62x is for HS-FS, add a version for HS-SE +IMAGE_BOOT_FILES += "tiboot3-am62x-hs-evm.bin" + +# Bitmap image tarball for early splashscreen +IMAGE_BOOT_FILES += "ti_logo_414x97_32bpp.bmp.gz" + +TFA_BOARD = "lite" +TFA_K3_SYSTEM_SUSPEND = "1" + +OPTEEMACHINE = "k3-am62x" + +# Normally AM62 boards use ttyS2, but our Jailhouse inmate may use ttyS3, so try both +SERIAL_CONSOLES = "115200;ttyS2 115200;ttyS3" + +IMAGE_FSTYPES += " ext4 " diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-hi3093.conf b/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-hi3093.conf new file mode 100644 index 0000000000000000000000000000000000000000..8e6c9a53eba145fe23525cfb5fa7b8ac0eee3733 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-hi3093.conf @@ -0,0 +1,2 @@ +# you can add machine config here for hi3093 + diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-raspberrypi4-64.conf b/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-raspberrypi4-64.conf new file mode 100644 index 0000000000000000000000000000000000000000..017347e3526c8272a6aaf985482d94a2021f1048 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-raspberrypi4-64.conf @@ -0,0 +1,79 @@ +require conf/multilib.conf +# currently, don't support 32 bit libs +MULTILIBS = "" + +ROOTFS_PACKAGE_ARCH = "aarch64" + +#set 0 to create zImage +RPI_USE_U_BOOT = "0" +KERNEL_IMAGETYPE_DIRECT = "Image" +ENABLE_UART = "1" +# serial port enabled by default in raspberrypi +CMDLINE_SERIAL = "console=tty1 console=ttyS0,115200" +# ttyS0 may use for ROS driver +# ttyAMA0 use for bluetooth +SERIAL_CONSOLES = "" + +# now, we still use vc4-fkms-v3d.dtbo, not vc4-kms-v3d.dtbo +# Otherwise, graphics drivers will trigger an error: +# "could not open drm device" +VC4DTBO = "vc4-fkms-v3d" + +# add kernel-module for support wifi +INSTALLMODULES += " \ +kernel-module-rfkill \ +kernel-module-cfg80211 \ +kernel-module-brcmutil \ +kernel-module-brcmfmac \ +" + +# add kernel-module for uvc camera +INSTALLMODULES += " \ +kernel-module-usb-f-uvc \ +kernel-module-uvcvideo \ +" + +# add common usb serial drivers +INSTALLMODULES += " \ +kernel-module-usbserial \ +kernel-module-cp210x \ +kernel-module-ch341 \ +" + +# add kernel-module for bluetooth +INSTALLMODULES += " \ +kernel-module-ecc \ +kernel-module-ecdh-generic \ +kernel-module-bluetooth \ +kernel-module-btbcm \ +kernel-module-hci-uart \ +kernel-module-rfcomm \ +kernel-module-cmac \ +kernel-module-bnep \ +" + +# add kernel-module for isula +INSTALLMODULES += " \ +kernel-module-overlay \ +" + +KERNEL_MODULE_AUTOLOAD = "${INSTALLMODULES}" + +# automatic file system expansion +AUTO-EXPAND-FS = "1" + +# remove bcm2711-rpi-4-b.dtb from kernel_devicetree +RPI_KERNEL_DEVICETREE:remove = " \ + broadcom/bcm2711-rpi-4-b.dtb \ +" + +# It will occur error below when rosslam and qt compiling together: +# ERROR: Nothing RPROVIDES 'nav2-rviz-plugins' (but /usr1/openeuler/src/yocto-poky/../yocto-meta-ros/meta-ros2-foxy/generated-recipes/navigation2/navigation2_0.4.7-1.bb RDEPENDS on or otherwise requires it) +# nav2-rviz-plugins was skipped: Recipe is blacklisted: qt5: depends on qtbase; x11: depends on rviz-ogre-vendor->(libx11,libxrandr,libxaw) which require x11 in DISTRO_FEATURES; opengl: depends on rviz-common, rviz-rendering, rviz-default-plugins which depend on rviz-ogre-vendor which depends on mesa which is not available because of missing opengl or vulkan in DISTRO_FEATURES +# nav2-rviz-plugins will be removed from RDEPENDS when adding qt5-layer +# see yocto-meta-ros/meta-ros2-foxy/recipes-bbappends/navigation2/navigation2_0.4.7-1.bbappend file +# line 4: ROS_EXEC_DEPENDS:remove = "${@bb.utils.contains_any('ROS_WORLD_SKIP_GROUPS', ['qt5', 'pyqt5', 'ogre'], 'nav2-rviz-plugins', '', d)}" +# so remove pacakgegroup-rosslam when adding qt5 +DISTRO_FEATURES:append = " ros-camera ${@bb.utils.contains('BBFILE_COLLECTIONS', 'qt5-layer', '', 'ros-slam', d)}" + +require ${@bb.utils.contains('BUILD_GUEST_OS', '1', 'rpi4-initramfs.conf', '', d)} diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-rockchip-rk3399pro-evb.conf b/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-rockchip-rk3399pro-evb.conf new file mode 100644 index 0000000000000000000000000000000000000000..1ae7ba9b3e36ce221fafa0a171dd0e7bad6ef228 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-rockchip-rk3399pro-evb.conf @@ -0,0 +1,21 @@ +#@TYPE: Machine +#@NAME: rk3399-openeuler +require conf/machine/include/rk3399.inc + +RK_WIFIBT_FIRMWARES = " \ + rkwifibt-firmware-ap6354-wifi \ + rkwifibt-firmware-ap6354-bt \ + brcm-tools \ +" + +MACHINE_EXTRA_RRECOMMENDS:append = " \ + linux-firmware-rk-cdndp \ + rockchip-npu \ +" + +# set uboot and kernel Image config +UBOOT_MACHINE = "rk3399_defconfig" + +# choose dtb file +ROCKCHIP_KERNEL_DTB_NAME ?= "rk3399-evb.dtb" +KERNEL_DEVICETREE = "rockchip/${ROCKCHIP_KERNEL_DTB_NAME}" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-rockchip-rk3568-evb.conf b/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-rockchip-rk3568-evb.conf new file mode 100644 index 0000000000000000000000000000000000000000..a9c2192e614b0289e8e84a6be2f94282b43e1fb8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-rockchip-rk3568-evb.conf @@ -0,0 +1,19 @@ +require conf/machine/include/rk356x.inc +# set IMAGETYPE and dtb + +RK_WIFIBT_FIRMWARES = " \ + rkwifibt-firmware-ap6398s-wifi \ + rkwifibt-firmware-ap6398s-bt \ + brcm-tools \ +" + +MACHINE_EXTRA_RRECOMMENDS:append = " \ + drm-cursor \ +" + +# set uboot and kernel Image config +UBOOT_MACHINE = "rk3568_defconfig" + +# choose dtb file +ROCKCHIP_KERNEL_DTB_NAME ?= "OK3568-C-linux.dtb" +KERNEL_DEVICETREE = "rockchip/${ROCKCHIP_KERNEL_DTB_NAME}" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-rockchip-rk3588-evb.conf b/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-rockchip-rk3588-evb.conf new file mode 100644 index 0000000000000000000000000000000000000000..7d40f2464fabd18d0980bc591eeaf4058d03568f --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/openeuler-rockchip-rk3588-evb.conf @@ -0,0 +1,19 @@ +require conf/machine/include/rk3588.inc +# set IMAGETYPE and dtb + +RK_WIFIBT_FIRMWARES = " \ + rkwifibt-firmware-ap6398s-wifi \ + rkwifibt-firmware-ap6398s-bt \ + brcm-tools \ +" + +MACHINE_EXTRA_RRECOMMENDS:append = " \ + drm-cursor \ +" + +# set uboot and kernel Image config +UBOOT_MACHINE = "rk3588_defconfig" + +# choose dtb file +ROCKCHIP_KERNEL_DTB_NAME ?= "OK3588-C.dtb" +KERNEL_DEVICETREE = "rockchip/${ROCKCHIP_KERNEL_DTB_NAME}" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/r9a07g044l.inc b/bsp/meta-openeuler-bsp/conf/machine/include/r9a07g044l.inc new file mode 100644 index 0000000000000000000000000000000000000000..2be23fa354e57bc91320c6b7011a96c09dc0a4f6 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/r9a07g044l.inc @@ -0,0 +1,3 @@ +SOC_FAMILY =. "rzg2l:" +require conf/machine/include/soc-family.inc +LINUXLIBCVERSION = "5.10%" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/rockchip-default-providers.inc b/bsp/meta-openeuler-bsp/conf/machine/include/rockchip-default-providers.inc new file mode 100644 index 0000000000000000000000000000000000000000..d89a8acabba43944e5fb46634a44675212642a8a --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/rockchip-default-providers.inc @@ -0,0 +1,2 @@ +# ROCKCHIP BSP default providers +PREFERRED_PROVIDER_virtual/kernel = "linux-openeuler" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/rockchip-wic.inc b/bsp/meta-openeuler-bsp/conf/machine/include/rockchip-wic.inc new file mode 100644 index 0000000000000000000000000000000000000000..8ed64519bad890dd93880a45c5085067bb554da5 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/rockchip-wic.inc @@ -0,0 +1,19 @@ +WKS_FILE = "sdimage-opi.wks" + +# enable extlinux.conf auto-generation +UBOOT_EXTLINUX = "1" +UBOOT_EXTLINUX_KERNEL_IMAGE = "/${KERNEL_IMAGETYPE}" +UBOOT_EXTLINUX_FDT = "/${ROCKCHIP_KERNEL_DTB_NAME}" + +# only used by UBOOT_EXTLINUX_CONSOLE +RK_CONSOLE_BAUD ?= "${@d.getVar('SERIAL_CONSOLES').split(';')[0]}" +RK_CONSOLE_DEVICE ?= "${@d.getVar('SERIAL_CONSOLES').split(';')[1].split()[0]}" + +UBOOT_EXTLINUX_CONSOLE ?= "console=${RK_CONSOLE_DEVICE},${RK_CONSOLE_BAUD} console=tty1" + +# Install the files for boot partition +# Note: the ROCKCHIP_KERNEL_DTB_NAME must be the same as fdt in extlinux.conf +IMAGE_BOOT_FILES = " \ + ${KERNEL_IMAGETYPE} \ + ${ROCKCHIP_KERNEL_DTB_NAME} \ + " diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/rpi4-initramfs.conf b/bsp/meta-openeuler-bsp/conf/machine/include/rpi4-initramfs.conf new file mode 100644 index 0000000000000000000000000000000000000000..8d5fb54e8791a56390c05fac0481b4cad82d9272 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/rpi4-initramfs.conf @@ -0,0 +1,5 @@ +# enable ttyS0 for initramfs +SERIAL_CONSOLES = "115200;ttyS0" + +INITRAMFS_IMAGE = "openeuler-image-mcs" +INITRAMFS_IMAGE_BUNDLE = "0" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/rzg2-common.inc b/bsp/meta-openeuler-bsp/conf/machine/include/rzg2-common.inc new file mode 100644 index 0000000000000000000000000000000000000000..6004bfa06c5de1c4e31d9a81fc3d3247a3b3e1f9 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/rzg2-common.inc @@ -0,0 +1,30 @@ +EXT_GFX_BACKEND = "${@oe.utils.ifelse((d.getVar('USE_RENESAS_GLES') == '1'), '1', '0')}" +# 32BIT package install (default is disable) +# This variables can be used only in multilib. +USE_32BIT_PKGS ?= "0" +USE_32BIT_WAYLAND ?= "0" +USE_32BIT_MMP ?= "0" + +MACHINE_FEATURES = "" + +KERNEL_IMAGETYPE = "Image" +IMAGE_FSTYPES:append = " tar.bz2 ext4" + +SERIAL_CONSOLES = "115200;ttySC0" + +# Configuration for ARM Trusted Firmware +EXTRA_IMAGEDEPENDS += " tf-a-myir" + +# Add variable to Build Configuration in build log +BUILDCFG_VARS:append = " SOC_FAMILY" + +# We must disable ptest when can not use GPLv3 License, +# ptest require many package, which have GPLv3 License, +DISTRO_FEATURES:remove = "${@bb.utils.contains("INCOMPATIBLE_LICENSE", "GPLv3", "ptest", "",d)}" + +# Match version between native and target sysroot in meta-gplv2 when not using GPLv3. +PREFERRED_VERSION_gdbm-native ?= "${@bb.utils.contains("INCOMPATIBLE_LICENSE", "GPLv3", "1.8.3", "",d)}" + +# u-boot +PREFERRED_VERSION_u-boot = "v2021.10%" +EXTRA_IMAGEDEPENDS += " u-boot-myir" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/rzg2l-common.inc b/bsp/meta-openeuler-bsp/conf/machine/include/rzg2l-common.inc new file mode 100644 index 0000000000000000000000000000000000000000..5a0a0f2c7bf43c88279313cf93726db6385c6cfa --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/rzg2l-common.inc @@ -0,0 +1,9 @@ +require conf/machine/include/${SOC_FAMILY}.inc +require rzg2-common.inc + +# Firmware-pack +EXTRA_IMAGEDEPENDS += " firmware-pack" + +MACHINEOVERRIDES =. "rzg2l:" + +BBMASK:append = " recipes-rzg2h|recipes-rzv2l" diff --git a/bsp/meta-openeuler-bsp/conf/machine/myd-ym62x-k3r5.conf b/bsp/meta-openeuler-bsp/conf/machine/myd-ym62x-k3r5.conf new file mode 100644 index 0000000000000000000000000000000000000000..d75f8923dd2f93a624396b2e6066977d7f900d1f --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/myd-ym62x-k3r5.conf @@ -0,0 +1,8 @@ +require conf/machine/include/k3r5.inc +require conf/machine/include/ti-extras.inc + +SYSFW_SOC = "am62x" +SYSFW_CONFIG = "evm" +SYSFW_SUFFIX = "gp" +SYSFW_PREFIX= "fs" +UBOOT_MACHINE = "myc_am62x_r5_defconfig" diff --git a/bsp/meta-openeuler-bsp/conf/machine/myd-ym62x.conf b/bsp/meta-openeuler-bsp/conf/machine/myd-ym62x.conf new file mode 100644 index 0000000000000000000000000000000000000000..467c75f57119f3cbb3c40f27ede92d4ba1ff7a22 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/myd-ym62x.conf @@ -0,0 +1,13 @@ +require conf/machine/include/myd-am62x.inc +require conf/machine/include/ti-extras.inc + +KERNEL_DEVICETREE_PREFIX = "myir/myd-y62x" + +KERNEL_DEVICETREE = " \ + myir/myd-y62x-6254.dtb \ +" + +UBOOT_MACHINE = "myc_am62x_a53_defconfig" + +# we need tiboot3.bin for wic image for r5 +do_image_wic[mcdepends] += "mc::k3r5:virtual/bootloader:do_deploy" diff --git a/bsp/meta-openeuler-bsp/conf/machine/myir-remi.conf b/bsp/meta-openeuler-bsp/conf/machine/myir-remi.conf new file mode 100644 index 0000000000000000000000000000000000000000..a60d777dc4e93778c4e109fc749b2ddb2019e08c --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/myir-remi.conf @@ -0,0 +1,37 @@ +#@TYPE: Machine +#@NAME: myir-yg2lx machine +#@DESCRIPTION: RZ/G2L myir platform + +SOC_FAMILY = "r9a07g044l" +require conf/machine/include/rzg2l-common.inc + +DEFAULTTUNE ?= "cortexa55" + +TUNE_CONF ?= "conf/machine/include/arm/armv8-2a/tune-cortexa55.inc" +require ${TUNE_CONF} + +PREFERRED_PROVIDER_virtual/kernel="linux-myir" +COMPATIBLE_MACHINE:myir-remi = "myir-remi" +# DISTRO_FEATURES:append = " qt5" +# DISTRO_FEATURES:append = " virtualization" + +# MACHINE_EXTRA_RRECOMMENDS = "kernel-modules" + +UBOOT_CONFIG ??= "mys-rzg2l" +#2G DDR +#UBOOT_CONFIG[myc-rzg2l] = "myc-rzg2l_defconfig" + +#1G DDR +UBOOT_CONFIG[mys-rzg2l] = "mys-rzg2l_defconfig" + +# flash writer +EXTRA_IMAGEDEPENDS += " flash-writer" + +# Support board with PMIC. Default:yes. +# With this option enabled, build both bin files for PMIC board and Concrete board. +PMIC_SUPPORT ?= "1" + +KERNEL_DEVICETREE = " \ + myir/mys-rzg2l-wifi.dtb \ + myir/mys-rzg2l-sdcard.dtb \ +" diff --git a/bsp/meta-openeuler-bsp/conf/machine/ok-a40i.conf b/bsp/meta-openeuler-bsp/conf/machine/ok-a40i.conf new file mode 100644 index 0000000000000000000000000000000000000000..16ce12b46689c2a00cdc7a6713edf3bb792b6428 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/ok-a40i.conf @@ -0,0 +1,27 @@ +require conf/machine/include/sun8i.inc + +MACHINEOVERRIDES =. "march32le:" +DEFAULTTUNE = "armv7a" + +UBOOT_LOCALVERSION = "" + +TUNE_CCARGS .= " -mlittle-endian" +export ROOTFS_PACKAGE_ARCH = "armv7l" + +KERNEL_DEVICETREE = "oka40i.dtb" + +PREFERRED_PROVIDER_virtual/bootloader = "u-boot" +UBOOT_MACHINE = "Bananapi_M2_Ultra_defconfig" + +export LOADADDR = "0x40008000" +export KERNEL_SRC = "${STAGING_KERNEL_DIR}" +export LICHEE_BSP_DIR = "${STAGING_KERNEL_DIR}/bsp" +export BSP_TOP = "${STAGING_KERNEL_DIR}/bsp/" +export LICHEE_OUT_DIR = "${B}" +export LICHEE_IC = "a40i_h" +export LICHEE_KERN_DIR = "${STAGING_KERNEL_DIR}" +export LICHEE_PLATFORM = "linux" +export LICHEE_MOD_DIR = "${B}" + +HOSTTOOLS_NONFATAL += " pod2text pod2html dos2unix" +ASSUME_PROVIDED += " dos2unix-native " \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/conf/machine/ok3399.conf b/bsp/meta-openeuler-bsp/conf/machine/ok3399.conf new file mode 100644 index 0000000000000000000000000000000000000000..ce95cdc23146c15ad23a8a4248e8a451a24cd84c --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/ok3399.conf @@ -0,0 +1,5 @@ +require conf/machine/include/openeuler-rockchip-rk3399pro-evb.conf + +KBUILD_DEFCONFIG = "OK3399-C-linux_defconfig" +ROCKCHIP_KERNEL_DTB_NAME = "OK3399-C-linux.dtb" +SERIAL_CONSOLES = "115200;ttyS2" diff --git a/bsp/meta-openeuler-bsp/conf/machine/ok3568.conf b/bsp/meta-openeuler-bsp/conf/machine/ok3568.conf new file mode 100644 index 0000000000000000000000000000000000000000..9f7a0e3d860fb835db03f11480f47ef5e6963f02 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/ok3568.conf @@ -0,0 +1,16 @@ +require conf/machine/include/openeuler-rockchip-rk3568-evb.conf + +ROCKCHIP_KERNEL_DTB_NAME = "OK3568-C-linux.dtb" + +# auto load module during startup +KBUILD_DEFCONFIG = "OK3568-C-linux_defconfig" + +INSTALLMODULES += " \ +kernel-module-mlan \ +kernel-module-moal \ +" + +KERNEL_MODULE_AUTOLOAD = " kernel-module-mlan kernel-module-moal " +SERIAL_CONSOLES = "115200;ttyFIQ0" + +NIC_MODEL_FIRMWARE = "aw-cm358-firmware" diff --git a/bsp/meta-openeuler-bsp/conf/machine/ok3588.conf b/bsp/meta-openeuler-bsp/conf/machine/ok3588.conf new file mode 100644 index 0000000000000000000000000000000000000000..5cc0dbbeedb341f92d02d4a7e186d8d58b4917b2 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/ok3588.conf @@ -0,0 +1,5 @@ +require conf/machine/include/openeuler-rockchip-rk3588-evb.conf + +KBUILD_DEFCONFIG = "" +ROCKCHIP_KERNEL_DTB_NAME = "OK3588-C-linux.dtb" +SERIAL_CONSOLES = "115200;ttyFIQ0" diff --git a/bsp/meta-openeuler-bsp/conf/machine/orangepi4-lts.conf b/bsp/meta-openeuler-bsp/conf/machine/orangepi4-lts.conf new file mode 100644 index 0000000000000000000000000000000000000000..3667f0ec7bbd69f36a9fff310b729386e6ed6717 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/orangepi4-lts.conf @@ -0,0 +1,21 @@ +require conf/machine/include/rk3399.inc +require conf/machine/include/rockchip-default-providers.inc +require conf/machine/include/rockchip-wic.inc + +# Specify the U-Boot configuration +UBOOT_MACHINE = "rk3399_defconfig" + +# use defconfig from kernel source +OPENEULER_KERNEL_CONFIG:orangepi4-lts = "" +KBUILD_DEFCONFIG = "OK3399-C-linux_defconfig" +ROCKCHIP_KERNEL_DTB_NAME = "rk3399-orangepi-4-lts.dtb" + +KERNEL_IMAGETYPE = "Image" +KERNEL_DEVICETREE = "rockchip/${ROCKCHIP_KERNEL_DTB_NAME}" + +# serial console setting +SERIAL_CONSOLES = "1500000;ttyS2" + +UBOOT_EXTLINUX_ROOT ?= "root=/dev/mmcblk0p2 rootfstype=ext4 " + +UBOOT_EXTLINUX_KERNEL_ARGS:prepend = "earlycon=uart8250,mmio32,0xff1a0000 " diff --git a/bsp/meta-openeuler-bsp/conf/machine/orangepi5.conf b/bsp/meta-openeuler-bsp/conf/machine/orangepi5.conf new file mode 100644 index 0000000000000000000000000000000000000000..f356831c4a47fa7933c5eae5bc6dfbceae5aa54d --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/orangepi5.conf @@ -0,0 +1,16 @@ +require conf/machine/include/rk3588.inc +require conf/machine/include/rockchip-default-providers.inc +require conf/machine/include/rockchip-wic.inc + +# Specify the U-Boot configuration +UBOOT_MACHINE = "rk3588_defconfig" + +# Specify the linux kernel configuration and device tree +KBUILD_DEFCONFIG = "" +ROCKCHIP_KERNEL_DTB_NAME = "rk3588s-orangepi-5.dtb" +KERNEL_DEVICETREE = "rockchip/${ROCKCHIP_KERNEL_DTB_NAME}" + +# serial console setting +SERIAL_CONSOLES = "1500000;ttyFIQ0" + +UBOOT_EXTLINUX_ROOT ?= "root=/dev/mmcblk1p2 rootfstype=ext4 " diff --git a/bsp/meta-openeuler-bsp/conf/machine/roc-rk3588s-pc.conf b/bsp/meta-openeuler-bsp/conf/machine/roc-rk3588s-pc.conf new file mode 100644 index 0000000000000000000000000000000000000000..6ccec3e48614cfec81df7874cad537cd4b8c5cd5 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/roc-rk3588s-pc.conf @@ -0,0 +1,6 @@ +require conf/machine/include/openeuler-rockchip-rk3588-evb.conf + +# 将KBUILD_DEFCONFIG设置为空,使用OPENEULER_KERNEL_CONFIG变量设置config +KBUILD_DEFCONFIG = "" +ROCKCHIP_KERNEL_DTB_NAME = "roc-rk3588s-pc.dtb" +SERIAL_CONSOLES = "115200;ttyFIQ0" \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/conf/machine/ryd-3568.conf b/bsp/meta-openeuler-bsp/conf/machine/ryd-3568.conf new file mode 100644 index 0000000000000000000000000000000000000000..154588eef8bf023225067968d5be29a0ef7cd1bd --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/ryd-3568.conf @@ -0,0 +1,3 @@ +require conf/machine/include/openeuler-rockchip-rk3568-evb.conf + +ROCKCHIP_KERNEL_DTB_NAME = "rk3568-8897-ddr4-v1-linux-hdmi.dtb" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-bootfiles.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-bootfiles.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..aa83d1721da0371090997745f64cee8a3e8d71a6 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-bootfiles.bbappend @@ -0,0 +1,22 @@ +OPENEULER_REPO_NAME = "raspberrypi-firmware" +PV = "1.20240306" +SRC_URI = "file://firmware-${PV}.tar.gz \ +" + +S = "${WORKDIR}/firmware-${PV}/boot" + +# add uefi grub package +# rpi-tf-a package don't support clang compile +# and only the mcs feature depends on uefi and grub. +do_deploy[depends] += "${@bb.utils.contains('DISTRO_FEATURES', 'mcs', 'grub-efi:do_deploy grub-bootconf:do_deploy rpi-uefi:do_deploy', '', d)}" + +# fix runtime error: Could not find DRM device! +# instead of bcm2711-rpi-4-b.dtb from kernel_devicetree +do_deploy:append() { + cp ${S}/bcm2711-rpi-4-b.dtb ${DEPLOYDIR}/${BOOTFILES_DIR_NAME} +} + +inherit ${@bb.utils.contains('MCS_FEATURES', 'lopper-devicetree', 'lopper-devicetree', '', d)} + +INPUT_DT = "${S}/bcm2711-rpi-4-b.dtb" +OUTPUT_DT = "${S}/bcm2711-rpi-4-b.dtb" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-cmdline.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-cmdline.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..ced34343fc0786bfbc156365bc3eee91f4d46920 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-cmdline.bbappend @@ -0,0 +1,7 @@ +# the kernel mounts readonly rootfs by default +# the rootfs will be remounted to rw rootfs through /etc/inittab when using busybox-init start +# add rw to CMALINE when using systemd start as a workaround +CMDLINE += "rw" + +# do init_resize.sh to expand file system to use all the space on the card at first boot +CMDLINE += "${@oe.utils.conditional("AUTO-EXPAND-FS", "1", "init=/usr/lib/init_resize.sh", "", d)}" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-config/config.txt b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-config/config.txt new file mode 100644 index 0000000000000000000000000000000000000000..291107d67e45da200b92319397d4d4bdb60f15cb --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-config/config.txt @@ -0,0 +1,67 @@ +# For more options and information see +# http://rpf.io/configtxt +# Some settings may impact device functionality. See link above for details + +# uncomment if you get no picture on HDMI for a default "safe" mode +#hdmi_safe=1 + +# uncomment this if your display has a black border of unused pixels visible +# and your display can output without overscan +#disable_overscan=1 + +# uncomment the following to adjust overscan. Use positive numbers if console +# goes off screen, and negative if there is too much border +#overscan_left=16 +#overscan_right=16 +#overscan_top=16 +#overscan_bottom=16 + +# uncomment to force a console size. By default it will be display's size minus +# overscan. +#framebuffer_width=1280 +#framebuffer_height=720 + +# uncomment if hdmi display is not detected and composite is being output +#hdmi_force_hotplug=1 + +# uncomment to force a specific HDMI mode (this will force VGA) +#hdmi_group=1 +#hdmi_mode=1 + +# uncomment to force a HDMI mode rather than DVI. This can make audio work in +# DMT (computer monitor) modes +#hdmi_drive=2 + +# uncomment to increase signal to HDMI, if you have interference, blanking, or +# no display +#config_hdmi_boost=4 + +# uncomment for composite PAL +#sdtv_mode=2 + +#uncomment to overclock the arm. 700 MHz is the default. +#arm_freq=800 + +# Uncomment some or all of these to enable the optional hardware interfaces +#dtparam=i2c_arm=on +#dtparam=i2s=on +#dtparam=spi=on + +# Uncomment this to enable infrared communication. +#dtoverlay=gpio-ir,gpio_pin=17 +#dtoverlay=gpio-ir-tx,gpio_pin=18 + +# Additional overlays and parameters are documented /boot/overlays/README + +# Enable audio (loads snd_bcm2835) +dtparam=audio=on + +[pi4] +# Enable DRM VC4 V3D driver on top of the dispmanx display stack +#dtoverlay=vc4-fkms-v3d +#dtoverlay=disable-bt +#max_framebuffers=2 + +[all] + +enable_uart=1 diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-config_git.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-config_git.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..d7979e89f9ad349d17f83e776b463648ba93559b --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/bootfiles/rpi-config_git.bbappend @@ -0,0 +1,29 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" + +SRC_URI = "file://config.txt \ +" +S = "${WORKDIR}" + +do_deploy:append() { + # change configs to use uefi and load mcs dtoverlay if enable mcs DISTRO_FEATURES + if ${@bb.utils.contains('DISTRO_FEATURES', 'mcs', 'true', 'false', d)}; then + echo "arm_64bit=1" >> ${CONFIG} + echo "uart_2ndstage=1" >> ${CONFIG} + echo "enable_gic=1" >> ${CONFIG} + echo "armstub=RPI_EFI.fd" >> ${CONFIG} + echo "disable_commandline_tags=1" >> ${CONFIG} + echo "disable_overscan=1" >> ${CONFIG} + echo "device_tree_address=0x1f0000" >> ${CONFIG} + echo "device_tree_end=0x200000" >> ${CONFIG} + + # if openamp as MCS_FEATURES, add mcs-resources to config.txt + if ${@bb.utils.contains('MCS_FEATURES', 'openamp', 'true', 'false', d)}; then + echo "dtoverlay=mcs-resources" >> ${CONFIG} + fi + + # if jailhouse as MCS_FEATURES, add jailhouse-overlay to config.txt + if ${@bb.utils.contains('MCS_FEATURES', 'jailhouse', 'true', 'false', d)}; then + echo "dtoverlay=jailhouse-overlay" >> ${CONFIG} + fi + fi +} diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/grub/grub-bootconf_%.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/grub/grub-bootconf_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..e390a43963729bfebd38fec25e19287db7daa61e --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/grub/grub-bootconf_%.bbappend @@ -0,0 +1,30 @@ +GRUB_SERIAL := "" +GRUB_TIMEOUT := "0" +GRUB_OPTS := "" +# add rw to fix https://gitee.com/openeuler/yocto-meta-openeuler/issues/I5ZES2 +APPEND = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 bcm2708_fb.fbwidth=1920 bcm2708_fb.fbheight=1080 bcm2708_fb.fbswap=1 vc_mem.mem_base=0x3ec00000 vc_mem.mem_size=0x40000000 dwc_otg.lpm_enable=0 rw console=tty1 console=ttyS0,115200 console=ttyAMA0,115200" +# do init_resize.sh to expand file system to use all the space on the card at first boot +APPEND += "${@oe.utils.conditional("AUTO-EXPAND-FS", "1", "init=/usr/lib/init_resize.sh", "", d)}" +GRUB_ROOT := "root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" + +#set maxcpus=3, reserve cpu3 for clientos +APPEND += "${@bb.utils.contains("MCS_FEATURES", "openamp", "maxcpus=3", "", d)}" + +# To boot an image with guest os, we use the initramfs image as the Monitor VM. +require ${@bb.utils.contains('BUILD_GUEST_OS', '1', 'initrd.inc', '', d)} + +inherit deploy + +do_deploy() { + install -d ${DEPLOYDIR}/EFI/BOOT + GRUBCFG=${DEPLOYDIR}/EFI/BOOT/grub.cfg + cp ${S}/grub-bootconf $GRUBCFG + + # change grub.cfg to use Image.gz to launch the kernel if enable mcs DISTRO_FEATURES + if ${@bb.utils.contains('DISTRO_FEATURES', 'mcs', 'true', 'false', d)}; then + sed -i 's/linux \/Image /linux \/Image.gz /' $GRUBCFG + fi +} + +addtask deploy after do_install before do_build +do_deploy[dirs] += "${DEPLOYDIR}/EFI/BOOT" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/grub/grub-efi_%.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/grub/grub-efi_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..4f7cd05afddba51ca59458e51e1868d0a9a4409e --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/grub/grub-efi_%.bbappend @@ -0,0 +1,11 @@ +EFI_PROVIDER = "grub-efi" + +# we need more buildin grub +GRUB_BUILDIN = "acpi all_video archelp bfs bitmap bitmap_scale blocklist boot bufio cat cbfs chain cmp configfile cpio crc64 crypto cryptodisk date datehook datetime disk diskfilter div dm_nv echo efi_gop efinet elf eval exfat ext2 extcmd fat fdt file font fshelp geli gettext gfxmenu gfxterm gfxterm_background gfxterm_menu gptsync gzio halt hashsum hello help hexdump http iso9660 jfs jpeg keystatus ldm linux loadenv loopback ls lsacpi lsefi lsefimmap lsefisystab lsmmap lssal luks lvm lzopio macbless macho memdisk memrw minicmd minix minix2 minix3 mmap mpi msdospart net newc normal ntfs ntfscomp odc offsetio part_acorn part_amiga part_apple part_bsd part_dfly part_dvh part_gpt part_msdos part_plan part_sun part_sunpc parttool png priority_queue probe procfs progress raid5rec raid6rec read reboot regexp reiserfs romfs scsi search search_fs_file search_fs_uuid search_label serial setjmp sfs sleep squash4 tar terminal terminfo tftp tga time tr trig true udf ufs1 ufs1_be ufs2 video video_colors video_fb videoinfo xen_boot xfs xnu_uuid xzio zfs zfscrypt zfsinfo" + +do_deploy:append () { + install -d ${DEPLOYDIR}/EFI/BOOT + install -m 644 ${D}${EFI_FILES_PATH}/${GRUB_IMAGE} ${DEPLOYDIR}/EFI/BOOT +} + +do_deploy[dirs] += "${DEPLOYDIR}/EFI/BOOT" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/grub/initrd.inc b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/grub/initrd.inc new file mode 100644 index 0000000000000000000000000000000000000000..6a3f6fb05a3d7b31e2c2fa6e92142dd275636b69 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/grub/initrd.inc @@ -0,0 +1,13 @@ +# To boot an image with guest os, we use the initramfs image as the Monitor VM. +# So, we need to configure GRUB_ROOT and INITRD +INITRD = "1" +GRUB_ROOT = "root=/dev/ram0 rootfstype=ext4 rootwait" + +# And, we use a tiny DTB when enable BUILD_GUEST_OS, the sd card +# is not assigned to the MVM. So, we should not use init_resize.sh +APPEND:remove = "init=/usr/lib/init_resize.sh" + +# Only 750M RAM is allowed for MVM, the rest can be given to GVM. +# This is related to jailhouse's cell. Of course we can configure a +# specific memory range for GVM via dtoverlay, but it may not be necessary. +APPEND:prepend = "mem=750M " diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/jailhouse-overlay/files/bcm2711-rpi-4-b-jailhouse.dts b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/jailhouse-overlay/files/bcm2711-rpi-4-b-jailhouse.dts new file mode 100644 index 0000000000000000000000000000000000000000..ecfac9c6f4a5337356878772df73805f05b9c412 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/jailhouse-overlay/files/bcm2711-rpi-4-b-jailhouse.dts @@ -0,0 +1,399 @@ +/dts-v1/; + +/memreserve/ 0x0000000000000000 0x0000000000001000; +/ { + compatible = "raspberrypi,4-model-b\0brcm,bcm2711"; + model = "Raspberry Pi 4 Model B"; + #address-cells = <0x02>; + #size-cells = <0x01>; + interrupt-parent = <0x01>; + + aliases { + serial0 = "/soc/serial@7e215040"; + ethernet0 = "/scb/ethernet@7d580000"; + soc = "/soc"; + gpio = "/soc/gpio@7e200000"; + uart1 = "/soc/serial@7e215040"; + }; + + chosen { + bootargs = [00]; + phandle = <0x3e>; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x01>; + ranges; + phandle = <0x45>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges = <0x7e000000 0x00 0xfe000000 0x1800000 0x7c000000 0x00 0xfc000000 0x2000000 0x40000000 0x00 0xff800000 0x800000>; + dma-ranges = <0xc0000000 0x00 0x00 0x40000000>; + phandle = <0x4a>; + + timer@7e003000 { + compatible = "brcm,bcm2835-system-timer"; + reg = <0x7e003000 0x1000>; + interrupts = <0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>; + clock-frequency = <0xf4240>; + status = "disabled"; + phandle = <0x4b>; + }; + + cprman@7e101000 { + compatible = "brcm,bcm2711-cprman"; + #clock-cells = <0x01>; + reg = <0x7e101000 0x2000>; + clocks = <&clk_osc>, + <&dsi0 0>, <&dsi0 1>, <&dsi0 2>, + <&dsi1 0>, <&dsi1 1>, <&dsi1 2>; + phandle = <0x08>; + }; + + dsi0: dsi@7e209000 { + compatible = "brcm,bcm2835-dsi0"; + reg = <0x7e209000 0x78>; + interrupts = <0x00 0x64 0x04>; + #address-cells = <0x01>; + #size-cells = <0x00>; + #clock-cells = <0x01>; + clocks = <0x08 0x20 0x08 0x2f 0x08 0x31>; + clock-names = "phy\0escape\0pixel"; + clock-output-names = "dsi0_byte\0dsi0_ddr2\0dsi0_ddr"; + status = "disabled"; + power-domains = <0x13 0x11>; + lopper-label-0 = "dsi7e209000"; + phandle = <0x04>; + }; + + dsi1: dsi@7e700000 { + compatible = "brcm,bcm2711-dsi1"; + reg = <0x7e700000 0x8c>; + interrupts = <0x00 0x6c 0x04>; + #address-cells = <0x01>; + #size-cells = <0x00>; + #clock-cells = <0x01>; + clocks = <0x08 0x23 0x08 0x30 0x08 0x32>; + clock-names = "phy\0escape\0pixel"; + clock-output-names = "dsi1_byte\0dsi1_ddr2\0dsi1_ddr"; + status = "disabled"; + power-domains = <0x13 0x12>; + phandle = <0x05>; + }; + + gpio@7e200000 { + compatible = "brcm,bcm2711-gpio"; + reg = <0x7e200000 0xb4>; + interrupts = <0x00 0x71 0x04 0x00 0x72 0x04>; + gpio-controller; + #gpio-cells = <0x02>; + interrupt-controller; + #interrupt-cells = <0x02>; + gpio-ranges = <0x07 0x00 0x00 0x3a>; + pinctrl-names = "default"; + gpio-line-names = "ID_SDA\0ID_SCL\0SDA1\0SCL1\0GPIO_GCLK\0GPIO5\0GPIO6\0SPI_CE1_N\0SPI_CE0_N\0SPI_MISO\0SPI_MOSI\0SPI_SCLK\0GPIO12\0GPIO13\0TXD1\0RXD1\0GPIO16\0GPIO17\0GPIO18\0GPIO19\0GPIO20\0GPIO21\0GPIO22\0GPIO23\0GPIO24\0GPIO25\0GPIO26\0GPIO27\0RGMII_MDIO\0RGMIO_MDC\0CTS0\0RTS0\0TXD0\0RXD0\0SD1_CLK\0SD1_CMD\0SD1_DATA0\0SD1_DATA1\0SD1_DATA2\0SD1_DATA3\0PWM0_MISO\0PWM1_MOSI\0STATUS_LED_G_CLK\0SPIFLASH_CE_N\0SDA0\0SCL0\0RGMII_RXCLK\0RGMII_RXCTL\0RGMII_RXD0\0RGMII_RXD1\0RGMII_RXD2\0RGMII_RXD3\0RGMII_TXCLK\0RGMII_TXCTL\0RGMII_TXD0\0RGMII_TXD1\0RGMII_TXD2\0RGMII_TXD3"; + phandle = <0x07>; + + uart1_gpio14 { + brcm,pins = <0x0e 0x0f>; + brcm,function = <0x02>; + phandle = <0x67>; + }; + + uart1_ctsrts_gpio16 { + brcm,pins = <0x10 0x11>; + brcm,function = <0x02>; + phandle = <0x68>; + }; + + uart1_gpio32 { + brcm,pins = <0x20 0x21>; + brcm,function = <0x02>; + phandle = <0x69>; + }; + + uart1_ctsrts_gpio30 { + brcm,pins = <0x1e 0x1f>; + brcm,function = <0x02>; + phandle = <0x6a>; + }; + + uart1_gpio40 { + brcm,pins = <0x28 0x29>; + brcm,function = <0x02>; + phandle = <0x6b>; + }; + + uart1_ctsrts_gpio42 { + brcm,pins = <0x2a 0x2b>; + brcm,function = <0x02>; + phandle = <0x6c>; + }; + + uart1_pins { + brcm,pins; + brcm,function; + brcm,pull; + phandle = <0x15>; + }; + }; + + aux@7e215000 { + compatible = "brcm,bcm2835-aux"; + #clock-cells = <0x01>; + reg = <0x7e215000 0x08>; + clocks = <0x08 0x14>; + phandle = <0x14>; + }; + + serial@7e215040 { + compatible = "brcm,bcm2835-aux-uart"; + reg = <0x7e215040 0x40>; + interrupts = <0x00 0x5d 0x04>; + clocks = <0x14 0x00>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <0x15>; + skip-init; + phandle = <0x32>; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + status = "disabled"; + }; + }; + + interrupt-controller@40041000 { + interrupt-controller; + #interrupt-cells = <0x03>; + compatible = "arm,gic-400"; + reg = <0x40041000 0x1000 0x40042000 0x2000 0x40044000 0x2000 0x40046000 0x2000>; + interrupts = <0x01 0x09 0xf04>; + phandle = <0x01>; + }; + + clock@7ef00000 { + compatible = "brcm,brcm2711-dvp"; + reg = <0x7ef00000 0x10>; + clocks = <0x1d>; + #clock-cells = <0x01>; + #reset-cells = <0x01>; + status = "disabled"; + phandle = <0x1e>; + }; + + interrupt-controller@7ef00100 { + compatible = "brcm,bcm2711-l2-intc\0brcm,l2-intc"; + reg = <0x7ef00100 0x30>; + interrupts = <0x00 0x60 0x01>; + interrupt-controller; + #interrupt-cells = <0x01>; + status = "disabled"; + phandle = <0x20>; + }; + }; + + scb { + compatible = "simple-bus"; + #address-cells = <0x02>; + #size-cells = <0x01>; + ranges = <0x00 0x7c000000 0x00 0xfc000000 0x3800000 0x06 0x00 0x06 0x00 0x40000000>; + + ethernet@7d580000 { + compatible = "brcm,bcm2711-genet-v5"; + reg = <0x00 0x7d580000 0x10000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + interrupts = <0x00 0x9d 0x04 0x00 0x9e 0x04>; + phy-handle = <0x02>; + phy-mode = "rgmii-rxid"; + status = "okay"; + + mdio@e14 { + compatible = "brcm,genet-mdio-v5"; + reg = <0xe14 0x08>; + reg-names = "mdio"; + #address-cells = <0x01>; + #size-cells = <0x00>; + + ethernet-phy@1 { + reg = <0x01>; + led-modes = <0x00 0x08>; + phandle = <0x02>; + }; + }; + }; + }; + + clocks { + clk_osc: clk-osc { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-output-names = "osc"; + clock-frequency = <0x337f980>; + phandle = <0x03>; + }; + + clk_usb: clk-usb { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-output-names = "otg"; + clock-frequency = <0x1c9c3800>; + phandle = <0x19>; + }; + }; + + clk-27M { + #clock-cells = <0x00>; + compatible = "fixed-clock"; + clock-frequency = <0x19bfcc0>; + clock-output-names = "27MHz-clock"; + phandle = <0x1f>; + }; + + clk-108M { + #clock-cells = <0x00>; + compatible = "fixed-clock"; + clock-frequency = <0x66ff300>; + clock-output-names = "108MHz-clock"; + phandle = <0x1d>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>; + arm,cpu-registers-not-fw-configured; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + enable-method = "brcm,bcm2836-smp"; + phandle = <0xde>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x00>; + enable-method = "spin-table"; + cpu-release-addr = <0x00 0xd8>; + d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x100>; + i-cache-size = <0xc000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x100>; + next-level-cache = <0x2c>; + phandle = <0x28>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x01>; + enable-method = "spin-table"; + cpu-release-addr = <0x00 0xe0>; + d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x100>; + i-cache-size = <0xc000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x100>; + next-level-cache = <0x2c>; + phandle = <0x29>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x02>; + enable-method = "spin-table"; + cpu-release-addr = <0x00 0xe8>; + d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x100>; + i-cache-size = <0xc000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x100>; + next-level-cache = <0x2c>; + phandle = <0x2a>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x03>; + enable-method = "spin-table"; + cpu-release-addr = <0x00 0xf0>; + d-cache-size = <0x8000>; + d-cache-line-size = <0x40>; + d-cache-sets = <0x100>; + i-cache-size = <0xc000>; + i-cache-line-size = <0x40>; + i-cache-sets = <0x100>; + next-level-cache = <0x2c>; + phandle = <0x2b>; + }; + + l2-cache0 { + compatible = "cache"; + cache-size = <0x100000>; + cache-line-size = <0x40>; + cache-sets = <0x400>; + cache-level = <0x02>; + phandle = <0x2c>; + }; + }; + + __overrides__ { + uart1 = [00 00 02 73 74 61 74 75 73 00]; + eth_led0 = "\0\0\0/led-modes:0"; + eth_led1 = "\0\0\0/led-modes:4"; + }; + + __symbols__ { + chosen = "/chosen"; + rmem = "/reserved-memory"; + cma = "/reserved-memory/linux,cma"; + cpu_thermal = "/thermal-zones/cpu-thermal"; + soc = "/soc"; + system_timer = "/soc/timer@7e003000"; + clocks = "/soc/cprman@7e101000"; + gpio = "/soc/gpio@7e200000"; + uart1_gpio14 = "/soc/gpio@7e200000/uart1_gpio14"; + uart1_ctsrts_gpio16 = "/soc/gpio@7e200000/uart1_ctsrts_gpio16"; + uart1_gpio32 = "/soc/gpio@7e200000/uart1_gpio32"; + uart1_ctsrts_gpio30 = "/soc/gpio@7e200000/uart1_ctsrts_gpio30"; + uart1_gpio40 = "/soc/gpio@7e200000/uart1_gpio40"; + uart1_ctsrts_gpio42 = "/soc/gpio@7e200000/uart1_ctsrts_gpio42"; + gpclk0_gpio49 = "/soc/gpio@7e200000/gpclk0_gpio49"; + gpclk1_gpio50 = "/soc/gpio@7e200000/gpclk1_gpio50"; + gpclk2_gpio51 = "/soc/gpio@7e200000/gpclk2_gpio51"; + uart1_pins = "/soc/gpio@7e200000/uart1_pins"; + uart1 = "/soc/serial@7e215040"; + minibt = "/soc/serial@7e215040/bluetooth"; + dvp = "/soc/clock@7ef00000"; + aon_intr = "/soc/interrupt-controller@7ef00100"; + dsi0 = "/soc/dsi@7e209000"; + dsi1 = "/soc/dsi@7e700000"; + clk_osc = "/clocks/clk-osc"; + clk_usb = "/clocks/clk-usb"; + clk_27MHz = "/clk-27M"; + clk_108MHz = "/clk-108M"; + cpus = "/cpus"; + cpu0 = "/cpus/cpu@0"; + cpu1 = "/cpus/cpu@1"; + cpu2 = "/cpus/cpu@2"; + cpu3 = "/cpus/cpu@3"; + l2 = "/cpus/l2-cache0"; + scb = "/scb"; + genet = "/scb/ethernet@7d580000"; + genet_mdio = "/scb/ethernet@7d580000/mdio@e14"; + phy1 = "/scb/ethernet@7d580000/mdio@e14/ethernet-phy@1"; + }; +}; diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/jailhouse-overlay/files/jailhouse-overlay.dts b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/jailhouse-overlay/files/jailhouse-overlay.dts new file mode 100644 index 0000000000000000000000000000000000000000..68bf7a299a3a5ae370fb25ed17e63bc0bb6bb4e8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/jailhouse-overlay/files/jailhouse-overlay.dts @@ -0,0 +1,41 @@ +/dts-v1/; +/plugin/; +/ { + compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; + __overlay__ { + reserved-memory { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + jailhouse@10000000 { + reg = <0 0x10000000 0x10000000>; + no-map; + }; + + /* + * 0x6fff e000 - 0x700f f000 for uio-ivshmem + * 0x700f f000 - 0x8000 0000 for non-root + */ + uio-ivshmem@6fffe000 { + reg = <0 0x6fffe000 0x101000>; + no-map; + }; + non-root@700ff000 { + reg = <0 0x700ff000 0xff01000>; + no-map; + }; + }; + }; + }; + + fragment@1 { + target-path = "/scb/pcie@7d500000"; + __overlay__ { + linux,pci-domain = <0x00000000>; + }; + }; +}; diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/jailhouse-overlay/jailhouse-overlay.bb b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/jailhouse-overlay/jailhouse-overlay.bb new file mode 100644 index 0000000000000000000000000000000000000000..e7810a52cc9c70915a283b8cf9296f057e369454 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/jailhouse-overlay/jailhouse-overlay.bb @@ -0,0 +1,31 @@ +inherit deploy + +DEPENDS += "dtc-native" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +RPI_DTS = "bcm2711-rpi-4-b-jailhouse" + +SRC_URI += " \ + file://${BPN}.dts \ + file://${RPI_DTS}.dts \ + " + +do_compile() { + # generate dtbo + dtc -I dts -O dtb ${WORKDIR}/${BPN}.dts -o ${WORKDIR}/${BPN}.dtbo + + # In order to assign more devices to non-root linux, we need to enable + # the tiny dtb(uart1 and ethernet) for root linux. + dtc -I dts -O dtb ${WORKDIR}/${RPI_DTS}.dts -o ${WORKDIR}/${RPI_DTS}.dtb +} + +do_deploy() { + rm -f ${DEPLOYDIR}/${BPN}.dtbo ${DEPLOYDIR}/${RPI_DTS}.dtb + + install -m 0644 ${WORKDIR}/${BPN}.dtbo ${WORKDIR}/${RPI_DTS}.dtb ${DEPLOYDIR}/ +} + +addtask do_deploy after do_compile before do_install +do_deploy[dirs] += "${DEPLOYDIR}" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/0001-RPI3-RPI4-revert-rpi3_pwr_down_wfi.patch b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/0001-RPI3-RPI4-revert-rpi3_pwr_down_wfi.patch new file mode 100644 index 0000000000000000000000000000000000000000..fc380db45915936a5ec6ca9b2c1a4353403b5696 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/0001-RPI3-RPI4-revert-rpi3_pwr_down_wfi.patch @@ -0,0 +1,59 @@ +From ae9d9d059de737a97923f3caf383129f537aec42 Mon Sep 17 00:00:00 2001 +From: hanzongcheng +Date: Thu, 2 Mar 2023 16:36:15 +0800 +Subject: [PATCH] RPI3/RPI4: revert rpi3_pwr_down_wfi() + +* rpi3_pwr_down_wfi() cannot be used to power off the cores after + testing, use rpi3_pwr_domain_pwr_down_wfi as an implementation of + pwr_domain_pwr_down_wfi. + +Signed-off-by: hanzongcheng + +diff --git a/plat/rpi/common/rpi3_pm.c b/plat/rpi/common/rpi3_pm.c +index 86c61f7..8327026 100644 +--- a/plat/rpi/common/rpi3_pm.c ++++ b/plat/rpi/common/rpi3_pm.c +@@ -174,32 +174,6 @@ static void rpi3_pwr_domain_on_finish(const psci_power_state_t *target_state) + #endif + } + +-static void __dead2 rpi3_pwr_down_wfi( +- const psci_power_state_t *target_state) +-{ +- uintptr_t hold_base = PLAT_RPI3_TM_HOLD_BASE; +- unsigned int pos = plat_my_core_pos(); +- +- if (pos == 0) { +- /* +- * The secondaries will always be in a wait +- * for warm boot on reset, but the BSP needs +- * to be able to distinguish between waiting +- * for warm boot (e.g. after psci_off, waiting +- * for psci_on) and a cold boot. +- */ +- mmio_write_64(hold_base, PLAT_RPI3_TM_HOLD_STATE_BSP_OFF); +- /* No cache maintenance here, we run with caches off already. */ +- dsb(); +- isb(); +- } +- +- write_rmr_el3(RMR_EL3_RR_BIT | RMR_EL3_AA64_BIT); +- +- while (1) +- ; +-} +- + /******************************************************************************* + * Platform handlers for system reset and system off. + ******************************************************************************/ +@@ -265,7 +239,6 @@ static const plat_psci_ops_t plat_rpi3_psci_pm_ops = { + .pwr_domain_pwr_down_wfi = rpi3_pwr_domain_pwr_down_wfi, + .pwr_domain_on = rpi3_pwr_domain_on, + .pwr_domain_on_finish = rpi3_pwr_domain_on_finish, +- .pwr_domain_pwr_down_wfi = rpi3_pwr_down_wfi, + .system_off = rpi3_system_off, + .system_reset = rpi3_system_reset, + .validate_power_state = rpi3_validate_power_state, +-- +2.34.1 + diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/COPYING.linux b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/COPYING.linux new file mode 100644 index 0000000000000000000000000000000000000000..ca442d313d86dc67e0a2e5d584b465bd382cbf5c --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/COPYING.linux @@ -0,0 +1,356 @@ + + NOTE! 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If this is what you want to do, use the GNU Library General +Public License instead of this License. diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/LICENCE.broadcom b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/LICENCE.broadcom new file mode 100644 index 0000000000000000000000000000000000000000..d5793b5ffd637a0f19f991d461d9d032e2fc163a --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/LICENCE.broadcom @@ -0,0 +1,31 @@ +Copyright (c) 2006, Broadcom Corporation. +Copyright (c) 2015, Raspberry Pi (Trading) Ltd +All rights reserved. + +Redistribution. Redistribution and use in binary form, without +modification, are permitted provided that the following conditions are +met: + +* This software may only be used for the purposes of developing for, + running or using a Raspberry Pi device, or authorised derivative + device manufactured via the element14 Raspberry Pi Customization Service +* Redistributions must reproduce the above copyright notice and the + following disclaimer in the documentation and/or other materials + provided with the distribution. +* Neither the name of Broadcom Corporation nor the names of its suppliers + may be used to endorse or promote products derived from this software + without specific prior written permission. + +DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, +BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 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Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +Subject to the terms and conditions of this license, each copyright holder +and contributor hereby grants to those receiving rights under this license +a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable +(except for failure to satisfy the conditions of this license) patent +license to make, have made, use, offer to sell, sell, import, and otherwise +transfer this software, where such license applies only to those patent +claims, already acquired or hereafter acquired, licensable by such copyright +holder or contributor that are necessarily infringed by: + +(a) their Contribution(s) (the licensed copyrights of copyright holders and + non-copyrightable additions of contributors, in source or binary form) + alone; or + +(b) combination of their Contribution(s) with the work of authorship to + which such Contribution(s) was added by such copyright holder or + contributor, if, at the time the Contribution is added, such addition + causes such combination to be necessarily infringed. The patent license + shall not apply to any other combinations which include the + Contribution. + +Except as expressly stated above, no rights or licenses from any copyright +holder or contributor is granted under this license, whether expressly, by +implication, estoppel or otherwise. + +DISCLAIMER + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +POSSIBILITY OF SUCH DAMAGE. diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/RPi4_UEFI_Firmware_v1.33.zip b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/RPi4_UEFI_Firmware_v1.33.zip new file mode 100644 index 0000000000000000000000000000000000000000..33d962f7eb629292dffc2b8678341fb40736d1bf Binary files /dev/null and b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/RPi4_UEFI_Firmware_v1.33.zip differ diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/checksum b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/checksum new file mode 100644 index 0000000000000000000000000000000000000000..dcc097855203a6c2d5fc771f5ea93b08c0941aa2 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/files/checksum @@ -0,0 +1,7 @@ +md5sum: 45b696dc35ca2b6cdfcea7d97834d967 +source: https://github.com/pftf/RPi4/releases/download/v1.33/RPi4_UEFI_Firmware_v1.33.zip +license: +The firmware (RPI_EFI.fd) is licensed under the current EDK2 license, which is BSD-2-Clause-Patent. +The other files from the zip archives are licensed under the terms described in the Raspberry Pi boot files README. +The binary blobs in the firmware/ directory are licensed under the Cypress wireless driver license that is found there. +more information see: https://github.com/pftf/RPi4/ diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/rpi-tf-a.bb b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/rpi-tf-a.bb new file mode 100644 index 0000000000000000000000000000000000000000..8b9c1bc29df153f7ff507071cff4402730ecaaa3 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/rpi-tf-a.bb @@ -0,0 +1,34 @@ +SUMMARY = "ARM Trusted Firmware for Raspberry Pi 4" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +BPN = "arm-trusted-firmware" +PV = "2.6" + +OPENEULER_LOCAL_NAME = "oee_archive" + +SRC_URI = "file://${OPENEULER_LOCAL_NAME}/${BPN}/${BP}.tar.gz \ + file://0001-RPI3-RPI4-revert-rpi3_pwr_down_wfi.patch \ + " + +SRC_URI[md5sum] = "2622f7077e30436b2310bea0232c7cec" +SRC_URI[sha256sum] = "3905a6d6affa84fb629d1565a4e4bdc82812bba49a457b8249ab445eeb28011b" + +# overide LDFLAGS to allow rpi4 TF-A to build without: "aarch64-openeuler-linux-gnu-ld.bfd: unrecognized option '-Wl,-O1'" +# add "--no-warn-rwx-segments" to fix: "bl2.elf has a LOAD segment with RWX permissions" +export LDFLAGS="--no-warn-rwx-segments" + +EXTRA_OEMAKE="CROSS_COMPILE=${TARGET_PREFIX} " + +CFLAGS += "-Wno-error=array-bounds" + +do_compile:append() { + oe_runmake PLAT=rpi4 RPI3_PRELOADED_DTB_BASE=0x1F0000 PRELOADED_BL33_BASE=0x20000 SUPPORT_VFP=1 SMC_PCI_SUPPORT=1 DEBUG=0 all +} + +do_install:append() { + install -d ${D}${datadir} + install ${B}/build/rpi4/release/bl31.bin ${D}${datadir} +} + +FILES:${PN} += "${datadir}/bl31.bin" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/rpi-uefi.bb b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/rpi-uefi.bb new file mode 100644 index 0000000000000000000000000000000000000000..488f074f758fade05395988ac43664de5e3eb67d --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-bsp/uefi/rpi-uefi.bb @@ -0,0 +1,30 @@ +SUMMARY = "EDK2 Raspberry Pi 4 UEFI firmware" +# RPI_EFI.fd is BSD-2-Clause, licence is described in files/LICENCE.edk2 +# licence of start*.elf, fixup*.dat are described in files/LICENCE.broadcom +# firmware files see LICENCE.txt + +# we just need RPI_EFI.fd so here we present BSD-2-Clause here +LICENSE = "BSD-2-Clause" +LIC_FILES_CHKSUM = "file://${THISDIR}/files/LICENCE.edk2;md5=2b415520383f7964e96700ae12b4570a" + + +SRC_URI = "file://RPi4_UEFI_Firmware_v1.33.zip \ + " + +SRC_URI[sha256sum] = "1de14df6caaeb61fd15065eee23fb1bae864a1ea15eba8ee066a94073660f8be" + +inherit deploy nopackages + +DEPENDS += "rpi-tf-a" + +do_deploy() { + # Use the bl31.bin we compiled to make a RPI_EFI.fd + # bl31.bin is placed into the first 128KB of RPI_EFI.fd, filled up with 0xFF + tr '\000' '\377' < /dev/zero | dd conv=notrunc bs=1K seek=0 count=128 of=${WORKDIR}/RPI_EFI.fd + dd if=${WORKDIR}/recipe-sysroot/${datadir}/bl31.bin of=${WORKDIR}/RPI_EFI.fd conv=notrunc + + install -m 0644 ${WORKDIR}/RPI_EFI.fd ${DEPLOYDIR} +} + +addtask deploy before do_build after do_install +do_deploy[dirs] += "${DEPLOYDIR}" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-connectivity/pi-bluetooth/pi-bluetooth_%.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-connectivity/pi-bluetooth/pi-bluetooth_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..ae1f12adcb7db9a5e2ba51f212618e05308bfbed --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-connectivity/pi-bluetooth/pi-bluetooth_%.bbappend @@ -0,0 +1,15 @@ +# apply openeuler source package +OPENEULER_REPO_NAME = "raspberrypi-bluetooth" + +PV = "87248a382d1a81b80a62730975135d87fffd7ef1" + +SRC_URI = "\ + file://${BP}.tar.gz \ +" + +S = "${WORKDIR}/${BP}" + +do_install:append() { + # we do not use udev package, so pass /dev/ttyAMA0 directly. + sed -i "s/\/dev\/serial1/\/dev\/ttyAMA0/g" ${D}${bindir}/btuart +} diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/auto-expand-fs/auto-expand-fs.bb b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/auto-expand-fs/auto-expand-fs.bb new file mode 100644 index 0000000000000000000000000000000000000000..c7d82b2c16ac6ba419cabdca67ff542f4f5c4d86 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/auto-expand-fs/auto-expand-fs.bb @@ -0,0 +1,39 @@ +SUMMARY = "Automatic file system expansion" +DESCRIPTION = "Expand file system to use all the space on the card at first boot" +SECTION = "base" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +RDEPENDS:${PN} = "parted util-linux-findmnt e2fsprogs-resize2fs" + +# As the recipe doesn't inherit systemd.bbclass, we need to set this variable +# manually to avoid unnecessary postinst/preinst generated. +python __anonymous() { + if not bb.utils.contains('DISTRO_FEATURES', 'sysvinit', True, False, d): + d.setVar("INHIBIT_UPDATERCD_BBCLASS", "1") +} + +inherit update-rc.d + +# init_resize.sh: perform the partition resize +# resize2fs_once: resize file system at first boot +# reference: https://github.com/RPi-Distro/raspi-config/blob/master/usr/lib/raspi-config/init_resize.sh +SRC_URI = "file://init_resize.sh \ + file://resize2fs_once \ + " + +INITSCRIPT_NAME = "resize2fs_once" +INITSCRIPT_PARAMS = "defaults" + +S = "${WORKDIR}" + +FILES:${PN} = "/usr/lib/init_resize.sh ${sysconfdir}/init.d/resize2fs_once" + +do_install () { + install -d ${D}${sysconfdir}/init.d/ + install -d ${D}/usr/lib/ + install -m 0755 ${WORKDIR}/resize2fs_once ${D}${sysconfdir}/init.d/ + install -m 0755 ${WORKDIR}/init_resize.sh ${D}/usr/lib/ +} + +ALLOW_EMPTY:${PN} = "1" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/auto-expand-fs/files/init_resize.sh b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/auto-expand-fs/files/init_resize.sh new file mode 100644 index 0000000000000000000000000000000000000000..1a9ab693ec405ef8b82d9b64715b8faa6825083a --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/auto-expand-fs/files/init_resize.sh @@ -0,0 +1,209 @@ +#!/bin/sh + +reboot_pi () { + umount /boot + mount / -o remount,rw + rm -r /boot + mount / -o remount,ro + sync + if [ "$NOOBS" = "1" ]; then + if [ "$NEW_KERNEL" = "1" ]; then + reboot -f "$BOOT_PART_NUM" + sleep 5 + else + echo "$BOOT_PART_NUM" > "/sys/module/${BCM_MODULE}/parameters/reboot_part" + fi + fi + reboot -f + sleep 5 + exit 0 +} + +check_commands () { + for COMMAND in grep cut sed parted fdisk findmnt; do + if ! command -v $COMMAND > /dev/null; then + FAIL_REASON="$COMMAND not found" + return 1 + fi + done + return 0 +} + +check_noobs () { + if [ "$BOOT_PART_NUM" = "1" ]; then + NOOBS=0 + else + NOOBS=1 + fi +} + +get_variables () { + ROOT_PART_DEV=$(findmnt / -o source -n) + ROOT_PART_NAME=$(echo "$ROOT_PART_DEV" | cut -d "/" -f 3) + ROOT_DEV_NAME=$(echo /sys/block/*/"${ROOT_PART_NAME}" | cut -d "/" -f 4) + ROOT_DEV="/dev/${ROOT_DEV_NAME}" + ROOT_PART_NUM=$(cat "/sys/block/${ROOT_DEV_NAME}/${ROOT_PART_NAME}/partition") + + BOOT_PART_DEV=$(findmnt /boot -o source -n) + BOOT_PART_NAME=$(echo "$BOOT_PART_DEV" | cut -d "/" -f 3) + BOOT_DEV_NAME=$(echo /sys/block/*/"${BOOT_PART_NAME}" | cut -d "/" -f 4) + BOOT_PART_NUM=$(cat "/sys/block/${BOOT_DEV_NAME}/${BOOT_PART_NAME}/partition") + + OLD_DISKID=$(fdisk -l "$ROOT_DEV" | sed -n 's/Disk identifier: 0x\([^ ]*\)/\1/p') + + check_noobs + + ROOT_DEV_SIZE=$(cat "/sys/block/${ROOT_DEV_NAME}/size") + TARGET_END=$((ROOT_DEV_SIZE - 1)) + + PARTITION_TABLE=$(parted -m "$ROOT_DEV" unit s print | tr -d 's') + + LAST_PART_NUM=$(echo "$PARTITION_TABLE" | tail -n 1 | cut -d ":" -f 1) + + ROOT_PART_LINE=$(echo "$PARTITION_TABLE" | grep -e "^${ROOT_PART_NUM}:") + ROOT_PART_START=$(echo "$ROOT_PART_LINE" | cut -d ":" -f 2) + ROOT_PART_END=$(echo "$ROOT_PART_LINE" | cut -d ":" -f 3) + + if [ "$NOOBS" = "1" ]; then + EXT_PART_LINE=$(echo "$PARTITION_TABLE" | grep ":::;" | head -n 1) + EXT_PART_NUM=$(echo "$EXT_PART_LINE" | cut -d ":" -f 1) + EXT_PART_START=$(echo "$EXT_PART_LINE" | cut -d ":" -f 2) + EXT_PART_END=$(echo "$EXT_PART_LINE" | cut -d ":" -f 3) + fi +} + +fix_partuuid() { + mount -o remount,rw "$ROOT_PART_DEV" + mount -o remount,rw "$BOOT_PART_DEV" + DISKID="$(tr -dc 'a-f0-9' < /dev/hwrng | dd bs=1 count=8 2>/dev/null)" + fdisk "$ROOT_DEV" > /dev/null < /dev/kmsg + sleep 5 +else + echo "Could not expand filesystem: ${FAIL_REASON}" > /dev/kmsg + sleep 5 +fi + +reboot_pi diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/auto-expand-fs/files/resize2fs_once b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/auto-expand-fs/files/resize2fs_once new file mode 100644 index 0000000000000000000000000000000000000000..0e6ef95339a35b7e42a9ec689ddf996964a8d25a --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/auto-expand-fs/files/resize2fs_once @@ -0,0 +1,15 @@ +#! /bin/sh + +case "$1" in + start) + echo "Starting resize2fs_once." + ROOT_DEV=$(findmnt / -o source -n) && + resize2fs $ROOT_DEV && + rm /etc/init.d/resize2fs_once && + echo "done" + ;; + *) + echo "Usage: $0 start" >&2 + exit 1 + ;; +esac diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/base-files/base-files_%.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/base-files/base-files_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..f254a2c3a71f881d8fe0ef9602baa40e37762563 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/base-files/base-files_%.bbappend @@ -0,0 +1,18 @@ +# Since we have added glibc-locale support, +# which is en_US.utf8, some software will search the +# system path and use it as default locale. +# However, using this locale will have a worse performance +# than using the default POSIX locale (also known as ASCII), +# so by default we use POSIX locale. +# ****** +# USERS MAY CHANGE THIS ENVIRONMENT VARIABLE TO +# ADAPT TO YOUR OWN APPLICATIONS, AS THIS VARIABLE +# IS IN THE HIGHEST PRIORITY AND WILL INFLUENCE +# THOSE APPLICATIONS WHICH USE "LANG" AS THE +# ENVIRONMENT VARIABLE TO DETERMINE WHICH +# LOCALE TO USE. +# ****** +do_install:append () { + echo "export LC_ALL=C" >> ${D}${sysconfdir}/profile +} + diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/initrd-install.inc b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/initrd-install.inc new file mode 100644 index 0000000000000000000000000000000000000000..4ecf4b454c333d72c9f4dcbc38c2ef0dc6cc4843 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/initrd-install.inc @@ -0,0 +1,3 @@ +# install initrd into boot.img +DEPLOYPAYLOAD = "${INITRAMFS_IMAGE}-${MACHINE}.${INITRAMFS_FSTYPES}:initrd" +RPI_SDIMG_EXTRA_DEPENDS:append = "${INITRAMFS_IMAGE}:do_image_complete" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/mcs.inc b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/mcs.inc new file mode 100644 index 0000000000000000000000000000000000000000..cbd448c5d6bd86d0c8984b442820ce3a8eb76371 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/mcs.inc @@ -0,0 +1,44 @@ +SDIMG_KERNELIMAGE = "Image" + +# we need more space for boot: see definition in sdcard_image-rpi.bbclass +BOOT_SPACE = "196608" + +RDEPENDS += " \ +${@bb.utils.contains('MCS_FEATURES', 'jailhouse', 'jailhouse-overlay', '', d)} \ +" + +# Notice: we need our sdcard_image-rpi.bbclass in meta-openeuler-bsp to work. +uefi_configuration() { + # we use Image.gz for grub.cfg here + if [ ! -z "${INITRAMFS_IMAGE}" -a "${INITRAMFS_IMAGE_BUNDLE}" = "1" ]; then + gzip -c "${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${INITRAMFS_LINK_NAME}.bin" > "${DEPLOY_DIR_IMAGE}/Image.gz" + else + gzip -c "${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}" > "${DEPLOY_DIR_IMAGE}/Image.gz" + fi + + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/Image.gz ::Image.gz || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/Image.gz into boot.img" + # here we want uefi to boot + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/RPI_EFI.fd ::RPI_EFI.fd || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/RPI_EFI.fd into boot.img" + # here we use efi and grub to boot + mmd -i ${WORKDIR}/boot.img EFI + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/EFI/* ::EFI/ || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/EFI/* into boot.img" + + # Install mcs overlays via uefi hook + install_mcs_overlays +} + +install_mcs_overlays() { + # here we want reserved resources for mcs features + if ${@bb.utils.contains('MCS_FEATURES', 'openamp', 'true', 'false', d)}; then + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/mcs-resources.dtbo ::overlays/mcs-resources.dtbo || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/mcs-resources.dtbo into boot.img" + fi + + # add jailhouse-overlay + if ${@bb.utils.contains('MCS_FEATURES', 'jailhouse', 'true', 'false', d)}; then + mcopy -v -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/jailhouse-overlay.dtbo ::overlays/jailhouse-overlay.dtbo || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/jailhouse-overlay.dtbo into boot.img" + # overwrite dtb to assign more devices to non-root linux + if [ "${@bb.utils.contains('BUILD_GUEST_OS', '1', 'yes', 'no', d)}" = "yes" ]; then + mcopy -v -D o -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/bcm2711-rpi-4-b-jailhouse.dtb ::bcm2711-rpi-4-b.dtb || bbfatal "mcopy cannot copy ${DEPLOY_DIR_IMAGE}/bcm2711-rpi-4-b-jailhouse.dtb into boot.img" + fi + fi +} diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/openeuler-image-mcs.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/openeuler-image-mcs.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..9ab57557d54da5f3040cb472abd600982380af28 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/openeuler-image-mcs.bbappend @@ -0,0 +1,9 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" +# fix mkfs.ext4 running error, add -E no_copy_xattrs to mkfs.ext4 +WKS_FILE = "sdimage-rpi.wks" +WKS_FILE_DEPENDS = "" + +require mcs.inc + +# openeuler-image-mcs as the INITRAMFS_IMAGE, set IMAGE_FSTYPES to INITRAMFS_FSTYPES to avoid dependency loops. +IMAGE_FSTYPES = "${@bb.utils.contains('BUILD_GUEST_OS', '1', '${INITRAMFS_FSTYPES}', 'rpi-sdimg', d)}" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/openeuler-image-tiny.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/openeuler-image-tiny.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..e22a65dd8266d40438ac2ec59184da23b2676995 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/openeuler-image-tiny.bbappend @@ -0,0 +1,7 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" +#fix mkfs.ext4 running error, add -E no_copy_xattrs to mkfs.ext4 +WKS_FILE = "sdimage-rpi.wks" +WKS_FILE_DEPENDS = "" + +require ${@bb.utils.contains('DISTRO_FEATURES', 'mcs', 'mcs.inc', '', d)} +require ${@bb.utils.contains('BUILD_GUEST_OS', '1', 'initrd-install.inc', '', d)} diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/openeuler-image.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/openeuler-image.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..e22a65dd8266d40438ac2ec59184da23b2676995 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/openeuler-image.bbappend @@ -0,0 +1,7 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" +#fix mkfs.ext4 running error, add -E no_copy_xattrs to mkfs.ext4 +WKS_FILE = "sdimage-rpi.wks" +WKS_FILE_DEPENDS = "" + +require ${@bb.utils.contains('DISTRO_FEATURES', 'mcs', 'mcs.inc', '', d)} +require ${@bb.utils.contains('BUILD_GUEST_OS', '1', 'initrd-install.inc', '', d)} diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/raspberrypi4-64.inc b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/raspberrypi4-64.inc new file mode 100644 index 0000000000000000000000000000000000000000..6168e3217289a45385225b1185a17508181d5ae6 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/raspberrypi4-64.inc @@ -0,0 +1,2 @@ +#image configuration for aarch64 +require rpi.inc diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/rpi.inc b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/rpi.inc new file mode 100644 index 0000000000000000000000000000000000000000..10ea2ecd6a07701e1cf04cc68262dd65bdb4ae22 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/images/rpi.inc @@ -0,0 +1,19 @@ +#IMAGE_FEATURES += "splash" +IMAGE_FSTYPES = "rpi-sdimg" +SDIMG_ROOTFS_TYPE = "ext4" +EXTRA_IMAGECMD_ext4 += "-E no_copy_xattrs" + +# add /init symlink to rootfs, refer to IMAGE_CMD_cpio +IMAGE_PREPROCESS_COMMAND += "add_init_to_rootfs;" + +add_init_to_rootfs() { + if [ "${IMAGE_BUILDING_DEBUGFS}" != "true" ]; then + if [ ! -L ${IMAGE_ROOTFS}/init ] && [ ! -e ${IMAGE_ROOTFS}/init ]; then + if [ -L ${IMAGE_ROOTFS}/sbin/init ] || [ -e ${IMAGE_ROOTFS}/sbin/init ]; then + ln -sf /sbin/init ${IMAGE_ROOTFS}/init + else + touch ${IMAGE_ROOTFS}/init + fi + fi + fi +} diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/packagegroups/packagegroup-base.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/packagegroups/packagegroup-base.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..f4d02c9d5d7c56adbbcb67092e66d8343087b79d --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/packagegroups/packagegroup-base.bbappend @@ -0,0 +1,10 @@ +# wireless-regdb-static is regulatory.db* (need for cfg80211 database) +RDEPENDS:packagegroup-base:append = " \ +e2fsprogs-resize2fs \ +linux-firmware-rpidistro-compat-bcm43xx \ +wireless-regdb-static \ +wpa-supplicant \ +bluez5 \ +${@bb.utils.contains('DISTRO_FEATURES', 'kernel6', 'kernel-module-brcmfmac-wcc' ,'', d)} \ +" + diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/packagegroups/packagegroup-core-boot.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/packagegroups/packagegroup-core-boot.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..742381ace94b9b4ab5300a23a63f0cfdf8de94e1 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/packagegroups/packagegroup-core-boot.bbappend @@ -0,0 +1,7 @@ +RDEPENDS:${PN} += " \ + ${@oe.utils.conditional("AUTO-EXPAND-FS", "1", "auto-expand-fs", "", d)} \ +" + +RDEPENDS:${PN}:remove = " \ + kernel-vmlinux \ +" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/packagegroups/packagegroup-dsoftbus.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/packagegroups/packagegroup-dsoftbus.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..08095e6362f9070b526aea1f990b2d56b5f5a56c --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/packagegroups/packagegroup-dsoftbus.bbappend @@ -0,0 +1,4 @@ +# The binder module is already built-in in the Raspberry Pi kernel +RDEPENDS:packagegroup-dsoftbus:remove = " \ +${@bb.utils.contains('DISTRO_FEATURES', 'kernel6', '' ,'binder', d)} \ +" \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/udev/files/99-com.rules b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/udev/files/99-com.rules new file mode 100644 index 0000000000000000000000000000000000000000..25e4cf6773cc9e2f74ede45075822ff67b586ae4 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/udev/files/99-com.rules @@ -0,0 +1,41 @@ +SUBSYSTEM=="input", GROUP="input", MODE="0660" +SUBSYSTEM=="i2c-dev", GROUP="i2c", MODE="0660" +SUBSYSTEM=="spidev", GROUP="spi", MODE="0660" +SUBSYSTEM=="bcm2835-gpiomem", GROUP="gpio", MODE="0660" +SUBSYSTEM=="rpivid-*", GROUP="video", MODE="0660" + +KERNEL=="vcsm-cma", GROUP="video", MODE="0660" +SUBSYSTEM=="dma_heap", GROUP="video", MODE="0660" + +SUBSYSTEM=="gpio", GROUP="gpio", MODE="0660" +SUBSYSTEM=="gpio", KERNEL=="gpiochip*", ACTION=="add", PROGRAM="/bin/sh -c 'chgrp -R gpio /sys/class/gpio && chmod -R g=u /sys/class/gpio'" +SUBSYSTEM=="gpio", ACTION=="add", PROGRAM="/bin/sh -c 'chgrp -R gpio /sys%p && chmod -R g=u /sys%p'" + +# PWM export results in a "change" action on the pwmchip device (not "add" of a new device), so match actions other than "remove". +SUBSYSTEM=="pwm", ACTION!="remove", PROGRAM="/bin/sh -c 'chgrp -R gpio /sys%p && chmod -R g=u /sys%p'" + +KERNEL=="ttyAMA[0-9]*|ttyS[0-9]*", PROGRAM="/bin/sh -c '\ + ALIASES=/proc/device-tree/aliases; \ + TTYNODE=$$(readlink /sys/class/tty/%k/device/of_node | sed 's/base/:/' | cut -d: -f2); \ + if [ -e $$ALIASES/bluetooth ] && [ $$TTYNODE/bluetooth = $$(strings $$ALIASES/bluetooth) ]; then \ + echo 1; \ + elif [ -e $$ALIASES/console ]; then \ + if [ $$TTYNODE = $$(strings $$ALIASES/console) ]; then \ + echo 0;\ + else \ + exit 1; \ + fi \ + elif [ $$TTYNODE = $$(strings $$ALIASES/serial0) ]; then \ + echo 0; \ + elif [ $$TTYNODE = $$(strings $$ALIASES/serial1) ]; then \ + echo 1; \ + else \ + exit 1; \ + fi \ +'", SYMLINK+="serial%c" + +ACTION=="add", SUBSYSTEM=="vtconsole", KERNEL=="vtcon1", RUN+="/bin/sh -c '\ + if echo RPi-Sense FB | cmp -s /sys/class/graphics/fb0/name; then \ + echo 0 > /sys$devpath/bind; \ + fi; \ +'" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/udev/udev-rules-rpi.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/udev/udev-rules-rpi.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..4aab0633ba31fc01da7afc5fe2ef5ef8bfcd342b --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-core/udev/udev-rules-rpi.bbappend @@ -0,0 +1,15 @@ + +SRC_URI:remove = "git://github.com/RPi-Distro/raspberrypi-sys-mods;protocol=https;branch=master \ +" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files/:" + +SRC_URI:append = " \ + file://99-com.rules \ +" + +do_install () { + install -d ${D}${sysconfdir}/udev/rules.d + install -m 0644 ${WORKDIR}/99-com.rules ${D}${sysconfdir}/udev/rules.d/ + install -m 0644 ${WORKDIR}/can.rules ${D}${sysconfdir}/udev/rules.d/ +} \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/bluez-firmware-rpidistro/bluez-firmware-rpidistro_%.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/bluez-firmware-rpidistro/bluez-firmware-rpidistro_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..4b8eca90d82f3a0eb77a96eeab09813fb5c96b23 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/bluez-firmware-rpidistro/bluez-firmware-rpidistro_%.bbappend @@ -0,0 +1,26 @@ +# apply openeuler source package +OPENEULER_REPO_NAME = "raspberrypi-firmware" + +PV = "20240419" + +SRC_URI = "file://raspberrypi-firmware-${PV}.tar.gz \ +" + +S = "${WORKDIR}/raspberrypi-firmware-${PV}" + +LIC_FILES_CHKSUM = "\ + file://LICENCE.cypress-rpidistro;md5=eb723b61539feef013de476e68b5c50a \ +" + +# copy license +do_extract_lic() { + cp ${S}/License/LICENCE.bluez-firmware ${S}/LICENCE.cypress-rpidistro +} + +# openeuler source package directory tree is difference +do_install() { + install -d ${D}${nonarch_base_libdir}/firmware/brcm + + cp LICENCE.cypress-rpidistro ${D}${nonarch_base_libdir}/firmware + install -m 0644 BCM434*.hcd ${D}${nonarch_base_libdir}/firmware/brcm/ +} diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux-firmware-rpidistro/linux-firmware-rpidistro-compat.bb b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux-firmware-rpidistro/linux-firmware-rpidistro-compat.bb new file mode 100644 index 0000000000000000000000000000000000000000..fd3c52ed6c73ffaaf9670dcc6f0d2ecfb9e7bf47 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux-firmware-rpidistro/linux-firmware-rpidistro-compat.bb @@ -0,0 +1,79 @@ +SUMMARY = "Linux kernel firmware files from Raspbian distribution" +DESCRIPTION = "Updated firmware files for RaspberryPi hardware. \ +RPi-Distro obtains these directly from Cypress; they are not submitted \ +to linux-firmware for general use." +HOMEPAGE = "https://github.com/RPi-Distro/firmware-nonfree" +SECTION = "kernel" + +# In maintained upstream linux-firmware: +# * brcmfmac43430-sdio falls under LICENSE.cypress +# * brcmfmac43455-sdio falls under LICENSE.broadcom_bcm43xx +# * brcmfmac43456-sdio falls under LICENSE.broadcom_bcm43xx +# +# It is likely[^1] that both of these should be under LICENSE.cypress. +# Further, at this time the text of LICENSE.broadcom_bcm43xx is the same +# in linux-firmware and RPi-Distro/firmware-nonfree, but this may +# change. +# +# Rather than make assumptions about what's supposed to be what, we'll +# use the license implied by the source of these files, named to avoid +# conflicts with linux-firmware. +# +# [^1]: https://github.com/RPi-Distro/bluez-firmware/issues/1 +LICENSE = "\ + Firmware-broadcom_bcm43xx-rpidistro \ +" + +# apply openeuler source package +OPENEULER_REPO_NAME = "raspberrypi-firmware" + +inherit allarch + +PV = "20240419" + +# openeuler source package directory tree is difference +LIC_FILES_CHKSUM = "\ + file://License/LICENCE.broadcom_bcm43xx;md5=3160c14df7228891b868060e1951dfbc \ +" + +# These are not common licenses, set NO_GENERIC_LICENSE for them +# so that the license files will be copied from fetched source +NO_GENERIC_LICENSE[Firmware-broadcom_bcm43xx-rpidistro] = "License/LICENCE.broadcom_bcm43xx" + +SRC_URI = "file://raspberrypi-firmware-${PV}.tar.gz \ +" + +S = "${WORKDIR}/raspberrypi-firmware-${PV}" + + +CLEANBROKEN = "1" + +do_compile() { + : +} +do_configure[noexec] = "1" +do_compile[noexec] = "1" + +do_install() { + install -d ${D}${nonarch_base_libdir}/firmware/brcm + + cp License/LICENCE.broadcom_bcm43xx ${D}${nonarch_base_libdir}/firmware/LICENSE.broadcom_bcm43xx-rpidistro + + cp -R --no-dereference --preserve=mode,links -v brcm/* ${D}${nonarch_base_libdir}/firmware/brcm/ +} + +PACKAGES = "\ + ${PN}-broadcom-license \ + ${PN}-bcm43xx \ +" + +LICENSE:${PN}-bcm43xx = "Firmware-broadcom_bcm43xx-rpidistro" +LICENSE:${PN}-broadcom-license = "Firmware-broadcom_bcm43xx-rpidistro" + +FILES:${PN}-broadcom-license = "${nonarch_base_libdir}/firmware/LICENSE.broadcom_bcm43xx-rpidistro" +FILES:${PN}-bcm43xx = "${nonarch_base_libdir}/firmware/brcm/*" +RDEPENDS:${PN}-bcm43xx += "${PN}-broadcom-license" + +# Firmware files are generally not run on the CPU, so they can be +# allarch despite being architecture specific +INSANE_SKIP = "arch" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux-firmware-rpidistro/linux-firmware-rpidistro_%.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux-firmware-rpidistro/linux-firmware-rpidistro_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..0781a1e22f416b302dd6db53d11a7508f08683b1 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux-firmware-rpidistro/linux-firmware-rpidistro_%.bbappend @@ -0,0 +1,35 @@ +# apply openeuler source package +OPENEULER_REPO_NAME = "raspberrypi-firmware" + +PV = "20240419" + +# openeuler source package directory tree is difference +LIC_FILES_CHKSUM = "\ + file://License/LICENCE.broadcom_bcm43xx;md5=3160c14df7228891b868060e1951dfbc \ +" + +NO_GENERIC_LICENSE[Firmware-broadcom_bcm43xx-rpidistro] = "License/LICENCE.broadcom_bcm43xx" + +SRC_URI = "file://raspberrypi-firmware-${PV}.tar.gz \ +" + +S = "${WORKDIR}/raspberrypi-firmware-${PV}" + + +do_configure[noexec] = "1" +do_compile[noexec] = "1" + +do_install() { + install -d ${D}${nonarch_base_libdir}/firmware/brcm + + cp License/LICENCE.broadcom_bcm43xx ${D}${nonarch_base_libdir}/firmware/LICENSE.broadcom_bcm43xx-rpidistro + + for fw in \ + brcmfmac43430-sdio \ + brcmfmac43436-sdio \ + brcmfmac43436s-sdio \ + brcmfmac43455-sdio \ + brcmfmac43456-sdio; do + cp -R --no-dereference --preserve=mode,links -v brcm/${fw}.* ${D}${nonarch_base_libdir}/firmware/brcm/ + done +} diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/files/enable_cpu_hotplug.patch b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/files/enable_cpu_hotplug.patch new file mode 100644 index 0000000000000000000000000000000000000000..bbaa0c202c9714b78a49b0c036b78dd248f3a059 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/files/enable_cpu_hotplug.patch @@ -0,0 +1,9 @@ +diff --git a/arch/arm64/configs/bcm2711_defconfig b/arch/arm64/configs/bcm2711_defconfig +index 75333e69e..51a4e77be 100644 +--- a/arch/arm64/configs/bcm2711_defconfig ++++ b/arch/arm64/configs/bcm2711_defconfig +@@ -1564,3 +1564,4 @@ CONFIG_IRQSOFF_TRACER=y + CONFIG_SCHED_TRACER=y + CONFIG_BLK_DEV_IO_TRACE=y + # CONFIG_UPROBE_EVENTS is not set ++CONFIG_HOTPLUG_CPU=y diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/files/rpi4b.cfg b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/files/rpi4b.cfg new file mode 100644 index 0000000000000000000000000000000000000000..facd95cbb72359700f5452f01074b7368f7d9fce --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/files/rpi4b.cfg @@ -0,0 +1,14 @@ +# +# kernel configs required for raspberrypi 4B in openEuler +# +CONFIG_ACPI=y + +# enable DRM for wayland +CONFIG_DRM=y +CONFIG_DRM_VC4=y +CONFIG_DRM_V3D=y +CONFIG_SND=y +CONFIG_SND_SOC=y + +# fix NULL pointer dereference for brcmfmac +CONFIG_INIT_STACK_NONE=y diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/linux-openeuler-rpi.inc b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/linux-openeuler-rpi.inc new file mode 100644 index 0000000000000000000000000000000000000000..c6bb783bb6b05cac05da26fa365b38a107edf8b4 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/linux-openeuler-rpi.inc @@ -0,0 +1,35 @@ +# apply RPI kernel patch +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +# export symbol for jailhouse +SRC_URI:append = "${@bb.utils.contains('MCS_FEATURES', 'jailhouse', \ + ' file://Jailhouse/jailhouse_fix_rpi4_compile_error.patch \ + file://enable_cpu_hotplug.patch', '', d)} \ + file://rpi4b.cfg " + + +# no external defconfig +OPENEULER_KERNEL_CONFIG = "" +# use in-tree defconfig, the defconfig is in src tree +# after patches are unpatched +KBUILD_DEFCONFIG = "bcm2711_defconfig" + +COMPATIBLE_MACHINE = "raspberrypi4-64" + +# use rpi kernel tag +SRC_URI:raspberrypi4 = " \ + ${OPENEULER_KERNEL_CONFIG} \ + file://meta-data;type=kmeta;destsuffix=meta-data \ + ${@bb.utils.contains('DISTRO_FEATURES', 'kernel6', ' \ + file://kernel-${PV} \ + ', ' \ + file://kernel-${PV}-tag-rpi \ + ', d)} \ +" +OPENEULER_REPO_NAME:raspberrypi4 = "${@bb.utils.contains('DISTRO_FEATURES', 'kernel6', 'kernel-${PV}', 'kernel-${PV}-tag-rpi', d)}" +OPENEULER_LOACL_NAME:raspberrypi4 = "${@bb.utils.contains('DISTRO_FEATURES', 'kernel6', 'kernel-${PV}', 'kernel-${PV}-tag-rpi', d)}" +S:raspberrypi4 = "${@bb.utils.contains('DISTRO_FEATURES', 'kernel6', '${WORKDIR}/kernel-${PV}', '${WORKDIR}/kernel-${PV}-tag-rpi', d)}" +OPENEULER_REPO_NAMES:raspberrypi4 = " \ +${@bb.utils.contains('DISTRO_FEATURES', 'kernel6', ' src-kernel-${PV} kernel-${PV} ', ' src-kernel-${PV}-tag-rpi kernel-${PV}-tag-rpi ', d)} \ +" + diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/linux-openeuler-rt.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/linux-openeuler-rt.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..5e0a90b2d35b5b0551180b4ef64dcb6c81a548ce --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/linux-openeuler-rt.bbappend @@ -0,0 +1,24 @@ +# For the Raspberry Pi, we don't need to apply the aarch64 patches +SRC_URI:remove:raspberrypi4 = " \ + file://src-kernel-${PV}/0001-modify-openeuler_defconfig-for-rt62.patch \ + file://src-kernel-${PV}/patch-6.6.0-6.0.0-rt20.patch \ + file://src-kernel-${PV}/patch-6.6.0-6.0.0-rt20.patch-openeuler_defconfig.patch \ + file://src-kernel-${PV}/0001-apply-preempt-RT-patch.patch \ +" + +# 0002-modify-bcm2711_defconfig-for-rt-rpi-kernel.patch not need +# for we have kernel meta data feature to enable it +# in kernel 6.6, this patch will patch failed, it is for 5.10 +SRC_URI:append:raspberrypi4 = "\ + ${@bb.utils.contains('DISTRO_FEATURES', 'kernel6', ' \ + file://src-kernel-${PV}/0000-raspberrypi-kernel.patch \ + file://src-kernel-${PV}/0001-raspberrypi-kernel-RT.patch \ + ' ,' \ + file://src-kernel-${PV}-tag-rpi/0000-raspberrypi-kernel.patch \ + file://src-kernel-${PV}-tag-rpi/0002-modify-bcm2711_defconfig-for-rt-rpi-kernel.patch \ + file://src-kernel-${PV}-tag-rpi/0003-rpi4-extern.patch \ + file://src-kernel-${PV}-tag-rpi/0001-apply-preempt-RT-patch.patch \ + ', d)} \ +" + +require linux-openeuler-rpi.inc diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/linux-openeuler.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/linux-openeuler.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..0c44b47c401485f8882b9d9e9029dfd3b0c4cab6 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/linux/linux-openeuler.bbappend @@ -0,0 +1,8 @@ +SRC_URI:append:raspberrypi4 = " \ + ${@bb.utils.contains('DISTRO_FEATURES', 'kernel6', ' \ + file://src-kernel-${PV}/0000-raspberrypi-kernel.patch \ + ' ,' \ + file://src-kernel-${PV}-tag-rpi/0000-raspberrypi-kernel.patch \ + ', d)} \ +" +require linux-openeuler-rpi.inc diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/lopper/lopper-ops.bbappend b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/lopper/lopper-ops.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..59ff2eb673fde3883da4289fe5cd137460d367d5 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/lopper/lopper-ops.bbappend @@ -0,0 +1,2 @@ +# Use the operation files from current layer +FILESEXTRAPATHS:prepend := "${THISDIR}/:" diff --git a/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/lopper/lops/lop-extract-uart5-for-zephyr.dts b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/lopper/lops/lop-extract-uart5-for-zephyr.dts new file mode 100644 index 0000000000000000000000000000000000000000..c47656cabcb8a5a0ffa8428c59ae86315bf47135 --- /dev/null +++ b/bsp/meta-openeuler-bsp/raspberrypi/recipes-kernel/lopper/lops/lop-extract-uart5-for-zephyr.dts @@ -0,0 +1,48 @@ +/dts-v1/; + +/ { + compatible = "system-device-tree-v1"; + lops { + // Extract a serial(serial@7e201a00) from rpi4 device tree + // and output it to zephyr-rpi4.dts + lop_1: lop_1 { + compatible = "system-device-tree-v1,lop,select-v1"; + // clear any old selections + select_1; + select_2 = "/:compatible:raspberrypi,4-model-b\0brcm,bcm2711"; + }; + lop_1_1: lop_1_1 { + compatible = "system-device-tree-v1,lop,code-v1"; + code = " + tree.process = False + if __selected__: + print( 'Compatible dts (rpi4) found: %s' % node ) + tree.process = True + + if __selected__: + return True + else: + return False + "; + + lop_1_1_1 { + compatible = "system-device-tree-v1,lop,tree"; + cond = <&lop_1>; + tree = "zephyr-tree"; + nodes = "serial@7e201a00"; + }; + lop_1_1_2 { + compatible = "system-device-tree-v1,lop,output"; + cond = <&lop_1>; + tree = "zephyr-tree"; + outfile = "zephyr-rpi4.dts"; + nodes = "*"; + }; + lop_1_1_3 { + compatible = "system-device-tree-v1,lop,modify"; + cond = <&lop_1>; + modify = "/soc/serial@7e201a00/::"; + }; + }; + }; +}; diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/flash-writer/flash-writer.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/flash-writer/flash-writer.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..538d765e48d560867333c6510ff75528c7ec3bb2 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/flash-writer/flash-writer.bbappend @@ -0,0 +1,3 @@ +#bbfile: yocto-meta-renesas/recipes-bsp/flash-writer/flash-writer.bb + +OPENEULER_LOCAL_NAME = "myir-renesas-flash-writer" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir-common_2021.10.inc b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir-common_2021.10.inc new file mode 100644 index 0000000000000000000000000000000000000000..eebef2e41b8eed9dc6cef104a71532f49ce24242 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir-common_2021.10.inc @@ -0,0 +1,15 @@ +HOMEPAGE = "http://www.denx.de/wiki/U-Boot/WebHome" +DESCRIPTION = "U-Boot, a boot loader for Embedded boards based on PowerPC, \ +ARM, MIPS and several other processors, which can be installed in a boot \ +ROM and used to initialize and test the hardware or to download and run \ +application code." +SECTION = "bootloaders" +DEPENDS += "flex-native bison-native" + +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://Licenses/README;md5=5a7450c57ffe5ae63fd732446b988025" +PE = "1" + +S = "${WORKDIR}/myir-renesas-uboot" +B = "${WORKDIR}/build" +do_configure[cleandirs] = "${B}" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir.inc b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir.inc new file mode 100644 index 0000000000000000000000000000000000000000..b7106e1b4e942c9c0c65d92169f7211998ddbdd6 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir.inc @@ -0,0 +1,312 @@ +SUMMARY = "Universal Boot Loader for embedded devices" +PROVIDES = "virtual/bootloader" + +B = "${WORKDIR}/build" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +inherit uboot-config uboot-extlinux-config uboot-sign deploy + +DEPENDS += "swig-native lzop-native" + +EXTRA_OEMAKE = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${TARGET_PREFIX}gcc ${TOOLCHAIN_OPTIONS}" V=1' +EXTRA_OEMAKE += 'HOSTCC="${BUILD_CC} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}"' +EXTRA_OEMAKE += 'STAGING_INCDIR=${STAGING_INCDIR_NATIVE} STAGING_LIBDIR=${STAGING_LIBDIR_NATIVE}' + +PACKAGECONFIG ??= "openssl" +# u-boot will compile its own tools during the build, with specific +# configurations (aka when CONFIG_FIT_SIGNATURE is enabled) openssl is needed as +# a host build dependency. +PACKAGECONFIG[openssl] = ",,openssl-native" + +# Allow setting an additional version string that will be picked up by the +# u-boot build system and appended to the u-boot version. If the .scmversion +# file already exists it will not be overwritten. +UBOOT_LOCALVERSION ?= "" + +# Some versions of u-boot use .bin and others use .img. By default use .bin +# but enable individual recipes to change this value. +UBOOT_SUFFIX ??= "bin" +UBOOT_IMAGE ?= "u-boot-${MACHINE}-${PV}-${PR}.${UBOOT_SUFFIX}" +UBOOT_SYMLINK ?= "u-boot-${MACHINE}.${UBOOT_SUFFIX}" +UBOOT_MAKE_TARGET ?= "all" + +# Output the ELF generated. Some platforms can use the ELF file and directly +# load it (JTAG booting, QEMU) additionally the ELF can be used for debugging +# purposes. +UBOOT_ELF ?= "" +UBOOT_ELF_SUFFIX ?= "elf" +UBOOT_ELF_IMAGE ?= "u-boot-${MACHINE}-${PV}-${PR}.${UBOOT_ELF_SUFFIX}" +UBOOT_ELF_BINARY ?= "u-boot.${UBOOT_ELF_SUFFIX}" +UBOOT_ELF_SYMLINK ?= "u-boot-${MACHINE}.${UBOOT_ELF_SUFFIX}" + +# Some versions of u-boot build an SPL (Second Program Loader) image that +# should be packaged along with the u-boot binary as well as placed in the +# deploy directory. For those versions they can set the following variables +# to allow packaging the SPL. +SPL_BINARY ?= "" +SPL_BINARYNAME ?= "${@os.path.basename(d.getVar("SPL_BINARY"))}" +SPL_IMAGE ?= "${SPL_BINARYNAME}-${MACHINE}-${PV}-${PR}" +SPL_SYMLINK ?= "${SPL_BINARYNAME}-${MACHINE}" + +# Additional environment variables or a script can be installed alongside +# u-boot to be used automatically on boot. This file, typically 'uEnv.txt' +# or 'boot.scr', should be packaged along with u-boot as well as placed in the +# deploy directory. Machine configurations needing one of these files should +# include it in the SRC_URI and set the UBOOT_ENV parameter. +UBOOT_ENV_SUFFIX ?= "txt" +UBOOT_ENV ?= "" +UBOOT_ENV_BINARY ?= "${UBOOT_ENV}.${UBOOT_ENV_SUFFIX}" +UBOOT_ENV_IMAGE ?= "${UBOOT_ENV}-${MACHINE}-${PV}-${PR}.${UBOOT_ENV_SUFFIX}" +UBOOT_ENV_SYMLINK ?= "${UBOOT_ENV}-${MACHINE}.${UBOOT_ENV_SUFFIX}" + +# U-Boot EXTLINUX variables. U-Boot searches for /boot/extlinux/extlinux.conf +# to find EXTLINUX conf file. +UBOOT_EXTLINUX_INSTALL_DIR ?= "/boot/extlinux" +UBOOT_EXTLINUX_CONF_NAME ?= "extlinux.conf" +UBOOT_EXTLINUX_SYMLINK ?= "${UBOOT_EXTLINUX_CONF_NAME}-${MACHINE}-${PR}" + +do_compile () { + if [ "${@bb.utils.filter('DISTRO_FEATURES', 'ld-is-gold', d)}" ]; then + sed -i 's/$(CROSS_COMPILE)ld$/$(CROSS_COMPILE)ld.bfd/g' ${S}/config.mk + fi + + unset LDFLAGS + unset CFLAGS + unset CPPFLAGS + + if [ ! -e ${B}/.scmversion -a ! -e ${S}/.scmversion ] + then + echo ${UBOOT_LOCALVERSION} > ${B}/.scmversion + echo ${UBOOT_LOCALVERSION} > ${S}/.scmversion + fi + + if [ -n "${UBOOT_CONFIG}" ] + then + unset i j k + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + oe_runmake -C ${S} O=${B}/${config} ${config} + oe_runmake -C ${S} O=${B}/${config} ${UBOOT_MAKE_TARGET} + for binary in ${UBOOT_BINARIES}; do + k=$(expr $k + 1); + if [ $k -eq $i ]; then + cp ${B}/${config}/${binary} ${B}/${config}/u-boot-${type}.${UBOOT_SUFFIX} + fi + done + unset k + fi + done + unset j + done + unset i + else + oe_runmake -C ${S} O=${B} ${UBOOT_MACHINE} + oe_runmake -C ${S} O=${B} ${UBOOT_MAKE_TARGET} + fi + +} + +do_install () { + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -d ${D}/boot + install -m 644 ${B}/${config}/u-boot-${type}.${UBOOT_SUFFIX} ${D}/boot/u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${D}/boot/${UBOOT_BINARY}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${D}/boot/${UBOOT_BINARY} + fi + done + unset j + done + unset i + else + install -d ${D}/boot + install -m 644 ${B}/${UBOOT_BINARY} ${D}/boot/${UBOOT_IMAGE} + ln -sf ${UBOOT_IMAGE} ${D}/boot/${UBOOT_BINARY} + fi + + if [ -n "${UBOOT_ELF}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${UBOOT_ELF} ${D}/boot/u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${D}/boot/${UBOOT_BINARY}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${D}/boot/${UBOOT_BINARY} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${UBOOT_ELF} ${D}/boot/${UBOOT_ELF_IMAGE} + ln -sf ${UBOOT_ELF_IMAGE} ${D}/boot/${UBOOT_ELF_BINARY} + fi + fi + + if [ -e ${WORKDIR}/fw_env.config ] ; then + install -d ${D}${sysconfdir} + install -m 644 ${WORKDIR}/fw_env.config ${D}${sysconfdir}/fw_env.config + fi + + if [ -n "${SPL_BINARY}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${SPL_BINARY} ${D}/boot/${SPL_IMAGE}-${type}-${PV}-${PR} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${D}/boot/${SPL_BINARYNAME}-${type} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${D}/boot/${SPL_BINARYNAME} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${SPL_BINARY} ${D}/boot/${SPL_IMAGE} + ln -sf ${SPL_IMAGE} ${D}/boot/${SPL_BINARYNAME} + fi + fi + + if [ -n "${UBOOT_ENV}" ] + then + install -m 644 ${WORKDIR}/${UBOOT_ENV_BINARY} ${D}/boot/${UBOOT_ENV_IMAGE} + ln -sf ${UBOOT_ENV_IMAGE} ${D}/boot/${UBOOT_ENV_BINARY} + fi + + if [ "${UBOOT_EXTLINUX}" = "1" ] + then + install -Dm 0644 ${UBOOT_EXTLINUX_CONFIG} ${D}/${UBOOT_EXTLINUX_INSTALL_DIR}/${UBOOT_EXTLINUX_CONF_NAME} + fi + +} + +FILES:${PN} = "/boot ${sysconfdir}" + +SYSROOT_DIRS += "/boot" + +do_deploy () { + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -d ${DEPLOYDIR} + install -m 644 ${B}/${config}/u-boot-${type}.${UBOOT_SUFFIX} ${DEPLOYDIR}/u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} + cd ${DEPLOYDIR} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_SYMLINK}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_SYMLINK} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_BINARY}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_BINARY} + fi + done + unset j + done + unset i + else + install -d ${DEPLOYDIR} + install -m 644 ${B}/${UBOOT_BINARY} ${DEPLOYDIR}/${UBOOT_IMAGE} + cd ${DEPLOYDIR} + rm -f ${UBOOT_BINARY} ${UBOOT_SYMLINK} + ln -sf ${UBOOT_IMAGE} ${UBOOT_SYMLINK} + ln -sf ${UBOOT_IMAGE} ${UBOOT_BINARY} + fi + + if [ -n "${UBOOT_ELF}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${UBOOT_ELF} ${DEPLOYDIR}/u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_BINARY}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_BINARY} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_SYMLINK}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_SYMLINK} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${UBOOT_ELF} ${DEPLOYDIR}/${UBOOT_ELF_IMAGE} + ln -sf ${UBOOT_ELF_IMAGE} ${DEPLOYDIR}/${UBOOT_ELF_BINARY} + ln -sf ${UBOOT_ELF_IMAGE} ${DEPLOYDIR}/${UBOOT_ELF_SYMLINK} + fi + fi + + + if [ -n "${SPL_BINARY}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${SPL_BINARY} ${DEPLOYDIR}/${SPL_IMAGE}-${type}-${PV}-${PR} + rm -f ${DEPLOYDIR}/${SPL_BINARYNAME} ${DEPLOYDIR}/${SPL_SYMLINK}-${type} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${DEPLOYDIR}/${SPL_BINARYNAME}-${type} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${DEPLOYDIR}/${SPL_BINARYNAME} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${DEPLOYDIR}/${SPL_SYMLINK}-${type} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${DEPLOYDIR}/${SPL_SYMLINK} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${SPL_BINARY} ${DEPLOYDIR}/${SPL_IMAGE} + rm -f ${DEPLOYDIR}/${SPL_BINARYNAME} ${DEPLOYDIR}/${SPL_SYMLINK} + ln -sf ${SPL_IMAGE} ${DEPLOYDIR}/${SPL_BINARYNAME} + ln -sf ${SPL_IMAGE} ${DEPLOYDIR}/${SPL_SYMLINK} + fi + fi + + + if [ -n "${UBOOT_ENV}" ] + then + install -m 644 ${WORKDIR}/${UBOOT_ENV_BINARY} ${DEPLOYDIR}/${UBOOT_ENV_IMAGE} + rm -f ${DEPLOYDIR}/${UBOOT_ENV_BINARY} ${DEPLOYDIR}/${UBOOT_ENV_SYMLINK} + ln -sf ${UBOOT_ENV_IMAGE} ${DEPLOYDIR}/${UBOOT_ENV_BINARY} + ln -sf ${UBOOT_ENV_IMAGE} ${DEPLOYDIR}/${UBOOT_ENV_SYMLINK} + fi + + if [ "${UBOOT_EXTLINUX}" = "1" ] + then + install -m 644 ${UBOOT_EXTLINUX_CONFIG} ${DEPLOYDIR}/${UBOOT_EXTLINUX_SYMLINK} + ln -sf ${UBOOT_EXTLINUX_SYMLINK} ${DEPLOYDIR}/${UBOOT_EXTLINUX_CONF_NAME}-${MACHINE} + ln -sf ${UBOOT_EXTLINUX_SYMLINK} ${DEPLOYDIR}/${UBOOT_EXTLINUX_CONF_NAME} + fi +} + +addtask deploy before do_build after do_compile diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir_2021.10.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir_2021.10.bb new file mode 100644 index 0000000000000000000000000000000000000000..0e160c0ffbdd68044a8363faede63495646ef78f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir_2021.10.bb @@ -0,0 +1,43 @@ +require u-boot-myir-common_${PV}.inc +require u-boot-myir.inc + +DEPENDS += "bc-native dtc-native" + +OPENEULER_LOCAL_NAME = "myir-renesas-uboot" +SRC_URI = " \ + file://myir-renesas-uboot \ +" + +PV = "2021.10" + + +UBOOT_SREC_SUFFIX = "srec" +UBOOT_SREC ?= "u-boot-elf.${UBOOT_SREC_SUFFIX}" +UBOOT_SREC_IMAGE ?= "u-boot-elf-${MACHINE}-${PV}-${PR}.${UBOOT_SREC_SUFFIX}" +UBOOT_SREC_SYMLINK ?= "u-boot-elf-${MACHINE}.${UBOOT_SREC_SUFFIX}" + +do_deploy:append() { + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${UBOOT_SREC} ${DEPLOYDIR}/u-boot-elf-${type}-${PV}-${PR}.${UBOOT_SREC_SUFFIX} + cd ${DEPLOYDIR} + ln -sf u-boot-elf-${type}-${PV}-${PR}.${UBOOT_SREC_SUFFIX} u-boot-elf-${type}.${UBOOT_SREC_SUFFIX} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${UBOOT_SREC} ${DEPLOYDIR}/${UBOOT_SREC_IMAGE} + cd ${DEPLOYDIR} + rm -f ${UBOOT_SREC} ${UBOOT_SREC_SYMLINK} + ln -sf ${UBOOT_SREC_IMAGE} ${UBOOT_SREC_SYMLINK} + ln -sf ${UBOOT_SREC_IMAGE} ${UBOOT_SREC} + fi +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/images/myir-remi.inc b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/images/myir-remi.inc new file mode 100644 index 0000000000000000000000000000000000000000..df9c73cfb7e0aa93a9cc8c0b9543a5dba654bb21 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/images/myir-remi.inc @@ -0,0 +1,15 @@ +copy_bootloader() { + if [ ! -d ${OUTPUT_DIR} ];then + mkdir -p ${OUTPUT_DIR} + fi + cp ${DEPLOY_DIR_IMAGE}/bl2_bp-${MACHINE}_pmic.srec ${OUTPUT_DIR}/ + cp ${DEPLOY_DIR_IMAGE}/fip-${MACHINE}_pmic.srec ${OUTPUT_DIR}/ + cp ${DEPLOY_DIR_IMAGE}/*.mot ${OUTPUT_DIR}/ + # copy kernel + cp -L ${DEPLOY_DIR_IMAGE}/Image ${OUTPUT_DIR}/ + # copy uboot + cp -L ${DEPLOY_DIR_IMAGE}/u-boot.bin ${OUTPUT_DIR}/ + # copy dtb + cp -L ${DEPLOY_DIR_IMAGE}/*.dtb ${OUTPUT_DIR}/ +} +IMAGE_PREPROCESS_COMMAND += "copy_bootloader;" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/images/openeuler-image.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/images/openeuler-image.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..b1937dd731933b5df9b1c491be3940be0f6389c3 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/images/openeuler-image.bbappend @@ -0,0 +1,2 @@ +# TODO +IMAGE_INSTALL:remove = "packagegroup-dsoftbus" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/packagegroups/packagegroup-core-boot.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/packagegroups/packagegroup-core-boot.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..8fa18409b0e5f03687cf56a3fcd2bd7dc2e98d20 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/packagegroups/packagegroup-core-boot.bbappend @@ -0,0 +1,3 @@ +RDEPENDS:${PN}:remove = " \ + kernel-img \ +" \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/selinux/policycoreutils_%.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/selinux/policycoreutils_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..7cd0f8bc2ba42b22c3a3f4c177c35cb39040156f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/selinux/policycoreutils_%.bbappend @@ -0,0 +1,4 @@ +SRC_URI:remove = " \ + file://fix-fixfiles-N-date-function.patch;patchdir=.. \ + file://fix-fixfiles-N-date-function-two.patch;patchdir=.. \ +" diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-bsp/rk-binary/rk-binary-native.bb b/bsp/meta-openeuler-bsp/rockchip/recipes-bsp/rk-binary/rk-binary-native.bb new file mode 100644 index 0000000000000000000000000000000000000000..495d8ba9adbea7b841bfc651e4b49449df8331e3 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-bsp/rk-binary/rk-binary-native.bb @@ -0,0 +1,51 @@ +# Copyright (C) 2019, Fuzhou Rockchip Electronics Co., Ltd +# Released under the MIT license (see COPYING.MIT for the terms) +LICENSE = "LICENSE.rockchip" +LIC_FILES_CHKSUM = "file://${RKBASE}/licenses/LICENSE.rockchip;md5=d63890e209bf038f44e708bbb13e4ed9" + +inherit deploy native + +OPENEULER_REPO_NAME = "rk-binary-native" + +SRC_URI = " \ + file://rk-binary-native \ +" + +S = "${WORKDIR}" + +SRCREV_rkbin = "" +SRCREV_tools = "" +SRCREV_FORMAT ?= "rkbin_tools" + +DESCRIPTION = "Rockchip binary tools" + +INSANE_SKIP:${PN} = "already-stripped" +STRIP = "echo" + +# The pre-built tools have different link loader, don't change them. +UNINATIVE_LOADER := "" + +do_install () { + install -d ${D}/${bindir} + + cd ${S}/rk-binary-native/tools + + install -m 0755 boot_merger ${D}/${bindir} + install -m 0755 trust_merger ${D}/${bindir} + install -m 0755 firmwareMerger ${D}/${bindir} + + install -m 0755 kernelimage ${D}/${bindir} + install -m 0755 loaderimage ${D}/${bindir} + + install -m 0755 mkkrnlimg ${D}/${bindir} + install -m 0755 resource_tool ${D}/${bindir} + + install -m 0755 upgrade_tool ${D}/${bindir} + + cd ${S}/rk-binary-native/linux/Linux_Pack_Firmware/rockdev + + install -m 0755 afptool ${D}/${bindir} + install -m 0755 rkImageMaker ${D}/${bindir} +} + + diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-bsp/u-boot/u-boot-dummy.bb b/bsp/meta-openeuler-bsp/rockchip/recipes-bsp/u-boot/u-boot-dummy.bb new file mode 100644 index 0000000000000000000000000000000000000000..077c13cd2c50232fd2e0f3a022a491fa7e483427 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-bsp/u-boot/u-boot-dummy.bb @@ -0,0 +1,17 @@ +# Copyright (c) 2021, Rockchip Electronics Co., Ltd +# Released under the MIT license (see COPYING.MIT for the terms) + +SUMMARY = "Dummy loader for external bootloaders" +SECTION = "bootloaders" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/COPYING.MIT;md5=3da9cfbcb788c80a0384361b4de20420" + +PROVIDES = "virtual/bootloader" + +addtask do_deploy + +# Do nothing here +do_deploy () { + : +} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-bsp/u-boot/u-boot-rockchip.bb b/bsp/meta-openeuler-bsp/rockchip/recipes-bsp/u-boot/u-boot-rockchip.bb new file mode 100644 index 0000000000000000000000000000000000000000..44019b396fc4ee4346bff76d5f6d9238cee18584 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-bsp/u-boot/u-boot-rockchip.bb @@ -0,0 +1,129 @@ +# Copyright (C) 2019, Fuzhou Rockchip Electronics Co., Ltd +# Released under the MIT license (see COPYING.MIT for the terms) + +PATCHPATH = "${CURDIR}/u-boot-rockchip" +inherit auto-patch + +inherit python3-dir + +require recipes-bsp/u-boot/u-boot.inc +require recipes-bsp/u-boot/u-boot-common.inc + +PROVIDES = "virtual/bootloader" + +DEPENDS += "bc-native dtc-native" + +PV = "2017.09" + +LIC_FILES_CHKSUM = "file://Licenses/README;md5=a2c678cfd4a4d97135585cad908541c6" + +SRC_URI = " \ + file://u-boot-rockchip \ + file://rk-binary-native;destsuffix=u-boot-rockchip/ \ +" + +S = "${WORKDIR}/u-boot-rockchip" + +python do_fetch() { + # download rk-binary-native repo for patches + d.setVar("OPENEULER_REPO_NAME", "rk-binary-native") + d.setVar("OPENEULER_LOCAL_NAME", 'rk-binary-native') + bb.build.exec_func("do_openeuler_fetch", d) + + # download u-boot-rockchip repo for u-boot src files + d.setVar("OPENEULER_REPO_NAME", "u-boot-rockchip") + d.setVar("OPENEULER_LOCAL_NAME", 'u-boot-rockchip') + bb.build.exec_func("do_openeuler_fetch", d) +} + +SRCREV_FORMAT = "default_rk-binary-native" + +DEPENDS:append = " ${PYTHON_PN}-native" + +# Needed for packing BSP u-boot +DEPENDS:append = " coreutils-native ${PYTHON_PN}-pyelftools-native" + +do_unpack:append() { + bb.build.exec_func('do_copy_rkbin_source', d) +} + +do_copy_rkbin_source() { + mv rk-binary-native rkbin + cp -r rkbin/* u-boot-rockchip/ +} + +do_configure:prepend() { + # Make sure we use /usr/bin/env ${PYTHON_PN} for scripts + for s in `grep -rIl python ${S}`; do + sed -i -e '1s|^#!.*python[23]*|#!/usr/bin/env ${PYTHON_PN}|' $s + done + + # Support python3 + sed -i -e 's/\(open([^,]*\))/\1, "rb")/' \ + -e 's/print >> \([^,]*\), *\(.*\),*$/print(\2, file=\1)/' \ + -e 's/print \(.*\)$/print(\1)/' \ + ${S}/arch/arm/mach-rockchip/make_fit_atf.py + + # Remove unneeded stages from make.sh + sed -i -e '/^select_tool/d' -e '/^clean/d' -e '/^\t*make/d' -e '/which python2/{n;n;s/exit 1/true/}' ${S}/make.sh + + if [ "x${RK_ALLOW_PREBUILT_UBOOT}" = "x1" ]; then + # Copy prebuilt images + if [ -e "${S}/${UBOOT_BINARY}" ]; then + bbnote "${PN}: Found prebuilt images." + mkdir -p ${B}/prebuilt/ + mv ${S}/*.bin ${S}/*.img ${B}/prebuilt/ + fi + fi + + [ ! -e "${S}/.config" ] || make -C ${S} mrproper + + sed -i 's/ found;/ found = NULL;/' ${S}/lib/avb/libavb/avb_slot_verify.c +} + +# Generate Rockchip style loader binaries +RK_IDBLOCK_IMG = "idblock.img" +RK_LOADER_BIN = "loader.bin" +RK_TRUST_IMG = "trust.img" +UBOOT_BINARY = "uboot.img" + +do_compile:append() { + cd ${B} + if [ -e "${B}/prebuilt/${UBOOT_BINARY}" ]; then + bbnote "${PN}: Using prebuilt images." + ln -sf ${B}/prebuilt/*.bin ${B}/prebuilt/*.img ${B}/ + else + # Prepare needed files + for d in make.sh scripts configs arch/arm/mach-rockchip; do + cp -rT ${S}/${d} ${d} + done + + # Pack rockchip loader images + ./make.sh + fi + + ln -sf *_loader*.bin "${RK_LOADER_BIN}" + + # Generate idblock image + bbnote "${PN}: Generating ${RK_IDBLOCK_IMG} from ${RK_LOADER_BIN}" + ${S}/tools/boot_merger unpack -i "${RK_LOADER_BIN}" -o . + + if [ -f FlashHead ];then + cat FlashHead FlashData > "${RK_IDBLOCK_IMG}" + else + ./tools/mkimage -n "${SOC_FAMILY}" -T rksd -d FlashData.bin \ + "${RK_IDBLOCK_IMG}" + fi + + cat FlashBoot.bin >> "${RK_IDBLOCK_IMG}" +} + +do_deploy:append() { + cd ${B} + + for binary in "${RK_IDBLOCK_IMG}" "${RK_LOADER_BIN}" "${RK_TRUST_IMG}";do + [ -f "${binary}" ] || continue + install "${binary}" "${DEPLOYDIR}/${binary}-${PV}" + ln -sf "${binary}-${PV}" "${DEPLOYDIR}/${binary}" + done +} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/init-ifupdown/init-ifupdown/interfaces_rk3568 b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/init-ifupdown/init-ifupdown/interfaces_rk3568 new file mode 100644 index 0000000000000000000000000000000000000000..7f9faa05207a2e29aaec647d731c759c32f6a191 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/init-ifupdown/init-ifupdown/interfaces_rk3568 @@ -0,0 +1,38 @@ +# /etc/network/interfaces -- configuration file for ifup(8), ifdown(8) + +# The loopback interface +auto lo +iface lo inet loopback + +# Wireless interfaces +iface mlan0 inet dhcp + wireless_mode managed + wireless_essid any + wpa-driver wext + wpa-conf /etc/wpa_supplicant.conf + +iface atml0 inet dhcp + +# Wired or wireless interfaces +auto eth0 +iface eth0 inet static + address 192.168.0.7 + netmask 255.255.255.0 + network 192.168.0.0 + gateway 192.168.0.1 +iface eth1 inet static + address 192.168.0.8 + netmask 255.255.255.0 + network 192.168.0.0 + gateway 192.168.0.1 + +# Ethernet/RNDIS gadget (g_ether) +# ... or on host side, usbnet and random hwaddr +iface usb0 inet static + address 192.168.7.2 + netmask 255.255.255.0 + network 192.168.7.0 + gateway 192.168.7.1 + +# Bluetooth networking +iface bnep0 inet dhcp \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/init-ifupdown/init-ifupdown_1.0.bbappend b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/init-ifupdown/init-ifupdown_1.0.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..04e7f7f599c4bfeb7bd8bc06d9a78a90abfcd5a8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/init-ifupdown/init-ifupdown_1.0.bbappend @@ -0,0 +1,8 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" + +SRC_URI:append:rk3568 = " file://interfaces_rk3568 \ +" + +do_install:append:rk3568(){ + install -m 0644 ${WORKDIR}/interfaces_rk3568 ${D}${sysconfdir}/network/interfaces +} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/ed_mac_ctrl_V3_8987.conf b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/ed_mac_ctrl_V3_8987.conf new file mode 100644 index 0000000000000000000000000000000000000000..af2f2da3b322d9cc25ae59c3b1c716a2a9d73292 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/ed_mac_ctrl_V3_8987.conf @@ -0,0 +1,23 @@ +# File : ed_mac_ctrl_V3_8987.conf +# +# ed_mac_ctrl_v3 is used for 88W8997, 88W8987, 88W8977 +# ./mlanutl mlan0 hostcmd config/ed_mac_ctrl_V3_8987.conf ed_mac_ctrl_v3 +# +## Set Energy Detect Threshold for EU Adaptivity test + +ed_mac_ctrl_v3={ + CmdCode=0x0130 #Command code, DO NOT change this line + ed_ctrl_2g.enable:2=0x1 # 0 - disable EU adaptivity for 2.4GHz band + # 1 - enable EU adaptivity for 2.4GHz band + + ed_ctrl_2g.offset:2=0x6 # 0 - Default Energy Detect threshold + #offset value range: 0x80 to 0x7F + + ed_ctrl_5g.enable:2=0x1 # 0 - disable EU adaptivity for 5GHz band + # 1 - enable EU adaptivity for 5GHz band + + ed_ctrl_5g.offset:2=0x6 # 0 - Default Energy Detect threshold + #offset value range: 0x80 to 0x7F + + ed_ctrl_txq_lock:4=0xFF #DO NOT Change this line +} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/ed_mac_ctrl_V3_8997.conf b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/ed_mac_ctrl_V3_8997.conf new file mode 100644 index 0000000000000000000000000000000000000000..6c86bd7060a3ad66f08cb279e1748bd60e508aa5 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/ed_mac_ctrl_V3_8997.conf @@ -0,0 +1,23 @@ +# File : ed_mac_ctrl_V3_8997.conf +# +# ed_mac_ctrl_v3 is used for 88W8997, 88W8987, 88W8977 +# ./mlanutl mlan0 hostcmd config/ed_mac_ctrl_V3_8997.conf ed_mac_ctrl_v3 +# +## Set Energy Detect Threshold for EU Adaptivity test + +ed_mac_ctrl_v3={ + CmdCode=0x0130 #Command code, DO NOT change this line + ed_ctrl_2g.enable:2=0x1 # 0 - disable EU adaptivity for 2.4GHz band + # 1 - enable EU adaptivity for 2.4GHz band + + ed_ctrl_2g.offset:2=0x0 # 0 - Default Energy Detect threshold + #offset value range: 0x80 to 0x7F + + ed_ctrl_5g.enable:2=0x1 # 0 - disable EU adaptivity for 5GHz band + # 1 - enable EU adaptivity for 5GHz band + + ed_ctrl_5g.offset:2=0x4 # 0 - Default Energy Detect threshold + #offset value range: 0x80 to 0x7F + + ed_ctrl_txq_lock:4=0xFF #DO NOT Change this line +} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/pcieuart8997_combo_v4.bin b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/pcieuart8997_combo_v4.bin new file mode 100644 index 0000000000000000000000000000000000000000..ca6f9ddba385f76ac1560a1c8033b11cc0ba5003 Binary files /dev/null and b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/pcieuart8997_combo_v4.bin differ diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/sdiouart8987_combo_v0.bin b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/sdiouart8987_combo_v0.bin new file mode 100644 index 0000000000000000000000000000000000000000..a385809d4c47520fd186ab83499e80a7c3320d1e Binary files /dev/null and b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/sdiouart8987_combo_v0.bin differ diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/txpwrlimit_cfg_8987.conf b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/txpwrlimit_cfg_8987.conf new file mode 100644 index 0000000000000000000000000000000000000000..74be6d6a307b8d3a69bb8a356f7d60080d119356 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/txpwrlimit_cfg_8987.conf @@ -0,0 +1,509 @@ +# File : txpwrlimit_cfg.conf +## Get CFG data for Tx power limitation +txpwrlimit_2g_cfg_get={ + CmdCode=0x00fb # do NOT change this line + Action:2=0 # 0 - GET + SubBand:2=0x00 # 0x00 2G subband (2.4G: channel 1-14) + # 0x10 5G subband0 (5G: channel 36,40,44,48, + # 52,56,60,64) + # 0x11 5G subband1 (5G: channel 100,104,108,112, + # 116,120,124,128, + # 132,136,140,144) + # 0x12 5G subband2 (5G: channel 149,153,157,161,165,172) + # 0x13 5G subband3 (5G: channel 183,184,185,187,188, + # 189, 192,196; + # 5G: channel 7,8,11,12,16,34) +} + + +txpwrlimit_5g_cfg_get_sub0={ + CmdCode=0x00fb # do NOT change this line + Action:2=0 # 0 - GET + SubBand:2=0x10 # 0x00 2G subband (2.4G: channel 1-14) + # 0x10 5G subband0 (5G: channel 36,40,44,48, + # 52,56,60,64) + # 0x11 5G subband1 (5G: channel 100,104,108,112, + # 116,120,124,128, + # 132,136,140,144) + # 0x12 5G subband2 (5G: channel 149,153,157,161,165,172) + # 0x13 5G subband3 (5G: channel 183,184,185,187,188, + # 189, 192,196; + # 5G: channel 7,8,11,12,16,34) +} + + +txpwrlimit_5g_cfg_get_sub1={ + CmdCode=0x00fb # do NOT change this line + Action:2=0 # 0 - GET + SubBand:2=0x11 # 0x00 2G subband (2.4G: channel 1-14) + # 0x10 5G subband0 (5G: channel 36,40,44,48, + # 52,56,60,64) + # 0x11 5G subband1 (5G: channel 100,104,108,112, + # 116,120,124,128, + # 132,136,140,144) + # 0x12 5G subband2 (5G: channel 149,153,157,161,165,172) + # 0x13 5G subband3 (5G: channel 183,184,185,187,188, + # 189, 192,196; + # 5G: channel 7,8,11,12,16,34) +} + + +txpwrlimit_5g_cfg_get_sub2={ + CmdCode=0x00fb # do NOT change this line + Action:2=0 # 0 - GET + SubBand:2=0x12 # 0x00 2G subband (2.4G: channel 1-14) + # 0x10 5G subband0 (5G: channel 36,40,44,48, + # 52,56,60,64) + # 0x11 5G subband1 (5G: channel 100,104,108,112, + # 116,120,124,128, + # 132,136,140,144) + # 0x12 5G subband2 (5G: channel 149,153,157,161,165,172) + # 0x13 5G subband3 (5G: channel 183,184,185,187,188, + # 189, 192,196; + # 5G: channel 7,8,11,12,16,34) +} + + +txpwrlimit_5g_cfg_get_sub3={ + CmdCode=0x00fb # do NOT change this line + Action:2=0 # 0 - GET + SubBand:2=0x13 # 0x00 2G subband (2.4G: channel 1-14) + # 0x10 5G subband0 (5G: channel 36,40,44,48, + # 52,56,60,64) + # 0x11 5G subband1 (5G: channel 100,104,108,112, + # 116,120,124,128, + # 132,136,140,144) + # 0x12 5G subband2 (5G: channel 149,153,157,161,165,172) + # 0x13 5G subband3 (5G: channel 183,184,185,187,188, + # 189, 192,196; + # 5G: channel 7,8,11,12,16,34) +} + +## Set CFG data for Tx power limitation +## +## TLVStartFreq: Starting Frequency of the band for this channel +## 2407, 2414 or 2400 for 2.4 GHz +## 5000 +## 4000 +## TLVChanWidth: Channel Width +## 20 +## TLVChanNum : Channel Number +## TLVPwr[] : ModulationGroup +## 0: CCK (1,2,5.5,11 Mbps) +## 1: OFDM (6,9,12,18 Mbps) +## 2: OFDM (24,36 Mbps) +## 3: OFDM (48,54 Mbps) +## 4: HT20 (0,1,2) +## 5: HT20 (3,4) +## 6: HT20 (5,6,7) +## 7: HT40 (0,1,2) +## 8: HT40 (3,4) +## 9: HT40 (5,6,7) +## 10: VHT_QAM256 (MCS8) +## 11: VHT_40_QAM256 (MCS8,9) +## 12: VHT_80_PSK (MCS0,1,2) +## 13: VHT_80_QAM16 (MCS3,4) +## 14: VHT_80_QAM64 (MCS5,6,7) +## 15: VHT_80_QAM256 (MCS8,9) +## Power Limit in dBm +## +## For 40MHz modulation groups, specify same Tx power value for a set of +## two consecutive channel frequencies +## Valid channel sets: +## (36, 40), (44, 48), (52, 56), (60, 64) +## (100, 104), (108, 112), (116, 120), (124, 128), (132, 136), (140, 144) +## (149, 153), (157, 161) +## +## For 80MHz modulation groups, specify same Tx power value for a set of +## four consecutive channel frequencies +## Valid channel sets: +## (36, 40, 44, 48), (52, 56, 60, 64) +## (100, 104, 108, 112), (116, 120, 124, 128), (132, 136, 140, 144) +## (149, 153, 157, 161) + +## 2G Tx power limit CFG +txpwrlimit_2g_cfg_set={ + CmdCode=0x00fb # do NOT change this line + Action:2=1 # 1 - SET + RSVD:2=0 # do NOT change this line + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=1 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=2 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=3 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=4 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=5 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=6 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=7 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=8 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=9 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=10 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=11 + TLVPwr:24='0,18,1,18,2,16,3,14,4,18,5,16,6,14,7,18,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=12 + TLVPwr:24='0,16,1,16,2,16,3,14,4,16,5,16,6,14,7,16,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=13 + TLVPwr:24='0,16,1,16,2,16,3,14,4,16,5,16,6,14,7,16,8,16,9,14,10,16,11,16' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2414 + TLVChanWidth:1=20 + TLVChanNum:1=14 + TLVPwr:24='0,12,1,12,2,12,3,12,4,12,5,12,6,12,7,12,8,12,9,12,10,12,11,12' + } +} + +## 5G Tx power limit CFG +txpwrlimit_5g_cfg_set={ + CmdCode=0x00fb # do NOT change this line + Action:2=1 # 1 - SET + RSVD:2=0 # do NOT change this line + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=36 + TLVPwr:32='0,0,1,16,2,16,3,14,4,16,5,16,6,14,7,16,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=40 + TLVPwr:32='0,0,1,16,2,16,3,14,4,16,5,16,6,14,7,16,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=44 + TLVPwr:32='0,0,1,16,2,16,3,14,4,16,5,16,6,14,7,16,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=48 + TLVPwr:32='0,0,1,16,2,16,3,14,4,16,5,16,6,14,7,16,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=52 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=56 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=60 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=64 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=100 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=104 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=108 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=112 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=116 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=120 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=124 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=128 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=132 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=136 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=140 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=144 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=149 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=153 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=157 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=161 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=165 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=183 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=184 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=185 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=187 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=188 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=189 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=192 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=196 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=7 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=8 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=11 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=12 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=16 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=34 + TLVPwr:32='0,0,1,17,2,16,3,14,4,17,5,16,6,14,7,17,8,16,9,14,10,15,11,14,12,15,13,15,14,14,15,13' + } +} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/txpwrlimit_cfg_8997.conf b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/txpwrlimit_cfg_8997.conf new file mode 100644 index 0000000000000000000000000000000000000000..0f3b71a5368eca418e4814de39ea4cfdd0603b31 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/txpwrlimit_cfg_8997.conf @@ -0,0 +1,621 @@ +# File : txpwrlimit_cfg.conf +## Get CFG data for Tx power limitation +txpwrlimit_2g_cfg_get={ + CmdCode=0x00fb # do NOT change this line + Action:2=0 # 0 - GET + SubBand:2=0x00 # 0x00 2G subband (2.4G: channel 1-14) + # 0x10 5G subband0 (5G: channel 36,40,44,48, + # 52,56,60,64) + # 0x11 5G subband1 (5G: channel 100,104,108,112, + # 116,120,124,128, + # 132,136,140,144) + # 0x12 5G subband2 (5G: channel 149,153,157,161,165,172) + # 0x13 5G subband3 (5G: channel 183,184,185,187,188, + # 189, 192,196; + # 5G: channel 7,8,11,12,16,34) +} + + +txpwrlimit_5g_cfg_get_sub0={ + CmdCode=0x00fb # do NOT change this line + Action:2=0 # 0 - GET + SubBand:2=0x10 # 0x00 2G subband (2.4G: channel 1-14) + # 0x10 5G subband0 (5G: channel 36,40,44,48, + # 52,56,60,64) + # 0x11 5G subband1 (5G: channel 100,104,108,112, + # 116,120,124,128, + # 132,136,140,144) + # 0x12 5G subband2 (5G: channel 149,153,157,161,165,172) + # 0x13 5G subband3 (5G: channel 183,184,185,187,188, + # 189, 192,196; + # 5G: channel 7,8,11,12,16,34) +} + + +txpwrlimit_5g_cfg_get_sub1={ + CmdCode=0x00fb # do NOT change this line + Action:2=0 # 0 - GET + SubBand:2=0x11 # 0x00 2G subband (2.4G: channel 1-14) + # 0x10 5G subband0 (5G: channel 36,40,44,48, + # 52,56,60,64) + # 0x11 5G subband1 (5G: channel 100,104,108,112, + # 116,120,124,128, + # 132,136,140,144) + # 0x12 5G subband2 (5G: channel 149,153,157,161,165,172) + # 0x13 5G subband3 (5G: channel 183,184,185,187,188, + # 189, 192,196; + # 5G: channel 7,8,11,12,16,34) +} + + +txpwrlimit_5g_cfg_get_sub2={ + CmdCode=0x00fb # do NOT change this line + Action:2=0 # 0 - GET + SubBand:2=0x12 # 0x00 2G subband (2.4G: channel 1-14) + # 0x10 5G subband0 (5G: channel 36,40,44,48, + # 52,56,60,64) + # 0x11 5G subband1 (5G: channel 100,104,108,112, + # 116,120,124,128, + # 132,136,140,144) + # 0x12 5G subband2 (5G: channel 149,153,157,161,165,172) + # 0x13 5G subband3 (5G: channel 183,184,185,187,188, + # 189, 192,196; + # 5G: channel 7,8,11,12,16,34) +} + + +txpwrlimit_5g_cfg_get_sub3={ + CmdCode=0x00fb # do NOT change this line + Action:2=0 # 0 - GET + SubBand:2=0x13 # 0x00 2G subband (2.4G: channel 1-14) + # 0x10 5G subband0 (5G: channel 36,40,44,48, + # 52,56,60,64) + # 0x11 5G subband1 (5G: channel 100,104,108,112, + # 116,120,124,128, + # 132,136,140,144) + # 0x12 5G subband2 (5G: channel 149,153,157,161,165,172) + # 0x13 5G subband3 (5G: channel 183,184,185,187,188, + # 189, 192,196; + # 5G: channel 7,8,11,12,16,34) +} + +## Set CFG data for Tx power limitation +## +## TLVStartFreq: Starting Frequency of the band for this channel +## 2407, 2414 or 2400 for 2.4 GHz +## 5000 +## 4000 +## TLVChanWidth: Channel Width +## 20 +## TLVChanNum : Channel Number +## TLVPwr[] : ModulationGroup +## 0: CCK (1,2,5.5,11 Mbps) +## 1: OFDM (6,9,12,18 Mbps) +## 2: OFDM (24,36 Mbps) +## 3: OFDM (48,54 Mbps) +## 4: HT20 (MCS0,1,2) +## 5: HT20 (MCS3,4) +## 6: HT20 (MCS5,6,7) +## 7: HT40 (MCS0,1,2) +## 8: HT40 (MCS3,4) +## 9: HT40 (MCS5,6,7) +## 10: HT2_20 (MCS8,9,10) +## 11: HT2_20 (MCS11,12) +## 12: HT2_20 (MCS13,14,15) +## 13: HT2_40 (MCS8,9,10) +## 14: HT2_40 (MCS11,12) +## 15: HT2_40 (MCS13,14,15) +## 16: VHT_QAM256 (MCS8) +## 17: VHT_40_QAM256 (MCS8,9) +## 18: VHT_80_PSK (MCS0,1,2) +## 19: VHT_80_QAM16 (MCS3,4) +## 20: VHT_80_QAM64 (MCS5,6,7) +## 21: VHT_80_QAM256 (MCS8,9) +## 22: VHT2_20_QAM256 (MCS8,9) +## 23: VHT2_40_QAM256 (MCS8,9) +## 24: VHT2_80_PSK (MCS0, 1, 2) +## 25: VHT2_80_QAM16 (MCS3,4) +## 26: VHT2_80_QAM64 (MCS5,6,7) +## 27: VHT2_80_QAM256 (MCS8,9) +## Power Limit in dBm + +## For 40MHz modulation groups, specify same Tx power value for a set of +## two consecutive channel frequencies +## Valid channel sets: +## (36, 40), (44, 48), (52, 56), (60, 64) +## (100, 104), (108, 112), (116, 120), (124, 128), (132, 136), (140, 144) +## (149, 153), (157, 161) +## +## For 80MHz modulation groups, specify same Tx power value for a set of +## four consecutive channel frequencies +## Valid channel sets: +## (36, 40, 44, 48), (52, 56, 60, 64) +## (100, 104, 108, 112), (116, 120, 124, 128), (132, 136, 140, 144) +## (149, 153, 157, 161) + + +## 2G subband0 Tx power limit CFG +txpwrlimit_2g_cfg_set={ + CmdCode=0x00fb # do NOT change this line + Action:2=1 # 1 - SET + SubBand:2=0 # do NOT use this member in set cmd + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=1 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=2 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=3 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=4 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=5 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=6 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=7 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=8 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=9 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=10 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=11 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=12 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=13 + TLVPwr:32='0,17,1,15,2,15,3,13,4,15,5,15,6,13,7,15,8,15,9,13,10,15,11,15,12,15,13,15,14,15,15,15' + } + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=2407 + TLVChanWidth:1=20 + TLVChanNum:1=14 + TLVPwr:32='0,12,1,12,2,12,3,12,4,12,5,12,6,12,7,12,8,12,9,12,10,12,11,12,12,12,13,12,14,12,15,12' + } +} + +## 5G subband1 Tx power limit CFG +txpwrlimit_5g_cfg_set_sub0={ + CmdCode=0x00fb # do NOT change this line + Action:2=1 # 1 - SET + SubBand:2=0 # do NOT use this member in set cmd + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=36 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=40 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=44 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=48 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=52 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=56 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=60 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=64 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } +} + +## 5G subband2 Tx power limit CFG +txpwrlimit_5g_cfg_set_sub1={ + CmdCode=0x00fb # do NOT change this line + Action:2=1 # 1 - SET + SubBand:2=0 # do NOT use this member in set cmd + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=100 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=104 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=108 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=112 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=116 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=120 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=124 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=128 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=132 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=136 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=140 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=144 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + +} + + +## 5G subband3 Tx power limit CFG +txpwrlimit_5g_cfg_set_sub2={ + CmdCode=0x00fb # do NOT change this line + Action:2=1 # 1 - SET + SubBand:2=0 # do NOT use this member in set cmd + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=149 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=153 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=157 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=161 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=165 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } +} + + +## 5G subband4 Tx power limit CFG +txpwrlimit_5g_cfg_set_sub3={ + CmdCode=0x00fb # do NOT change this line + Action:2=1 # 1 - SET + SubBand:2=0 # do NOT use this in set cmd + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=4000 + TLVChanWidth:1=20 + TLVChanNum:1=183 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=4000 + TLVChanWidth:1=20 + TLVChanNum:1=184 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=4000 + TLVChanWidth:1=20 + TLVChanNum:1=185 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=4000 + TLVChanWidth:1=20 + TLVChanNum:1=187 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=4000 + TLVChanWidth:1=20 + TLVChanNum:1=188 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=4000 + TLVChanWidth:1=20 + TLVChanNum:1=189 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=4000 + TLVChanWidth:1=20 + TLVChanNum:1=192 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=4000 + TLVChanWidth:1=20 + TLVChanNum:1=196 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=7 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=8 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=11 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=12 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=16 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } + + + ChanTRPC.TlvType:2=0x0189 + ChanTRPC.TlvLength:2={ + TLVStartFreq:2=5000 + TLVChanWidth:1=20 + TLVChanNum:1=34 + TLVPwr:56='0,17,1,15,2,15,3,11,4,15,5,15,6,11,7,15,8,15,9,11,10,15,11,15,12,14,13,15,14,15,15,14,16,11,17,11,18,13,19,13,20,10,21,10,22,11,23,11,24,13,25,13,26,12,27,10' + } +} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/wifi_mod_para.conf b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/wifi_mod_para.conf new file mode 100644 index 0000000000000000000000000000000000000000..96179f95d9926b16ef6a77210b1148225cc9c7b8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware/firmware/nxp/wifi_mod_para.conf @@ -0,0 +1,184 @@ +# Not matter how many spaces or tabs are inserted in a line, +# components and ending format must be exactly same as given +# example: +# +# [_] = { +# key=value +# } +# +# card_type : 8XXX (mandatory) +# block_id : configuration block id (optional ) +# key : module parameter name +# value : value for module parameter +# for string value, no need to add "" +# +# card_type supported: 8887/8897/8997/8977/8987/9098 +# block_id: support same chipset with +# different module parameter. +# For example to support mutiple SD8997 cards, usr can +# specify the configuration block id number [0 - 9], if not +# specified, it is taken as 0 by default. +# +# debug related module parameters could not be set via module +# configure file, ex. drvdbg could not be set in this file +# +# line started with "#" will be ignored +# refer to the USB8997_1 for parameters that could be set in +# this configuration file, and set the corresponding value +# according to your real needs + +SD8997 = { + cfg80211_wext=0xf + wfd_name=p2p + max_vir_bss=1 + cal_data_cfg=nxp/WlanCalData_ext_8997_QFN_TB.conf + drv_mode=7 +} + +#SD8997_1 = { +# cfg80211_wext=0xf +# wfd_name=wfd0 +# max_vir_bss=1 +# cal_data_cfg=nxp/WlanCalData_ext_8997_QFN_TB.conf +# drv_mode=5 +#} + +#SD8887 = { +# cfg80211_wext=0xf +# wfd_name=p2p +# max_vir_bss=1 +# cal_data_cfg=nxp/WlanCalData_ext_8997_QFN_TB.conf +# drv_mode=7 +#} + +#SD8897 = { +# cfg80211_wext=0xf +# wfd_name=p2p +# max_vir_bss=1 +# cal_data_cfg=nxp/WlanCalData_ext_8997_QFN_TB.conf +# drv_mode=7 +#} + +#SD8977 = { +# cfg80211_wext=0xf +# wfd_name=p2p +# max_vir_bss=1 +# cal_data_cfg=nxp/WlanCalData_ext_8997_QFN_TB.conf +# drv_mode=7 +#} + +SD8987 = { + cfg80211_wext=0xf + wfd_name=p2p + max_vir_bss=1 + cal_data_cfg=none + drv_mode=7 + ps_mode=2 + auto_ds=2 + fw_name=nxp/sdiouart8987_combo_v0.bin +} + +USB8997 = { + cfg80211_wext=0xf + wfd_name=p2p + max_vir_bss=1 + cal_data_cfg=nxp/WlanCalData_ext_8997_QFN_TB.conf + drv_mode=7 +} + +PCIE8997 = { + cfg80211_wext=0xf + wfd_name=p2p + max_vir_bss=1 + cal_data_cfg=none + drv_mode=7 + ps_mode=2 + auto_ds=2 + fw_name=nxp/pcieuart8997_combo_v4.bin +} + +PCIE9098_0 = { + cfg80211_wext=0xf + wfd_name=p2p + max_vir_bss=1 + cal_data_cfg=none + drv_mode=7 + mac_addr=00:50:43:20:12:34 +} + +PCIE9098_1 = { + cfg80211_wext=0xf + wfd_name=p2p + max_vir_bss=1 + cal_data_cfg=none + drv_mode=7 + mac_addr=00:50:43:20:52:56 +} + +#USB8997 = { +# hw_test=0 +# fw_name="nxp/usbusb8997_combo_v4.bin" +# req_fw_nowait=1 +# fw_reload=3 +# fw_serial=1 +# mac_addr=00:50:43:22:1e:3d +# mfg_mode=0 +# drv_mode=0x5 +# max_sta_bss=1 +# sta_name=wlan +# max_uap_bss=1 +# uap_name=uap +# wfd_name=p2p +# max_vir_bss=1 +# max_mpl_bss=1 +# nan_name=nan +# max_nan_bss=1 +# max_11p_bss=1 +# auto_ds=0 +# ps_mode=1 +# max_tx_buf=4096 +# intmode=0 +# gpiopin=0 +# pm_keep_power=0 +# shutdown_hs=1 +# cfg_11d=1 +# start_11ai_scan=0 +# oob_mode=0 +# sdio_pd=1 +# cal_data_cfg=nxp/WlanCalData_ext_8997_QFN_TB.conf +# txpwrtlimit_cfg=nxp/txpwr_limit.conf +# cntry_txpwrt=0 +# init_hostcmd_cfg=nxp/init_hostcmd_cfg.conf +# minicard_pwrup=0 +# cfg80211_wext=0xf +# skip_fwdnld=0 +# wq_sched_prio=0 +# wq_sched_policy=0 +# rx_work=1 +# aggrctrl=1 +# usb_aggr=1 +# pcie_int_mode=1 +# low_power_mode_enable=1 +# wakelock_timeout=10 +# dev_cap_mask=0xffffffff +# sdio_rx_aggr=1 +# pmic=1 +# antcfg=0 +# uap_oper_ctrl=0 +# hs_wake_interval=400 +# indication_gpio=0xff +# disconnect_on_suspend=0 +# hs_mimo_switch=1 +# indrstcfg=0xffffffff +# fixed_beacon_buffer=0 +# GoAgeoutTime=0 +# gtk_rekey_offload=1 +# multi_dtim=0 +# inact_tmo=0 +# usb_fw_option=1 +# napi=1 +# dfs_offload=1 +# cfg80211_drcs=1 +# drcs_chantime_mode=0 +# reg_alpha2=US +#} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware_v1.0.bb b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware_v1.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..e012aa80295faff04aa8fd4bc7dc756a77fc9282 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-connectivity/wifi_firmware/aw-cm358-firmware_v1.0.bb @@ -0,0 +1,14 @@ +SUMMARY = "add wifi firmware to /lib" +DESCRIPTION = "wifi_firmware" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" +PR = "r0" +SRC_URI = "file://firmware/nxp" + +FILES:${PN} += "/lib/firmware/nxp" +inherit allarch + +do_install() { + install -d ${D}/lib/firmware/nxp + install -m 0755 ${WORKDIR}/firmware/nxp/* ${D}/lib/firmware/nxp/ +} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/ok3399.inc b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/ok3399.inc new file mode 100644 index 0000000000000000000000000000000000000000..983a45a1d4ec8d9fb5f6be503e6a93f657e267bb --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/ok3399.inc @@ -0,0 +1,2 @@ +#image configuration for ok3399 +require rockchip.inc diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/ok3568.inc b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/ok3568.inc new file mode 100644 index 0000000000000000000000000000000000000000..44b657d7774aa4a1b14db28f1a1aa45a63f5adcb --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/ok3568.inc @@ -0,0 +1,3 @@ +#image configuration for ok3568 +require rockchip.inc + diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/ok3588.inc b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/ok3588.inc new file mode 100644 index 0000000000000000000000000000000000000000..d96fe82e275524d822283670a7f6f4a6e6c1ad96 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/ok3588.inc @@ -0,0 +1,2 @@ +#image configuration for ok3568 +require rockchip.inc diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/openeuler-image.bbappend b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/openeuler-image.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..77f23d985a348624ffb3fbc7f1e83fc1cac23129 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/openeuler-image.bbappend @@ -0,0 +1 @@ +# TBC \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/orangepi4-lts.inc b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/orangepi4-lts.inc new file mode 100644 index 0000000000000000000000000000000000000000..9be7da73193006c79a68ebc934111913850c0924 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/orangepi4-lts.inc @@ -0,0 +1,2 @@ +#image configuration for orangepi4-lts +require rockchip.inc diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/orangepi5.inc b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/orangepi5.inc new file mode 100644 index 0000000000000000000000000000000000000000..2bbaa9c2cedc8fe23c98cf29499e3b96d3f27d4c --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/orangepi5.inc @@ -0,0 +1,2 @@ +#image configuration for orangepi5 +require rockchip.inc \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/rockchip.inc b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/rockchip.inc new file mode 100644 index 0000000000000000000000000000000000000000..d497bfea9bba60092faf5935b82a8729689a2755 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-core/images/rockchip.inc @@ -0,0 +1,9 @@ +# mv image to pointed place with format in end of sdimg type +IMAGE_POSTPROCESS_COMMAND:append = "mov_image_to_sdimg;" +mov_image_to_sdimg() { + cp -fp ${IMGDEPLOYDIR}/update.img ${OUTPUT_DIR}/ + # ${IMGDEPLOYDIR}/${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.wic +} + +IMAGE_FSTYPES:remove = "tar.gz" +IMAGE_FSTYPES_DEBUGFS = "ext4" diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-core/packagegroups/packagegroup-base.bbappend b/bsp/meta-openeuler-bsp/rockchip/recipes-core/packagegroups/packagegroup-base.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..057c7ebd5b0068158ea96b1b9cbe78eb8159528a --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-core/packagegroups/packagegroup-base.bbappend @@ -0,0 +1,4 @@ +# add wifi related packages +RDEPENDS:packagegroup-base:append = " \ +${@bb.utils.contains('AUTOEXPAND', '1', 'parted util-linux-findmnt e2fsprogs-resize2fs', '', d)} \ +" diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-core/packagegroups/packagegroup-network.bbappend b/bsp/meta-openeuler-bsp/rockchip/recipes-core/packagegroups/packagegroup-network.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..450aad6bbe76f468b2cee64e807b9a2e13b8ab59 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-core/packagegroups/packagegroup-network.bbappend @@ -0,0 +1,4 @@ +RDEPENDS:packagegroup-base:append = " \ +wpa-supplicant \ +${NIC_MODEL_FIRMWARE} \ +" diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-core/systemd/systemd_%.bbappend b/bsp/meta-openeuler-bsp/rockchip/recipes-core/systemd/systemd_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..0a8af110253b64cd2aba8fff8b65955b78400586 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-core/systemd/systemd_%.bbappend @@ -0,0 +1,3 @@ +SRC_URI:remove = " \ + file://0001-basic-Allow-unknown-filesystems.patch \ +" diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-graphics/rockchip-libmali/rockchip-libmali.bbappend b/bsp/meta-openeuler-bsp/rockchip/recipes-graphics/rockchip-libmali/rockchip-libmali.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..08fea2f3f59941aa350bfd8f50d06ccf3392fbe2 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-graphics/rockchip-libmali/rockchip-libmali.bbappend @@ -0,0 +1,16 @@ +OPENEULER_REPO_NAME = "mali-common" +OPENEULER_REPO_NAMES = "mali-${MALI_GPU}-${MALI_VERSION} mali-common" + +SRC_URI = " \ + file://mali-common \ + file://mali-${MALI_GPU}-${MALI_VERSION} \ +" +S = "${WORKDIR}/mali-common" + +do_unpack:append() { + bb.build.exec_func('do_copy_elglib_source', d) +} + +do_copy_elglib_source() { + cp -r mali-${MALI_GPU}-${MALI_VERSION}/* mali-common/ +} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/config/rk3399/defconfig b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/config/rk3399/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..0d8c4ab8f6fb661cd77fd5c375df80260bc5a619 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/config/rk3399/defconfig @@ -0,0 +1,7021 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.10.0 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="aarch64-openeuler-linux-gnu-gcc (gcc 10.3.1) 10.3.1" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=100301 +CONFIG_LD_VERSION=237000000 +CONFIG_CLANG_VERSION=0 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="localhost" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_WATCH_QUEUE is not set +# CONFIG_CROSS_MEMORY_ATTACH is not set +CONFIG_USELIB=y +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_SCHED_THERMAL_PRESSURE=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +CONFIG_RCU_EXPERT=y +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_RUDE_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_FANOUT=64 +CONFIG_RCU_FANOUT_LEAF=16 +# CONFIG_RCU_FAST_NO_HZ is not set +# CONFIG_RCU_NOCB_CPU is not set +# CONFIG_TASKS_TRACE_RCU_READ_MB is not set +# end of RCU Subsystem + +# CONFIG_IKCONFIG is not set +CONFIG_IKHEADERS=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +CONFIG_UCLAMP_TASK=y +CONFIG_UCLAMP_BUCKETS_COUNT=5 +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y +# CONFIG_CGROUPS is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_HAS_CPU_RELAX=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PHYTIUM is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +CONFIG_ARCH_ROCKCHIP=y +# CONFIG_ARCH_S32 is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +CONFIG_HAVE_LIVEPATCH_WO_FTRACE=y + +# +# Enable Livepatch +# +# end of Enable Livepatch + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +# CONFIG_ARM64_ERRATUM_826319 is not set +# CONFIG_ARM64_ERRATUM_827319 is not set +# CONFIG_ARM64_ERRATUM_824069 is not set +# CONFIG_ARM64_ERRATUM_819472 is not set +# CONFIG_ARM64_ERRATUM_832075 is not set +CONFIG_ARM64_ERRATUM_843419=y +# CONFIG_ARM64_ERRATUM_1024718 is not set +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +# CONFIG_CAVIUM_ERRATUM_23154 is not set +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y +# CONFIG_HISILICON_ERRATUM_1980005 is not set +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +CONFIG_HISILICON_ERRATUM_HIP08_RU_PREFETCH=y +# CONFIG_HISILICON_HIP08_RU_PREFETCH_DEFAULT_OFF is not set +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y +# CONFIG_ARM64_VA_BITS_48 is not set +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SCHED_MC=y +# CONFIG_SCHED_CLUSTER is not set +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=8 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM64_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_NUMA is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +CONFIG_HZ_1000=y +CONFIG_HZ=1000 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_LLC_128_LINE_SIZE=y +CONFIG_ARCH_HAS_FILTER_PGPROT=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +# CONFIG_KEXEC is not set +# CONFIG_KEXEC_FILE is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_ARM64_PMEM_LEGACY is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +# CONFIG_ARM64_ILP32 is not set +# CONFIG_AARCH32_EL0 is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_AS_HAS_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_CNP=y +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +# CONFIG_ARM64_PTR_AUTH is not set +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +CONFIG_ARM64_AMU_EXTN=y +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +CONFIG_ARM64_BTI=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +CONFIG_ARCH_RANDOM=y +CONFIG_ARM64_AS_HAS_MTE=y +# CONFIG_ARM64_MTE is not set +# end of ARMv8.5 architectural features + +# +# ARMv8.6 architectural features +# +CONFIG_ARM64_TWED=y +# end of ARMv8.6 architectural features + +# +# ARMv8.7 architectural features +# +CONFIG_ARM64_EPAN=y +# end of ARMv8.7 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_SME=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y +# CONFIG_RANDOMIZE_BASE is not set +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +# CONFIG_ASCEND_FEATURES is not set +# end of Kernel Features + +# +# Boot options +# +CONFIG_CMDLINE="" +# CONFIG_EFI is not set +# end of Boot options + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_WAKELOCKS_LIMIT=100 +CONFIG_PM_WAKELOCKS_GC=y +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +# CONFIG_DPM_WATCHDOG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +# CONFIG_ENERGY_MODEL is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +# CONFIG_ARM_PSCI_CPUIDLE is not set +# end of ARM CPU Idle Drivers + +CONFIG_HALTPOLL_CPUIDLE=y +# end of CPU Idle + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_ARM_ROCKCHIP_CPUFREQ=y +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +# CONFIG_ARM_SCMI_PROTOCOL is not set +# CONFIG_ARM_SCPI_PROTOCOL is not set +# CONFIG_ARM_SDE_INTERFACE is not set +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_ROCKCHIP_SIP=y +# CONFIG_GOOGLE_FIRMWARE is not set +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +CONFIG_ARM_SMCCC_SOC_ID=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +# CONFIG_VIRTUALIZATION is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +# CONFIG_CRYPTO_SHA512_ARM64 is not set +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +# CONFIG_CRYPTO_SHA512_ARM64_CE is not set +# CONFIG_CRYPTO_SHA3_ARM64 is not set +# CONFIG_CRYPTO_SM3_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set +# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set +CONFIG_CRYPTO_GHASH_ARM64_CE=y +# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set +# CONFIG_CRYPTO_CHACHA20_NEON is not set +# CONFIG_CRYPTO_POLY1305_NEON is not set +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set +# CONFIG_CRYPTO_AES_ARM64_BS is not set + +# +# General architecture-dependent options +# +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +CONFIG_UPROBES=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y +CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +# CONFIG_GCC_PLUGINS is not set +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_ASN1=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_COMPACTION is not set +# CONFIG_PAGE_REPORTING is not set +CONFIG_MIGRATION=y +# CONFIG_HUGE_VMALLOC_DEFAULT_ENABLED is not set +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +# CONFIG_ETMEM_SCAN is not set +# CONFIG_ETMEM_SWAP is not set +# CONFIG_PAGE_CACHE_LIMIT is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +CONFIG_ZSMALLOC=y +# CONFIG_ZSMALLOC_STAT is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_FRAME_VECTOR=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# CONFIG_PIN_MEMORY is not set +# CONFIG_CLEAR_FREELIST_PAGE is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_ESP=y +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +CONFIG_IP_ROUTE_CLASSID=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=y +CONFIG_IP_MROUTE_COMMON=y +CONFIG_IP_MROUTE=y +# CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set +# CONFIG_IP_PIMSM_V1 is not set +# CONFIG_IP_PIMSM_V2 is not set +CONFIG_SYN_COOKIES=y +# CONFIG_NET_IPVTI is not set +CONFIG_NET_UDP_TUNNEL=y +# CONFIG_NET_FOU is not set +# CONFIG_INET_AH is not set +CONFIG_INET_ESP=y +# CONFIG_INET_ESP_OFFLOAD is not set +# CONFIG_INET_ESPINTCP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_MPTCP is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_NETLINK=y +CONFIG_NETFILTER_FAMILY_BRIDGE=y +CONFIG_NETFILTER_FAMILY_ARP=y +CONFIG_NETFILTER_NETLINK_ACCT=y +CONFIG_NETFILTER_NETLINK_QUEUE=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NETFILTER_NETLINK_OSF=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_LOG_COMMON=y +# CONFIG_NF_LOG_NETDEV is not set +CONFIG_NETFILTER_CONNCOUNT=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_ZONES=y +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_TIMEOUT=y +CONFIG_NF_CONNTRACK_TIMESTAMP=y +CONFIG_NF_CONNTRACK_LABELS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_GRE=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_BROADCAST=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_SNMP=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NF_CT_NETLINK_TIMEOUT=y +CONFIG_NF_CT_NETLINK_HELPER=y +CONFIG_NETFILTER_NETLINK_GLUE_CT=y +CONFIG_NF_NAT=y +CONFIG_NF_NAT_AMANDA=y +CONFIG_NF_NAT_FTP=y +CONFIG_NF_NAT_IRC=y +CONFIG_NF_NAT_SIP=y +CONFIG_NF_NAT_TFTP=y +CONFIG_NF_NAT_REDIRECT=y +CONFIG_NF_NAT_MASQUERADE=y +CONFIG_NETFILTER_SYNPROXY=y +CONFIG_NF_TABLES=y +CONFIG_NF_TABLES_INET=y +CONFIG_NF_TABLES_NETDEV=y +# CONFIG_NFT_NUMGEN is not set +CONFIG_NFT_CT=y +CONFIG_NFT_COUNTER=y +# CONFIG_NFT_CONNLIMIT is not set +CONFIG_NFT_LOG=y +CONFIG_NFT_LIMIT=y +CONFIG_NFT_MASQ=y +CONFIG_NFT_REDIR=y +CONFIG_NFT_NAT=y +# CONFIG_NFT_TUNNEL is not set +# CONFIG_NFT_OBJREF is not set +CONFIG_NFT_QUEUE=y +# CONFIG_NFT_QUOTA is not set +CONFIG_NFT_REJECT=y +CONFIG_NFT_REJECT_INET=y +CONFIG_NFT_COMPAT=y +CONFIG_NFT_HASH=y +# CONFIG_NFT_XFRM is not set +# CONFIG_NFT_SOCKET is not set +# CONFIG_NFT_OSF is not set +# CONFIG_NFT_TPROXY is not set +# CONFIG_NFT_SYNPROXY is not set +# CONFIG_NF_DUP_NETDEV is not set +# CONFIG_NFT_DUP_NETDEV is not set +# CONFIG_NFT_FWD_NETDEV is not set +# CONFIG_NF_FLOW_TABLE is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=y +CONFIG_NETFILTER_XT_CONNMARK=y + +# +# Xtables targets +# +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CT=y +CONFIG_NETFILTER_XT_TARGET_DSCP=y +CONFIG_NETFILTER_XT_TARGET_HL=y +CONFIG_NETFILTER_XT_TARGET_HMARK=y +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y +CONFIG_NETFILTER_XT_TARGET_LED=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_NAT=y +CONFIG_NETFILTER_XT_TARGET_NETMAP=y +CONFIG_NETFILTER_XT_TARGET_NFLOG=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y +CONFIG_NETFILTER_XT_TARGET_RATEEST=y +CONFIG_NETFILTER_XT_TARGET_REDIRECT=y +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y +CONFIG_NETFILTER_XT_TARGET_TEE=y +CONFIG_NETFILTER_XT_TARGET_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_TRACE=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=y + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y +CONFIG_NETFILTER_XT_MATCH_BPF=y +CONFIG_NETFILTER_XT_MATCH_CLUSTER=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y +CONFIG_NETFILTER_XT_MATCH_CONNLABEL=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_CPU=y +CONFIG_NETFILTER_XT_MATCH_DCCP=y +CONFIG_NETFILTER_XT_MATCH_DEVGROUP=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_ECN=y +CONFIG_NETFILTER_XT_MATCH_ESP=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_HL=y +CONFIG_NETFILTER_XT_MATCH_IPCOMP=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_IPVS=y +CONFIG_NETFILTER_XT_MATCH_L2TP=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_NFACCT=y +CONFIG_NETFILTER_XT_MATCH_OSF=y +CONFIG_NETFILTER_XT_MATCH_OWNER=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_RATEEST=y +CONFIG_NETFILTER_XT_MATCH_REALM=y +CONFIG_NETFILTER_XT_MATCH_RECENT=y +CONFIG_NETFILTER_XT_MATCH_SCTP=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +CONFIG_IP_VS=y +# CONFIG_IP_VS_IPV6 is not set +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +# CONFIG_IP_VS_PROTO_ESP is not set +# CONFIG_IP_VS_PROTO_AH is not set +# CONFIG_IP_VS_PROTO_SCTP is not set + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=y +# CONFIG_IP_VS_WRR is not set +# CONFIG_IP_VS_LC is not set +# CONFIG_IP_VS_WLC is not set +# CONFIG_IP_VS_FO is not set +# CONFIG_IP_VS_OVF is not set +# CONFIG_IP_VS_LBLC is not set +# CONFIG_IP_VS_LBLCR is not set +# CONFIG_IP_VS_DH is not set +# CONFIG_IP_VS_SH is not set +# CONFIG_IP_VS_MH is not set +# CONFIG_IP_VS_SED is not set +# CONFIG_IP_VS_NQ is not set + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +# CONFIG_IP_VS_FTP is not set +CONFIG_IP_VS_NFCT=y +# CONFIG_IP_VS_PE_SIP is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=y +CONFIG_NF_SOCKET_IPV4=y +CONFIG_NF_TPROXY_IPV4=y +CONFIG_NF_TABLES_IPV4=y +CONFIG_NFT_REJECT_IPV4=y +CONFIG_NFT_DUP_IPV4=y +# CONFIG_NFT_FIB_IPV4 is not set +CONFIG_NF_TABLES_ARP=y +CONFIG_NF_DUP_IPV4=y +CONFIG_NF_LOG_ARP=y +CONFIG_NF_LOG_IPV4=y +CONFIG_NF_REJECT_IPV4=y +CONFIG_NF_NAT_SNMP_BASIC=y +CONFIG_NF_NAT_PPTP=y +CONFIG_NF_NAT_H323=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_RPFILTER=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_SYNPROXY=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_TARGET_CLUSTERIP=y +CONFIG_IP_NF_TARGET_ECN=y +CONFIG_IP_NF_TARGET_TTL=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +CONFIG_NF_TABLES_IPV6=y +CONFIG_NFT_REJECT_IPV6=y +# CONFIG_NFT_DUP_IPV6 is not set +# CONFIG_NFT_FIB_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=y +CONFIG_NF_LOG_IPV6=y +# CONFIG_IP6_NF_IPTABLES is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=y +# CONFIG_NF_TABLES_BRIDGE is not set +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=y +CONFIG_BRIDGE=y +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +# CONFIG_BRIDGE_MRP is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=y +# CONFIG_VLAN_8021Q_GVRP is not set +# CONFIG_VLAN_8021Q_MVRP is not set +# CONFIG_DECNET is not set +CONFIG_LLC=y +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFB is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_CBS is not set +# CONFIG_NET_SCH_ETF is not set +# CONFIG_NET_SCH_TAPRIO is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_DRR is not set +# CONFIG_NET_SCH_MQPRIO is not set +# CONFIG_NET_SCH_SKBPRIO is not set +# CONFIG_NET_SCH_CHOKE is not set +# CONFIG_NET_SCH_QFQ is not set +# CONFIG_NET_SCH_CODEL is not set +# CONFIG_NET_SCH_FQ_CODEL is not set +# CONFIG_NET_SCH_CAKE is not set +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_HHF is not set +# CONFIG_NET_SCH_PIE is not set +# CONFIG_NET_SCH_PLUG is not set +# CONFIG_NET_SCH_ETS is not set +# CONFIG_NET_SCH_DEFAULT is not set + +# +# Classification +# +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +# CONFIG_NET_CLS_BPF is not set +# CONFIG_NET_CLS_FLOWER is not set +# CONFIG_NET_CLS_MATCHALL is not set +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_CLS_ACT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +# CONFIG_BT_RFCOMM_TTY is not set +# CONFIG_BT_BNEP is not set +CONFIG_BT_HIDP=y +CONFIG_BT_HS=y +CONFIG_BT_LE=y +# CONFIG_BT_LEDS is not set +# CONFIG_BT_MSFTEXT is not set +CONFIG_BT_DEBUGFS=y +# CONFIG_BT_SELFTEST is not set + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y +# CONFIG_BT_MTKSDIO is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_MESSAGE_TRACING is not set +CONFIG_MAC80211_DEBUG_MENU=y +# CONFIG_MAC80211_NOINLINE is not set +CONFIG_MAC80211_VERBOSE_DEBUG=y +# CONFIG_MAC80211_MLME_DEBUG is not set +# CONFIG_MAC80211_STA_DEBUG is not set +# CONFIG_MAC80211_HT_DEBUG is not set +# CONFIG_MAC80211_OCB_DEBUG is not set +# CONFIG_MAC80211_IBSS_DEBUG is not set +# CONFIG_MAC80211_PS_DEBUG is not set +# CONFIG_MAC80211_TDLS_DEBUG is not set +# CONFIG_MAC80211_DEBUG_COUNTERS is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_GPIO is not set +# CONFIG_RFKILL_RK is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_PAGE_POOL=y +# CONFIG_FAILOVER is not set +CONFIG_ETHTOOL_NETLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +# CONFIG_PCIEAER_INJECT is not set +# CONFIG_PCIE_ECRC is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEFAULT is not set +CONFIG_PCIEASPM_POWERSAVE=y +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_DPC is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCIE_XILINX is not set +# CONFIG_PCI_XGENE is not set +# CONFIG_PCIE_ALTERA is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set +# CONFIG_PCIE_ROCKCHIP_HOST is not set + +# +# DesignWare PCI Core Support +# +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCIE_DW_ROCKCHIP is not set +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCI_J721E_HOST is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +# CONFIG_FW_LOADER_COMPRESS is not set +CONFIG_FW_CACHE=y +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_DEVRES=y +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_MOXTET is not set +# CONFIG_SIMPLE_PM_BUS is not set +# CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_MHI_BUS is not set +# end of Bus devices + +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_GNSS is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +# CONFIG_MTD_ONENAND is not set +# CONFIG_MTD_RAW_NAND is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_MTD_UBI is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +CONFIG_CDROM=y +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +CONFIG_ZRAM=y +# CONFIG_ZRAM_WRITEBACK is not set +# CONFIG_ZRAM_MEMORY_TRACKING is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=y +CONFIG_BLK_DEV_NVME=y +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_HWMON is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# CONFIG_NVME_TARGET is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +# CONFIG_UACCE is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=y +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_RAMAXEL_SPRAID is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y +# CONFIG_ATA is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=y +# CONFIG_DM_DEBUG is not set +CONFIG_DM_BUFIO=y +# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set +CONFIG_DM_BIO_PRISON=y +CONFIG_DM_PERSISTENT_DATA=y +# CONFIG_DM_UNSTRIPED is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +CONFIG_DM_THIN_PROVISIONING=y +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_INIT is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=y +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=y +# CONFIG_MACVTAP is not set +CONFIG_IPVLAN_L3S=y +CONFIG_IPVLAN=y +# CONFIG_IPVTAP is not set +CONFIG_VXLAN=y +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_TUN is not set +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# Distributed Switch Architecture drivers +# +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +# CONFIG_ENA_ETHERNET is not set +# CONFIG_NET_VENDOR_AMD is not set +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_AQTION is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +CONFIG_NET_VENDOR_CADENCE=y +# CONFIG_MACB is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +CONFIG_NET_VENDOR_HUAWEI=y +# CONFIG_BMA is not set +# CONFIG_NET_VENDOR_INTEL is not set +CONFIG_NET_VENDOR_NETSWIFT=y +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +CONFIG_NET_VENDOR_MICROSEMI=y +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_ROCKCHIP=y +CONFIG_DWMAC_ROCKCHIP_TOOL=y +# CONFIG_DWMAC_RK_AUTO_DELAYLINE is not set +# CONFIG_DWMAC_INTEL_PLAT is not set +# CONFIG_STMMAC_PCI is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_NET_VENDOR_XILINX=y +# CONFIG_XILINX_AXI_EMAC is not set +# CONFIG_XILINX_LL_TEMAC is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MARVELL_10G_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_AT803X_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_RENESAS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +# CONFIG_MDIO_THUNDER is not set + +# +# MDIO Multiplexers +# +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOE=y +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +# CONFIG_SLIP is not set +CONFIG_SLHC=y +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +CONFIG_USB_RTL8150=y +CONFIG_USB_RTL8152=y +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +CONFIG_USB_NET_HUAWEI_CDC_NCM=y +CONFIG_USB_NET_CDC_MBIM=y +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +# CONFIG_ATH10K is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_BRCMSMAC is not set +# CONFIG_BRCMFMAC is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +CONFIG_LIBERTAS_THINFIRM=y +# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set +# CONFIG_LIBERTAS_THINFIRM_USB is not set +CONFIG_MWIFIEX=m +CONFIG_MWIFIEX_SDIO=m +# CONFIG_MWIFIEX_PCIE is not set +# CONFIG_MWIFIEX_USB is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +# CONFIG_MT7663U is not set +# CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=y +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTW88 is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +# CONFIG_WL18XX is not set +# CONFIG_WLCORE is not set +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +CONFIG_WL_ROCKCHIP=y +CONFIG_WIFI_BUILD_MODULE=y +CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y +# CONFIG_WIFI_GENERATE_RANDOM_MAC_ADDR is not set +# CONFIG_MXMWIFIEX is not set +# CONFIG_MAC80211_HWSIM is not set +CONFIG_USB_NET_RNDIS_WLAN=y +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_NETDEVSIM is not set +# CONFIG_NET_FAILOVER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ADC=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +CONFIG_MOUSE_CYAPA=y +CONFIG_MOUSE_ELAN_I2C=y +CONFIG_MOUSE_ELAN_I2C_I2C=y +# CONFIG_MOUSE_ELAN_I2C_SMBUS is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +CONFIG_TOUCHSCREEN_EDT_FT5X06=y +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +CONFIG_TOUCHSCREEN_USB_COMPOSITE=y +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_JASTEC=y +CONFIG_TOUCHSCREEN_USB_ELO=y +CONFIG_TOUCHSCREEN_USB_E2I=y +CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y +CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y +CONFIG_TOUCHSCREEN_USB_NEXIO=y +CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_16550A_VARIANTS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=5 +CONFIG_SERIAL_8250_RUNTIME_UARTS=5 +# CONFIG_SERIAL_8250_EXTENDED is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_SERIAL_DEV_BUS is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_VIRTIO_CONSOLE is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_HW_RANDOM_ROCKCHIP is not set +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +# CONFIG_RAW_DRIVER is not set +CONFIG_DEVPORT=y +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +# CONFIG_TCG_TIS is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +# CONFIG_XILLYBUS is not set +# end of Character devices + +# CONFIG_RANDOM_TRUST_CPU is not set +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +# CONFIG_I2C_MUX_PCA954x is not set +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_HISI is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +CONFIG_I2C_RK3X=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set +# CONFIG_PTP_1588_CLOCK_IDTCM is not set +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_ROCKCHIP=y +# CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +CONFIG_PINCTRL_RK805=y +# CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_CADENCE is not set +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +# CONFIG_GPIO_MB86S7X is not set +# CONFIG_GPIO_PL061 is not set +CONFIG_GPIO_ROCKCHIP=y +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_XGENE is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_TPS6586X is not set +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +CONFIG_W1=y +CONFIG_W1_CON=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_MATROX is not set +# CONFIG_W1_MASTER_DS2490 is not set +CONFIG_W1_MASTER_DS2482=y +# CONFIG_W1_MASTER_DS1WM is not set +# CONFIG_W1_MASTER_GPIO is not set +# CONFIG_W1_MASTER_SGI is not set +# end of 1-wire Bus Masters + +# +# 1-wire Slaves +# +CONFIG_W1_SLAVE_THERM=y +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2405 is not set +# CONFIG_W1_SLAVE_DS2408 is not set +# CONFIG_W1_SLAVE_DS2413 is not set +# CONFIG_W1_SLAVE_DS2406 is not set +# CONFIG_W1_SLAVE_DS2423 is not set +# CONFIG_W1_SLAVE_DS2805 is not set +# CONFIG_W1_SLAVE_DS2430 is not set +# CONFIG_W1_SLAVE_DS2431 is not set +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2438 is not set +# CONFIG_W1_SLAVE_DS250X is not set +# CONFIG_W1_SLAVE_DS2780 is not set +# CONFIG_W1_SLAVE_DS2781 is not set +# CONFIG_W1_SLAVE_DS28E04 is not set +# CONFIG_W1_SLAVE_DS28E17 is not set +# end of 1-wire Slaves + +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_SBS=y +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1721X is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +CONFIG_CHARGER_GPIO=y +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +CONFIG_CHARGER_BQ24735=y +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM1177 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CORSAIR_CPRO is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_CPU_THERMAL=y +CONFIG_CPU_FREQ_THERMAL=y +CONFIG_DEVFREQ_THERMAL=y +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_THERMAL_MMIO is not set +CONFIG_ROCKCHIP_THERMAL=y +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_INTEL_PMT is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +CONFIG_MFD_TPS6586X=y +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +# CONFIG_MFD_KHADAS_MCU is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +CONFIG_REGULATOR_ACT8865=y +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +# CONFIG_REGULATOR_FAN53880 is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MAX77826 is not set +# CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set +# CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set +# CONFIG_REGULATOR_MPQ7920 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set +# CONFIG_REGULATOR_SY8827N is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_TPS6586X=y +# CONFIG_REGULATOR_VCTRL is not set +CONFIG_RC_CORE=y +CONFIG_RC_MAP=y +# CONFIG_LIRC is not set +CONFIG_RC_DECODERS=y +CONFIG_IR_NEC_DECODER=y +# CONFIG_IR_RC5_DECODER is not set +# CONFIG_IR_RC6_DECODER is not set +# CONFIG_IR_JVC_DECODER is not set +# CONFIG_IR_SONY_DECODER is not set +# CONFIG_IR_SANYO_DECODER is not set +# CONFIG_IR_SHARP_DECODER is not set +# CONFIG_IR_MCE_KBD_DECODER is not set +# CONFIG_IR_XMP_DECODER is not set +# CONFIG_IR_IMON_DECODER is not set +# CONFIG_IR_RCMM_DECODER is not set +# CONFIG_RC_DEVICES is not set +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +# CONFIG_MEDIA_CEC_RC is not set +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_CH7322 is not set +# CONFIG_USB_PULSE8_CEC is not set +# CONFIG_USB_RAINSHADOW_CEC is not set +CONFIG_MEDIA_SUPPORT=y +# CONFIG_MEDIA_SUPPORT_FILTER is not set +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +# end of Media device types + +# +# Media core support +# +CONFIG_VIDEO_DEV=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=y +# end of Media core support + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_V4L2_MEM2MEM_DEV=y +CONFIG_V4L2_FWNODE=y +# end of Video4Linux options + +# +# Media controller options +# +# CONFIG_MEDIA_CONTROLLER_DVB is not set +# end of Media controller options + +# +# Digital TV options +# +# CONFIG_DVB_MMAP is not set +CONFIG_DVB_NET=y +CONFIG_DVB_MAX_ADAPTERS=16 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=y +# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set +# CONFIG_USB_GSPCA is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set + +# +# Analog/digital TV USB devices +# +# CONFIG_VIDEO_AU0828 is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_TM6000 is not set + +# +# Digital TV USB devices +# +# CONFIG_DVB_USB is not set +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set + +# +# Software defined radio USB devices +# +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_RADIO_SI470X is not set +# CONFIG_RADIO_SI4713 is not set +# CONFIG_USB_MR800 is not set +# CONFIG_USB_DSBR is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_SHARK is not set +# CONFIG_RADIO_SHARK2 is not set +# CONFIG_USB_KEENE is not set +# CONFIG_USB_RAREMONO is not set +# CONFIG_USB_MA901 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_RADIO_SAA7706H is not set +# CONFIG_RADIO_TEF6862 is not set +# CONFIG_RADIO_WL1273 is not set +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_V4L2=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_VMALLOC=y +CONFIG_VIDEOBUF2_DMA_SG=y +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_CADENCE is not set +# CONFIG_VIDEO_ASPEED is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_VIDEO_ROCKCHIP_CIF is not set +# CONFIG_VIDEO_ROCKCHIP_ISP is not set +# CONFIG_VIDEO_ROCKCHIP_ISPP is not set +# CONFIG_VIDEO_ROCKCHIP_HDMIRX is not set +# CONFIG_VIDEO_XILINX is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +CONFIG_VIDEO_ROCKCHIP_RGA=y +# CONFIG_DVB_PLATFORM_DRIVERS is not set +# CONFIG_SDR_PLATFORM_DRIVERS is not set + +# +# MMC/SDIO DVB adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_TEST_DRIVERS is not set +# end of Media drivers + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y +# CONFIG_VIDEO_IR_I2C is not set + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA1997X is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set +# CONFIG_VIDEO_MAX9286 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set +# end of Video decoders + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips + +# +# Camera sensor devices +# +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set +# end of SPI helper chips + +# +# Media SPI Adapters +# +CONFIG_CXD2880_SPI_DRV=m +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=y + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18250=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MSI001=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_M88RS6000T=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_SI2157=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_R820T=m +CONFIG_MEDIA_TUNER_MXL301RF=m +CONFIG_MEDIA_TUNER_QM1D1C0042=m +CONFIG_MEDIA_TUNER_QM1D1B0004=m +# end of Customize TV tuners + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV0910=m +CONFIG_DVB_STV6110x=m +CONFIG_DVB_STV6111=m +CONFIG_DVB_MXL5XX=m +CONFIG_DVB_M88DS3103=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_TDA18271C2DD=m +CONFIG_DVB_SI2165=m +CONFIG_DVB_MN88472=m +CONFIG_DVB_MN88473=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10039=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24117=m +CONFIG_DVB_CX24120=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_MB86A16=m +CONFIG_DVB_TDA10071=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_S5H1432=m +CONFIG_DVB_DRXD=m +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DIB9000=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_AF9013=m +CONFIG_DVB_EC100=m +CONFIG_DVB_STV0367=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_CXD2841ER=m +CONFIG_DVB_RTL2830=m +CONFIG_DVB_RTL2832=m +CONFIG_DVB_RTL2832_SDR=m +CONFIG_DVB_SI2168=m +CONFIG_DVB_ZD1301_DEMOD=m +CONFIG_DVB_CXD2880=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LGDT3306A=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +# CONFIG_DVB_AU8522_V4L is not set +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_S921=m +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +CONFIG_DVB_TC90522=m +CONFIG_DVB_MN88443X=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_DRX39XYJ=m +CONFIG_DVB_LNBH25=m +CONFIG_DVB_LNBH29=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_A8293=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_TDA665x=m +CONFIG_DVB_IX2505V=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_AF9033=m +CONFIG_DVB_HORUS3A=m +CONFIG_DVB_ASCOT2E=m +CONFIG_DVB_HELENE=m + +# +# Common Interface (EN50221) controller drivers +# +CONFIG_DVB_CXD2099=m +CONFIG_DVB_SP2=m +# end of Customise DVB Frontends + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set +# end of Media ancillary drivers + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +CONFIG_DRM=y +CONFIG_DRM_EDID=y +CONFIG_DRM_IGNORE_IOTCL_PERMIT=y +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_GEM_CMA_HELPER=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +CONFIG_DRM_ROCKCHIP=y +# CONFIG_ROCKCHIP_DRM_CUBIC_LUT is not set +CONFIG_ROCKCHIP_DRM_DEBUG=y +# CONFIG_ROCKCHIP_DRM_DIRECT_SHOW is not set +# CONFIG_ROCKCHIP_VOP is not set +# CONFIG_ROCKCHIP_VOP2 is not set +# CONFIG_ROCKCHIP_ANALOGIX_DP is not set +CONFIG_ROCKCHIP_CDN_DP=y +CONFIG_ROCKCHIP_DW_HDMI=y +CONFIG_ROCKCHIP_DW_MIPI_DSI=y +# CONFIG_ROCKCHIP_DW_DP is not set +CONFIG_ROCKCHIP_INNO_HDMI=y +CONFIG_ROCKCHIP_LVDS=y +CONFIG_ROCKCHIP_RGB=y +# CONFIG_ROCKCHIP_RK3066_HDMI is not set +# CONFIG_ROCKCHIP_VCONN is not set +# CONFIG_DRM_ROCKCHIP_VVOP is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_RCAR_LVDS is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set +# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set +# CONFIG_DRM_PANEL_LVDS is not set +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set +# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set +# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7703 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +# CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_LONTIUM_LT9611 is not set +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_SIMPLE_BRIDGE is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set +CONFIG_DRM_DW_HDMI=y +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI_I2S_AUDIO=y +CONFIG_DRM_DW_HDMI_CEC=y +CONFIG_DRM_DW_MIPI_DSI=y +# end of Display Interface Bridges + +# CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_MXSFB is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_DRM_PL111 is not set +# CONFIG_DRM_LIMA is not set +# CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_TIDSS is not set +# CONFIG_DRM_LEGACY is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +CONFIG_MALI400=y +CONFIG_MALI450=y +# CONFIG_MALI470 is not set +# CONFIG_MALI400_DEBUG is not set +# CONFIG_MALI400_PROFILING is not set +# CONFIG_MALI400_UMP is not set +CONFIG_MALI_DMA_BUF_MAP_ON_ATTACH=y +CONFIG_MALI_SHARED_INTERRUPTS=y +# CONFIG_MALI_PMU_PARALLEL_POWER_UP is not set +CONFIG_MALI_DT=y +CONFIG_MALI_DEVFREQ=y +# CONFIG_MALI_QUIET is not set +CONFIG_MALI_MIDGARD=y +# CONFIG_MALI_GATOR_SUPPORT is not set +# CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set +# CONFIG_MALI_DMA_FENCE is not set +CONFIG_MALI_EXPERT=y +# CONFIG_MALI_CORESTACK is not set +# CONFIG_MALI_PRFCNT_SET_SECONDARY is not set +# CONFIG_MALI_PLATFORM_FAKE is not set +# CONFIG_MALI_PLATFORM_DEVICETREE is not set +CONFIG_MALI_PLATFORM_THIRDPARTY=y +CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" +CONFIG_MALI_DEBUG=y +CONFIG_MALI_FENCE_DEBUG=y +# CONFIG_MALI_NO_MALI is not set +# CONFIG_MALI_TRACE_TIMELINE is not set +# CONFIG_MALI_SYSTEM_TRACE is not set +# CONFIG_MALI_GPU_MMU_AARCH64 is not set +CONFIG_MALI_PWRSOFT_765=y +# CONFIG_MALI_KUTF is not set +# CONFIG_MALI_BIFROST is not set + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# CONFIG_BACKLIGHT_LED is not set +# end of Backlight & LCD device support + +# +# Rockchip Misc Video driver +# + +# +# RGA +# +# CONFIG_ROCKCHIP_RGA is not set +# end of RGA + +CONFIG_ROCKCHIP_RGA2=y +# CONFIG_ROCKCHIP_RGA2_PROC_FS is not set +CONFIG_ROCKCHIP_RGA2_DEBUG_FS=y +CONFIG_ROCKCHIP_RGA2_DEBUGGER=y +# CONFIG_ROCKCHIP_MULTI_RGA is not set +# CONFIG_ROCKCHIP_RVE is not set + +# +# IEP +# +# CONFIG_IEP is not set +# end of IEP + +CONFIG_ROCKCHIP_MPP_SERVICE=y +CONFIG_ROCKCHIP_MPP_PROC_FS=y +# CONFIG_ROCKCHIP_MPP_RKVDEC is not set +# CONFIG_ROCKCHIP_MPP_RKVDEC2 is not set +# CONFIG_ROCKCHIP_MPP_RKVENC is not set +# CONFIG_ROCKCHIP_MPP_RKVENC2 is not set +# CONFIG_ROCKCHIP_MPP_VDPU1 is not set +# CONFIG_ROCKCHIP_MPP_VEPU1 is not set +# CONFIG_ROCKCHIP_MPP_VDPU2 is not set +# CONFIG_ROCKCHIP_MPP_VEPU2 is not set +# CONFIG_ROCKCHIP_MPP_IEP2 is not set +# CONFIG_ROCKCHIP_MPP_JPGDEC is not set +# CONFIG_ROCKCHIP_MPP_AV1DEC is not set +# CONFIG_ROCKCHIP_DVBM is not set +# end of Rockchip Misc Video driver + +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +# CONFIG_LOGO is not set +# end of Graphics support + +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_SEQ_DEVICE=y +CONFIG_SND_RAWMIDI=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +CONFIG_SND_HRTIMER=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +# CONFIG_SND_SUPPORT_OLD_API is not set +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_SEQUENCER=y +CONFIG_SND_SEQ_DUMMY=y +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_SEQ_MIDI_EVENT=y +CONFIG_SND_SEQ_MIDI=y +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_PCI is not set + +# +# HD-Audio +# +# end of HD-Audio + +CONFIG_SND_HDA_PREALLOC_SIZE=64 +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_MTK_BTCVSD is not set +CONFIG_SND_SOC_ROCKCHIP=y +CONFIG_SND_SOC_ROCKCHIP_I2S=y +# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM is not set +# CONFIG_SND_SOC_ROCKCHIP_PDM is not set +CONFIG_SND_SOC_ROCKCHIP_SPDIF=y +# CONFIG_SND_SOC_ROCKCHIP_SPDIFRX is not set +# CONFIG_SND_SOC_ROCKCHIP_VAD is not set +CONFIG_SND_SOC_ROCKCHIP_MAX98090=y +CONFIG_SND_SOC_ROCKCHIP_MULTICODECS=y +CONFIG_SND_SOC_ROCKCHIP_RT5645=y +# CONFIG_SND_SOC_ROCKCHIP_HDMI is not set +# CONFIG_SND_SOC_RK3288_HDMI_ANALOG is not set +# CONFIG_SND_SOC_RK3399_GRU_SOUND is not set +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_ADAU7118_HW is not set +# CONFIG_SND_SOC_ADAU7118_I2C is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4234 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_DA7213 is not set +# CONFIG_SND_SOC_DMIC is not set +# CONFIG_SND_SOC_DUMMY_CODEC is not set +CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_ES7134 is not set +# CONFIG_SND_SOC_ES7241 is not set +CONFIG_SND_SOC_ES8316=y +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +CONFIG_SND_SOC_MAX98090=y +# CONFIG_SND_SOC_MAX98357A is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX98373_I2C is not set +# CONFIG_SND_SOC_MAX98390 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +CONFIG_SND_SOC_RK3328=y +CONFIG_SND_SOC_RK817=y +# CONFIG_SND_SOC_RK_CODEC_DIGITAL is not set +CONFIG_SND_SOC_RL6231=y +CONFIG_SND_SOC_RT5616=y +# CONFIG_SND_SOC_RT5631 is not set +CONFIG_SND_SOC_RT5645=y +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +CONFIG_SND_SOC_SPDIF=y +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set +# CONFIG_SND_SOC_TAS2770 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set +CONFIG_SND_SOC_TS3A227E=y +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8904 is not set +CONFIG_SND_SOC_WM8960=y +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_MT6660 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8822 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# end of CODEC drivers + +CONFIG_SND_SIMPLE_CARD_UTILS=y +CONFIG_SND_SIMPLE_CARD=y +# CONFIG_SND_AUDIO_GRAPH_CARD is not set + +# +# HID support +# +CONFIG_HID=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_BIGBEN_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELAN is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_REDRAGON is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +CONFIG_HID_MULTITOUCH=y +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_U2FZERO is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y +# end of USB HID support + +# +# I2C HID support +# +CONFIG_I2C_HID=y +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_LED_TRIG is not set +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEFAULT_PERSIST is not set +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_HCD_PCI is not set +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +# CONFIG_USB_MUSB_HDRC is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_HAPS=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +CONFIG_USB_SERIAL_CP210X=y +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=y +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +CONFIG_USB_SERIAL_KEYSPAN=y +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OTI6858=y +# CONFIG_USB_SERIAL_QCAUX is not set +CONFIG_USB_SERIAL_QUALCOMM=y +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=y +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_EZUSB_FX2=y +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +CONFIG_USB_GADGET_DEBUG_FILES=y +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_SNP_UDC_PLAT is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_ACM=y +CONFIG_USB_U_SERIAL=y +CONFIG_USB_U_ETHER=y +CONFIG_USB_F_RNDIS=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_FS=y +CONFIG_USB_F_MIDI=y +CONFIG_USB_F_HID=y +CONFIG_USB_CONFIGFS=y +# CONFIG_USB_CONFIGFS_SERIAL is not set +CONFIG_USB_CONFIGFS_ACM=y +# CONFIG_USB_CONFIGFS_OBEX is not set +# CONFIG_USB_CONFIGFS_NCM is not set +# CONFIG_USB_CONFIGFS_ECM is not set +# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set +CONFIG_USB_CONFIGFS_RNDIS=y +# CONFIG_USB_CONFIGFS_EEM is not set +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_HID=y +# CONFIG_USB_CONFIGFS_F_UVC is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + +CONFIG_TYPEC=y +CONFIG_TYPEC_TCPM=y +# CONFIG_TYPEC_TCPCI is not set +CONFIG_TYPEC_FUSB302=y +# CONFIG_TYPEC_UCSI is not set +# CONFIG_TYPEC_HD3SS3220 is not set +# CONFIG_TYPEC_TPS6598X is not set +# CONFIG_TYPEC_STUSB160X is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +# CONFIG_TYPEC_MUX_PI3USB30532 is not set +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +# CONFIG_TYPEC_DP_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +CONFIG_MMC_TEST=y + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set +# CONFIG_MMC_SDHCI_CADENCE is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +# CONFIG_MMC_SDHCI_MILBEAUT is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_K3 is not set +# CONFIG_MMC_DW_PCI is not set +CONFIG_MMC_DW_ROCKCHIP=y +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MMC_SDHCI_XENON is not set +# CONFIG_MMC_SDHCI_OMAP is not set +# CONFIG_MMC_SDHCI_AM654 is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_CLASS_MULTICOLOR is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_AW2013 is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_EL15203000 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set +# CONFIG_LEDS_LP55XX_COMMON is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +CONFIG_LEDS_IS31FL32XX=y + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_SYSCON is not set +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_TI_LMU_COMMON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +CONFIG_LEDS_TRIGGER_TRANSIENT=y +CONFIG_LEDS_TRIGGER_CAMERA=y +# CONFIG_LEDS_TRIGGER_PANIC is not set +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_PATTERN is not set +# CONFIG_LEDS_TRIGGER_AUDIO is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +CONFIG_RTC_DRV_HYM8563=y +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RK808 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_TPS6586X is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +CONFIG_RTC_DRV_RX8010=y +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +# CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +# CONFIG_BCM_SBA_RAID is not set +# CONFIG_DW_AXI_DMAC is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_FSL_QDMA is not set +# CONFIG_HISI_DMA is not set +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_MV_XOR_V2 is not set +CONFIG_PL330_DMA=y +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set +# CONFIG_SF_PDMA is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set + +# +# DMABUF options +# +CONFIG_DMABUF_CACHE=y +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# CONFIG_DMABUF_SYSFS_STATS is not set +# CONFIG_DMABUF_HEAPS_ROCKCHIP is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO_MENU=y +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_MMIO is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# CONFIG_AD7280 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set +# end of Active energy metering IC + +# +# Resolver to digital converters +# +# CONFIG_AD2S1210 is not set +# end of Resolver to digital converters +# end of IIO staging drivers + +# CONFIG_FB_SM750 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_ASHMEM is not set +# CONFIG_DEBUG_KINFO is not set +# CONFIG_ION is not set +# CONFIG_FIQ_DEBUGGER is not set +# CONFIG_RK_CONSOLE_THREAD is not set +# end of Android + +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_KS7010 is not set +# CONFIG_PI433 is not set + +# +# Gasket devices +# +# CONFIG_STAGING_GASKET_FRAMEWORK is not set +# end of Gasket devices + +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_FIELDBUS_DEV is not set +# CONFIG_QLGE is not set +# CONFIG_WFX is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +# CONFIG_CROS_EC is not set +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX9485 is not set +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_CLK_QORIQ is not set +CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMMON_CLK_PWM is not set +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_COMMON_CLK_ROCKCHIP=y +# CONFIG_CLK_PX30 is not set +# CONFIG_CLK_RK3328 is not set +# CONFIG_CLK_RK3368 is not set +CONFIG_CLK_RK3399=y +# CONFIG_ROCKCHIP_CLK_COMPENSATION is not set +# CONFIG_ROCKCHIP_CLK_LINK is not set +CONFIG_ROCKCHIP_CLK_BOOST=y +CONFIG_ROCKCHIP_CLK_INV=y +CONFIG_ROCKCHIP_CLK_PVTM=y +CONFIG_ROCKCHIP_DDRCLK=y +# CONFIG_ROCKCHIP_DDRCLK_SCPI is not set +CONFIG_ROCKCHIP_DDRCLK_SIP=y +CONFIG_ROCKCHIP_DDRCLK_SIP_V2=y +CONFIG_ROCKCHIP_PLL_RK3066=y +CONFIG_ROCKCHIP_PLL_RK3399=y +# CONFIG_ROCKCHIP_PLL_RK3588 is not set +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_ROCKCHIP_TIMER=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +CONFIG_MAILBOX=y +# CONFIG_ARM_MHU is not set +# CONFIG_PLATFORM_MHU is not set +# CONFIG_PL320_MBOX is not set +# CONFIG_ROCKCHIP_MBOX is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ROCKCHIP_IOMMU=y +# CONFIG_ARM_SMMU is not set +# CONFIG_ARM_SMMU_V3 is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +# CONFIG_FSL_RCPM is not set +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +# +# Rockchip CPU selection +# +CONFIG_CPU_PX30=y +# CONFIG_CPU_RK1808 is not set +# CONFIG_CPU_RK3308 is not set +CONFIG_CPU_RK3328=y +CONFIG_CPU_RK3368=y +CONFIG_CPU_RK3399=y +# CONFIG_CPU_RK3568 is not set +# CONFIG_CPU_RK3588 is not set +# end of Rockchip CPU selection + +CONFIG_NO_GKI=y +CONFIG_ROCKCHIP_CPUINFO=y +CONFIG_ROCKCHIP_GRF=y +# CONFIG_ROCKCHIP_HW_DECOMPRESS is not set +CONFIG_ROCKCHIP_IODOMAIN=y +# CONFIG_ROCKCHIP_IOMUX is not set +CONFIG_ROCKCHIP_IPA=y +CONFIG_ROCKCHIP_OPP=y +# CONFIG_ROCKCHIP_PERFORMANCE is not set +CONFIG_ROCKCHIP_PM_DOMAINS=y +CONFIG_ROCKCHIP_PVTM=y +# CONFIG_ROCKCHIP_RAMDISK is not set +CONFIG_ROCKCHIP_SUSPEND_MODE=y +CONFIG_ROCKCHIP_SYSTEM_MONITOR=y +# CONFIG_ROCKCHIP_VENDOR_STORAGE is not set +# CONFIG_ROCKCHIP_VENDOR_STORAGE_UPDATE_LOADER is not set +# CONFIG_ROCKCHIP_DEBUG is not set +# CONFIG_ROCKCHIP_MINI_KERNEL is not set +# CONFIG_ROCKCHIP_THUNDER_BOOT is not set +# CONFIG_ROCKCHIP_NPOR_POWERGOOD is not set +# CONFIG_RK_CMA_PROCFS is not set +# CONFIG_RK_DMABUF_PROCFS is not set +# CONFIG_RK_MEMBLOCK_PROCFS is not set +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set +# CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ is not set +CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y +# CONFIG_DEVFREQ_EVENT_ROCKCHIP_NOCP is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_PTN5150 is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +# CONFIG_EXTCON_USB_GPIO is not set +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGERED_BUFFER=y +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set +# CONFIG_IIO_TRIGGERED_EVENT is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMA400 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7091R5 is not set +# CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7292 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_ADI_AXI_ADC is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2496 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +# CONFIG_NAU7802 is not set +CONFIG_ROCKCHIP_SARADC=y +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set +# end of Amplifiers + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_SCD30_CORE is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +# +# Hid Sensor IIO Common +# +# end of Hid Sensor IIO Common + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_FXOS8700_I2C is not set +# CONFIG_FXOS8700_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_ICM42600_I2C is not set +# CONFIG_INV_ICM42600_SPI is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP002 is not set +# CONFIG_GP2AP020A00F is not set +CONFIG_SENSORS_ISL29018=y +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +CONFIG_SENSORS_TSL2563=y +CONFIG_TSL2583=y +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6030 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +CONFIG_IIO_SYSFS_TRIGGER=y +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +# CONFIG_DLHL60D is not set +# CONFIG_DPS310 is not set +# CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_PING is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +# CONFIG_LTC2983 is not set +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set +CONFIG_PWM_ROCKCHIP=y + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_AL_FIC is not set +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_TI_SYSCON is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PHY_MIPI_DPHY=y +# CONFIG_PHY_XGENE is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_FSL_IMX8MQ_USB is not set +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +# CONFIG_PHY_ROCKCHIP_CSI2_DPHY is not set +CONFIG_PHY_ROCKCHIP_DP=y +# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set +CONFIG_PHY_ROCKCHIP_EMMC=y +# CONFIG_PHY_ROCKCHIP_INNO_COMBPHY is not set +CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_INNO_USB3=y +CONFIG_PHY_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y +# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set +CONFIG_PHY_ROCKCHIP_MIPI_RX=y +# CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY is not set +# CONFIG_PHY_ROCKCHIP_NANENG_EDP is not set +# CONFIG_PHY_ROCKCHIP_NANENG_USB2 is not set +CONFIG_PHY_ROCKCHIP_PCIE=y +# CONFIG_PHY_ROCKCHIP_SAMSUNG_DCPHY is not set +# CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX is not set +# CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI is not set +# CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set +CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_PHY_ROCKCHIP_USB=y +# CONFIG_PHY_ROCKCHIP_USBDP is not set +# CONFIG_PHY_SAMSUNG_USB2 is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +# CONFIG_HISI_PCIE_PMU is not set +# end of Performance monitor support + +CONFIG_RAS=y +# CONFIG_USB4 is not set + +# +# Android +# +CONFIG_ANDROID=y +# CONFIG_ANDROID_BINDER_IPC is not set +# end of Android + +# +# Vendor Hooks +# +# CONFIG_VENDOR_HOOKS is not set +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +CONFIG_ROCKCHIP_EFUSE=y +# CONFIG_ROCKCHIP_OTP is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +# CONFIG_TEE is not set +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set +# CONFIG_RK_FLASH is not set +# CONFIG_RK_NAND is not set + +# +# Headset device support +# +CONFIG_RK_HEADSET=y +# end of Headset device support + +# +# RKNPU +# +# CONFIG_ROCKCHIP_RKNPU is not set +# end of RKNPU +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_XFS_FS=y +CONFIG_XFS_SUPPORT_V4=y +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_ONLINE_SCRUB is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=y +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +# CONFIG_DNOTIFY is not set +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_FUSE_FS=y +# CONFIG_CUSE is not set +# CONFIG_VIRTIO_FS is not set +CONFIG_OVERLAY_FS=y +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=936 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_RW=y +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_INODE64 is not set +# CONFIG_HUGETLBFS is not set +CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +# CONFIG_SQUASHFS_XZ is not set +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +CONFIG_PSTORE_CONSOLE=y +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_FTRACE is not set +CONFIG_PSTORE_RAM=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y +# CONFIG_NFS_V4_1 is not set +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_SWAP=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +CONFIG_NLS_CODEPAGE_936=y +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set +# CONFIG_UNICODE is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +CONFIG_SECURITYFS=y +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options + +# CONFIG_SECURITY_BOOT_INIT is not set +# end of Security options + +CONFIG_XOR_BLOCKS=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_SIMD=y + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +# CONFIG_CRYPTO_CURVE25519 is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_XXHASH=y +CONFIG_CRYPTO_BLAKE2B=y +# CONFIG_CRYPTO_BLAKE2S is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_SM3_GENERIC is not set +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4_GENERIC is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_TWOFISH_COMMON=y + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +CONFIG_CRYPTO_HASH_INFO=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=y +# CONFIG_CRYPTO_LIB_BLAKE2S is not set +# CONFIG_CRYPTO_LIB_CHACHA is not set +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +# CONFIG_CRYPTO_DEV_ROCKCHIP is not set +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_CCREE is not set +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set +# CONFIG_PGP_LIBRARY is not set +# CONFIG_PGP_KEY_PARSER is not set +# CONFIG_PGP_PRELOAD is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_RAID6_PQ=y +CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y +# CONFIG_INDIRECT_PIO is not set +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_REED_SOLOMON=y +CONFIG_REED_SOLOMON_ENC8=y +CONFIG_REED_SOLOMON_DEC8=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=y +CONFIG_TEXTSEARCH_BM=y +CONFIG_TEXTSEARCH_FSM=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_CMA=y +# CONFIG_DMA_PERNUMA_CMA is not set + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=256 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +# CONFIG_IRQ_POLL is not set +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_BTF is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +# end of Generic Kernel Debugging Instruments + +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_TABLE_CHECK is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_PAGE_REF is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SOFTLOCKUP_DETECTOR is not set + +# +# ARM64 NMI watchdog configuration +# +# end of ARM64 NMI watchdog configuration + +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +CONFIG_SCHEDSTATS=y +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y + +# +# Debug kernel data structures +# +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +CONFIG_DEBUG_CREDENTIALS=y + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_RCU_STRICT_GRACE_PERIOD is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_BOOTTIME_TRACING is not set +CONFIG_FUNCTION_TRACER=y +CONFIG_FUNCTION_GRAPH_TRACER=y +CONFIG_DYNAMIC_FTRACE=y +CONFIG_DYNAMIC_FTRACE_WITH_REGS=y +# CONFIG_FUNCTION_PROFILER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_HWLAT_TRACER is not set +# CONFIG_OSNOISE_TRACER is not set +# CONFIG_TIMERLAT_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_TRACER_SNAPSHOT is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_UPROBE_EVENTS=y +CONFIG_DYNAMIC_EVENTS=y +CONFIG_PROBE_EVENTS=y +CONFIG_FTRACE_MCOUNT_RECORD=y +# CONFIG_SYNTH_EVENTS is not set +# CONFIG_HIST_TRIGGERS is not set +# CONFIG_TRACE_EVENT_INJECT is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_TRACE_EVAL_MAP_FILE is not set +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_PREEMPTIRQ_DELAY_TEST is not set +# CONFIG_SAMPLES is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set + +# +# arm64 Debugging +# +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of arm64 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +CONFIG_RUNTIME_TESTING_MENU=y +CONFIG_LKDTM=y +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_MIN_HEAP is not set +# CONFIG_TEST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_STRSCPY is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_STACKINIT is not set +# CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set +# CONFIG_MEMTEST is not set +# end of Kernel Testing and Coverage + +# +# Rust hacking +# +# end of Rust hacking +# end of Kernel hacking diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/config/rk3568/defconfig b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/config/rk3568/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..fc0bb900bd704018deff167d04c58de66b2e1efc --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/config/rk3568/defconfig @@ -0,0 +1,6503 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.10.0 Kernel Configuration +# +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=100301 +CONFIG_LD_VERSION=237000000 +CONFIG_CLANG_VERSION=0 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="localhost" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +CONFIG_PREEMPTION=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_SCHED_THERMAL_PRESSURE=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_RCU=y +CONFIG_TASKS_RUDE_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_CGROUPS=y +# CONFIG_MEMCG is not set +# CONFIG_BLK_CGROUP is not set +CONFIG_CGROUP_SCHED=y +# CONFIG_QOS_SCHED is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +# CONFIG_RT_GROUP_SCHED is not set +# CONFIG_CGROUP_PIDS is not set +# CONFIG_CGROUP_RDMA is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +# CONFIG_CGROUP_PERF is not set +# CONFIG_CGROUP_DEBUG is not set +# CONFIG_CGROUP_FILES is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_HAS_CPU_RELAX=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PHYTIUM is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +CONFIG_ARCH_ROCKCHIP=y +# CONFIG_ARCH_S32 is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +CONFIG_HAVE_LIVEPATCH_WO_FTRACE=y + +# +# Enable Livepatch +# +# end of Enable Livepatch + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +# CONFIG_ARM64_ERRATUM_826319 is not set +# CONFIG_ARM64_ERRATUM_827319 is not set +# CONFIG_ARM64_ERRATUM_824069 is not set +# CONFIG_ARM64_ERRATUM_819472 is not set +# CONFIG_ARM64_ERRATUM_832075 is not set +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +# CONFIG_CAVIUM_ERRATUM_23154 is not set +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y +# CONFIG_HISILICON_ERRATUM_1980005 is not set +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +CONFIG_HISILICON_ERRATUM_HIP08_RU_PREFETCH=y +# CONFIG_HISILICON_HIP08_RU_PREFETCH_DEFAULT_OFF is not set +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y +# CONFIG_ARM64_VA_BITS_48 is not set +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SCHED_MC=y +# CONFIG_SCHED_CLUSTER is not set +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=8 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM64_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_NUMA is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_250 is not set +CONFIG_HZ_300=y +# CONFIG_HZ_1000 is not set +CONFIG_HZ=300 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_LLC_128_LINE_SIZE=y +CONFIG_ARCH_HAS_FILTER_PGPROT=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +# CONFIG_KEXEC is not set +# CONFIG_KEXEC_FILE is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_ARM64_PMEM_LEGACY is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +# CONFIG_AARCH32_EL0 is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_AS_HAS_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_CNP=y +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +CONFIG_ARM64_AMU_EXTN=y +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +CONFIG_ARM64_BTI=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +CONFIG_ARCH_RANDOM=y +CONFIG_ARM64_AS_HAS_MTE=y +CONFIG_ARM64_MTE=y +# end of ARMv8.5 architectural features + +# +# ARMv8.6 architectural features +# +CONFIG_ARM64_TWED=y +# end of ARMv8.6 architectural features + +# +# ARMv8.7 architectural features +# +CONFIG_ARM64_EPAN=y +# end of ARMv8.7 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y +# CONFIG_RANDOMIZE_BASE is not set +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +# CONFIG_ASCEND_FEATURES is not set +# end of Kernel Features + +# +# Boot options +# +CONFIG_CMDLINE="" +# CONFIG_EFI is not set +# end of Boot options + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +# CONFIG_DPM_WATCHDOG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ENERGY_MODEL=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +# CONFIG_ARM_PSCI_CPUIDLE is not set +# end of ARM CPU Idle Drivers + +CONFIG_HALTPOLL_CPUIDLE=y +# end of CPU Idle + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +# CONFIG_CPU_FREQ_STAT is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +# CONFIG_ARM_ROCKCHIP_CPUFREQ is not set +# CONFIG_ARM_SCMI_CPUFREQ is not set +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +# CONFIG_ARM_SCPI_PROTOCOL is not set +# CONFIG_ARM_SDE_INTERFACE is not set +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_ROCKCHIP_SIP=y +# CONFIG_GOOGLE_FIRMWARE is not set +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +CONFIG_ARM_SMCCC_SOC_ID=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +# CONFIG_VIRTUALIZATION is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +# CONFIG_CRYPTO_SHA512_ARM64 is not set +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +# CONFIG_CRYPTO_SHA512_ARM64_CE is not set +# CONFIG_CRYPTO_SHA3_ARM64 is not set +# CONFIG_CRYPTO_SM3_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set +# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set +CONFIG_CRYPTO_GHASH_ARM64_CE=y +# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set +# CONFIG_CRYPTO_CHACHA20_NEON is not set +# CONFIG_CRYPTO_POLY1305_NEON is not set +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set +# CONFIG_CRYPTO_AES_ARM64_BS is not set +CONFIG_SELFDECOMPRESS_ZIMAGE=y + +# +# zImage support selfdecompre features +# +# CONFIG_SELFDECOMPRESS_ZIMAGE_GZIP is not set +CONFIG_SELFDECOMPRESS_ZIMAGE_XZ=y +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZ4 is not set +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZMA is not set +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZO is not set +# CONFIG_ZIMAGE_2M_TEXT_OFFSET is not set +# end of zImage support selfdecompre features + +# +# General architecture-dependent options +# +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +CONFIG_UPROBES=y +# CONFIG_UPROBES_SUPPORT_PC_ALTER is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set +# CONFIG_BLK_DEV_DUMPINFO is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_COMPACTION is not set +# CONFIG_PAGE_REPORTING is not set +CONFIG_MIGRATION=y +# CONFIG_HUGE_VMALLOC_DEFAULT_ENABLED is not set +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +# CONFIG_ETMEM is not set +# CONFIG_PAGE_CACHE_LIMIT is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +CONFIG_ZSMALLOC=y +# CONFIG_ZSMALLOC_STAT is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_FRAME_VECTOR=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# CONFIG_PIN_MEMORY is not set +# CONFIG_CLEAR_FREELIST_PAGE is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_IP_MROUTE_COMMON=y +CONFIG_IP_MROUTE=y +# CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set +# CONFIG_IP_PIMSM_V1 is not set +# CONFIG_IP_PIMSM_V2 is not set +CONFIG_SYN_COOKIES=y +# CONFIG_NET_IPVTI is not set +# CONFIG_NET_FOU is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_TCP_COMP is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_MPTCP is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=y +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=y +CONFIG_NF_NAT_REDIRECT=y +CONFIG_NF_NAT_MASQUERADE=y +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=y +CONFIG_NETFILTER_XT_TARGET_NETMAP=y +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +CONFIG_NETFILTER_XT_TARGET_REDIRECT=y +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=y +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +# CONFIG_NF_REJECT_IPV4 is not set +CONFIG_IP_NF_IPTABLES=y +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=y +# CONFIG_IP_NF_TARGET_REJECT is not set +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +# CONFIG_NF_REJECT_IPV6 is not set +# CONFIG_NF_LOG_IPV6 is not set +# CONFIG_IP6_NF_IPTABLES is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=y +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +# CONFIG_BRIDGE is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +CONFIG_CAN_BCM=y +CONFIG_CAN_GW=y +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +# end of CAN Device Drivers + +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +# CONFIG_BT_RFCOMM_TTY is not set +# CONFIG_BT_BNEP is not set +CONFIG_BT_HIDP=y +# CONFIG_BT_HS is not set +CONFIG_BT_LE=y +# CONFIG_BT_LEDS is not set +# CONFIG_BT_MSFTEXT is not set +CONFIG_BT_DEBUGFS=y +# CONFIG_BT_SELFTEST is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=y +CONFIG_BT_BCM=y +CONFIG_BT_RTL=y +CONFIG_BT_HCIBTUSB=y +# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set +CONFIG_BT_HCIBTUSB_BCM=y +# CONFIG_BT_HCIBTUSB_MTK is not set +CONFIG_BT_HCIBTUSB_RTL=y +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +CONFIG_BT_HCIUART_ATH3K=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y +# CONFIG_BT_ATH3K is not set +# CONFIG_BT_MTKSDIO is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_MESSAGE_TRACING is not set +CONFIG_MAC80211_DEBUG_MENU=y +# CONFIG_MAC80211_NOINLINE is not set +CONFIG_MAC80211_VERBOSE_DEBUG=y +# CONFIG_MAC80211_MLME_DEBUG is not set +# CONFIG_MAC80211_STA_DEBUG is not set +# CONFIG_MAC80211_HT_DEBUG is not set +# CONFIG_MAC80211_OCB_DEBUG is not set +# CONFIG_MAC80211_IBSS_DEBUG is not set +# CONFIG_MAC80211_PS_DEBUG is not set +# CONFIG_MAC80211_TDLS_DEBUG is not set +# CONFIG_MAC80211_DEBUG_COUNTERS is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_GPIO is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_GRO_CELLS=y +CONFIG_PAGE_POOL=y +# CONFIG_FAILOVER is not set +CONFIG_ETHTOOL_NETLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIEAER is not set +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCIE_XILINX is not set +# CONFIG_PCI_XGENE is not set +# CONFIG_PCIE_ALTERA is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set +# CONFIG_PCIE_ROCKCHIP_HOST is not set + +# +# DesignWare PCI Core Support +# +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCI_J721E_HOST is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +# CONFIG_UEVENT_HELPER is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +# CONFIG_FW_LOADER_COMPRESS is not set +CONFIG_FW_CACHE=y +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_DEVRES=y +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_MOXTET is not set +# CONFIG_SIMPLE_PM_BUS is not set +# CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_MHI_BUS is not set +# end of Bus devices + +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_GNSS is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +# CONFIG_MTD_ONENAND is not set +# CONFIG_MTD_RAW_NAND is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +# CONFIG_MTD_SPI_NOR is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +CONFIG_CDROM=y +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +CONFIG_ZRAM=y +# CONFIG_ZRAM_WRITEBACK is not set +# CONFIG_ZRAM_MEMORY_TRACKING is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=y +CONFIG_BLK_DEV_NVME=y +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_HWMON is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# CONFIG_NVME_TARGET is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +# CONFIG_UACCE is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=y +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_HISI_SAS is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_RAMAXEL_SPRAID is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=y +CONFIG_SATA_HOST=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_FORCE=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=y +# CONFIG_AHCI_CEVA is not set +# CONFIG_AHCI_QORIQ is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +# CONFIG_ATA_SFF is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +# CONFIG_BCACHE is not set +# CONFIG_BLK_DEV_DM is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_IPVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_TUN is not set +# CONFIG_TUN_VNET_CROSS_LE is not set +# CONFIG_VETH is not set +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# Distributed Switch Architecture drivers +# +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +# CONFIG_ENA_ETHERNET is not set +# CONFIG_NET_VENDOR_AMD is not set +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_AQTION is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +CONFIG_NET_VENDOR_CADENCE=y +# CONFIG_MACB is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +CONFIG_NET_VENDOR_HUAWEI=y +# CONFIG_BMA is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +CONFIG_E1000E=y +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_IGC is not set +CONFIG_NET_VENDOR_NETSWIFT=y +# CONFIG_NGBE is not set +# CONFIG_TXGBE is not set +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +CONFIG_NET_VENDOR_MICROSEMI=y +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_ROCKCHIP=y +CONFIG_DWMAC_ROCKCHIP_TOOL=y +CONFIG_DWMAC_RK_AUTO_DELAYLINE=y +# CONFIG_DWMAC_INTEL_PLAT is not set +# CONFIG_DWMAC_LOONGSON is not set +# CONFIG_STMMAC_PCI is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_NET_VENDOR_XILINX=y +# CONFIG_XILINX_AXI_EMAC is not set +# CONFIG_XILINX_LL_TEMAC is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MARVELL_10G_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_AT803X_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=y +# CONFIG_RENESAS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +# CONFIG_MDIO_THUNDER is not set + +# +# MDIO Multiplexers +# +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +CONFIG_USB_RTL8150=y +CONFIG_USB_RTL8152=y +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +CONFIG_USB_NET_CDC_MBIM=y +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +# CONFIG_ATH10K is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_BRCMSMAC is not set +# CONFIG_BRCMFMAC is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_MWIFIEX is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +# CONFIG_MT7663U is not set +# CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=y +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTW88 is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +# CONFIG_WL18XX is not set +# CONFIG_WLCORE is not set +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +CONFIG_WL_ROCKCHIP=y +CONFIG_WIFI_BUILD_MODULE=y +CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y +# CONFIG_WIFI_GENERATE_RANDOM_MAC_ADDR is not set +CONFIG_MXMWIFIEX=m +# CONFIG_MAC80211_HWSIM is not set +CONFIG_USB_NET_RNDIS_WLAN=y +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_NETDEVSIM is not set +# CONFIG_NET_FAILOVER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=y +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ADC=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +CONFIG_MOUSE_CYAPA=y +CONFIG_MOUSE_ELAN_I2C=y +CONFIG_MOUSE_ELAN_I2C_I2C=y +# CONFIG_MOUSE_ELAN_I2C_SMBUS is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=y +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +CONFIG_TOUCHSCREEN_GOODIX=y +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +CONFIG_TOUCHSCREEN_ELAN=y +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +CONFIG_TOUCHSCREEN_EDT_FT5X06=y +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +CONFIG_TOUCHSCREEN_USB_COMPOSITE=y +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_JASTEC=y +CONFIG_TOUCHSCREEN_USB_ELO=y +CONFIG_TOUCHSCREEN_USB_E2I=y +CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y +CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y +CONFIG_TOUCHSCREEN_USB_NEXIO=y +CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +CONFIG_INPUT_RK805_PWRKEY=y +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_16550A_VARIANTS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=10 +CONFIG_SERIAL_8250_RUNTIME_UARTS=10 +# CONFIG_SERIAL_8250_EXTENDED is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_SERIAL_DEV_BUS is not set +CONFIG_RYD_GPIO_CONTROL=y +# CONFIG_TTY_PRINTK is not set +# CONFIG_VIRTIO_CONSOLE is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +CONFIG_HW_RANDOM_OPTEE=y +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +# CONFIG_RAW_DRIVER is not set +CONFIG_DEVPORT=y +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +# CONFIG_TCG_TIS is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_FTPM_TEE is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +# CONFIG_XILLYBUS is not set +# CONFIG_RANDOM_TRUST_CPU is not set +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set +# end of Character devices + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_HISI is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +CONFIG_I2C_RK3X=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +# CONFIG_SPI_MEM is not set + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set +# CONFIG_PTP_1588_CLOCK_IDTCM is not set +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_ROCKCHIP=y +# CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +CONFIG_PINCTRL_RK805=y +# CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_CADENCE is not set +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +# CONFIG_GPIO_MB86S7X is not set +# CONFIG_GPIO_PL061 is not set +CONFIG_GPIO_ROCKCHIP=y +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_XGENE is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_TPS6586X is not set +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_W1 is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_SBS=y +# CONFIG_CHARGER_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +CONFIG_CHARGER_GPIO=y +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +CONFIG_CHARGER_BQ24735=y +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM1177 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set +# CONFIG_SENSORS_ARM_SCMI is not set +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CORSAIR_CPRO is not set +# CONFIG_SENSORS_DRIVETEMP is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set +CONFIG_CPU_THERMAL=y +CONFIG_CPU_FREQ_THERMAL=y +CONFIG_DEVFREQ_THERMAL=y +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_THERMAL_MMIO is not set +CONFIG_ROCKCHIP_THERMAL=y +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_INTEL_PMT is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +CONFIG_MFD_TPS6586X=y +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +# CONFIG_MFD_KHADAS_MCU is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +CONFIG_REGULATOR_ACT8865=y +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +# CONFIG_REGULATOR_FAN53880 is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MAX77826 is not set +# CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set +# CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set +# CONFIG_REGULATOR_MPQ7920 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set +# CONFIG_REGULATOR_SY8827N is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +CONFIG_REGULATOR_TPS65132=y +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_TPS6586X=y +# CONFIG_REGULATOR_VCTRL is not set +# CONFIG_RC_CORE is not set +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_GPIO is not set +# CONFIG_USB_PULSE8_CEC is not set +# CONFIG_USB_RAINSHADOW_CEC is not set +CONFIG_MEDIA_SUPPORT=y +# CONFIG_MEDIA_SUPPORT_FILTER is not set +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +# end of Media device types + +# +# Media core support +# +CONFIG_VIDEO_DEV=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=y +# end of Media core support + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# end of Video4Linux options + +# +# Media controller options +# +# CONFIG_MEDIA_CONTROLLER_DVB is not set +# end of Media controller options + +# +# Digital TV options +# +# CONFIG_DVB_MMAP is not set +CONFIG_DVB_NET=y +CONFIG_DVB_MAX_ADAPTERS=16 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=y +# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set +# CONFIG_USB_GSPCA is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_STK1160_COMMON is not set + +# +# Analog/digital TV USB devices +# +# CONFIG_VIDEO_AU0828 is not set + +# +# Digital TV USB devices +# +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set + +# +# Software defined radio USB devices +# +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_RADIO_SI470X is not set +# CONFIG_RADIO_SI4713 is not set +# CONFIG_USB_MR800 is not set +# CONFIG_USB_DSBR is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_SHARK is not set +# CONFIG_RADIO_SHARK2 is not set +# CONFIG_USB_KEENE is not set +# CONFIG_USB_RAREMONO is not set +# CONFIG_USB_MA901 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_RADIO_SAA7706H is not set +# CONFIG_RADIO_TEF6862 is not set +# CONFIG_RADIO_WL1273 is not set +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_V4L2=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_VMALLOC=y +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_CADENCE is not set +# CONFIG_VIDEO_ASPEED is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_VIDEO_XILINX is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set +# CONFIG_SDR_PLATFORM_DRIVERS is not set + +# +# MMC/SDIO DVB adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_TEST_DRIVERS is not set +# end of Media drivers + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set +# end of Video decoders + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips + +# +# Camera sensor devices +# +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set +# end of SPI helper chips + +# +# Media SPI Adapters +# +CONFIG_CXD2880_SPI_DRV=m +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=y + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18250=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MSI001=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_M88RS6000T=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_SI2157=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_R820T=m +CONFIG_MEDIA_TUNER_MXL301RF=m +CONFIG_MEDIA_TUNER_QM1D1C0042=m +CONFIG_MEDIA_TUNER_QM1D1B0004=m +# end of Customize TV tuners + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV0910=m +CONFIG_DVB_STV6110x=m +CONFIG_DVB_STV6111=m +CONFIG_DVB_MXL5XX=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_TDA18271C2DD=m +CONFIG_DVB_SI2165=m +CONFIG_DVB_MN88472=m +CONFIG_DVB_MN88473=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10039=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24117=m +CONFIG_DVB_CX24120=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_MB86A16=m +CONFIG_DVB_TDA10071=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_S5H1432=m +CONFIG_DVB_DRXD=m +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DIB9000=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_EC100=m +CONFIG_DVB_STV0367=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_CXD2841ER=m +CONFIG_DVB_ZD1301_DEMOD=m +CONFIG_DVB_CXD2880=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +CONFIG_DVB_AU8522_V4L=m +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_S921=m +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +CONFIG_DVB_TC90522=m +CONFIG_DVB_MN88443X=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_DRX39XYJ=m +CONFIG_DVB_LNBH25=m +CONFIG_DVB_LNBH29=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_A8293=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_TDA665x=m +CONFIG_DVB_IX2505V=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_AF9033=m +CONFIG_DVB_HORUS3A=m +CONFIG_DVB_ASCOT2E=m +CONFIG_DVB_HELENE=m + +# +# Common Interface (EN50221) controller drivers +# +CONFIG_DVB_CXD2099=m +CONFIG_DVB_SP2=m +# end of Customise DVB Frontends + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set +# end of Media ancillary drivers + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +CONFIG_DRM=y +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_GEM_CMA_HELPER=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +CONFIG_DRM_ROCKCHIP=y +# CONFIG_ROCKCHIP_DRM_CUBIC_LUT is not set +# CONFIG_ROCKCHIP_DRM_DEBUG is not set +# CONFIG_ROCKCHIP_DRM_DIRECT_SHOW is not set +# CONFIG_ROCKCHIP_VOP is not set +CONFIG_ROCKCHIP_VOP2=y +# CONFIG_ROCKCHIP_ANALOGIX_DP is not set +# CONFIG_ROCKCHIP_CDN_DP is not set +CONFIG_ROCKCHIP_DW_HDMI=y +CONFIG_ROCKCHIP_DW_MIPI_DSI=y +# CONFIG_ROCKCHIP_DW_DP is not set +# CONFIG_ROCKCHIP_INNO_HDMI is not set +# CONFIG_ROCKCHIP_LVDS is not set +# CONFIG_ROCKCHIP_RGB is not set +# CONFIG_ROCKCHIP_RK3066_HDMI is not set +# CONFIG_ROCKCHIP_VCONN is not set +# CONFIG_DRM_ROCKCHIP_VVOP is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_RCAR_LVDS is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set +# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set +# CONFIG_DRM_PANEL_LVDS is not set +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set +# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set +# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7703 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +# CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_LONTIUM_LT9611 is not set +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_SIMPLE_BRIDGE is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set +CONFIG_DRM_DW_HDMI=y +CONFIG_DRM_DW_HDMI_CEC=y +CONFIG_DRM_DW_MIPI_DSI=y +# end of Display Interface Bridges + +# CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_MXSFB is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_DRM_PL111 is not set +# CONFIG_DRM_LIMA is not set +# CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_TIDSS is not set +# CONFIG_DRM_LEGACY is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +CONFIG_MALI_BIFROST=y +CONFIG_MALI_PLATFORM_NAME="rk" +CONFIG_MALI_REAL_HW=y + +# +# Platform specific options +# +# CONFIG_MALI_CSF_SUPPORT is not set +CONFIG_MALI_BIFROST_DEVFREQ=y +CONFIG_MALI_BIFROST_GATOR_SUPPORT=y +# CONFIG_MALI_BIFROST_ENABLE_TRACE is not set +# CONFIG_MALI_BIFROST_DMA_FENCE is not set +# CONFIG_MALI_ARBITER_SUPPORT is not set +# CONFIG_MALI_DMA_BUF_MAP_ON_DEMAND is not set +# CONFIG_MALI_DMA_BUF_LEGACY_COMPAT is not set +# CONFIG_MALI_BIFROST_EXPERT is not set +# CONFIG_MALI_ARBITRATION is not set + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# CONFIG_BACKLIGHT_LED is not set +# end of Backlight & LCD device support + +# +# Rockchip Misc Video driver +# + +# +# RGA +# +# CONFIG_ROCKCHIP_RGA is not set +# end of RGA + +CONFIG_ROCKCHIP_RGA2=y +# CONFIG_ROCKCHIP_RGA2_PROC_FS is not set +CONFIG_ROCKCHIP_RGA2_DEBUG_FS=y +CONFIG_ROCKCHIP_RGA2_DEBUGGER=y +# CONFIG_ROCKCHIP_MULTI_RGA is not set +# CONFIG_ROCKCHIP_RVE is not set + +# +# IEP +# +# CONFIG_IEP is not set +# end of IEP + +CONFIG_ROCKCHIP_MPP_SERVICE=y +CONFIG_ROCKCHIP_MPP_PROC_FS=y +CONFIG_ROCKCHIP_MPP_RKVDEC=y +CONFIG_ROCKCHIP_MPP_RKVDEC2=y +CONFIG_ROCKCHIP_MPP_RKVENC=y +# CONFIG_ROCKCHIP_MPP_RKVENC2 is not set +CONFIG_ROCKCHIP_MPP_VDPU1=y +CONFIG_ROCKCHIP_MPP_VEPU1=y +CONFIG_ROCKCHIP_MPP_VDPU2=y +CONFIG_ROCKCHIP_MPP_VEPU2=y +CONFIG_ROCKCHIP_MPP_IEP2=y +CONFIG_ROCKCHIP_MPP_JPGDEC=y +# CONFIG_ROCKCHIP_MPP_AV1DEC is not set +# CONFIG_ROCKCHIP_DVBM is not set +# end of Rockchip Misc Video driver + +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +# CONFIG_LOGO is not set +# end of Graphics support + +# CONFIG_SOUND is not set + +# +# HID support +# +CONFIG_HID=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_BIGBEN_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELAN is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_REDRAGON is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +CONFIG_HID_MULTITOUCH=y +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_U2FZERO is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y +# end of USB HID support + +# +# I2C HID support +# +CONFIG_I2C_HID=y +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_LED_TRIG is not set +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEFAULT_PERSIST is not set +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_HCD_PCI is not set +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +# CONFIG_USB_MUSB_HDRC is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_HAPS=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +CONFIG_USB_SERIAL_CP210X=y +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=y +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +CONFIG_USB_SERIAL_KEYSPAN=y +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OTI6858=y +# CONFIG_USB_SERIAL_QCAUX is not set +CONFIG_USB_SERIAL_QUALCOMM=y +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=y +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_EZUSB_FX2=y +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +CONFIG_USB_GADGET_DEBUG_FILES=y +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_SNP_UDC_PLAT is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_ACM=y +CONFIG_USB_U_SERIAL=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_FS=y +CONFIG_USB_F_UVC=y +CONFIG_USB_CONFIGFS=y +# CONFIG_USB_CONFIGFS_SERIAL is not set +CONFIG_USB_CONFIGFS_ACM=y +# CONFIG_USB_CONFIGFS_OBEX is not set +# CONFIG_USB_CONFIGFS_NCM is not set +# CONFIG_USB_CONFIGFS_ECM is not set +# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set +# CONFIG_USB_CONFIGFS_RNDIS is not set +# CONFIG_USB_CONFIGFS_EEM is not set +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_HID is not set +CONFIG_USB_CONFIGFS_F_UVC=y +# CONFIG_USB_CONFIGFS_F_PRINTER is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +CONFIG_USB_MASS_STORAGE=m +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + +# CONFIG_TYPEC is not set +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +CONFIG_MMC_TEST=y + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +CONFIG_MMC_SDHCI_OF_DWCMSHC=y +# CONFIG_MMC_SDHCI_CADENCE is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +# CONFIG_MMC_SDHCI_MILBEAUT is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_K3 is not set +# CONFIG_MMC_DW_PCI is not set +CONFIG_MMC_DW_ROCKCHIP=y +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MMC_SDHCI_XENON is not set +# CONFIG_MMC_SDHCI_OMAP is not set +# CONFIG_MMC_SDHCI_AM654 is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_CLASS_MULTICOLOR is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_AW2013 is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_EL15203000 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set +# CONFIG_LEDS_LP55XX_COMMON is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +CONFIG_LEDS_IS31FL32XX=y + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_SYSCON is not set +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_TI_LMU_COMMON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +# CONFIG_LEDS_TRIGGER_DISK is not set +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_CPU is not set +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_LEDS_TRIGGER_PANIC is not set +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_PATTERN is not set +# CONFIG_LEDS_TRIGGER_AUDIO is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RK808 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +CONFIG_RTC_DRV_PCF8563=y +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_TPS6586X is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +# CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +# CONFIG_DW_AXI_DMAC is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_FSL_QDMA is not set +# CONFIG_HISI_DMA is not set +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_MV_XOR_V2 is not set +CONFIG_PL330_DMA=y +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set +# CONFIG_SF_PDMA is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO_MENU=y +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_MMIO is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# CONFIG_AD7280 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set +# end of Active energy metering IC + +# +# Resolver to digital converters +# +# CONFIG_AD2S1210 is not set +# end of Resolver to digital converters +# end of IIO staging drivers + +# CONFIG_FB_SM750 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_ASHMEM is not set +# CONFIG_DEBUG_KINFO is not set +# CONFIG_ION is not set +CONFIG_FIQ_DEBUGGER=y +CONFIG_FIQ_DEBUGGER_NO_SLEEP=y +# CONFIG_FIQ_DEBUGGER_WAKEUP_IRQ_ALWAYS_ON is not set +CONFIG_FIQ_DEBUGGER_CONSOLE=y +CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y +CONFIG_FIQ_DEBUGGER_TRUST_ZONE=y +# CONFIG_FIQ_DEBUGGER_UART_OVERLAY is not set +CONFIG_RK_CONSOLE_THREAD=y +# end of Android + +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_KS7010 is not set +# CONFIG_PI433 is not set + +# +# Gasket devices +# +# CONFIG_STAGING_GASKET_FRAMEWORK is not set +# end of Gasket devices + +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_FIELDBUS_DEV is not set +# CONFIG_QLGE is not set +# CONFIG_WFX is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX9485 is not set +CONFIG_COMMON_CLK_RK808=y +CONFIG_COMMON_CLK_SCMI=y +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_CLK_QORIQ is not set +# CONFIG_COMMON_CLK_XGENE is not set +# CONFIG_COMMON_CLK_PWM is not set +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_COMMON_CLK_ROCKCHIP=y +CONFIG_CLK_PX30=y +CONFIG_CLK_RK1808=y +CONFIG_CLK_RK3328=y +CONFIG_CLK_RK3399=y +CONFIG_CLK_RK3568=y +# CONFIG_ROCKCHIP_CLK_COMPENSATION is not set +# CONFIG_ROCKCHIP_CLK_LINK is not set +CONFIG_ROCKCHIP_CLK_BOOST=y +CONFIG_ROCKCHIP_CLK_INV=y +CONFIG_ROCKCHIP_CLK_PVTM=y +CONFIG_ROCKCHIP_DDRCLK=y +# CONFIG_ROCKCHIP_DDRCLK_SCPI is not set +CONFIG_ROCKCHIP_DDRCLK_SIP=y +CONFIG_ROCKCHIP_DDRCLK_SIP_V2=y +# CONFIG_ROCKCHIP_PLL_RK3066 is not set +CONFIG_ROCKCHIP_PLL_RK3399=y +# CONFIG_ROCKCHIP_PLL_RK3588 is not set +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_ROCKCHIP_TIMER=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +CONFIG_MAILBOX=y +# CONFIG_ARM_MHU is not set +# CONFIG_PLATFORM_MHU is not set +# CONFIG_PL320_MBOX is not set +# CONFIG_ROCKCHIP_MBOX is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ROCKCHIP_IOMMU=y +# CONFIG_ARM_SMMU is not set +# CONFIG_ARM_SMMU_V3 is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +# CONFIG_FSL_RCPM is not set +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +# +# Rockchip CPU selection +# +CONFIG_CPU_PX30=y +CONFIG_CPU_RK1808=y +# CONFIG_CPU_RK3308 is not set +CONFIG_CPU_RK3328=y +# CONFIG_CPU_RK3368 is not set +CONFIG_CPU_RK3399=y +CONFIG_CPU_RK3568=y +# CONFIG_CPU_RK3588 is not set +# end of Rockchip CPU selection + +CONFIG_NO_GKI=y +# CONFIG_ROCKCHIP_CPUINFO is not set +# CONFIG_ROCKCHIP_GRF is not set +# CONFIG_ROCKCHIP_HW_DECOMPRESS is not set +CONFIG_ROCKCHIP_IODOMAIN=y +# CONFIG_ROCKCHIP_IOMUX is not set +# CONFIG_ROCKCHIP_IPA is not set +# CONFIG_ROCKCHIP_OPP is not set +# CONFIG_ROCKCHIP_PERFORMANCE is not set +CONFIG_ROCKCHIP_PM_DOMAINS=y +CONFIG_ROCKCHIP_PVTM=y +# CONFIG_ROCKCHIP_RAMDISK is not set +CONFIG_ROCKCHIP_SUSPEND_MODE=y +# CONFIG_ROCKCHIP_SYSTEM_MONITOR is not set +CONFIG_ROCKCHIP_VENDOR_STORAGE=y +CONFIG_ROCKCHIP_MMC_VENDOR_STORAGE=y +CONFIG_ROCKCHIP_MTD_VENDOR_STORAGE=y +CONFIG_ROCKCHIP_VENDOR_STORAGE_UPDATE_LOADER=y +CONFIG_ROCKCHIP_FIQ_DEBUGGER=y +# CONFIG_ROCKCHIP_DEBUG is not set +# CONFIG_ROCKCHIP_MINI_KERNEL is not set +# CONFIG_ROCKCHIP_THUNDER_BOOT is not set +# CONFIG_ROCKCHIP_NPOR_POWERGOOD is not set +# CONFIG_RK_CMA_PROCFS is not set +# CONFIG_RK_DMABUF_PROCFS is not set +# CONFIG_RK_MEMBLOCK_PROCFS is not set +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set +# CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ is not set +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_PTN5150 is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +# CONFIG_EXTCON_USB_GPIO is not set +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGERED_BUFFER=y +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set +# CONFIG_IIO_TRIGGERED_EVENT is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMA400 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7091R5 is not set +# CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7292 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_ADI_AXI_ADC is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2496 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +# CONFIG_NAU7802 is not set +CONFIG_ROCKCHIP_SARADC=y +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set +# end of Amplifiers + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_SCD30_CORE is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +# +# Hid Sensor IIO Common +# +# end of Hid Sensor IIO Common + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_FXOS8700_I2C is not set +# CONFIG_FXOS8700_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_ICM42600_I2C is not set +# CONFIG_INV_ICM42600_SPI is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP002 is not set +# CONFIG_GP2AP020A00F is not set +CONFIG_SENSORS_ISL29018=y +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +CONFIG_SENSORS_TSL2563=y +CONFIG_TSL2583=y +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6030 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +CONFIG_IIO_SYSFS_TRIGGER=y +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +# CONFIG_DLHL60D is not set +# CONFIG_DPS310 is not set +# CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_PING is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +# CONFIG_LTC2983 is not set +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set +CONFIG_PWM_ROCKCHIP=y + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_AL_FIC is not set +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SCMI=y +# CONFIG_RESET_TI_SYSCON is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PHY_MIPI_DPHY=y +# CONFIG_PHY_XGENE is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_FSL_IMX8MQ_USB is not set +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +# CONFIG_PHY_ROCKCHIP_CSI2_DPHY is not set +# CONFIG_PHY_ROCKCHIP_DP is not set +# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set +CONFIG_PHY_ROCKCHIP_EMMC=y +# CONFIG_PHY_ROCKCHIP_INNO_COMBPHY is not set +# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_INNO_USB3=y +# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set +# CONFIG_PHY_ROCKCHIP_MIPI_RX is not set +CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y +CONFIG_PHY_ROCKCHIP_NANENG_EDP=y +# CONFIG_PHY_ROCKCHIP_NANENG_USB2 is not set +CONFIG_PHY_ROCKCHIP_PCIE=y +# CONFIG_PHY_ROCKCHIP_SAMSUNG_DCPHY is not set +# CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX is not set +# CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI is not set +CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y +CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_PHY_ROCKCHIP_USB=y +# CONFIG_PHY_ROCKCHIP_USBDP is not set +# CONFIG_PHY_SAMSUNG_USB2 is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +# CONFIG_HISI_PCIE_PMU is not set +# CONFIG_HNS3_PMU is not set +# end of Performance monitor support + +# CONFIG_RAS is not set +# CONFIG_USB4 is not set + +# +# Android +# +CONFIG_ANDROID=y +# CONFIG_ANDROID_BINDER_IPC is not set +# end of Android + +# +# Vendor Hooks +# +# CONFIG_VENDOR_HOOKS is not set +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +CONFIG_ROCKCHIP_EFUSE=y +CONFIG_ROCKCHIP_OTP=y + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# CONFIG_HISI_PTT is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +CONFIG_TEE=y + +# +# TEE drivers +# +CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 +# end of TEE drivers + +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set +# CONFIG_ROH is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_XFS_FS=y +CONFIG_XFS_SUPPORT_V4=y +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_ONLINE_SCRUB is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +# CONFIG_DNOTIFY is not set +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_FUSE_FS=y +# CONFIG_CUSE is not set +# CONFIG_VIRTIO_FS is not set +# CONFIG_OVERLAY_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=936 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_INODE64 is not set +# CONFIG_HUGETLBFS is not set +CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UBIFS_FS_ZSTD=y +# CONFIG_UBIFS_ATIME_SUPPORT is not set +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_SECURITY=y +# CONFIG_UBIFS_FS_AUTHENTICATION is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +# CONFIG_SQUASHFS_XZ is not set +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +CONFIG_PSTORE_CONSOLE=y +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_FTRACE is not set +CONFIG_PSTORE_RAM=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y +# CONFIG_NFS_V4_1 is not set +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_SWAP=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_SMB_SERVER is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +CONFIG_NLS_CODEPAGE_936=y +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set +CONFIG_UNICODE=y +# CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +CONFIG_SECURITYFS=y +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options + +# CONFIG_SECURITY_BOOT_INIT is not set +# end of Security options + +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_CRYPTD=y +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_SIMD=y + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +# CONFIG_CRYPTO_CURVE25519 is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_SEQIV is not set +# CONFIG_CRYPTO_ECHAINIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_XXHASH is not set +# CONFIG_CRYPTO_BLAKE2B is not set +# CONFIG_CRYPTO_BLAKE2S is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_SM3_GENERIC is not set +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4_GENERIC is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_TWOFISH_COMMON=y + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +CONFIG_CRYPTO_ZSTD=y + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +CONFIG_CRYPTO_DEV_ROCKCHIP=y +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_CCREE is not set +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set +# CONFIG_PGP_LIBRARY is not set +# CONFIG_PGP_KEY_PARSER is not set +# CONFIG_PGP_PRELOAD is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_LINEAR_RANGES=y +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y +# CONFIG_INDIRECT_PIO is not set + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +# CONFIG_CRYPTO_LIB_CHACHA is not set +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + +CONFIG_LIB_MEMNEQ=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_REED_SOLOMON=y +CONFIG_REED_SOLOMON_ENC8=y +CONFIG_REED_SOLOMON_DEC8=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_CMA=y +# CONFIG_DMA_PERNUMA_CMA is not set + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +# CONFIG_IRQ_POLL is not set +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_BTF is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +# end of Generic Kernel Debugging Instruments + +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_PAGE_REF is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SOFTLOCKUP_DETECTOR is not set + +# +# ARM64 NMI watchdog configuration +# +# end of ARM64 NMI watchdog configuration + +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +CONFIG_SCHEDSTATS=y +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set +CONFIG_DEBUG_PREEMPT=y + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y + +# +# Debug kernel data structures +# +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +CONFIG_DEBUG_CREDENTIALS=y + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_RCU_TRACE=y +# CONFIG_RCU_EQS_DEBUG is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_BOOTTIME_TRACING is not set +CONFIG_FUNCTION_TRACER=y +CONFIG_FUNCTION_GRAPH_TRACER=y +CONFIG_DYNAMIC_FTRACE=y +CONFIG_DYNAMIC_FTRACE_WITH_REGS=y +# CONFIG_FUNCTION_PROFILER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_PREEMPT_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_HWLAT_TRACER is not set +# CONFIG_OSNOISE_TRACER is not set +# CONFIG_TIMERLAT_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_TRACER_SNAPSHOT is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_UPROBE_EVENTS=y +CONFIG_DYNAMIC_EVENTS=y +CONFIG_PROBE_EVENTS=y +CONFIG_FTRACE_MCOUNT_RECORD=y +# CONFIG_SYNTH_EVENTS is not set +# CONFIG_HIST_TRIGGERS is not set +# CONFIG_TRACE_EVENT_INJECT is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_TRACE_EVAL_MAP_FILE is not set +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_PREEMPTIRQ_DELAY_TEST is not set +# CONFIG_SAMPLES is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set + +# +# arm64 Debugging +# +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of arm64 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +CONFIG_RUNTIME_TESTING_MENU=y +CONFIG_LKDTM=y +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_MIN_HEAP is not set +# CONFIG_TEST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_STRSCPY is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_STACKINIT is not set +# CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set +# CONFIG_MEMTEST is not set +# end of Kernel Testing and Coverage +# end of Kernel hacking diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/config/rk3588/defconfig b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/config/rk3588/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..02018981dad2d0d91b0545602b315870e343308f --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/config/rk3588/defconfig @@ -0,0 +1,6896 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.10.0 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="aarch64-openeuler-linux-gnu-gcc (crosstool-NG 1.25.0) 10.3.1" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=100301 +CONFIG_LD_VERSION=237000000 +CONFIG_CLANG_VERSION=0 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BUILD_SALT="" +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_ZSTD=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +# CONFIG_KERNEL_ZSTD is not set +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="localhost" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_SCHED_THERMAL_PRESSURE=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_RUDE_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +CONFIG_UCLAMP_TASK=y +CONFIG_UCLAMP_BUCKETS_COUNT=20 +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_CGROUPS=y +# CONFIG_MEMCG is not set +# CONFIG_BLK_CGROUP is not set +CONFIG_CGROUP_SCHED=y +# CONFIG_QOS_SCHED is not set +# CONFIG_SCHED_PRIO_LB is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_UCLAMP_TASK_GROUP=y +# CONFIG_CGROUP_PIDS is not set +# CONFIG_CGROUP_RDMA is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +# CONFIG_CGROUP_PERF is not set +# CONFIG_CGROUP_DEBUG is not set +CONFIG_SOCK_CGROUP_DATA=y +# CONFIG_CGROUP_FILES is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_HAS_CPU_RELAX=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PHYTIUM is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +CONFIG_ARCH_ROCKCHIP=y +# CONFIG_ARCH_S32 is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +CONFIG_HAVE_LIVEPATCH_WO_FTRACE=y + +# +# Enable Livepatch +# +# end of Enable Livepatch + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +# CONFIG_ARM64_ERRATUM_826319 is not set +# CONFIG_ARM64_ERRATUM_827319 is not set +# CONFIG_ARM64_ERRATUM_824069 is not set +# CONFIG_ARM64_ERRATUM_819472 is not set +# CONFIG_ARM64_ERRATUM_832075 is not set +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +# CONFIG_CAVIUM_ERRATUM_23154 is not set +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y +# CONFIG_HISILICON_ERRATUM_1980005 is not set +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +CONFIG_HISILICON_ERRATUM_HIP08_RU_PREFETCH=y +# CONFIG_HISILICON_HIP08_RU_PREFETCH_DEFAULT_OFF is not set +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y +# CONFIG_ARM64_VA_BITS_48 is not set +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SCHED_MC=y +# CONFIG_SCHED_CLUSTER is not set +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=8 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM64_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_NUMA is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_250 is not set +CONFIG_HZ_300=y +# CONFIG_HZ_1000 is not set +CONFIG_HZ=300 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_LLC_128_LINE_SIZE=y +CONFIG_ARCH_HAS_FILTER_PGPROT=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +# CONFIG_KEXEC is not set +# CONFIG_KEXEC_FILE is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_ARM64_PMEM_LEGACY is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +# CONFIG_AARCH32_EL0 is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_AS_HAS_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_CNP=y +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +CONFIG_ARM64_AMU_EXTN=y +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +CONFIG_ARM64_BTI=y +CONFIG_ARM64_BTI_KERNEL=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +CONFIG_ARCH_RANDOM=y +CONFIG_ARM64_AS_HAS_MTE=y +CONFIG_ARM64_MTE=y +# end of ARMv8.5 architectural features + +# +# ARMv8.6 architectural features +# +CONFIG_ARM64_TWED=y +# end of ARMv8.6 architectural features + +# +# ARMv8.7 architectural features +# +CONFIG_ARM64_EPAN=y +# end of ARMv8.7 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_SME=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y +# CONFIG_RANDOMIZE_BASE is not set +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +# CONFIG_ASCEND_FEATURES is not set +# end of Kernel Features + +# +# Boot options +# +CONFIG_CMDLINE="" +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y +# end of Boot options + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +# CONFIG_DPM_WATCHDOG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ENERGY_MODEL=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y +# end of ARM CPU Idle Drivers + +CONFIG_HALTPOLL_CPUIDLE=y +# end of CPU Idle + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_ARM_ROCKCHIP_CPUFREQ=y +# CONFIG_ARM_SCMI_CPUFREQ is not set +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +# CONFIG_ARM_SCPI_PROTOCOL is not set +# CONFIG_ARM_SDE_INTERFACE is not set +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_ROCKCHIP_SIP=y +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_VARS_PSTORE=y +# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set +# CONFIG_EFI_FAKE_MEMMAP is not set +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ZBOOT=y +# CONFIG_EFI_ZBOOT_SIGNED is not set +CONFIG_EFI_ARMSTUB_DTB_LOADER=y +# CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER is not set +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_EFI_EARLYCON=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +CONFIG_ARM_SMCCC_SOC_ID=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_ARCH_SUPPORTS_ACPI=y +# CONFIG_ACPI is not set +# CONFIG_VIRTUALIZATION is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +# CONFIG_CRYPTO_SHA512_ARM64 is not set +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +# CONFIG_CRYPTO_SHA512_ARM64_CE is not set +# CONFIG_CRYPTO_SHA3_ARM64 is not set +# CONFIG_CRYPTO_SM3_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set +# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set +CONFIG_CRYPTO_GHASH_ARM64_CE=y +# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set +# CONFIG_CRYPTO_CHACHA20_NEON is not set +# CONFIG_CRYPTO_POLY1305_NEON is not set +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set +# CONFIG_CRYPTO_AES_ARM64_BS is not set + +# +# General architecture-dependent options +# +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +CONFIG_UPROBES=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y +CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_DEV_ZONED is not set +CONFIG_BLK_CMDLINE_PARSER=y +# CONFIG_BLK_WBT is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_CMDLINE_PARTITION=y +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_ASN1=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_COMPACTION is not set +# CONFIG_PAGE_REPORTING is not set +CONFIG_MIGRATION=y +# CONFIG_HUGE_VMALLOC_DEFAULT_ENABLED is not set +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +# CONFIG_ETMEM_SCAN is not set +# CONFIG_ETMEM_SWAP is not set +# CONFIG_PAGE_CACHE_LIMIT is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +CONFIG_ZSMALLOC=y +# CONFIG_ZSMALLOC_STAT is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_FRAME_VECTOR=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# CONFIG_PIN_MEMORY is not set +# CONFIG_CLEAR_FREELIST_PAGE is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_ESP=y +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_IP_MROUTE_COMMON=y +CONFIG_IP_MROUTE=y +# CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set +# CONFIG_IP_PIMSM_V1 is not set +# CONFIG_IP_PIMSM_V2 is not set +CONFIG_SYN_COOKIES=y +# CONFIG_NET_IPVTI is not set +# CONFIG_NET_FOU is not set +# CONFIG_INET_AH is not set +CONFIG_INET_ESP=y +# CONFIG_INET_ESP_OFFLOAD is not set +# CONFIG_INET_ESPINTCP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_TCP_COMP is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_MPTCP is not set +CONFIG_NETWORK_SECMARK=y +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_NETLINK=y +CONFIG_NETFILTER_FAMILY_BRIDGE=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +CONFIG_NETFILTER_NETLINK_OSF=y +CONFIG_NF_CONNTRACK=y +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_SECMARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=y +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +CONFIG_NF_CONNTRACK_TFTP=y +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=y +CONFIG_NF_NAT_FTP=y +CONFIG_NF_NAT_TFTP=y +CONFIG_NF_NAT_REDIRECT=y +CONFIG_NF_NAT_MASQUERADE=y +CONFIG_NF_TABLES=y +# CONFIG_NF_TABLES_INET is not set +# CONFIG_NF_TABLES_NETDEV is not set +# CONFIG_NFT_NUMGEN is not set +# CONFIG_NFT_CT is not set +# CONFIG_NFT_COUNTER is not set +# CONFIG_NFT_CONNLIMIT is not set +# CONFIG_NFT_LOG is not set +# CONFIG_NFT_LIMIT is not set +# CONFIG_NFT_MASQ is not set +# CONFIG_NFT_REDIR is not set +# CONFIG_NFT_NAT is not set +# CONFIG_NFT_TUNNEL is not set +# CONFIG_NFT_OBJREF is not set +# CONFIG_NFT_QUOTA is not set +# CONFIG_NFT_REJECT is not set +# CONFIG_NFT_COMPAT is not set +# CONFIG_NFT_HASH is not set +# CONFIG_NFT_XFRM is not set +# CONFIG_NFT_SOCKET is not set +# CONFIG_NFT_OSF is not set +# CONFIG_NFT_TPROXY is not set +# CONFIG_NFT_SYNPROXY is not set +# CONFIG_NF_FLOW_TABLE is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=y +CONFIG_NETFILTER_XT_TARGET_NETMAP=y +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +CONFIG_NETFILTER_XT_TARGET_REDIRECT=y +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +CONFIG_NETFILTER_XT_MATCH_IPVS=y +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +CONFIG_NETFILTER_XT_MATCH_MAC=y +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +CONFIG_IP_VS=y +# CONFIG_IP_VS_IPV6 is not set +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +# CONFIG_IP_VS_PROTO_TCP is not set +# CONFIG_IP_VS_PROTO_UDP is not set +# CONFIG_IP_VS_PROTO_ESP is not set +# CONFIG_IP_VS_PROTO_AH is not set +# CONFIG_IP_VS_PROTO_SCTP is not set + +# +# IPVS scheduler +# +# CONFIG_IP_VS_RR is not set +# CONFIG_IP_VS_WRR is not set +# CONFIG_IP_VS_LC is not set +# CONFIG_IP_VS_WLC is not set +# CONFIG_IP_VS_FO is not set +# CONFIG_IP_VS_OVF is not set +# CONFIG_IP_VS_LBLC is not set +# CONFIG_IP_VS_LBLCR is not set +# CONFIG_IP_VS_DH is not set +# CONFIG_IP_VS_SH is not set +# CONFIG_IP_VS_MH is not set +# CONFIG_IP_VS_SED is not set +# CONFIG_IP_VS_NQ is not set + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +# CONFIG_IP_VS_NFCT is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=y +CONFIG_NF_SOCKET_IPV4=y +CONFIG_NF_TPROXY_IPV4=y +CONFIG_NF_TABLES_IPV4=y +# CONFIG_NFT_DUP_IPV4 is not set +# CONFIG_NFT_FIB_IPV4 is not set +# CONFIG_NF_TABLES_ARP is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=y +CONFIG_IP_NF_IPTABLES=y +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_SOCKET_IPV6=y +CONFIG_NF_TPROXY_IPV6=y +# CONFIG_NF_TABLES_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=y +# CONFIG_NF_LOG_IPV6 is not set +CONFIG_IP6_NF_IPTABLES=y +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +# CONFIG_IP6_NF_FILTER is not set +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +# CONFIG_IP6_NF_MANGLE is not set +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_NAT is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=y +# CONFIG_NF_TABLES_BRIDGE is not set +CONFIG_NF_CONNTRACK_BRIDGE=y +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=y +CONFIG_BRIDGE=y +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_MRP=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=y +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFB is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_CBS is not set +# CONFIG_NET_SCH_ETF is not set +# CONFIG_NET_SCH_TAPRIO is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_DRR is not set +# CONFIG_NET_SCH_MQPRIO is not set +# CONFIG_NET_SCH_SKBPRIO is not set +# CONFIG_NET_SCH_CHOKE is not set +# CONFIG_NET_SCH_QFQ is not set +# CONFIG_NET_SCH_CODEL is not set +# CONFIG_NET_SCH_FQ_CODEL is not set +# CONFIG_NET_SCH_CAKE is not set +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_HHF is not set +# CONFIG_NET_SCH_PIE is not set +# CONFIG_NET_SCH_PLUG is not set +# CONFIG_NET_SCH_ETS is not set +# CONFIG_NET_SCH_DEFAULT is not set + +# +# Classification +# +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +CONFIG_NET_CLS_CGROUP=y +# CONFIG_NET_CLS_BPF is not set +# CONFIG_NET_CLS_FLOWER is not set +# CONFIG_NET_CLS_MATCHALL is not set +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_CLS_ACT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_CGROUP_NET_CLASSID=y +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +CONFIG_CAN_BCM=y +CONFIG_CAN_GW=y +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +CONFIG_CAN_ROCKCHIP=y +CONFIG_CANFD_ROCKCHIP=y +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +# end of CAN Device Drivers + +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +# CONFIG_BT_HS is not set +CONFIG_BT_LE=y +# CONFIG_BT_LEDS is not set +# CONFIG_BT_MSFTEXT is not set +CONFIG_BT_DEBUGFS=y +# CONFIG_BT_SELFTEST is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=y +CONFIG_BT_BCM=y +CONFIG_BT_RTL=y +CONFIG_BT_HCIBTUSB=y +# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set +CONFIG_BT_HCIBTUSB_BCM=y +# CONFIG_BT_HCIBTUSB_MTK is not set +CONFIG_BT_HCIBTUSB_RTL=y +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +CONFIG_BT_HCIUART_ATH3K=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y +# CONFIG_BT_ATH3K is not set +# CONFIG_BT_MTKSDIO is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +# CONFIG_CFG80211_WEXT is not set +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +# CONFIG_MAC80211_LEDS is not set +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_GPIO is not set +CONFIG_RFKILL_RK=y +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_GRO_CELLS=y +CONFIG_PAGE_POOL=y +CONFIG_FAILOVER=y +CONFIG_ETHTOOL_NETLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIEAER is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEFAULT is not set +CONFIG_PCIEASPM_POWERSAVE=y +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCIE_XILINX is not set +# CONFIG_PCI_XGENE is not set +# CONFIG_PCIE_ALTERA is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set +CONFIG_PCIE_ROCKCHIP=y +CONFIG_PCIE_ROCKCHIP_HOST=y + +# +# DesignWare PCI Core Support +# +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +# CONFIG_PCIE_DW_PLAT_HOST is not set +CONFIG_PCIE_DW_ROCKCHIP=y +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCI_J721E_HOST is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +# CONFIG_UEVENT_HELPER is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +# CONFIG_FW_LOADER_COMPRESS is not set +CONFIG_FW_CACHE=y +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_DEVRES=y +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_MOXTET is not set +# CONFIG_SIMPLE_PM_BUS is not set +# CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_MHI_BUS is not set +# end of Bus devices + +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_GNSS is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +CONFIG_MTD_NAND_CORE=y +# CONFIG_MTD_ONENAND is not set +# CONFIG_MTD_RAW_NAND is not set +CONFIG_MTD_SPI_NAND=y + +# +# ECC engine support +# +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +CONFIG_CDROM=y +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +CONFIG_ZRAM=y +# CONFIG_ZRAM_WRITEBACK is not set +# CONFIG_ZRAM_MEMORY_TRACKING is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_VIRTIO_BLK is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=y +CONFIG_BLK_DEV_NVME=y +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_HWMON is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# CONFIG_NVME_TARGET is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +# CONFIG_UACCE is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=y +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_HISI_SAS is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_RAMAXEL_SPRAID is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=y +CONFIG_SATA_HOST=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_FORCE=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=y +# CONFIG_AHCI_CEVA is not set +# CONFIG_AHCI_QORIQ is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +# CONFIG_ATA_SFF is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +# CONFIG_BCACHE is not set +# CONFIG_BLK_DEV_DM is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_IPVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_TUN is not set +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=y +CONFIG_VIRTIO_NET=y +CONFIG_NLMON=y +# CONFIG_ARCNET is not set + +# +# Distributed Switch Architecture drivers +# +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +# CONFIG_ENA_ETHERNET is not set +# CONFIG_NET_VENDOR_AMD is not set +CONFIG_NET_VENDOR_AQUANTIA=y +CONFIG_AQTION=y +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +CONFIG_NET_VENDOR_CADENCE=y +# CONFIG_MACB is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +CONFIG_NET_VENDOR_HUAWEI=y +# CONFIG_BMA is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +CONFIG_E1000E=y +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_IGC is not set +CONFIG_NET_VENDOR_NETSWIFT=y +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +CONFIG_NET_VENDOR_MICROSEMI=y +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +CONFIG_R8169=y +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_ROCKCHIP=y +CONFIG_DWMAC_ROCKCHIP_TOOL=y +# CONFIG_DWMAC_RK_AUTO_DELAYLINE is not set +# CONFIG_DWMAC_INTEL_PLAT is not set +# CONFIG_STMMAC_PCI is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_NET_VENDOR_XILINX=y +# CONFIG_XILINX_AXI_EMAC is not set +# CONFIG_XILINX_LL_TEMAC is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MARVELL_10G_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_AT803X_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=y +# CONFIG_RENESAS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +# CONFIG_MDIO_THUNDER is not set + +# +# MDIO Multiplexers +# +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOE=y +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +# CONFIG_SLIP is not set +CONFIG_SLHC=y +CONFIG_USB_NET_DRIVERS=y +CONFIG_USB_CATC=y +CONFIG_USB_KAWETH=y +CONFIG_USB_PEGASUS=y +CONFIG_USB_RTL8150=y +CONFIG_USB_RTL8152=y +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +CONFIG_USB_NET_CDC_EEM=y +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +CONFIG_USB_NET_CDC_MBIM=y +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=y +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=y +CONFIG_USB_NET_CDC_SUBSET=y +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=y +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +CONFIG_USB_IPHETH=y +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +# CONFIG_ATH10K is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_BRCMSMAC is not set +# CONFIG_BRCMFMAC is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_MWIFIEX is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +# CONFIG_MT7663U is not set +# CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=y +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTW88 is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +# CONFIG_WL18XX is not set +# CONFIG_WLCORE is not set +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +CONFIG_WL_ROCKCHIP=y +CONFIG_WIFI_BUILD_MODULE=y +# CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set +# CONFIG_WIFI_GENERATE_RANDOM_MAC_ADDR is not set +# CONFIG_MXMWIFIEX is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=y +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ADC=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +CONFIG_MOUSE_CYAPA=y +CONFIG_MOUSE_ELAN_I2C=y +CONFIG_MOUSE_ELAN_I2C_I2C=y +# CONFIG_MOUSE_ELAN_I2C_SMBUS is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=y +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +CONFIG_TOUCHSCREEN_GOODIX=y +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +CONFIG_TOUCHSCREEN_ELAN=y +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +CONFIG_TOUCHSCREEN_EDT_FT5X06=y +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +CONFIG_TOUCHSCREEN_USB_COMPOSITE=y +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_JASTEC=y +CONFIG_TOUCHSCREEN_USB_ELO=y +CONFIG_TOUCHSCREEN_USB_E2I=y +CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y +CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y +CONFIG_TOUCHSCREEN_USB_NEXIO=y +CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +CONFIG_INPUT_RK805_PWRKEY=y +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_16550A_VARIANTS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=10 +CONFIG_SERIAL_8250_RUNTIME_UARTS=10 +# CONFIG_SERIAL_8250_EXTENDED is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_SERIAL_DEV_BUS is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_VIRTIO_CONSOLE is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +# CONFIG_HW_RANDOM_VIRTIO is not set +CONFIG_HW_RANDOM_OPTEE=y +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +CONFIG_HW_RANDOM_ROCKCHIP=y +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +# CONFIG_RAW_DRIVER is not set +CONFIG_DEVPORT=y +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +# CONFIG_TCG_TIS is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_FTPM_TEE is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +# CONFIG_XILLYBUS is not set +# end of Character devices + +# CONFIG_RANDOM_TRUST_CPU is not set +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +# CONFIG_I2C_MUX_PCA954x is not set +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +CONFIG_I2C_GPIO=y +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set +# CONFIG_I2C_HISI is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +CONFIG_I2C_RK3X=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set +# CONFIG_PTP_1588_CLOCK_IDTCM is not set +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_ROCKCHIP=y +# CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +CONFIG_PINCTRL_RK805=y +# CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_CADENCE is not set +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +# CONFIG_GPIO_MB86S7X is not set +# CONFIG_GPIO_PL061 is not set +CONFIG_GPIO_ROCKCHIP=y +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_XGENE is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +# CONFIG_GPIO_PCA953X_IRQ is not set +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_TPS6586X is not set +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_W1 is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_SBS=y +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +CONFIG_CHARGER_GPIO=y +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +CONFIG_CHARGER_BQ24735=y +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM1177 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set +# CONFIG_SENSORS_ARM_SCMI is not set +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CORSAIR_CPRO is not set +# CONFIG_SENSORS_DRIVETEMP is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +CONFIG_SENSORS_PWM_FAN=y +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +# CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR=y +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_FREQ_THERMAL=y +CONFIG_DEVFREQ_THERMAL=y +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_THERMAL_MMIO is not set +CONFIG_ROCKCHIP_THERMAL=y +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_INTEL_PMT is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +CONFIG_MFD_TPS6586X=y +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +# CONFIG_MFD_KHADAS_MCU is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +CONFIG_REGULATOR_ACT8865=y +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +# CONFIG_REGULATOR_FAN53880 is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MAX77826 is not set +# CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set +# CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set +# CONFIG_REGULATOR_MPQ7920 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set +# CONFIG_REGULATOR_SY8827N is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +CONFIG_REGULATOR_TPS65132=y +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_TPS6586X=y +# CONFIG_REGULATOR_VCTRL is not set +# CONFIG_RC_CORE is not set +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_CH7322 is not set +# CONFIG_USB_PULSE8_CEC is not set +# CONFIG_USB_RAINSHADOW_CEC is not set +CONFIG_MEDIA_SUPPORT=y +# CONFIG_MEDIA_SUPPORT_FILTER is not set +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +# end of Media device types + +# +# Media core support +# +CONFIG_VIDEO_DEV=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=y +# end of Media core support + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_V4L2_MEM2MEM_DEV=y +CONFIG_V4L2_FWNODE=y +# end of Video4Linux options + +# +# Media controller options +# +# CONFIG_MEDIA_CONTROLLER_DVB is not set +# end of Media controller options + +# +# Digital TV options +# +# CONFIG_DVB_MMAP is not set +CONFIG_DVB_NET=y +CONFIG_DVB_MAX_ADAPTERS=16 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=y +# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set +# CONFIG_USB_GSPCA is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set + +# +# Analog/digital TV USB devices +# +# CONFIG_VIDEO_AU0828 is not set +# CONFIG_VIDEO_CX231XX is not set + +# +# Digital TV USB devices +# +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set + +# +# Software defined radio USB devices +# +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_RADIO_SI470X is not set +# CONFIG_RADIO_SI4713 is not set +# CONFIG_USB_MR800 is not set +# CONFIG_USB_DSBR is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_SHARK is not set +# CONFIG_RADIO_SHARK2 is not set +# CONFIG_USB_KEENE is not set +# CONFIG_USB_RAREMONO is not set +# CONFIG_USB_MA901 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_RADIO_SAA7706H is not set +# CONFIG_RADIO_TEF6862 is not set +# CONFIG_RADIO_WL1273 is not set +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_V4L2=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_VMALLOC=y +CONFIG_VIDEOBUF2_DMA_SG=y +# CONFIG_V4L_PLATFORM_DRIVERS is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +CONFIG_VIDEO_ROCKCHIP_RGA=y +# CONFIG_DVB_PLATFORM_DRIVERS is not set +# CONFIG_SDR_PLATFORM_DRIVERS is not set + +# +# MMC/SDIO DVB adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_TEST_DRIVERS is not set +# end of Media drivers + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA1997X is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set +# CONFIG_VIDEO_MAX9286 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set +# end of Video decoders + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips + +# +# Camera sensor devices +# +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV5640 is not set +CONFIG_VIDEO_OV5645=y +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +CONFIG_VIDEO_OV5695=y +CONFIG_VIDEO_OV7251=y +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set +# end of SPI helper chips + +# +# Media SPI Adapters +# +CONFIG_CXD2880_SPI_DRV=m +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=y + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18250=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MSI001=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_M88RS6000T=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_SI2157=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_R820T=m +CONFIG_MEDIA_TUNER_MXL301RF=m +CONFIG_MEDIA_TUNER_QM1D1C0042=m +CONFIG_MEDIA_TUNER_QM1D1B0004=m +# end of Customize TV tuners + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV0910=m +CONFIG_DVB_STV6110x=m +CONFIG_DVB_STV6111=m +CONFIG_DVB_MXL5XX=m +CONFIG_DVB_M88DS3103=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_TDA18271C2DD=m +CONFIG_DVB_SI2165=m +CONFIG_DVB_MN88472=m +CONFIG_DVB_MN88473=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10039=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24117=m +CONFIG_DVB_CX24120=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_MB86A16=m +CONFIG_DVB_TDA10071=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_S5H1432=m +CONFIG_DVB_DRXD=m +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DIB9000=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_AF9013=m +CONFIG_DVB_EC100=m +CONFIG_DVB_STV0367=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_CXD2841ER=m +CONFIG_DVB_RTL2830=m +CONFIG_DVB_RTL2832=m +CONFIG_DVB_RTL2832_SDR=m +CONFIG_DVB_SI2168=m +CONFIG_DVB_ZD1301_DEMOD=m +CONFIG_DVB_CXD2880=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LGDT3306A=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +CONFIG_DVB_AU8522_V4L=m +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_S921=m +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +CONFIG_DVB_TC90522=m +CONFIG_DVB_MN88443X=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_DRX39XYJ=m +CONFIG_DVB_LNBH25=m +CONFIG_DVB_LNBH29=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_A8293=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_TDA665x=m +CONFIG_DVB_IX2505V=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_AF9033=m +CONFIG_DVB_HORUS3A=m +CONFIG_DVB_ASCOT2E=m +CONFIG_DVB_HELENE=m + +# +# Common Interface (EN50221) controller drivers +# +CONFIG_DVB_CXD2099=m +CONFIG_DVB_SP2=m +# end of Customise DVB Frontends + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set +# end of Media ancillary drivers + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +# CONFIG_DRM is not set + +# +# ARM devices +# +# end of ARM devices + +# CONFIG_MALI400 is not set +# CONFIG_MALI_MIDGARD is not set +# CONFIG_MALI_KUTF is not set +# CONFIG_MALI_BIFROST is not set + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_EFI is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# CONFIG_BACKLIGHT_LED is not set +# end of Backlight & LCD device support + +# +# Rockchip Misc Video driver +# + +# +# RGA +# +# CONFIG_ROCKCHIP_RGA is not set +# end of RGA + +CONFIG_ROCKCHIP_MULTI_RGA=y +CONFIG_ROCKCHIP_RGA_ASYNC=y +# CONFIG_ROCKCHIP_RGA_PROC_FS is not set +CONFIG_ROCKCHIP_RGA_DEBUG_FS=y +CONFIG_ROCKCHIP_RGA_DEBUGGER=y +# CONFIG_ROCKCHIP_RVE is not set + +# +# IEP +# +# CONFIG_IEP is not set +# end of IEP + +# CONFIG_ROCKCHIP_MPP_SERVICE is not set +# CONFIG_ROCKCHIP_DVBM is not set +# end of Rockchip Misc Video driver + +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +# CONFIG_FRAMEBUFFER_CONSOLE is not set +# end of Console display driver support + +# CONFIG_LOGO is not set +# end of Graphics support + +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_SEQ_DEVICE=y +CONFIG_SND_RAWMIDI=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +CONFIG_SND_HRTIMER=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +# CONFIG_SND_SUPPORT_OLD_API is not set +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_SEQUENCER=y +CONFIG_SND_SEQ_DUMMY=y +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_SEQ_MIDI_EVENT=y +CONFIG_SND_SEQ_MIDI=y +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_PCI is not set + +# +# HD-Audio +# +# end of HD-Audio + +CONFIG_SND_HDA_PREALLOC_SIZE=64 +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_MTK_BTCVSD is not set +CONFIG_SND_SOC_ROCKCHIP=y +CONFIG_SND_SOC_ROCKCHIP_I2S=y +CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=y +CONFIG_SND_SOC_ROCKCHIP_PDM=y +CONFIG_SND_SOC_ROCKCHIP_SPDIF=y +CONFIG_SND_SOC_ROCKCHIP_SPDIFRX=y +# CONFIG_SND_SOC_ROCKCHIP_VAD is not set +CONFIG_SND_SOC_ROCKCHIP_MAX98090=y +CONFIG_SND_SOC_ROCKCHIP_MULTICODECS=y +CONFIG_SND_SOC_ROCKCHIP_RT5645=y +CONFIG_SND_SOC_ROCKCHIP_HDMI=y +# CONFIG_SND_SOC_RK3288_HDMI_ANALOG is not set +# CONFIG_SND_SOC_RK3399_GRU_SOUND is not set +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_ADAU7118_HW is not set +# CONFIG_SND_SOC_ADAU7118_I2C is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4234 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_DA7213 is not set +# CONFIG_SND_SOC_DMIC is not set +CONFIG_SND_SOC_DUMMY_CODEC=y +CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_ES7134 is not set +# CONFIG_SND_SOC_ES7241 is not set +CONFIG_SND_SOC_ES8316=y +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +CONFIG_SND_SOC_MAX98090=y +# CONFIG_SND_SOC_MAX98357A is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX98373_I2C is not set +# CONFIG_SND_SOC_MAX98390 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +CONFIG_SND_SOC_RK3328=y +CONFIG_SND_SOC_RK817=y +CONFIG_SND_SOC_RK_CODEC_DIGITAL=y +CONFIG_SND_SOC_RL6231=y +CONFIG_SND_SOC_RT5616=y +# CONFIG_SND_SOC_RT5631 is not set +CONFIG_SND_SOC_RT5645=y +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +CONFIG_SND_SOC_SPDIF=y +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set +# CONFIG_SND_SOC_TAS2770 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set +CONFIG_SND_SOC_TS3A227E=y +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8904 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_MT6660 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +CONFIG_SND_SOC_NAU8822=y +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# end of CODEC drivers + +CONFIG_SND_SIMPLE_CARD_UTILS=y +CONFIG_SND_SIMPLE_CARD=y +# CONFIG_SND_AUDIO_GRAPH_CARD is not set + +# +# HID support +# +CONFIG_HID=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_BIGBEN_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELAN is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_REDRAGON is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +CONFIG_HID_MULTITOUCH=y +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_U2FZERO is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y +# end of USB HID support + +# +# I2C HID support +# +CONFIG_I2C_HID=y +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_LED_TRIG is not set +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEFAULT_PERSIST is not set +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_HCD_PCI is not set +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +# CONFIG_USB_MUSB_HDRC is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_HAPS=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +CONFIG_USB_SERIAL_CP210X=y +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=y +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +CONFIG_USB_SERIAL_KEYSPAN=y +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OTI6858=y +# CONFIG_USB_SERIAL_QCAUX is not set +CONFIG_USB_SERIAL_QUALCOMM=y +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=y +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_EZUSB_FX2=y +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +CONFIG_USB_GADGET_DEBUG_FILES=y +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_SNP_UDC_PLAT is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_ACM=y +CONFIG_USB_U_SERIAL=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_FS=y +CONFIG_USB_F_UVC=y +CONFIG_USB_CONFIGFS=y +# CONFIG_USB_CONFIGFS_SERIAL is not set +CONFIG_USB_CONFIGFS_ACM=y +# CONFIG_USB_CONFIGFS_OBEX is not set +# CONFIG_USB_CONFIGFS_NCM is not set +# CONFIG_USB_CONFIGFS_ECM is not set +# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set +# CONFIG_USB_CONFIGFS_RNDIS is not set +# CONFIG_USB_CONFIGFS_EEM is not set +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +CONFIG_USB_CONFIGFS_F_UVC=y +# CONFIG_USB_CONFIGFS_F_PRINTER is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + +CONFIG_TYPEC=y +CONFIG_TYPEC_TCPM=y +CONFIG_TYPEC_TCPCI=y +# CONFIG_TYPEC_RT1711H is not set +# CONFIG_TYPEC_TCPCI_MAXIM is not set +CONFIG_TYPEC_FUSB302=y +# CONFIG_TYPEC_UCSI is not set +# CONFIG_TYPEC_HD3SS3220 is not set +# CONFIG_TYPEC_TPS6598X is not set +# CONFIG_TYPEC_STUSB160X is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +# CONFIG_TYPEC_MUX_PI3USB30532 is not set +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +CONFIG_TYPEC_DP_ALTMODE=y +# CONFIG_TYPEC_NVIDIA_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +CONFIG_MMC_TEST=y + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +CONFIG_MMC_SDHCI_OF_DWCMSHC=y +# CONFIG_MMC_SDHCI_CADENCE is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +# CONFIG_MMC_SDHCI_MILBEAUT is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_K3 is not set +# CONFIG_MMC_DW_PCI is not set +CONFIG_MMC_DW_ROCKCHIP=y +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MMC_SDHCI_XENON is not set +# CONFIG_MMC_SDHCI_OMAP is not set +# CONFIG_MMC_SDHCI_AM654 is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_CLASS_MULTICOLOR is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_AW2013 is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_EL15203000 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set +# CONFIG_LEDS_LP55XX_COMMON is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +CONFIG_LEDS_IS31FL32XX=y + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_SYSCON is not set +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_TI_LMU_COMMON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +# CONFIG_LEDS_TRIGGER_DISK is not set +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +# CONFIG_LEDS_TRIGGER_CPU is not set +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_LEDS_TRIGGER_PANIC is not set +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_PATTERN is not set +# CONFIG_LEDS_TRIGGER_AUDIO is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +CONFIG_RTC_DRV_HYM8563=y +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_RK808=y +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +CONFIG_RTC_DRV_PCF8563=y +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_TPS6586X is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +CONFIG_RTC_DRV_RX8010=y +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +# CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_EFI is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +# CONFIG_DW_AXI_DMAC is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_FSL_QDMA is not set +# CONFIG_HISI_DMA is not set +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_MV_XOR_V2 is not set +CONFIG_PL330_DMA=y +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set +# CONFIG_SF_PDMA is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set + +# +# DMABUF options +# +CONFIG_DMABUF_CACHE=y +CONFIG_SYNC_FILE=y +CONFIG_SW_SYNC=y +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_SELFTESTS is not set +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_PAGE_POOL=y +CONFIG_DMABUF_HEAPS_DEFERRED_FREE=y +CONFIG_DMABUF_SYSFS_STATS=y +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_DMABUF_HEAPS_CMA=y +# CONFIG_DMABUF_HEAPS_ROCKCHIP is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VFIO is not set +CONFIG_VIRT_DRIVERS=y +CONFIG_VIRTIO=y +CONFIG_VIRTIO_MENU=y +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_BALLOON is not set +# CONFIG_VIRTIO_INPUT is not set +# CONFIG_VIRTIO_MMIO is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# CONFIG_AD7280 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set +# end of Active energy metering IC + +# +# Resolver to digital converters +# +# CONFIG_AD2S1210 is not set +# end of Resolver to digital converters +# end of IIO staging drivers + +# CONFIG_FB_SM750 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_ASHMEM is not set +# CONFIG_DEBUG_KINFO is not set +# CONFIG_ION is not set +CONFIG_FIQ_DEBUGGER=y +CONFIG_FIQ_DEBUGGER_NO_SLEEP=y +# CONFIG_FIQ_DEBUGGER_WAKEUP_IRQ_ALWAYS_ON is not set +CONFIG_FIQ_DEBUGGER_CONSOLE=y +CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y +CONFIG_FIQ_DEBUGGER_TRUST_ZONE=y +# CONFIG_FIQ_DEBUGGER_UART_OVERLAY is not set +CONFIG_RK_CONSOLE_THREAD=y +# end of Android + +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_KS7010 is not set +# CONFIG_PI433 is not set + +# +# Gasket devices +# +# CONFIG_STAGING_GASKET_FRAMEWORK is not set +# end of Gasket devices + +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_FIELDBUS_DEV is not set +# CONFIG_QLGE is not set +# CONFIG_WFX is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX9485 is not set +CONFIG_COMMON_CLK_RK808=y +CONFIG_COMMON_CLK_SCMI=y +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_CLK_QORIQ is not set +# CONFIG_COMMON_CLK_XGENE is not set +CONFIG_COMMON_CLK_PWM=y +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_COMMON_CLK_ROCKCHIP=y +CONFIG_CLK_PX30=y +CONFIG_CLK_RK1808=y +CONFIG_CLK_RK3328=y +CONFIG_CLK_RK3399=y +CONFIG_CLK_RK3568=y +CONFIG_CLK_RK3588=y +# CONFIG_ROCKCHIP_CLK_COMPENSATION is not set +CONFIG_ROCKCHIP_CLK_LINK=y +CONFIG_ROCKCHIP_CLK_BOOST=y +CONFIG_ROCKCHIP_CLK_INV=y +CONFIG_ROCKCHIP_CLK_PVTM=y +CONFIG_ROCKCHIP_DDRCLK=y +# CONFIG_ROCKCHIP_DDRCLK_SCPI is not set +CONFIG_ROCKCHIP_DDRCLK_SIP=y +CONFIG_ROCKCHIP_DDRCLK_SIP_V2=y +# CONFIG_ROCKCHIP_PLL_RK3066 is not set +CONFIG_ROCKCHIP_PLL_RK3399=y +CONFIG_ROCKCHIP_PLL_RK3588=y +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_ROCKCHIP_TIMER=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +CONFIG_MAILBOX=y +# CONFIG_ARM_MHU is not set +# CONFIG_PLATFORM_MHU is not set +# CONFIG_PL320_MBOX is not set +# CONFIG_ROCKCHIP_MBOX is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ROCKCHIP_IOMMU=y +# CONFIG_ARM_SMMU is not set +# CONFIG_ARM_SMMU_V3 is not set +# CONFIG_VIRTIO_IOMMU is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +# CONFIG_FSL_RCPM is not set +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +# +# Rockchip CPU selection +# +CONFIG_CPU_PX30=y +CONFIG_CPU_RK1808=y +# CONFIG_CPU_RK3308 is not set +CONFIG_CPU_RK3328=y +# CONFIG_CPU_RK3368 is not set +CONFIG_CPU_RK3399=y +CONFIG_CPU_RK3568=y +CONFIG_CPU_RK3588=y +# end of Rockchip CPU selection + +CONFIG_NO_GKI=y +CONFIG_ROCKCHIP_CPUINFO=y +CONFIG_ROCKCHIP_GRF=y +# CONFIG_ROCKCHIP_HW_DECOMPRESS is not set +CONFIG_ROCKCHIP_IODOMAIN=y +# CONFIG_ROCKCHIP_IOMUX is not set +CONFIG_ROCKCHIP_IPA=y +CONFIG_ROCKCHIP_OPP=y +# CONFIG_ROCKCHIP_PERFORMANCE is not set +CONFIG_ROCKCHIP_PM_DOMAINS=y +CONFIG_ROCKCHIP_PVTM=y +# CONFIG_ROCKCHIP_RAMDISK is not set +CONFIG_ROCKCHIP_SUSPEND_MODE=y +CONFIG_ROCKCHIP_SYSTEM_MONITOR=y +CONFIG_ROCKCHIP_VENDOR_STORAGE=y +CONFIG_ROCKCHIP_MMC_VENDOR_STORAGE=y +# CONFIG_ROCKCHIP_MTD_VENDOR_STORAGE is not set +CONFIG_ROCKCHIP_VENDOR_STORAGE_UPDATE_LOADER=y +CONFIG_ROCKCHIP_FIQ_DEBUGGER=y +CONFIG_ROCKCHIP_DEBUG=y +# CONFIG_ROCKCHIP_MINI_KERNEL is not set +# CONFIG_ROCKCHIP_THUNDER_BOOT is not set +# CONFIG_ROCKCHIP_NPOR_POWERGOOD is not set +# CONFIG_RK_CMA_PROCFS is not set +# CONFIG_RK_DMABUF_PROCFS is not set +# CONFIG_RK_MEMBLOCK_PROCFS is not set +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set +CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y +CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_NOCP=y +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_PTN5150 is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +# CONFIG_EXTCON_USB_GPIO is not set +# CONFIG_MEMORY is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGERED_BUFFER=y +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set +# CONFIG_IIO_TRIGGERED_EVENT is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMA400 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7091R5 is not set +# CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7292 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_ADI_AXI_ADC is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2496 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +# CONFIG_NAU7802 is not set +CONFIG_ROCKCHIP_SARADC=y +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set +# end of Amplifiers + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_SCD30_CORE is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +# +# Hid Sensor IIO Common +# +# end of Hid Sensor IIO Common + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_FXOS8700_I2C is not set +# CONFIG_FXOS8700_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_ICM42600_I2C is not set +# CONFIG_INV_ICM42600_SPI is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP002 is not set +# CONFIG_GP2AP020A00F is not set +CONFIG_SENSORS_ISL29018=y +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +CONFIG_SENSORS_TSL2563=y +CONFIG_TSL2583=y +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6030 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +CONFIG_IIO_SYSFS_TRIGGER=y +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +# CONFIG_DLHL60D is not set +# CONFIG_DPS310 is not set +# CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_PING is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +# CONFIG_LTC2983 is not set +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set +CONFIG_PWM_ROCKCHIP=y + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_AL_FIC is not set +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SCMI=y +# CONFIG_RESET_TI_SYSCON is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PHY_MIPI_DPHY=y +# CONFIG_PHY_XGENE is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_FSL_IMX8MQ_USB is not set +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +CONFIG_PHY_ROCKCHIP_CSI2_DPHY=y +CONFIG_PHY_ROCKCHIP_DP=y +# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set +CONFIG_PHY_ROCKCHIP_EMMC=y +# CONFIG_PHY_ROCKCHIP_INNO_COMBPHY is not set +# CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY is not set +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_INNO_USB3=y +# CONFIG_PHY_ROCKCHIP_INNO_VIDEO_COMBO_PHY is not set +CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=y +CONFIG_PHY_ROCKCHIP_MIPI_RX=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y +CONFIG_PHY_ROCKCHIP_NANENG_EDP=y +# CONFIG_PHY_ROCKCHIP_NANENG_USB2 is not set +CONFIG_PHY_ROCKCHIP_PCIE=y +CONFIG_PHY_ROCKCHIP_SAMSUNG_DCPHY=y +CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y +CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y +CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y +CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_PHY_ROCKCHIP_USB=y +CONFIG_PHY_ROCKCHIP_USBDP=y +# CONFIG_PHY_SAMSUNG_USB2 is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +# CONFIG_HISI_PCIE_PMU is not set +# end of Performance monitor support + +# CONFIG_RAS is not set +# CONFIG_USB4 is not set + +# +# Android +# +CONFIG_ANDROID=y +# CONFIG_ANDROID_BINDER_IPC is not set +# end of Android + +# +# Vendor Hooks +# +# CONFIG_VENDOR_HOOKS is not set +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +CONFIG_ROCKCHIP_EFUSE=y +CONFIG_ROCKCHIP_OTP=y + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +CONFIG_TEE=y + +# +# TEE drivers +# +CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 +# end of TEE drivers + +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set +# CONFIG_RK_FLASH is not set +# CONFIG_RK_NAND is not set + +# +# Headset device support +# +CONFIG_RK_HEADSET=y +# end of Headset device support + +# +# RKNPU +# +# end of RKNPU +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_XFS_FS=y +CONFIG_XFS_SUPPORT_V4=y +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_ONLINE_SCRUB is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +# CONFIG_DNOTIFY is not set +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_FUSE_FS=y +# CONFIG_CUSE is not set +CONFIG_VIRTIO_FS=y +CONFIG_OVERLAY_FS=y +CONFIG_OVERLAY_FS_REDIRECT_DIR=y +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +CONFIG_OVERLAY_FS_INDEX=y +CONFIG_OVERLAY_FS_XINO_AUTO=y +CONFIG_OVERLAY_FS_METACOPY=y + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=936 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_INODE64 is not set +# CONFIG_HUGETLBFS is not set +CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UBIFS_FS_ZSTD=y +# CONFIG_UBIFS_ATIME_SUPPORT is not set +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_SECURITY=y +# CONFIG_UBIFS_FS_AUTHENTICATION is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y +CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y +CONFIG_SQUASHFS_EMBEDDED=y +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +CONFIG_PSTORE_CONSOLE=y +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_FTRACE is not set +CONFIG_PSTORE_RAM=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y +# CONFIG_NFS_V4_1 is not set +# CONFIG_ROOT_NFS is not set +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_SWAP=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +CONFIG_NLS_CODEPAGE_936=y +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set +CONFIG_UNICODE=y +# CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +CONFIG_SECURITYFS=y +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options + +# CONFIG_SECURITY_BOOT_INIT is not set +# end of Security options + +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_SIMD=y + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +# CONFIG_CRYPTO_CURVE25519 is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_XXHASH is not set +# CONFIG_CRYPTO_BLAKE2B is not set +# CONFIG_CRYPTO_BLAKE2S is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_SM3_GENERIC is not set +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4_GENERIC is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_TWOFISH_COMMON=y + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +CONFIG_CRYPTO_ZSTD=y + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +CONFIG_CRYPTO_HASH_INFO=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=y +# CONFIG_CRYPTO_LIB_BLAKE2S is not set +# CONFIG_CRYPTO_LIB_CHACHA is not set +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +CONFIG_CRYPTO_DEV_ROCKCHIP=y +# CONFIG_CRYPTO_DEV_VIRTIO is not set +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_CCREE is not set +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set +# CONFIG_PGP_LIBRARY is not set +# CONFIG_PGP_KEY_PARSER is not set +# CONFIG_PGP_PRELOAD is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_LINEAR_RANGES=y +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y +# CONFIG_INDIRECT_PIO is not set +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_REED_SOLOMON=y +CONFIG_REED_SOLOMON_ENC8=y +CONFIG_REED_SOLOMON_DEC8=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_CMA=y +# CONFIG_DMA_PERNUMA_CMA is not set + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +# CONFIG_IRQ_POLL is not set +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +CONFIG_FONT_8x16=y +CONFIG_FONT_AUTOSELECT=y +CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=1 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_BTF is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +# end of Generic Kernel Debugging Instruments + +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_TABLE_CHECK is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_PAGE_REF is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SOFTLOCKUP_DETECTOR is not set + +# +# ARM64 NMI watchdog configuration +# +# end of ARM64 NMI watchdog configuration + +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +CONFIG_SCHEDSTATS=y +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y + +# +# Debug kernel data structures +# +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +CONFIG_DEBUG_CREDENTIALS=y + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_RCU_TRACE=y +# CONFIG_RCU_EQS_DEBUG is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_BOOTTIME_TRACING is not set +CONFIG_FUNCTION_TRACER=y +CONFIG_FUNCTION_GRAPH_TRACER=y +CONFIG_DYNAMIC_FTRACE=y +CONFIG_DYNAMIC_FTRACE_WITH_REGS=y +# CONFIG_FUNCTION_PROFILER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_HWLAT_TRACER is not set +# CONFIG_OSNOISE_TRACER is not set +# CONFIG_TIMERLAT_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_TRACER_SNAPSHOT is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_UPROBE_EVENTS=y +CONFIG_DYNAMIC_EVENTS=y +CONFIG_PROBE_EVENTS=y +CONFIG_FTRACE_MCOUNT_RECORD=y +# CONFIG_SYNTH_EVENTS is not set +# CONFIG_HIST_TRIGGERS is not set +# CONFIG_TRACE_EVENT_INJECT is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_TRACE_EVAL_MAP_FILE is not set +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_PREEMPTIRQ_DELAY_TEST is not set +# CONFIG_SAMPLES is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set + +# +# arm64 Debugging +# +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_DEBUG_EFI is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of arm64 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +CONFIG_RUNTIME_TESTING_MENU=y +CONFIG_LKDTM=y +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_MIN_HEAP is not set +# CONFIG_TEST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_STRSCPY is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_STACKINIT is not set +# CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set +# CONFIG_MEMTEST is not set +# end of Kernel Testing and Coverage + +# +# Rust hacking +# +# end of Rust hacking +# end of Kernel hacking diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0001-fix-IRQ_WORK_INIT_HARD-panic.patch b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0001-fix-IRQ_WORK_INIT_HARD-panic.patch new file mode 100644 index 0000000000000000000000000000000000000000..0cea0eb4fecfe074cc98838b0dfc3044ec818bce --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0001-fix-IRQ_WORK_INIT_HARD-panic.patch @@ -0,0 +1,25 @@ +From a46c515cbab58ad14986700befc8021726ba2951 Mon Sep 17 00:00:00 2001 +From: liangqifeng +Date: Mon, 17 Jun 2024 11:33:45 +0000 +Subject: [PATCH] 0001test + +--- + kernel/sched/topology.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c +index 0d0f55181..c863f555b 100644 +--- a/kernel/sched/topology.c ++++ b/kernel/sched/topology.c +@@ -528,7 +528,7 @@ static int init_rootdomain(struct root_domain *rd) + #ifdef HAVE_RT_PUSH_IPI + rd->rto_cpu = -1; + raw_spin_lock_init(&rd->rto_lock); +- init_irq_work(&rd->rto_push_work, rto_push_irq_work_func); ++ rd->rto_push_work = IRQ_WORK_INIT_HARD(rto_push_irq_work_func); + #endif + + init_dl_bw(&rd->dl_bw); +-- +2.41.0 + diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0002-fix-fiq_debugger.patch b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0002-fix-fiq_debugger.patch new file mode 100644 index 0000000000000000000000000000000000000000..94b8f23598fb5b85bf8347bf754e786f6253444e --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0002-fix-fiq_debugger.patch @@ -0,0 +1,19 @@ +diff --git a/drivers/staging/android/fiq_debugger/fiq_debugger.c b/drivers/staging/android/fiq_debugger/fiq_debugger.c +index 59bd0a8410e8..b5fd8565ba45 100755 +--- a/drivers/staging/android/fiq_debugger/fiq_debugger.c ++++ b/drivers/staging/android/fiq_debugger/fiq_debugger.c +@@ -263,11 +263,11 @@ static void fiq_debugger_dump_kernel_log(struct fiq_debugger_state *state) + { + char buf[512]; + size_t len; +- struct kmsg_dumper dumper = { .active = true }; ++ struct kmsg_dumper_iter dumper = { .active = true }; + + +- kmsg_dump_rewind_nolock(&dumper); +- while (kmsg_dump_get_line_nolock(&dumper, true, buf, ++ kmsg_dump_rewind(&dumper); ++ while (kmsg_dump_get_line(&dumper, true, buf, + sizeof(buf) - 1, &len)) { + buf[len] = 0; + fiq_debugger_puts(state, buf); diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0002-fix_fpsimd_sched_panic.patch b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0002-fix_fpsimd_sched_panic.patch new file mode 100644 index 0000000000000000000000000000000000000000..7eaa0782ed41feb5ebe016d051f01f31932a91a5 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0002-fix_fpsimd_sched_panic.patch @@ -0,0 +1,220 @@ +diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c +index 84520f11667d..af75fe83a8fa 100755 +--- a/arch/arm64/kernel/fpsimd.c ++++ b/arch/arm64/kernel/fpsimd.c +@@ -177,10 +177,12 @@ static void __get_cpu_fpsimd_context(void) + * + * The double-underscore version must only be called if you know the task + * can't be preempted. ++ * ++ * Disabling preemption prevents nesting via fpsimd_thread_switch(). + */ + static void get_cpu_fpsimd_context(void) + { +- local_bh_disable(); ++ preempt_disable_bh(); + __get_cpu_fpsimd_context(); + } + +@@ -201,7 +203,7 @@ static void __put_cpu_fpsimd_context(void) + static void put_cpu_fpsimd_context(void) + { + __put_cpu_fpsimd_context(); +- local_bh_enable(); ++ preempt_enable_bh(); + } + + static bool have_cpu_fpsimd_context(void) +diff --git a/include/linux/bottom_half.h b/include/linux/bottom_half.h +index eed86eb0a1de..b6fc88042bc3 100755 +--- a/include/linux/bottom_half.h ++++ b/include/linux/bottom_half.h +@@ -19,6 +19,24 @@ static inline void local_bh_disable(void) + __local_bh_disable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); + } + ++/* ++* local_bh_disable() protects against both preemption and soft interrupts ++* on !RT kernels. ++* ++* On RT kernels local_bh_disable() is not sufficient because it only ++* serializes soft interrupt related sections via a local lock, but stays ++* preemptible. Disabling preemption is the right choice here as bottom ++* half processing is always in thread context on RT kernels so it ++* implicitly prevents bottom half processing as well. ++*/ ++static inline void preempt_disable_bh(void) ++{ ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ preempt_disable(); ++ else ++ local_bh_disable(); ++} ++ + extern void _local_bh_enable(void); + extern void __local_bh_enable_ip(unsigned long ip, unsigned int cnt); + +@@ -32,6 +50,14 @@ static inline void local_bh_enable(void) + __local_bh_enable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); + } + ++static inline void preempt_enable_bh(void) ++{ ++ if (IS_ENABLED(CONFIG_PREEMPT_RT)) ++ preempt_enable(); ++ else ++ local_bh_enable(); ++} ++ + #ifdef CONFIG_PREEMPT_RT + extern bool local_bh_blocked(void); + #else +diff --git a/kernel/sched/core.c b/kernel/sched/core.c +old mode 100644 +new mode 100755 +index a24e8d547cee..f341b0d36fa0 +--- a/kernel/sched/core.c ++++ b/kernel/sched/core.c +@@ -4519,15 +4519,20 @@ static void do_balance_callbacks(struct rq *rq, struct callback_head *head) + } + } + ++static void balance_push(struct rq *rq); ++ ++struct callback_head balance_push_callback = { ++ .next = NULL, ++ .func = (void (*)(struct callback_head *))balance_push, ++}; ++ + static inline struct callback_head *splice_balance_callbacks(struct rq *rq) + { + struct callback_head *head = rq->balance_callback; + + lockdep_assert_held(&rq->__lock); +- if (head) { ++ if (head) + rq->balance_callback = NULL; +- rq->balance_flags &= ~BALANCE_WORK; +- } + + return head; + } +@@ -4548,21 +4553,6 @@ static inline void balance_callbacks(struct rq *rq, struct callback_head *head) + } + } + +-static void balance_push(struct rq *rq); +- +-static inline void balance_switch(struct rq *rq) +-{ +- if (likely(!rq->balance_flags)) +- return; +- +- if (rq->balance_flags & BALANCE_PUSH) { +- balance_push(rq); +- return; +- } +- +- __balance_callbacks(rq); +-} +- + #else + + static inline void __balance_callbacks(struct rq *rq) +@@ -4578,10 +4568,6 @@ static inline void balance_callbacks(struct rq *rq, struct callback_head *head) + { + } + +-static inline void balance_switch(struct rq *rq) +-{ +-} +- + #endif + + static inline void +@@ -4609,6 +4595,7 @@ static inline void finish_lock_switch(struct rq *rq) + * prev into current: + */ + spin_acquire(&__rq_lockp(rq)->dep_map, 0, 0, _THIS_IP_); ++ __balance_callbacks(rq); + raw_spin_rq_unlock_irq(rq); + } + +@@ -8504,7 +8491,7 @@ static void balance_push(struct rq *rq) + + lockdep_assert_held(&rq->__lock); + SCHED_WARN_ON(rq->cpu != smp_processor_id()); +- ++ rq->balance_callback = &balance_push_callback; + /* + * Both the cpu-hotplug and stop task are in this case and are + * required to complete the hotplug process. +@@ -8553,9 +8540,9 @@ static void balance_push_set(int cpu, bool on) + + rq_lock_irqsave(rq, &rf); + if (on) +- rq->balance_flags |= BALANCE_PUSH; ++ rq->balance_callback = &balance_push_callback; + else +- rq->balance_flags &= ~BALANCE_PUSH; ++ rq->balance_callback = NULL; + rq_unlock_irqrestore(rq, &rf); + } + +diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h +old mode 100644 +new mode 100755 +index 66188873de5c..0cf533637e3c +--- a/kernel/sched/sched.h ++++ b/kernel/sched/sched.h +@@ -1038,7 +1038,6 @@ struct rq { + unsigned long cpu_capacity_orig; + + struct callback_head *balance_callback; +- unsigned char balance_flags; + + unsigned char nohz_idle_balance; + unsigned char idle_balance; +@@ -1588,6 +1587,8 @@ struct rq_flags { + #endif + }; + ++extern struct callback_head balance_push_callback; ++ + /* + * Lockdep annotation that avoids accidental unlocks; it's like a + * sticky/continuous lockdep_assert_held(). +@@ -1607,7 +1608,7 @@ static inline void rq_pin_lock(struct rq *rq, struct rq_flags *rf) + rf->clock_update_flags = 0; + #endif + #ifdef CONFIG_SMP +- SCHED_WARN_ON(rq->balance_callback); ++ SCHED_WARN_ON(rq->balance_callback && rq->balance_callback != &balance_push_callback); + #endif + } + +@@ -1780,9 +1781,6 @@ init_numa_balancing(unsigned long clone_flags, struct task_struct *p) + + #ifdef CONFIG_SMP + +-#define BALANCE_WORK 0x01 +-#define BALANCE_PUSH 0x02 +- + static inline void + queue_balance_callback(struct rq *rq, + struct callback_head *head, +@@ -1790,13 +1788,12 @@ queue_balance_callback(struct rq *rq, + { + lockdep_assert_rq_held(rq); + +- if (unlikely(head->next || (rq->balance_flags & BALANCE_PUSH))) ++if (unlikely(head->next || rq->balance_callback == &balance_push_callback)) + return; + + head->func = (void (*)(struct callback_head *))func; + head->next = rq->balance_callback; + rq->balance_callback = head; +- rq->balance_flags |= BALANCE_WORK; + } + + #define rcu_dereference_check_sched_domain(p) \ diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0003-ok3568-support-mcs.patch b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0003-ok3568-support-mcs.patch new file mode 100644 index 0000000000000000000000000000000000000000..b31e81a2d750237096cd4295a2641add257c6776 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/files/patches/0003-ok3568-support-mcs.patch @@ -0,0 +1,41 @@ +From 963c2335b94ce3696bf0c96ff41889d06274295a Mon Sep 17 00:00:00 2001 +From: liangqifeng +Date: Thu, 16 Feb 2023 09:56:22 +0000 +Subject: [PATCH] mcs patch + +--- + arch/arm64/boot/dts/rockchip/OK3568-C-common.dtsi | 5 +++++ + arch/arm64/boot/dts/rockchip/OK3568-C-linux.dts | 2 +- + 2 files changed, 6 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/OK3568-C-common.dtsi b/arch/arm64/boot/dts/rockchip/OK3568-C-common.dtsi +index 31ffd6024..755eaa0bb 100755 +--- a/arch/arm64/boot/dts/rockchip/OK3568-C-common.dtsi ++++ b/arch/arm64/boot/dts/rockchip/OK3568-C-common.dtsi +@@ -564,6 +564,11 @@ + ftrace-size = <0x00000>; + pmsg-size = <0x50000>; + }; ++ mcs@70000000 { ++ reg = <0x00 0x70000000 0x00 0xd000000>; ++ compatible = "mcs_mem"; ++ no-map; ++ }; + }; + + &rng { +diff --git a/arch/arm64/boot/dts/rockchip/OK3568-C-linux.dts b/arch/arm64/boot/dts/rockchip/OK3568-C-linux.dts +index 178b4d831..992b0dadb 100755 +--- a/arch/arm64/boot/dts/rockchip/OK3568-C-linux.dts ++++ b/arch/arm64/boot/dts/rockchip/OK3568-C-linux.dts +@@ -2,6 +2,6 @@ + + / { + chosen: chosen { +- bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait"; ++ bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait maxcpus=3"; + }; + }; +-- +2.33.0 + diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/linux-openeuler-rt.bbappend b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/linux-openeuler-rt.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..90895127e5958fe207bcab44ccd997536c5b325e --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/linux-openeuler-rt.bbappend @@ -0,0 +1,18 @@ +require recipes-kernel/linux/linux-rockchip.inc + +SRC_URI:remove = " \ + file://src-kernel-5.10/0001-apply-preempt-RT-patch.patch \ + file://src-kernel-5.10/0001-modify-openeuler_defconfig-for-rt62.patch \ +" + +SRC_URI:append = " \ + file://src-kernel-5.10-tag-rockchip/0001-apply-preempt-RT-patch.patch \ + file://patches/0001-fix-IRQ_WORK_INIT_HARD-panic.patch \ + file://patches/0002-fix-fiq_debugger.patch \ + file://patches/0002-fix_fpsimd_sched_panic.patch \ +" + +OPENEULER_REPO_NAMES += "src-kernel-5.10-tag-rockchip" + +#add COMPATIBLE_MACHINE +COMPATIBLE_MACHINE = "ok3568|ryd-3568|ok3588|ok3399|roc-rk3588s-pc|orangepi4-lts|orangepi5" diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/linux-openeuler.bbappend b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/linux-openeuler.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..b0d99fa838a0368dcba296198d3a93eddfd3d9c0 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/linux-openeuler.bbappend @@ -0,0 +1,4 @@ +require recipes-kernel/linux/linux-rockchip.inc + +# add COMPATIBLE_MACHINE +COMPATIBLE_MACHINE = "ok3568|ryd-3568|ok3588|ok3399|orangepi4-lts|roc-rk3588s-pc|orangepi5" diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/linux-rockchip.inc b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/linux-rockchip.inc new file mode 100644 index 0000000000000000000000000000000000000000..87c1cdb138b2d84357f2e332b1f7c9d0e17a37f7 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-kernel/linux/linux-rockchip.inc @@ -0,0 +1,45 @@ +# add recipes-kernel path to find patch and defconfig +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +# add patch prebuild tools and logo +SRC_URI:remove = " \ + file://kernel-5.10 \ + file://patches/${ARCH}/0001-arm64-add-zImage-support-for-arm64.patch \ +" + +## basic information +OPENEULER_REPO_NAME = "rockchip-kernel" +# download src-openeuler/kernel repo for patches +OPENEULER_REPO_NAMES = "rockchip-kernel" + +SRC_URI:append = " \ + file://rockchip-kernel \ +" + +INHIBIT_PACKAGE_STRIP = "1" + +# mcs patch for ok3568 devicetree +SRC_URI:append:ok3568 = " \ + ${@bb.utils.contains('MCS_FEATURES', 'openamp', 'file://patches/0003-ok3568-support-mcs.patch', '', d)} \ +" + +S = "${WORKDIR}/rockchip-kernel" + +OPENEULER_KERNEL_CONFIG = "file://config/${SOC_FAMILY}/defconfig" + +# mkimg need use dtc command +DEPENDS += "dtc-native" + +# Hack for rockchip style images incase you need boot.img +python () { + if not d.getVar('KERNEL_DEVICETREE'): + raise bb.parse.SkipPackage('KERNEL_DEVICETREE is not specified!') + + if d.getVar('ROCKCHIP_KERNEL_IMAGES'): + # Use rockchip stype target, which is '.img' + d.setVar('KERNEL_IMAGETYPE_FOR_MAKE', ' ' + d.getVar('KERNEL_DEVICETREE').replace('rockchip/', '').replace('.dtb', '.img')); +} + +do_compile:append(){ + install ${B}/*.img ${B}/${KERNEL_OUTPUT_DIR}/ +} diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/jailhouse/files/cells/arm64/ok3568-root-rtt.c b/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/jailhouse/files/cells/arm64/ok3568-root-rtt.c new file mode 100644 index 0000000000000000000000000000000000000000..8849755b0615a4aa4ba35a8137116a92bf5f4af5 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/jailhouse/files/cells/arm64/ok3568-root-rtt.c @@ -0,0 +1,770 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Configuration for OK3568 arm64 target, 2G RAM, 4 cores + * + * Copyright (c) NCTI, 2023 + * + * Authors: + * Hu Yongqiang + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + */ + +#include +#include + +struct { + struct jailhouse_system header; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[94]; + struct jailhouse_irqchip irqchips[2]; +} __attribute__((packed)) config = { + .header = { + .signature = JAILHOUSE_SYSTEM_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .architecture = JAILHOUSE_ARM64, + .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE, + .hypervisor_memory = { + .phys_start = 0x60000000, + .size = 0x8000000 + }, + .debug_console = { + .address = 0xfe660000, + .size = 0x100, + .type = JAILHOUSE_CON_TYPE_8250, /* choose the 8250 driver */ + .flags = JAILHOUSE_CON_ACCESS_MMIO | JAILHOUSE_CON_REGDIST_4 + }, + + .platform_info = { + .arm = { + .gic_version = 3, + .gicd_base = 0xfd400000, + .gicr_base = 0xfd460000, + .maintenance_irq = 25 + }, + }, + .root_cell = { + .name = "rk3568-openeuler", + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + }, + }, + + .cpus = { + 0xf, + }, + + .mem_regions = { + /* RAM */ + { + .phys_start = 0x0, + .virt_start = 0x0, + .size = 0x50000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE + }, + { + .phys_start = 0x7a000000, + .virt_start = 0x7a000000, + .size = 0x400000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE + }, + /* ITS */ + { + .phys_start = 0xfd440000, + .virt_start = 0xfd440000, + .size = 0x20000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + + }, + /* USB */ + { + .phys_start = 0xfd800000, + .virt_start = 0xfd800000, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + { + .phys_start = 0xfdca0000, + .virt_start = 0xfdca0000, + .size = 0x8000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + { + .phys_start = 0xfdca8000, + .virt_start = 0xfdca8000, + .size = 0x8000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* SRAM fdcc0000-fdccafff */ + { + .phys_start = 0xfdcc0000, + .virt_start = 0xfdcc0000, + .size = 0xb000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE + }, + /* PMUCRU */ + { + .phys_start = 0xfdd00000, + .virt_start = 0xfdd00000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* CRU*/ + { + .phys_start = 0xfdd20000, + .virt_start = 0xfdd20000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* I2C fdd40000-fdd40fff */ + { + .phys_start = 0xfdd40000, + .virt_start = 0xfdd40000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + + /* UART fdd50000-fdd50ff */ + { + .phys_start = 0xfdd50000, + .virt_start = 0xfdd50000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + + /* GPIO fdd60000-fdd600ff */ + { + .phys_start = 0xfdd60000, + .virt_start = 0xfdd60000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* PWM0 */ + { + .phys_start = 0xfdd70000, + .virt_start = 0xfdd70000, + .size = 0x10, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* PWM1 */ + { + .phys_start = 0xfdd70010, + .virt_start = 0xfdd70010, + .size = 0x10, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* PWM2 */ + { + .phys_start = 0xfdd70020, + .virt_start = 0xfdd70020, + .size = 0x10, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + + /* PWM3 fdd70030-fdd7003f : fdd70030.pwm pwm@fdd70030 */ + { + .phys_start = 0xfdd70030, + .virt_start = 0xfdd70030, + .size = 0x10, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* PMU */ + { + .phys_start = 0xfdd90000, + .virt_start = 0xfdd90000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + + /* PVTM fde00000-fde000ff */ + { + .phys_start = 0xfde00000, + .virt_start = 0xfde00000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* NPU */ + { + .phys_start = 0xfde40000, + .virt_start = 0xfde40000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* GPU fde60000-fde63fff */ + { + .phys_start = 0xfde60000, + .virt_start = 0xfde60000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* PVTM fde80000-fde800ff*/ + { + .phys_start = 0xfde80000, + .virt_start = 0xfde80000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* PVTM fde90000-fde900ff */ + { + .phys_start = 0xfde90000, + .virt_start = 0xfde90000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* IOMMU fdea0800-fdea083f */ + { + .phys_start = 0xfdea0800, + .virt_start = 0xfdea0800, + .size = 0x40, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* RK_RGA fdeb0000-fdeb0fff */ + { + .phys_start = 0xfdeb0000, + .virt_start = 0xfdeb0000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* jpegd_mmu */ + { + .phys_start = 0xfded0480, + .virt_start = 0xfded0480, + .size = 0x40, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* vepu _mmu*/ + { + .phys_start = 0xfdee0800, + .virt_start = 0xfdee0800, + .size = 0x40, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* iep_mmu fdef0800-fdef08ff */ + { + .phys_start = 0xfdef0800, + .virt_start = 0xfdef0800, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* IOMMU fdf40f00-fdf40f3f */ + { + .phys_start = 0xfdf40f00, + .virt_start = 0xfdf40f00, + .size = 0x40, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* IOMMU fdf40f40-fdf40f7f */ + { + .phys_start = 0xfdf40f40, + .virt_start = 0xfdf40f40, + .size = 0x40, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* IOMMU fdf80800-fdf8083f */ + { + .phys_start = 0xfdf80800, + .virt_start = 0xfdf80800, + .size = 0x40, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* IOMMU fdf80840-fdf8087f */ + { + .phys_start = 0xfdf80840, + .virt_start = 0xfdf80840, + .size = 0x40, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* IOMMU fdff1a00-fdff1aff */ + { + .phys_start = 0xfdff1a00, + .virt_start = 0xfdff1a00, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* DWMMC fe000000-fe003fff */ + { + .phys_start = 0xfe000000, + .virt_start = 0xfe000000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* ETHERNET fe010000-fe01ffff */ + { + .phys_start = 0xfe010000, + .virt_start = 0xfe010000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* VOP fe040000-fe042fff */ + { + .phys_start = 0xfe040000, + .virt_start = 0xfe040000, + .size = 0x3000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* IOMMU fe043e00-fe043eff */ + { + .phys_start = 0xfe043e00, + .virt_start = 0xfe043e00, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + + }, + /* IOMMU fe043f00-fe043fff */ + { + .phys_start = 0xfe043f00, + .virt_start = 0xfe043f00, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* VOP */ + { + .phys_start = 0xfe044000, + .virt_start = 0xfe044000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* IOMMU fe043e00-fe043eff */ + { + .phys_start = 0xfe043e00, + .virt_start = 0xfe043e00, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* IOMMU fe043f00-fe043fff */ + { + .phys_start = 0xfe043f00, + .virt_start = 0xfe043f00, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* VOP fe044000-fe044fff*/ + { + .phys_start = 0xfe044000, + .virt_start = 0xfe044000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* HDMI fe0a0000-fe0bffff */ + { + .phys_start = 0xfe0a0000, + .virt_start = 0xfe0a0000, + .size = 0x20000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* ETHERNET fe2a0000-fe2affff */ + { + .phys_start = 0xfe2a0000, + .virt_start = 0xfe2a0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* DWMMC fe2b0000-fe2b3fff */ + { + .phys_start = 0xfe2b0000, + .virt_start = 0xfe2b0000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* SDHCI fe310000-fe31ffff */ + { + .phys_start = 0xfe310000, + .virt_start = 0xfe310000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* DMAC fe530000-fe533fff*/ + { + .phys_start = 0xfe530000, + .virt_start = 0xfe530000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* DMAC fe550000-fe553fff */ + { + .phys_start = 0xfe550000, + .virt_start = 0xfe550000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* I2C fe5b0000-fe5b0fff */ + { + .phys_start = 0xfe5b0000, + .virt_start = 0xfe5b0000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* I2C fe5c0000-fe5c0fff */ + { + .phys_start = 0xfe5c0000, + .virt_start = 0xfe5c0000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* RK TIMER fe5f0000*/ + { + .phys_start = 0xfe5f0000, + .virt_start = 0xfe5f0000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* WATCHDOG fe600000-fe6000ff */ + { + .phys_start = 0xfe600000, + .virt_start = 0xfe600000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* SPI fe630000-fe630fff */ + { + .phys_start = 0xfe630000, + .virt_start = 0xfe630000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* SERIAL fe660000-fe66001f */ + { + .phys_start = 0xfe660000, + .virt_start = 0xfe660000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_8 | JAILHOUSE_MEM_IO_16 + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* SERIAL fe670000-fe67001f */ + { + .phys_start = 0xfe670000, + .virt_start = 0xfe670000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_8 | JAILHOUSE_MEM_IO_16 + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* SERIAL fe680000-fe68001f + { + .phys_start = 0xfe680000, + .virt_start = 0xfe680000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_8 | JAILHOUSE_MEM_IO_16 + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + },*/ + /* SERIAL fe690000-fe69001f */ + { + .phys_start = 0xfe690000, + .virt_start = 0xfe690000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_8 | JAILHOUSE_MEM_IO_16 + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* SERIAL fe6c0000-fe6c001f */ + { + .phys_start = 0xfe6c0000, + .virt_start = 0xfe6c0000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_8 | JAILHOUSE_MEM_IO_16 + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* PWM fe6e0010-fe6e001f */ + { + .phys_start = 0xfe6e0010, + .virt_start = 0xfe6e0010, + .size = 0x10, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* PWM fe700020-fe70002f */ + { + .phys_start = 0xfe700020, + .virt_start = 0xfe700020, + .size = 0x10, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* TSADC fe710000-fe7100ff */ + { + .phys_start = 0xfe710000, + .virt_start = 0xfe710000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* SARADC fe720000-fe7200ff */ + { + .phys_start = 0xfe720000, + .virt_start = 0xfe720000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* GPIO fe740000-fe7400ff */ + { + .phys_start = 0xfe740000, + .virt_start = 0xfe740000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* GPIO fe750000-fe7500ff */ + { + .phys_start = 0xfe750000, + .virt_start = 0xfe750000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* GPIO fe760000-fe7600ff */ + { + .phys_start = 0xfe760000, + .virt_start = 0xfe760000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* GPIO fe770000-fe7700ff */ + { + .phys_start = 0xfe770000, + .virt_start = 0xfe770000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + /* USB2-PHY fe8a0000-fe8affff */ + { + .phys_start = 0xfe8a0000, + .virt_start = 0xfe8a0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* USB2-PHY fe8b0000-fe8bffff */ + { + .phys_start = 0xfe8b0000, + .virt_start = 0xfe8b0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + /* PHY fe8c0000-fe8dffff */ + { + .phys_start = 0xfe8c0000, + .virt_start = 0xfe8c0000, + .size = 0x20000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + { + .phys_start = 0xfdc20000, + .virt_start = 0xfdc20000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + { + .phys_start = 0xfe230000, + .virt_start = 0xfe230000, + .size = 0x400, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe388000, + .virt_start = 0xfe388000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + { + .phys_start = 0xfe102000, + .virt_start = 0xfe102000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfd90c000, + .virt_start = 0xfd90c000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + { + .phys_start = 0xfdc50000, + .virt_start = 0xfdc50000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + { + .phys_start = 0xfdc60000, + .virt_start = 0xfdc60000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + { + .phys_start = 0xfdc70000, + .virt_start = 0xfdc70000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + { + .phys_start = 0xfdc80000, + .virt_start = 0xfdc80000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + { + .phys_start = 0xfdc90000, + .virt_start = 0xfdc90000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + { + .phys_start = 0x110000, + .virt_start = 0x110000, + .size = 0xf0000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO + }, + { + .phys_start = 0xfe102100, + .virt_start = 0xfe102100, + .size = 0x300, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe38c000, + .virt_start = 0xfe38c000, + .size = 0x4000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe190000, + .virt_start = 0xfe190000, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe190080, + .virt_start = 0xfe190080, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe190100, + .virt_start = 0xfe190100, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe190200, + .virt_start = 0xfe190200, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe190280, + .virt_start = 0xfe190280, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe190300, + .virt_start = 0xfe190300, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe190380, + .virt_start = 0xfe190380, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe190400, + .virt_start = 0xfe190400, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe198000, + .virt_start = 0xfe198000, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe1a8000, + .virt_start = 0xfe1a8000, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe1a8080, + .virt_start = 0xfe1a8080, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfe1a8100, + .virt_start = 0xfe1a8100, + .size = 0x20, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfcc00000, + .virt_start = 0xfcc00000, + .size = 0x400000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + }, + { + .phys_start = 0xfd000000, + .virt_start = 0xfd000000, + .size = 0x400000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64 + } + }, + + .irqchips = { + /* GIC */ { + .address = 0xfd400000, + .pin_base = 32, + .pin_bitmap = { + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + }, + }, + { + .address = 0xfd400000, + .pin_base = 160, + .pin_bitmap = { + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + }, + }, + }, +}; + + diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/jailhouse/files/cells/arm64/ok3568-rtt-demo.c b/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/jailhouse/files/cells/arm64/ok3568-rtt-demo.c new file mode 100644 index 0000000000000000000000000000000000000000..bc7b07fff350087777ec65a424cb029b406d69c9 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/jailhouse/files/cells/arm64/ok3568-rtt-demo.c @@ -0,0 +1,116 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Configuration for demo inmate on OK3568 arm64 target, 2G RAM, 4 cores + * + * Copyright (c) NCTI, 2023 + * + * Authors: + * Hu Yongqiang + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include +#include + +struct { + struct jailhouse_cell_desc cell; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[8]; + struct jailhouse_irqchip irqchips[1]; +} __attribute__((packed)) config = { + .cell = { + .signature = JAILHOUSE_CELL_DESC_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .architecture = JAILHOUSE_ARM64, + .name = "rk3568-rtt", + .flags = JAILHOUSE_CELL_PASSIVE_COMMREG, + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .cpu_reset_address = 0x7a000000, + + .console = { + .address = 0xfe660000, + .type = JAILHOUSE_CON_TYPE_8250, + .flags = JAILHOUSE_CON_ACCESS_MMIO | + JAILHOUSE_CON_REGDIST_4, + }, + }, + + .cpus = { + 0b1100, + }, + + .mem_regions = { + { + .phys_start = 0x0, + .virt_start = 0x0, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* UART */ { + .phys_start = 0xfe680000, + .virt_start = 0xfe680000, + .size = 0x100, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE + | JAILHOUSE_MEM_IO_8 | JAILHOUSE_MEM_IO_16 + | JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_IO_UNALIGNED + }, + { + .phys_start = 0xfd400000, + .virt_start = 0xfd400000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED + }, + { + .phys_start = 0xfd460000, + .virt_start = 0xfd460000, + .size = 0xc0000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED + }, + { + .phys_start = 0xfdc60000, + .virt_start = 0xfdc60000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO + }, + { + .phys_start = 0xfdd20000, + .virt_start = 0xfdd20000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED + }, + /* RAM */ { + .phys_start = 0x60000000, + .virt_start = 0x60000000, + .size = 0x20000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE + }, + + }, + + .irqchips = { + /* GIC */ { + .address = 0xfd400000, + .pin_base = 32, + .pin_bitmap = { + 0, + 0, + 0, + 0 + //(1 << (152 - 128)) + }, + }, + }, +}; + diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/jailhouse/jailhouse.bbappend b/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/jailhouse/jailhouse.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..3d24af3c308fd9ca0d49574b75f4194793b81167 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/jailhouse/jailhouse.bbappend @@ -0,0 +1,8 @@ +COMPATIBLE_MACHINE = "qemu-aarch64|qemu-arm|raspberrypi4-64|ok3568" + +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +SRC_URI = " \ + file://cells/ \ + " +JH_CELLS:ok3568 = "ok3568" diff --git a/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/mcs-linux/mcs-linux.bbappend b/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/mcs-linux/mcs-linux.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..07ac8fa6b77e3db6695b38dd7c27ef1f50630990 --- /dev/null +++ b/bsp/meta-openeuler-bsp/rockchip/recipes-mcs/mcs-linux/mcs-linux.bbappend @@ -0,0 +1,11 @@ +# adapted for ok3568 +EXTRA_OECMAKE = " \ + -DDEMO_TARGET=openamp_demo \ + " +do_install:append(){ + install -d ${D}/firmware + + install -D ${S}/openamp_demo/rtthread-ok3568.bin ${D}/firmware/ +} + +FILES:${PN} += "/firmware" \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/sunxi/recipes-core/images/openeuler-image.bbappend b/bsp/meta-openeuler-bsp/sunxi/recipes-core/images/openeuler-image.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..c1d2556a52de9c74e18e0039230f6af0137d030f --- /dev/null +++ b/bsp/meta-openeuler-bsp/sunxi/recipes-core/images/openeuler-image.bbappend @@ -0,0 +1,5 @@ +# remove some unverified package +IMAGE_INSTALL:remove = " \ +packagegroup-isulad \ +packagegroup-dsoftbus \ +" \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/files/config/ok-a40i/defconfig b/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/files/config/ok-a40i/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..6833cf0e46390f586fd7e32ff3f05ae14af86884 --- /dev/null +++ b/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/files/config/ok-a40i/defconfig @@ -0,0 +1,291 @@ +CONFIG_AW_BSP=y +CONFIG_AW_IC_BOARD=y +CONFIG_AW_SOC_NAME="sun8iw11" +CONFIG_AW_TIMER=y +CONFIG_AW_DMA=y +CONFIG_AW_WATCHDOG=y +CONFIG_AW_I2C=y +CONFIG_AW_SPI=y +CONFIG_AW_PWM=y +CONFIG_AW_IR_RX=y +CONFIG_AW_RTP=y +CONFIG_USB_EHCI_HCD_SUNXI=y +CONFIG_USB_OHCI_HCD_SUNXI=y +CONFIG_USB_SUNXI_HCD=y +CONFIG_USB_SUNXI_HCI=y +CONFIG_USB_SUNXI_EHCI0=y +CONFIG_USB_SUNXI_EHCI1=y +CONFIG_USB_SUNXI_EHCI2=y +CONFIG_USB_SUNXI_OHCI0=y +CONFIG_USB_SUNXI_OHCI1=y +CONFIG_USB_SUNXI_OHCI2=y +CONFIG_USB_SUNXI_USB=y +CONFIG_USB_SUNXI_USB_MANAGER=y +CONFIG_USB_SUNXI_USB_DEBUG=y +CONFIG_USB_SUNXI_USB_ADB=y +CONFIG_USB_SUNXI_UDC0=y +CONFIG_AW_EMAC=y +CONFIG_AW_MBUS_SUN8IW11=y +CONFIG_AW_WAKEUPGEN=y +CONFIG_AW_SUN8I_NMI=y +CONFIG_AW_THERMAL=y +CONFIG_AW_MFD_AXP2101_I2C=y +CONFIG_AW_REGULATOR_AXP2101=y +CONFIG_AW_AXP22X_POWER=y +CONFIG_AW_CPUFREQ_DT=y +CONFIG_AW_INPUT_SENSORINIT=y +CONFIG_AW_INPUT_CTP=y +# CONFIG_TOUCHSCREEN_GSLX680NEW is not set +CONFIG_TOUCHSCREEN_GT9XXNEW_TS=y +CONFIG_KEYBOARD_SUNXI=y +CONFIG_AW_MMC=y +CONFIG_AW_HDMI_DISP2=y +CONFIG_TV_AW_DISP2=y +CONFIG_AW_DISP2_DEBUG=y +CONFIG_AW_DI=y +CONFIG_SUNXI_DI_V2X=y +CONFIG_CSI_VFE=y +CONFIG_AW_VIDEO_SUNXI_TVD=y +CONFIG_SND_SOC_SUNXI_AAUDIO=y +CONFIG_SND_SOC_SUNXI_SPDIF=y +# CONFIG_SND_SOC_SUNXI_SPDIF_RXIEC61937 is not set +CONFIG_SND_SOC_SUNXI_DAUDIO=y +CONFIG_SND_SOC_SUNXI_PCM_HDMI=y +CONFIG_AW_SYS_INFO=y +CONFIG_AW_SMC=y +CONFIG_AW_SID=y +CONFIG_RTL8723DU=m +CONFIG_AIC_WLAN_SUPPORT=y +CONFIG_BT_HCIBTUSB_RTLBTUSB=m +CONFIG_AW_RFKILL=y +CONFIG_AW_MACADDR_MGT=y +CONFIG_AW_CRASHDUMP=y +CONFIG_AW_AHCI=y +CONFIG_AW_MTD=y +CONFIG_AW_MTD_BLOCK=y +CONFIG_AW_MTD_RAWNAND=y +CONFIG_AW_GPU_TYPE="mali400" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_CGROUPS=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +# CONFIG_SYSFS_SYSCALL is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_PROFILING=y +# CONFIG_MACH_SUN4I is not set +# CONFIG_MACH_SUN5I is not set +# CONFIG_MACH_SUN6I is not set +# CONFIG_MACH_SUN7I is not set +# CONFIG_MACH_SUN9I is not set +# CONFIG_VDSO is not set +CONFIG_SMP=y +CONFIG_HAVE_ARM_ARCH_TIMER=y +CONFIG_ARM_PSCI=y +CONFIG_OABI_COMPAT=y +CONFIG_HIGHMEM=y +# CONFIG_ARM_MODULE_PLTS is not set +# CONFIG_ATAGS is not set +CONFIG_CMDLINE="earlyprintk=sunxi-uart,0x01c28000 loglevel=8 initcall_debug=1 console=ttyS0 init=/init" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +CONFIG_JUMP_LABEL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_COMPRESS=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_COMPACTION is not set +CONFIG_CMA=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_PACKET_DIAG=y +CONFIG_UNIX=y +CONFIG_UNIX_DIAG=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_FIB_TRIE_STATS=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_NETFILTER=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_ZONES=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_TIMESTAMP=y +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_NAT=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +CONFIG_CFG80211_DEVELOPER_WARNINGS=y +CONFIG_CFG80211_CERTIFICATION_ONUS=y +# CONFIG_CFG80211_REQUIRE_SIGNED_REGDB is not set +CONFIG_CFG80211_DEBUGFS=y +# CONFIG_CFG80211_CRDA_SUPPORT is not set +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_MAC80211_MESH=y +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_GPIO=y +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +# CONFIG_SUNXI_RSB is not set +CONFIG_BLK_DEV_SD=y +# CONFIG_NET_VENDOR_ALLWINNER is not set +CONFIG_MDIO_SUN4I=y +CONFIG_USB_USBNET=y +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_EDT_FT5X06=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_DEVMEM is not set +CONFIG_SPI_MEM=y +CONFIG_SPI_SPIDEV=y +# CONFIG_PINCTRL_SUN4I_A10 is not set +# CONFIG_PINCTRL_SUN8I_A23 is not set +# CONFIG_PINCTRL_SUN8I_A33 is not set +# CONFIG_PINCTRL_SUN8I_A83T is not set +# CONFIG_PINCTRL_SUN8I_A83T_R is not set +# CONFIG_PINCTRL_SUN8I_A23_R is not set +# CONFIG_PINCTRL_SUN8I_H3 is not set +# CONFIG_PINCTRL_SUN8I_H3_R is not set +# CONFIG_PINCTRL_SUN8I_V3S is not set +CONFIG_GPIO_SYSFS=y +CONFIG_THERMAL_STATISTICS=y +# CONFIG_THERMAL_HWMON is not set +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_BANG_BANG=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_CPU_THERMAL=y +CONFIG_THERMAL_EMULATION=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=y +CONFIG_FB=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_SOC=y +CONFIG_UHID=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE_REALTEK=y +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_ISD200=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +CONFIG_USB_STORAGE_ALAUDA=y +CONFIG_USB_STORAGE_ONETOUCH=y +CONFIG_USB_STORAGE_KARMA=y +CONFIG_USB_STORAGE_CYPRESS_ATACB=y +CONFIG_USB_STORAGE_ENE_UB6250=y +CONFIG_USB_UAS=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_OPTION=y +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_MMC_HSQ=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_RX8010=y +# CONFIG_RTC_DRV_SUN6I is not set +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_DMABUF_HEAPS_DEFERRED_FREE=y +CONFIG_DMABUF_HEAPS_PAGE_POOL=y +CONFIG_STAGING=y +# CONFIG_CLK_SUNXI is not set +# CONFIG_SUNXI_CCU is not set +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_PM_DEVFREQ=y +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_EXTCON=y +CONFIG_EXT4_FS=y +# CONFIG_DNOTIFY is not set +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_UBIFS_FS=y +CONFIG_SQUASHFS=y +CONFIG_NFS_FS=y +CONFIG_NFSD=y +CONFIG_CIFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_CRYPTO_RSA=y +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_PKCS7_MESSAGE_PARSER=y +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_CRC_T10DIF=y +CONFIG_XZ_DEC=y +CONFIG_DMA_CMA=y +CONFIG_PRINTK_TIME=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DEBUG_INFO=y +CONFIG_FRAME_WARN=2048 +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_VM=y +# CONFIG_SCHED_DEBUG is not set +CONFIG_DEBUG_MUTEXES=y +CONFIG_STACKTRACE=y +# CONFIG_FTRACE is not set +CONFIG_DEBUG_LL=y +CONFIG_ATOMIC64_SELFTEST=y diff --git a/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/linux-openeuler-rt.bbappend b/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/linux-openeuler-rt.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..025de15b69a72eac9f07d1a1f038db6289d19e4b --- /dev/null +++ b/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/linux-openeuler-rt.bbappend @@ -0,0 +1,5 @@ +require linux-sunxi.inc + +OPENEULER_REPO_NAMES += "src-kernel-5.10-tag928" +# add COMPATIBLE_MACHINE +COMPATIBLE_MACHINE = "ok-a40i" diff --git a/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/linux-openeuler.bbappend b/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/linux-openeuler.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..2288f1bb0942531b2c41622dbabef84ecebdea5e --- /dev/null +++ b/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/linux-openeuler.bbappend @@ -0,0 +1,4 @@ +require linux-sunxi.inc + +# add COMPATIBLE_MACHINE +COMPATIBLE_MACHINE = "ok-a40i" diff --git a/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/linux-sunxi.inc b/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/linux-sunxi.inc new file mode 100644 index 0000000000000000000000000000000000000000..45551da37793388332d0c2dfd465451c24cdc042 --- /dev/null +++ b/bsp/meta-openeuler-bsp/sunxi/recipes-kernel/linux/linux-sunxi.inc @@ -0,0 +1,140 @@ +# add recipes-kernel path to find patch and defconfig +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +SRC_URI:remove = " \ + file://kernel-5.10 \ + file://patches/${ARCH}/0001-arm64-add-zImage-support-for-arm64.patch \ +" + +## basic information +OPENEULER_REPO_NAME = "allwinner-kernel" +# download src-openeuler/kernel repo for patches +OPENEULER_REPO_NAMES = "allwinner-kernel" + +SRC_URI:prepend = " \ + file://allwinner-kernel \ +" + +S = "${WORKDIR}/allwinner-kernel" + +INHIBIT_PACKAGE_STRIP = "1" + +DEPENDS += " dos2unix-native " + +OPENEULER_KERNEL_CONFIG = "file://config/${MACHINE}/defconfig" + +# set env in do_kernel_configme +do_kernel_configme:prepend(){ + export BSP_TOP="${STAGING_KERNEL_DIR}/bsp/" +} + +python do_kernel_configcheck() { + import re, string, sys, subprocess + + s = d.getVar('S') + + # if KMETA isn't set globally by a recipe using this routine, use kgit to + # locate or create the meta directory. Otherwise, kconf_check is not + # passed a valid meta-series for processing + kmeta = d.getVar("KMETA") + if not kmeta or not os.path.exists('{}/{}'.format(s,kmeta)): + kmeta = subprocess.check_output(['kgit', '--meta'], cwd=d.getVar('S')).decode('utf-8').rstrip() + + env = os.environ.copy() + env['PATH'] = "%s:%s%s" % (d.getVar('PATH'), s, "/scripts/util/") + env['LD'] = d.getVar('KERNEL_LD') + env['CC'] = d.getVar('KERNEL_CC') + env['ARCH'] = d.getVar('ARCH') + env['srctree'] = s + + #------define some missing Flags environ------# + missing_env = ["KERNEL_SRC", "LOADADDR", "LICHEE_BSP_DIR", "BSP_TOP", "LICHEE_OUT_DIR", "LICHEE_IC", "LICHEE_KERN_DIR", "LICHEE_PLATFORM", "LICHEE_MOD_DIR"] + for missing_env_parameter in missing_env: + env[missing_env_parameter] = d.getVar(missing_env_parameter) + env['VERSION'] = '5' + env['PATCHLEVEL'] = '10' + #--------------------end----------------------# + + try: + configs = subprocess.check_output(['scc', '--configs', '-o', s + '/.kernel-meta'], env=env).decode('utf-8') + except subprocess.CalledProcessError as e: + bb.fatal( "Cannot gather config fragments for audit: %s" % e.output.decode("utf-8") ) + + config_check_visibility = int(d.getVar("KCONF_AUDIT_LEVEL") or 0) + bsp_check_visibility = int(d.getVar("KCONF_BSP_AUDIT_LEVEL") or 0) + kmeta_audit_werror = d.getVar("KMETA_AUDIT_WERROR") or "" + warnings_detected = False + + # if config check visibility is "1", that's the lowest level of audit. So + # we add the --classify option to the run, since classification will + # streamline the output to only report options that could be boot issues, + # or are otherwise required for proper operation. + extra_params = "" + if config_check_visibility == 1: + extra_params = "--classify" + + # category #1: mismatches + try: + analysis = subprocess.check_output(['symbol_why.py', '--dotconfig', '{}'.format( d.getVar('B') + '/.config' ), '--mismatches', extra_params], cwd=s, env=env ).decode('utf-8') + except subprocess.CalledProcessError as e: + bb.fatal( "config analysis failed when running '%s': %s" % (" ".join(e.cmd), e.output.decode('utf-8'))) + + if analysis: + outfile = "{}/{}/cfg/mismatch.txt".format( s, kmeta ) + if os.path.isfile(outfile): + os.remove(outfile) + with open(outfile, 'w+') as f: + f.write( analysis ) + + if config_check_visibility and os.stat(outfile).st_size > 0: + with open (outfile, "r") as myfile: + results = myfile.read() + bb.warn( "[kernel config]: specified values did not make it into the kernel's final configuration:\n\n%s" % results) + warnings_detected = True + + # category #2: invalid fragment elements + extra_params = "" + if bsp_check_visibility > 1: + extra_params = "--strict" + try: + analysis = subprocess.check_output(['symbol_why.py', '--dotconfig', '{}'.format( d.getVar('B') + '/.config' ), '--invalid', extra_params], cwd=s, env=env ).decode('utf-8') + except subprocess.CalledProcessError as e: + bb.fatal( "config analysis failed when running '%s': %s" % (" ".join(e.cmd), e.output.decode('utf-8'))) + + if analysis: + outfile = "{}/{}/cfg/invalid.txt".format(s,kmeta) + if os.path.isfile(outfile): + os.remove(outfile) + with open(outfile, 'w+') as f: + f.write( analysis ) + + if bsp_check_visibility and os.stat(outfile).st_size > 0: + with open (outfile, "r") as myfile: + results = myfile.read() + bb.warn( "[kernel config]: This BSP contains fragments with warnings:\n\n%s" % results) + warnings_detected = True + + # category #3: redefined options (this is pretty verbose and is debug only) + try: + analysis = subprocess.check_output(['symbol_why.py', '--dotconfig', '{}'.format( d.getVar('B') + '/.config' ), '--sanity'], cwd=s, env=env ).decode('utf-8') + except subprocess.CalledProcessError as e: + bb.fatal( "config analysis failed when running '%s': %s" % (" ".join(e.cmd), e.output.decode('utf-8'))) + + if analysis: + outfile = "{}/{}/cfg/redefinition.txt".format(s,kmeta) + if os.path.isfile(outfile): + os.remove(outfile) + with open(outfile, 'w+') as f: + f.write( analysis ) + + # if the audit level is greater than two, we report if a fragment has overriden + # a value from a base fragment. This is really only used for new kernel introduction + if bsp_check_visibility > 2 and os.stat(outfile).st_size > 0: + with open (outfile, "r") as myfile: + results = myfile.read() + bb.warn( "[kernel config]: This BSP has configuration options defined in more than one config, with differing values:\n\n%s" % results) + warnings_detected = True + + if warnings_detected and kmeta_audit_werror: + bb.fatal( "configuration warnings detected, werror is set, promoting to fatal" ) +} diff --git a/bsp/meta-openeuler-bsp/ti/recipes-bsp/ti-dm-fw/ti-dm-fw.bbappend b/bsp/meta-openeuler-bsp/ti/recipes-bsp/ti-dm-fw/ti-dm-fw.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..6f7b452de6b27ac7d64887d65148626af86edeb5 --- /dev/null +++ b/bsp/meta-openeuler-bsp/ti/recipes-bsp/ti-dm-fw/ti-dm-fw.bbappend @@ -0,0 +1,3 @@ +OPENEULER_REPO_NAME = "ti-linux-firmware" +SRC_URI = "file://ti-linux-firmware" +S = "${WORKDIR}/ti-linux-firmware" diff --git a/bsp/meta-openeuler-bsp/ti/recipes-bsp/ti-sci-fw/ti-sci-fw_%.bbappend b/bsp/meta-openeuler-bsp/ti/recipes-bsp/ti-sci-fw/ti-sci-fw_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..1b97de3b4f3cc7d19d100cd63ad8f17534becb1f --- /dev/null +++ b/bsp/meta-openeuler-bsp/ti/recipes-bsp/ti-sci-fw/ti-sci-fw_%.bbappend @@ -0,0 +1,8 @@ +OPENEULER_REPO_NAME = "ti-linux-firmware" +SRC_URI = "file://ti-linux-firmware" +S = "${WORKDIR}/ti-linux-firmware" + +PR:append = ".psdk1" + +SYSFW_PREFIX:myd-am62x = "fs" +SYSFW_PREFIX:myd-am62-k3r5 = "fs" diff --git a/bsp/meta-openeuler-bsp/ti/recipes-bsp/u-boot/u-boot-ti-staging_%.bbappend b/bsp/meta-openeuler-bsp/ti/recipes-bsp/u-boot/u-boot-ti-staging_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..6abfc1b33f63359f1af94940e826d56e3d4b98eb --- /dev/null +++ b/bsp/meta-openeuler-bsp/ti/recipes-bsp/u-boot/u-boot-ti-staging_%.bbappend @@ -0,0 +1,9 @@ +OPENEULER_REPO_NAME = "myir-ti-uboot" + +SRCPV = "" + +SRC_URI = "file://myir-ti-uboot" + +S = "${WORKDIR}/myir-ti-uboot" + +CREATE_SRCIPK:k3 = "0" diff --git a/bsp/meta-openeuler-bsp/ti/recipes-core/packagegroups/packagegroup-core-boot.bbappend b/bsp/meta-openeuler-bsp/ti/recipes-core/packagegroups/packagegroup-core-boot.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..da834835a7451785d7a74fa8eedeaa7f6ef63614 --- /dev/null +++ b/bsp/meta-openeuler-bsp/ti/recipes-core/packagegroups/packagegroup-core-boot.bbappend @@ -0,0 +1,10 @@ +# kernel need below files to boot +RDEPENDS:${PN} += " \ + kernel-custom-dtb \ + kernel-image-fitimage \ + kernel-image-image \ +" + +RDEPENDS:${PN}:remove= " \ + kernel-img \ +" diff --git a/bsp/meta-openeuler-bsp/ti/recipes-kernel/linux/files/defconfig b/bsp/meta-openeuler-bsp/ti/recipes-kernel/linux/files/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..24b53cf7aecb5881bfd14d04a5f23f28ab451322 --- /dev/null +++ b/bsp/meta-openeuler-bsp/ti/recipes-kernel/linux/files/defconfig @@ -0,0 +1,2 @@ +use-kernel-config=multi_v7_defconfig +config-fragment=kernel/configs/ti_multi_v7_prune.config diff --git a/bsp/meta-openeuler-bsp/ti/recipes-kernel/linux/linux-ti-staging_6.1.bbappend b/bsp/meta-openeuler-bsp/ti/recipes-kernel/linux/linux-ti-staging_6.1.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..d57500b88e5307ed9a8059b43e232a9f7bbc56ec --- /dev/null +++ b/bsp/meta-openeuler-bsp/ti/recipes-kernel/linux/linux-ti-staging_6.1.bbappend @@ -0,0 +1,29 @@ +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +PV = "6.1.46" + +OPENEULER_REPO_NAME = "myir-ti-linux" + +# ti-layer have overwrite do_configure to deal with defconfig in meta-ti-bsp/recipes-kernel/linux/setup-defconfig.inc + +SRC_URI = " \ + file://myir-ti-linux \ + file://defconfig \ +" + +S = "${WORKDIR}/myir-ti-linux" + +KERNEL_LOCALVERSION = "" + +RDEPENDS:${KERNEL_PACKAGE_NAME}-image = "" + +CREATE_SRCIPK:k3 = "0" + +FILES:kernel-custom-dtb = "/boot/dtb/myir/*" +PACKAGES += "kernel-custom-dtb" + +do_install:append (){ + # move all dtb files to /boot/dtb/myir because of uboot variable + install -d ${D}/boot/dtb/myir + cp ${D}/boot/*.dtb ${D}/boot/*.dtbo ${D}/boot/dtb/myir +} diff --git a/bsp/meta-openeuler-bsp/ti/recipes-ti/secdev/ti-k3-secdev_%.bbappend b/bsp/meta-openeuler-bsp/ti/recipes-ti/secdev/ti-k3-secdev_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..c50b3576a3b84f445972f7e4f9a5c0fd8b212c25 --- /dev/null +++ b/bsp/meta-openeuler-bsp/ti/recipes-ti/secdev/ti-k3-secdev_%.bbappend @@ -0,0 +1,3 @@ +OPENEULER_REPO_NAME = "core-secdev-k3" +SRC_URI = "file://core-secdev-k3" +S = "${WORKDIR}/core-secdev-k3" diff --git a/bsp/meta-openeuler-bsp/wic/sdimage-opi.wks b/bsp/meta-openeuler-bsp/wic/sdimage-opi.wks new file mode 100644 index 0000000000000000000000000000000000000000..251b69f1405be65b1d01600c7702f6df92fd1b53 --- /dev/null +++ b/bsp/meta-openeuler-bsp/wic/sdimage-opi.wks @@ -0,0 +1,22 @@ +# Disk layout +# reference: https://opensource.rock-chips.com/wiki_Partitions +# Note that the reference documentation refers to 512 byte disk sectors, +# but wic uses 1KB blocks +# +# Partition Start Sector Number of Sectors +# loader1 64 8000 +# reserved1 8064 128 +# reserved2 8192 8192 +# loader2 16384 8192 +# atf 24576 8192 +# boot 32768 229376 +# root 262144 - (suggested) + +part loader1 --offset 32 --fixed-size 4000K --no-table --source rawcopy --sourceparams="file=idblock.img" +part loader2 --offset 8192 --fixed-size 4096K --no-table --source rawcopy --sourceparams="file=uboot.img" +part atf --offset 12288 --fixed-size 4096K --no-table --source rawcopy --sourceparams="file=trust.img" +part /boot --offset 16384 --source bootimg-partition --fstype=vfat --label boot --sourceparams="loader=u-boot" --ondisk mmcblk1 --active +part / --source rootfs --fstype ext4 --part-name rootfs --ondisk mmcblk1 + +bootloader --ptable gpt --configfile="${DEPLOY_DIR_IMAGE}/extlinux.conf" + diff --git a/bsp/meta-openeuler-bsp/wic/sdimage-rpi.wks b/bsp/meta-openeuler-bsp/wic/sdimage-rpi.wks new file mode 100644 index 0000000000000000000000000000000000000000..283d94e9d2a2562529d365f03514126132943105 --- /dev/null +++ b/bsp/meta-openeuler-bsp/wic/sdimage-rpi.wks @@ -0,0 +1,6 @@ +# short-description: Create Raspberry Pi SD card image +# long-description: Creates a partitioned SD card image for use with +# Raspberry Pi. Boot files are located in the first vfat partition. + +part /boot --source bootimg-partition --ondisk mmcblk0 --fstype=vfat --label boot --active --align 4096 --size 20 +part / --source rootfs --ondisk mmcblk0 --fstype=ext4 --label root --align 4096 --mkfs-extraopts='-E no_copy_xattrs' diff --git a/bsp/meta-openeuler-bsp/wic/sdimage-vfive2.wks b/bsp/meta-openeuler-bsp/wic/sdimage-vfive2.wks new file mode 100644 index 0000000000000000000000000000000000000000..ed44ac1295a6dbcb53d5b73e4d7b51cf8734b567 --- /dev/null +++ b/bsp/meta-openeuler-bsp/wic/sdimage-vfive2.wks @@ -0,0 +1,13 @@ +# Create VisionFive2 SD card image + +# the u-boot will read vf2_uEnv.txt from mmc 1:3 +# just reserve the first two partitions +part --ondisk mmcblk1 --align 4096 --label empty1 --size 1 +part --ondisk mmcblk1 --align 4096 --label empty2 --size 1 +# this partition contains kernel, dtb, vf2_uEnv.txt and extlinux.conf +part /boot --source bootimg-partition --ondisk mmcblk1 --label boot --fstype=vfat --sourceparams="loader=u-boot" --active --align 4096 +# this part is purely the rootfs partition +part / --source rootfs --ondisk mmcblk1 --fstype=ext4 --label root --align 4096 + +# the default extlinux file is predefined +bootloader --ptable gpt --configfile="${DEPLOY_DIR_IMAGE}/visionfive-v2-extlinux.conf" \ No newline at end of file diff --git a/bsp/meta-phytium/README.md b/bsp/meta-phytium/README.md new file mode 100644 index 0000000000000000000000000000000000000000..4f1c8ca176c0c8dbb24e205c762f4060c322a46f --- /dev/null +++ b/bsp/meta-phytium/README.md @@ -0,0 +1,18 @@ +# meta-phytium + +## 介绍 + +该 meta 层为 openEuler Embedded 提供飞腾平台 BSP 支持,目前支持的处理器如下 +- FT2000-4 +- D2000 +- E2000 + - phytiumpi + +## 目录结构 + +* **conf** : machine 描述文件与该 layer 描述文件 +* **recipes-core** : 描述镜像成品的格式,目前已支持如下格式: + - wic (分区镜像) + +* **recipes-kernel** : 为 linux-openeuler 内核附加飞腾平台相关 patch +* **wic** : 存放描述 wic 镜像分区布局的 wks 模板文件 (wks.in) diff --git a/bsp/meta-phytium/classes/image_types_genimage.bbclass b/bsp/meta-phytium/classes/image_types_genimage.bbclass new file mode 100644 index 0000000000000000000000000000000000000000..9f2fa51cf1f0f41e09129672b1ca2a02f5a30bd5 --- /dev/null +++ b/bsp/meta-phytium/classes/image_types_genimage.bbclass @@ -0,0 +1,54 @@ +# this bbclass like image_types_wic.bbclass +# it's used to automatic pack the image which can put spl at "0" offset + +GENIMAGE_CONFIG_FILE ??= "${MACHINE}.config" +GENIMAGE_CONFIG_FILE_NAME = "${@d.getVar('GENIMAGE_CONFIG_FILE').split('.')[0]}" +GENIMAGE_SEARCH_PATH ?= "${THISDIR}:${@':'.join('%s/genimage' % p for p in '${BBPATH}'.split(':'))}" +GENIMAGE_CONFIG_FILE_PATH = "${@genimage_search(d.getVar('GENIMAGE_CONFIG_FILE'), d.getVar('GENIMAGE_SEARCH_PATH')) or ''}" + +def genimage_search(file, search_path): + if os.path.isabs(file): + if os.path.exists(file): + return file + else: + paths = search_path.split(':') + for path in paths: + searched = bb.utils.which(path, file) + if searched: + return searched + return '' + +GENIMAGE_BUILD_PATH = "${WORKDIR}/build-genimage" + +IMAGE_CMD:genimage () { + out="${IMGDEPLOYDIR}/${IMAGE_NAME}" + tmp_genimage="${WORKDIR}/tmp-genimage" + + if [ -e "$tmp_genimage" ]; then + # Ensure we don't have any junk leftover from a previously interrupted + # do_image_genimage execution + rm -rf $tmp_genimage + fi + + tmp_genimage_config=${GENIMAGE_BUILD_PATH}/tmp_genimage.config + cp -f ${GENIMAGE_CONFIG_FILE_PATH} $tmp_genimage_config + + # replace @GENIMAGE_OUTPUT_NAME@ in genimage config + tmp_genimage_output_name=${IMAGE_NAME}.genimage + sed -i "s:@GENIMAGE_OUTPUT_NAME@:$tmp_genimage_output_name:g" $tmp_genimage_config + + genimage \ + --loglevel 2 \ + --config $tmp_genimage_config \ + --tmppath $tmp_genimage \ + --inputpath ${DEPLOY_DIR_IMAGE} \ + --includepath ${WORKDIR} \ + --outputpath ${GENIMAGE_BUILD_PATH} \ + --rootpath ${WORKDIR}/rootfs + + mv ${GENIMAGE_BUILD_PATH}/$tmp_genimage_output_name $out${IMAGE_NAME_SUFFIX}.genimage +} + +do_image_genimage[cleandirs] = "${GENIMAGE_BUILD_PATH}" + +do_image_genimage[depends] += "${@' '.join('%s-native:do_populate_sysroot' % r for r in ('genimage', 'genext2fs', 'e2fsprogs'))}" diff --git a/bsp/meta-phytium/conf/layer.conf b/bsp/meta-phytium/conf/layer.conf new file mode 100644 index 0000000000000000000000000000000000000000..2a72127fc0243bd1520b2003a3fb16cbca899634 --- /dev/null +++ b/bsp/meta-phytium/conf/layer.conf @@ -0,0 +1,17 @@ +# This bsp have a conf add classes directory, add to BBPATH +BBPATH =. "${LAYERDIR}:" + +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "phytium" +BBFILE_PATTERN_phytium = "^${LAYERDIR}/" +BBFILE_PRIORITY_phytium = "6" + +LAYERDEPENDS_phytium = "core" +LAYERSERIES_COMPAT_phytium = "kirkstone" + +LICENSE_PATH += "${LAYERDIR}/custom-licenses" + +# genimage requires +HOSTTOOLS:append = " tune2fs e2fsck" diff --git a/bsp/meta-phytium/conf/machine/d2000.conf b/bsp/meta-phytium/conf/machine/d2000.conf new file mode 100644 index 0000000000000000000000000000000000000000..a52b7daa2ced652bab532c85d678886148d3f02c --- /dev/null +++ b/bsp/meta-phytium/conf/machine/d2000.conf @@ -0,0 +1,7 @@ +require conf/machine/include/tengrui.inc + +MACHINEOVERRIDES =. "d2000:march64le:" +MACHINE_FEATURES =. "efi pci serial usbhost ext2 ext3 ext4" + +IMAGE_FSTYPES = "wic" +WKS_FILE = "efi-image-phytium.wks" diff --git a/bsp/meta-phytium/conf/machine/ft2000-4.conf b/bsp/meta-phytium/conf/machine/ft2000-4.conf new file mode 100644 index 0000000000000000000000000000000000000000..e075c68ad951737edb5c6723d95f2640b472d131 --- /dev/null +++ b/bsp/meta-phytium/conf/machine/ft2000-4.conf @@ -0,0 +1,7 @@ +require conf/machine/include/tengrui.inc + +MACHINEOVERRIDES =. "ft2000-4:march64le:" +MACHINE_FEATURES =. "efi pci serial usbhost ext2 ext3 ext4" + +IMAGE_FSTYPES = "wic" +WKS_FILE = "efi-image-phytium.wks" diff --git a/bsp/meta-phytium/conf/machine/include/e2000.inc b/bsp/meta-phytium/conf/machine/include/e2000.inc new file mode 100644 index 0000000000000000000000000000000000000000..46e4de5fb9297f7e9031f626b3ba902e99900de1 --- /dev/null +++ b/bsp/meta-phytium/conf/machine/include/e2000.inc @@ -0,0 +1,17 @@ +require conf/machine/include/arm/arch-armv8a.inc +require conf/multilib.conf +# currently, don't support 32 bit libs +MULTILIBS = "" + +DEFAULTTUNE = "aarch64" + +ROOTFS_PACKAGE_ARCH = "aarch64" + +KERNEL_IMAGETYPE = "Image" + +# serial console setting +SERIAL_CONSOLES = "115200;ttyAMA0" + +# arm and arm64 both support -mlittle-endian so no +# need to consider compat32. +TUNE_CCARGS .= " -mlittle-endian" diff --git a/bsp/meta-phytium/conf/machine/include/tengrui.inc b/bsp/meta-phytium/conf/machine/include/tengrui.inc new file mode 100644 index 0000000000000000000000000000000000000000..46e4de5fb9297f7e9031f626b3ba902e99900de1 --- /dev/null +++ b/bsp/meta-phytium/conf/machine/include/tengrui.inc @@ -0,0 +1,17 @@ +require conf/machine/include/arm/arch-armv8a.inc +require conf/multilib.conf +# currently, don't support 32 bit libs +MULTILIBS = "" + +DEFAULTTUNE = "aarch64" + +ROOTFS_PACKAGE_ARCH = "aarch64" + +KERNEL_IMAGETYPE = "Image" + +# serial console setting +SERIAL_CONSOLES = "115200;ttyAMA0" + +# arm and arm64 both support -mlittle-endian so no +# need to consider compat32. +TUNE_CCARGS .= " -mlittle-endian" diff --git a/bsp/meta-phytium/conf/machine/phytiumpi.conf b/bsp/meta-phytium/conf/machine/phytiumpi.conf new file mode 100644 index 0000000000000000000000000000000000000000..ea64c661328ca52224000bd2fef21097030158eb --- /dev/null +++ b/bsp/meta-phytium/conf/machine/phytiumpi.conf @@ -0,0 +1,19 @@ +require conf/machine/include/e2000.inc + +MACHINEOVERRIDES =. "phytiumpi:march64le:" +MACHINE_FEATURES =. "pci serial usbhost ext2 ext3 ext4" + +# serial console setting +SERIAL_CONSOLES = "115200;ttyAMA1" + +# The default fitimage requires the Image.gz file. +KERNEL_IMAGETYPE = "Image.gz" +KERNEL_DEVICETREE = "phytium/phytiumpi_firefly.dtb" + +# this FSTYPE is required for sdcard image generated by genimage +IMAGE_FSTYPES = "tar.gz ext4 genimage" + +IMGCLASSES:append = " image_types_genimage" +# phytiumpi.config needs phyuboot to provide bootloader: fip-all.bin +EXTRA_IMAGEDEPENDS += "phyuboot" +GENIMAGE_CONFIG_FILE = "sdcard-phytiumpi.config" diff --git a/bsp/meta-phytium/custom-licenses/PPL-1.0 b/bsp/meta-phytium/custom-licenses/PPL-1.0 new file mode 100644 index 0000000000000000000000000000000000000000..30bd97be52ed4087906faa129dcaac47fe493d1f --- /dev/null +++ b/bsp/meta-phytium/custom-licenses/PPL-1.0 @@ -0,0 +1,28 @@ + + Phytium Public License 1.0 (PPL-1.0) + +UNLESS IT HAS ITS OWN COPYRIGHT/LICENSE EMBEDDED IN ITS BODY, EACH FILE IS SUBJECT TO THE FOLLOWING LICENSE TERMS + +Copyright (C) 2022, Phytium Technology Co., Ltd. +All Rights Reserved. + +Redistribution and use in source and binary forms, with or without modification, are permitted provided that +the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this list of conditions and the +following disclaimer. + +2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and +the following disclaimer in the documentation and/or other materials provided with the distribution. + +3. If the name of phytium or the names of its contributors are needed to endorse or promote products +derived from this software ,Prior written permission should be required. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED +WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A +PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +POSSIBILITY OF SUCH DAMAGE. \ No newline at end of file diff --git a/bsp/meta-phytium/genimage/sdcard-phytiumpi.config b/bsp/meta-phytium/genimage/sdcard-phytiumpi.config new file mode 100644 index 0000000000000000000000000000000000000000..193dc5a00d2dd47d077a385bb45b1e4178fad611 --- /dev/null +++ b/bsp/meta-phytium/genimage/sdcard-phytiumpi.config @@ -0,0 +1,29 @@ +image root.ext4 { + ext4 {} + size = 1G + mountpoint = "/" +} + +image @GENIMAGE_OUTPUT_NAME@ { + hdimage { + } + + partition uboot { + in-partition-table = no + offset = 0 + image = "fip-all.bin" + size = 4M + } + partition bootload { + in-partition-table = no + offset = 4M + image = "fitImage" + size = 60M + } + partition root { + partition-type = 0x83 + image = root.ext4 + size = 1G + } + +} diff --git a/bsp/meta-phytium/recipes-bsp/phyuboot/phyuboot.bb b/bsp/meta-phytium/recipes-bsp/phyuboot/phyuboot.bb new file mode 100644 index 0000000000000000000000000000000000000000..6e674dc6a7fcd7532cc3b39422068a0d3845b92a --- /dev/null +++ b/bsp/meta-phytium/recipes-bsp/phyuboot/phyuboot.bb @@ -0,0 +1,42 @@ +SUMMARY = "phytium uboot" +DESCRIPTION = "phytium uboot" +LICENSE = "PPL-1.0" +LIC_FILES_CHKSUM = "file://PPL-1.0;md5=9dd6301488f42abb6e3196ef96b8daa9" + +inherit deploy + +OPENEULER_LOCAL_NAME = "oee_archive" + +SRC_URI = " \ + file://${OPENEULER_LOCAL_NAME}/${BPN}/${BPN}.tar.gz \ +" + +S = "${WORKDIR}/phyuboot" + +do_configure[noexec] = "1" +do_compile[noexec] = "1" + +OPTEE_ENABLED = "1" + +# option size is "2GB" and "4GB" +RAMSIZE = "4GB" + +do_install () { + install -d ${D} + + if [ "${OPTEE_ENABLED}" = "1" ]; then + cp -r ${S}/fip-all-optee-${RAMSIZE}.bin ${D}/fip-all.bin + else + cp -r ${S}/fip-all-${RAMSIZE}.bin ${D}/fip-all.bin + fi +} + +do_deploy () { + install -d ${DEPLOYDIR}/ + cp -r ${D}/* ${DEPLOYDIR}/ +} +addtask deploy after do_install + +PACKAGES += "${PN}-image" +FILES:${PN}-image += "/" +PACKAGE_ARCH = "${MACHINE_ARCH}" diff --git a/bsp/meta-phytium/recipes-core/images/d2000.inc b/bsp/meta-phytium/recipes-core/images/d2000.inc new file mode 100644 index 0000000000000000000000000000000000000000..d0d477aa2459306b99acee1deff7dc3678d1fcef --- /dev/null +++ b/bsp/meta-phytium/recipes-core/images/d2000.inc @@ -0,0 +1 @@ +require phytium.inc diff --git a/bsp/meta-phytium/recipes-core/images/ft2000-4.inc b/bsp/meta-phytium/recipes-core/images/ft2000-4.inc new file mode 100644 index 0000000000000000000000000000000000000000..d0d477aa2459306b99acee1deff7dc3678d1fcef --- /dev/null +++ b/bsp/meta-phytium/recipes-core/images/ft2000-4.inc @@ -0,0 +1 @@ +require phytium.inc diff --git a/bsp/meta-phytium/recipes-core/images/openeuler-image-tiny.bbappend b/bsp/meta-phytium/recipes-core/images/openeuler-image-tiny.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..d4ad638496100b18d1cea2485954d8617612e7b7 --- /dev/null +++ b/bsp/meta-phytium/recipes-core/images/openeuler-image-tiny.bbappend @@ -0,0 +1,6 @@ +#fix no efi in openeuler-image-tiny wic image +EFI_PROVIDER ??= "grub-efi" + +RDEPENDS:${PN}:append = " \ + ${@bb.utils.contains("MACHINE_FEATURES", "efi", "${EFI_PROVIDER}", "", d)} \ +" diff --git a/bsp/meta-phytium/recipes-core/images/phytium.inc b/bsp/meta-phytium/recipes-core/images/phytium.inc new file mode 100644 index 0000000000000000000000000000000000000000..3850cbd63fdfcbf57bed58a5552c805878df453b --- /dev/null +++ b/bsp/meta-phytium/recipes-core/images/phytium.inc @@ -0,0 +1,2 @@ +# nothing to do now, use default copy_openeuler_distro in file below +# meta-openeuler/recipes-core/images/openeuler-image-common.inc diff --git a/bsp/meta-phytium/recipes-core/images/phytiumpi.inc b/bsp/meta-phytium/recipes-core/images/phytiumpi.inc new file mode 100644 index 0000000000000000000000000000000000000000..d0d477aa2459306b99acee1deff7dc3678d1fcef --- /dev/null +++ b/bsp/meta-phytium/recipes-core/images/phytiumpi.inc @@ -0,0 +1 @@ +require phytium.inc diff --git a/bsp/meta-phytium/recipes-devtool/confuse/confuse_3.2.2.bb b/bsp/meta-phytium/recipes-devtool/confuse/confuse_3.2.2.bb new file mode 100644 index 0000000000000000000000000000000000000000..e9ca144fd867dfbc89598488aace7d56cb5fb126 --- /dev/null +++ b/bsp/meta-phytium/recipes-devtool/confuse/confuse_3.2.2.bb @@ -0,0 +1,19 @@ +DESCRIPTION = "Library for parsing configuration files" +HOMEPAGE = "http://www.nongnu.org/confuse/" +LICENSE = "ISC" +SECTION = "libs" + +LIC_FILES_CHKSUM = "file://LICENSE;md5=42fa47330d4051cd219f7d99d023de3a" + +OPENEULER_LOCAL_NAME = "oee_archive" + +SRC_URI = "file://${OPENEULER_LOCAL_NAME}/${BPN}/${BP}.tar.gz" +SRC_URI[sha256sum] = "71316b55592f8d0c98924242c98dbfa6252153a8b6e7d89e57fe6923934d77d0" + +SRC_URI += "file://0001-only-apply-search-path-logic-to-relative-pathnames.patch" + +EXTRA_OECONF = "--enable-shared" + +inherit autotools gettext binconfig pkgconfig lib_package + +BBCLASSEXTEND = "native nativesdk" diff --git a/bsp/meta-phytium/recipes-devtool/confuse/files/0001-only-apply-search-path-logic-to-relative-pathnames.patch b/bsp/meta-phytium/recipes-devtool/confuse/files/0001-only-apply-search-path-logic-to-relative-pathnames.patch new file mode 100644 index 0000000000000000000000000000000000000000..98badc2ecc96bec160ab27698e4276b44dba607d --- /dev/null +++ b/bsp/meta-phytium/recipes-devtool/confuse/files/0001-only-apply-search-path-logic-to-relative-pathnames.patch @@ -0,0 +1,47 @@ +From b684f4cc25821b6e86a58576f864e4b12dfdfecc Mon Sep 17 00:00:00 2001 +From: Rasmus Villemoes +Date: Sat, 5 Jun 2021 22:57:51 +0200 +Subject: [PATCH] only apply search path logic to relative pathnames + +Adding any directory to the search path via cfg_add_searchpath breaks +lookup of absolute paths. So change the logic in cfg_searchpath() to +ignore the search path when the given filename is absolute, and merely +check that for existence. + +This is technically an ABI change, but the current behaviour is quite +unusual and unexpected. + +Signed-off-by: Rasmus Villemoes +Upstream-status: Accepted (https://github.com/libconfuse/libconfuse/pull/155) +--- + src/confuse.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/src/confuse.c b/src/confuse.c +index 2ea0254..19b56e3 100644 +--- a/src/confuse.c ++++ b/src/confuse.c +@@ -1746,12 +1746,20 @@ DLLIMPORT char *cfg_searchpath(cfg_searchpath_t *p, const char *file) + return NULL; + } + ++ if (file[0] == '/') { ++ fullpath = strdup(file); ++ if (!fullpath) ++ return NULL; ++ goto check; ++ } ++ + if ((fullpath = cfg_searchpath(p->next, file)) != NULL) + return fullpath; + + if ((fullpath = cfg_make_fullpath(p->dir, file)) == NULL) + return NULL; + ++check: + #ifdef HAVE_SYS_STAT_H + err = stat((const char *)fullpath, &st); + if ((!err) && S_ISREG(st.st_mode)) +-- +2.31.1 + diff --git a/bsp/meta-phytium/recipes-devtool/genext2fs/genext2fs.inc b/bsp/meta-phytium/recipes-devtool/genext2fs/genext2fs.inc new file mode 100644 index 0000000000000000000000000000000000000000..d7402b6ea90bd61023a1fe005b60e237733ed5e3 --- /dev/null +++ b/bsp/meta-phytium/recipes-devtool/genext2fs/genext2fs.inc @@ -0,0 +1,16 @@ +SUMMARY = "Ext2 filesystem generation tool" +DESCRIPTION = "A tool to generate an ext2 filesystem \ +as a normal (non-root) user." +HOMEPAGE = "http://genext2fs.sourceforge.net/" +SECTION = "console/utils" + +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://COPYING;md5=94d55d512a9ba36caa9b7df079bae19f \ + file://genext2fs.c;beginline=9;endline=17;md5=23ea077d1f7fbfd3a6fa573b415fa001" + +SRC_URI = "file://v${PV}.tar.gz" +S = "${WORKDIR}/genext2fs-${PV}" + +inherit autotools + +BBCLASSEXTEND = "native nativesdk" diff --git a/bsp/meta-phytium/recipes-devtool/genext2fs/genext2fs_1.5.0.bb b/bsp/meta-phytium/recipes-devtool/genext2fs/genext2fs_1.5.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..887f323c614d3b6b92874d04cdd2144584d7feaf --- /dev/null +++ b/bsp/meta-phytium/recipes-devtool/genext2fs/genext2fs_1.5.0.bb @@ -0,0 +1,4 @@ +require genext2fs.inc + +SRC_URI[md5sum] = "b7b6361bcce2cedff1ae437fadafe53b" +SRC_URI[sha256sum] = "404dbbfa7a86a6c3de8225c8da254d026b17fd288e05cec4df2cc7e1f4feecfc" diff --git a/bsp/meta-phytium/recipes-devtool/genimage/genimage.inc b/bsp/meta-phytium/recipes-devtool/genimage/genimage.inc new file mode 100644 index 0000000000000000000000000000000000000000..fbfecebc5f4a4c4d428592bcc0c1ac88da371096 --- /dev/null +++ b/bsp/meta-phytium/recipes-devtool/genimage/genimage.inc @@ -0,0 +1,19 @@ +SUMMARY = "Image generation tool" +HOMEPAGE = "https://github.com/pengutronix/genimage" + +SECTION = "base" +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://genimage.c;beginline=1;endline=15;md5=bd66ae8b32d8a336e09c1d4a9924a49f" + +DEPENDS = "confuse dosfstools" + +OPENEULER_LOCAL_NAME = "oee_archive" + +SRC_URI = "file://${OPENEULER_LOCAL_NAME}/${BPN}/${BP}.tar.xz" +SRC_URI += "file://0001-image-hd-remove-MBR-space.patch" + +EXTRA_OECONF = "--enable-largefile" + +inherit pkgconfig autotools gettext + +BBCLASSEXTEND = "native nativesdk" diff --git a/bsp/meta-phytium/recipes-devtool/genimage/genimage/0001-image-hd-remove-MBR-space.patch b/bsp/meta-phytium/recipes-devtool/genimage/genimage/0001-image-hd-remove-MBR-space.patch new file mode 100644 index 0000000000000000000000000000000000000000..4405b19f998c5d87d9096b9b777a7224566a528a --- /dev/null +++ b/bsp/meta-phytium/recipes-devtool/genimage/genimage/0001-image-hd-remove-MBR-space.patch @@ -0,0 +1,33 @@ +From 0facda308510839f33c34b3416080d9e72e51440 Mon Sep 17 00:00:00 2001 +From: Chunrong Guo +Date: Wed, 14 Jun 2023 13:55:16 +0800 +Subject: [PATCH] image-hd: remove MBR space + +Signed-off-by: Chunrong Guo +--- + image-hd.c | 9 --------- + 1 file changed, 9 deletions(-) + +diff --git a/image-hd.c b/image-hd.c +index 5e3a3b4..09affcd 100644 +--- a/image-hd.c ++++ b/image-hd.c +@@ -859,15 +859,6 @@ static int hdimage_setup(struct image *image, cfg_t *cfg) + part->name); + return -EINVAL; + } +- if (!part->extended) { +- int ret = check_overlap(image, part); +- if (ret) +- return ret; +- } else if (now > part->offset) { +- image_error(image, "part %s overlaps with previous partition\n", +- part->name); +- return -EINVAL; +- } + if (part->in_partition_table && (part->size % 512)) { + image_error(image, "part %s size (%lld) must be a " + "multiple of 1 sector (512 bytes)\n", +-- +2.25.1 + diff --git a/bsp/meta-phytium/recipes-devtool/genimage/genimage_15.bb b/bsp/meta-phytium/recipes-devtool/genimage/genimage_15.bb new file mode 100644 index 0000000000000000000000000000000000000000..5f4adace867ad03c945bb3533ce607ebe1b4780c --- /dev/null +++ b/bsp/meta-phytium/recipes-devtool/genimage/genimage_15.bb @@ -0,0 +1,3 @@ +require genimage.inc + +SRC_URI[sha256sum] = "9bca24bf883310b30ee4511cbc3a580e40ad4540826e5ed3992c595ce72d003e" diff --git a/bsp/meta-phytium/recipes-kernel/linux/files/config/d2000/d2000_defconfig b/bsp/meta-phytium/recipes-kernel/linux/files/config/d2000/d2000_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..80a3c9ab94fbf80d011f96abf02a029771239a48 --- /dev/null +++ b/bsp/meta-phytium/recipes-kernel/linux/files/config/d2000/d2000_defconfig @@ -0,0 +1,7754 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.10.0 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="aarch64-openeuler-linux-gnu-gcc (crosstool-NG 1.25.0) 12.3.1" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=120301 +CONFIG_LD_VERSION=240000000 +CONFIG_CLANG_VERSION=0 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y +CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="-openeuler" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_BUILD_SALT="" +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_ZSTD=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +# CONFIG_KERNEL_ZSTD is not set +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +# CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE is not set +# end of Timers subsystem + +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +# CONFIG_SCHED_CORE is not set + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y +CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_MEMFS_INFO is not set +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CGROUP_V1_WRITEBACK is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +# CONFIG_RT_GROUP_SCHED is not set +# CONFIG_QOS_SCHED_DYNAMIC_AFFINITY is not set +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +# CONFIG_CGROUP_DEBUG is not set +# CONFIG_CGROUP_FILES is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_SCHED_AUTOGROUP=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y +CONFIG_BPF_JIT_DEFAULT_ON=y +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y +CONFIG_PROFILING=y +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_HAS_CPU_RELAX=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXC is not set +CONFIG_ARCH_PHYTIUM=y +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_S32 is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +CONFIG_HAVE_LIVEPATCH_WO_FTRACE=y + +# +# Enable Livepatch +# +# CONFIG_LIVEPATCH is not set +# end of Enable Livepatch + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +CONFIG_CAVIUM_ERRATUM_22375=y +CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y +# CONFIG_HISILICON_ERRATUM_1980005 is not set +CONFIG_HISILICON_ERRATUM_162100801=y +CONFIG_HISILICON_ERRATUM_162100125=y +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +CONFIG_HISILICON_ERRATUM_HIP08_RU_PREFETCH=y +# CONFIG_HISILICON_HIP08_RU_PREFETCH_DEFAULT_OFF is not set +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SCHED_MC=y +# CONFIG_SCHED_CLUSTER is not set +CONFIG_SCHED_SMT=y +CONFIG_NR_CPUS=256 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM64_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_MPAM is not set +# CONFIG_NUMA is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_LLC_128_LINE_SIZE=y +CONFIG_ARCH_HAS_FILTER_PGPROT=y +CONFIG_ARCH_HAS_MC_EXTABLE=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y +CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_SPINLOCKS is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set +CONFIG_CRASH_DUMP=y +# CONFIG_ARM64_CPU_PARK is not set +CONFIG_XEN_DOM0=y +CONFIG_XEN=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_ARM64_PMEM_LEGACY is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +# CONFIG_AARCH32_EL0 is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_AS_HAS_LSE_ATOMICS=y +CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_USE_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_CNP=y +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +CONFIG_ARM64_AMU_EXTN=y +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +CONFIG_ARM64_BTI=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +CONFIG_ARCH_RANDOM=y +CONFIG_ARM64_AS_HAS_MTE=y +CONFIG_ARM64_MTE=y +# end of ARMv8.5 architectural features + +# +# ARMv8.6 architectural features +# +CONFIG_ARM64_TWED=y +# end of ARMv8.6 architectural features + +# +# ARMv8.7 architectural features +# +CONFIG_ARM64_EPAN=y +# end of ARMv8.7 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +# CONFIG_ASCEND_FEATURES is not set +# end of Kernel Features + +# +# Boot options +# +# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set +CONFIG_CMDLINE="" +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y +# end of Boot options + +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ENERGY_MODEL=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y +# end of ARM CPU Idle Drivers + +CONFIG_HALTPOLL_CPUIDLE=y +# end of CPU Idle + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_ACPI_CPPC_CPUFREQ=m +CONFIG_ARM_SCPI_CPUFREQ=y +CONFIG_ARM_SCMI_CPUFREQ=y +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +# CONFIG_ISCSI_IBFT is not set +# CONFIG_FW_CFG_SYSFS is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_VARS_PSTORE=y +# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set +# CONFIG_EFI_FAKE_MEMMAP is not set +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ZBOOT=y +# CONFIG_EFI_ZBOOT_SIGNED is not set +CONFIG_EFI_ARMSTUB_DTB_LOADER=y +# CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER is not set +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +CONFIG_EFI_CAPSULE_LOADER=y +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_UEFI_CPER=y +CONFIG_UEFI_CPER_ARM=y +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +CONFIG_ARM_SMCCC_SOC_ID=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_GENERIC_GSI=y +CONFIG_ACPI_CCA_REQUIRED=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_TAD is not set +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_MCFG=y +CONFIG_ACPI_CPPC_LIB=y +CONFIG_ACPI_PROCESSOR=y +# CONFIG_ACPI_IPMI is not set +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_THERMAL=y +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_HED=y +# CONFIG_ACPI_CUSTOM_METHOD is not set +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y +CONFIG_HAVE_ACPI_APEI=y +CONFIG_ACPI_APEI=y +CONFIG_ACPI_APEI_GHES=y +# CONFIG_ACPI_APEI_GHES_TS_CORE is not set +# CONFIG_ACPI_APEI_GHES_NOTIFY_ALL_RAS_ERR is not set +CONFIG_ACPI_APEI_SEA=y +CONFIG_ACPI_APEI_MEMORY_FAILURE=y +CONFIG_ACPI_APEI_EINJ=y +# CONFIG_ACPI_APEI_ERST_DEBUG is not set +# CONFIG_ACPI_CONFIGFS is not set +CONFIG_ACPI_IORT=y +CONFIG_ACPI_GTDT=y +CONFIG_ACPI_PPTT=y +# CONFIG_PMIC_OPREGION is not set +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_VIRTUALIZATION=y +# CONFIG_KVM is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA512_ARM64=m +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64_CE=m +CONFIG_CRYPTO_SHA3_ARM64=m +CONFIG_CRYPTO_SM3_ARM64_CE=m +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set +# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m +CONFIG_CRYPTO_CHACHA20_NEON=m +# CONFIG_CRYPTO_POLY1305_NEON is not set +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set +CONFIG_CRYPTO_AES_ARM64_BS=m + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_QUICK_KEXEC is not set +CONFIG_ARCH_WANT_RESERVE_CRASH_KERNEL=y +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_SHADOW_CALL_STACK=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +CONFIG_BLK_CMDLINE_PARSER=y +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set +# CONFIG_BLK_DEV_DUMPINFO is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_CMDLINE_PARTITION=y +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_ASN1=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_SPIN_TRYLOCK=y +CONFIG_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_INLINE_SPIN_LOCK=y +CONFIG_INLINE_SPIN_LOCK_BH=y +CONFIG_INLINE_SPIN_LOCK_IRQ=y +CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_INLINE_SPIN_UNLOCK_BH=y +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_READ_LOCK=y +CONFIG_INLINE_READ_LOCK_BH=y +CONFIG_INLINE_READ_LOCK_IRQ=y +CONFIG_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_BH=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_WRITE_LOCK=y +CONFIG_INLINE_WRITE_LOCK_BH=y +CONFIG_INLINE_WRITE_LOCK_IRQ=y +CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_BH=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +# CONFIG_HUGE_VMALLOC_DEFAULT_ENABLED is not set +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +# CONFIG_HWPOISON_INJECT is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_MEMCG_QOS=y +# CONFIG_ETMEM is not set +# CONFIG_PAGE_CACHE_LIMIT is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=19 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_FRAME_VECTOR=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# CONFIG_PIN_MEMORY is not set +# CONFIG_CLEAR_FREELIST_PAGE is not set +# CONFIG_EXTEND_HUGEPAGE_MAPPING is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_NETLABEL is not set +# CONFIG_MPTCP is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +# CONFIG_BRIDGE_NETFILTER is not set + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +# CONFIG_NF_CONNTRACK_PROCFS is not set +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_MASQUERADE=y +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +CONFIG_NETFILTER_XT_TARGET_LOG=m +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +CONFIG_IP6_NF_MANGLE=m +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +# CONFIG_IP6_NF_TARGET_NPT is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +# CONFIG_BRIDGE_MRP is not set +CONFIG_HAVE_NET_DSA=y +CONFIG_NET_DSA=m +# CONFIG_NET_DSA_TAG_AR9331 is not set +# CONFIG_NET_DSA_TAG_BRCM is not set +# CONFIG_NET_DSA_TAG_BRCM_PREPEND is not set +# CONFIG_NET_DSA_TAG_GSWIP is not set +# CONFIG_NET_DSA_TAG_DSA is not set +# CONFIG_NET_DSA_TAG_EDSA is not set +# CONFIG_NET_DSA_TAG_MTK is not set +# CONFIG_NET_DSA_TAG_KSZ is not set +# CONFIG_NET_DSA_TAG_RTL4_A is not set +CONFIG_NET_DSA_TAG_OCELOT=m +# CONFIG_NET_DSA_TAG_QCA is not set +# CONFIG_NET_DSA_TAG_LAN9303 is not set +# CONFIG_NET_DSA_TAG_SJA1105 is not set +# CONFIG_NET_DSA_TAG_TRAILER is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFB is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +CONFIG_NET_SCH_CBS=m +CONFIG_NET_SCH_ETF=m +CONFIG_NET_SCH_TAPRIO=m +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_DRR is not set +CONFIG_NET_SCH_MQPRIO=m +# CONFIG_NET_SCH_SKBPRIO is not set +# CONFIG_NET_SCH_CHOKE is not set +# CONFIG_NET_SCH_QFQ is not set +# CONFIG_NET_SCH_CODEL is not set +# CONFIG_NET_SCH_FQ_CODEL is not set +# CONFIG_NET_SCH_CAKE is not set +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_HHF is not set +# CONFIG_NET_SCH_PIE is not set +CONFIG_NET_SCH_INGRESS=m +# CONFIG_NET_SCH_PLUG is not set +# CONFIG_NET_SCH_ETS is not set +# CONFIG_NET_SCH_DEFAULT is not set + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +# CONFIG_NET_CLS_CGROUP is not set +# CONFIG_NET_CLS_BPF is not set +CONFIG_NET_CLS_FLOWER=m +# CONFIG_NET_CLS_MATCHALL is not set +# CONFIG_NET_EMATCH is not set +CONFIG_NET_CLS_ACT=y +# CONFIG_NET_ACT_POLICE is not set +CONFIG_NET_ACT_GACT=m +# CONFIG_GACT_PROB is not set +CONFIG_NET_ACT_MIRRED=m +# CONFIG_NET_ACT_SAMPLE is not set +# CONFIG_NET_ACT_IPT is not set +# CONFIG_NET_ACT_NAT is not set +# CONFIG_NET_ACT_PEDIT is not set +# CONFIG_NET_ACT_SIMP is not set +# CONFIG_NET_ACT_SKBEDIT is not set +# CONFIG_NET_ACT_CSUM is not set +# CONFIG_NET_ACT_MPLS is not set +# CONFIG_NET_ACT_VLAN is not set +# CONFIG_NET_ACT_BPF is not set +# CONFIG_NET_ACT_SKBMOD is not set +# CONFIG_NET_ACT_IFE is not set +# CONFIG_NET_ACT_TUNNEL_KEY is not set +CONFIG_NET_ACT_GATE=m +# CONFIG_NET_TC_SKB_EXT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +CONFIG_NET_SWITCHDEV=y +# CONFIG_NET_L3_MASTER_DEV is not set +CONFIG_QRTR=m +CONFIG_QRTR_SMD=m +CONFIG_QRTR_TUN=m +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_JIT=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_CALC_BITTIMING=y +CONFIG_CAN_FLEXCAN=m +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +# end of CAN Device Drivers + +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +# CONFIG_BT_BNEP_MC_FILTER is not set +# CONFIG_BT_BNEP_PROTO_FILTER is not set +CONFIG_BT_HIDP=m +# CONFIG_BT_HS is not set +# CONFIG_BT_LE is not set +# CONFIG_BT_MSFTEXT is not set +# CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_FEATURE_DEBUG is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=m +CONFIG_BT_BCM=m +CONFIG_BT_RTL=m +CONFIG_BT_HCIBTUSB=m +# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set +CONFIG_BT_HCIBTUSB_BCM=y +# CONFIG_BT_HCIBTUSB_MTK is not set +CONFIG_BT_HCIBTUSB_RTL=y +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_SERDEV=y +# CONFIG_BT_HCIUART_H4 is not set +# CONFIG_BT_HCIUART_NOKIA is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIUART_3WIRE=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_BCM is not set +# CONFIG_BT_HCIUART_RTL is not set +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIUART_MRVL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_BT_MTKSDIO is not set +# CONFIG_BT_MTKUART is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_GPIO is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_XEN is not set +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +CONFIG_NFC=m +# CONFIG_NFC_DIGITAL is not set +CONFIG_NFC_NCI=m +# CONFIG_NFC_NCI_SPI is not set +# CONFIG_NFC_NCI_UART is not set +# CONFIG_NFC_HCI is not set + +# +# Near Field Communication (NFC) devices +# +# CONFIG_NFC_FDP is not set +# CONFIG_NFC_PN533_USB is not set +# CONFIG_NFC_PN533_I2C is not set +# CONFIG_NFC_PN532_UART is not set +# CONFIG_NFC_MRVL_USB is not set +# CONFIG_NFC_ST_NCI_I2C is not set +# CONFIG_NFC_ST_NCI_SPI is not set +# CONFIG_NFC_NXP_NCI is not set +CONFIG_NFC_S3FWRN5=m +CONFIG_NFC_S3FWRN5_I2C=m +# end of Near Field Communication (NFC) devices + +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +CONFIG_FAILOVER=y +CONFIG_ETHTOOL_NETLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI_PCIE=y +# CONFIG_PCIEAER is not set +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_PF_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +CONFIG_PCI_PASID=y +CONFIG_PCI_LABEL=y +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_XILINX is not set +CONFIG_PCI_XGENE=y +CONFIG_PCI_XGENE_MSI=y +CONFIG_PCIE_ALTERA=y +CONFIG_PCIE_ALTERA_MSI=y +CONFIG_PCI_HOST_THUNDER_PEM=y +CONFIG_PCI_HOST_THUNDER_ECAM=y +# CONFIG_PCIE_HISI_ERR is not set + +# +# DesignWare PCI Core Support +# +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCIE_DW_PLAT_EP is not set +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +CONFIG_PCIE_MOBIVEIL=y +CONFIG_PCIE_MOBIVEIL_HOST=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCIE_CADENCE_PLAT_EP is not set +# CONFIG_PCI_J721E_HOST is not set +# CONFIG_PCI_J721E_EP is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +CONFIG_PCI_ENDPOINT=y +CONFIG_PCI_ENDPOINT_CONFIGFS=y +CONFIG_PCI_EPF_TEST=m +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +# CONFIG_UEVENT_HELPER is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y +# CONFIG_FW_LOADER_COMPRESS is not set +CONFIG_FW_CACHE=y +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_SYS_HYPERVISOR=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SLIMBUS=m +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_SPMI=m +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_SOUNDWIRE=m +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +CONFIG_BRCMSTB_GISB_ARB=y +# CONFIG_MOXTET is not set +CONFIG_SIMPLE_PM_BUS=y +CONFIG_VEXPRESS_CONFIG=y +# CONFIG_MHI_BUS is not set +# end of Bus devices + +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_PHYSMAP_VERSATILE is not set +# CONFIG_MTD_PHYSMAP_GEMINI is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +# CONFIG_MTD_DATAFLASH_OTP is not set +# CONFIG_MTD_MCHP23K256 is not set +CONFIG_MTD_SST25L=y +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +CONFIG_MTD_NAND_CORE=y +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set +CONFIG_MTD_RAW_NAND=y +# CONFIG_MTD_NAND_ECC_SW_BCH is not set + +# +# Raw/parallel NAND flash controllers +# +CONFIG_MTD_NAND_DENALI=y +# CONFIG_MTD_NAND_DENALI_PCI is not set +CONFIG_MTD_NAND_DENALI_DT=y +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_MXIC is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_CADENCE is not set +# CONFIG_MTD_NAND_ARASAN is not set + +# +# Misc +# +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +CONFIG_MTD_NAND_ECC=y +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +CONFIG_SPI_PHYTIUM_QUADSPI=y +# CONFIG_MTD_UBI is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OF_RESOLVE=y +CONFIG_OF_OVERLAY=y +# CONFIG_PARPORT is not set +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_XEN_BLKDEV_FRONTEND=y +# CONFIG_XEN_BLKDEV_BACKEND is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=y +CONFIG_BLK_DEV_NVME=y +CONFIG_NVME_MULTIPATH=y +CONFIG_NVME_HWMON=y +CONFIG_NVME_FABRICS=y +CONFIG_NVME_FC=y +CONFIG_NVME_TCP=y +CONFIG_NVME_TARGET=y +CONFIG_NVME_TARGET_PASSTHRU=y +CONFIG_NVME_TARGET_LOOP=y +CONFIG_NVME_TARGET_FC=y +CONFIG_NVME_TARGET_FCLOOP=y +CONFIG_NVME_TARGET_TCP=y +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +CONFIG_PCI_ENDPOINT_TEST=m +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +CONFIG_UACCE=m +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +CONFIG_RAID_ATTRS=m +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=y +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_HISI_SAS is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +CONFIG_MEGARAID_SAS=y +# CONFIG_SCSI_3SNIC_SSSRAID is not set +CONFIG_SCSI_MPT3SAS=m +CONFIG_SCSI_MPT2SAS_MAX_SGE=128 +CONFIG_SCSI_MPT3SAS_MAX_SGE=128 +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +CONFIG_SCSI_UFSHCD=y +# CONFIG_SCSI_UFSHCD_PCI is not set +CONFIG_SCSI_UFSHCD_PLATFORM=y +# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +# CONFIG_SCSI_UFS_BSG is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_XEN_SCSI_FRONTEND is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=y +CONFIG_SATA_HOST=y +CONFIG_PATA_TIMINGS=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_FORCE=y +CONFIG_ATA_ACPI=y +# CONFIG_SATA_ZPODD is not set +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_CEVA=y +CONFIG_AHCI_XGENE=y +CONFIG_AHCI_QORIQ=y +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +CONFIG_SATA_SIL24=y +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_ZHAOXIN is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +CONFIG_PATA_PLATFORM=y +CONFIG_PATA_OF_PLATFORM=y +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_PATA_ACPI is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID10 is not set +# CONFIG_MD_RAID456 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_UNSTRIPED is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set +CONFIG_DM_MIRROR=m +# CONFIG_DM_LOG_USERSPACE is not set +# CONFIG_DM_RAID is not set +CONFIG_DM_ZERO=m +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_IFB is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +# CONFIG_IPVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=y +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# Distributed Switch Architecture drivers +# +# CONFIG_B53 is not set +# CONFIG_NET_DSA_BCM_SF2 is not set +# CONFIG_NET_DSA_LOOP is not set +# CONFIG_NET_DSA_LANTIQ_GSWIP is not set +# CONFIG_NET_DSA_MT7530 is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set +# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MSCC_SEVILLE is not set +# CONFIG_NET_DSA_AR9331 is not set +# CONFIG_NET_DSA_SJA1105 is not set +# CONFIG_NET_DSA_QCA8K is not set +# CONFIG_NET_DSA_REALTEK_SMI is not set +# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set +# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +CONFIG_MDIO=m +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +# CONFIG_NET_VENDOR_3SNIC is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_AGERE=y +# CONFIG_ET131X is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +# CONFIG_ENA_ETHERNET is not set +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set +CONFIG_AMD_XGBE=y +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_AQTION is not set +CONFIG_NET_VENDOR_ARC=y +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +CONFIG_ATL1C=m +# CONFIG_ALX is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +CONFIG_BCMGENET=m +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set +CONFIG_BNX2X=m +CONFIG_BNX2X_SRIOV=y +# CONFIG_SYSTEMPORT is not set +# CONFIG_BNXT is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +CONFIG_NET_VENDOR_CADENCE=y +CONFIG_MACB=y +CONFIG_MACB_USE_HWSTAMP=y +CONFIG_MACB_PCI=y +CONFIG_NET_VENDOR_CAVIUM=y +CONFIG_THUNDER_NIC_PF=y +# CONFIG_THUNDER_NIC_VF is not set +CONFIG_THUNDER_NIC_BGX=y +CONFIG_THUNDER_NIC_RGX=y +# CONFIG_CAVIUM_PTP is not set +# CONFIG_LIQUIDIO is not set +# CONFIG_LIQUIDIO_VF is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +CONFIG_E1000=m +CONFIG_E1000E=m +CONFIG_IGB=m +CONFIG_IGB_HWMON=y +CONFIG_IGBVF=m +CONFIG_IXGB=m +CONFIG_IXGBE=m +CONFIG_IXGBE_HWMON=y +CONFIG_IXGBEVF=m +CONFIG_I40E=m +CONFIG_IAVF=m +CONFIG_I40EVF=m +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_IGC is not set +CONFIG_NET_VENDOR_NETSWIFT=y +# CONFIG_NGBE is not set +# CONFIG_TXGBE is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +CONFIG_MVMDIO=y +# CONFIG_SKGE is not set +CONFIG_SKY2=y +# CONFIG_SKY2_DEBUG is not set +# CONFIG_OCTEONTX2_AF is not set +# CONFIG_OCTEONTX2_PF is not set +# CONFIG_PRESTERA is not set +CONFIG_NET_VENDOR_MELLANOX=y +CONFIG_MLX4_EN=m +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +CONFIG_MLX4_CORE_GEN2=y +CONFIG_MLX5_CORE=m +# CONFIG_MLX5_FPGA is not set +CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_EN_ARFS=y +CONFIG_MLX5_EN_RXNFC=y +CONFIG_MLX5_MPFS=y +CONFIG_MLX5_ESWITCH=y +CONFIG_MLX5_CLS_ACT=y +# CONFIG_MLX5_CORE_IPOIB is not set +CONFIG_MLX5_SW_STEERING=y +# CONFIG_MLXSW_CORE is not set +# CONFIG_MLXFW is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_LAN743X is not set +CONFIG_NET_VENDOR_MICROSEMI=y +# CONFIG_MSCC_OCELOT_SWITCH is not set +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NATSEMI=y +# CONFIG_NATSEMI is not set +# CONFIG_NS83820 is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_8390=y +# CONFIG_NE2K_PCI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_QED is not set +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCA7000_SPI is not set +# CONFIG_QCA7000_UART is not set +CONFIG_QCOM_EMAC=m +CONFIG_RMNET=m +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R8169 is not set +CONFIG_NET_VENDOR_RENESAS=y +CONFIG_NET_VENDOR_ROCKER=y +# CONFIG_ROCKER is not set +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set +CONFIG_NET_VENDOR_SEEQ=y +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +CONFIG_NET_VENDOR_SMSC=y +CONFIG_SMC91X=y +# CONFIG_EPIC100 is not set +CONFIG_SMSC911X=y +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_PHYTIUM=y +# CONFIG_DWMAC_INTEL_PLAT is not set +# CONFIG_DWMAC_LOONGSON is not set +# CONFIG_STMMAC_PCI is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TI_CPSW_PHY_SEL is not set +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +CONFIG_NET_VENDOR_XILINX=y +# CONFIG_XILINX_AXI_EMAC is not set +# CONFIG_XILINX_LL_TEMAC is not set +# CONFIG_NET_VENDOR_NEBULA_MATRIX is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_NET_SB1000 is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +CONFIG_AQUANTIA_PHY=y +# CONFIG_AX88796B_PHY is not set +CONFIG_BROADCOM_PHY=m +# CONFIG_BCM54140_PHY is not set +CONFIG_BCM7XXX_PHY=m +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +CONFIG_BCM_NET_PHYLIB=m +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +CONFIG_MARVELL_PHY=m +CONFIG_MARVELL_10G_PHY=m +CONFIG_MICREL_PHY=y +CONFIG_MICROCHIP_PHY=m +# CONFIG_MICROCHIP_T1_PHY is not set +CONFIG_MICROSEMI_PHY=y +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +CONFIG_AT803X_PHY=y +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=m +# CONFIG_RENESAS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +CONFIG_SMSC_PHY=m +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +CONFIG_VITESSE_PHY=y +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BCM_UNIMAC=m +CONFIG_MDIO_CAVIUM=y +# CONFIG_MDIO_GPIO is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +CONFIG_MDIO_THUNDER=y + +# +# MDIO Multiplexers +# +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y +CONFIG_MDIO_BUS_MUX_MMIOREG=y + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + +CONFIG_PPP=y +# CONFIG_PPP_BSDCOMP is not set +CONFIG_PPP_DEFLATE=y +# CONFIG_PPP_FILTER is not set +# CONFIG_PPP_MPPE is not set +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPPOE is not set +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +# CONFIG_SLIP is not set +CONFIG_SLHC=y +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SR9700 is not set +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +CONFIG_USB_NET_QMI_WWAN=y +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_ATH_COMMON=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +CONFIG_ATH10K=m +CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set +# CONFIG_ATH10K_SDIO is not set +# CONFIG_ATH10K_USB is not set +# CONFIG_ATH10K_DEBUG is not set +# CONFIG_ATH10K_DEBUGFS is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +# CONFIG_BRCMFMAC_USB is not set +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +CONFIG_MWIFIEX=m +# CONFIG_MWIFIEX_SDIO is not set +CONFIG_MWIFIEX_PCIE=m +# CONFIG_MWIFIEX_USB is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +# CONFIG_MT7663U is not set +# CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTW88 is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +CONFIG_WL18XX=m +CONFIG_WLCORE=m +# CONFIG_WLCORE_SPI is not set +CONFIG_WLCORE_SDIO=m +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +CONFIG_XEN_NETDEV_FRONTEND=y +# CONFIG_XEN_NETDEV_BACKEND is not set +# CONFIG_VMXNET3 is not set +# CONFIG_FUJITSU_ES is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_NET_LOCALIP_LST is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_FF_MEMLESS=y +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ADC=m +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_AXP20X_PEK is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_CMA3000 is not set +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_AMBAKMI=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_PNP=y +CONFIG_SERIAL_8250_16550A_VARIANTS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_PHYTIUM_PCI=m +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_SERIAL_FSL_LINFLEXUART=y +CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +# CONFIG_HVC_DCC is not set +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +# CONFIG_TTY_PRINTK is not set +CONFIG_VIRTIO_CONSOLE=y +CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_DMI_DECODE=y +CONFIG_IPMI_PLAT_DATA=y +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SI=m +# CONFIG_IPMI_SSIF is not set +# CONFIG_IPMI_WATCHDOG is not set +# CONFIG_IPMI_POWEROFF is not set +# CONFIG_IPMB_DEVICE_INTERFACE is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +# CONFIG_HW_RANDOM_VIRTIO is not set +CONFIG_HW_RANDOM_HISI_GM=y +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +# CONFIG_RAW_DRIVER is not set +CONFIG_DEVPORT=y +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +# CONFIG_TCG_TIS is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_INFINEON is not set +# CONFIG_TCG_XEN is not set +# CONFIG_TCG_CRB is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +# CONFIG_XILLYBUS is not set +CONFIG_RANDOM_TRUST_CPU=y +CONFIG_RANDOM_TRUST_BOOTLOADER=y +# end of Character devices + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_SMBUS=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_AMD_MP2 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=y +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +CONFIG_I2C_GPIO=m +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set +# CONFIG_I2C_HISI is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set +CONFIG_I2C_PHYTIUM_CORE=y +CONFIG_I2C_PHYTIUM_PCI=y +CONFIG_I2C_PHYTIUM_PLATFORM=y + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_CROS_EC_TUNNEL is not set +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +CONFIG_I2C_SLAVE=y +# CONFIG_I2C_SLAVE_EEPROM is not set +# CONFIG_I2C_SLAVE_TESTUNIT is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +CONFIG_I3C=y +CONFIG_CDNS_I3C_MASTER=y +# CONFIG_DW_I3C_MASTER is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BITBANG=m +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_HISI_KUNPENG is not set +# CONFIG_SPI_HISI_SFC_V3XX is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_PHYTIUM=y +CONFIG_SPI_PHYTIUM_PLAT=y +CONFIG_SPI_PHYTIUM_PCI=y +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_DYNAMIC=y +CONFIG_SPMI=y +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set +# CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_HISI is not set +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AXP209 is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +CONFIG_PINCTRL_MAX77620=y +# CONFIG_PINCTRL_RK805 is not set +# CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_PHYTIUM_CORE=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +CONFIG_GPIO_ALTERA=m +# CONFIG_GPIO_AMDPT is not set +# CONFIG_GPIO_CADENCE is not set +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HISI is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +CONFIG_GPIO_MB86S7X=y +CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_WCD934X=m +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +CONFIG_GPIO_PHYTIUM_PLAT=y +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +CONFIG_GPIO_MAX732X=y +# CONFIG_GPIO_MAX732X_IRQ is not set +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +CONFIG_GPIO_BD9571MWV=m +CONFIG_GPIO_MAX77620=y +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +CONFIG_W1=m + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_MATROX is not set +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS2482 is not set +# CONFIG_W1_MASTER_DS1WM is not set +# CONFIG_W1_MASTER_GPIO is not set +# CONFIG_W1_MASTER_SGI is not set +# end of 1-wire Bus Masters + +# +# 1-wire Slaves +# +CONFIG_W1_SLAVE_THERM=m +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2405 is not set +# CONFIG_W1_SLAVE_DS2408 is not set +# CONFIG_W1_SLAVE_DS2413 is not set +# CONFIG_W1_SLAVE_DS2406 is not set +# CONFIG_W1_SLAVE_DS2423 is not set +# CONFIG_W1_SLAVE_DS2805 is not set +# CONFIG_W1_SLAVE_DS2430 is not set +# CONFIG_W1_SLAVE_DS2431 is not set +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2438 is not set +# CONFIG_W1_SLAVE_DS250X is not set +# CONFIG_W1_SLAVE_DS2780 is not set +# CONFIG_W1_SLAVE_DS2781 is not set +# CONFIG_W1_SLAVE_DS28E04 is not set +# CONFIG_W1_SLAVE_DS28E17 is not set +# end of 1-wire Slaves + +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_BRCMSTB=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_VEXPRESS is not set +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_SBS=m +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set +CONFIG_BATTERY_BQ27XXX=y +CONFIG_BATTERY_BQ27XXX_I2C=y +CONFIG_BATTERY_BQ27XXX_HDQ=m +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +# CONFIG_AXP20X_POWER is not set +# CONFIG_AXP288_FUEL_GAUGE is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1721X is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_CROS_USBPD is not set +# CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM1177 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set +CONFIG_SENSORS_ARM_SCMI=y +CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CORSAIR_CPRO is not set +# CONFIG_SENSORS_DRIVETEMP is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IBMAEM is not set +# CONFIG_SENSORS_IBMPEX is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +CONFIG_SENSORS_PWM_FAN=m +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +CONFIG_SENSORS_INA2XX=m +CONFIG_SENSORS_INA3221=m +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VEXPRESS is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_XGENE is not set + +# +# ACPI drivers +# +# CONFIG_SENSORS_ACPI_POWER is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_FREQ_THERMAL=y +# CONFIG_DEVFREQ_THERMAL is not set +CONFIG_THERMAL_EMULATION=y +# CONFIG_THERMAL_MMIO is not set +# CONFIG_MAX77620_THERMAL is not set +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_WDAT_WDT is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +CONFIG_ARM_SP805_WATCHDOG=y +CONFIG_ARM_SBSA_WATCHDOG=y +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MAX77620_WATCHDOG is not set +CONFIG_ARM_SMC_WATCHDOG=y +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set +# CONFIG_XEN_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +CONFIG_MFD_BD9571MWV=y +CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=y +CONFIG_MFD_CROS_EC_DEV=y +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +CONFIG_MFD_HI6421_PMIC=y +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_INTEL_PMT is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +CONFIG_MFD_MAX77620=y +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS68470 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_MFD_ROHM_BD718XX=y +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +CONFIG_MFD_WCD934X=m +CONFIG_MFD_VEXPRESS_SYSREG=y +# CONFIG_RAVE_SP_CORE is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_BD718XX=y +CONFIG_REGULATOR_BD9571MWV=y +# CONFIG_REGULATOR_CROS_EC is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +# CONFIG_REGULATOR_FAN53880 is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_HI6421 is not set +CONFIG_REGULATOR_HI6421V530=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_MAX77620=y +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +CONFIG_REGULATOR_MAX8973=y +# CONFIG_REGULATOR_MAX77826 is not set +# CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set +# CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set +# CONFIG_REGULATOR_MPQ7920 is not set +# CONFIG_REGULATOR_MT6311 is not set +CONFIG_REGULATOR_PCA9450=y +CONFIG_REGULATOR_PFUZE100=y +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_SPMI=y +# CONFIG_REGULATOR_QCOM_USB_VBUS is not set +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set +CONFIG_REGULATOR_RK808=y +CONFIG_REGULATOR_ROHM=y +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set +# CONFIG_REGULATOR_S2MPA01 is not set +CONFIG_REGULATOR_S2MPS11=y +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set +# CONFIG_REGULATOR_SY8827N is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_VCTRL=m +# CONFIG_REGULATOR_VEXPRESS is not set +# CONFIG_REGULATOR_QCOM_LABIBB is not set +CONFIG_RC_CORE=m +CONFIG_RC_MAP=m +# CONFIG_LIRC is not set +CONFIG_RC_DECODERS=y +# CONFIG_IR_NEC_DECODER is not set +# CONFIG_IR_RC5_DECODER is not set +# CONFIG_IR_RC6_DECODER is not set +# CONFIG_IR_JVC_DECODER is not set +# CONFIG_IR_SONY_DECODER is not set +# CONFIG_IR_SANYO_DECODER is not set +# CONFIG_IR_SHARP_DECODER is not set +# CONFIG_IR_MCE_KBD_DECODER is not set +# CONFIG_IR_XMP_DECODER is not set +# CONFIG_IR_IMON_DECODER is not set +# CONFIG_IR_RCMM_DECODER is not set +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_ENE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_IMON_RAW is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_ITE_CIR is not set +# CONFIG_IR_FINTEK is not set +# CONFIG_IR_NUVOTON is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +# CONFIG_IR_GPIO_CIR is not set +# CONFIG_IR_SERIAL is not set +# CONFIG_IR_SIR is not set +# CONFIG_RC_XBOX_DVD is not set +# CONFIG_IR_TOY is not set +CONFIG_CEC_CORE=m +CONFIG_CEC_NOTIFIER=y +# CONFIG_MEDIA_CEC_RC is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_SUPPORT_FILTER=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +# CONFIG_MEDIA_RADIO_SUPPORT is not set +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +# CONFIG_MEDIA_TEST_SUPPORT is not set +# end of Media device types + +CONFIG_VIDEO_DEV=m +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=m + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_V4L2_FWNODE=m +# end of Video4Linux options + +# +# Media controller options +# +# CONFIG_MEDIA_CONTROLLER_DVB is not set +# end of Media controller options + +# +# Digital TV options +# +# CONFIG_DVB_MMAP is not set +# CONFIG_DVB_NET is not set +CONFIG_DVB_MAX_ADAPTERS=16 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options + +# +# Media drivers +# + +# +# Drivers filtered as selected at 'Filter media drivers' +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set + +# +# Analog/digital TV USB devices +# +# CONFIG_VIDEO_AU0828 is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_TM6000 is not set + +# +# Digital TV USB devices +# +# CONFIG_DVB_USB is not set +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set + +# +# Software defined radio USB devices +# +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_V4L2=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_VMALLOC=m +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_CADENCE is not set +# CONFIG_VIDEO_ASPEED is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_VIDEO_XILINX is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set +CONFIG_SDR_PLATFORM_DRIVERS=y + +# +# MMC/SDIO DVB adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# end of Media drivers + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y + +# +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' +# +CONFIG_VIDEO_IR_I2C=m + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA1997X is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set +# CONFIG_VIDEO_MAX9286 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set +# end of Video decoders + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips + +# +# Camera sensor devices +# +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +CONFIG_VIDEO_IMX219=m +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV5640 is not set +CONFIG_VIDEO_OV5645=m +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set +# end of SPI helper chips + +# +# Media SPI Adapters +# +# CONFIG_CXD2880_SPI_DRV is not set +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=m + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +# CONFIG_MEDIA_TUNER_TDA18250 is not set +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MSI001 is not set +CONFIG_MEDIA_TUNER_MT20XX=m +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2063 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +CONFIG_MEDIA_TUNER_MC44S803=m +# CONFIG_MEDIA_TUNER_MAX2165 is not set +# CONFIG_MEDIA_TUNER_TDA18218 is not set +# CONFIG_MEDIA_TUNER_FC0011 is not set +# CONFIG_MEDIA_TUNER_FC0012 is not set +# CONFIG_MEDIA_TUNER_FC0013 is not set +# CONFIG_MEDIA_TUNER_TDA18212 is not set +# CONFIG_MEDIA_TUNER_E4000 is not set +# CONFIG_MEDIA_TUNER_FC2580 is not set +# CONFIG_MEDIA_TUNER_M88RS6000T is not set +# CONFIG_MEDIA_TUNER_TUA9001 is not set +# CONFIG_MEDIA_TUNER_SI2157 is not set +# CONFIG_MEDIA_TUNER_IT913X is not set +# CONFIG_MEDIA_TUNER_R820T is not set +# CONFIG_MEDIA_TUNER_MXL301RF is not set +# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set +# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set +# end of Customize TV tuners + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +# CONFIG_DVB_STB0899 is not set +# CONFIG_DVB_STB6100 is not set +# CONFIG_DVB_STV090x is not set +# CONFIG_DVB_STV0910 is not set +# CONFIG_DVB_STV6110x is not set +# CONFIG_DVB_STV6111 is not set +# CONFIG_DVB_MXL5XX is not set +# CONFIG_DVB_M88DS3103 is not set + +# +# Multistandard (cable + terrestrial) frontends +# +# CONFIG_DVB_DRXK is not set +# CONFIG_DVB_TDA18271C2DD is not set +# CONFIG_DVB_SI2165 is not set +# CONFIG_DVB_MN88472 is not set +# CONFIG_DVB_MN88473 is not set + +# +# DVB-S (satellite) frontends +# +# CONFIG_DVB_CX24110 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_ZL10036 is not set +# CONFIG_DVB_ZL10039 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_STV0288 is not set +# CONFIG_DVB_STB6000 is not set +# CONFIG_DVB_STV0299 is not set +# CONFIG_DVB_STV6110 is not set +# CONFIG_DVB_STV0900 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_TDA8261 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_TUNER_CX24113 is not set +# CONFIG_DVB_TDA826X is not set +# CONFIG_DVB_TUA6100 is not set +# CONFIG_DVB_CX24116 is not set +# CONFIG_DVB_CX24117 is not set +# CONFIG_DVB_CX24120 is not set +# CONFIG_DVB_SI21XX is not set +# CONFIG_DVB_TS2020 is not set +# CONFIG_DVB_DS3000 is not set +# CONFIG_DVB_MB86A16 is not set +# CONFIG_DVB_TDA10071 is not set + +# +# DVB-T (terrestrial) frontends +# +# CONFIG_DVB_SP8870 is not set +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set +# CONFIG_DVB_S5H1432 is not set +# CONFIG_DVB_DRXD is not set +# CONFIG_DVB_L64781 is not set +# CONFIG_DVB_TDA1004X is not set +# CONFIG_DVB_NXT6000 is not set +# CONFIG_DVB_MT352 is not set +# CONFIG_DVB_ZL10353 is not set +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +# CONFIG_DVB_DIB7000M is not set +# CONFIG_DVB_DIB7000P is not set +# CONFIG_DVB_DIB9000 is not set +# CONFIG_DVB_TDA10048 is not set +# CONFIG_DVB_AF9013 is not set +# CONFIG_DVB_EC100 is not set +# CONFIG_DVB_STV0367 is not set +# CONFIG_DVB_CXD2820R is not set +# CONFIG_DVB_CXD2841ER is not set +# CONFIG_DVB_RTL2830 is not set +# CONFIG_DVB_RTL2832 is not set +# CONFIG_DVB_RTL2832_SDR is not set +# CONFIG_DVB_SI2168 is not set +# CONFIG_DVB_ZD1301_DEMOD is not set +# CONFIG_DVB_CXD2880 is not set + +# +# DVB-C (cable) frontends +# +# CONFIG_DVB_VES1820 is not set +# CONFIG_DVB_TDA10021 is not set +# CONFIG_DVB_TDA10023 is not set +# CONFIG_DVB_STV0297 is not set + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_DVB_LGDT3305 is not set +# CONFIG_DVB_LGDT3306A is not set +# CONFIG_DVB_LG2160 is not set +# CONFIG_DVB_S5H1409 is not set +# CONFIG_DVB_AU8522_DTV is not set +# CONFIG_DVB_AU8522_V4L is not set +# CONFIG_DVB_S5H1411 is not set + +# +# ISDB-T (terrestrial) frontends +# +# CONFIG_DVB_S921 is not set +# CONFIG_DVB_DIB8000 is not set +# CONFIG_DVB_MB86A20S is not set + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +# CONFIG_DVB_TC90522 is not set +# CONFIG_DVB_MN88443X is not set + +# +# Digital terrestrial only tuners/PLL +# +# CONFIG_DVB_PLL is not set +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set + +# +# SEC control devices for DVB-S +# +# CONFIG_DVB_DRX39XYJ is not set +# CONFIG_DVB_LNBH25 is not set +# CONFIG_DVB_LNBH29 is not set +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_LNBP22 is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set +# CONFIG_DVB_ISL6423 is not set +# CONFIG_DVB_A8293 is not set +# CONFIG_DVB_LGS8GL5 is not set +# CONFIG_DVB_LGS8GXX is not set +# CONFIG_DVB_ATBM8830 is not set +# CONFIG_DVB_TDA665x is not set +# CONFIG_DVB_IX2505V is not set +# CONFIG_DVB_M88RS2000 is not set +# CONFIG_DVB_AF9033 is not set +# CONFIG_DVB_HORUS3A is not set +# CONFIG_DVB_ASCOT2E is not set +# CONFIG_DVB_HELENE is not set + +# +# Common Interface (EN50221) controller drivers +# +# CONFIG_DVB_CXD2099 is not set +# CONFIG_DVB_SP2 is not set +# end of Customise DVB Frontends +# end of Media ancillary drivers + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_DRM=y +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y +CONFIG_DRM_VM=y + +# +# I2C encoder or helper chips +# +CONFIG_DRM_I2C_CH7006=m +CONFIG_DRM_I2C_SIL164=m +CONFIG_DRM_I2C_NXP_TDA998X=m +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set +CONFIG_DRM_MALI_DISPLAY=m +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +CONFIG_DRM_RCAR_DW_HDMI=m +CONFIG_DRM_RCAR_LVDS=m +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set +# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set +CONFIG_DRM_PANEL_LVDS=m +CONFIG_DRM_PANEL_SIMPLE=m +# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set +# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set +# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +CONFIG_DRM_PANEL_RAYDIUM_RM67191=m +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set +CONFIG_DRM_PANEL_SITRONIX_ST7703=m +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +CONFIG_DRM_DISPLAY_CONNECTOR=m +CONFIG_DRM_LONTIUM_LT9611=m +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +CONFIG_DRM_NWL_MIPI_DSI=m +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SIL_SII8620 is not set +CONFIG_DRM_SII902X=m +# CONFIG_DRM_SII9234 is not set +CONFIG_DRM_SIMPLE_BRIDGE=m +CONFIG_DRM_THINE_THC63LVD1024=m +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_TFP410 is not set +CONFIG_DRM_TI_SN65DSI86=m +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +CONFIG_DRM_I2C_ADV7511=m +CONFIG_DRM_I2C_ADV7511_AUDIO=y +CONFIG_DRM_I2C_ADV7511_CEC=y +# CONFIG_DRM_CDNS_MHDP8546 is not set +CONFIG_DRM_DW_HDMI=m +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m +CONFIG_DRM_DW_HDMI_I2S_AUDIO=m +CONFIG_DRM_DW_HDMI_CEC=m +# end of Display Interface Bridges + +# CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_MXSFB is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_DRM_PL111 is not set +# CONFIG_DRM_XEN is not set +# CONFIG_DRM_LIMA is not set +# CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_TIDSS is not set +CONFIG_DRM_LEGACY=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +CONFIG_FB_EFI=y +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_XEN_FBDEV_FRONTEND=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +CONFIG_BACKLIGHT_PWM=m +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +CONFIG_BACKLIGHT_LP855X=m +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# end of Backlight & LCD device support + +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +# end of Graphics support + +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +# CONFIG_SND_HDA_INTEL is not set +# end of HD-Audio + +CONFIG_SND_HDA_PREALLOC_SIZE=64 +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +CONFIG_SND_SOC_FSL_SAI=m +# CONFIG_SND_SOC_FSL_MQS is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_MTK_BTCVSD is not set +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_ADAU7118_HW is not set +# CONFIG_SND_SOC_ADAU7118_I2C is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +CONFIG_SND_SOC_CROS_EC_CODEC=m +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4234 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_DA7213 is not set +CONFIG_SND_SOC_DMIC=m +CONFIG_SND_SOC_HDMI_CODEC=m +CONFIG_SND_SOC_ES7134=m +CONFIG_SND_SOC_ES7241=m +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +CONFIG_SND_SOC_MAX98357A=m +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +CONFIG_SND_SOC_MAX98927=m +# CONFIG_SND_SOC_MAX98373_I2C is not set +# CONFIG_SND_SOC_MAX98373_SDW is not set +# CONFIG_SND_SOC_MAX98390 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +CONFIG_SND_SOC_PCM3168A=m +CONFIG_SND_SOC_PCM3168A_I2C=m +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RT1308_SDW is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_RT5682_SDW is not set +# CONFIG_SND_SOC_RT700_SDW is not set +# CONFIG_SND_SOC_RT711_SDW is not set +# CONFIG_SND_SOC_RT715_SDW is not set +# CONFIG_SND_SOC_SGTL5000 is not set +CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +CONFIG_SND_SOC_SPDIF=m +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set +# CONFIG_SND_SOC_TAS2770 is not set +# CONFIG_SND_SOC_TAS5086 is not set +CONFIG_SND_SOC_TAS571X=m +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WCD9335 is not set +CONFIG_SND_SOC_WCD934X=m +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +CONFIG_SND_SOC_WM8904=m +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +CONFIG_SND_SOC_WSA881X=m +# CONFIG_SND_SOC_ZL38060 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_MT6660 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8822 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# end of CODEC drivers + +CONFIG_SND_SIMPLE_CARD_UTILS=y +CONFIG_SND_SIMPLE_CARD=y +CONFIG_SND_AUDIO_GRAPH_CARD=y +# CONFIG_SND_XEN_FRONTEND is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=y +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +CONFIG_HID_APPLE=y +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +CONFIG_HID_BELKIN=y +# CONFIG_HID_BETOP_FF is not set +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +CONFIG_HID_CYPRESS=y +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +CONFIG_HID_EZKEY=y +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +CONFIG_HID_ITE=y +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +CONFIG_HID_REDRAGON=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set +# end of USB HID support + +# +# I2C HID support +# +CONFIG_I2C_HID=m +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USB_CONN_GPIO=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +# CONFIG_USB_OTG_FSM is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +# CONFIG_USB_MON is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +CONFIG_USB_MUSB_HDRC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y + +# +# Platform Glue Layer +# + +# +# MUSB DMA mode +# +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_ULPI is not set +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_PCI=y +CONFIG_USB_DWC3_HAPS=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_PCI=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_CHIPIDEA_GENERIC=y +CONFIG_USB_CHIPIDEA_TEGRA=y +CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_ISP1761_UDC=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_DUAL_ROLE=y + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +CONFIG_USB_SERIAL_CH341=y +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=m +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +CONFIG_USB_HSIC_USB3503=y +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +CONFIG_NOP_USB_XCEIV=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +CONFIG_USB_SNP_CORE=y +CONFIG_USB_SNP_UDC_PLAT=y +# CONFIG_USB_M66592 is not set +CONFIG_USB_BDC_UDC=y + +# +# Platform Support +# +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=m +CONFIG_USB_F_ACM=m +CONFIG_USB_U_SERIAL=m +CONFIG_USB_U_ETHER=m +CONFIG_USB_F_SERIAL=m +CONFIG_USB_F_OBEX=m +CONFIG_USB_F_NCM=m +CONFIG_USB_F_ECM=m +CONFIG_USB_F_EEM=m +CONFIG_USB_F_SUBSET=m +CONFIG_USB_F_RNDIS=m +CONFIG_USB_F_MASS_STORAGE=m +CONFIG_USB_F_FS=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +# CONFIG_USB_CONFIGFS_F_UVC is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + +CONFIG_TYPEC=m +CONFIG_TYPEC_TCPM=m +# CONFIG_TYPEC_TCPCI is not set +CONFIG_TYPEC_FUSB302=m +# CONFIG_TYPEC_UCSI is not set +CONFIG_TYPEC_HD3SS3220=m +# CONFIG_TYPEC_TPS6598X is not set +# CONFIG_TYPEC_STUSB160X is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +# CONFIG_TYPEC_MUX_PI3USB30532 is not set +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +# CONFIG_TYPEC_DP_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_STM32_SDMMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_ACPI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_F_SDH30=y +# CONFIG_MMC_SDHCI_MILBEAUT is not set +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set +CONFIG_MMC_DW_EXYNOS=y +CONFIG_MMC_DW_HI3798CV200=y +CONFIG_MMC_DW_K3=y +# CONFIG_MMC_DW_PCI is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +CONFIG_MMC_SDHCI_XENON=y +# CONFIG_MMC_SDHCI_OMAP is not set +CONFIG_MMC_SDHCI_AM654=y +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_GHES=y +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_XGENE is not set +# CONFIG_EDAC_DMC520 is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +CONFIG_RTC_DRV_DS1307=m +# CONFIG_RTC_DRV_DS1307_CENTURY is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_RK808=m +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +CONFIG_RTC_DRV_PCF85363=m +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +CONFIG_RTC_DRV_RX8581=m +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +CONFIG_RTC_DRV_RV8803=m +CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS3232_HWMON=y +CONFIG_RTC_DRV_PCF2127=m +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set +CONFIG_RTC_DRV_CROS_EC=y + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +CONFIG_RTC_DRV_PL031=y +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_ACPI=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +CONFIG_BCM_SBA_RAID=m +# CONFIG_DW_AXI_DMAC is not set +CONFIG_FSL_EDMA=y +# CONFIG_FSL_QDMA is not set +# CONFIG_HISI_DMA is not set +# CONFIG_INTEL_IDMA64 is not set +CONFIG_MV_XOR_V2=y +CONFIG_PL330_DMA=y +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set +# CONFIG_SF_PDMA is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +CONFIG_UIO=m +CONFIG_UIO_CIF=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_DMEM_GENIRQ=m +CONFIG_UIO_AEC=m +CONFIG_UIO_SERCOS3=m +CONFIG_UIO_PCI_GENERIC=m +CONFIG_UIO_NETX=m +CONFIG_UIO_PRUSS=m +CONFIG_UIO_MF624=m +CONFIG_VFIO_IOMMU_TYPE1=y +CONFIG_VFIO_VIRQFD=y +CONFIG_VFIO=y +# CONFIG_VFIO_NOIOMMU is not set +CONFIG_VFIO_PCI=y +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +# CONFIG_VFIO_PLATFORM is not set +# CONFIG_VFIO_MDEV is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# +# Xen driver support +# +CONFIG_XEN_BALLOON=y +CONFIG_XEN_SCRUB_PAGES_DEFAULT=y +CONFIG_XEN_DEV_EVTCHN=y +CONFIG_XEN_BACKEND=y +CONFIG_XENFS=y +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_XENBUS_FRONTEND=y +CONFIG_XEN_GNTDEV=y +CONFIG_XEN_GRANT_DEV_ALLOC=y +# CONFIG_XEN_GRANT_DMA_ALLOC is not set +CONFIG_SWIOTLB_XEN=y +# CONFIG_XEN_PVCALLS_FRONTEND is not set +# CONFIG_XEN_PVCALLS_BACKEND is not set +CONFIG_XEN_PRIVCMD=y +CONFIG_XEN_EFI=y +CONFIG_XEN_AUTO_XLATE=y +# end of Xen driver support + +# CONFIG_GREYBUS is not set +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# CONFIG_AD7280 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set +# end of Active energy metering IC + +# +# Resolver to digital converters +# +# CONFIG_AD2S1210 is not set +# end of Resolver to digital converters +# end of IIO staging drivers + +# CONFIG_FB_SM750 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# end of Android + +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_KS7010 is not set +# CONFIG_PI433 is not set + +# +# Gasket devices +# +# CONFIG_STAGING_GASKET_FRAMEWORK is not set +# end of Gasket devices + +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_FIELDBUS_DEV is not set +# CONFIG_KPC2000 is not set +# CONFIG_QLGE is not set +# CONFIG_WFX is not set +# CONFIG_SPMI_HISI3670 is not set +# CONFIG_MFD_HI6421_SPMI is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +# CONFIG_CHROMEOS_TBMC is not set +CONFIG_CROS_EC=y +CONFIG_CROS_EC_I2C=y +# CONFIG_CROS_EC_RPMSG is not set +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_PROTO=y +CONFIG_CROS_EC_CHARDEV=m +CONFIG_CROS_EC_LIGHTBAR=y +CONFIG_CROS_EC_VBC=y +CONFIG_CROS_EC_DEBUGFS=y +CONFIG_CROS_EC_SENSORHUB=y +CONFIG_CROS_EC_SYSFS=y +CONFIG_CROS_EC_TYPEC=m +CONFIG_CROS_USBPD_NOTIFY=y +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_LOONGARCH_PLATFORM_DEVICES=y +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX77686 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_SCMI is not set +CONFIG_COMMON_CLK_SCPI=y +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_S2MPS11=y +CONFIG_CLK_QORIQ=y +CONFIG_COMMON_CLK_XGENE=y +CONFIG_COMMON_CLK_PWM=y +CONFIG_COMMON_CLK_VC5=y +CONFIG_COMMON_CLK_BD718XX=m +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_HWSPINLOCK=y + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_ACPI=y +CONFIG_TIMER_PROBE=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +CONFIG_MAILBOX=y +CONFIG_ARM_MHU=y +CONFIG_PLATFORM_MHU=y +# CONFIG_PL320_MBOX is not set +CONFIG_PCC=y +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_PHYTIUM_MBOX=y +CONFIG_IOMMU_IOVA=y +CONFIG_IOASID=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ARM_SMMU=y +# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set +CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y +CONFIG_ARM_SMMU_V3=y +# CONFIG_ARM_SMMU_V3_SVA is not set +# CONFIG_AGENT_SMMU_ATOS is not set +# CONFIG_ARM_SMMU_V3_PM is not set +# CONFIG_VIRTIO_IOMMU is not set +# CONFIG_SMMU_BYPASS_DEV is not set + +# +# Remoteproc drivers +# +CONFIG_REMOTEPROC=y +CONFIG_REMOTEPROC_CDEV=y +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +CONFIG_RPMSG=y +CONFIG_RPMSG_CHAR=m +CONFIG_RPMSG_QCOM_GLINK=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +CONFIG_SOUNDWIRE=m + +# +# SoundWire Devices +# +# CONFIG_SOUNDWIRE_INTEL is not set +CONFIG_SOUNDWIRE_QCOM=m + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +CONFIG_SOC_BRCMSTB=y +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +# CONFIG_FSL_RCPM is not set +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +CONFIG_SOC_TI=y + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers + +# +# Hisilicon SoC driver support +# +# CONFIG_HISI_HBMCACHE is not set +# end of Hisilicon SoC driver support +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +CONFIG_EXTCON_PTN5150=m +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +CONFIG_EXTCON_USB_GPIO=y +CONFIG_EXTCON_USBC_CROS_EC=y +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set +# CONFIG_IIO_TRIGGERED_EVENT is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMA400 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7091R5 is not set +# CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7292 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_ADI_AXI_ADC is not set +# CONFIG_AXP20X_ADC is not set +# CONFIG_AXP288_ADC is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2496 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set +# CONFIG_MAX1363 is not set +CONFIG_MAX9611=m +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +# CONFIG_NAU7802 is not set +CONFIG_QCOM_VADC_COMMON=m +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +CONFIG_QCOM_SPMI_ADC5=m +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set +# end of Amplifiers + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_PMS7003 is not set +# CONFIG_SCD30_CORE is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +CONFIG_IIO_CROS_EC_SENSORS_CORE=m +CONFIG_IIO_CROS_EC_SENSORS=m +# CONFIG_IIO_CROS_EC_SENSORS_LID_ANGLE is not set + +# +# Hid Sensor IIO Common +# +# end of Hid Sensor IIO Common + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_FXOS8700_I2C is not set +# CONFIG_FXOS8700_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_ICM42600_I2C is not set +# CONFIG_INV_ICM42600_SPI is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units + +# +# Light sensors +# +# CONFIG_ACPI_ALS is not set +# CONFIG_ADJD_S311 is not set +# CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +CONFIG_IIO_CROS_EC_LIGHT_PROX=m +# CONFIG_GP2AP002 is not set +# CONFIG_GP2AP020A00F is not set +CONFIG_SENSORS_ISL29018=m +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6030 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +# CONFIG_IIO_SYSFS_TRIGGER is not set +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +CONFIG_IIO_CROS_EC_BARO=m +# CONFIG_DLHL60D is not set +# CONFIG_DPS310 is not set +# CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +CONFIG_MPL3115=m +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_PING is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +# CONFIG_LTC2983 is not set +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set +CONFIG_PWM_CROS_EC=m +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_ARM_GIC_PHYTIUM_2500=y +# CONFIG_AL_FIC is not set +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SCMI=y +# CONFIG_RESET_TI_SYSCON is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PHY_MIPI_DPHY=y +CONFIG_PHY_XGENE=y +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +CONFIG_PHY_FSL_IMX8MQ_USB=y +CONFIG_PHY_MIXEL_MIPI_DPHY=m +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +CONFIG_PHY_QCOM_USB_HS=y +# CONFIG_PHY_QCOM_USB_HSIC is not set +CONFIG_PHY_SAMSUNG_USB2=y +# CONFIG_PHY_TUSB1210 is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +CONFIG_ARM_PMU_ACPI=y +CONFIG_ARM_SMMU_V3_PMU=m +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +# CONFIG_HISI_PMU is not set +# CONFIG_HISI_PCIE_PMU is not set +# CONFIG_HNS3_PMU is not set +# end of Performance monitor support + +CONFIG_RAS=y +# CONFIG_USB4 is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# end of Android + +# +# Vendor Hooks +# +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +# CONFIG_NVMEM_SPMI_SDAM is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# CONFIG_HISI_PTT is not set +# end of HW tracing support + +CONFIG_FPGA=y +# CONFIG_ALTERA_PR_IP_CORE is not set +# CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set +# CONFIG_FPGA_MGR_ALTERA_CVP is not set +# CONFIG_FPGA_MGR_XILINX_SPI is not set +# CONFIG_FPGA_MGR_ICE40_SPI is not set +# CONFIG_FPGA_MGR_MACHXO2_SPI is not set +CONFIG_FPGA_BRIDGE=m +CONFIG_ALTERA_FREEZE_BRIDGE=m +# CONFIG_XILINX_PR_DECOUPLER is not set +CONFIG_FPGA_REGION=m +CONFIG_OF_FPGA_REGION=m +# CONFIG_FPGA_DFL is not set +# CONFIG_FSI is not set +# CONFIG_TEE is not set +CONFIG_MULTIPLEXER=y + +# +# Multiplexer drivers +# +# CONFIG_MUX_ADG792A is not set +# CONFIG_MUX_ADGS1408 is not set +# CONFIG_MUX_GPIO is not set +CONFIG_MUX_MMIO=y +# end of Multiplexer drivers + +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +CONFIG_SLIMBUS=m +CONFIG_SLIM_QCOM_CTRL=m +CONFIG_INTERCONNECT=y +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set +# CONFIG_ROH is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +# CONFIG_EXT4_MITIGATION_FALSE_SHARING is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +# CONFIG_VIRTIO_FS is not set +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_VMCORE=y +# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +# CONFIG_TMPFS_INODE64 is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set +# CONFIG_DYNAMIC_HUGETLB is not set +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y +CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y +CONFIG_SQUASHFS_EMBEDDED=y +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +# CONFIG_PSTORE_CONSOLE is not set +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_RAM is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=y +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +# CONFIG_NFS_V4_2_READ_PLUS is not set +CONFIG_NFSD=y +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFSD_PNFS=y +CONFIG_NFSD_BLOCKLAYOUT=y +CONFIG_NFSD_SCSILAYOUT=y +CONFIG_NFSD_FLEXFILELAYOUT=y +CONFIG_NFSD_V4_2_INTER_SSC=y +CONFIG_NFSD_V4_SECURITY_LABEL=y +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_SMB_SERVER is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +# CONFIG_9P_FS_POSIX_ACL is not set +# CONFIG_9P_FS_SECURITY is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_UNICODE is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +# CONFIG_SECURITY_YAMA is not set +# CONFIG_SECURITY_SAFESETID is not set +# CONFIG_SECURITY_LOCKDOWN_LSM is not set +# CONFIG_SECURITY_LANDLOCK is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +CONFIG_INTEGRITY_AUDIT=y +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y +# CONFIG_INIT_STACK_NONE is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set +# CONFIG_INIT_STACK_ALL_PATTERN is not set +CONFIG_INIT_STACK_ALL_ZERO=y +# CONFIG_GCC_PLUGIN_STACKLEAK is not set +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options + +# CONFIG_SECURITY_BOOT_INIT is not set +# end of Security options + +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y +CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ENGINE=m + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_DH=m +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +CONFIG_CRYPTO_CURVE25519=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_SEQIV is not set +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +CONFIG_CRYPTO_XTS=m +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_XXHASH=m +CONFIG_CRYPTO_BLAKE2B=m +# CONFIG_CRYPTO_BLAKE2S is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_SM3=m +CONFIG_CRYPTO_SM3_GENERIC=m +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +CONFIG_CRYPTO_SM4=m +CONFIG_CRYPTO_SM4_GENERIC=m +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_HASH=y +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +CONFIG_CRYPTO_USER_API_RNG=m +# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set +CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +# CONFIG_CRYPTO_STATS is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +# CONFIG_CRYPTO_DEV_VIRTIO is not set +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +CONFIG_CRYPTO_DEV_CCREE=m +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +CONFIG_CRYPTO_DEV_HISI_SEC2=m +CONFIG_CRYPTO_DEV_HISI_QM=m +CONFIG_CRYPTO_DEV_HISI_ZIP=m +CONFIG_CRYPTO_DEV_HISI_HPRE=m +# CONFIG_CRYPTO_DEV_HISI_TRNG is not set +# CONFIG_CRYPTO_DEV_HISI_MIGRATION is not set +CONFIG_CRYPTO_DEV_AMLOGIC_GXL=m +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set +# CONFIG_PGP_LIBRARY is not set +# CONFIG_PGP_KEY_PARSER is not set +# CONFIG_PGP_PRELOAD is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y +CONFIG_PACKING=y +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y +CONFIG_INDIRECT_PIO=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +# CONFIG_CRYPTO_LIB_CHACHA is not set +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_DES=m +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + +CONFIG_LIB_MEMNEQ=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=m +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_INTERVAL_TREE=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_CMA=y +CONFIG_DMA_PERNUMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=32 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +CONFIG_IRQ_POLL=y +CONFIG_MPILIB=y +CONFIG_DIMLIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_ARCH_HAS_COPY_MC=y +CONFIG_ARCH_STACKWALK=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_BTF is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_PGO_KERNEL is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_HAVE_KCSAN_COMPILER=y +# end of Generic Kernel Debugging Instruments + +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_KASAN_SW_TAGS=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SOFTLOCKUP_DETECTOR is not set + +# +# ARM64 NMI watchdog configuration +# +# end of ARM64 NMI watchdog configuration + +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHED_INFO=y +# CONFIG_SCHEDSTATS is not set +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y + +# +# Debug kernel data structures +# +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +CONFIG_RCU_TRACE=y +# CONFIG_RCU_EQS_DEBUG is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set + +# +# arm64 Debugging +# +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_DEBUG_EFI is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +CONFIG_ACPI_TRBE=y +# end of arm64 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +CONFIG_FUNCTION_ERROR_INJECTION=y +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_MIN_HEAP is not set +# CONFIG_TEST_SORT is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_STRSCPY is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_STACKINIT is not set +# CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set +CONFIG_MEMTEST=y +# end of Kernel Testing and Coverage +# end of Kernel hacking diff --git a/bsp/meta-phytium/recipes-kernel/linux/files/config/ft2000-4/ft2000-4_defconfig b/bsp/meta-phytium/recipes-kernel/linux/files/config/ft2000-4/ft2000-4_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..80a3c9ab94fbf80d011f96abf02a029771239a48 --- /dev/null +++ b/bsp/meta-phytium/recipes-kernel/linux/files/config/ft2000-4/ft2000-4_defconfig @@ -0,0 +1,7754 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.10.0 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="aarch64-openeuler-linux-gnu-gcc (crosstool-NG 1.25.0) 12.3.1" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=120301 +CONFIG_LD_VERSION=240000000 +CONFIG_CLANG_VERSION=0 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y +CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="-openeuler" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_BUILD_SALT="" +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_ZSTD=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +# CONFIG_KERNEL_ZSTD is not set +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +# CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE is not set +# end of Timers subsystem + +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +# CONFIG_SCHED_CORE is not set + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y +CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_MEMFS_INFO is not set +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CGROUP_V1_WRITEBACK is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +# CONFIG_RT_GROUP_SCHED is not set +# CONFIG_QOS_SCHED_DYNAMIC_AFFINITY is not set +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +# CONFIG_CGROUP_DEBUG is not set +# CONFIG_CGROUP_FILES is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_SCHED_AUTOGROUP=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y +CONFIG_BPF_JIT_DEFAULT_ON=y +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y +CONFIG_PROFILING=y +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_HAS_CPU_RELAX=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXC is not set +CONFIG_ARCH_PHYTIUM=y +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_S32 is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +CONFIG_HAVE_LIVEPATCH_WO_FTRACE=y + +# +# Enable Livepatch +# +# CONFIG_LIVEPATCH is not set +# end of Enable Livepatch + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +CONFIG_CAVIUM_ERRATUM_22375=y +CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y +# CONFIG_HISILICON_ERRATUM_1980005 is not set +CONFIG_HISILICON_ERRATUM_162100801=y +CONFIG_HISILICON_ERRATUM_162100125=y +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +CONFIG_HISILICON_ERRATUM_HIP08_RU_PREFETCH=y +# CONFIG_HISILICON_HIP08_RU_PREFETCH_DEFAULT_OFF is not set +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SCHED_MC=y +# CONFIG_SCHED_CLUSTER is not set +CONFIG_SCHED_SMT=y +CONFIG_NR_CPUS=256 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM64_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_MPAM is not set +# CONFIG_NUMA is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_LLC_128_LINE_SIZE=y +CONFIG_ARCH_HAS_FILTER_PGPROT=y +CONFIG_ARCH_HAS_MC_EXTABLE=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y +CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_SPINLOCKS is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set +CONFIG_CRASH_DUMP=y +# CONFIG_ARM64_CPU_PARK is not set +CONFIG_XEN_DOM0=y +CONFIG_XEN=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_ARM64_PMEM_LEGACY is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +# CONFIG_AARCH32_EL0 is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_AS_HAS_LSE_ATOMICS=y +CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_USE_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_CNP=y +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +CONFIG_ARM64_AMU_EXTN=y +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +CONFIG_ARM64_BTI=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +CONFIG_ARCH_RANDOM=y +CONFIG_ARM64_AS_HAS_MTE=y +CONFIG_ARM64_MTE=y +# end of ARMv8.5 architectural features + +# +# ARMv8.6 architectural features +# +CONFIG_ARM64_TWED=y +# end of ARMv8.6 architectural features + +# +# ARMv8.7 architectural features +# +CONFIG_ARM64_EPAN=y +# end of ARMv8.7 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +# CONFIG_ASCEND_FEATURES is not set +# end of Kernel Features + +# +# Boot options +# +# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set +CONFIG_CMDLINE="" +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y +# end of Boot options + +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ENERGY_MODEL=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y +# end of ARM CPU Idle Drivers + +CONFIG_HALTPOLL_CPUIDLE=y +# end of CPU Idle + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_ACPI_CPPC_CPUFREQ=m +CONFIG_ARM_SCPI_CPUFREQ=y +CONFIG_ARM_SCMI_CPUFREQ=y +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +# CONFIG_ISCSI_IBFT is not set +# CONFIG_FW_CFG_SYSFS is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_VARS_PSTORE=y +# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set +# CONFIG_EFI_FAKE_MEMMAP is not set +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ZBOOT=y +# CONFIG_EFI_ZBOOT_SIGNED is not set +CONFIG_EFI_ARMSTUB_DTB_LOADER=y +# CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER is not set +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +CONFIG_EFI_CAPSULE_LOADER=y +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_UEFI_CPER=y +CONFIG_UEFI_CPER_ARM=y +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +CONFIG_ARM_SMCCC_SOC_ID=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_GENERIC_GSI=y +CONFIG_ACPI_CCA_REQUIRED=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_TAD is not set +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_MCFG=y +CONFIG_ACPI_CPPC_LIB=y +CONFIG_ACPI_PROCESSOR=y +# CONFIG_ACPI_IPMI is not set +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_THERMAL=y +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_HED=y +# CONFIG_ACPI_CUSTOM_METHOD is not set +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y +CONFIG_HAVE_ACPI_APEI=y +CONFIG_ACPI_APEI=y +CONFIG_ACPI_APEI_GHES=y +# CONFIG_ACPI_APEI_GHES_TS_CORE is not set +# CONFIG_ACPI_APEI_GHES_NOTIFY_ALL_RAS_ERR is not set +CONFIG_ACPI_APEI_SEA=y +CONFIG_ACPI_APEI_MEMORY_FAILURE=y +CONFIG_ACPI_APEI_EINJ=y +# CONFIG_ACPI_APEI_ERST_DEBUG is not set +# CONFIG_ACPI_CONFIGFS is not set +CONFIG_ACPI_IORT=y +CONFIG_ACPI_GTDT=y +CONFIG_ACPI_PPTT=y +# CONFIG_PMIC_OPREGION is not set +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_VIRTUALIZATION=y +# CONFIG_KVM is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA512_ARM64=m +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64_CE=m +CONFIG_CRYPTO_SHA3_ARM64=m +CONFIG_CRYPTO_SM3_ARM64_CE=m +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set +# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m +CONFIG_CRYPTO_CHACHA20_NEON=m +# CONFIG_CRYPTO_POLY1305_NEON is not set +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set +CONFIG_CRYPTO_AES_ARM64_BS=m + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_QUICK_KEXEC is not set +CONFIG_ARCH_WANT_RESERVE_CRASH_KERNEL=y +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_SHADOW_CALL_STACK=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +CONFIG_BLK_CMDLINE_PARSER=y +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set +# CONFIG_BLK_DEV_DUMPINFO is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_CMDLINE_PARTITION=y +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_ASN1=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_SPIN_TRYLOCK=y +CONFIG_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_INLINE_SPIN_LOCK=y +CONFIG_INLINE_SPIN_LOCK_BH=y +CONFIG_INLINE_SPIN_LOCK_IRQ=y +CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_INLINE_SPIN_UNLOCK_BH=y +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_READ_LOCK=y +CONFIG_INLINE_READ_LOCK_BH=y +CONFIG_INLINE_READ_LOCK_IRQ=y +CONFIG_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_BH=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_WRITE_LOCK=y +CONFIG_INLINE_WRITE_LOCK_BH=y +CONFIG_INLINE_WRITE_LOCK_IRQ=y +CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_BH=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +# CONFIG_HUGE_VMALLOC_DEFAULT_ENABLED is not set +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +# CONFIG_HWPOISON_INJECT is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_MEMCG_QOS=y +# CONFIG_ETMEM is not set +# CONFIG_PAGE_CACHE_LIMIT is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=19 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_FRAME_VECTOR=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# CONFIG_PIN_MEMORY is not set +# CONFIG_CLEAR_FREELIST_PAGE is not set +# CONFIG_EXTEND_HUGEPAGE_MAPPING is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_NETLABEL is not set +# CONFIG_MPTCP is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +# CONFIG_BRIDGE_NETFILTER is not set + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +# CONFIG_NF_CONNTRACK_PROCFS is not set +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_MASQUERADE=y +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +CONFIG_NETFILTER_XT_TARGET_LOG=m +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +CONFIG_IP6_NF_MANGLE=m +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +# CONFIG_IP6_NF_TARGET_NPT is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +# CONFIG_BRIDGE_MRP is not set +CONFIG_HAVE_NET_DSA=y +CONFIG_NET_DSA=m +# CONFIG_NET_DSA_TAG_AR9331 is not set +# CONFIG_NET_DSA_TAG_BRCM is not set +# CONFIG_NET_DSA_TAG_BRCM_PREPEND is not set +# CONFIG_NET_DSA_TAG_GSWIP is not set +# CONFIG_NET_DSA_TAG_DSA is not set +# CONFIG_NET_DSA_TAG_EDSA is not set +# CONFIG_NET_DSA_TAG_MTK is not set +# CONFIG_NET_DSA_TAG_KSZ is not set +# CONFIG_NET_DSA_TAG_RTL4_A is not set +CONFIG_NET_DSA_TAG_OCELOT=m +# CONFIG_NET_DSA_TAG_QCA is not set +# CONFIG_NET_DSA_TAG_LAN9303 is not set +# CONFIG_NET_DSA_TAG_SJA1105 is not set +# CONFIG_NET_DSA_TAG_TRAILER is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFB is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +CONFIG_NET_SCH_CBS=m +CONFIG_NET_SCH_ETF=m +CONFIG_NET_SCH_TAPRIO=m +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_DRR is not set +CONFIG_NET_SCH_MQPRIO=m +# CONFIG_NET_SCH_SKBPRIO is not set +# CONFIG_NET_SCH_CHOKE is not set +# CONFIG_NET_SCH_QFQ is not set +# CONFIG_NET_SCH_CODEL is not set +# CONFIG_NET_SCH_FQ_CODEL is not set +# CONFIG_NET_SCH_CAKE is not set +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_HHF is not set +# CONFIG_NET_SCH_PIE is not set +CONFIG_NET_SCH_INGRESS=m +# CONFIG_NET_SCH_PLUG is not set +# CONFIG_NET_SCH_ETS is not set +# CONFIG_NET_SCH_DEFAULT is not set + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +# CONFIG_NET_CLS_CGROUP is not set +# CONFIG_NET_CLS_BPF is not set +CONFIG_NET_CLS_FLOWER=m +# CONFIG_NET_CLS_MATCHALL is not set +# CONFIG_NET_EMATCH is not set +CONFIG_NET_CLS_ACT=y +# CONFIG_NET_ACT_POLICE is not set +CONFIG_NET_ACT_GACT=m +# CONFIG_GACT_PROB is not set +CONFIG_NET_ACT_MIRRED=m +# CONFIG_NET_ACT_SAMPLE is not set +# CONFIG_NET_ACT_IPT is not set +# CONFIG_NET_ACT_NAT is not set +# CONFIG_NET_ACT_PEDIT is not set +# CONFIG_NET_ACT_SIMP is not set +# CONFIG_NET_ACT_SKBEDIT is not set +# CONFIG_NET_ACT_CSUM is not set +# CONFIG_NET_ACT_MPLS is not set +# CONFIG_NET_ACT_VLAN is not set +# CONFIG_NET_ACT_BPF is not set +# CONFIG_NET_ACT_SKBMOD is not set +# CONFIG_NET_ACT_IFE is not set +# CONFIG_NET_ACT_TUNNEL_KEY is not set +CONFIG_NET_ACT_GATE=m +# CONFIG_NET_TC_SKB_EXT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +CONFIG_NET_SWITCHDEV=y +# CONFIG_NET_L3_MASTER_DEV is not set +CONFIG_QRTR=m +CONFIG_QRTR_SMD=m +CONFIG_QRTR_TUN=m +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_JIT=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_CALC_BITTIMING=y +CONFIG_CAN_FLEXCAN=m +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +# end of CAN Device Drivers + +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +# CONFIG_BT_BNEP_MC_FILTER is not set +# CONFIG_BT_BNEP_PROTO_FILTER is not set +CONFIG_BT_HIDP=m +# CONFIG_BT_HS is not set +# CONFIG_BT_LE is not set +# CONFIG_BT_MSFTEXT is not set +# CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_FEATURE_DEBUG is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=m +CONFIG_BT_BCM=m +CONFIG_BT_RTL=m +CONFIG_BT_HCIBTUSB=m +# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set +CONFIG_BT_HCIBTUSB_BCM=y +# CONFIG_BT_HCIBTUSB_MTK is not set +CONFIG_BT_HCIBTUSB_RTL=y +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_SERDEV=y +# CONFIG_BT_HCIUART_H4 is not set +# CONFIG_BT_HCIUART_NOKIA is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIUART_3WIRE=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_BCM is not set +# CONFIG_BT_HCIUART_RTL is not set +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIUART_MRVL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_BT_MTKSDIO is not set +# CONFIG_BT_MTKUART is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_GPIO is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_XEN is not set +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +CONFIG_NFC=m +# CONFIG_NFC_DIGITAL is not set +CONFIG_NFC_NCI=m +# CONFIG_NFC_NCI_SPI is not set +# CONFIG_NFC_NCI_UART is not set +# CONFIG_NFC_HCI is not set + +# +# Near Field Communication (NFC) devices +# +# CONFIG_NFC_FDP is not set +# CONFIG_NFC_PN533_USB is not set +# CONFIG_NFC_PN533_I2C is not set +# CONFIG_NFC_PN532_UART is not set +# CONFIG_NFC_MRVL_USB is not set +# CONFIG_NFC_ST_NCI_I2C is not set +# CONFIG_NFC_ST_NCI_SPI is not set +# CONFIG_NFC_NXP_NCI is not set +CONFIG_NFC_S3FWRN5=m +CONFIG_NFC_S3FWRN5_I2C=m +# end of Near Field Communication (NFC) devices + +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +CONFIG_FAILOVER=y +CONFIG_ETHTOOL_NETLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI_PCIE=y +# CONFIG_PCIEAER is not set +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_PF_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +CONFIG_PCI_PASID=y +CONFIG_PCI_LABEL=y +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_XILINX is not set +CONFIG_PCI_XGENE=y +CONFIG_PCI_XGENE_MSI=y +CONFIG_PCIE_ALTERA=y +CONFIG_PCIE_ALTERA_MSI=y +CONFIG_PCI_HOST_THUNDER_PEM=y +CONFIG_PCI_HOST_THUNDER_ECAM=y +# CONFIG_PCIE_HISI_ERR is not set + +# +# DesignWare PCI Core Support +# +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCIE_DW_PLAT_EP is not set +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +CONFIG_PCIE_MOBIVEIL=y +CONFIG_PCIE_MOBIVEIL_HOST=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCIE_CADENCE_PLAT_EP is not set +# CONFIG_PCI_J721E_HOST is not set +# CONFIG_PCI_J721E_EP is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +CONFIG_PCI_ENDPOINT=y +CONFIG_PCI_ENDPOINT_CONFIGFS=y +CONFIG_PCI_EPF_TEST=m +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +# CONFIG_UEVENT_HELPER is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y +# CONFIG_FW_LOADER_COMPRESS is not set +CONFIG_FW_CACHE=y +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_SYS_HYPERVISOR=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SLIMBUS=m +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_SPMI=m +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_SOUNDWIRE=m +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +CONFIG_BRCMSTB_GISB_ARB=y +# CONFIG_MOXTET is not set +CONFIG_SIMPLE_PM_BUS=y +CONFIG_VEXPRESS_CONFIG=y +# CONFIG_MHI_BUS is not set +# end of Bus devices + +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_PHYSMAP_VERSATILE is not set +# CONFIG_MTD_PHYSMAP_GEMINI is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +# CONFIG_MTD_DATAFLASH_OTP is not set +# CONFIG_MTD_MCHP23K256 is not set +CONFIG_MTD_SST25L=y +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +CONFIG_MTD_NAND_CORE=y +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set +CONFIG_MTD_RAW_NAND=y +# CONFIG_MTD_NAND_ECC_SW_BCH is not set + +# +# Raw/parallel NAND flash controllers +# +CONFIG_MTD_NAND_DENALI=y +# CONFIG_MTD_NAND_DENALI_PCI is not set +CONFIG_MTD_NAND_DENALI_DT=y +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_MXIC is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_CADENCE is not set +# CONFIG_MTD_NAND_ARASAN is not set + +# +# Misc +# +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +CONFIG_MTD_NAND_ECC=y +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +CONFIG_SPI_PHYTIUM_QUADSPI=y +# CONFIG_MTD_UBI is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OF_RESOLVE=y +CONFIG_OF_OVERLAY=y +# CONFIG_PARPORT is not set +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_XEN_BLKDEV_FRONTEND=y +# CONFIG_XEN_BLKDEV_BACKEND is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=y +CONFIG_BLK_DEV_NVME=y +CONFIG_NVME_MULTIPATH=y +CONFIG_NVME_HWMON=y +CONFIG_NVME_FABRICS=y +CONFIG_NVME_FC=y +CONFIG_NVME_TCP=y +CONFIG_NVME_TARGET=y +CONFIG_NVME_TARGET_PASSTHRU=y +CONFIG_NVME_TARGET_LOOP=y +CONFIG_NVME_TARGET_FC=y +CONFIG_NVME_TARGET_FCLOOP=y +CONFIG_NVME_TARGET_TCP=y +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +CONFIG_PCI_ENDPOINT_TEST=m +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +CONFIG_UACCE=m +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +CONFIG_RAID_ATTRS=m +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=y +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_HISI_SAS is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +CONFIG_MEGARAID_SAS=y +# CONFIG_SCSI_3SNIC_SSSRAID is not set +CONFIG_SCSI_MPT3SAS=m +CONFIG_SCSI_MPT2SAS_MAX_SGE=128 +CONFIG_SCSI_MPT3SAS_MAX_SGE=128 +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +CONFIG_SCSI_UFSHCD=y +# CONFIG_SCSI_UFSHCD_PCI is not set +CONFIG_SCSI_UFSHCD_PLATFORM=y +# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +# CONFIG_SCSI_UFS_BSG is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_XEN_SCSI_FRONTEND is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=y +CONFIG_SATA_HOST=y +CONFIG_PATA_TIMINGS=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_FORCE=y +CONFIG_ATA_ACPI=y +# CONFIG_SATA_ZPODD is not set +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_CEVA=y +CONFIG_AHCI_XGENE=y +CONFIG_AHCI_QORIQ=y +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +CONFIG_SATA_SIL24=y +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_ZHAOXIN is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +CONFIG_PATA_PLATFORM=y +CONFIG_PATA_OF_PLATFORM=y +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_PATA_ACPI is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID10 is not set +# CONFIG_MD_RAID456 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_UNSTRIPED is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set +CONFIG_DM_MIRROR=m +# CONFIG_DM_LOG_USERSPACE is not set +# CONFIG_DM_RAID is not set +CONFIG_DM_ZERO=m +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_IFB is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +# CONFIG_IPVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=y +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# Distributed Switch Architecture drivers +# +# CONFIG_B53 is not set +# CONFIG_NET_DSA_BCM_SF2 is not set +# CONFIG_NET_DSA_LOOP is not set +# CONFIG_NET_DSA_LANTIQ_GSWIP is not set +# CONFIG_NET_DSA_MT7530 is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set +# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MSCC_SEVILLE is not set +# CONFIG_NET_DSA_AR9331 is not set +# CONFIG_NET_DSA_SJA1105 is not set +# CONFIG_NET_DSA_QCA8K is not set +# CONFIG_NET_DSA_REALTEK_SMI is not set +# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set +# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +CONFIG_MDIO=m +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +# CONFIG_NET_VENDOR_3SNIC is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_AGERE=y +# CONFIG_ET131X is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +# CONFIG_ENA_ETHERNET is not set +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set +CONFIG_AMD_XGBE=y +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_AQTION is not set +CONFIG_NET_VENDOR_ARC=y +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +CONFIG_ATL1C=m +# CONFIG_ALX is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +CONFIG_BCMGENET=m +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set +CONFIG_BNX2X=m +CONFIG_BNX2X_SRIOV=y +# CONFIG_SYSTEMPORT is not set +# CONFIG_BNXT is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +CONFIG_NET_VENDOR_CADENCE=y +CONFIG_MACB=y +CONFIG_MACB_USE_HWSTAMP=y +CONFIG_MACB_PCI=y +CONFIG_NET_VENDOR_CAVIUM=y +CONFIG_THUNDER_NIC_PF=y +# CONFIG_THUNDER_NIC_VF is not set +CONFIG_THUNDER_NIC_BGX=y +CONFIG_THUNDER_NIC_RGX=y +# CONFIG_CAVIUM_PTP is not set +# CONFIG_LIQUIDIO is not set +# CONFIG_LIQUIDIO_VF is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +CONFIG_E1000=m +CONFIG_E1000E=m +CONFIG_IGB=m +CONFIG_IGB_HWMON=y +CONFIG_IGBVF=m +CONFIG_IXGB=m +CONFIG_IXGBE=m +CONFIG_IXGBE_HWMON=y +CONFIG_IXGBEVF=m +CONFIG_I40E=m +CONFIG_IAVF=m +CONFIG_I40EVF=m +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_IGC is not set +CONFIG_NET_VENDOR_NETSWIFT=y +# CONFIG_NGBE is not set +# CONFIG_TXGBE is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +CONFIG_MVMDIO=y +# CONFIG_SKGE is not set +CONFIG_SKY2=y +# CONFIG_SKY2_DEBUG is not set +# CONFIG_OCTEONTX2_AF is not set +# CONFIG_OCTEONTX2_PF is not set +# CONFIG_PRESTERA is not set +CONFIG_NET_VENDOR_MELLANOX=y +CONFIG_MLX4_EN=m +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +CONFIG_MLX4_CORE_GEN2=y +CONFIG_MLX5_CORE=m +# CONFIG_MLX5_FPGA is not set +CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_EN_ARFS=y +CONFIG_MLX5_EN_RXNFC=y +CONFIG_MLX5_MPFS=y +CONFIG_MLX5_ESWITCH=y +CONFIG_MLX5_CLS_ACT=y +# CONFIG_MLX5_CORE_IPOIB is not set +CONFIG_MLX5_SW_STEERING=y +# CONFIG_MLXSW_CORE is not set +# CONFIG_MLXFW is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_LAN743X is not set +CONFIG_NET_VENDOR_MICROSEMI=y +# CONFIG_MSCC_OCELOT_SWITCH is not set +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NATSEMI=y +# CONFIG_NATSEMI is not set +# CONFIG_NS83820 is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_8390=y +# CONFIG_NE2K_PCI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_QED is not set +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCA7000_SPI is not set +# CONFIG_QCA7000_UART is not set +CONFIG_QCOM_EMAC=m +CONFIG_RMNET=m +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R8169 is not set +CONFIG_NET_VENDOR_RENESAS=y +CONFIG_NET_VENDOR_ROCKER=y +# CONFIG_ROCKER is not set +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set +CONFIG_NET_VENDOR_SEEQ=y +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +CONFIG_NET_VENDOR_SMSC=y +CONFIG_SMC91X=y +# CONFIG_EPIC100 is not set +CONFIG_SMSC911X=y +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_PHYTIUM=y +# CONFIG_DWMAC_INTEL_PLAT is not set +# CONFIG_DWMAC_LOONGSON is not set +# CONFIG_STMMAC_PCI is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TI_CPSW_PHY_SEL is not set +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +CONFIG_NET_VENDOR_XILINX=y +# CONFIG_XILINX_AXI_EMAC is not set +# CONFIG_XILINX_LL_TEMAC is not set +# CONFIG_NET_VENDOR_NEBULA_MATRIX is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_NET_SB1000 is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +CONFIG_AQUANTIA_PHY=y +# CONFIG_AX88796B_PHY is not set +CONFIG_BROADCOM_PHY=m +# CONFIG_BCM54140_PHY is not set +CONFIG_BCM7XXX_PHY=m +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +CONFIG_BCM_NET_PHYLIB=m +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +CONFIG_MARVELL_PHY=m +CONFIG_MARVELL_10G_PHY=m +CONFIG_MICREL_PHY=y +CONFIG_MICROCHIP_PHY=m +# CONFIG_MICROCHIP_T1_PHY is not set +CONFIG_MICROSEMI_PHY=y +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +CONFIG_AT803X_PHY=y +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=m +# CONFIG_RENESAS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +CONFIG_SMSC_PHY=m +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +CONFIG_VITESSE_PHY=y +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BCM_UNIMAC=m +CONFIG_MDIO_CAVIUM=y +# CONFIG_MDIO_GPIO is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +CONFIG_MDIO_THUNDER=y + +# +# MDIO Multiplexers +# +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y +CONFIG_MDIO_BUS_MUX_MMIOREG=y + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + +CONFIG_PPP=y +# CONFIG_PPP_BSDCOMP is not set +CONFIG_PPP_DEFLATE=y +# CONFIG_PPP_FILTER is not set +# CONFIG_PPP_MPPE is not set +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPPOE is not set +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +# CONFIG_SLIP is not set +CONFIG_SLHC=y +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SR9700 is not set +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +CONFIG_USB_NET_QMI_WWAN=y +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_ATH_COMMON=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +CONFIG_ATH10K=m +CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set +# CONFIG_ATH10K_SDIO is not set +# CONFIG_ATH10K_USB is not set +# CONFIG_ATH10K_DEBUG is not set +# CONFIG_ATH10K_DEBUGFS is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +# CONFIG_BRCMFMAC_USB is not set +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +CONFIG_MWIFIEX=m +# CONFIG_MWIFIEX_SDIO is not set +CONFIG_MWIFIEX_PCIE=m +# CONFIG_MWIFIEX_USB is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +# CONFIG_MT7663U is not set +# CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTW88 is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +CONFIG_WL18XX=m +CONFIG_WLCORE=m +# CONFIG_WLCORE_SPI is not set +CONFIG_WLCORE_SDIO=m +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +CONFIG_XEN_NETDEV_FRONTEND=y +# CONFIG_XEN_NETDEV_BACKEND is not set +# CONFIG_VMXNET3 is not set +# CONFIG_FUJITSU_ES is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_NET_LOCALIP_LST is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_FF_MEMLESS=y +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ADC=m +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_AXP20X_PEK is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_CMA3000 is not set +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_AMBAKMI=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_PNP=y +CONFIG_SERIAL_8250_16550A_VARIANTS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_PHYTIUM_PCI=m +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_SERIAL_FSL_LINFLEXUART=y +CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +# CONFIG_HVC_DCC is not set +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +# CONFIG_TTY_PRINTK is not set +CONFIG_VIRTIO_CONSOLE=y +CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_DMI_DECODE=y +CONFIG_IPMI_PLAT_DATA=y +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SI=m +# CONFIG_IPMI_SSIF is not set +# CONFIG_IPMI_WATCHDOG is not set +# CONFIG_IPMI_POWEROFF is not set +# CONFIG_IPMB_DEVICE_INTERFACE is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +# CONFIG_HW_RANDOM_VIRTIO is not set +CONFIG_HW_RANDOM_HISI_GM=y +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +# CONFIG_RAW_DRIVER is not set +CONFIG_DEVPORT=y +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +# CONFIG_TCG_TIS is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_INFINEON is not set +# CONFIG_TCG_XEN is not set +# CONFIG_TCG_CRB is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +# CONFIG_XILLYBUS is not set +CONFIG_RANDOM_TRUST_CPU=y +CONFIG_RANDOM_TRUST_BOOTLOADER=y +# end of Character devices + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_SMBUS=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_AMD_MP2 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=y +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +CONFIG_I2C_GPIO=m +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set +# CONFIG_I2C_HISI is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set +CONFIG_I2C_PHYTIUM_CORE=y +CONFIG_I2C_PHYTIUM_PCI=y +CONFIG_I2C_PHYTIUM_PLATFORM=y + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_CROS_EC_TUNNEL is not set +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +CONFIG_I2C_SLAVE=y +# CONFIG_I2C_SLAVE_EEPROM is not set +# CONFIG_I2C_SLAVE_TESTUNIT is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +CONFIG_I3C=y +CONFIG_CDNS_I3C_MASTER=y +# CONFIG_DW_I3C_MASTER is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BITBANG=m +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_HISI_KUNPENG is not set +# CONFIG_SPI_HISI_SFC_V3XX is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_PHYTIUM=y +CONFIG_SPI_PHYTIUM_PLAT=y +CONFIG_SPI_PHYTIUM_PCI=y +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_DYNAMIC=y +CONFIG_SPMI=y +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set +# CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_HISI is not set +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AXP209 is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +CONFIG_PINCTRL_MAX77620=y +# CONFIG_PINCTRL_RK805 is not set +# CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_PHYTIUM_CORE=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +CONFIG_GPIO_ALTERA=m +# CONFIG_GPIO_AMDPT is not set +# CONFIG_GPIO_CADENCE is not set +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HISI is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +CONFIG_GPIO_MB86S7X=y +CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_WCD934X=m +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +CONFIG_GPIO_PHYTIUM_PLAT=y +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +CONFIG_GPIO_MAX732X=y +# CONFIG_GPIO_MAX732X_IRQ is not set +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +CONFIG_GPIO_BD9571MWV=m +CONFIG_GPIO_MAX77620=y +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +CONFIG_W1=m + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_MATROX is not set +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS2482 is not set +# CONFIG_W1_MASTER_DS1WM is not set +# CONFIG_W1_MASTER_GPIO is not set +# CONFIG_W1_MASTER_SGI is not set +# end of 1-wire Bus Masters + +# +# 1-wire Slaves +# +CONFIG_W1_SLAVE_THERM=m +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2405 is not set +# CONFIG_W1_SLAVE_DS2408 is not set +# CONFIG_W1_SLAVE_DS2413 is not set +# CONFIG_W1_SLAVE_DS2406 is not set +# CONFIG_W1_SLAVE_DS2423 is not set +# CONFIG_W1_SLAVE_DS2805 is not set +# CONFIG_W1_SLAVE_DS2430 is not set +# CONFIG_W1_SLAVE_DS2431 is not set +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2438 is not set +# CONFIG_W1_SLAVE_DS250X is not set +# CONFIG_W1_SLAVE_DS2780 is not set +# CONFIG_W1_SLAVE_DS2781 is not set +# CONFIG_W1_SLAVE_DS28E04 is not set +# CONFIG_W1_SLAVE_DS28E17 is not set +# end of 1-wire Slaves + +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_BRCMSTB=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_VEXPRESS is not set +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_SBS=m +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set +CONFIG_BATTERY_BQ27XXX=y +CONFIG_BATTERY_BQ27XXX_I2C=y +CONFIG_BATTERY_BQ27XXX_HDQ=m +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +# CONFIG_AXP20X_POWER is not set +# CONFIG_AXP288_FUEL_GAUGE is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1721X is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_CROS_USBPD is not set +# CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM1177 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set +CONFIG_SENSORS_ARM_SCMI=y +CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CORSAIR_CPRO is not set +# CONFIG_SENSORS_DRIVETEMP is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IBMAEM is not set +# CONFIG_SENSORS_IBMPEX is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +CONFIG_SENSORS_PWM_FAN=m +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +CONFIG_SENSORS_INA2XX=m +CONFIG_SENSORS_INA3221=m +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VEXPRESS is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_XGENE is not set + +# +# ACPI drivers +# +# CONFIG_SENSORS_ACPI_POWER is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_FREQ_THERMAL=y +# CONFIG_DEVFREQ_THERMAL is not set +CONFIG_THERMAL_EMULATION=y +# CONFIG_THERMAL_MMIO is not set +# CONFIG_MAX77620_THERMAL is not set +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_WDAT_WDT is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +CONFIG_ARM_SP805_WATCHDOG=y +CONFIG_ARM_SBSA_WATCHDOG=y +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MAX77620_WATCHDOG is not set +CONFIG_ARM_SMC_WATCHDOG=y +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set +# CONFIG_XEN_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +CONFIG_MFD_BD9571MWV=y +CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=y +CONFIG_MFD_CROS_EC_DEV=y +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +CONFIG_MFD_HI6421_PMIC=y +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_INTEL_PMT is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +CONFIG_MFD_MAX77620=y +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS68470 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_MFD_ROHM_BD718XX=y +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +CONFIG_MFD_WCD934X=m +CONFIG_MFD_VEXPRESS_SYSREG=y +# CONFIG_RAVE_SP_CORE is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_BD718XX=y +CONFIG_REGULATOR_BD9571MWV=y +# CONFIG_REGULATOR_CROS_EC is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +# CONFIG_REGULATOR_FAN53880 is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_HI6421 is not set +CONFIG_REGULATOR_HI6421V530=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_MAX77620=y +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +CONFIG_REGULATOR_MAX8973=y +# CONFIG_REGULATOR_MAX77826 is not set +# CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set +# CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set +# CONFIG_REGULATOR_MPQ7920 is not set +# CONFIG_REGULATOR_MT6311 is not set +CONFIG_REGULATOR_PCA9450=y +CONFIG_REGULATOR_PFUZE100=y +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_SPMI=y +# CONFIG_REGULATOR_QCOM_USB_VBUS is not set +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set +CONFIG_REGULATOR_RK808=y +CONFIG_REGULATOR_ROHM=y +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set +# CONFIG_REGULATOR_S2MPA01 is not set +CONFIG_REGULATOR_S2MPS11=y +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set +# CONFIG_REGULATOR_SY8827N is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_VCTRL=m +# CONFIG_REGULATOR_VEXPRESS is not set +# CONFIG_REGULATOR_QCOM_LABIBB is not set +CONFIG_RC_CORE=m +CONFIG_RC_MAP=m +# CONFIG_LIRC is not set +CONFIG_RC_DECODERS=y +# CONFIG_IR_NEC_DECODER is not set +# CONFIG_IR_RC5_DECODER is not set +# CONFIG_IR_RC6_DECODER is not set +# CONFIG_IR_JVC_DECODER is not set +# CONFIG_IR_SONY_DECODER is not set +# CONFIG_IR_SANYO_DECODER is not set +# CONFIG_IR_SHARP_DECODER is not set +# CONFIG_IR_MCE_KBD_DECODER is not set +# CONFIG_IR_XMP_DECODER is not set +# CONFIG_IR_IMON_DECODER is not set +# CONFIG_IR_RCMM_DECODER is not set +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_ENE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_IMON_RAW is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_ITE_CIR is not set +# CONFIG_IR_FINTEK is not set +# CONFIG_IR_NUVOTON is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +# CONFIG_IR_GPIO_CIR is not set +# CONFIG_IR_SERIAL is not set +# CONFIG_IR_SIR is not set +# CONFIG_RC_XBOX_DVD is not set +# CONFIG_IR_TOY is not set +CONFIG_CEC_CORE=m +CONFIG_CEC_NOTIFIER=y +# CONFIG_MEDIA_CEC_RC is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_SUPPORT_FILTER=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +# CONFIG_MEDIA_RADIO_SUPPORT is not set +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +# CONFIG_MEDIA_TEST_SUPPORT is not set +# end of Media device types + +CONFIG_VIDEO_DEV=m +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=m + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_V4L2_FWNODE=m +# end of Video4Linux options + +# +# Media controller options +# +# CONFIG_MEDIA_CONTROLLER_DVB is not set +# end of Media controller options + +# +# Digital TV options +# +# CONFIG_DVB_MMAP is not set +# CONFIG_DVB_NET is not set +CONFIG_DVB_MAX_ADAPTERS=16 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options + +# +# Media drivers +# + +# +# Drivers filtered as selected at 'Filter media drivers' +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set + +# +# Analog/digital TV USB devices +# +# CONFIG_VIDEO_AU0828 is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_TM6000 is not set + +# +# Digital TV USB devices +# +# CONFIG_DVB_USB is not set +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set + +# +# Software defined radio USB devices +# +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_V4L2=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_VMALLOC=m +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_CADENCE is not set +# CONFIG_VIDEO_ASPEED is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_VIDEO_XILINX is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set +CONFIG_SDR_PLATFORM_DRIVERS=y + +# +# MMC/SDIO DVB adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# end of Media drivers + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y + +# +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' +# +CONFIG_VIDEO_IR_I2C=m + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA1997X is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set +# CONFIG_VIDEO_MAX9286 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set +# end of Video decoders + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips + +# +# Camera sensor devices +# +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +CONFIG_VIDEO_IMX219=m +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV5640 is not set +CONFIG_VIDEO_OV5645=m +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set +# end of SPI helper chips + +# +# Media SPI Adapters +# +# CONFIG_CXD2880_SPI_DRV is not set +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=m + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +# CONFIG_MEDIA_TUNER_TDA18250 is not set +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MSI001 is not set +CONFIG_MEDIA_TUNER_MT20XX=m +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2063 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +CONFIG_MEDIA_TUNER_MC44S803=m +# CONFIG_MEDIA_TUNER_MAX2165 is not set +# CONFIG_MEDIA_TUNER_TDA18218 is not set +# CONFIG_MEDIA_TUNER_FC0011 is not set +# CONFIG_MEDIA_TUNER_FC0012 is not set +# CONFIG_MEDIA_TUNER_FC0013 is not set +# CONFIG_MEDIA_TUNER_TDA18212 is not set +# CONFIG_MEDIA_TUNER_E4000 is not set +# CONFIG_MEDIA_TUNER_FC2580 is not set +# CONFIG_MEDIA_TUNER_M88RS6000T is not set +# CONFIG_MEDIA_TUNER_TUA9001 is not set +# CONFIG_MEDIA_TUNER_SI2157 is not set +# CONFIG_MEDIA_TUNER_IT913X is not set +# CONFIG_MEDIA_TUNER_R820T is not set +# CONFIG_MEDIA_TUNER_MXL301RF is not set +# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set +# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set +# end of Customize TV tuners + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +# CONFIG_DVB_STB0899 is not set +# CONFIG_DVB_STB6100 is not set +# CONFIG_DVB_STV090x is not set +# CONFIG_DVB_STV0910 is not set +# CONFIG_DVB_STV6110x is not set +# CONFIG_DVB_STV6111 is not set +# CONFIG_DVB_MXL5XX is not set +# CONFIG_DVB_M88DS3103 is not set + +# +# Multistandard (cable + terrestrial) frontends +# +# CONFIG_DVB_DRXK is not set +# CONFIG_DVB_TDA18271C2DD is not set +# CONFIG_DVB_SI2165 is not set +# CONFIG_DVB_MN88472 is not set +# CONFIG_DVB_MN88473 is not set + +# +# DVB-S (satellite) frontends +# +# CONFIG_DVB_CX24110 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_ZL10036 is not set +# CONFIG_DVB_ZL10039 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_STV0288 is not set +# CONFIG_DVB_STB6000 is not set +# CONFIG_DVB_STV0299 is not set +# CONFIG_DVB_STV6110 is not set +# CONFIG_DVB_STV0900 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_TDA8261 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_TUNER_CX24113 is not set +# CONFIG_DVB_TDA826X is not set +# CONFIG_DVB_TUA6100 is not set +# CONFIG_DVB_CX24116 is not set +# CONFIG_DVB_CX24117 is not set +# CONFIG_DVB_CX24120 is not set +# CONFIG_DVB_SI21XX is not set +# CONFIG_DVB_TS2020 is not set +# CONFIG_DVB_DS3000 is not set +# CONFIG_DVB_MB86A16 is not set +# CONFIG_DVB_TDA10071 is not set + +# +# DVB-T (terrestrial) frontends +# +# CONFIG_DVB_SP8870 is not set +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set +# CONFIG_DVB_S5H1432 is not set +# CONFIG_DVB_DRXD is not set +# CONFIG_DVB_L64781 is not set +# CONFIG_DVB_TDA1004X is not set +# CONFIG_DVB_NXT6000 is not set +# CONFIG_DVB_MT352 is not set +# CONFIG_DVB_ZL10353 is not set +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +# CONFIG_DVB_DIB7000M is not set +# CONFIG_DVB_DIB7000P is not set +# CONFIG_DVB_DIB9000 is not set +# CONFIG_DVB_TDA10048 is not set +# CONFIG_DVB_AF9013 is not set +# CONFIG_DVB_EC100 is not set +# CONFIG_DVB_STV0367 is not set +# CONFIG_DVB_CXD2820R is not set +# CONFIG_DVB_CXD2841ER is not set +# CONFIG_DVB_RTL2830 is not set +# CONFIG_DVB_RTL2832 is not set +# CONFIG_DVB_RTL2832_SDR is not set +# CONFIG_DVB_SI2168 is not set +# CONFIG_DVB_ZD1301_DEMOD is not set +# CONFIG_DVB_CXD2880 is not set + +# +# DVB-C (cable) frontends +# +# CONFIG_DVB_VES1820 is not set +# CONFIG_DVB_TDA10021 is not set +# CONFIG_DVB_TDA10023 is not set +# CONFIG_DVB_STV0297 is not set + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_DVB_LGDT3305 is not set +# CONFIG_DVB_LGDT3306A is not set +# CONFIG_DVB_LG2160 is not set +# CONFIG_DVB_S5H1409 is not set +# CONFIG_DVB_AU8522_DTV is not set +# CONFIG_DVB_AU8522_V4L is not set +# CONFIG_DVB_S5H1411 is not set + +# +# ISDB-T (terrestrial) frontends +# +# CONFIG_DVB_S921 is not set +# CONFIG_DVB_DIB8000 is not set +# CONFIG_DVB_MB86A20S is not set + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +# CONFIG_DVB_TC90522 is not set +# CONFIG_DVB_MN88443X is not set + +# +# Digital terrestrial only tuners/PLL +# +# CONFIG_DVB_PLL is not set +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set + +# +# SEC control devices for DVB-S +# +# CONFIG_DVB_DRX39XYJ is not set +# CONFIG_DVB_LNBH25 is not set +# CONFIG_DVB_LNBH29 is not set +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_LNBP22 is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set +# CONFIG_DVB_ISL6423 is not set +# CONFIG_DVB_A8293 is not set +# CONFIG_DVB_LGS8GL5 is not set +# CONFIG_DVB_LGS8GXX is not set +# CONFIG_DVB_ATBM8830 is not set +# CONFIG_DVB_TDA665x is not set +# CONFIG_DVB_IX2505V is not set +# CONFIG_DVB_M88RS2000 is not set +# CONFIG_DVB_AF9033 is not set +# CONFIG_DVB_HORUS3A is not set +# CONFIG_DVB_ASCOT2E is not set +# CONFIG_DVB_HELENE is not set + +# +# Common Interface (EN50221) controller drivers +# +# CONFIG_DVB_CXD2099 is not set +# CONFIG_DVB_SP2 is not set +# end of Customise DVB Frontends +# end of Media ancillary drivers + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_DRM=y +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y +CONFIG_DRM_VM=y + +# +# I2C encoder or helper chips +# +CONFIG_DRM_I2C_CH7006=m +CONFIG_DRM_I2C_SIL164=m +CONFIG_DRM_I2C_NXP_TDA998X=m +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set +CONFIG_DRM_MALI_DISPLAY=m +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +CONFIG_DRM_RCAR_DW_HDMI=m +CONFIG_DRM_RCAR_LVDS=m +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set +# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set +CONFIG_DRM_PANEL_LVDS=m +CONFIG_DRM_PANEL_SIMPLE=m +# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set +# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set +# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +CONFIG_DRM_PANEL_RAYDIUM_RM67191=m +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set +CONFIG_DRM_PANEL_SITRONIX_ST7703=m +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +CONFIG_DRM_DISPLAY_CONNECTOR=m +CONFIG_DRM_LONTIUM_LT9611=m +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +CONFIG_DRM_NWL_MIPI_DSI=m +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SIL_SII8620 is not set +CONFIG_DRM_SII902X=m +# CONFIG_DRM_SII9234 is not set +CONFIG_DRM_SIMPLE_BRIDGE=m +CONFIG_DRM_THINE_THC63LVD1024=m +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_TFP410 is not set +CONFIG_DRM_TI_SN65DSI86=m +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +CONFIG_DRM_I2C_ADV7511=m +CONFIG_DRM_I2C_ADV7511_AUDIO=y +CONFIG_DRM_I2C_ADV7511_CEC=y +# CONFIG_DRM_CDNS_MHDP8546 is not set +CONFIG_DRM_DW_HDMI=m +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m +CONFIG_DRM_DW_HDMI_I2S_AUDIO=m +CONFIG_DRM_DW_HDMI_CEC=m +# end of Display Interface Bridges + +# CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_MXSFB is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_DRM_PL111 is not set +# CONFIG_DRM_XEN is not set +# CONFIG_DRM_LIMA is not set +# CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_TIDSS is not set +CONFIG_DRM_LEGACY=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +CONFIG_FB_EFI=y +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_XEN_FBDEV_FRONTEND=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +CONFIG_BACKLIGHT_PWM=m +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +CONFIG_BACKLIGHT_LP855X=m +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# end of Backlight & LCD device support + +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +# end of Graphics support + +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +# CONFIG_SND_HDA_INTEL is not set +# end of HD-Audio + +CONFIG_SND_HDA_PREALLOC_SIZE=64 +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +CONFIG_SND_SOC_FSL_SAI=m +# CONFIG_SND_SOC_FSL_MQS is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_MTK_BTCVSD is not set +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_ADAU7118_HW is not set +# CONFIG_SND_SOC_ADAU7118_I2C is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +CONFIG_SND_SOC_CROS_EC_CODEC=m +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4234 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_DA7213 is not set +CONFIG_SND_SOC_DMIC=m +CONFIG_SND_SOC_HDMI_CODEC=m +CONFIG_SND_SOC_ES7134=m +CONFIG_SND_SOC_ES7241=m +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +CONFIG_SND_SOC_MAX98357A=m +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +CONFIG_SND_SOC_MAX98927=m +# CONFIG_SND_SOC_MAX98373_I2C is not set +# CONFIG_SND_SOC_MAX98373_SDW is not set +# CONFIG_SND_SOC_MAX98390 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +CONFIG_SND_SOC_PCM3168A=m +CONFIG_SND_SOC_PCM3168A_I2C=m +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RT1308_SDW is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_RT5682_SDW is not set +# CONFIG_SND_SOC_RT700_SDW is not set +# CONFIG_SND_SOC_RT711_SDW is not set +# CONFIG_SND_SOC_RT715_SDW is not set +# CONFIG_SND_SOC_SGTL5000 is not set +CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +CONFIG_SND_SOC_SPDIF=m +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set +# CONFIG_SND_SOC_TAS2770 is not set +# CONFIG_SND_SOC_TAS5086 is not set +CONFIG_SND_SOC_TAS571X=m +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WCD9335 is not set +CONFIG_SND_SOC_WCD934X=m +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +CONFIG_SND_SOC_WM8904=m +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +CONFIG_SND_SOC_WSA881X=m +# CONFIG_SND_SOC_ZL38060 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_MT6660 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8822 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# end of CODEC drivers + +CONFIG_SND_SIMPLE_CARD_UTILS=y +CONFIG_SND_SIMPLE_CARD=y +CONFIG_SND_AUDIO_GRAPH_CARD=y +# CONFIG_SND_XEN_FRONTEND is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=y +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +CONFIG_HID_APPLE=y +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +CONFIG_HID_BELKIN=y +# CONFIG_HID_BETOP_FF is not set +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +CONFIG_HID_CYPRESS=y +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +CONFIG_HID_EZKEY=y +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +CONFIG_HID_ITE=y +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +CONFIG_HID_REDRAGON=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set +# end of USB HID support + +# +# I2C HID support +# +CONFIG_I2C_HID=m +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USB_CONN_GPIO=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +# CONFIG_USB_OTG_FSM is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +# CONFIG_USB_MON is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +CONFIG_USB_MUSB_HDRC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y + +# +# Platform Glue Layer +# + +# +# MUSB DMA mode +# +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_ULPI is not set +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_PCI=y +CONFIG_USB_DWC3_HAPS=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_PCI=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_CHIPIDEA_GENERIC=y +CONFIG_USB_CHIPIDEA_TEGRA=y +CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_ISP1761_UDC=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_DUAL_ROLE=y + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +CONFIG_USB_SERIAL_CH341=y +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=m +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +CONFIG_USB_HSIC_USB3503=y +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +CONFIG_NOP_USB_XCEIV=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +CONFIG_USB_SNP_CORE=y +CONFIG_USB_SNP_UDC_PLAT=y +# CONFIG_USB_M66592 is not set +CONFIG_USB_BDC_UDC=y + +# +# Platform Support +# +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=m +CONFIG_USB_F_ACM=m +CONFIG_USB_U_SERIAL=m +CONFIG_USB_U_ETHER=m +CONFIG_USB_F_SERIAL=m +CONFIG_USB_F_OBEX=m +CONFIG_USB_F_NCM=m +CONFIG_USB_F_ECM=m +CONFIG_USB_F_EEM=m +CONFIG_USB_F_SUBSET=m +CONFIG_USB_F_RNDIS=m +CONFIG_USB_F_MASS_STORAGE=m +CONFIG_USB_F_FS=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +# CONFIG_USB_CONFIGFS_F_UVC is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + +CONFIG_TYPEC=m +CONFIG_TYPEC_TCPM=m +# CONFIG_TYPEC_TCPCI is not set +CONFIG_TYPEC_FUSB302=m +# CONFIG_TYPEC_UCSI is not set +CONFIG_TYPEC_HD3SS3220=m +# CONFIG_TYPEC_TPS6598X is not set +# CONFIG_TYPEC_STUSB160X is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +# CONFIG_TYPEC_MUX_PI3USB30532 is not set +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +# CONFIG_TYPEC_DP_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_STM32_SDMMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_ACPI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_F_SDH30=y +# CONFIG_MMC_SDHCI_MILBEAUT is not set +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set +CONFIG_MMC_DW_EXYNOS=y +CONFIG_MMC_DW_HI3798CV200=y +CONFIG_MMC_DW_K3=y +# CONFIG_MMC_DW_PCI is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +CONFIG_MMC_SDHCI_XENON=y +# CONFIG_MMC_SDHCI_OMAP is not set +CONFIG_MMC_SDHCI_AM654=y +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_GHES=y +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_XGENE is not set +# CONFIG_EDAC_DMC520 is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +CONFIG_RTC_DRV_DS1307=m +# CONFIG_RTC_DRV_DS1307_CENTURY is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_RK808=m +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +CONFIG_RTC_DRV_PCF85363=m +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +CONFIG_RTC_DRV_RX8581=m +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +CONFIG_RTC_DRV_RV8803=m +CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS3232_HWMON=y +CONFIG_RTC_DRV_PCF2127=m +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set +CONFIG_RTC_DRV_CROS_EC=y + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +CONFIG_RTC_DRV_PL031=y +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_ACPI=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +CONFIG_BCM_SBA_RAID=m +# CONFIG_DW_AXI_DMAC is not set +CONFIG_FSL_EDMA=y +# CONFIG_FSL_QDMA is not set +# CONFIG_HISI_DMA is not set +# CONFIG_INTEL_IDMA64 is not set +CONFIG_MV_XOR_V2=y +CONFIG_PL330_DMA=y +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set +# CONFIG_SF_PDMA is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +CONFIG_UIO=m +CONFIG_UIO_CIF=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_DMEM_GENIRQ=m +CONFIG_UIO_AEC=m +CONFIG_UIO_SERCOS3=m +CONFIG_UIO_PCI_GENERIC=m +CONFIG_UIO_NETX=m +CONFIG_UIO_PRUSS=m +CONFIG_UIO_MF624=m +CONFIG_VFIO_IOMMU_TYPE1=y +CONFIG_VFIO_VIRQFD=y +CONFIG_VFIO=y +# CONFIG_VFIO_NOIOMMU is not set +CONFIG_VFIO_PCI=y +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +# CONFIG_VFIO_PLATFORM is not set +# CONFIG_VFIO_MDEV is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# +# Xen driver support +# +CONFIG_XEN_BALLOON=y +CONFIG_XEN_SCRUB_PAGES_DEFAULT=y +CONFIG_XEN_DEV_EVTCHN=y +CONFIG_XEN_BACKEND=y +CONFIG_XENFS=y +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_XENBUS_FRONTEND=y +CONFIG_XEN_GNTDEV=y +CONFIG_XEN_GRANT_DEV_ALLOC=y +# CONFIG_XEN_GRANT_DMA_ALLOC is not set +CONFIG_SWIOTLB_XEN=y +# CONFIG_XEN_PVCALLS_FRONTEND is not set +# CONFIG_XEN_PVCALLS_BACKEND is not set +CONFIG_XEN_PRIVCMD=y +CONFIG_XEN_EFI=y +CONFIG_XEN_AUTO_XLATE=y +# end of Xen driver support + +# CONFIG_GREYBUS is not set +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# CONFIG_AD7280 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set +# end of Active energy metering IC + +# +# Resolver to digital converters +# +# CONFIG_AD2S1210 is not set +# end of Resolver to digital converters +# end of IIO staging drivers + +# CONFIG_FB_SM750 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# end of Android + +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_KS7010 is not set +# CONFIG_PI433 is not set + +# +# Gasket devices +# +# CONFIG_STAGING_GASKET_FRAMEWORK is not set +# end of Gasket devices + +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_FIELDBUS_DEV is not set +# CONFIG_KPC2000 is not set +# CONFIG_QLGE is not set +# CONFIG_WFX is not set +# CONFIG_SPMI_HISI3670 is not set +# CONFIG_MFD_HI6421_SPMI is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +# CONFIG_CHROMEOS_TBMC is not set +CONFIG_CROS_EC=y +CONFIG_CROS_EC_I2C=y +# CONFIG_CROS_EC_RPMSG is not set +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_PROTO=y +CONFIG_CROS_EC_CHARDEV=m +CONFIG_CROS_EC_LIGHTBAR=y +CONFIG_CROS_EC_VBC=y +CONFIG_CROS_EC_DEBUGFS=y +CONFIG_CROS_EC_SENSORHUB=y +CONFIG_CROS_EC_SYSFS=y +CONFIG_CROS_EC_TYPEC=m +CONFIG_CROS_USBPD_NOTIFY=y +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_LOONGARCH_PLATFORM_DEVICES=y +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX77686 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_SCMI is not set +CONFIG_COMMON_CLK_SCPI=y +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_S2MPS11=y +CONFIG_CLK_QORIQ=y +CONFIG_COMMON_CLK_XGENE=y +CONFIG_COMMON_CLK_PWM=y +CONFIG_COMMON_CLK_VC5=y +CONFIG_COMMON_CLK_BD718XX=m +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_HWSPINLOCK=y + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_ACPI=y +CONFIG_TIMER_PROBE=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +CONFIG_MAILBOX=y +CONFIG_ARM_MHU=y +CONFIG_PLATFORM_MHU=y +# CONFIG_PL320_MBOX is not set +CONFIG_PCC=y +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_PHYTIUM_MBOX=y +CONFIG_IOMMU_IOVA=y +CONFIG_IOASID=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ARM_SMMU=y +# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set +CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y +CONFIG_ARM_SMMU_V3=y +# CONFIG_ARM_SMMU_V3_SVA is not set +# CONFIG_AGENT_SMMU_ATOS is not set +# CONFIG_ARM_SMMU_V3_PM is not set +# CONFIG_VIRTIO_IOMMU is not set +# CONFIG_SMMU_BYPASS_DEV is not set + +# +# Remoteproc drivers +# +CONFIG_REMOTEPROC=y +CONFIG_REMOTEPROC_CDEV=y +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +CONFIG_RPMSG=y +CONFIG_RPMSG_CHAR=m +CONFIG_RPMSG_QCOM_GLINK=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +CONFIG_SOUNDWIRE=m + +# +# SoundWire Devices +# +# CONFIG_SOUNDWIRE_INTEL is not set +CONFIG_SOUNDWIRE_QCOM=m + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +CONFIG_SOC_BRCMSTB=y +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +# CONFIG_FSL_RCPM is not set +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +CONFIG_SOC_TI=y + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers + +# +# Hisilicon SoC driver support +# +# CONFIG_HISI_HBMCACHE is not set +# end of Hisilicon SoC driver support +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +CONFIG_EXTCON_PTN5150=m +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +CONFIG_EXTCON_USB_GPIO=y +CONFIG_EXTCON_USBC_CROS_EC=y +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set +# CONFIG_IIO_TRIGGERED_EVENT is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMA400 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7091R5 is not set +# CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7292 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_ADI_AXI_ADC is not set +# CONFIG_AXP20X_ADC is not set +# CONFIG_AXP288_ADC is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2496 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set +# CONFIG_MAX1363 is not set +CONFIG_MAX9611=m +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +# CONFIG_NAU7802 is not set +CONFIG_QCOM_VADC_COMMON=m +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +CONFIG_QCOM_SPMI_ADC5=m +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set +# end of Amplifiers + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_PMS7003 is not set +# CONFIG_SCD30_CORE is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +CONFIG_IIO_CROS_EC_SENSORS_CORE=m +CONFIG_IIO_CROS_EC_SENSORS=m +# CONFIG_IIO_CROS_EC_SENSORS_LID_ANGLE is not set + +# +# Hid Sensor IIO Common +# +# end of Hid Sensor IIO Common + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_FXOS8700_I2C is not set +# CONFIG_FXOS8700_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_ICM42600_I2C is not set +# CONFIG_INV_ICM42600_SPI is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units + +# +# Light sensors +# +# CONFIG_ACPI_ALS is not set +# CONFIG_ADJD_S311 is not set +# CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +CONFIG_IIO_CROS_EC_LIGHT_PROX=m +# CONFIG_GP2AP002 is not set +# CONFIG_GP2AP020A00F is not set +CONFIG_SENSORS_ISL29018=m +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6030 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +# CONFIG_IIO_SYSFS_TRIGGER is not set +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +CONFIG_IIO_CROS_EC_BARO=m +# CONFIG_DLHL60D is not set +# CONFIG_DPS310 is not set +# CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +CONFIG_MPL3115=m +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_PING is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +# CONFIG_LTC2983 is not set +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set +CONFIG_PWM_CROS_EC=m +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_ARM_GIC_PHYTIUM_2500=y +# CONFIG_AL_FIC is not set +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SCMI=y +# CONFIG_RESET_TI_SYSCON is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PHY_MIPI_DPHY=y +CONFIG_PHY_XGENE=y +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +CONFIG_PHY_FSL_IMX8MQ_USB=y +CONFIG_PHY_MIXEL_MIPI_DPHY=m +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +CONFIG_PHY_QCOM_USB_HS=y +# CONFIG_PHY_QCOM_USB_HSIC is not set +CONFIG_PHY_SAMSUNG_USB2=y +# CONFIG_PHY_TUSB1210 is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +CONFIG_ARM_PMU_ACPI=y +CONFIG_ARM_SMMU_V3_PMU=m +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +# CONFIG_HISI_PMU is not set +# CONFIG_HISI_PCIE_PMU is not set +# CONFIG_HNS3_PMU is not set +# end of Performance monitor support + +CONFIG_RAS=y +# CONFIG_USB4 is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# end of Android + +# +# Vendor Hooks +# +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +# CONFIG_NVMEM_SPMI_SDAM is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# CONFIG_HISI_PTT is not set +# end of HW tracing support + +CONFIG_FPGA=y +# CONFIG_ALTERA_PR_IP_CORE is not set +# CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set +# CONFIG_FPGA_MGR_ALTERA_CVP is not set +# CONFIG_FPGA_MGR_XILINX_SPI is not set +# CONFIG_FPGA_MGR_ICE40_SPI is not set +# CONFIG_FPGA_MGR_MACHXO2_SPI is not set +CONFIG_FPGA_BRIDGE=m +CONFIG_ALTERA_FREEZE_BRIDGE=m +# CONFIG_XILINX_PR_DECOUPLER is not set +CONFIG_FPGA_REGION=m +CONFIG_OF_FPGA_REGION=m +# CONFIG_FPGA_DFL is not set +# CONFIG_FSI is not set +# CONFIG_TEE is not set +CONFIG_MULTIPLEXER=y + +# +# Multiplexer drivers +# +# CONFIG_MUX_ADG792A is not set +# CONFIG_MUX_ADGS1408 is not set +# CONFIG_MUX_GPIO is not set +CONFIG_MUX_MMIO=y +# end of Multiplexer drivers + +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +CONFIG_SLIMBUS=m +CONFIG_SLIM_QCOM_CTRL=m +CONFIG_INTERCONNECT=y +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set +# CONFIG_ROH is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +# CONFIG_EXT4_MITIGATION_FALSE_SHARING is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +# CONFIG_VIRTIO_FS is not set +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_VMCORE=y +# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +# CONFIG_TMPFS_INODE64 is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set +# CONFIG_DYNAMIC_HUGETLB is not set +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y +CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y +CONFIG_SQUASHFS_EMBEDDED=y +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +# CONFIG_PSTORE_CONSOLE is not set +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_RAM is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=y +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +# CONFIG_NFS_V4_2_READ_PLUS is not set +CONFIG_NFSD=y +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFSD_PNFS=y +CONFIG_NFSD_BLOCKLAYOUT=y +CONFIG_NFSD_SCSILAYOUT=y +CONFIG_NFSD_FLEXFILELAYOUT=y +CONFIG_NFSD_V4_2_INTER_SSC=y +CONFIG_NFSD_V4_SECURITY_LABEL=y +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_SMB_SERVER is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +# CONFIG_9P_FS_POSIX_ACL is not set +# CONFIG_9P_FS_SECURITY is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_UNICODE is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +# CONFIG_SECURITY_YAMA is not set +# CONFIG_SECURITY_SAFESETID is not set +# CONFIG_SECURITY_LOCKDOWN_LSM is not set +# CONFIG_SECURITY_LANDLOCK is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +CONFIG_INTEGRITY_AUDIT=y +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y +# CONFIG_INIT_STACK_NONE is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set +# CONFIG_INIT_STACK_ALL_PATTERN is not set +CONFIG_INIT_STACK_ALL_ZERO=y +# CONFIG_GCC_PLUGIN_STACKLEAK is not set +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options + +# CONFIG_SECURITY_BOOT_INIT is not set +# end of Security options + +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y +CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ENGINE=m + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_DH=m +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +CONFIG_CRYPTO_CURVE25519=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_SEQIV is not set +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +CONFIG_CRYPTO_XTS=m +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_XXHASH=m +CONFIG_CRYPTO_BLAKE2B=m +# CONFIG_CRYPTO_BLAKE2S is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_SM3=m +CONFIG_CRYPTO_SM3_GENERIC=m +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +CONFIG_CRYPTO_SM4=m +CONFIG_CRYPTO_SM4_GENERIC=m +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_HASH=y +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +CONFIG_CRYPTO_USER_API_RNG=m +# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set +CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +# CONFIG_CRYPTO_STATS is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +# CONFIG_CRYPTO_DEV_VIRTIO is not set +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +CONFIG_CRYPTO_DEV_CCREE=m +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +CONFIG_CRYPTO_DEV_HISI_SEC2=m +CONFIG_CRYPTO_DEV_HISI_QM=m +CONFIG_CRYPTO_DEV_HISI_ZIP=m +CONFIG_CRYPTO_DEV_HISI_HPRE=m +# CONFIG_CRYPTO_DEV_HISI_TRNG is not set +# CONFIG_CRYPTO_DEV_HISI_MIGRATION is not set +CONFIG_CRYPTO_DEV_AMLOGIC_GXL=m +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set +# CONFIG_PGP_LIBRARY is not set +# CONFIG_PGP_KEY_PARSER is not set +# CONFIG_PGP_PRELOAD is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y +CONFIG_PACKING=y +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y +CONFIG_INDIRECT_PIO=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +# CONFIG_CRYPTO_LIB_CHACHA is not set +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_DES=m +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + +CONFIG_LIB_MEMNEQ=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=m +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_INTERVAL_TREE=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_CMA=y +CONFIG_DMA_PERNUMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=32 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +CONFIG_IRQ_POLL=y +CONFIG_MPILIB=y +CONFIG_DIMLIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_ARCH_HAS_COPY_MC=y +CONFIG_ARCH_STACKWALK=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_BTF is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_PGO_KERNEL is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_HAVE_KCSAN_COMPILER=y +# end of Generic Kernel Debugging Instruments + +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_KASAN_SW_TAGS=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SOFTLOCKUP_DETECTOR is not set + +# +# ARM64 NMI watchdog configuration +# +# end of ARM64 NMI watchdog configuration + +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHED_INFO=y +# CONFIG_SCHEDSTATS is not set +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y + +# +# Debug kernel data structures +# +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +CONFIG_RCU_TRACE=y +# CONFIG_RCU_EQS_DEBUG is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set + +# +# arm64 Debugging +# +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_DEBUG_EFI is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +CONFIG_ACPI_TRBE=y +# end of arm64 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +CONFIG_FUNCTION_ERROR_INJECTION=y +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_MIN_HEAP is not set +# CONFIG_TEST_SORT is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_STRSCPY is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_STACKINIT is not set +# CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set +CONFIG_MEMTEST=y +# end of Kernel Testing and Coverage +# end of Kernel hacking diff --git a/bsp/meta-phytium/recipes-kernel/linux/files/config/phytiumpi/phytiumpi_defconfig b/bsp/meta-phytium/recipes-kernel/linux/files/config/phytiumpi/phytiumpi_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..72b019ffc9ccc2e4a3c55dc589aeda0bab8395d4 --- /dev/null +++ b/bsp/meta-phytium/recipes-kernel/linux/files/config/phytiumpi/phytiumpi_defconfig @@ -0,0 +1,7644 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.10.0 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="aarch64-openeuler-linux-gnu-gcc (crosstool-NG 1.26.0) 12.3.1" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=120301 +CONFIG_LD_VERSION=241000000 +CONFIG_CLANG_VERSION=0 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y +CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="-openeuler" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_BUILD_SALT="" +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_ZSTD=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +# CONFIG_KERNEL_ZSTD is not set +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +# CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE is not set +# end of Timers subsystem + +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +# CONFIG_SCHED_CORE is not set + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y +CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_MEMFS_INFO is not set +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CGROUP_V1_WRITEBACK is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +# CONFIG_RT_GROUP_SCHED is not set +# CONFIG_QOS_SCHED_DYNAMIC_AFFINITY is not set +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +# CONFIG_CGROUP_DEBUG is not set +# CONFIG_CGROUP_FILES is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_SCHED_AUTOGROUP=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y +CONFIG_BPF_JIT_DEFAULT_ON=y +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y +CONFIG_PROFILING=y +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_HAS_CPU_RELAX=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXC is not set +CONFIG_ARCH_PHYTIUM=y +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_S32 is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +CONFIG_HAVE_LIVEPATCH_WO_FTRACE=y + +# +# Enable Livepatch +# +# CONFIG_LIVEPATCH is not set +# end of Enable Livepatch + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +CONFIG_CAVIUM_ERRATUM_22375=y +CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y +# CONFIG_HISILICON_ERRATUM_1980005 is not set +CONFIG_HISILICON_ERRATUM_162100801=y +CONFIG_HISILICON_ERRATUM_162100125=y +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +CONFIG_HISILICON_ERRATUM_HIP08_RU_PREFETCH=y +# CONFIG_HISILICON_HIP08_RU_PREFETCH_DEFAULT_OFF is not set +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SCHED_MC=y +# CONFIG_SCHED_CLUSTER is not set +CONFIG_SCHED_SMT=y +CONFIG_NR_CPUS=256 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM64_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_NUMA is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_LLC_128_LINE_SIZE=y +CONFIG_ARCH_HAS_FILTER_PGPROT=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y +CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_SPINLOCKS is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set +CONFIG_CRASH_DUMP=y +# CONFIG_ARM64_CPU_PARK is not set +CONFIG_XEN_DOM0=y +CONFIG_XEN=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_ARM64_PMEM_LEGACY is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +# CONFIG_AARCH32_EL0 is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_AS_HAS_LSE_ATOMICS=y +CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_USE_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_CNP=y +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +CONFIG_ARM64_AMU_EXTN=y +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +CONFIG_ARM64_BTI=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +CONFIG_ARCH_RANDOM=y +CONFIG_ARM64_AS_HAS_MTE=y +CONFIG_ARM64_MTE=y +# end of ARMv8.5 architectural features + +# +# ARMv8.6 architectural features +# +CONFIG_ARM64_TWED=y +# end of ARMv8.6 architectural features + +# +# ARMv8.7 architectural features +# +CONFIG_ARM64_EPAN=y +# end of ARMv8.7 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +# CONFIG_ASCEND_FEATURES is not set +# end of Kernel Features + +# +# Boot options +# +CONFIG_CMDLINE="" +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y +# end of Boot options + +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ENERGY_MODEL=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y +# end of ARM CPU Idle Drivers + +CONFIG_HALTPOLL_CPUIDLE=y +# end of CPU Idle + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_ARM_SCPI_CPUFREQ=y +CONFIG_ARM_SCMI_CPUFREQ=y +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +# CONFIG_FW_CFG_SYSFS is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_VARS_PSTORE=y +# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set +# CONFIG_EFI_FAKE_MEMMAP is not set +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ZBOOT=y +# CONFIG_EFI_ZBOOT_SIGNED is not set +CONFIG_EFI_ARMSTUB_DTB_LOADER=y +# CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER is not set +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +CONFIG_EFI_CAPSULE_LOADER=y +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_EFI_EARLYCON=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +CONFIG_ARM_SMCCC_SOC_ID=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_ARCH_SUPPORTS_ACPI=y +# CONFIG_ACPI is not set +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_VIRTUALIZATION=y +# CONFIG_KVM is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA512_ARM64=m +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64_CE=m +CONFIG_CRYPTO_SHA3_ARM64=m +CONFIG_CRYPTO_SM3_ARM64_CE=m +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set +# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m +CONFIG_CRYPTO_CHACHA20_NEON=m +# CONFIG_CRYPTO_POLY1305_NEON is not set +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set +CONFIG_CRYPTO_AES_ARM64_BS=m + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_QUICK_KEXEC is not set +CONFIG_ARCH_WANT_RESERVE_CRASH_KERNEL=y +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_SHADOW_CALL_STACK=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +CONFIG_BLK_CMDLINE_PARSER=y +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set +# CONFIG_BLK_DEV_DUMPINFO is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_CMDLINE_PARTITION=y +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_ASN1=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_SPIN_TRYLOCK=y +CONFIG_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_INLINE_SPIN_LOCK=y +CONFIG_INLINE_SPIN_LOCK_BH=y +CONFIG_INLINE_SPIN_LOCK_IRQ=y +CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_INLINE_SPIN_UNLOCK_BH=y +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_READ_LOCK=y +CONFIG_INLINE_READ_LOCK_BH=y +CONFIG_INLINE_READ_LOCK_IRQ=y +CONFIG_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_BH=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_WRITE_LOCK=y +CONFIG_INLINE_WRITE_LOCK_BH=y +CONFIG_INLINE_WRITE_LOCK_IRQ=y +CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_BH=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +# CONFIG_HUGE_VMALLOC_DEFAULT_ENABLED is not set +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +# CONFIG_HWPOISON_INJECT is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_MEMCG_QOS=y +# CONFIG_ETMEM is not set +# CONFIG_PAGE_CACHE_LIMIT is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=19 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_FRAME_VECTOR=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# CONFIG_PIN_MEMORY is not set +# CONFIG_CLEAR_FREELIST_PAGE is not set +# CONFIG_EXTEND_HUGEPAGE_MAPPING is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_NETLABEL is not set +# CONFIG_MPTCP is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +# CONFIG_BRIDGE_NETFILTER is not set + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +# CONFIG_NF_CONNTRACK_PROCFS is not set +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_MASQUERADE=y +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +CONFIG_NETFILTER_XT_TARGET_LOG=m +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +CONFIG_IP6_NF_MANGLE=m +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +# CONFIG_IP6_NF_TARGET_NPT is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +# CONFIG_BRIDGE_MRP is not set +CONFIG_HAVE_NET_DSA=y +CONFIG_NET_DSA=m +# CONFIG_NET_DSA_TAG_AR9331 is not set +# CONFIG_NET_DSA_TAG_BRCM is not set +# CONFIG_NET_DSA_TAG_BRCM_PREPEND is not set +# CONFIG_NET_DSA_TAG_GSWIP is not set +# CONFIG_NET_DSA_TAG_DSA is not set +# CONFIG_NET_DSA_TAG_EDSA is not set +# CONFIG_NET_DSA_TAG_MTK is not set +# CONFIG_NET_DSA_TAG_KSZ is not set +# CONFIG_NET_DSA_TAG_RTL4_A is not set +CONFIG_NET_DSA_TAG_OCELOT=m +# CONFIG_NET_DSA_TAG_QCA is not set +# CONFIG_NET_DSA_TAG_LAN9303 is not set +# CONFIG_NET_DSA_TAG_SJA1105 is not set +# CONFIG_NET_DSA_TAG_TRAILER is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFB is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +CONFIG_NET_SCH_CBS=m +CONFIG_NET_SCH_ETF=m +CONFIG_NET_SCH_TAPRIO=m +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_DRR is not set +CONFIG_NET_SCH_MQPRIO=m +# CONFIG_NET_SCH_SKBPRIO is not set +# CONFIG_NET_SCH_CHOKE is not set +# CONFIG_NET_SCH_QFQ is not set +# CONFIG_NET_SCH_CODEL is not set +# CONFIG_NET_SCH_FQ_CODEL is not set +# CONFIG_NET_SCH_CAKE is not set +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_HHF is not set +# CONFIG_NET_SCH_PIE is not set +CONFIG_NET_SCH_INGRESS=m +# CONFIG_NET_SCH_PLUG is not set +# CONFIG_NET_SCH_ETS is not set +# CONFIG_NET_SCH_DEFAULT is not set + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +# CONFIG_NET_CLS_CGROUP is not set +# CONFIG_NET_CLS_BPF is not set +CONFIG_NET_CLS_FLOWER=m +# CONFIG_NET_CLS_MATCHALL is not set +# CONFIG_NET_EMATCH is not set +CONFIG_NET_CLS_ACT=y +# CONFIG_NET_ACT_POLICE is not set +CONFIG_NET_ACT_GACT=m +# CONFIG_GACT_PROB is not set +CONFIG_NET_ACT_MIRRED=m +# CONFIG_NET_ACT_SAMPLE is not set +# CONFIG_NET_ACT_IPT is not set +# CONFIG_NET_ACT_NAT is not set +# CONFIG_NET_ACT_PEDIT is not set +# CONFIG_NET_ACT_SIMP is not set +# CONFIG_NET_ACT_SKBEDIT is not set +# CONFIG_NET_ACT_CSUM is not set +# CONFIG_NET_ACT_MPLS is not set +# CONFIG_NET_ACT_VLAN is not set +# CONFIG_NET_ACT_BPF is not set +# CONFIG_NET_ACT_SKBMOD is not set +# CONFIG_NET_ACT_IFE is not set +# CONFIG_NET_ACT_TUNNEL_KEY is not set +CONFIG_NET_ACT_GATE=m +# CONFIG_NET_TC_SKB_EXT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +CONFIG_NET_SWITCHDEV=y +# CONFIG_NET_L3_MASTER_DEV is not set +CONFIG_QRTR=m +CONFIG_QRTR_SMD=m +CONFIG_QRTR_TUN=m +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_JIT=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +CONFIG_CAN_PHYTIUM=y +CONFIG_CAN_PHYTIUM_PLATFORM=y +CONFIG_CAN_PHYTIUM_PCI=m +# CONFIG_CAN_DEBUG_DEVICES is not set +# end of CAN Device Drivers + +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +# CONFIG_BT_BNEP_MC_FILTER is not set +# CONFIG_BT_BNEP_PROTO_FILTER is not set +CONFIG_BT_HIDP=m +# CONFIG_BT_HS is not set +# CONFIG_BT_LE is not set +# CONFIG_BT_MSFTEXT is not set +# CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_FEATURE_DEBUG is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=m +CONFIG_BT_BCM=m +CONFIG_BT_RTL=m +CONFIG_BT_HCIBTUSB=m +# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set +CONFIG_BT_HCIBTUSB_BCM=y +# CONFIG_BT_HCIBTUSB_MTK is not set +CONFIG_BT_HCIBTUSB_RTL=y +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_SERDEV=y +# CONFIG_BT_HCIUART_H4 is not set +# CONFIG_BT_HCIUART_NOKIA is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIUART_3WIRE=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_BCM is not set +# CONFIG_BT_HCIUART_RTL is not set +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIUART_MRVL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_BT_MTKSDIO is not set +# CONFIG_BT_MTKUART is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_GPIO is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_XEN is not set +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +CONFIG_NFC=m +# CONFIG_NFC_DIGITAL is not set +CONFIG_NFC_NCI=m +# CONFIG_NFC_NCI_SPI is not set +# CONFIG_NFC_NCI_UART is not set +# CONFIG_NFC_HCI is not set + +# +# Near Field Communication (NFC) devices +# +# CONFIG_NFC_FDP is not set +# CONFIG_NFC_PN533_USB is not set +# CONFIG_NFC_PN533_I2C is not set +# CONFIG_NFC_PN532_UART is not set +# CONFIG_NFC_MRVL_USB is not set +# CONFIG_NFC_ST_NCI_I2C is not set +# CONFIG_NFC_ST_NCI_SPI is not set +# CONFIG_NFC_NXP_NCI is not set +CONFIG_NFC_S3FWRN5=m +CONFIG_NFC_S3FWRN5_I2C=m +# end of Near Field Communication (NFC) devices + +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +CONFIG_FAILOVER=y +CONFIG_ETHTOOL_NETLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI_PCIE=y +# CONFIG_PCIEAER is not set +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_PF_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +CONFIG_PCI_PASID=y +CONFIG_PCI_LABEL=y +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_XILINX is not set +CONFIG_PCI_XGENE=y +CONFIG_PCI_XGENE_MSI=y +CONFIG_PCIE_ALTERA=y +CONFIG_PCIE_ALTERA_MSI=y +CONFIG_PCI_HOST_THUNDER_PEM=y +CONFIG_PCI_HOST_THUNDER_ECAM=y + +# +# DesignWare PCI Core Support +# +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCIE_DW_PLAT_EP is not set +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +CONFIG_PCIE_MOBIVEIL=y +CONFIG_PCIE_MOBIVEIL_HOST=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCIE_CADENCE_PLAT_EP is not set +# CONFIG_PCI_J721E_HOST is not set +# CONFIG_PCI_J721E_EP is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +CONFIG_PCI_ENDPOINT=y +CONFIG_PCI_ENDPOINT_CONFIGFS=y +CONFIG_PCI_EPF_TEST=m +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +# CONFIG_UEVENT_HELPER is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y +# CONFIG_FW_LOADER_COMPRESS is not set +CONFIG_FW_CACHE=y +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_SYS_HYPERVISOR=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SLIMBUS=m +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_SPMI=m +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_SOUNDWIRE=m +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +CONFIG_BRCMSTB_GISB_ARB=y +# CONFIG_MOXTET is not set +CONFIG_SIMPLE_PM_BUS=y +CONFIG_VEXPRESS_CONFIG=y +# CONFIG_MHI_BUS is not set +# end of Bus devices + +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_PHYSMAP_VERSATILE is not set +# CONFIG_MTD_PHYSMAP_GEMINI is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +# CONFIG_MTD_DATAFLASH_OTP is not set +# CONFIG_MTD_MCHP23K256 is not set +CONFIG_MTD_SST25L=y +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +CONFIG_MTD_NAND_CORE=y +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set +CONFIG_MTD_RAW_NAND=y +# CONFIG_MTD_NAND_ECC_SW_BCH is not set + +# +# Raw/parallel NAND flash controllers +# +CONFIG_MTD_NAND_DENALI=y +# CONFIG_MTD_NAND_DENALI_PCI is not set +CONFIG_MTD_NAND_DENALI_DT=y +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_MXIC is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_CADENCE is not set +# CONFIG_MTD_NAND_ARASAN is not set + +# +# Misc +# +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +CONFIG_MTD_NAND_ECC=y +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +CONFIG_SPI_PHYTIUM_QUADSPI=y +# CONFIG_MTD_UBI is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OF_RESOLVE=y +CONFIG_OF_OVERLAY=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_XEN_BLKDEV_FRONTEND=y +# CONFIG_XEN_BLKDEV_BACKEND is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=y +CONFIG_BLK_DEV_NVME=y +CONFIG_NVME_MULTIPATH=y +CONFIG_NVME_HWMON=y +CONFIG_NVME_FABRICS=y +CONFIG_NVME_FC=y +CONFIG_NVME_TCP=y +CONFIG_NVME_TARGET=y +CONFIG_NVME_TARGET_PASSTHRU=y +CONFIG_NVME_TARGET_LOOP=y +CONFIG_NVME_TARGET_FC=y +CONFIG_NVME_TARGET_FCLOOP=y +CONFIG_NVME_TARGET_TCP=y +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +CONFIG_PCI_ENDPOINT_TEST=m +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +CONFIG_UACCE=m +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +CONFIG_RAID_ATTRS=m +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=y +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_HISI_SAS is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +CONFIG_MEGARAID_SAS=y +# CONFIG_SCSI_3SNIC_SSSRAID is not set +CONFIG_SCSI_MPT3SAS=m +CONFIG_SCSI_MPT2SAS_MAX_SGE=128 +CONFIG_SCSI_MPT3SAS_MAX_SGE=128 +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +CONFIG_SCSI_UFSHCD=y +# CONFIG_SCSI_UFSHCD_PCI is not set +CONFIG_SCSI_UFSHCD_PLATFORM=y +# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +# CONFIG_SCSI_UFS_BSG is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_XEN_SCSI_FRONTEND is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=y +CONFIG_SATA_HOST=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_FORCE=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_CEVA=y +CONFIG_AHCI_XGENE=y +CONFIG_AHCI_QORIQ=y +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +CONFIG_SATA_SIL24=y +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_ZHAOXIN is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +CONFIG_PATA_PLATFORM=y +CONFIG_PATA_OF_PLATFORM=y +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID10 is not set +# CONFIG_MD_RAID456 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_UNSTRIPED is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set +CONFIG_DM_MIRROR=m +# CONFIG_DM_LOG_USERSPACE is not set +# CONFIG_DM_RAID is not set +CONFIG_DM_ZERO=m +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_IFB is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +# CONFIG_IPVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=y +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# Distributed Switch Architecture drivers +# +# CONFIG_B53 is not set +# CONFIG_NET_DSA_BCM_SF2 is not set +# CONFIG_NET_DSA_LOOP is not set +# CONFIG_NET_DSA_LANTIQ_GSWIP is not set +# CONFIG_NET_DSA_MT7530 is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set +# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MSCC_SEVILLE is not set +# CONFIG_NET_DSA_AR9331 is not set +# CONFIG_NET_DSA_SJA1105 is not set +# CONFIG_NET_DSA_QCA8K is not set +# CONFIG_NET_DSA_REALTEK_SMI is not set +# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set +# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +CONFIG_MDIO=m +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +# CONFIG_NET_VENDOR_3SNIC is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_AGERE=y +# CONFIG_ET131X is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +# CONFIG_ENA_ETHERNET is not set +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set +CONFIG_AMD_XGBE=y +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_AQTION is not set +CONFIG_NET_VENDOR_ARC=y +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +CONFIG_ATL1C=m +# CONFIG_ALX is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +CONFIG_BCMGENET=m +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set +CONFIG_BNX2X=m +CONFIG_BNX2X_SRIOV=y +# CONFIG_SYSTEMPORT is not set +# CONFIG_BNXT is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +CONFIG_NET_VENDOR_CADENCE=y +CONFIG_MACB=y +CONFIG_MACB_USE_HWSTAMP=y +CONFIG_MACB_PCI=y +CONFIG_NET_VENDOR_CAVIUM=y +CONFIG_THUNDER_NIC_PF=y +# CONFIG_THUNDER_NIC_VF is not set +CONFIG_THUNDER_NIC_BGX=y +CONFIG_THUNDER_NIC_RGX=y +# CONFIG_CAVIUM_PTP is not set +# CONFIG_LIQUIDIO is not set +# CONFIG_LIQUIDIO_VF is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +CONFIG_E1000=m +CONFIG_E1000E=m +CONFIG_IGB=m +CONFIG_IGB_HWMON=y +CONFIG_IGBVF=m +CONFIG_IXGB=m +CONFIG_IXGBE=m +CONFIG_IXGBE_HWMON=y +CONFIG_IXGBEVF=m +CONFIG_I40E=m +CONFIG_IAVF=m +CONFIG_I40EVF=m +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_IGC is not set +CONFIG_NET_VENDOR_NETSWIFT=y +# CONFIG_NGBE is not set +# CONFIG_TXGBE is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +CONFIG_MVMDIO=y +# CONFIG_SKGE is not set +CONFIG_SKY2=y +# CONFIG_SKY2_DEBUG is not set +# CONFIG_OCTEONTX2_AF is not set +# CONFIG_OCTEONTX2_PF is not set +# CONFIG_PRESTERA is not set +CONFIG_NET_VENDOR_MELLANOX=y +CONFIG_MLX4_EN=m +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +CONFIG_MLX4_CORE_GEN2=y +CONFIG_MLX5_CORE=m +# CONFIG_MLX5_FPGA is not set +CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_EN_ARFS=y +CONFIG_MLX5_EN_RXNFC=y +CONFIG_MLX5_MPFS=y +CONFIG_MLX5_ESWITCH=y +CONFIG_MLX5_CLS_ACT=y +# CONFIG_MLX5_CORE_IPOIB is not set +CONFIG_MLX5_SW_STEERING=y +# CONFIG_MLXSW_CORE is not set +# CONFIG_MLXFW is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_LAN743X is not set +CONFIG_NET_VENDOR_MICROSEMI=y +# CONFIG_MSCC_OCELOT_SWITCH is not set +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NATSEMI=y +# CONFIG_NATSEMI is not set +# CONFIG_NS83820 is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_8390=y +# CONFIG_NE2K_PCI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_QED is not set +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCA7000_SPI is not set +# CONFIG_QCA7000_UART is not set +CONFIG_QCOM_EMAC=m +CONFIG_RMNET=m +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R8169 is not set +CONFIG_NET_VENDOR_RENESAS=y +CONFIG_NET_VENDOR_ROCKER=y +# CONFIG_ROCKER is not set +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set +CONFIG_NET_VENDOR_SEEQ=y +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +CONFIG_NET_VENDOR_SMSC=y +CONFIG_SMC91X=y +# CONFIG_EPIC100 is not set +CONFIG_SMSC911X=y +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_PHYTIUM=y +# CONFIG_DWMAC_INTEL_PLAT is not set +# CONFIG_DWMAC_LOONGSON is not set +# CONFIG_STMMAC_PCI is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TI_CPSW_PHY_SEL is not set +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +CONFIG_NET_VENDOR_XILINX=y +# CONFIG_XILINX_AXI_EMAC is not set +# CONFIG_XILINX_LL_TEMAC is not set +# CONFIG_NET_VENDOR_NEBULA_MATRIX is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +CONFIG_AQUANTIA_PHY=y +# CONFIG_AX88796B_PHY is not set +CONFIG_BROADCOM_PHY=m +# CONFIG_BCM54140_PHY is not set +CONFIG_BCM7XXX_PHY=m +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +CONFIG_BCM_NET_PHYLIB=m +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +CONFIG_MARVELL_PHY=m +CONFIG_MARVELL_10G_PHY=m +CONFIG_MICREL_PHY=y +CONFIG_MICROCHIP_PHY=m +# CONFIG_MICROCHIP_T1_PHY is not set +CONFIG_MICROSEMI_PHY=y +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +CONFIG_AT803X_PHY=y +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=m +# CONFIG_RENESAS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +CONFIG_SMSC_PHY=m +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +CONFIG_VITESSE_PHY=y +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BCM_UNIMAC=m +CONFIG_MDIO_CAVIUM=y +# CONFIG_MDIO_GPIO is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +CONFIG_MDIO_THUNDER=y + +# +# MDIO Multiplexers +# +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y +CONFIG_MDIO_BUS_MUX_MMIOREG=y + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + +CONFIG_PPP=y +# CONFIG_PPP_BSDCOMP is not set +CONFIG_PPP_DEFLATE=y +# CONFIG_PPP_FILTER is not set +# CONFIG_PPP_MPPE is not set +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPPOE is not set +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +# CONFIG_SLIP is not set +CONFIG_SLHC=y +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SR9700 is not set +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +CONFIG_USB_NET_QMI_WWAN=y +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_ATH_COMMON=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +CONFIG_ATH10K=m +CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set +# CONFIG_ATH10K_SDIO is not set +# CONFIG_ATH10K_USB is not set +# CONFIG_ATH10K_DEBUG is not set +# CONFIG_ATH10K_DEBUGFS is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +# CONFIG_BRCMFMAC_USB is not set +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +CONFIG_MWIFIEX=m +# CONFIG_MWIFIEX_SDIO is not set +CONFIG_MWIFIEX_PCIE=m +# CONFIG_MWIFIEX_USB is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +# CONFIG_MT7663U is not set +# CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTW88 is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +CONFIG_WL18XX=m +CONFIG_WLCORE=m +# CONFIG_WLCORE_SPI is not set +CONFIG_WLCORE_SDIO=m +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +CONFIG_XEN_NETDEV_FRONTEND=y +# CONFIG_XEN_NETDEV_BACKEND is not set +# CONFIG_VMXNET3 is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_NET_LOCALIP_LST is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_FF_MEMLESS=y +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ADC=m +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_AXP20X_PEK is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_CMA3000 is not set +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_AMBAKMI=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_16550A_VARIANTS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_PHYTIUM_PCI=m +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +CONFIG_SERIAL_FSL_LINFLEXUART=y +CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +# CONFIG_HVC_DCC is not set +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +# CONFIG_TTY_PRINTK is not set +CONFIG_VIRTIO_CONSOLE=y +CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_DMI_DECODE=y +CONFIG_IPMI_PLAT_DATA=y +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SI=m +# CONFIG_IPMI_SSIF is not set +# CONFIG_IPMI_WATCHDOG is not set +# CONFIG_IPMI_POWEROFF is not set +# CONFIG_IPMB_DEVICE_INTERFACE is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +# CONFIG_HW_RANDOM_VIRTIO is not set +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +# CONFIG_RAW_DRIVER is not set +CONFIG_DEVPORT=y +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +# CONFIG_TCG_TIS is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_XEN is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +# CONFIG_XILLYBUS is not set +CONFIG_RANDOM_TRUST_CPU=y +CONFIG_RANDOM_TRUST_BOOTLOADER=y +# end of Character devices + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_SMBUS=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=y +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +CONFIG_I2C_GPIO=m +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set +# CONFIG_I2C_HISI is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set +CONFIG_I2C_PHYTIUM_CORE=y +CONFIG_I2C_PHYTIUM_PCI=y +CONFIG_I2C_PHYTIUM_PLATFORM=y + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_CROS_EC_TUNNEL is not set +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +CONFIG_I2C_SLAVE=y +# CONFIG_I2C_SLAVE_EEPROM is not set +# CONFIG_I2C_SLAVE_TESTUNIT is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +CONFIG_I3C=y +CONFIG_CDNS_I3C_MASTER=y +# CONFIG_DW_I3C_MASTER is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BITBANG=m +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_PHYTIUM=y +CONFIG_SPI_PHYTIUM_PLAT=y +CONFIG_SPI_PHYTIUM_PCI=y +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_DYNAMIC=y +CONFIG_SPMI=y +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set +# CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_HISI is not set +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AXP209 is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +CONFIG_PINCTRL_MAX77620=y +# CONFIG_PINCTRL_RK805 is not set +# CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_PHYTIUM_CORE=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +CONFIG_GPIO_ALTERA=m +# CONFIG_GPIO_CADENCE is not set +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +CONFIG_GPIO_MB86S7X=y +CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_WCD934X=m +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +CONFIG_GPIO_PHYTIUM_PLAT=y +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +CONFIG_GPIO_MAX732X=y +# CONFIG_GPIO_MAX732X_IRQ is not set +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +CONFIG_GPIO_BD9571MWV=m +CONFIG_GPIO_MAX77620=y +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +CONFIG_W1=m + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_MATROX is not set +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS2482 is not set +# CONFIG_W1_MASTER_DS1WM is not set +# CONFIG_W1_MASTER_GPIO is not set +# CONFIG_W1_MASTER_SGI is not set +# end of 1-wire Bus Masters + +# +# 1-wire Slaves +# +CONFIG_W1_SLAVE_THERM=m +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2405 is not set +# CONFIG_W1_SLAVE_DS2408 is not set +# CONFIG_W1_SLAVE_DS2413 is not set +# CONFIG_W1_SLAVE_DS2406 is not set +# CONFIG_W1_SLAVE_DS2423 is not set +# CONFIG_W1_SLAVE_DS2805 is not set +# CONFIG_W1_SLAVE_DS2430 is not set +# CONFIG_W1_SLAVE_DS2431 is not set +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2438 is not set +# CONFIG_W1_SLAVE_DS250X is not set +# CONFIG_W1_SLAVE_DS2780 is not set +# CONFIG_W1_SLAVE_DS2781 is not set +# CONFIG_W1_SLAVE_DS28E04 is not set +# CONFIG_W1_SLAVE_DS28E17 is not set +# end of 1-wire Slaves + +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_BRCMSTB=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_VEXPRESS is not set +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_SBS=m +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set +CONFIG_BATTERY_BQ27XXX=y +CONFIG_BATTERY_BQ27XXX_I2C=y +CONFIG_BATTERY_BQ27XXX_HDQ=m +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +# CONFIG_AXP20X_POWER is not set +# CONFIG_AXP288_FUEL_GAUGE is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1721X is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_CROS_USBPD is not set +# CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM1177 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set +CONFIG_SENSORS_ARM_SCMI=y +CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CORSAIR_CPRO is not set +# CONFIG_SENSORS_DRIVETEMP is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IBMAEM is not set +# CONFIG_SENSORS_IBMPEX is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +CONFIG_SENSORS_PWM_FAN=m +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +CONFIG_SENSORS_INA2XX=m +CONFIG_SENSORS_INA3221=m +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VEXPRESS is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_FREQ_THERMAL=y +# CONFIG_DEVFREQ_THERMAL is not set +CONFIG_THERMAL_EMULATION=y +# CONFIG_THERMAL_MMIO is not set +# CONFIG_MAX77620_THERMAL is not set +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +CONFIG_ARM_SP805_WATCHDOG=y +CONFIG_ARM_SBSA_WATCHDOG=y +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MAX77620_WATCHDOG is not set +CONFIG_ARM_SMC_WATCHDOG=y +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set +# CONFIG_XEN_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +CONFIG_MFD_BD9571MWV=y +CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=y +CONFIG_MFD_CROS_EC_DEV=y +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +CONFIG_MFD_HI6421_PMIC=y +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_INTEL_PMT is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +CONFIG_MFD_MAX77620=y +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_MFD_ROHM_BD718XX=y +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +CONFIG_MFD_WCD934X=m +CONFIG_MFD_VEXPRESS_SYSREG=y +# CONFIG_RAVE_SP_CORE is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_BD718XX=y +CONFIG_REGULATOR_BD9571MWV=y +# CONFIG_REGULATOR_CROS_EC is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +# CONFIG_REGULATOR_FAN53880 is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_HI6421 is not set +CONFIG_REGULATOR_HI6421V530=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_MAX77620=y +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +CONFIG_REGULATOR_MAX8973=y +# CONFIG_REGULATOR_MAX77826 is not set +# CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set +# CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set +# CONFIG_REGULATOR_MPQ7920 is not set +# CONFIG_REGULATOR_MT6311 is not set +CONFIG_REGULATOR_PCA9450=y +CONFIG_REGULATOR_PFUZE100=y +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_SPMI=y +# CONFIG_REGULATOR_QCOM_USB_VBUS is not set +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set +CONFIG_REGULATOR_RK808=y +CONFIG_REGULATOR_ROHM=y +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set +# CONFIG_REGULATOR_S2MPA01 is not set +CONFIG_REGULATOR_S2MPS11=y +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set +# CONFIG_REGULATOR_SY8827N is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_VCTRL=m +# CONFIG_REGULATOR_VEXPRESS is not set +# CONFIG_REGULATOR_QCOM_LABIBB is not set +CONFIG_RC_CORE=m +CONFIG_RC_MAP=m +# CONFIG_LIRC is not set +CONFIG_RC_DECODERS=y +# CONFIG_IR_NEC_DECODER is not set +# CONFIG_IR_RC5_DECODER is not set +# CONFIG_IR_RC6_DECODER is not set +# CONFIG_IR_JVC_DECODER is not set +# CONFIG_IR_SONY_DECODER is not set +# CONFIG_IR_SANYO_DECODER is not set +# CONFIG_IR_SHARP_DECODER is not set +# CONFIG_IR_MCE_KBD_DECODER is not set +# CONFIG_IR_XMP_DECODER is not set +# CONFIG_IR_IMON_DECODER is not set +# CONFIG_IR_RCMM_DECODER is not set +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_IMON_RAW is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +# CONFIG_IR_GPIO_CIR is not set +# CONFIG_IR_SERIAL is not set +# CONFIG_IR_SIR is not set +# CONFIG_RC_XBOX_DVD is not set +# CONFIG_IR_TOY is not set +CONFIG_CEC_CORE=m +CONFIG_CEC_NOTIFIER=y +# CONFIG_MEDIA_CEC_RC is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_SUPPORT_FILTER=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +# CONFIG_MEDIA_RADIO_SUPPORT is not set +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +# CONFIG_MEDIA_TEST_SUPPORT is not set +# end of Media device types + +CONFIG_VIDEO_DEV=m +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=m + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_V4L2_FWNODE=m +# end of Video4Linux options + +# +# Media controller options +# +# CONFIG_MEDIA_CONTROLLER_DVB is not set +# end of Media controller options + +# +# Digital TV options +# +# CONFIG_DVB_MMAP is not set +# CONFIG_DVB_NET is not set +CONFIG_DVB_MAX_ADAPTERS=16 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options + +# +# Media drivers +# + +# +# Drivers filtered as selected at 'Filter media drivers' +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set + +# +# Analog/digital TV USB devices +# +# CONFIG_VIDEO_AU0828 is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_TM6000 is not set + +# +# Digital TV USB devices +# +# CONFIG_DVB_USB is not set +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set + +# +# Software defined radio USB devices +# +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_V4L2=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_VMALLOC=m +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_CADENCE is not set +# CONFIG_VIDEO_ASPEED is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_VIDEO_XILINX is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set +CONFIG_SDR_PLATFORM_DRIVERS=y + +# +# MMC/SDIO DVB adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# end of Media drivers + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y + +# +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' +# +CONFIG_VIDEO_IR_I2C=m + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA1997X is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set +# CONFIG_VIDEO_MAX9286 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set +# end of Video decoders + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips + +# +# Camera sensor devices +# +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +CONFIG_VIDEO_IMX219=m +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV5640 is not set +CONFIG_VIDEO_OV5645=m +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set +# end of SPI helper chips + +# +# Media SPI Adapters +# +# CONFIG_CXD2880_SPI_DRV is not set +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=m + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +# CONFIG_MEDIA_TUNER_TDA18250 is not set +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MSI001 is not set +CONFIG_MEDIA_TUNER_MT20XX=m +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2063 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +CONFIG_MEDIA_TUNER_MC44S803=m +# CONFIG_MEDIA_TUNER_MAX2165 is not set +# CONFIG_MEDIA_TUNER_TDA18218 is not set +# CONFIG_MEDIA_TUNER_FC0011 is not set +# CONFIG_MEDIA_TUNER_FC0012 is not set +# CONFIG_MEDIA_TUNER_FC0013 is not set +# CONFIG_MEDIA_TUNER_TDA18212 is not set +# CONFIG_MEDIA_TUNER_E4000 is not set +# CONFIG_MEDIA_TUNER_FC2580 is not set +# CONFIG_MEDIA_TUNER_M88RS6000T is not set +# CONFIG_MEDIA_TUNER_TUA9001 is not set +# CONFIG_MEDIA_TUNER_SI2157 is not set +# CONFIG_MEDIA_TUNER_IT913X is not set +# CONFIG_MEDIA_TUNER_R820T is not set +# CONFIG_MEDIA_TUNER_MXL301RF is not set +# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set +# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set +# end of Customize TV tuners + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +# CONFIG_DVB_STB0899 is not set +# CONFIG_DVB_STB6100 is not set +# CONFIG_DVB_STV090x is not set +# CONFIG_DVB_STV0910 is not set +# CONFIG_DVB_STV6110x is not set +# CONFIG_DVB_STV6111 is not set +# CONFIG_DVB_MXL5XX is not set +# CONFIG_DVB_M88DS3103 is not set + +# +# Multistandard (cable + terrestrial) frontends +# +# CONFIG_DVB_DRXK is not set +# CONFIG_DVB_TDA18271C2DD is not set +# CONFIG_DVB_SI2165 is not set +# CONFIG_DVB_MN88472 is not set +# CONFIG_DVB_MN88473 is not set + +# +# DVB-S (satellite) frontends +# +# CONFIG_DVB_CX24110 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_ZL10036 is not set +# CONFIG_DVB_ZL10039 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_STV0288 is not set +# CONFIG_DVB_STB6000 is not set +# CONFIG_DVB_STV0299 is not set +# CONFIG_DVB_STV6110 is not set +# CONFIG_DVB_STV0900 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_TDA8261 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_TUNER_CX24113 is not set +# CONFIG_DVB_TDA826X is not set +# CONFIG_DVB_TUA6100 is not set +# CONFIG_DVB_CX24116 is not set +# CONFIG_DVB_CX24117 is not set +# CONFIG_DVB_CX24120 is not set +# CONFIG_DVB_SI21XX is not set +# CONFIG_DVB_TS2020 is not set +# CONFIG_DVB_DS3000 is not set +# CONFIG_DVB_MB86A16 is not set +# CONFIG_DVB_TDA10071 is not set + +# +# DVB-T (terrestrial) frontends +# +# CONFIG_DVB_SP8870 is not set +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set +# CONFIG_DVB_S5H1432 is not set +# CONFIG_DVB_DRXD is not set +# CONFIG_DVB_L64781 is not set +# CONFIG_DVB_TDA1004X is not set +# CONFIG_DVB_NXT6000 is not set +# CONFIG_DVB_MT352 is not set +# CONFIG_DVB_ZL10353 is not set +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +# CONFIG_DVB_DIB7000M is not set +# CONFIG_DVB_DIB7000P is not set +# CONFIG_DVB_DIB9000 is not set +# CONFIG_DVB_TDA10048 is not set +# CONFIG_DVB_AF9013 is not set +# CONFIG_DVB_EC100 is not set +# CONFIG_DVB_STV0367 is not set +# CONFIG_DVB_CXD2820R is not set +# CONFIG_DVB_CXD2841ER is not set +# CONFIG_DVB_RTL2830 is not set +# CONFIG_DVB_RTL2832 is not set +# CONFIG_DVB_RTL2832_SDR is not set +# CONFIG_DVB_SI2168 is not set +# CONFIG_DVB_ZD1301_DEMOD is not set +# CONFIG_DVB_CXD2880 is not set + +# +# DVB-C (cable) frontends +# +# CONFIG_DVB_VES1820 is not set +# CONFIG_DVB_TDA10021 is not set +# CONFIG_DVB_TDA10023 is not set +# CONFIG_DVB_STV0297 is not set + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_DVB_LGDT3305 is not set +# CONFIG_DVB_LGDT3306A is not set +# CONFIG_DVB_LG2160 is not set +# CONFIG_DVB_S5H1409 is not set +# CONFIG_DVB_AU8522_DTV is not set +# CONFIG_DVB_AU8522_V4L is not set +# CONFIG_DVB_S5H1411 is not set + +# +# ISDB-T (terrestrial) frontends +# +# CONFIG_DVB_S921 is not set +# CONFIG_DVB_DIB8000 is not set +# CONFIG_DVB_MB86A20S is not set + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +# CONFIG_DVB_TC90522 is not set +# CONFIG_DVB_MN88443X is not set + +# +# Digital terrestrial only tuners/PLL +# +# CONFIG_DVB_PLL is not set +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set + +# +# SEC control devices for DVB-S +# +# CONFIG_DVB_DRX39XYJ is not set +# CONFIG_DVB_LNBH25 is not set +# CONFIG_DVB_LNBH29 is not set +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_LNBP22 is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set +# CONFIG_DVB_ISL6423 is not set +# CONFIG_DVB_A8293 is not set +# CONFIG_DVB_LGS8GL5 is not set +# CONFIG_DVB_LGS8GXX is not set +# CONFIG_DVB_ATBM8830 is not set +# CONFIG_DVB_TDA665x is not set +# CONFIG_DVB_IX2505V is not set +# CONFIG_DVB_M88RS2000 is not set +# CONFIG_DVB_AF9033 is not set +# CONFIG_DVB_HORUS3A is not set +# CONFIG_DVB_ASCOT2E is not set +# CONFIG_DVB_HELENE is not set + +# +# Common Interface (EN50221) controller drivers +# +# CONFIG_DVB_CXD2099 is not set +# CONFIG_DVB_SP2 is not set +# end of Customise DVB Frontends +# end of Media ancillary drivers + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_DRM=y +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y +CONFIG_DRM_VM=y + +# +# I2C encoder or helper chips +# +CONFIG_DRM_I2C_CH7006=m +CONFIG_DRM_I2C_SIL164=m +CONFIG_DRM_I2C_NXP_TDA998X=m +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set +CONFIG_DRM_MALI_DISPLAY=m +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +CONFIG_DRM_RCAR_DW_HDMI=m +CONFIG_DRM_RCAR_LVDS=m +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set +# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set +CONFIG_DRM_PANEL_LVDS=m +CONFIG_DRM_PANEL_SIMPLE=m +# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set +# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set +# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +CONFIG_DRM_PANEL_RAYDIUM_RM67191=m +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set +CONFIG_DRM_PANEL_SITRONIX_ST7703=m +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +CONFIG_DRM_DISPLAY_CONNECTOR=m +CONFIG_DRM_LONTIUM_LT9611=m +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +CONFIG_DRM_NWL_MIPI_DSI=m +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SIL_SII8620 is not set +CONFIG_DRM_SII902X=m +# CONFIG_DRM_SII9234 is not set +CONFIG_DRM_SIMPLE_BRIDGE=m +CONFIG_DRM_THINE_THC63LVD1024=m +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_TFP410 is not set +CONFIG_DRM_TI_SN65DSI86=m +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +CONFIG_DRM_I2C_ADV7511=m +CONFIG_DRM_I2C_ADV7511_AUDIO=y +CONFIG_DRM_I2C_ADV7511_CEC=y +# CONFIG_DRM_CDNS_MHDP8546 is not set +CONFIG_DRM_DW_HDMI=m +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m +CONFIG_DRM_DW_HDMI_I2S_AUDIO=m +CONFIG_DRM_DW_HDMI_CEC=m +# end of Display Interface Bridges + +# CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_MXSFB is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_DRM_PL111 is not set +# CONFIG_DRM_XEN is not set +# CONFIG_DRM_LIMA is not set +# CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_TIDSS is not set +CONFIG_DRM_PHYTIUM=y +CONFIG_DRM_LEGACY=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +CONFIG_FB_EFI=y +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_XEN_FBDEV_FRONTEND=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +CONFIG_BACKLIGHT_PWM=m +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +CONFIG_BACKLIGHT_LP855X=m +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# end of Backlight & LCD device support + +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +# end of Graphics support + +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +# CONFIG_SND_HDA_INTEL is not set +# end of HD-Audio + +CONFIG_SND_HDA_PREALLOC_SIZE=64 +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +CONFIG_SND_SOC_FSL_SAI=m +# CONFIG_SND_SOC_FSL_MQS is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_MTK_BTCVSD is not set +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_ADAU7118_HW is not set +# CONFIG_SND_SOC_ADAU7118_I2C is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +CONFIG_SND_SOC_CROS_EC_CODEC=m +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4234 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_DA7213 is not set +CONFIG_SND_SOC_DMIC=m +CONFIG_SND_SOC_HDMI_CODEC=m +CONFIG_SND_SOC_ES7134=m +CONFIG_SND_SOC_ES7241=m +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +CONFIG_SND_SOC_MAX98357A=m +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +CONFIG_SND_SOC_MAX98927=m +# CONFIG_SND_SOC_MAX98373_I2C is not set +# CONFIG_SND_SOC_MAX98373_SDW is not set +# CONFIG_SND_SOC_MAX98390 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +CONFIG_SND_SOC_PCM3168A=m +CONFIG_SND_SOC_PCM3168A_I2C=m +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RT1308_SDW is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_RT5682_SDW is not set +# CONFIG_SND_SOC_RT700_SDW is not set +# CONFIG_SND_SOC_RT711_SDW is not set +# CONFIG_SND_SOC_RT715_SDW is not set +# CONFIG_SND_SOC_SGTL5000 is not set +CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +CONFIG_SND_SOC_SPDIF=m +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set +# CONFIG_SND_SOC_TAS2770 is not set +# CONFIG_SND_SOC_TAS5086 is not set +CONFIG_SND_SOC_TAS571X=m +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WCD9335 is not set +CONFIG_SND_SOC_WCD934X=m +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +CONFIG_SND_SOC_WM8904=m +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +CONFIG_SND_SOC_WSA881X=m +# CONFIG_SND_SOC_ZL38060 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_MT6660 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8822 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# end of CODEC drivers + +CONFIG_SND_SIMPLE_CARD_UTILS=y +CONFIG_SND_SIMPLE_CARD=y +CONFIG_SND_AUDIO_GRAPH_CARD=y +# CONFIG_SND_XEN_FRONTEND is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=y +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +CONFIG_HID_APPLE=y +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +CONFIG_HID_BELKIN=y +# CONFIG_HID_BETOP_FF is not set +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +CONFIG_HID_CYPRESS=y +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +CONFIG_HID_EZKEY=y +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +CONFIG_HID_ITE=y +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +CONFIG_HID_REDRAGON=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set +# end of USB HID support + +# +# I2C HID support +# +CONFIG_I2C_HID=m +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USB_CONN_GPIO=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +# CONFIG_USB_OTG_FSM is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +# CONFIG_USB_MON is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +CONFIG_USB_MUSB_HDRC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y + +# +# Platform Glue Layer +# + +# +# MUSB DMA mode +# +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_ULPI is not set +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_HAPS=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_PCI=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_CHIPIDEA_GENERIC=y +CONFIG_USB_CHIPIDEA_TEGRA=y +CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_ISP1761_UDC=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_DUAL_ROLE=y + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +CONFIG_USB_SERIAL_CH341=y +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=m +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +CONFIG_USB_HSIC_USB3503=y +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +CONFIG_NOP_USB_XCEIV=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +CONFIG_USB_SNP_CORE=y +CONFIG_USB_SNP_UDC_PLAT=y +# CONFIG_USB_M66592 is not set +CONFIG_USB_BDC_UDC=y + +# +# Platform Support +# +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=m +CONFIG_USB_F_ACM=m +CONFIG_USB_U_SERIAL=m +CONFIG_USB_U_ETHER=m +CONFIG_USB_F_SERIAL=m +CONFIG_USB_F_OBEX=m +CONFIG_USB_F_NCM=m +CONFIG_USB_F_ECM=m +CONFIG_USB_F_EEM=m +CONFIG_USB_F_SUBSET=m +CONFIG_USB_F_RNDIS=m +CONFIG_USB_F_MASS_STORAGE=m +CONFIG_USB_F_FS=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +# CONFIG_USB_CONFIGFS_F_UVC is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + +CONFIG_TYPEC=m +CONFIG_TYPEC_TCPM=m +# CONFIG_TYPEC_TCPCI is not set +CONFIG_TYPEC_FUSB302=m +# CONFIG_TYPEC_UCSI is not set +CONFIG_TYPEC_HD3SS3220=m +# CONFIG_TYPEC_TPS6598X is not set +# CONFIG_TYPEC_STUSB160X is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +# CONFIG_TYPEC_MUX_PI3USB30532 is not set +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +# CONFIG_TYPEC_DP_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_STM32_SDMMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_F_SDH30=y +# CONFIG_MMC_SDHCI_MILBEAUT is not set +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set +CONFIG_MMC_DW_EXYNOS=y +CONFIG_MMC_DW_HI3798CV200=y +CONFIG_MMC_DW_K3=y +# CONFIG_MMC_DW_PCI is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +CONFIG_MMC_SDHCI_XENON=y +# CONFIG_MMC_SDHCI_OMAP is not set +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MMC_PHYTIUM_SDCI=y +CONFIG_MMC_PHYTIUM_MCI_PCI=y +CONFIG_MMC_PHYTIUM_MCI_PLTFM=y +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_XGENE is not set +# CONFIG_EDAC_DMC520 is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +CONFIG_RTC_DRV_DS1307=m +# CONFIG_RTC_DRV_DS1307_CENTURY is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_RK808=m +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +CONFIG_RTC_DRV_PCF85363=m +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +CONFIG_RTC_DRV_RX8581=m +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +CONFIG_RTC_DRV_RV8803=m +CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS3232_HWMON=y +CONFIG_RTC_DRV_PCF2127=m +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set +CONFIG_RTC_DRV_CROS_EC=y + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +CONFIG_RTC_DRV_PL031=y +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +CONFIG_BCM_SBA_RAID=m +# CONFIG_DW_AXI_DMAC is not set +CONFIG_FSL_EDMA=y +# CONFIG_FSL_QDMA is not set +# CONFIG_HISI_DMA is not set +# CONFIG_INTEL_IDMA64 is not set +CONFIG_MV_XOR_V2=y +CONFIG_PL330_DMA=y +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set +# CONFIG_SF_PDMA is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +CONFIG_UIO=m +CONFIG_UIO_CIF=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_DMEM_GENIRQ=m +CONFIG_UIO_AEC=m +CONFIG_UIO_SERCOS3=m +CONFIG_UIO_PCI_GENERIC=m +CONFIG_UIO_NETX=m +CONFIG_UIO_PRUSS=m +CONFIG_UIO_MF624=m +CONFIG_VFIO_IOMMU_TYPE1=y +CONFIG_VFIO_VIRQFD=y +CONFIG_VFIO=y +# CONFIG_VFIO_NOIOMMU is not set +CONFIG_VFIO_PCI=y +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +# CONFIG_VFIO_PLATFORM is not set +# CONFIG_VFIO_MDEV is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# +# Xen driver support +# +CONFIG_XEN_BALLOON=y +CONFIG_XEN_SCRUB_PAGES_DEFAULT=y +CONFIG_XEN_DEV_EVTCHN=y +CONFIG_XEN_BACKEND=y +CONFIG_XENFS=y +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_XENBUS_FRONTEND=y +CONFIG_XEN_GNTDEV=y +CONFIG_XEN_GRANT_DEV_ALLOC=y +# CONFIG_XEN_GRANT_DMA_ALLOC is not set +CONFIG_SWIOTLB_XEN=y +# CONFIG_XEN_PVCALLS_FRONTEND is not set +# CONFIG_XEN_PVCALLS_BACKEND is not set +CONFIG_XEN_PRIVCMD=y +CONFIG_XEN_EFI=y +CONFIG_XEN_AUTO_XLATE=y +# end of Xen driver support + +# CONFIG_GREYBUS is not set +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# CONFIG_AD7280 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set +# end of Active energy metering IC + +# +# Resolver to digital converters +# +# CONFIG_AD2S1210 is not set +# end of Resolver to digital converters +# end of IIO staging drivers + +# CONFIG_FB_SM750 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# end of Android + +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_KS7010 is not set +# CONFIG_PI433 is not set + +# +# Gasket devices +# +# CONFIG_STAGING_GASKET_FRAMEWORK is not set +# end of Gasket devices + +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_FIELDBUS_DEV is not set +# CONFIG_KPC2000 is not set +# CONFIG_QLGE is not set +# CONFIG_WFX is not set +# CONFIG_SPMI_HISI3670 is not set +# CONFIG_MFD_HI6421_SPMI is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +CONFIG_CROS_EC=y +CONFIG_CROS_EC_I2C=y +# CONFIG_CROS_EC_RPMSG is not set +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_PROTO=y +CONFIG_CROS_EC_CHARDEV=m +CONFIG_CROS_EC_LIGHTBAR=y +CONFIG_CROS_EC_VBC=y +CONFIG_CROS_EC_DEBUGFS=y +CONFIG_CROS_EC_SENSORHUB=y +CONFIG_CROS_EC_SYSFS=y +CONFIG_CROS_EC_TYPEC=m +CONFIG_CROS_USBPD_NOTIFY=y +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_LOONGARCH_PLATFORM_DEVICES=y +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX77686 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_SCMI is not set +CONFIG_COMMON_CLK_SCPI=y +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_S2MPS11=y +CONFIG_CLK_QORIQ=y +CONFIG_COMMON_CLK_XGENE=y +CONFIG_COMMON_CLK_PWM=y +CONFIG_COMMON_CLK_VC5=y +CONFIG_COMMON_CLK_BD718XX=m +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_HWSPINLOCK=y + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +CONFIG_MAILBOX=y +CONFIG_ARM_MHU=y +CONFIG_PLATFORM_MHU=y +# CONFIG_PL320_MBOX is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_PHYTIUM_MBOX=y +CONFIG_IOMMU_IOVA=y +CONFIG_IOASID=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ARM_SMMU=y +# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set +CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y +CONFIG_ARM_SMMU_V3=y +# CONFIG_ARM_SMMU_V3_SVA is not set +# CONFIG_AGENT_SMMU_ATOS is not set +# CONFIG_ARM_SMMU_V3_PM is not set +# CONFIG_VIRTIO_IOMMU is not set +# CONFIG_SMMU_BYPASS_DEV is not set + +# +# Remoteproc drivers +# +CONFIG_REMOTEPROC=y +CONFIG_REMOTEPROC_CDEV=y +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +CONFIG_RPMSG=y +CONFIG_RPMSG_CHAR=m +CONFIG_RPMSG_QCOM_GLINK=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +CONFIG_SOUNDWIRE=m + +# +# SoundWire Devices +# +CONFIG_SOUNDWIRE_QCOM=m + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +CONFIG_SOC_BRCMSTB=y +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +# CONFIG_FSL_RCPM is not set +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +CONFIG_SOC_TI=y + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers + +# +# Hisilicon SoC driver support +# +# end of Hisilicon SoC driver support +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +CONFIG_EXTCON_PTN5150=m +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +CONFIG_EXTCON_USB_GPIO=y +CONFIG_EXTCON_USBC_CROS_EC=y +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set +# CONFIG_IIO_TRIGGERED_EVENT is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMA400 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7091R5 is not set +# CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7292 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_ADI_AXI_ADC is not set +# CONFIG_AXP20X_ADC is not set +# CONFIG_AXP288_ADC is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2496 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set +# CONFIG_MAX1363 is not set +CONFIG_MAX9611=m +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +# CONFIG_NAU7802 is not set +CONFIG_QCOM_VADC_COMMON=m +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +CONFIG_QCOM_SPMI_ADC5=m +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set +# end of Amplifiers + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_PMS7003 is not set +# CONFIG_SCD30_CORE is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +CONFIG_IIO_CROS_EC_SENSORS_CORE=m +CONFIG_IIO_CROS_EC_SENSORS=m +# CONFIG_IIO_CROS_EC_SENSORS_LID_ANGLE is not set + +# +# Hid Sensor IIO Common +# +# end of Hid Sensor IIO Common + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_FXOS8700_I2C is not set +# CONFIG_FXOS8700_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_ICM42600_I2C is not set +# CONFIG_INV_ICM42600_SPI is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +CONFIG_IIO_CROS_EC_LIGHT_PROX=m +# CONFIG_GP2AP002 is not set +# CONFIG_GP2AP020A00F is not set +CONFIG_SENSORS_ISL29018=m +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6030 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +# CONFIG_IIO_SYSFS_TRIGGER is not set +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +CONFIG_IIO_CROS_EC_BARO=m +# CONFIG_DLHL60D is not set +# CONFIG_DPS310 is not set +# CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +CONFIG_MPL3115=m +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_PING is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +# CONFIG_LTC2983 is not set +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set +CONFIG_PWM_CROS_EC=m +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_ARM_GIC_PHYTIUM_2500=y +# CONFIG_AL_FIC is not set +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SCMI=y +# CONFIG_RESET_TI_SYSCON is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PHY_MIPI_DPHY=y +CONFIG_PHY_XGENE=y +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +CONFIG_PHY_FSL_IMX8MQ_USB=y +CONFIG_PHY_MIXEL_MIPI_DPHY=m +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +CONFIG_PHY_QCOM_USB_HS=y +# CONFIG_PHY_QCOM_USB_HSIC is not set +CONFIG_PHY_SAMSUNG_USB2=y +# CONFIG_PHY_TUSB1210 is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +# CONFIG_HISI_PCIE_PMU is not set +# CONFIG_HNS3_PMU is not set +# end of Performance monitor support + +CONFIG_RAS=y +# CONFIG_USB4 is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# end of Android + +# +# Vendor Hooks +# +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +# CONFIG_NVMEM_SPMI_SDAM is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# CONFIG_HISI_PTT is not set +# end of HW tracing support + +CONFIG_FPGA=y +# CONFIG_ALTERA_PR_IP_CORE is not set +# CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set +# CONFIG_FPGA_MGR_ALTERA_CVP is not set +# CONFIG_FPGA_MGR_XILINX_SPI is not set +# CONFIG_FPGA_MGR_ICE40_SPI is not set +# CONFIG_FPGA_MGR_MACHXO2_SPI is not set +CONFIG_FPGA_BRIDGE=m +CONFIG_ALTERA_FREEZE_BRIDGE=m +# CONFIG_XILINX_PR_DECOUPLER is not set +CONFIG_FPGA_REGION=m +CONFIG_OF_FPGA_REGION=m +# CONFIG_FPGA_DFL is not set +# CONFIG_FSI is not set +# CONFIG_TEE is not set +CONFIG_MULTIPLEXER=y + +# +# Multiplexer drivers +# +# CONFIG_MUX_ADG792A is not set +# CONFIG_MUX_ADGS1408 is not set +# CONFIG_MUX_GPIO is not set +CONFIG_MUX_MMIO=y +# end of Multiplexer drivers + +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +CONFIG_SLIMBUS=m +CONFIG_SLIM_QCOM_CTRL=m +CONFIG_INTERCONNECT=y +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set +# CONFIG_ROH is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +# CONFIG_EXT4_MITIGATION_FALSE_SHARING is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +# CONFIG_VIRTIO_FS is not set +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_VMCORE=y +# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +# CONFIG_TMPFS_INODE64 is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set +# CONFIG_DYNAMIC_HUGETLB is not set +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y +CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y +CONFIG_SQUASHFS_EMBEDDED=y +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +# CONFIG_PSTORE_CONSOLE is not set +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_RAM is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=y +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +# CONFIG_NFS_V4_2_READ_PLUS is not set +CONFIG_NFSD=y +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFSD_PNFS=y +CONFIG_NFSD_BLOCKLAYOUT=y +CONFIG_NFSD_SCSILAYOUT=y +CONFIG_NFSD_FLEXFILELAYOUT=y +CONFIG_NFSD_V4_2_INTER_SSC=y +CONFIG_NFSD_V4_SECURITY_LABEL=y +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_SMB_SERVER is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +# CONFIG_9P_FS_POSIX_ACL is not set +# CONFIG_9P_FS_SECURITY is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_UNICODE is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +# CONFIG_SECURITY_YAMA is not set +# CONFIG_SECURITY_SAFESETID is not set +# CONFIG_SECURITY_LOCKDOWN_LSM is not set +# CONFIG_SECURITY_LANDLOCK is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +CONFIG_INTEGRITY_AUDIT=y +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y +# CONFIG_INIT_STACK_NONE is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set +# CONFIG_INIT_STACK_ALL_PATTERN is not set +CONFIG_INIT_STACK_ALL_ZERO=y +# CONFIG_GCC_PLUGIN_STACKLEAK is not set +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options + +# CONFIG_SECURITY_BOOT_INIT is not set +# end of Security options + +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y +CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ENGINE=m + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_DH=m +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +CONFIG_CRYPTO_CURVE25519=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_SEQIV is not set +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +CONFIG_CRYPTO_XTS=m +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_XXHASH=m +CONFIG_CRYPTO_BLAKE2B=m +# CONFIG_CRYPTO_BLAKE2S is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_SM3=m +CONFIG_CRYPTO_SM3_GENERIC=m +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +CONFIG_CRYPTO_SM4=m +CONFIG_CRYPTO_SM4_GENERIC=m +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_HASH=y +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +CONFIG_CRYPTO_USER_API_RNG=m +# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set +CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +# CONFIG_CRYPTO_STATS is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +# CONFIG_CRYPTO_DEV_VIRTIO is not set +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +CONFIG_CRYPTO_DEV_CCREE=m +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +CONFIG_CRYPTO_DEV_AMLOGIC_GXL=m +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set +# CONFIG_PGP_LIBRARY is not set +# CONFIG_PGP_KEY_PARSER is not set +# CONFIG_PGP_PRELOAD is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y +CONFIG_PACKING=y +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y +CONFIG_INDIRECT_PIO=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +# CONFIG_CRYPTO_LIB_CHACHA is not set +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_DES=m +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + +CONFIG_LIB_MEMNEQ=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=m +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_INTERVAL_TREE=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_CMA=y +CONFIG_DMA_PERNUMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=32 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +CONFIG_IRQ_POLL=y +CONFIG_MPILIB=y +CONFIG_DIMLIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_BTF is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_PGO_KERNEL is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_HAVE_KCSAN_COMPILER=y +# end of Generic Kernel Debugging Instruments + +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_KASAN_SW_TAGS=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SOFTLOCKUP_DETECTOR is not set + +# +# ARM64 NMI watchdog configuration +# +# end of ARM64 NMI watchdog configuration + +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHED_INFO=y +# CONFIG_SCHEDSTATS is not set +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y + +# +# Debug kernel data structures +# +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +CONFIG_RCU_TRACE=y +# CONFIG_RCU_EQS_DEBUG is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set + +# +# arm64 Debugging +# +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_DEBUG_EFI is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of arm64 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +CONFIG_FUNCTION_ERROR_INJECTION=y +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_MIN_HEAP is not set +# CONFIG_TEST_SORT is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_STRSCPY is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_STACKINIT is not set +# CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set +CONFIG_MEMTEST=y +# end of Kernel Testing and Coverage +# end of Kernel hacking diff --git a/bsp/meta-phytium/recipes-kernel/linux/files/patches/0001-allow-ACPI-AML-cover-the-kernel-memory.patch b/bsp/meta-phytium/recipes-kernel/linux/files/patches/0001-allow-ACPI-AML-cover-the-kernel-memory.patch new file mode 100644 index 0000000000000000000000000000000000000000..8049b2975c6e76e4c9150ef842e27b82ec7c0e48 --- /dev/null +++ b/bsp/meta-phytium/recipes-kernel/linux/files/patches/0001-allow-ACPI-AML-cover-the-kernel-memory.patch @@ -0,0 +1,205 @@ +From e9ace71c7216fc8f8abc7bd63e6a29af95aacb33 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=E9=BB=84=E7=82=8E?= +Date: Tue, 19 Sep 2023 10:41:41 +0800 +Subject: [PATCH] allow-ACPI-AML-cover-the-kernel-memory + +--- + arch/arm64/include/asm/acpi.h | 21 ++++-- + arch/arm64/kernel/acpi.c | 123 +--------------------------------- + 2 files changed, 16 insertions(+), 128 deletions(-) + +diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h +index 8f67d367e..be2993281 100644 +--- a/arch/arm64/include/asm/acpi.h ++++ b/arch/arm64/include/asm/acpi.h +@@ -45,12 +45,26 @@ + #define ACPI_MADT_GICC_TRBE (offsetof(struct acpi_madt_generic_interrupt, \ + trbe_interrupt) + sizeof(u16)) + ++ + /* Basic configuration for ACPI */ + #ifdef CONFIG_ACPI + pgprot_t __acpi_get_mem_attribute(phys_addr_t addr); + + /* ACPI table mapping after acpi_permanent_mmap is set */ +-void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); ++static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys, ++ acpi_size size) ++{ ++ /* For normal memory we already have a cacheable mapping. */ ++ if (memblock_is_map_memory(phys)) ++ return (void __iomem *)__phys_to_virt(phys); ++ ++ /* ++ * We should still honor the memory's attribute here because ++ * crash dump kernel possibly excludes some ACPI (reclaim) ++ * regions from memblock list. ++ */ ++ return __ioremap(phys, size, __acpi_get_mem_attribute(phys)); ++} + #define acpi_os_ioremap acpi_os_ioremap + + typedef u64 phys_cpuid_t; +@@ -103,11 +117,6 @@ static inline u32 get_acpi_id_for_cpu(unsigned int cpu) + static inline void arch_fix_phys_package_id(int num, u32 slot) { } + void __init acpi_init_cpus(void); + int apei_claim_sea(struct pt_regs *regs); +-void acpi_pptt_find_min_physid_cpu_node(struct acpi_table_header *table_hdr, +- struct acpi_pptt_processor *cpu_node, +- phys_cpuid_t *min_physid, +- struct acpi_pptt_processor **min_cpu_node); +- + #else + static inline void acpi_init_cpus(void) { } + static inline int apei_claim_sea(struct pt_regs *regs) { return -ENOENT; } +diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c +index a81105cfe..4f428685f 100644 +--- a/arch/arm64/kernel/acpi.c ++++ b/arch/arm64/kernel/acpi.c +@@ -27,11 +27,9 @@ + #include + + #include +-#include + #include + #include + #include +-#include + #include + + int acpi_noirq = 1; /* skip ACPI IRQ initialization */ +@@ -263,93 +261,6 @@ pgprot_t __acpi_get_mem_attribute(phys_addr_t addr) + return __pgprot(PROT_DEVICE_nGnRnE); + } + +-void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) +-{ +- efi_memory_desc_t *md, *region = NULL; +- pgprot_t prot; +- +- if (WARN_ON_ONCE(!efi_enabled(EFI_MEMMAP))) +- return NULL; +- +- for_each_efi_memory_desc(md) { +- u64 end = md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT); +- +- if (phys < md->phys_addr || phys >= end) +- continue; +- +- if (phys + size > end) { +- pr_warn(FW_BUG "requested region covers multiple EFI memory regions\n"); +- return NULL; +- } +- region = md; +- break; +- } +- +- /* +- * It is fine for AML to remap regions that are not represented in the +- * EFI memory map at all, as it only describes normal memory, and MMIO +- * regions that require a virtual mapping to make them accessible to +- * the EFI runtime services. +- */ +- prot = __pgprot(PROT_DEVICE_nGnRnE); +- if (region) { +- switch (region->type) { +- case EFI_LOADER_CODE: +- case EFI_LOADER_DATA: +- case EFI_BOOT_SERVICES_CODE: +- case EFI_BOOT_SERVICES_DATA: +- case EFI_CONVENTIONAL_MEMORY: +- case EFI_PERSISTENT_MEMORY: +- if (memblock_is_map_memory(phys) || +- !memblock_is_region_memory(phys, size)) { +- pr_warn(FW_BUG "requested region covers kernel memory @ %pa\n", &phys); +- return NULL; +- } +- /* +- * Mapping kernel memory is permitted if the region in +- * question is covered by a single memblock with the +- * NOMAP attribute set: this enables the use of ACPI +- * table overrides passed via initramfs, which are +- * reserved in memory using arch_reserve_mem_area() +- * below. As this particular use case only requires +- * read access, fall through to the R/O mapping case. +- */ +- fallthrough; +- +- case EFI_RUNTIME_SERVICES_CODE: +- /* +- * This would be unusual, but not problematic per se, +- * as long as we take care not to create a writable +- * mapping for executable code. +- */ +- prot = PAGE_KERNEL_RO; +- break; +- +- case EFI_ACPI_RECLAIM_MEMORY: +- /* +- * ACPI reclaim memory is used to pass firmware tables +- * and other data that is intended for consumption by +- * the OS only, which may decide it wants to reclaim +- * that memory and use it for something else. We never +- * do that, but we usually add it to the linear map +- * anyway, in which case we should use the existing +- * mapping. +- */ +- if (memblock_is_map_memory(phys)) +- return (void __iomem *)__phys_to_virt(phys); +- fallthrough; +- +- default: +- if (region->attribute & EFI_MEMORY_WB) +- prot = PAGE_KERNEL; +- else if (region->attribute & EFI_MEMORY_WT) +- prot = __pgprot(PROT_NORMAL_WT); +- else if (region->attribute & EFI_MEMORY_WC) +- prot = __pgprot(PROT_NORMAL_NC); +- } +- } +- return __ioremap(phys, size, prot); +-} + + /* + * Claim Synchronous External Aborts as a firmware first notification. +@@ -404,39 +315,7 @@ int apei_claim_sea(struct pt_regs *regs) + return err; + } + +-int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id, +- int *pcpu) +-{ +- int cpu, nid; +- +- cpu = acpi_map_cpuid(physid, acpi_id); +- if (cpu < 0) { +- pr_info("Unable to map GICC to logical cpu number\n"); +- return cpu; +- } +- nid = acpi_get_node(handle); +- if (nid != NUMA_NO_NODE) { +- set_cpu_numa_node(cpu, nid); +- numa_add_cpu(cpu); +- } +- +- *pcpu = cpu; +- set_cpu_present(cpu, true); +- +- return 0; +-} +-EXPORT_SYMBOL(acpi_map_cpu); +- +-int acpi_unmap_cpu(int cpu) +-{ +- set_cpu_present(cpu, false); +- numa_clear_node(cpu); +- +- return 0; +-} +-EXPORT_SYMBOL(acpi_unmap_cpu); +- + void arch_reserve_mem_area(acpi_physical_address addr, size_t size) + { +- memblock_mark_nomap(addr, size); ++ + } diff --git a/bsp/meta-phytium/recipes-kernel/linux/files/phytiumpi.its b/bsp/meta-phytium/recipes-kernel/linux/files/phytiumpi.its new file mode 100644 index 0000000000000000000000000000000000000000..eae9260a9c78cf6c58988c752fd2f0118aca4456 --- /dev/null +++ b/bsp/meta-phytium/recipes-kernel/linux/files/phytiumpi.its @@ -0,0 +1,59 @@ +/* + * Compilation: + * mkimage -f fit_kernel_dtb.its fit_kernel_dtb.itb + * + * Files in linux build dir: + * - arch/arm/boot/Image (zImage-old-ok) + * - arch/arm/boot/dts/ft.dtb + * + * fatload usb 0:1 0x90100000 fit_kernel_dtb.itb + * bootm 0x90100000#e2000 + * + */ + +/dts-v1/; +/ { + description = "U-Boot fitImage for Phytium Phytiumpi"; + #address-cells = <1>; + + images { + kernel { + description = "Linux kernel"; + data = /incbin/("arch/arm64/boot/Image.gz"); + type = "kernel"; + arch = "arm64"; + os = "linux"; + compression = "gzip"; + load = <0x80080000>; + entry = <0x80080000>; + hash-1 { + algo = "sha1"; + }; + }; + + fdt-phytium { + description = "FDT phytiumpi"; + data = /incbin/("arch/arm64/boot/dts/phytium/phytiumpi_firefly.dtb"); + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + hash-1 { + algo = "sha1"; + }; + }; + }; + + configurations { + default = "phytium@cecport"; + + phytium { + description = "phytimpi"; + kernel = "kernel"; + fdt = "fdt-phytium"; + hash-1 { + algo = "sha1"; + }; + }; + + }; +}; diff --git a/bsp/meta-phytium/recipes-kernel/linux/linux-openeuler-rt.bbappend b/bsp/meta-phytium/recipes-kernel/linux/linux-openeuler-rt.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..40f8195b6fabfd789b990689cd2c940c6de1d70b --- /dev/null +++ b/bsp/meta-phytium/recipes-kernel/linux/linux-openeuler-rt.bbappend @@ -0,0 +1,14 @@ +require recipes-kernel/linux/linux-phytium.inc + +SRC_URI:remove = " \ + file://src-kernel-5.10/0001-apply-preempt-RT-patch.patch \ + file://src-kernel-5.10/0001-modify-openeuler_defconfig-for-rt62.patch \ +" + +SRC_URI:append = " \ + file://src-kernel-5.10-tag-phytium/0001-apply-preempt-RT-patch.patch \ + file://src-kernel-5.10-tag-phytium/0001-modify-openeuler_defconfig-for-rt62.patch \ +" + +# add COMPATIBLE_MACHINE +COMPATIBLE_MACHINE = "ft2000-4|d2000|phytiumpi" diff --git a/bsp/meta-phytium/recipes-kernel/linux/linux-openeuler.bbappend b/bsp/meta-phytium/recipes-kernel/linux/linux-openeuler.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..e678129e4fb0b26a627cc937785b4164dfbe11cd --- /dev/null +++ b/bsp/meta-phytium/recipes-kernel/linux/linux-openeuler.bbappend @@ -0,0 +1,4 @@ +require recipes-kernel/linux/linux-phytium.inc + +# add COMPATIBLE_MACHINE +COMPATIBLE_MACHINE = "ft2000-4|d2000|phytiumpi" diff --git a/bsp/meta-phytium/recipes-kernel/linux/linux-phytium.inc b/bsp/meta-phytium/recipes-kernel/linux/linux-phytium.inc new file mode 100644 index 0000000000000000000000000000000000000000..90fdf80652bb8c8a7b13f9f1aadbb0edad6f8423 --- /dev/null +++ b/bsp/meta-phytium/recipes-kernel/linux/linux-phytium.inc @@ -0,0 +1,41 @@ +# add recipes-kernel path to find patch and defconfig +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +# remove origin kernel and patch in linux-openeuler.inc +SRC_URI:remove = " \ + file://kernel-5.10 \ + file://src-kernel-5.10 \ + file://patches/${ARCH}/0001-arm64-add-zImage-support-for-arm64.patch \ +" + +# fetch kernel and patch for phytium +OPENEULER_REPO_NAMES = "phytium-kernel src-kernel-5.10-tag-phytium" + +# use phytium kernel repo +SRC_URI:append = " \ + file://phytium-kernel \ + file://src-kernel-5.10-tag-phytium \ +" + +# patches for ft2000-4 +SRC_URI:append:ft2000-4 = " \ + file://patches/0001-allow-ACPI-AML-cover-the-kernel-memory.patch \ +" + +SRC_URI:append:phytiumpi = " \ + file://phytiumpi.its \ +" + +DEPENDS:append:phytiumpi = " u-boot-tools-native dtc-native" +do_deploy:append:phytiumpi() { + cp ${WORKDIR}/${MACHINE}.its ./ + uboot-mkimage -f ${MACHINE}.its fitImage + cp fitImage ${DEPLOY_DIR_IMAGE}/fitImage +} + +# add patch tool to solve patch apply +PATCHTOOL = "git" + +S = "${WORKDIR}/phytium-kernel" + +OPENEULER_KERNEL_CONFIG = "file://config/${MACHINE}/${MACHINE}_defconfig" diff --git a/bsp/meta-phytium/wic/efi-image-phytium.wks b/bsp/meta-phytium/wic/efi-image-phytium.wks new file mode 100644 index 0000000000000000000000000000000000000000..c996fc00cdb4a838b8e9e989fc7005145bb7c742 --- /dev/null +++ b/bsp/meta-phytium/wic/efi-image-phytium.wks @@ -0,0 +1,7 @@ +# short-description: partitioned image with necessary layout +# long-description: This image contains boot partition and rootfs partitions + +part /boot --source bootimg-efi --sourceparams="loader=grub-efi" --ondisk sda --label boot --active --align 4096 +part / --source rootfs --ondisk sda --fstype=ext4 --label platform --align 4096 --use-uuid --size=4096 + +bootloader --ptable gpt --timeout=5 --append="rw console=tty0" diff --git a/bsp/meta-visionfive2/README.md b/bsp/meta-visionfive2/README.md new file mode 100644 index 0000000000000000000000000000000000000000..44ed29a7b4efab4a3ecc87ee7c967f5eb66f2677 --- /dev/null +++ b/bsp/meta-visionfive2/README.md @@ -0,0 +1,92 @@ +# meta-visionfive2 + + + +## Getting started + +To make it easy for you to get started with GitLab, here's a list of recommended next steps. + +Already a pro? Just edit this README.md and make it your own. Want to make it easy? [Use the template at the bottom](#editing-this-readme)! + +## Add your files + +- [ ] [Create](https://docs.gitlab.com/ee/user/project/repository/web_editor.html#create-a-file) or [upload](https://docs.gitlab.com/ee/user/project/repository/web_editor.html#upload-a-file) files +- [ ] [Add files using the command line](https://docs.gitlab.com/ee/gitlab-basics/add-file.html#add-a-file-using-the-command-line) or push an existing Git repository with the following command: + +``` +cd existing_repo +git remote add origin https://isrc.iscas.ac.cn/gitlab/riscv/raios/meta-visionfive2.git +git branch -M main +git push -uf origin main +``` + +## Integrate with your tools + +- [ ] [Set up project integrations](https://isrc.iscas.ac.cn/gitlab/riscv/raios/meta-visionfive2/-/settings/integrations) + +## Collaborate with your team + +- [ ] [Invite team members and collaborators](https://docs.gitlab.com/ee/user/project/members/) +- [ ] [Create a new merge request](https://docs.gitlab.com/ee/user/project/merge_requests/creating_merge_requests.html) +- [ ] [Automatically close issues from merge requests](https://docs.gitlab.com/ee/user/project/issues/managing_issues.html#closing-issues-automatically) +- [ ] [Enable merge request approvals](https://docs.gitlab.com/ee/user/project/merge_requests/approvals/) +- [ ] [Automatically merge when pipeline succeeds](https://docs.gitlab.com/ee/user/project/merge_requests/merge_when_pipeline_succeeds.html) + +## Test and Deploy + +Use the built-in continuous integration in GitLab. + +- [ ] [Get started with GitLab CI/CD](https://docs.gitlab.com/ee/ci/quick_start/index.html) +- [ ] [Analyze your code for known vulnerabilities with Static Application Security Testing(SAST)](https://docs.gitlab.com/ee/user/application_security/sast/) +- [ ] [Deploy to Kubernetes, Amazon EC2, or Amazon ECS using Auto Deploy](https://docs.gitlab.com/ee/topics/autodevops/requirements.html) +- [ ] [Use pull-based deployments for improved Kubernetes management](https://docs.gitlab.com/ee/user/clusters/agent/) +- [ ] [Set up protected environments](https://docs.gitlab.com/ee/ci/environments/protected_environments.html) + +*** + +# Editing this README + +When you're ready to make this README your own, just edit this file and use the handy template below (or feel free to structure it however you want - this is just a starting point!). Thank you to [makeareadme.com](https://www.makeareadme.com/) for this template. + +## Suggestions for a good README +Every project is different, so consider which of these sections apply to yours. The sections used in the template are suggestions for most open source projects. Also keep in mind that while a README can be too long and detailed, too long is better than too short. If you think your README is too long, consider utilizing another form of documentation rather than cutting out information. + +## Name +Choose a self-explaining name for your project. + +## Description +Let people know what your project can do specifically. Provide context and add a link to any reference visitors might be unfamiliar with. A list of Features or a Background subsection can also be added here. If there are alternatives to your project, this is a good place to list differentiating factors. + +## Badges +On some READMEs, you may see small images that convey metadata, such as whether or not all the tests are passing for the project. You can use Shields to add some to your README. Many services also have instructions for adding a badge. + +## Visuals +Depending on what you are making, it can be a good idea to include screenshots or even a video (you'll frequently see GIFs rather than actual videos). Tools like ttygif can help, but check out Asciinema for a more sophisticated method. + +## Installation +Within a particular ecosystem, there may be a common way of installing things, such as using Yarn, NuGet, or Homebrew. However, consider the possibility that whoever is reading your README is a novice and would like more guidance. Listing specific steps helps remove ambiguity and gets people to using your project as quickly as possible. If it only runs in a specific context like a particular programming language version or operating system or has dependencies that have to be installed manually, also add a Requirements subsection. + +## Usage +Use examples liberally, and show the expected output if you can. It's helpful to have inline the smallest example of usage that you can demonstrate, while providing links to more sophisticated examples if they are too long to reasonably include in the README. + +## Support +Tell people where they can go to for help. It can be any combination of an issue tracker, a chat room, an email address, etc. + +## Roadmap +If you have ideas for releases in the future, it is a good idea to list them in the README. + +## Contributing +State if you are open to contributions and what your requirements are for accepting them. + +For people who want to make changes to your project, it's helpful to have some documentation on how to get started. Perhaps there is a script that they should run or some environment variables that they need to set. Make these steps explicit. These instructions could also be useful to your future self. + +You can also document commands to lint the code or run tests. These steps help to ensure high code quality and reduce the likelihood that the changes inadvertently break something. Having instructions for running tests is especially helpful if it requires external setup, such as starting a Selenium server for testing in a browser. + +## Authors and acknowledgment +Show your appreciation to those who have contributed to the project. + +## License +For open source projects, say how it is licensed. + +## Project status +If you have run out of energy or time for your project, put a note at the top of the README saying that development has slowed down or stopped completely. Someone may choose to fork your project or volunteer to step in as a maintainer or owner, allowing your project to keep going. You can also make an explicit request for maintainers. diff --git a/bsp/meta-visionfive2/conf/layer.conf b/bsp/meta-visionfive2/conf/layer.conf new file mode 100644 index 0000000000000000000000000000000000000000..cc0375377c51b54207fdeb58e3277eabc67ee65b --- /dev/null +++ b/bsp/meta-visionfive2/conf/layer.conf @@ -0,0 +1,14 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH =. "${LAYERDIR}:" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "meta-visionfive2" +BBFILE_PATTERN_meta-visionfive2 = "^${LAYERDIR}/" +BBFILE_PRIORITY_meta-visionfive2 = "7" + +LAYERVERSION_meta-visionfive2 = "1" +LAYERDEPENDS_meta-visionfive2 = "core" +LAYERSERIES_COMPAT_meta-visionfive2 = "kirkstone" diff --git a/bsp/meta-visionfive2/conf/machine/starfive-dubhe.conf b/bsp/meta-visionfive2/conf/machine/starfive-dubhe.conf new file mode 100644 index 0000000000000000000000000000000000000000..e0acf9bc5a8bd8edfe912dafee0a0db844fb66a7 --- /dev/null +++ b/bsp/meta-visionfive2/conf/machine/starfive-dubhe.conf @@ -0,0 +1,31 @@ +require conf/machine/include/riscv/tune-riscv.inc + +MACHINEOVERRIDES =. "visionfive:mriscv64:" +MACHINE_FEATURES = "screen keyboard ext2 ext3 serial alsa pci usbhost" +DEFAULTTUNE ?= "riscv64" + +export ROOTFS_PACKAGE_ARCH = "riscv64" + +KERNEL_IMAGETYPE = "Image.gz" +KERNEL_IMAGETYPE_FOR_MAKE = "Image.gz" + +BASE_LIB:tune-riscv64 = "lib64/lp64d" + +require conf/multilib.conf +MULTILIBS = "" + +SERIAL_CONSOLES = "115200;ttyS0" + +RISCV_SBI_FDT ?= "jh7110-visionfive-v2.dtb" +KERNEL_DEVICETREE ?= "starfive/${RISCV_SBI_FDT}" + +RISCV_SBI_PLAT = "generic" +IMAGE_INSTALL:append = " kernel-modules" + +# sd image partition +WKS_FILE = "sdimage-vfive2.wks" +# the final sd image is in wic format +IMAGE_FSTYPES = "wic.bz2" +# image, flatten device tree and vf2_uEnv.txt should be installed +# into the boot partition +IMAGE_BOOT_FILES = "${KERNEL_IMAGETYPE} ${RISCV_SBI_FDT} vf2_uEnv.txt" \ No newline at end of file diff --git a/bsp/meta-visionfive2/recipes-bsp/deploy-bootfiles/deploy-bootfiles_0.1.bb b/bsp/meta-visionfive2/recipes-bsp/deploy-bootfiles/deploy-bootfiles_0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..34467c86862625022f89cdf1d849e11597afc238 --- /dev/null +++ b/bsp/meta-visionfive2/recipes-bsp/deploy-bootfiles/deploy-bootfiles_0.1.bb @@ -0,0 +1,20 @@ +SUMMARY = "Deploy Boot files recipe" +DESCRIPTION = "Recipe to deploy uEnv.txt to the deploy directory" +LICENSE = "CLOSED" + +SRC_URI = "file://vf2_uEnv.txt \ + file://visionfive-v2-extlinux.conf \ + " + +S = "${WORKDIR}" + +inherit deploy + +do_deploy(){ + # uboot environment configuration + install -m 755 ${WORKDIR}/vf2_uEnv.txt ${DEPLOYDIR}/ + # default extlinux configuration + install -m 755 ${WORKDIR}/visionfive-v2-extlinux.conf ${DEPLOYDIR}/ +} + +addtask deploy before do_build after do_install diff --git a/bsp/meta-visionfive2/recipes-bsp/deploy-bootfiles/files/vf2_uEnv.txt b/bsp/meta-visionfive2/recipes-bsp/deploy-bootfiles/files/vf2_uEnv.txt new file mode 100644 index 0000000000000000000000000000000000000000..b9b6d53f5bad7eda1e860bfabaa5d1950215ad20 --- /dev/null +++ b/bsp/meta-visionfive2/recipes-bsp/deploy-bootfiles/files/vf2_uEnv.txt @@ -0,0 +1,2 @@ +kernel_comp_addr_r=0x90000000 +kernel_comp_size=0x10000000 \ No newline at end of file diff --git a/bsp/meta-visionfive2/recipes-bsp/deploy-bootfiles/files/visionfive-v2-extlinux.conf b/bsp/meta-visionfive2/recipes-bsp/deploy-bootfiles/files/visionfive-v2-extlinux.conf new file mode 100644 index 0000000000000000000000000000000000000000..ec208e20a940df75ebcb83742ec4bc13da65bdbd --- /dev/null +++ b/bsp/meta-visionfive2/recipes-bsp/deploy-bootfiles/files/visionfive-v2-extlinux.conf @@ -0,0 +1,5 @@ +default visionfive-v2 +label visionfive-v2 + kernel /Image.gz + fdt /jh7110-visionfive-v2.dtb +append root=PARTLABEL=root rootwait \ No newline at end of file diff --git a/bsp/meta-visionfive2/recipes-core/images/openeuler-image.bbappend b/bsp/meta-visionfive2/recipes-core/images/openeuler-image.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..dfd3dcc302d19eb228953870c2784280f31b49f5 --- /dev/null +++ b/bsp/meta-visionfive2/recipes-core/images/openeuler-image.bbappend @@ -0,0 +1 @@ +do_image[depends] += " deploy-bootfiles:do_deploy" diff --git a/bsp/meta-visionfive2/recipes-core/images/starfive-dubhe.inc b/bsp/meta-visionfive2/recipes-core/images/starfive-dubhe.inc new file mode 100644 index 0000000000000000000000000000000000000000..5a414c5a23b246a098b2cdfe7214c153d35c3b5d --- /dev/null +++ b/bsp/meta-visionfive2/recipes-core/images/starfive-dubhe.inc @@ -0,0 +1,38 @@ +IMAGE_ROOTFS_SIZE = "8192" +IMAGE_ROOTFS_EXTRA_SPACE = "0" +IMAGE_FSTYPES:remove = "iso" + +# create OUTPUTDIR for holding final image +# remove unnecessary files from rootfs to reduce size +delete_unneeded_from_rootfs() { + set -x + # if the output_dir does not exist, rm will cause an error + if test -d "${OUTPUT_DIR}"; then + rm -rf "${OUTPUT_DIR}" + else + mkdir -p "${OUTPUT_DIR}" + fi + # if the ${IMAGE_ROOTFS}/boot does not exist, cp will cause an error + if [ "$(ls ${IMAGE_ROOTFS}/boot)" ]; then + cp ${IMAGE_ROOTFS}/boot/* ${OUTPUT_DIR}/ + rm ${IMAGE_ROOTFS}/boot/* + fi + set +x +} + + +# We only need to copy the wic image to the output directory +copy_openeuler_distro() { + set -x + # if the output_dir does not exist, rm will cause an error + if test -d "${OUTPUT_DIR}"; then + rm -f "${OUTPUT_DIR}"/${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.wic.bz2 + else + mkdir -p "${OUTPUT_DIR}" + fi + cp -fp ${IMGDEPLOYDIR}/${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.wic.bz2 "${OUTPUT_DIR}"/ + set +x +} + +IMAGE_PREPROCESS_COMMAND += "delete_unneeded_from_rootfs;" +IMAGE_POSTPROCESS_COMMAND += "copy_openeuler_distro;" \ No newline at end of file diff --git a/bsp/meta-visionfive2/recipes-kernel/linux/files/config/visionfive2-jh7110_defconfig b/bsp/meta-visionfive2/recipes-kernel/linux/files/config/visionfive2-jh7110_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..13f6fd5d7a3e65fea2d4d7ec81b029374eae99b6 --- /dev/null +++ b/bsp/meta-visionfive2/recipes-kernel/linux/files/config/visionfive2-jh7110_defconfig @@ -0,0 +1,5326 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/riscv 5.10.79 Kernel Configuration +# +CONFIG_IRQ_WORK=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="StarFive" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_USELIB=y +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_ARCH_CLOCKSOURCE_INIT=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_PREEMPT_COUNT=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_TRACE_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_KMEM=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_BPF=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_SOCK_CGROUP_DATA=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_CHECKPOINT_RESTORE=y +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +# CONFIG_BOOT_CONFIG is not set +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_BASE_RELATIVE=y +CONFIG_BPF_SYSCALL=y +# CONFIG_BPF_PRELOAD is not set +# CONFIG_USERFAULTFD is not set +CONFIG_KCMP=y +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +# CONFIG_PERF_EVENTS is not set +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y +# CONFIG_PROFILING is not set +# end of General setup + +CONFIG_64BIT=y +CONFIG_RISCV=y +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_RISCV_SBI=y +CONFIG_MMU=y +CONFIG_ZONE_DMA32=y +CONFIG_VA_BITS=39 +CONFIG_PA_BITS=56 +CONFIG_PAGE_OFFSET=0xffffffe000000000 +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_LOCKDEP_SUPPORT=y + +# +# SoC selection +# +# CONFIG_SOC_SIFIVE is not set +CONFIG_SOC_STARFIVE=y +# CONFIG_SOC_VIRT is not set +# end of SoC selection + +# +# Platform type +# +# CONFIG_ARCH_RV32I is not set +CONFIG_ARCH_RV64I=y +# CONFIG_CMODEL_MEDLOW is not set +CONFIG_CMODEL_MEDANY=y +CONFIG_MODULE_SECTIONS=y +CONFIG_MAXPHYSMEM_128GB=y +CONFIG_SMP=y +CONFIG_NR_CPUS=8 +CONFIG_HOTPLUG_CPU=y +CONFIG_TUNE_GENERIC=y +CONFIG_RISCV_ISA_C=y +CONFIG_FPU=y +# end of Platform type + +# +# Kernel features +# +CONFIG_HZ_100=y +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=100 +CONFIG_SCHED_HRTICK=y +CONFIG_RISCV_SBI_V01=y +# end of Kernel features + +# +# Boot options +# +CONFIG_CMDLINE="" +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +# end of Boot options + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +# CONFIG_ENERGY_MODEL is not set +# end of Power management options + +# +# Firmware Drivers +# +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB=y +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_EFI_EARLYCON=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +CONFIG_DT_IDLE_STATES=y +CONFIG_DT_IDLE_GENPD=y + +# +# RISC-V CPU Idle Drivers +# +CONFIG_RISCV_SBI_CPUIDLE=y +# end of RISC-V CPU Idle Drivers +# end of CPU Idle +# end of CPU Power Management + +# +# General architecture-dependent options +# +# CONFIG_JUMP_LABEL is not set +CONFIG_HAVE_64BIT_ALIGNED_ACCESS=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_CGROUP_RWSTAT=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_DEV_ZONED is not set +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_DEV_THROTTLING_LOW is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_HAS_MMIOWB=y +CONFIG_MMIOWB=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +CONFIG_ARCH_HAS_BINFMT_FLAT=y +# CONFIG_BINFMT_FLAT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_COMPACTION=y +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_FRAME_VECTOR=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_ESP=y +# CONFIG_NET_KEY is not set +# CONFIG_XDP_SOCKETS is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=y +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +CONFIG_NET_UDP_TUNNEL=y +# CONFIG_NET_FOU is not set +# CONFIG_INET_AH is not set +CONFIG_INET_ESP=y +# CONFIG_INET_ESP_OFFLOAD is not set +# CONFIG_INET_ESPINTCP is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_MPTCP is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_NETLINK=y +CONFIG_NETFILTER_FAMILY_BRIDGE=y +CONFIG_NETFILTER_NETLINK_ACCT=y +CONFIG_NETFILTER_NETLINK_QUEUE=y +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=y +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=y +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +CONFIG_NF_CONNTRACK_TFTP=y +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=y +CONFIG_NF_NAT_FTP=y +CONFIG_NF_NAT_TFTP=y +CONFIG_NF_NAT_REDIRECT=y +CONFIG_NF_NAT_MASQUERADE=y +CONFIG_NF_TABLES=y +# CONFIG_NF_TABLES_NETDEV is not set +# CONFIG_NFT_NUMGEN is not set +CONFIG_NFT_CT=y +# CONFIG_NFT_COUNTER is not set +# CONFIG_NFT_CONNLIMIT is not set +# CONFIG_NFT_LOG is not set +# CONFIG_NFT_LIMIT is not set +# CONFIG_NFT_MASQ is not set +# CONFIG_NFT_REDIR is not set +# CONFIG_NFT_NAT is not set +# CONFIG_NFT_TUNNEL is not set +# CONFIG_NFT_OBJREF is not set +# CONFIG_NFT_QUEUE is not set +# CONFIG_NFT_QUOTA is not set +# CONFIG_NFT_REJECT is not set +CONFIG_NFT_COMPAT=y +# CONFIG_NFT_HASH is not set +CONFIG_NFT_FIB=y +# CONFIG_NFT_XFRM is not set +# CONFIG_NFT_SOCKET is not set +# CONFIG_NFT_OSF is not set +# CONFIG_NFT_TPROXY is not set +# CONFIG_NFT_SYNPROXY is not set +# CONFIG_NF_FLOW_TABLE is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=y +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=y +CONFIG_NETFILTER_XT_TARGET_NETMAP=y +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +CONFIG_NETFILTER_XT_TARGET_REDIRECT=y +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +CONFIG_NETFILTER_XT_MATCH_IPCOMP=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_IPVS=y +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +CONFIG_NETFILTER_XT_MATCH_STRING=y +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +CONFIG_NETFILTER_XT_MATCH_U32=y +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +CONFIG_IP_VS=y +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +# CONFIG_IP_VS_PROTO_ESP is not set +# CONFIG_IP_VS_PROTO_AH is not set +# CONFIG_IP_VS_PROTO_SCTP is not set + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=y +# CONFIG_IP_VS_WRR is not set +# CONFIG_IP_VS_LC is not set +# CONFIG_IP_VS_WLC is not set +# CONFIG_IP_VS_FO is not set +# CONFIG_IP_VS_OVF is not set +# CONFIG_IP_VS_LBLC is not set +# CONFIG_IP_VS_LBLCR is not set +# CONFIG_IP_VS_DH is not set +# CONFIG_IP_VS_SH is not set +# CONFIG_IP_VS_MH is not set +# CONFIG_IP_VS_SED is not set +# CONFIG_IP_VS_NQ is not set + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +# CONFIG_IP_VS_FTP is not set +CONFIG_IP_VS_NFCT=y + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=y +CONFIG_NF_SOCKET_IPV4=y +# CONFIG_NF_TPROXY_IPV4 is not set +CONFIG_NF_TABLES_IPV4=y +CONFIG_NFT_DUP_IPV4=y +CONFIG_NFT_FIB_IPV4=y +# CONFIG_NF_TABLES_ARP is not set +CONFIG_NF_DUP_IPV4=y +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=y +CONFIG_IP_NF_IPTABLES=y +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +# CONFIG_IP_NF_MANGLE is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# CONFIG_NF_TABLES_BRIDGE is not set +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=y +CONFIG_BRIDGE=y +CONFIG_BRIDGE_IGMP_SNOOPING=y +# CONFIG_BRIDGE_MRP is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=y +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +CONFIG_NETLINK_DIAG=y +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +CONFIG_CGROUP_NET_PRIO=y +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +# CONFIG_BPF_STREAM_PARSER is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +CONFIG_CAN_BCM=y +CONFIG_CAN_GW=y +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +CONFIG_IPMS_CAN=y +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +# end of CAN Device Drivers + +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +# CONFIG_BT_HIDP is not set +# CONFIG_BT_HS is not set +CONFIG_BT_LE=y +# CONFIG_BT_LEDS is not set +# CONFIG_BT_MSFTEXT is not set +CONFIG_BT_DEBUGFS=y +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_FEATURE_DEBUG is not set + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_MTKSDIO is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +# CONFIG_CFG80211_WEXT is not set +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_PAGE_POOL=y +CONFIG_FAILOVER=y +CONFIG_ETHTOOL_NETLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +# CONFIG_PCIEPORTBUS is not set +# CONFIG_PCIEASPM is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCIE_XILINX is not set +CONFIG_PCIE_PLDA=y + +# +# DesignWare PCI Core Support +# +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCI_MESON is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCI_J721E_HOST is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +# CONFIG_UEVENT_HELPER is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +# CONFIG_FW_LOADER_COMPRESS is not set +CONFIG_FW_CACHE=y +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER:remove is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +# CONFIG_MOXTET is not set +# CONFIG_SIMPLE_PM_BUS is not set +# CONFIG_MHI_BUS is not set +# end of Bus devices + +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +# CONFIG_MTD_ONENAND is not set +# CONFIG_MTD_RAW_NAND is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_MTD_UBI is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OF_RESOLVE=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_CONFIGFS=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +CONFIG_CDROM=y +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=y +CONFIG_BLK_DEV_NVME=y +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_HWMON is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# CONFIG_NVME_TARGET is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=y +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +CONFIG_SCSI_VIRTIO=y +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_ATA=y +CONFIG_SATA_HOST=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_FORCE=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 +# CONFIG_SATA_AHCI_PLATFORM is not set +# CONFIG_AHCI_CEVA is not set +# CONFIG_AHCI_QORIQ is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=y +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=y +# CONFIG_MACVTAP is not set +CONFIG_IPVLAN_L3S=y +CONFIG_IPVLAN=y +# CONFIG_IPVTAP is not set +CONFIG_VXLAN=y +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_TUN is not set +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=y +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# Distributed Switch Architecture drivers +# +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_AGERE=y +# CONFIG_ET131X is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +# CONFIG_ATL1C is not set +# CONFIG_ALX is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +# CONFIG_NET_VENDOR_CADENCE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_GOOGLE is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_NET_VENDOR_PENSANDO is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_QED is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +CONFIG_R8169=y +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +CONFIG_NET_VENDOR_SMSC=y +# CONFIG_EPIC100 is not set +# CONFIG_SMSC911X is not set +# CONFIG_SMSC9420 is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_SELFTESTS=y +CONFIG_STMMAC_PLATFORM=y +CONFIG_DWMAC_DWC_QOS_ETH=y +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_INTEL_PLAT is not set +CONFIG_DWMAC_STARFIVE_PLAT=y +# CONFIG_STMMAC_PCI is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TI_CPSW_PHY_SEL is not set +# CONFIG_TLAN is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +CONFIG_MARVELL_PHY=y +# CONFIG_MARVELL_10G_PHY is not set +CONFIG_MICREL_PHY=y +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +CONFIG_MOTORCOMM_PHY=y +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_AT803X_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=y +# CONFIG_RENESAS_PHY is not set +# CONFIG_ROCKCHIP_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +# CONFIG_MDIO_THUNDER is not set + +# +# MDIO Multiplexers +# +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_RTL8152 is not set +# CONFIG_USB_LAN78XX is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_IPHETH is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +# CONFIG_ATH10K is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_BRCMSMAC is not set +# CONFIG_BRCMFMAC is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +CONFIG_IWLWIFI=y +CONFIG_IWLWIFI_LEDS=y +CONFIG_IWLDVM=y +CONFIG_IWLMVM=y +# CONFIG_IWLWIFI_BCAST_FILTERING is not set + +# +# Debugging Options +# +# CONFIG_IWLWIFI_DEBUG is not set +# end of Debugging Options + +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_MWIFIEX is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +# CONFIG_MT7663U is not set +# CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_RTL_CARDS is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTW88 is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +# CONFIG_WL18XX is not set +# CONFIG_WLCORE is not set +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +# CONFIG_USB_WIFI_ECR6600U is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_AMBAKMI is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_16550A_VARIANTS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=6 +CONFIG_SERIAL_8250_RUNTIME_UARTS=6 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +# CONFIG_SERIAL_8250_SHARE_IRQ is not set +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_GOLDFISH_TTY is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +CONFIG_HVC_DRIVER=y +CONFIG_HVC_RISCV_SBI=y +# CONFIG_SERIAL_DEV_BUS is not set +CONFIG_TTY_PRINTK=y +CONFIG_TTY_PRINTK_LEVEL=6 +CONFIG_VIRTIO_CONSOLE=y +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +CONFIG_HW_RANDOM_VIRTIO=y +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_HW_RANDOM_STARFIVE is not set +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +# CONFIG_DEVKMEM is not set +# CONFIG_RAW_DRIVER is not set +CONFIG_DEVPORT=y +# CONFIG_TCG_TPM is not set +# CONFIG_XILLYBUS is not set +# end of Character devices + +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=y +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_CADENCE is not set +CONFIG_SPI_CADENCE_QUADSPI=y +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +CONFIG_SPI_PL022_STARFIVE=y +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +CONFIG_SPI_SIFIVE=y +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_DYNAMIC=y +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +# CONFIG_PPS is not set + +# +# PTP clock support +# +# CONFIG_PTP_1588_CLOCK is not set + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_MCP23S08 is not set +# CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +# CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_PINCTRL_STARFIVE=y +CONFIG_PINCTRL_STARFIVE_JH7110=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_CADENCE is not set +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +# CONFIG_GPIO_MB86S7X is not set +# CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_W1 is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_GPIO is not set +CONFIG_POWER_RESET_GPIO_RESTART=y +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +# CONFIG_SYSCON_REBOOT_MODE is not set +# CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM1177 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CORSAIR_CPRO is not set +# CONFIG_SENSORS_DRIVETEMP is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +CONFIG_SENSORS_SFCTEMP=y +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +CONFIG_WATCHDOG_SYSFS=y + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set +CONFIG_STARFIVE_WATCHDOG=y + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK808 is not set +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +# CONFIG_REGULATOR_AD5398 is not set +CONFIG_REGULATOR_AXP15060=y +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +# CONFIG_REGULATOR_FAN53555 is not set +# CONFIG_REGULATOR_FAN53880 is not set +# CONFIG_REGULATOR_GPIO is not set +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX77826 is not set +# CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set +# CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set +# CONFIG_REGULATOR_MPQ7920 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +# CONFIG_REGULATOR_PWM is not set +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_STARFIVE_JH7110 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set +# CONFIG_REGULATOR_SY8827N is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +# CONFIG_REGULATOR_VCTRL is not set +# CONFIG_RC_CORE is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_SUPPORT=y +# CONFIG_MEDIA_SUPPORT_FILTER is not set +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +# end of Media device types + +# +# Media core support +# +CONFIG_VIDEO_DEV=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=y +# end of Media core support + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_V4L2_FWNODE=y +# end of Video4Linux options + +# +# Media controller options +# +# CONFIG_MEDIA_CONTROLLER_DVB is not set +# end of Media controller options + +# +# Digital TV options +# +# CONFIG_DVB_MMAP is not set +CONFIG_DVB_NET=y +CONFIG_DVB_MAX_ADAPTERS=16 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=y +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set + +# +# Analog/digital TV USB devices +# +# CONFIG_VIDEO_AU0828 is not set + +# +# Digital TV USB devices +# +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set + +# +# Software defined radio USB devices +# +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_RADIO_SI470X is not set +# CONFIG_RADIO_SI4713 is not set +# CONFIG_USB_MR800 is not set +# CONFIG_USB_DSBR is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_SHARK is not set +# CONFIG_RADIO_SHARK2 is not set +# CONFIG_USB_KEENE is not set +# CONFIG_USB_RAREMONO is not set +# CONFIG_USB_MA901 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_RADIO_SAA7706H is not set +# CONFIG_RADIO_TEF6862 is not set +# CONFIG_RADIO_WL1273 is not set +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_V4L2=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_DMA_CONTIG=y +CONFIG_VIDEOBUF2_VMALLOC=y +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_CADENCE is not set +# CONFIG_VIDEO_ASPEED is not set +# CONFIG_VIDEO_MUX is not set +CONFIG_VIDEO_STF_VIN=y +# CONFIG_VIDEO_XILINX is not set +# CONFIG_VIN_SENSOR_OV5640 is not set +# CONFIG_VIN_SENSOR_SC2235 is not set +# CONFIG_VIN_SENSOR_OV4689 is not set +# CONFIG_VIN_SENSOR_OV13850 is not set +CONFIG_VIN_SENSOR_IMX219=y +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set +# CONFIG_SDR_PLATFORM_DRIVERS is not set + +# +# MMC/SDIO DVB adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_TEST_DRIVERS is not set +# end of Media drivers + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA1997X is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set +# end of Video decoders + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips + +# +# Camera sensor devices +# +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set +# end of SPI helper chips + +# +# Media SPI Adapters +# +CONFIG_CXD2880_SPI_DRV=m +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=y + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18250=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MSI001=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_M88RS6000T=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_SI2157=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_R820T=m +CONFIG_MEDIA_TUNER_MXL301RF=m +CONFIG_MEDIA_TUNER_QM1D1C0042=m +CONFIG_MEDIA_TUNER_QM1D1B0004=m +# end of Customize TV tuners + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV0910=m +CONFIG_DVB_STV6110x=m +CONFIG_DVB_STV6111=m +CONFIG_DVB_MXL5XX=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_TDA18271C2DD=m +CONFIG_DVB_SI2165=m +CONFIG_DVB_MN88472=m +CONFIG_DVB_MN88473=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10039=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24117=m +CONFIG_DVB_CX24120=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_MB86A16=m +CONFIG_DVB_TDA10071=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_S5H1432=m +CONFIG_DVB_DRXD=m +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DIB9000=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_EC100=m +CONFIG_DVB_STV0367=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_CXD2841ER=m +CONFIG_DVB_ZD1301_DEMOD=m +CONFIG_DVB_CXD2880=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +CONFIG_DVB_AU8522_V4L=m +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_S921=m +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +CONFIG_DVB_TC90522=m +CONFIG_DVB_MN88443X=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_DRX39XYJ=m +CONFIG_DVB_LNBH25=m +CONFIG_DVB_LNBH29=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_A8293=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_TDA665x=m +CONFIG_DVB_IX2505V=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_AF9033=m +CONFIG_DVB_HORUS3A=m +CONFIG_DVB_ASCOT2E=m +CONFIG_DVB_HELENE=m + +# +# Common Interface (EN50221) controller drivers +# +CONFIG_DVB_CXD2099=m +CONFIG_DVB_SP2=m +# end of Customise DVB Frontends + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set +# end of Media ancillary drivers + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_DRM=y +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_VM=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_RCAR_LVDS is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set +# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set +# CONFIG_DRM_PANEL_LVDS is not set +# CONFIG_DRM_PANEL_SIMPLE is not set +# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set +# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set +# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=y +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7703 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +# CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_LONTIUM_LT9611 is not set +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_SIMPLE_BRIDGE is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set +# end of Display Interface Bridges + +# CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_MXSFB is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +CONFIG_DRM_VERISILICON=y +# CONFIG_VERISILICON_VIRTUAL_DISPLAY is not set +# CONFIG_VERISILICON_DW_MIPI_DSI is not set +# CONFIG_VERISILICON_MMU is not set +# CONFIG_VERISILICON_DEC is not set +CONFIG_STARFIVE_INNO_HDMI=y +CONFIG_STARFIVE_DSI=y +# CONFIG_DRM_I2C_ADV7513 is not set +CONFIG_DRM_IMG=y +CONFIG_DRM_IMG_ROGUE=y +CONFIG_DRM_LEGACY=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_EFI is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_GOLDFISH is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_PWM is not set +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# CONFIG_BACKLIGHT_LED is not set +# end of Backlight & LCD device support + +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_VGA_CONSOLE=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +# CONFIG_LOGO is not set +# end of Graphics support + +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_RAWMIDI=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +# CONFIG_SND_HDA_INTEL is not set +# end of HD-Audio + +CONFIG_SND_HDA_PREALLOC_SIZE=64 +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set +CONFIG_SND_DESIGNWARE_I2S=y +# CONFIG_SND_DESIGNWARE_PCM is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_MTK_BTCVSD is not set +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +CONFIG_SND_SOC_STARFIVE=y +CONFIG_SND_SOC_STARFIVE_PWMDAC=y +CONFIG_SND_SOC_STARFIVE_PWMDAC_TRANSMITTER=y +# CONFIG_SND_SOC_STARFIVE_PWMDAC_PCM is not set +CONFIG_SND_SOC_STARFIVE_I2S=y +# CONFIG_SND_SOC_STARFIVE_PDM is not set +# CONFIG_SND_SOC_STARFIVE_TDM is not set +# CONFIG_SND_SOC_STARFIVE_SPDIF is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +CONFIG_SND_SOC_AC108=y +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_ADAU7118_HW is not set +# CONFIG_SND_SOC_ADAU7118_I2C is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4234 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_DA7213 is not set +# CONFIG_SND_SOC_DMIC is not set +# CONFIG_SND_SOC_ES7134 is not set +# CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +# CONFIG_SND_SOC_MAX98357A is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX98373_I2C is not set +# CONFIG_SND_SOC_MAX98390 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +# CONFIG_SND_SOC_SPDIF is not set +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set +# CONFIG_SND_SOC_TAS2770 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8904 is not set +CONFIG_SND_SOC_WM8960=y +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_MT6660 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8822 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# end of CODEC drivers + +CONFIG_SND_SIMPLE_CARD_UTILS=y +CONFIG_SND_SIMPLE_CARD=y +# CONFIG_SND_AUDIO_GRAPH_CARD is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_BIGBEN_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELAN is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_REDRAGON is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_U2FZERO is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set +# end of USB HID support + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_LED_TRIG is not set +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +# CONFIG_USB_MON is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=y +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_USB_CDNS3_STARFIVE=y +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_SNP_UDC_PLAT is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_FS=y +CONFIG_USB_CONFIGFS=y +# CONFIG_USB_CONFIGFS_SERIAL is not set +# CONFIG_USB_CONFIGFS_ACM is not set +# CONFIG_USB_CONFIGFS_OBEX is not set +# CONFIG_USB_CONFIGFS_NCM is not set +# CONFIG_USB_CONFIGFS_ECM is not set +# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set +# CONFIG_USB_CONFIGFS_RNDIS is not set +# CONFIG_USB_CONFIGFS_EEM is not set +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +# CONFIG_USB_CONFIGFS_F_UVC is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + +# CONFIG_TYPEC is not set +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_DEBUG=y +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_SDHCI_OF_ARASAN is not set +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +CONFIG_MMC_SDHCI_OF_DWCMSHC=y +# CONFIG_MMC_SDHCI_CADENCE is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +# CONFIG_MMC_SDHCI_MILBEAUT is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_GOLDFISH is not set +CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_HI3798CV200 is not set +CONFIG_MMC_DW_STARFIVE=y +# CONFIG_MMC_DW_K3 is not set +# CONFIG_MMC_DW_PCI is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_CQHCI is not set +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MMC_SDHCI_XENON is not set +# CONFIG_MMC_SDHCI_OMAP is not set +# CONFIG_MMC_SDHCI_AM654 is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_CLASS_MULTICOLOR is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_AW2013 is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_EL15203000 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set +# CONFIG_LEDS_LP55XX_COMMON is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_SYSCON is not set +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_TI_LMU_COMMON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +# CONFIG_LEDS_TRIGGER_DISK is not set +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_CPU is not set +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +CONFIG_LEDS_TRIGGER_GPIO=y +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_LEDS_TRIGGER_PANIC is not set +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_PATTERN is not set +# CONFIG_LEDS_TRIGGER_AUDIO is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +# CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_EFI is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set +CONFIG_RTC_DRV_STARFIVE=y + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +CONFIG_RTC_DRV_GOLDFISH=y +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +CONFIG_AMBA_PL08X=y +CONFIG_DW_AXI_DMAC=y +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_PL330_DMA is not set +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set +# CONFIG_SF_PDMA is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +CONFIG_DMATEST=y +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +# CONFIG_VIRTIO_MENU is not set +# CONFIG_VDPA is not set +# CONFIG_VHOST_MENU is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +# CONFIG_STAGING is not set +CONFIG_GOLDFISH=y +# CONFIG_GOLDFISH_PIPE is not set +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX9485 is not set +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_COMMON_CLK_PWM is not set +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +# CONFIG_CLK_SIFIVE is not set +CONFIG_CLK_STARFIVE_JH7110=y +CONFIG_CLK_STARFIVE_JH7110_VOUT=y +CONFIG_CLK_STARFIVE_JH7110_ISP=y +CONFIG_CLK_STARFIVE_JH7110_PLL=y +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_RISCV_TIMER=y +CONFIG_STARFIVE_TIMER=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +CONFIG_MAILBOX=y +# CONFIG_ARM_MHU is not set +# CONFIG_PLATFORM_MHU is not set +# CONFIG_PL320_MBOX is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_STARFIVE_MBOX=m +CONFIG_STARFIVE_MBOX_TEST=m +# CONFIG_IOMMU_SUPPORT is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +CONFIG_RPMSG=y +CONFIG_RPMSG_CHAR=y +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set +CONFIG_RPMSG_VIRTIO=y +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +CONFIG_SIFIVE_L2=y +CONFIG_SIFIVE_L2_FLUSH=y +CONFIG_SIFIVE_L2_FLUSH_START=0x40000000 +CONFIG_SIFIVE_L2_FLUSH_SIZE=0x400000000 +CONFIG_STARFIVE_PMU=y +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +# CONFIG_PM_DEVFREQ is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +# CONFIG_IIO is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set +# CONFIG_PWM_SIFIVE is not set +CONFIG_PWM_STARFIVE_PTC=y + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +# CONFIG_AL_FIC is not set +CONFIG_RISCV_INTC=y +CONFIG_SIFIVE_PLIC=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_TI_SYSCON is not set +CONFIG_RESET_STARFIVE_JH7110=y + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PHY_MIPI_DPHY=y +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_FSL_IMX8MQ_USB is not set +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +CONFIG_PHY_M31_DPHY_RX0=y +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set +CONFIG_RAS=y +# CONFIG_USB4 is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# end of Android + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +# end of CPU Frequency scaling +# end of Device Drivers + +# +# File systems +# +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=y +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +# CONFIG_QUOTA is not set +CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=y +CONFIG_CUSE=y +CONFIG_VIRTIO_FS=y +CONFIG_OVERLAY_FS=y +CONFIG_OVERLAY_FS_REDIRECT_DIR=y +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +CONFIG_OVERLAY_FS_INDEX=y +CONFIG_OVERLAY_FS_XINO_AUTO=y +CONFIG_OVERLAY_FS_METACOPY=y + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_FAT_DEFAULT_UTF8=y +CONFIG_EXFAT_FS=y +CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_RW=y +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_CHILDREN=y +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_INODE64 is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=m +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_FLEXFILE_LAYOUT=y +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +# CONFIG_NFS_V4_2_READ_PLUS is not set +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_UNICODE is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options +# end of Security options + +CONFIG_XOR_BLOCKS=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_ENGINE=y + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +# CONFIG_CRYPTO_CURVE25519 is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_XXHASH=y +CONFIG_CRYPTO_BLAKE2B=y +# CONFIG_CRYPTO_BLAKE2S is not set +# CONFIG_CRYPTO_CRCT10DIF is not set +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_SM3 is not set +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +CONFIG_CRYPTO_USER_API_RNG=y +# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set +CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +# CONFIG_CRYPTO_STATS is not set +CONFIG_CRYPTO_USER_API_AKCIPHER=y +# CONFIG_CRYPTO_USER_API_KPP is not set +CONFIG_CRYPTO_HASH_INFO=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=y +# CONFIG_CRYPTO_LIB_BLAKE2S is not set +# CONFIG_CRYPTO_LIB_CHACHA is not set +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +CONFIG_CRYPTO_DEV_VIRTIO=y +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_CCREE is not set +CONFIG_CRYPTO_DEV_JH7110_ENCRYPT=y +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# end of Certificates for signature checking + +# +# Library routines +# +CONFIG_RAID6_PQ=y +CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=y +CONFIG_TEXTSEARCH_BM=y +CONFIG_TEXTSEARCH_FSM=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_SWIOTLB=y +CONFIG_DMA_CMA=y +# CONFIG_DMA_PERNUMA_CMA is not set + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +# CONFIG_IRQ_POLL is not set +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +CONFIG_GENERIC_IOREMAP=y + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +# CONFIG_DEBUG_INFO is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_KGDB_QXFER_PKT=y +# CONFIG_KGDB is not set +# CONFIG_UBSAN is not set +# end of Generic Kernel Debugging Instruments + +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_LOCKUP_DETECTOR=y +CONFIG_SOFTLOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +CONFIG_WQ_WATCHDOG=y +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# end of Scheduler Debugging + +CONFIG_DEBUG_TIMEKEEPING=y + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +CONFIG_DEBUG_RWSEMS=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +CONFIG_DEBUG_ATOMIC_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +#CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set + +# +# Debug kernel data structures +# +CONFIG_DEBUG_LIST=y +CONFIG_DEBUG_PLIST=y +CONFIG_DEBUG_SG=y +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_EQS_DEBUG=y +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set + +# +# riscv Debugging +# + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +# CONFIG_RUNTIME_TESTING_MENU is not set +CONFIG_MEMTEST=y +# end of Kernel Testing and Coverage +# end of Kernel hacking diff --git a/bsp/meta-visionfive2/recipes-kernel/linux/files/patch/0001-support-jh7110-starfive.patch b/bsp/meta-visionfive2/recipes-kernel/linux/files/patch/0001-support-jh7110-starfive.patch new file mode 100644 index 0000000000000000000000000000000000000000..2e84348ce36f86e6da7ae6a918c81d03174bf2df --- /dev/null +++ b/bsp/meta-visionfive2/recipes-kernel/linux/files/patch/0001-support-jh7110-starfive.patch @@ -0,0 +1,63268 @@ +From 60e4dccc0d724a75a12f484896c170022ad0a60b Mon Sep 17 00:00:00 2001 +From: liu-yudong003 +Date: Thu, 20 Apr 2023 07:02:29 +0000 +Subject: [PATCH] support-jh7110-starfive + +--- + arch/riscv/Kconfig | 20 + + arch/riscv/Kconfig.socs | 13 + + arch/riscv/boot/dts/Makefile | 1 + + arch/riscv/boot/dts/starfive/Makefile | 2 + + .../boot/dts/starfive/codecs/sf_hdmi.dtsi | 20 + + .../boot/dts/starfive/codecs/sf_pwmdac.dtsi | 18 + + arch/riscv/boot/dts/starfive/jh7110-clk.dtsi | 126 + + .../dts/starfive/jh7110-visionfive-v2.dts | 208 ++ + .../dts/starfive/jh7110-visionfive-v2.dtsi | 835 +++++ + arch/riscv/boot/dts/starfive/jh7110.dtsi | 1809 +++++++++ + arch/riscv/configs/defconfig | 30 +- + arch/riscv/configs/starfive_jh7110_defconfig | 284 ++ + .../configs/starfive_visionfive2_defconfig | 287 ++ + drivers/Kconfig | 2 + + drivers/char/hw_random/Kconfig | 11 + + drivers/char/hw_random/Makefile | 1 + + drivers/char/hw_random/starfive-trng.c | 415 +++ + drivers/clk/Kconfig | 1 + + drivers/clk/Makefile | 1 + + drivers/clk/starfive/Kconfig | 34 + + drivers/clk/starfive/Makefile | 9 + + .../clk/starfive/clk-starfive-jh7110-aon.c | 165 + + .../clk/starfive/clk-starfive-jh7110-gen.c | 634 ++++ + .../clk/starfive/clk-starfive-jh7110-isp.c | 358 ++ + .../clk/starfive/clk-starfive-jh7110-pll.c | 455 +++ + .../clk/starfive/clk-starfive-jh7110-pll.h | 273 ++ + .../clk/starfive/clk-starfive-jh7110-stg.c | 170 + + .../clk/starfive/clk-starfive-jh7110-sys.c | 845 +++++ + .../clk/starfive/clk-starfive-jh7110-vout.c | 403 ++ + drivers/clk/starfive/clk-starfive-jh7110.h | 157 + + drivers/clocksource/Kconfig | 11 + + drivers/clocksource/Makefile | 1 + + drivers/clocksource/timer-starfive.c | 531 +++ + drivers/clocksource/timer-starfive.h | 110 + + drivers/cpufreq/Makefile | 4 + + drivers/cpufreq/cpufreq-dt-platdev.c | 1 + + drivers/crypto/Kconfig | 2 + + drivers/crypto/Makefile | 1 + + drivers/crypto/starfive/Kconfig | 18 + + drivers/crypto/starfive/Makefile | 2 + + drivers/crypto/starfive/jh7110/Makefile | 3 + + drivers/crypto/starfive/jh7110/jh7110-aes.c | 1802 +++++++++ + drivers/crypto/starfive/jh7110/jh7110-pka.c | 733 ++++ + drivers/crypto/starfive/jh7110/jh7110-regs.h | 237 ++ + drivers/crypto/starfive/jh7110/jh7110-sec.c | 432 +++ + drivers/crypto/starfive/jh7110/jh7110-sha.c | 1260 +++++++ + drivers/crypto/starfive/jh7110/jh7110-str.h | 276 ++ + .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 14 + + drivers/dma/jh7110-pl08x.c | 3200 ++++++++++++++++ + drivers/gpu/drm/i2c/tda998x_pin.c | 47 + + .../gpu/drm/panel/panel-jadard-jd9365da-h3.c | 704 ++++ + drivers/hwmon/Kconfig | 10 + + drivers/hwmon/Makefile | 1 + + drivers/hwmon/sfctemp.c | 392 ++ + drivers/mailbox/Kconfig | 15 + + drivers/mailbox/Makefile | 4 + + drivers/mailbox/starfive_mailbox-test.c | 419 +++ + drivers/mailbox/starfive_mailbox.c | 358 ++ + drivers/media/platform/Kconfig | 12 + + drivers/media/platform/Makefile | 2 + + drivers/media/platform/starfive/Kconfig | 43 + + drivers/media/platform/starfive/Makefile | 33 + + .../platform/starfive/v4l2_driver/Readme.txt | 10 + + .../starfive/v4l2_driver/imx219_mipi.c | 1583 ++++++++ + .../starfive/v4l2_driver/ov13850_mipi.c | 1930 ++++++++++ + .../starfive/v4l2_driver/ov4689_mipi.c | 2974 +++++++++++++++ + .../platform/starfive/v4l2_driver/ov5640.c | 3227 +++++++++++++++++ + .../platform/starfive/v4l2_driver/sc2235.c | 1918 ++++++++++ + .../starfive/v4l2_driver/stf_common.h | 183 + + .../platform/starfive/v4l2_driver/stf_csi.c | 424 +++ + .../platform/starfive/v4l2_driver/stf_csi.h | 57 + + .../starfive/v4l2_driver/stf_csi_hw_ops.c | 282 ++ + .../starfive/v4l2_driver/stf_csiphy.c | 356 ++ + .../starfive/v4l2_driver/stf_csiphy.h | 186 + + .../starfive/v4l2_driver/stf_csiphy_hw_ops.c | 331 ++ + .../starfive/v4l2_driver/stf_dmabuf.c | 123 + + .../starfive/v4l2_driver/stf_dmabuf.h | 10 + + .../platform/starfive/v4l2_driver/stf_dvp.c | 383 ++ + .../platform/starfive/v4l2_driver/stf_dvp.h | 65 + + .../starfive/v4l2_driver/stf_dvp_hw_ops.c | 185 + + .../platform/starfive/v4l2_driver/stf_event.c | 36 + + .../platform/starfive/v4l2_driver/stf_isp.c | 1501 ++++++++ + .../platform/starfive/v4l2_driver/stf_isp.h | 220 ++ + .../starfive/v4l2_driver/stf_isp_hw_ops.c | 1552 ++++++++ + .../starfive/v4l2_driver/stf_isp_ioctl.h | 131 + + .../platform/starfive/v4l2_driver/stf_video.c | 1551 ++++++++ + .../platform/starfive/v4l2_driver/stf_video.h | 80 + + .../platform/starfive/v4l2_driver/stf_vin.c | 1488 ++++++++ + .../platform/starfive/v4l2_driver/stf_vin.h | 180 + + .../starfive/v4l2_driver/stf_vin_hw_ops.c | 432 +++ + .../platform/starfive/v4l2_driver/stfcamss.c | 1384 +++++++ + .../platform/starfive/v4l2_driver/stfcamss.h | 120 + + drivers/mmc/host/Kconfig | 9 + + drivers/mmc/host/Makefile | 1 + + drivers/mmc/host/dw_mmc-starfive.c | 230 ++ + drivers/net/ethernet/stmicro/stmmac/Kconfig | 10 + + drivers/net/ethernet/stmicro/stmmac/Makefile | 3 +- + .../stmicro/stmmac/dwmac-starfive-plat.c | 177 + + drivers/pci/controller/pcie-plda.c | 1062 ++++++ + drivers/perf/riscv_pmu_sbi.c | 627 ++++ + drivers/phy/m31/7110-m31-dphy.h | 419 +++ + drivers/phy/m31/Kconfig | 15 + + drivers/phy/m31/Makefile | 3 + + drivers/phy/m31/phy-m31-dphy-tx0.c | 486 +++ + drivers/pinctrl/Kconfig | 1 + + drivers/pinctrl/Makefile | 1 + + drivers/pinctrl/starfive/Kconfig | 24 + + drivers/pinctrl/starfive/Makefile | 6 + + .../starfive/pinctrl-starfive-jh7110.c | 1808 +++++++++ + drivers/pinctrl/starfive/pinctrl-starfive.c | 481 +++ + drivers/pinctrl/starfive/pinctrl-starfive.h | 126 + + drivers/pwm/Kconfig | 10 + + drivers/pwm/Makefile | 1 + + drivers/pwm/pwm-starfive-ptc.c | 314 ++ + drivers/regulator/Kconfig | 10 + + drivers/regulator/Makefile | 1 + + drivers/regulator/starfive-jh7110-regulator.c | 126 + + drivers/reset/Kconfig | 1 + + drivers/reset/Makefile | 1 + + drivers/reset/starfive/Kconfig | 6 + + drivers/reset/starfive/Makefile | 2 + + .../reset/starfive/reset-starfive-jh7110.c | 273 ++ + drivers/rtc/Kconfig | 8 + + drivers/rtc/Makefile | 1 + + drivers/rtc/rtc-starfive.c | 743 ++++ + drivers/soc/Kconfig | 1 + + drivers/soc/Makefile | 3 +- + drivers/soc/sifive/Kconfig | 16 +- + drivers/soc/sifive/sifive_l2_cache.c | 39 + + drivers/soc/starfive/Kconfig | 8 + + drivers/soc/starfive/Makefile | 3 + + drivers/soc/starfive/jh7110_pmu.c | 380 ++ + drivers/spi/Kconfig | 10 +- + drivers/spi/Makefile | 1 + + drivers/spi/spi-pl022-starfive.c | 2874 +++++++++++++++ + drivers/usb/cdns3/Kconfig | 9 + + drivers/usb/cdns3/Makefile | 1 + + drivers/usb/cdns3/cdns3-starfive.c | 421 +++ + drivers/usb/cdns3/core.h | 1 + + drivers/usb/cdns3/host.c | 85 + + drivers/watchdog/Kconfig | 8 + + drivers/watchdog/Makefile | 3 + + drivers/watchdog/starfive-wdt.c | 887 +++++ + include/crypto/sha.h | 167 + + .../clock/starfive-jh7110-clkgen.h | 374 ++ + .../dt-bindings/clock/starfive-jh7110-isp.h | 47 + + .../dt-bindings/clock/starfive-jh7110-vout.h | 59 + + .../pinctrl/starfive,jh7110-pinfunc.h | 1578 ++++++++ + include/dt-bindings/power/jh7110-power.h | 18 + + include/dt-bindings/reset/starfive-jh7110.h | 217 ++ + include/linux/amba/bus.h | 2 +- + include/linux/dma/starfive-dma.h | 9 + + include/linux/regulator/jh7110.h | 24 + + include/soc/starfive/jh7110.h | 15 + + include/soc/starfive/jh7110_pmu.h | 111 + + include/video/stf-vin.h | 443 +++ + sound/soc/Kconfig | 2 +- + sound/soc/Makefile | 1 + + sound/soc/starfive/Kconfig | 70 + + sound/soc/starfive/Makefile | 13 + + sound/soc/starfive/pwmdac.h | 159 + + sound/soc/starfive/starfive_i2s.c | 1378 +++++++ + sound/soc/starfive/starfive_i2s.h | 160 + + sound/soc/starfive/starfive_pdm.c | 445 +++ + sound/soc/starfive/starfive_pdm.h | 63 + + sound/soc/starfive/starfive_pwmdac.c | 958 +++++ + sound/soc/starfive/starfive_pwmdac_pcm.c | 251 ++ + .../starfive/starfive_pwmdac_transmitter.c | 110 + + sound/soc/starfive/starfive_spdif.c | 617 ++++ + sound/soc/starfive/starfive_spdif.h | 179 + + sound/soc/starfive/starfive_spdif_pcm.c | 339 ++ + sound/soc/starfive/starfive_tdm.c | 704 ++++ + sound/soc/starfive/starfive_tdm.h | 153 + + 173 files changed, 61555 insertions(+), 14 deletions(-) + create mode 100644 arch/riscv/boot/dts/starfive/Makefile + create mode 100644 arch/riscv/boot/dts/starfive/codecs/sf_hdmi.dtsi + create mode 100644 arch/riscv/boot/dts/starfive/codecs/sf_pwmdac.dtsi + create mode 100755 arch/riscv/boot/dts/starfive/jh7110-clk.dtsi + create mode 100644 arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts + create mode 100755 arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi + create mode 100644 arch/riscv/boot/dts/starfive/jh7110.dtsi + create mode 100755 arch/riscv/configs/starfive_jh7110_defconfig + create mode 100755 arch/riscv/configs/starfive_visionfive2_defconfig + create mode 100644 drivers/char/hw_random/starfive-trng.c + create mode 100644 drivers/clk/starfive/Kconfig + create mode 100644 drivers/clk/starfive/Makefile + create mode 100755 drivers/clk/starfive/clk-starfive-jh7110-aon.c + create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-gen.c + create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-isp.c + create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-pll.c + create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-pll.h + create mode 100755 drivers/clk/starfive/clk-starfive-jh7110-stg.c + create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-sys.c + create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-vout.c + create mode 100644 drivers/clk/starfive/clk-starfive-jh7110.h + create mode 100644 drivers/clocksource/timer-starfive.c + create mode 100644 drivers/clocksource/timer-starfive.h + create mode 100644 drivers/crypto/starfive/Kconfig + create mode 100644 drivers/crypto/starfive/Makefile + create mode 100644 drivers/crypto/starfive/jh7110/Makefile + create mode 100644 drivers/crypto/starfive/jh7110/jh7110-aes.c + create mode 100644 drivers/crypto/starfive/jh7110/jh7110-pka.c + create mode 100644 drivers/crypto/starfive/jh7110/jh7110-regs.h + create mode 100644 drivers/crypto/starfive/jh7110/jh7110-sec.c + create mode 100644 drivers/crypto/starfive/jh7110/jh7110-sha.c + create mode 100644 drivers/crypto/starfive/jh7110/jh7110-str.h + create mode 100755 drivers/dma/jh7110-pl08x.c + create mode 100644 drivers/gpu/drm/i2c/tda998x_pin.c + create mode 100755 drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c + create mode 100644 drivers/hwmon/sfctemp.c + create mode 100644 drivers/mailbox/starfive_mailbox-test.c + create mode 100644 drivers/mailbox/starfive_mailbox.c + create mode 100644 drivers/media/platform/starfive/Kconfig + create mode 100644 drivers/media/platform/starfive/Makefile + create mode 100644 drivers/media/platform/starfive/v4l2_driver/Readme.txt + create mode 100644 drivers/media/platform/starfive/v4l2_driver/imx219_mipi.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/ov13850_mipi.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/ov4689_mipi.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/ov5640.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/sc2235.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_common.h + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_csi.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_csi.h + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_csi_hw_ops.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_csiphy.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_csiphy.h + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_csiphy_hw_ops.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_dmabuf.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_dmabuf.h + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_dvp.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_dvp.h + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_dvp_hw_ops.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_event.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_isp.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_isp.h + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_isp_hw_ops.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_isp_ioctl.h + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_video.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_video.h + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_vin.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_vin.h + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stf_vin_hw_ops.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stfcamss.c + create mode 100644 drivers/media/platform/starfive/v4l2_driver/stfcamss.h + create mode 100644 drivers/mmc/host/dw_mmc-starfive.c + create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive-plat.c + create mode 100644 drivers/pci/controller/pcie-plda.c + create mode 100644 drivers/perf/riscv_pmu_sbi.c + create mode 100644 drivers/phy/m31/7110-m31-dphy.h + create mode 100644 drivers/phy/m31/Kconfig + create mode 100644 drivers/phy/m31/Makefile + create mode 100755 drivers/phy/m31/phy-m31-dphy-tx0.c + create mode 100644 drivers/pinctrl/starfive/Kconfig + create mode 100644 drivers/pinctrl/starfive/Makefile + create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c + create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.c + create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.h + create mode 100644 drivers/pwm/pwm-starfive-ptc.c + create mode 100644 drivers/regulator/starfive-jh7110-regulator.c + create mode 100644 drivers/reset/starfive/Kconfig + create mode 100644 drivers/reset/starfive/Makefile + create mode 100644 drivers/reset/starfive/reset-starfive-jh7110.c + create mode 100644 drivers/rtc/rtc-starfive.c + create mode 100644 drivers/soc/starfive/Kconfig + create mode 100644 drivers/soc/starfive/Makefile + create mode 100755 drivers/soc/starfive/jh7110_pmu.c + create mode 100644 drivers/spi/spi-pl022-starfive.c + create mode 100644 drivers/usb/cdns3/cdns3-starfive.c + create mode 100644 drivers/watchdog/starfive-wdt.c + create mode 100644 include/crypto/sha.h + create mode 100755 include/dt-bindings/clock/starfive-jh7110-clkgen.h + create mode 100755 include/dt-bindings/clock/starfive-jh7110-isp.h + create mode 100755 include/dt-bindings/clock/starfive-jh7110-vout.h + create mode 100644 include/dt-bindings/pinctrl/starfive,jh7110-pinfunc.h + create mode 100755 include/dt-bindings/power/jh7110-power.h + create mode 100644 include/dt-bindings/reset/starfive-jh7110.h + create mode 100755 include/linux/dma/starfive-dma.h + create mode 100644 include/linux/regulator/jh7110.h + create mode 100644 include/soc/starfive/jh7110.h + create mode 100755 include/soc/starfive/jh7110_pmu.h + create mode 100644 include/video/stf-vin.h + create mode 100644 sound/soc/starfive/Kconfig + create mode 100644 sound/soc/starfive/Makefile + create mode 100644 sound/soc/starfive/pwmdac.h + create mode 100644 sound/soc/starfive/starfive_i2s.c + create mode 100644 sound/soc/starfive/starfive_i2s.h + create mode 100644 sound/soc/starfive/starfive_pdm.c + create mode 100644 sound/soc/starfive/starfive_pdm.h + create mode 100644 sound/soc/starfive/starfive_pwmdac.c + create mode 100644 sound/soc/starfive/starfive_pwmdac_pcm.c + create mode 100644 sound/soc/starfive/starfive_pwmdac_transmitter.c + create mode 100644 sound/soc/starfive/starfive_spdif.c + create mode 100644 sound/soc/starfive/starfive_spdif.h + create mode 100644 sound/soc/starfive/starfive_spdif_pcm.c + create mode 100644 sound/soc/starfive/starfive_tdm.c + create mode 100644 sound/soc/starfive/starfive_tdm.h + +diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig +index e52cd2cefe8e..23aaaae1d8d6 100644 +--- a/arch/riscv/Kconfig ++++ b/arch/riscv/Kconfig +@@ -15,6 +15,7 @@ config RISCV + select ARCH_32BIT_OFF_T if !64BIT + select ARCH_CLOCKSOURCE_INIT + select ARCH_SUPPORTS_ATOMIC_RMW ++ select ARCH_STACKWALK + select ARCH_HAS_BINFMT_FLAT + select ARCH_HAS_DEBUG_VM_PGTABLE + select ARCH_HAS_DEBUG_VIRTUAL if MMU +@@ -35,6 +36,7 @@ config RISCV + select CLONE_BACKWARDS + select CLINT_TIMER if !MMU + select COMMON_CLK ++ select CPU_PM if CPU_IDLE + select EDAC_SUPPORT + select GENERIC_ARCH_TOPOLOGY if SMP + select GENERIC_ATOMIC64 if !64BIT +@@ -423,6 +425,12 @@ config EFI + allow the kernel to be booted as an EFI application. This + is only useful on systems that have UEFI firmware. + ++config ARCH_SUSPEND_POSSIBLE ++ def_bool y ++ ++config ARCH_HIBERNATION_POSSIBLE ++ def_bool y ++ + endmenu + + config BUILTIN_DTB +@@ -434,7 +442,19 @@ menu "Power management options" + + source "kernel/power/Kconfig" + ++config ARCH_HIBERNATION_POSSIBLE ++ def_bool y ++ ++config ARCH_HIBERNATION_HEADER ++ def_bool y ++ depends on HIBERNATION ++ + endmenu + + source "arch/riscv/kvm/Kconfig" + source "drivers/firmware/Kconfig" ++menu "CPU Power Management" ++ ++source "drivers/cpuidle/Kconfig" ++ ++endmenu +diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs +index 8a55f6156661..69ee95076d9b 100644 +--- a/arch/riscv/Kconfig.socs ++++ b/arch/riscv/Kconfig.socs +@@ -10,6 +10,19 @@ config SOC_SIFIVE + help + This enables support for SiFive SoC platform hardware. + ++config SOC_STARFIVE ++ bool "StarFive Socs" ++ select OF_RESERVED_MEM ++ select SIFIVE_L2 ++ select SIFIVE_L2_FLUSH ++ select SIFIVE_PLIC ++ select CLK_STARFIVE_JH7110 ++ select RESET_STARFIVE_JH7110 ++ select PINCTRL_STARFIVE ++ select ARM_AMBA ++ help ++ StarFive SOC platform ++ + config SOC_VIRT + bool "QEMU Virt Machine" + select CLINT_TIMER if RISCV_M_MODE +diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile +index 3ea94ea0a18a..5db96e7b6b69 100644 +--- a/arch/riscv/boot/dts/Makefile ++++ b/arch/riscv/boot/dts/Makefile +@@ -2,5 +2,6 @@ + subdir-y += sifive + subdir-y += kendryte + subdir-y += microchip ++subdir-y += starfive + + obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix /, $(subdir-y)) +diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile +new file mode 100644 +index 000000000000..b194e4f6efb6 +--- /dev/null ++++ b/arch/riscv/boot/dts/starfive/Makefile +@@ -0,0 +1,2 @@ ++# SPDX-License-Identifier: GPL-2.0 ++dtb-$(CONFIG_SOC_STARFIVE) += jh7110-visionfive-v2.dtb \ +diff --git a/arch/riscv/boot/dts/starfive/codecs/sf_hdmi.dtsi b/arch/riscv/boot/dts/starfive/codecs/sf_hdmi.dtsi +new file mode 100644 +index 000000000000..22143c76ec3d +--- /dev/null ++++ b/arch/riscv/boot/dts/starfive/codecs/sf_hdmi.dtsi +@@ -0,0 +1,20 @@ ++&sound1 { ++ /* i2s + hdmi */ ++ simple-audio-card,dai-link@0 { ++ reg = <0>; ++ format = "i2s"; ++ bitclock-master = <&sndi2s0>; ++ frame-master = <&sndi2s0>; ++ mclk-fs = <256>; ++ status = "okay"; ++ ++ sndi2s0: cpu { ++ sound-dai = <&i2stx_4ch0>; ++ }; ++ ++ sndhdmi0: codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++}; ++ +diff --git a/arch/riscv/boot/dts/starfive/codecs/sf_pwmdac.dtsi b/arch/riscv/boot/dts/starfive/codecs/sf_pwmdac.dtsi +new file mode 100644 +index 000000000000..901231b93313 +--- /dev/null ++++ b/arch/riscv/boot/dts/starfive/codecs/sf_pwmdac.dtsi +@@ -0,0 +1,18 @@ ++&sound3 { ++ simple-audio-card,dai-link@0 { ++ reg = <0>; ++ format = "left_j"; ++ bitclock-master = <&sndcpu0>; ++ frame-master = <&sndcpu0>; ++ status = "okay"; ++ ++ sndcpu0: cpu { ++ sound-dai = <&pwmdac>; ++ }; ++ ++ codec { ++ sound-dai = <&pwmdac_codec>; ++ }; ++ }; ++}; ++ +diff --git a/arch/riscv/boot/dts/starfive/jh7110-clk.dtsi b/arch/riscv/boot/dts/starfive/jh7110-clk.dtsi +new file mode 100755 +index 000000000000..701bc213ca39 +--- /dev/null ++++ b/arch/riscv/boot/dts/starfive/jh7110-clk.dtsi +@@ -0,0 +1,126 @@ ++// SPDX-License-Identifier: GPL-2.0 OR MIT ++/* ++ * Copyright (C) 2022 StarFive Technology Co., Ltd. ++ */ ++ ++/ { ++ osc: osc { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <24000000>; ++ }; ++ ++ clk_ext_camera: clk-ext-camera { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <24000000>; ++ }; ++ ++ gmac1_rmii_refin: gmac1_rmii_refin { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <50000000>; ++ }; ++ ++ gmac1_rgmii_rxin: gmac1_rgmii_rxin { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <125000000>; ++ }; ++ ++ i2stx_bclk_ext: i2stx_bclk_ext { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <12288000>; ++ }; ++ ++ i2stx_lrck_ext: i2stx_lrck_ext { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <192000>; ++ }; ++ ++ i2srx_bclk_ext: i2srx_bclk_ext { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <12288000>; ++ }; ++ ++ i2srx_lrck_ext: i2srx_lrck_ext { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <192000>; ++ }; ++ ++ tdm_ext: tdm_ext { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <49152000>; ++ }; ++ ++ mclk_ext: mclk_ext { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <12288000>; ++ }; ++ ++ jtag_tck_inner: jtag_tck_inner { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <50000000>; ++ }; ++ ++ bist_apb: bist_apb { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <50000000>; ++ }; ++ ++ gmac0_rmii_refin: gmac0_rmii_refin { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <50000000>; ++ }; ++ ++ gmac0_rgmii_rxin: gmac0_rgmii_rxin { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <125000000>; ++ }; ++ ++ clk_rtc: clk_rtc { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ }; ++ ++ hdmitx0_pixelclk: hdmitx0_pixelclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <297000000>; ++ }; ++ ++ mipitx_dphy_rxesc: mipitx_dphy_rxesc { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <10000000>; ++ }; ++ ++ mipitx_dphy_txbytehs: mipitx_dphy_txbytehs { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <297000000>; ++ }; ++ ++ wm8960_mclk: wm8960_mclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <24576000>; ++ }; ++ ++ ac108_mclk: ac108_mclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <24000000>; ++ }; ++}; +diff --git a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts +new file mode 100644 +index 000000000000..7056854d8d8c +--- /dev/null ++++ b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts +@@ -0,0 +1,208 @@ ++// SPDX-License-Identifier: GPL-2.0 OR MIT ++/* ++ * Copyright (C) 2022 StarFive Technology Co., Ltd. ++ * Copyright (C) 2022 Hal Feng ++ */ ++ ++/dts-v1/; ++#include "jh7110-visionfive-v2.dtsi" ++#include "codecs/sf_hdmi.dtsi" ++ ++/ { ++ model = "StarFive VisionFive V2"; ++ compatible = "starfive,visionfive-v2", "starfive,jh7110"; ++ ++ gpio-restart { ++ compatible = "gpio-restart"; ++ gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; ++ priority = <160>; ++ }; ++ ++}; ++ ++&gpio { ++ uart0_pins: uart0-pins { ++ uart0-pins-tx { ++ starfive,pins = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ ++ uart0-pins-rx { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ }; ++ ++ i2c2_pins: i2c2-pins { ++ i2c2-pins-scl { ++ starfive,pins = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ ++ i2c2-pins-sda { ++ starfive,pins = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ }; ++ ++ mmc0_pins: mmc0-pins { ++ mmc0-pins-rest { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ sdcard1_pins: sdcard1-pins { ++ sdcard1-pins0 { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ ++ sdcard1-pins1 { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ ++ sdcard1-pins2 { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ ++ sdcard1-pins3 { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ ++ sdcard1-pins4 { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ ++ sdcard1-pins5 { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ }; ++ ++ inno_hdmi_pins: inno_hdmi-pins { ++ inno_hdmi-scl { ++ starfive,pins = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ ++ inno_hdmi-sda { ++ starfive,pins = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ inno_hdmi-cec-pins { ++ starfive,pins = ; ++ //starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-din = ; ++ }; ++ inno_hdmi-hpd-pins { ++ starfive,pins = ; ++ //starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ }; ++ ++ mclk_ext_pins: mclk_ext_pins { ++ mclk_ext_pins { ++ starfive,pins = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-din = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++ status = "okay"; ++}; ++ ++&i2c2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; ++ status = "okay"; ++}; ++ ++&sdio0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins>; ++ status = "okay"; ++}; ++ ++&sdio1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdcard1_pins>; ++ //cd-gpios = <&gpio 41 0>; ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&inno_hdmi_pins>; ++}; ++ ++&i2stx_4ch0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mclk_ext_pins>; ++ status = "okay"; ++}; ++ ++&cpu1 { ++ cpu-supply = <&cpu_vdd>; ++ clocks = <&clkgen JH7110_CPU_CORE>; ++ clock-names = "cpu"; ++}; +diff --git a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi +new file mode 100755 +index 000000000000..c79ba3a58af2 +--- /dev/null ++++ b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi +@@ -0,0 +1,835 @@ ++// SPDX-License-Identifier: GPL-2.0 OR MIT ++/* ++ * Copyright (C) 2022 StarFive Technology Co., Ltd. ++ * Copyright (C) 2022 Hal Feng ++ */ ++ ++/dts-v1/; ++#include ++#include ++#include ++#include "jh7110.dtsi" ++#include "codecs/sf_pwmdac.dtsi" ++ ++/ { ++ model = "StarFive VisionFive V2"; ++ compatible = "starfive,visionfive-v2", "starfive,jh7110"; ++ ++ aliases { ++ spi0 = &qspi; ++ gpio0 = &gpio; ++ ethernet0 = &gmac0; ++ ethernet1 = &gmac1; ++ mmc0 = &sdio0; ++ mmc1 = &sdio1; ++ serial0 = &uart0; ++ serial3 = &uart3; ++ i2c0 = &i2c0; ++ i2c1 = &i2c1; ++ i2c2 = &i2c2; ++ i2c3 = &i2c3; ++ i2c4 = &i2c4; ++ i2c5 = &i2c5; ++ i2c6 = &i2c6; ++ }; ++ ++ chosen { ++ linux,initrd-start = <0x0 0x46100000>; ++ linux,initrd-end = <0x0 0x4c000000>; ++ stdout-path = "serial0:115200"; ++ #bootargs = "debug console=ttyS0 rootwait"; ++ }; ++ ++ cpus { ++ timebase-frequency = <4000000>; ++ }; ++ ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x0 0x40000000 0x1 0x0>; ++ }; ++ ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x0 0x20000000>; ++ alignment = <0x0 0x1000>; ++ alloc-ranges = <0x0 0x80000000 0x0 0x20000000>; ++ linux,cma-default; ++ }; ++ ++ e24_mem: e24@c0000000 { ++ no-map; ++ reg = <0x0 0xc0110000 0x0 0xf0000>; ++ }; ++ ++ xrp_reserved: xrpbuffer@f0000000 { ++ reg = <0x0 0xf0000000 0x0 0x01ffffff ++ 0x0 0xf2000000 0x0 0x00001000 ++ 0x0 0xf2001000 0x0 0x00fff000 ++ 0x0 0xf3000000 0x0 0x00001000>; ++ }; ++ ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-ack { ++ gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>; ++ color = ; ++ function = LED_FUNCTION_HEARTBEAT; ++ linux,default-trigger = "heartbeat"; ++ label = "ack"; ++ }; ++ }; ++}; ++ ++&gpio { ++ i2c0_pins: i2c0-pins { ++ i2c0-pins-scl { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ ++ i2c0-pins-sda { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ }; ++ ++ i2c5_pins: i2c5-pins { ++ i2c5-pins-scl { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ ++ i2c5-pins-sda { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ }; ++ ++ i2c6_pins: i2c6-pins { ++ i2c6-pins-scl { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ ++ i2c6-pins-sda { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ }; ++ ++ csi_pins: csi-pins { ++ csi-pins-pwdn { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ pwmdac0_pins: pwmdac0-pins { ++ pwmdac0-pins-left { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ ++ pwmdac0-pins-right { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ pwm_pins: pwm-pins { ++ pwm_ch0-pins { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ ++ pwm_ch1-pins { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ ssp0_pins: ssp0-pins { ++ ssp0-pins_tx { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ ++ ssp0-pins_rx { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ ++ ssp0-pins_clk { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ ++ ssp0-pins_cs { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ pcie0_perst_default: pcie0_perst_default { ++ perst-pins { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ pcie0_perst_active: pcie0_perst_active { ++ perst-pins { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ pcie0_wake_default: pcie0_wake_default { ++ wake-pins { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ pcie0_clkreq_default: pcie0_clkreq_default { ++ clkreq-pins { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ pcie1_perst_default: pcie1_perst_default { ++ perst-pins { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ pcie1_perst_active: pcie1_perst_active { ++ perst-pins { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ pcie1_wake_default: pcie1_wake_default { ++ wake-pins { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ pcie1_clkreq_default: pcie1_clkreq_default { ++ clkreq-pins { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ usb_pins: usb-pins { ++ drive-vbus-pin { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ i2srx_pins: i2srx-pins { ++ i2srx-pins0 { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-doen = ; ++ starfive,pin-gpio-din = ; ++ }; ++ }; ++ ++ i2s_clk_pins: i2s-clk0 { ++ i2s-clk0_bclk { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-din = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ ++ i2s-clk0_lrclk { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-din = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++ ++ i2stx_pins: i2stx-pins { ++ i2stx-pins0 { ++ starfive,pins = ; ++ starfive,pinmux = ; ++ starfive,pin-ioconfig = ; ++ starfive,pin-gpio-dout = ; ++ starfive,pin-gpio-doen = ; ++ }; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&dma { ++ status = "okay"; ++}; ++ ++&trng { ++ status = "okay"; ++}; ++ ++&crypto { ++ status = "okay"; ++}; ++ ++&sec_dma { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <100000>; ++ i2c-sda-hold-time-ns = <300>; ++ i2c-sda-falling-time-ns = <510>; ++ i2c-scl-falling-time-ns = <510>; ++ auto_calc_scl_lhcnt; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ status = "okay"; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++ i2c-sda-hold-time-ns = <300>; ++ i2c-sda-falling-time-ns = <510>; ++ i2c-scl-falling-time-ns = <510>; ++ auto_calc_scl_lhcnt; ++ status = "okay"; ++ ++ seeed_plane_i2c@45 { ++ compatible = "seeed_panel"; ++ reg = <0x45>; ++ ++ port { ++ panel_out0: endpoint { ++ remote-endpoint = <&dsi0_output>; ++ }; ++ }; ++ }; ++ ++ tinker_ft5406: tinker_ft5406@38 { ++ compatible = "tinker_ft5406"; ++ reg = <0x38>; ++ }; ++ ++ panel_radxa@19 { ++ compatible ="starfive_jadard"; ++ reg = <0x19>; ++ reset-gpio = <&gpio 23 0>; ++ enable-gpio = <&gpio 22 0>; ++ ++ port { ++ panel_out1: endpoint { ++ remote-endpoint = <&dsi1_output>; ++ }; ++ }; ++ }; ++ ++ touchscreen@14 { ++ compatible = "goodix,gt911"; ++ reg = <0x14>; ++ irq-gpios = <&gpio 30 GPIO_ACTIVE_HIGH>; ++ reset-gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; ++ }; ++}; ++ ++&i2c5 { ++ clock-frequency = <100000>; ++ i2c-sda-hold-time-ns = <300>; ++ i2c-sda-falling-time-ns = <510>; ++ i2c-scl-falling-time-ns = <510>; ++ auto_calc_scl_lhcnt; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c5_pins>; ++ status = "okay"; ++ ++ eeprom@50 { ++ compatible = "atmel,24c04"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ pmic: axp15060_reg@36 { ++ compatible = "stf,axp15060-regulator"; ++ reg = <0x36>; ++ ++ regulators { ++ mipi_0p9: ALDO1 { ++ regulator-boot-on; ++ regulator-compatible = "mipi_0p9"; ++ regulator-name = "mipi_0p9"; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ }; ++ hdmi_0p9: ALDO5 { ++ regulator-boot-on; ++ regulator-compatible = "hdmi_0p9"; ++ regulator-name = "hdmi_0p9"; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ }; ++ hdmi_1p8: ALDO3 { ++ regulator-boot-on; ++ regulator-compatible = "hdmi_1p8"; ++ regulator-name = "hdmi_1p8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ cpu_vdd: DCDC2 { ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-compatible = "cpu_vdd"; ++ regulator-name = "cpu_vdd"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1540000>; ++ }; ++ }; ++ }; ++}; ++ ++&i2c6 { ++ clock-frequency = <100000>; ++ i2c-sda-hold-time-ns = <300>; ++ i2c-sda-falling-time-ns = <510>; ++ i2c-scl-falling-time-ns = <510>; ++ auto_calc_scl_lhcnt; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c6_pins>; ++ status = "okay"; ++ ++ imx219: imx219@10 { ++ compatible = "sony,imx219"; ++ reg = <0x10>; ++ clocks = <&clk_ext_camera>; ++ clock-names = "xclk"; ++ //reset-gpio = <&gpio 18 0>; ++ //DOVDD-supply = <&v2v8>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&csi_pins>; ++ rotation = <0>; ++ orientation = <1>; //CAMERA_ORIENTATION_BACK ++ ++ port { ++ /* CSI2 bus endpoint */ ++ imx219_to_csi2rx0: endpoint { ++ remote-endpoint = <&csi2rx0_from_imx219>; ++ bus-type = <4>; /* MIPI CSI-2 D-PHY */ ++ clock-lanes = <4>; ++ data-lanes = <0 1>; ++ lane-polarities = <0 0 0>; ++ link-frequencies = /bits/ 64 <456000000>; ++ }; ++ }; ++ }; ++}; ++ ++&sdio0 { ++ max-frequency = <100000000>; ++ card-detect-delay = <300>; ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ non-removable; ++ cap-mmc-hw-reset; ++ post-power-on-delay-ms = <200>; ++ status = "okay"; ++}; ++ ++&sdio1 { ++ max-frequency = <100000000>; ++ card-detect-delay = <300>; ++ bus-width = <4>; ++ no-sdio; ++ no-mmc; ++ broken-cd; ++ cap-sd-highspeed; ++ post-power-on-delay-ms = <200>; ++ status = "okay"; ++}; ++ ++&vin_sysctl { ++ /* when use dvp open this pinctrl*/ ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* CSI2 bus endpoint */ ++ csi2rx0_from_imx219: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&imx219_to_csi2rx0>; ++ bus-type = <4>; /* MIPI CSI-2 D-PHY */ ++ clock-lanes = <4>; ++ data-lanes = <0 1>; ++ lane-polarities = <0 0 0>; ++ status = "okay"; ++ }; ++ }; ++ }; ++}; ++ ++&sfctemp { ++ status = "okay"; ++}; ++ ++&jpu { ++ status = "okay"; ++}; ++ ++&vpu_dec { ++ status = "okay"; ++}; ++ ++&vpu_enc { ++ status = "okay"; ++}; ++ ++&gmac0 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ phy0: ethernet-phy@0 { ++ rxc_dly_en = <1>; ++ tx_delay_sel_fe = <5>; ++ tx_delay_sel = <0xa>; ++ tx_inverted_10 = <0x1>; ++ tx_inverted_100 = <0x1>; ++ tx_inverted_1000 = <0x1>; ++ }; ++}; ++ ++&gmac1 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ phy1: ethernet-phy@1 { ++ tx_delay_sel_fe = <5>; ++ tx_delay_sel = <0>; ++ rxc_dly_en = <0>; ++ tx_inverted_10 = <0x1>; ++ tx_inverted_100 = <0x1>; ++ tx_inverted_1000 = <0x0>; ++ }; ++}; ++ ++&gpu { ++ status = "okay"; ++}; ++ ++&pwmdac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwmdac0_pins>; ++ status = "okay"; ++}; ++ ++&i2srx_3ch { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_clk_pins &i2srx_pins>; ++ status = "disabled"; ++}; ++ ++&i2stx_4ch1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2stx_pins>; ++ status = "disabled"; ++}; ++ ++&pwmdac_codec { ++ status = "okay"; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ssp0_pins>; ++ status = "okay"; ++ ++ spi_dev0: spi@0 { ++ compatible = "rohm,dh2228fv"; ++ pl022,com-mode = <1>; ++ spi-max-frequency = <10000000>; ++ reg = <0>; ++ status = "okay"; ++ }; ++}; ++ ++&pcie0 { ++ pinctrl-names = "default", "perst-default", "perst-active"; ++ pinctrl-0 = <&pcie0_wake_default>, ++ <&pcie0_clkreq_default>; ++ pinctrl-1 = <&pcie0_perst_default>; ++ pinctrl-2 = <&pcie0_perst_active>; ++ status = "okay"; ++}; ++ ++&pcie1 { ++ pinctrl-names = "default", "perst-default", "perst-active"; ++ pinctrl-0 = <&pcie1_wake_default>, ++ <&pcie1_clkreq_default>; ++ pinctrl-1 = <&pcie1_perst_default>; ++ pinctrl-2 = <&pcie1_perst_active>; ++ status = "okay"; ++}; ++ ++&mailbox_contrl0 { ++ status = "okay"; ++}; ++ ++&mailbox_client0 { ++ status = "okay"; ++}; ++ ++&display { ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++ ++ hdmi_in: port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ hdmi_in_lcdc: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&dc_out_dpi1>; ++ }; ++ }; ++}; ++ ++&dc8200 { ++ status = "okay"; ++ ++ dc_out: port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ dc_out_dpi0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&hdmi_input0>; ++ }; ++ dc_out_dpi1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&hdmi_in_lcdc>; ++ }; ++ ++ dc_out_dpi2: endpoint@2 { ++ reg = <2>; ++ remote-endpoint = <&mipi_in>; ++ }; ++ }; ++}; ++ ++&rgb_output { ++ status = "disabled"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ port@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0>; ++ hdmi_input0:endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&dc_out_dpi0>; ++ }; ++ }; ++ }; ++}; ++ ++&dsi_output { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ mipi_in: endpoint { ++ remote-endpoint = <&dc_out_dpi2>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ sf_dpi_output: endpoint { ++ remote-endpoint = <&dsi_in_port>; ++ }; ++ }; ++ }; ++}; ++ ++&mipi_dsi { ++ status = "disabled"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ dsi0_output: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&panel_out0>; ++ }; ++ ++ dsi1_output: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&panel_out1>; ++ }; ++ }; ++ ++ port@1{ ++ reg = <1>; ++ dsi_in_port: endpoint { ++ remote-endpoint = <&sf_dpi_output>; ++ }; ++ }; ++ ++ }; ++}; ++ ++&mipi_dphy { ++ status = "disabled"; ++}; ++ ++&co_process { ++ status = "okay"; ++}; ++ ++&usbdrd30 { ++ clocks = <&clkgen JH7110_USB_125M>, ++ <&clkgen JH7110_USB0_CLK_APP_125>, ++ <&clkgen JH7110_USB0_CLK_LPM>, ++ <&clkgen JH7110_USB0_CLK_STB>, ++ <&clkgen JH7110_USB0_CLK_USB_APB>, ++ <&clkgen JH7110_USB0_CLK_AXI>, ++ <&clkgen JH7110_USB0_CLK_UTMI_APB>; ++ clock-names = "125m","app","lpm","stb","apb","axi","utmi"; ++ resets = <&rstgen RSTN_U0_CDN_USB_PWRUP>, ++ <&rstgen RSTN_U0_CDN_USB_APB>, ++ <&rstgen RSTN_U0_CDN_USB_AXI>, ++ <&rstgen RSTN_U0_CDN_USB_UTMI_APB>; ++ reset-names = "pwrup","apb","axi","utmi"; ++ starfive,usb2-only; ++ dr_mode = "peripheral"; /*host or peripheral*/ ++ status = "okay"; ++}; ++ ++&xrp { ++ status = "okay"; ++}; ++ ++&ptc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm_pins>; ++ status = "okay"; ++}; +diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi +new file mode 100644 +index 000000000000..e5813f3809d5 +--- /dev/null ++++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi +@@ -0,0 +1,1809 @@ ++// SPDX-License-Identifier: GPL-2.0 OR MIT ++/* ++ * Copyright (C) 2022 StarFive Technology Co., Ltd. ++ * Copyright (C) 2022 Hal Feng ++ */ ++ ++/dts-v1/; ++#include "jh7110-clk.dtsi" ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/ { ++ compatible = "starfive,jh7110"; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ++ cluster0_opp: opp-table-0 { ++ compatible = "operating-points-v2"; ++ opp-shared; ++ opp-375000000 { ++ opp-hz = /bits/ 64 <375000000>; ++ opp-microvolt = <800000>; ++ }; ++ opp-500000000 { ++ opp-hz = /bits/ 64 <500000000>; ++ opp-microvolt = <800000>; ++ }; ++ opp-750000000 { ++ opp-hz = /bits/ 64 <750000000>; ++ opp-microvolt = <800000>; ++ opp-suspend; ++ }; ++ opp-1500000000 { ++ opp-hz = /bits/ 64 <1500000000>; ++ opp-microvolt = <1040000>; ++ }; ++ }; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu0: cpu@0 { ++ compatible = "sifive,u74-mc", "riscv"; ++ reg = <0>; ++ d-cache-block-size = <64>; ++ d-cache-sets = <64>; ++ d-cache-size = <8192>; ++ d-tlb-sets = <1>; ++ d-tlb-size = <40>; ++ device_type = "cpu"; ++ i-cache-block-size = <64>; ++ i-cache-sets = <64>; ++ i-cache-size = <16384>; ++ i-tlb-sets = <1>; ++ i-tlb-size = <40>; ++ mmu-type = "riscv,sv39"; ++ next-level-cache = <&cachectrl>; ++ riscv,isa = "rv64imac"; ++ tlb-split; ++ #cooling-cells = <2>; ++ status = "disabled"; ++ ++ cpu0intctrl: interrupt-controller { ++ #interrupt-cells = <1>; ++ compatible = "riscv,cpu-intc"; ++ interrupt-controller; ++ }; ++ }; ++ ++ cpu1: cpu@1 { ++ compatible = "sifive,u74-mc", "riscv"; ++ reg = <1>; ++ d-cache-block-size = <64>; ++ d-cache-sets = <64>; ++ d-cache-size = <32768>; ++ d-tlb-sets = <1>; ++ d-tlb-size = <40>; ++ device_type = "cpu"; ++ i-cache-block-size = <64>; ++ i-cache-sets = <64>; ++ i-cache-size = <32768>; ++ i-tlb-sets = <1>; ++ i-tlb-size = <40>; ++ mmu-type = "riscv,sv39"; ++ next-level-cache = <&cachectrl>; ++ riscv,isa = "rv64imafdc"; ++ tlb-split; ++ #cooling-cells = <2>; ++ status = "okay"; ++ operating-points-v2 = <&cluster0_opp>; ++ ++ cpu1intctrl: interrupt-controller { ++ #interrupt-cells = <1>; ++ compatible = "riscv,cpu-intc"; ++ interrupt-controller; ++ }; ++ }; ++ ++ cpu2: cpu@2 { ++ compatible = "sifive,u74-mc", "riscv"; ++ reg = <2>; ++ d-cache-block-size = <64>; ++ d-cache-sets = <64>; ++ d-cache-size = <32768>; ++ d-tlb-sets = <1>; ++ d-tlb-size = <40>; ++ device_type = "cpu"; ++ i-cache-block-size = <64>; ++ i-cache-sets = <64>; ++ i-cache-size = <32768>; ++ i-tlb-sets = <1>; ++ i-tlb-size = <40>; ++ mmu-type = "riscv,sv39"; ++ next-level-cache = <&cachectrl>; ++ riscv,isa = "rv64imafdc"; ++ tlb-split; ++ #cooling-cells = <2>; ++ status = "okay"; ++ operating-points-v2 = <&cluster0_opp>; ++ ++ cpu2intctrl: interrupt-controller { ++ #interrupt-cells = <1>; ++ compatible = "riscv,cpu-intc"; ++ interrupt-controller; ++ }; ++ }; ++ ++ cpu3: cpu@3 { ++ compatible = "sifive,u74-mc", "riscv"; ++ reg = <3>; ++ d-cache-block-size = <64>; ++ d-cache-sets = <64>; ++ d-cache-size = <32768>; ++ d-tlb-sets = <1>; ++ d-tlb-size = <40>; ++ device_type = "cpu"; ++ i-cache-block-size = <64>; ++ i-cache-sets = <64>; ++ i-cache-size = <32768>; ++ i-tlb-sets = <1>; ++ i-tlb-size = <40>; ++ mmu-type = "riscv,sv39"; ++ next-level-cache = <&cachectrl>; ++ riscv,isa = "rv64imafdc"; ++ tlb-split; ++ #cooling-cells = <2>; ++ status = "okay"; ++ operating-points-v2 = <&cluster0_opp>; ++ ++ cpu3intctrl: interrupt-controller { ++ #interrupt-cells = <1>; ++ compatible = "riscv,cpu-intc"; ++ interrupt-controller; ++ }; ++ }; ++ ++ cpu4: cpu@4 { ++ compatible = "sifive,u74-mc", "riscv"; ++ reg = <4>; ++ d-cache-block-size = <64>; ++ d-cache-sets = <64>; ++ d-cache-size = <32768>; ++ d-tlb-sets = <1>; ++ d-tlb-size = <40>; ++ device_type = "cpu"; ++ i-cache-block-size = <64>; ++ i-cache-sets = <64>; ++ i-cache-size = <32768>; ++ i-tlb-sets = <1>; ++ i-tlb-size = <40>; ++ mmu-type = "riscv,sv39"; ++ next-level-cache = <&cachectrl>; ++ riscv,isa = "rv64imafdc"; ++ tlb-split; ++ #cooling-cells = <2>; ++ status = "okay"; ++ operating-points-v2 = <&cluster0_opp>; ++ ++ cpu4intctrl: interrupt-controller { ++ #interrupt-cells = <1>; ++ compatible = "riscv,cpu-intc"; ++ interrupt-controller; ++ }; ++ }; ++ }; ++ ++ soc: soc { ++ compatible = "simple-bus"; ++ interrupt-parent = <&plic>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ #clock-cells = <1>; ++ ranges; ++ ++ cachectrl: cache-controller@2010000 { ++ compatible = "sifive,fu740-c000-ccache", "cache"; ++ reg = <0x0 0x2010000 0x0 0x4000 0x0 0x8000000 0x0 0x2000000>; ++ reg-names = "control", "sideband"; ++ interrupts = <1 3 4 2>; ++ cache-block-size = <64>; ++ cache-level = <2>; ++ cache-sets = <2048>; ++ cache-size = <2097152>; ++ cache-unified; ++ }; ++ ++ aon_syscon: aon_syscon@17010000 { ++ compatible = "syscon"; ++ reg = <0x0 0x17010000 0x0 0x1000>; ++ }; ++ ++ phyctrl0: multi-phyctrl@10210000 { ++ compatible = "starfive,phyctrl"; ++ reg = <0x0 0x10210000 0x0 0x10000>; ++ }; ++ ++ phyctrl1: pcie1-phyctrl@10220000 { ++ compatible = "starfive,phyctrl"; ++ reg = <0x0 0x10220000 0x0 0x10000>; ++ }; ++ ++ stg_syscon: stg_syscon@10240000 { ++ compatible = "syscon"; ++ reg = <0x0 0x10240000 0x0 0x1000>; ++ }; ++ ++ sys_syscon: sys_syscon@13030000 { ++ compatible = "syscon"; ++ reg = <0x0 0x13030000 0x0 0x1000>; ++ }; ++ ++ clint: clint@2000000 { ++ compatible = "riscv,clint0"; ++ reg = <0x0 0x2000000 0x0 0x10000>; ++ reg-names = "control"; ++ interrupts-extended = <&cpu0intctrl 3 &cpu0intctrl 7 ++ &cpu1intctrl 3 &cpu1intctrl 7 ++ &cpu2intctrl 3 &cpu2intctrl 7 ++ &cpu3intctrl 3 &cpu3intctrl 7 ++ &cpu4intctrl 3 &cpu4intctrl 7>; ++ #interrupt-cells = <1>; ++ }; ++ ++ plic: plic@c000000 { ++ compatible = "riscv,plic0"; ++ reg = <0x0 0xc000000 0x0 0x4000000>; ++ reg-names = "control"; ++ interrupts-extended = <&cpu0intctrl 11 ++ &cpu1intctrl 11 &cpu1intctrl 9 ++ &cpu2intctrl 11 &cpu2intctrl 9 ++ &cpu3intctrl 11 &cpu3intctrl 9 ++ &cpu4intctrl 11 &cpu4intctrl 9>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ riscv,max-priority = <7>; ++ riscv,ndev = <136>; ++ }; ++ ++ clkgen: clock-controller { ++ compatible = "starfive,jh7110-clkgen"; ++ reg = <0x0 0x13020000 0x0 0x10000>, ++ <0x0 0x10230000 0x0 0x10000>, ++ <0x0 0x17000000 0x0 0x10000>; ++ reg-names = "sys", "stg", "aon"; ++ clocks = <&osc>, <&gmac1_rmii_refin>, ++ <&gmac1_rgmii_rxin>, ++ <&i2stx_bclk_ext>, <&i2stx_lrck_ext>, ++ <&i2srx_bclk_ext>, <&i2srx_lrck_ext>, ++ <&tdm_ext>, <&mclk_ext>, ++ <&jtag_tck_inner>, <&bist_apb>, ++ <&clk_rtc>, ++ <&gmac0_rmii_refin>, <&gmac0_rgmii_rxin>; ++ clock-names = "osc", "gmac1_rmii_refin", ++ "gmac1_rgmii_rxin", ++ "i2stx_bclk_ext", "i2stx_lrck_ext", ++ "i2srx_bclk_ext", "i2srx_lrck_ext", ++ "tdm_ext", "mclk_ext", ++ "jtag_tck_inner", "bist_apb", ++ "clk_rtc", ++ "gmac0_rmii_refin", "gmac0_rgmii_rxin"; ++ #clock-cells = <1>; ++ starfive,sys-syscon = <&sys_syscon 0x18 0x1c ++ 0x20 0x24 0x28 0x2c 0x30 0x34>; ++ status = "okay"; ++ }; ++ ++ clkvout: clock-controller@295C0000 { ++ compatible = "starfive,jh7110-clk-vout"; ++ reg = <0x0 0x295C0000 0x0 0x10000>; ++ reg-names = "vout"; ++ clocks = <&hdmitx0_pixelclk>, ++ <&mipitx_dphy_rxesc>, ++ <&mipitx_dphy_txbytehs>, ++ <&clkgen JH7110_VOUT_SRC>, ++ <&clkgen JH7110_VOUT_TOP_CLK_VOUT_AHB>; ++ clock-names = "hdmitx0_pixelclk", ++ "mipitx_dphy_rxesc", ++ "mipitx_dphy_txbytehs", ++ "vout_src", ++ "vout_top_ahb"; ++ resets = <&rstgen RSTN_U0_DOM_VOUT_TOP_SRC>; ++ reset-names = "vout_src"; ++ #clock-cells = <1>; ++ power-domains = <&pwrc JH7110_PD_VOUT>; ++ status = "okay"; ++ }; ++ ++ clkisp: clock-controller@19810000 { ++ compatible = "starfive,jh7110-clk-isp"; ++ reg = <0x0 0x19810000 0x0 0x10000>; ++ reg-names = "isp"; ++ #clock-cells = <1>; ++ clocks = <&clkgen JH7110_ISP_TOP_CLK_DVP>, ++ <&clkgen JH7110_ISP_TOP_CLK_ISPCORE_2X>, ++ <&clkgen JH7110_ISP_TOP_CLK_ISP_AXI>, ++ <&clkgen JH7110_NOC_BUS_CLK_ISP_AXI>; ++ clock-names = "u0_dom_isp_top_clk_dom_isp_top_clk_dvp", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_ispcore_2x", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_isp_axi", ++ "u0_sft7110_noc_bus_clk_isp_axi"; ++ resets = <&rstgen RSTN_U0_DOM_ISP_TOP_N>, ++ <&rstgen RSTN_U0_DOM_ISP_TOP_AXI>, ++ <&rstgen RSTN_U0_NOC_BUS_ISP_AXI_N>; ++ reset-names = "rst_isp_top_n", "rst_isp_top_axi", ++ "rst_isp_noc_bus_n"; ++ power-domains = <&pwrc JH7110_PD_ISP>; ++ status = "okay"; ++ }; ++ ++ qspi: spi@13010000 { ++ compatible = "cdns,qspi-nor"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x13010000 0x0 0x10000 ++ 0x0 0x21000000 0x0 0x400000>; ++ interrupts = <25>; ++ clocks = <&clkgen JH7110_QSPI_CLK_REF>, ++ <&clkgen JH7110_QSPI_CLK_APB>, ++ <&clkgen JH7110_AHB1>, ++ <&clkgen JH7110_QSPI_CLK_AHB>; ++ clock-names = "clk_ref", ++ "clk_apb", ++ "ahb1", ++ "clk_ahb"; ++ resets = <&rstgen RSTN_U0_CDNS_QSPI_APB>, ++ <&rstgen RSTN_U0_CDNS_QSPI_AHB>, ++ <&rstgen RSTN_U0_CDNS_QSPI_REF>; ++ ++ cdns,fifo-depth = <256>; ++ cdns,fifo-width = <4>; ++ cdns,trigger-address = <0x0>; ++ spi-max-frequency = <250000000>; ++ ++ nor_flash: nor-flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg=<0>; ++ cdns,read-delay = <5>; ++ spi-max-frequency = <100000000>; ++ cdns,tshsl-ns = <1>; ++ cdns,tsd2d-ns = <1>; ++ cdns,tchsh-ns = <1>; ++ cdns,tslch-ns = <1>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ spl@0 { ++ reg = <0x0 0x40000>; ++ }; ++ uboot@100000 { ++ reg = <0x100000 0x300000>; ++ }; ++ data@f00000 { ++ reg = <0xf00000 0x100000>; ++ }; ++ }; ++ }; ++ }; ++ ++ otp: otp@17050000 { ++ compatible = "starfive,jh7110-otp"; ++ reg = <0x0 0x17050000 0x0 0x10000>; ++ clock-frequency = <4000000>; ++ clocks = <&clkgen JH7110_OTPC_CLK_APB>; ++ clock-names = "apb"; ++ }; ++ ++ usbdrd30: usbdrd{ ++ compatible = "starfive,jh7110-cdns3"; ++ reg = <0x0 0x10210000 0x0 0x1000>, ++ <0x0 0x10200000 0x0 0x1000>; ++ clocks = <&clkgen JH7110_USB_125M>, ++ <&clkgen JH7110_USB0_CLK_APP_125>, ++ <&clkgen JH7110_USB0_CLK_LPM>, ++ <&clkgen JH7110_USB0_CLK_STB>, ++ <&clkgen JH7110_USB0_CLK_USB_APB>, ++ <&clkgen JH7110_USB0_CLK_AXI>, ++ <&clkgen JH7110_USB0_CLK_UTMI_APB>, ++ <&clkgen JH7110_PCIE0_CLK_APB>; ++ clock-names = "125m","app","lpm","stb","apb","axi","utmi", "phy"; ++ resets = <&rstgen RSTN_U0_CDN_USB_PWRUP>, ++ <&rstgen RSTN_U0_CDN_USB_APB>, ++ <&rstgen RSTN_U0_CDN_USB_AXI>, ++ <&rstgen RSTN_U0_CDN_USB_UTMI_APB>, ++ <&rstgen RSTN_U0_PLDA_PCIE_APB>; ++ reset-names = "pwrup","apb","axi","utmi", "phy"; ++ starfive,stg-syscon = <&stg_syscon 0x4 0xc4 0x148 0x1f4>; ++ starfive,sys-syscon = <&sys_syscon 0x18>; ++ status = "disabled"; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ #interrupt-cells = <1>; ++ ranges; ++ usbdrd_cdns3: usb@10100000 { ++ compatible = "cdns,usb3"; ++ reg = <0x0 0x10100000 0x0 0x10000>, ++ <0x0 0x10110000 0x0 0x10000>, ++ <0x0 0x10120000 0x0 0x10000>; ++ reg-names = "otg", "xhci", "dev"; ++ interrupts = <100>, <108>, <110>; ++ interrupt-names = "host", "peripheral", "otg"; ++ phy-names = "cdns3,usb3-phy", "cnds3,usb2-phy"; ++ maximum-speed = "super-speed"; ++ }; ++ }; ++ ++ timer: timer@13050000 { ++ compatible = "starfive,jh7110-timers"; ++ reg = <0x0 0x13050000 0x0 0x10000>; ++ interrupts = <69>, <70>, <71> ,<72>; ++ interrupt-names = "timer0", "timer1", ++ "timer2", "timer3"; ++ clocks = <&clkgen JH7110_TIMER_CLK_TIMER0>, ++ <&clkgen JH7110_TIMER_CLK_TIMER1>, ++ <&clkgen JH7110_TIMER_CLK_TIMER2>, ++ <&clkgen JH7110_TIMER_CLK_TIMER3>, ++ <&clkgen JH7110_TIMER_CLK_APB>; ++ clock-names = "timer0", "timer1", ++ "timer2", "timer3", "apb_clk"; ++ resets = <&rstgen RSTN_U0_TIMER_TIMER0>, ++ <&rstgen RSTN_U0_TIMER_TIMER1>, ++ <&rstgen RSTN_U0_TIMER_TIMER2>, ++ <&rstgen RSTN_U0_TIMER_TIMER3>, ++ <&rstgen RSTN_U0_TIMER_APB>; ++ reset-names = "timer0", "timer1", ++ "timer2", "timer3", "apb_rst"; ++ clock-frequency = <24000000>; ++ status = "okay"; ++ }; ++ ++ wdog: wdog@13070000 { ++ compatible = "starfive,jh7110-wdt"; ++ reg = <0x0 0x13070000 0x0 0x10000>; ++ interrupts = <68>; ++ interrupt-names = "wdog"; ++ clocks = <&clkgen JH7110_DSKIT_WDT_CLK_WDT>, ++ <&clkgen JH7110_DSKIT_WDT_CLK_APB>; ++ clock-names = "core_clk", "apb_clk"; ++ resets = <&rstgen RSTN_U0_DSKIT_WDT_APB>, ++ <&rstgen RSTN_U0_DSKIT_WDT_CORE>; ++ reset-names = "rst_apb", "rst_core"; ++ timeout-sec = <15>; ++ status = "okay"; ++ }; ++ ++ rtc: rtc@17040000 { ++ compatible = "starfive,jh7110-rtc"; ++ reg = <0x0 0x17040000 0x0 0x10000>; ++ interrupts = <10>, <11>, <12>; ++ interrupt-names = "rtc_ms_pulse", "rtc_sec_pulse", "rtc"; ++ clocks = <&clkgen JH7110_RTC_HMS_CLK_APB>, ++ <&clkgen JH7110_RTC_HMS_CLK_CAL>; ++ clock-names = "pclk", "cal_clk"; ++ resets = <&rstgen RSTN_U0_RTC_HMS_OSC32K>, ++ <&rstgen RSTN_U0_RTC_HMS_APB>, ++ <&rstgen RSTN_U0_RTC_HMS_CAL>; ++ reset-names = "rst_osc", "rst_apb", "rst_cal"; ++ rtc,cal-clock-freq = <1000000>; ++ status = "okay"; ++ }; ++ ++ pwrc: power-controller@17030000 { ++ compatible = "starfive,jh7110-pmu"; ++ reg = <0x0 0x17030000 0x0 0x10000>; ++ interrupts = <111>; ++ #power-domain-cells = <1>; ++ status = "okay"; ++ }; ++ ++ uart0: serial@10000000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x0 0x10000000 0x0 0x10000>; ++ reg-io-width = <4>; ++ reg-shift = <2>; ++ clocks = <&clkgen JH7110_UART0_CLK_CORE>, ++ <&clkgen JH7110_UART0_CLK_APB>; ++ clock-names = "baudclk", "apb_pclk"; ++ resets = <&rstgen RSTN_U0_DW_UART_APB>, ++ <&rstgen RSTN_U0_DW_UART_CORE>; ++ interrupts = <32>; ++ status = "disabled"; ++ }; ++ ++ uart1: serial@10010000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x0 0x10010000 0x0 0x10000>; ++ reg-io-width = <4>; ++ reg-shift = <2>; ++ clocks = <&clkgen JH7110_UART1_CLK_CORE>, ++ <&clkgen JH7110_UART1_CLK_APB>; ++ clock-names = "baudclk", "apb_pclk"; ++ resets = <&rstgen RSTN_U1_DW_UART_APB>, ++ <&rstgen RSTN_U1_DW_UART_CORE>; ++ interrupts = <33>; ++ status = "disabled"; ++ }; ++ ++ uart2: serial@10020000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x0 0x10020000 0x0 0x10000>; ++ reg-io-width = <4>; ++ reg-shift = <2>; ++ clocks = <&clkgen JH7110_UART2_CLK_CORE>, ++ <&clkgen JH7110_UART2_CLK_APB>; ++ clock-names = "baudclk", "apb_pclk"; ++ resets = <&rstgen RSTN_U2_DW_UART_APB>, ++ <&rstgen RSTN_U2_DW_UART_CORE>; ++ interrupts = <34>; ++ status = "disabled"; ++ }; ++ ++ uart3: serial@12000000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x0 0x12000000 0x0 0x10000>; ++ reg-io-width = <4>; ++ reg-shift = <2>; ++ clocks = <&clkgen JH7110_UART3_CLK_CORE>, ++ <&clkgen JH7110_UART3_CLK_APB>; ++ clock-names = "baudclk", "apb_pclk"; ++ resets = <&rstgen RSTN_U3_DW_UART_APB>, ++ <&rstgen RSTN_U3_DW_UART_CORE>; ++ interrupts = <45>; ++ status = "disabled"; ++ }; ++ ++ uart4: serial@12010000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x0 0x12010000 0x0 0x10000>; ++ reg-io-width = <4>; ++ reg-shift = <2>; ++ clocks = <&clkgen JH7110_UART4_CLK_CORE>, ++ <&clkgen JH7110_UART4_CLK_APB>; ++ clock-names = "baudclk", "apb_pclk"; ++ resets = <&rstgen RSTN_U4_DW_UART_APB>, ++ <&rstgen RSTN_U4_DW_UART_CORE>; ++ interrupts = <46>; ++ status = "disabled"; ++ }; ++ ++ uart5: serial@12020000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x0 0x12020000 0x0 0x10000>; ++ reg-io-width = <4>; ++ reg-shift = <2>; ++ clocks = <&clkgen JH7110_UART5_CLK_CORE>, ++ <&clkgen JH7110_UART5_CLK_APB>; ++ clock-names = "baudclk", "apb_pclk"; ++ resets = <&rstgen RSTN_U5_DW_UART_APB>, ++ <&rstgen RSTN_U5_DW_UART_CORE>; ++ interrupts = <47>; ++ status = "disabled"; ++ }; ++ ++ dma: dma-controller@16050000 { ++ compatible = "starfive,jh7110-dma", "snps,axi-dma-1.01a"; ++ reg = <0x0 0x16050000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_DMA1P_CLK_AXI>, ++ <&clkgen JH7110_DMA1P_CLK_AHB>, ++ <&clkgen JH7110_NOC_BUS_CLK_STG_AXI>; ++ clock-names = "core-clk", "cfgr-clk", "stg_clk"; ++ resets = <&rstgen RSTN_U0_DW_DMA1P_AXI>, ++ <&rstgen RSTN_U0_DW_DMA1P_AHB>, ++ <&rstgen RSTN_U0_NOC_BUS_STG_AXI_N>; ++ reset-names = "rst_axi", "rst_ahb", "rst_stg"; ++ interrupts = <73>; ++ #dma-cells = <2>; ++ dma-channels = <4>; ++ snps,dma-masters = <1>; ++ snps,data-width = <3>; ++ snps,num-hs-if = <56>; ++ snps,block-size = <65536 65536 65536 65536>; ++ snps,priority = <0 1 2 3>; ++ snps,axi-max-burst-len = <16>; ++ status = "disabled"; ++ }; ++ ++ gpio: gpio@13040000 { ++ compatible = "starfive,jh7110-sys-pinctrl"; ++ reg = <0x0 0x13040000 0x0 0x10000>; ++ reg-names = "control"; ++ clocks = <&clkgen JH7110_SYS_IOMUX_PCLK>; ++ resets = <&rstgen RSTN_U0_SYS_IOMUX_PRESETN>; ++ interrupts = <86>; ++ interrupt-controller; ++ #gpio-cells = <2>; ++ ngpios = <64>; ++ status = "okay"; ++ }; ++ ++ gpioa: gpio@17020000 { ++ compatible = "starfive,jh7110-aon-pinctrl"; ++ reg = <0x0 0x17020000 0x0 0x10000>; ++ reg-names = "control"; ++ resets = <&rstgen RSTN_U0_AON_IOMUX_PRESETN>; ++ interrupts = <85>; ++ interrupt-controller; ++ #gpio-cells = <2>; ++ ngpios = <4>; ++ status = "okay"; ++ }; ++ ++ sfctemp: tmon@120e0000 { ++ compatible = "starfive,jh7110-temp"; ++ reg = <0x0 0x120e0000 0x0 0x10000>; ++ interrupts = <81>; ++ clocks = <&clkgen JH7110_TEMP_SENSOR_CLK_TEMP>, ++ <&clkgen JH7110_TEMP_SENSOR_CLK_APB>; ++ clock-names = "sense", "bus"; ++ resets = <&rstgen RSTN_U0_TEMP_SENSOR_TEMP>, ++ <&rstgen RSTN_U0_TEMP_SENSOR_APB>; ++ reset-names = "sense", "bus"; ++ #thermal-sensor-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ thermal-zones { ++ cpu-thermal { ++ polling-delay-passive = <250>; ++ polling-delay = <15000>; ++ ++ thermal-sensors = <&sfctemp>; ++ ++ trips { ++ cpu_alert0: cpu_alert0 { ++ /* milliCelsius */ ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ cpu_crit: cpu_crit { ++ /* milliCelsius */ ++ temperature = <90000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ cooling-maps { ++ map0 { ++ trip = <&cpu_alert0>; ++ cooling-device = ++ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ }; ++ ++ trng: trng@1600C000 { ++ compatible = "starfive,jh7110-trng"; ++ reg = <0x0 0x1600C000 0x0 0x4000>; ++ clocks = <&clkgen JH7110_SEC_HCLK>, ++ <&clkgen JH7110_SEC_MISCAHB_CLK>; ++ clock-names = "hclk", "ahb"; ++ resets = <&rstgen RSTN_U0_SEC_TOP_HRESETN>; ++ interrupts = <30>; ++ status = "disabled"; ++ }; ++ ++ sec_dma: sec_dma@16008000 { ++ compatible = "arm,pl080", "arm,primecell"; ++ arm,primecell-periphid = <0x00041080>; ++ reg = <0x0 0x16008000 0x0 0x4000>; ++ reg-names = "sec_dma"; ++ interrupts = <29>; ++ clocks = <&clkgen JH7110_SEC_HCLK>, ++ <&clkgen JH7110_SEC_MISCAHB_CLK>; ++ clock-names = "sec_hclk","apb_pclk"; ++ resets = <&rstgen RSTN_U0_SEC_TOP_HRESETN>; ++ reset-names = "sec_hre"; ++ lli-bus-interface-ahb1; ++ mem-bus-interface-ahb1; ++ memcpy-burst-size = <256>; ++ memcpy-bus-width = <32>; ++ #dma-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ crypto: crypto@16000000 { ++ compatible = "starfive,jh7110-sec"; ++ reg = <0x0 0x16000000 0x0 0x4000>, ++ <0x0 0x16008000 0x0 0x4000>; ++ reg-names = "secreg","secdma"; ++ interrupts = <28>, <29>; ++ interrupt-names = "secirq", "dmairq"; ++ clocks = <&clkgen JH7110_SEC_HCLK>, ++ <&clkgen JH7110_SEC_MISCAHB_CLK>; ++ clock-names = "sec_hclk","sec_ahb"; ++ resets = <&rstgen RSTN_U0_SEC_TOP_HRESETN>; ++ reset-names = "sec_hre"; ++ enable-side-channel-mitigation = "true"; ++ enable-dma = "true"; ++ dmas = <&sec_dma 1 2>, ++ <&sec_dma 0 2>; ++ dma-names = "sec_m","sec_p"; ++ status = "disabled"; ++ }; ++ ++ i2c0: i2c@10030000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x0 0x10030000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_I2C0_CLK_CORE>, ++ <&clkgen JH7110_I2C0_CLK_APB>; ++ clock-names = "ref", "pclk"; ++ resets = <&rstgen RSTN_U0_DW_I2C_APB>; ++ interrupts = <35>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c1: i2c@10040000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x0 0x10040000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_I2C1_CLK_CORE>, ++ <&clkgen JH7110_I2C1_CLK_APB>; ++ clock-names = "ref", "pclk"; ++ resets = <&rstgen RSTN_U1_DW_I2C_APB>; ++ interrupts = <36>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c2: i2c@10050000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x0 0x10050000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_I2C2_CLK_CORE>, ++ <&clkgen JH7110_I2C2_CLK_APB>; ++ clock-names = "ref", "pclk"; ++ resets = <&rstgen RSTN_U2_DW_I2C_APB>; ++ interrupts = <37>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c3: i2c@12030000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x0 0x12030000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_I2C3_CLK_CORE>, ++ <&clkgen JH7110_I2C3_CLK_APB>; ++ clock-names = "ref", "pclk"; ++ resets = <&rstgen RSTN_U3_DW_I2C_APB>; ++ interrupts = <48>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c4: i2c@12040000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x0 0x12040000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_I2C4_CLK_CORE>, ++ <&clkgen JH7110_I2C4_CLK_APB>; ++ clock-names = "ref", "pclk"; ++ resets = <&rstgen RSTN_U4_DW_I2C_APB>; ++ interrupts = <49>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c5: i2c@12050000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x0 0x12050000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_I2C5_CLK_CORE>, ++ <&clkgen JH7110_I2C5_CLK_APB>; ++ clock-names = "ref", "pclk"; ++ resets = <&rstgen RSTN_U5_DW_I2C_APB>; ++ interrupts = <50>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c6: i2c@12060000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x0 0x12060000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_I2C6_CLK_CORE>, ++ <&clkgen JH7110_I2C6_CLK_APB>; ++ clock-names = "ref", "pclk"; ++ resets = <&rstgen RSTN_U6_DW_I2C_APB>; ++ interrupts = <51>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ /* unremovable emmc as mmcblk0 */ ++ sdio0: sdio0@16010000 { ++ compatible = "starfive,jh7110-sdio"; ++ reg = <0x0 0x16010000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_SDIO0_CLK_AHB>, ++ <&clkgen JH7110_SDIO0_CLK_SDCARD>; ++ clock-names = "biu","ciu"; ++ resets = <&rstgen RSTN_U0_DW_SDIO_AHB>; ++ reset-names = "reset"; ++ interrupts = <74>; ++ fifo-depth = <32>; ++ fifo-watermark-aligned; ++ data-addr = <0>; ++ starfive,sys-syscon = <&sys_syscon 0x14 0x1a 0x7c000000>; ++ status = "disabled"; ++ }; ++ ++ sdio1: sdio1@16020000 { ++ compatible = "starfive,jh7110-sdio"; ++ reg = <0x0 0x16020000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_SDIO1_CLK_AHB>, ++ <&clkgen JH7110_SDIO1_CLK_SDCARD>; ++ clock-names = "biu","ciu"; ++ resets = <&rstgen RSTN_U1_DW_SDIO_AHB>; ++ reset-names = "reset"; ++ interrupts = <75>; ++ fifo-depth = <32>; ++ fifo-watermark-aligned; ++ data-addr = <0>; ++ starfive,sys-syscon = <&sys_syscon 0x9c 0x1 0x3e>; ++ status = "disabled"; ++ }; ++ ++ vin_sysctl: vin_sysctl@19800000 { ++ compatible = "starfive,jh7110-vin"; ++ reg = <0x0 0x19800000 0x0 0x10000>, ++ <0x0 0x19810000 0x0 0x10000>, ++ <0x0 0x19820000 0x0 0x10000>, ++ <0x0 0x19840000 0x0 0x10000>, ++ <0x0 0x19870000 0x0 0x30000>, ++ <0x0 0x11840000 0x0 0x10000>, ++ <0x0 0x17030000 0x0 0x10000>, ++ <0x0 0x13020000 0x0 0x10000>; ++ reg-names = "csi2rx", "vclk", "vrst", "sctrl", ++ "isp", "trst", "pmu", "syscrg"; ++ clocks = <&clkisp JH7110_DOM4_APB_FUNC>, ++ <&clkisp JH7110_U0_VIN_PCLK>, ++ <&clkisp JH7110_U0_VIN_SYS_CLK>, ++ <&clkisp JH7110_U0_ISPV2_TOP_WRAPPER_CLK_C>, ++ <&clkisp JH7110_DVP_INV>, ++ <&clkisp JH7110_U0_VIN_CLK_P_AXIWR>, ++ <&clkisp JH7110_MIPI_RX0_PXL>, ++ <&clkisp JH7110_U0_VIN_PIXEL_CLK_IF0>, ++ <&clkisp JH7110_U0_VIN_PIXEL_CLK_IF1>, ++ <&clkisp JH7110_U0_VIN_PIXEL_CLK_IF2>, ++ <&clkisp JH7110_U0_VIN_PIXEL_CLK_IF3>, ++ <&clkisp JH7110_U0_M31DPHY_CFGCLK_IN>, ++ <&clkisp JH7110_U0_M31DPHY_REFCLK_IN>, ++ <&clkisp JH7110_U0_M31DPHY_TXCLKESC_LAN0>, ++ <&clkgen JH7110_ISP_TOP_CLK_ISPCORE_2X>, ++ <&clkgen JH7110_ISP_TOP_CLK_ISP_AXI>; ++ clock-names = "clk_apb_func", "clk_pclk", "clk_sys_clk", ++ "clk_wrapper_clk_c", "clk_dvp_inv", "clk_axiwr", ++ "clk_mipi_rx0_pxl", "clk_pixel_clk_if0", ++ "clk_pixel_clk_if1", "clk_pixel_clk_if2", ++ "clk_pixel_clk_if3", "clk_m31dphy_cfgclk_in", ++ "clk_m31dphy_refclk_in", "clk_m31dphy_txclkesc_lan0", ++ "clk_ispcore_2x", "clk_isp_axi"; ++ resets = <&rstgen RSTN_U0_ISPV2_TOP_WRAPPER_P>, ++ <&rstgen RSTN_U0_ISPV2_TOP_WRAPPER_C>, ++ <&rstgen RSTN_U0_VIN_N_PCLK>, ++ <&rstgen RSTN_U0_VIN_N_SYS_CLK>, ++ <&rstgen RSTN_U0_VIN_P_AXIRD>, ++ <&rstgen RSTN_U0_VIN_P_AXIWR>, ++ <&rstgen RSTN_U0_VIN_N_PIXEL_CLK_IF0>, ++ <&rstgen RSTN_U0_VIN_N_PIXEL_CLK_IF1>, ++ <&rstgen RSTN_U0_VIN_N_PIXEL_CLK_IF2>, ++ <&rstgen RSTN_U0_VIN_N_PIXEL_CLK_IF3>, ++ <&rstgen RSTN_U0_M31DPHY_HW>, ++ <&rstgen RSTN_U0_M31DPHY_B09_ALWAYS_ON>, ++ <&rstgen RSTN_U0_DOM_ISP_TOP_N>, ++ <&rstgen RSTN_U0_DOM_ISP_TOP_AXI>; ++ reset-names = "rst_wrapper_p", "rst_wrapper_c", "rst_pclk", ++ "rst_sys_clk", "rst_axird", "rst_axiwr", "rst_pixel_clk_if0", ++ "rst_pixel_clk_if1", "rst_pixel_clk_if2", "rst_pixel_clk_if3", ++ "rst_m31dphy_hw", "rst_m31dphy_b09_always_on", ++ "rst_isp_top_n", "rst_isp_top_axi"; ++ starfive,aon-syscon = <&aon_syscon 0x00>; ++ power-domains = <&pwrc JH7110_PD_ISP>; ++ /* irq nr: vin, isp, isp_csi, isp_scd, isp_csiline */ ++ interrupts = <92 87 88 89 90>; ++ status = "disabled"; ++ }; ++ ++ jpu: jpu@11900000 { ++ compatible = "starfive,jpu"; ++ reg = <0x0 0x13090000 0x0 0x300>; ++ interrupts = <14>; ++ clocks = <&clkgen JH7110_CODAJ12_CLK_AXI>, ++ <&clkgen JH7110_CODAJ12_CLK_CORE>, ++ <&clkgen JH7110_CODAJ12_CLK_APB>, ++ <&clkgen JH7110_NOC_BUS_CLK_VDEC_AXI>; ++ clock-names = "axi_clk", "core_clk", ++ "apb_clk", "noc_bus"; ++ resets = <&rstgen RSTN_U0_CODAJ12_AXI>, ++ <&rstgen RSTN_U0_CODAJ12_CORE>, ++ <&rstgen RSTN_U0_CODAJ12_APB>; ++ reset-names = "rst_axi", "rst_core", "rst_apb"; ++ power-domains = <&pwrc JH7110_PD_VDEC>; ++ status = "disabled"; ++ }; ++ ++ vpu_dec: vpu_dec@130A0000 { ++ compatible = "starfive,vdec"; ++ reg = <0x0 0x130A0000 0x0 0x10000>; ++ interrupts = <13>; ++ clocks = <&clkgen JH7110_WAVE511_CLK_AXI>, ++ <&clkgen JH7110_WAVE511_CLK_BPU>, ++ <&clkgen JH7110_WAVE511_CLK_VCE>, ++ <&clkgen JH7110_WAVE511_CLK_APB>, ++ <&clkgen JH7110_NOC_BUS_CLK_VDEC_AXI>; ++ clock-names = "axi_clk", "bpu_clk", "vce_clk", ++ "apb_clk", "noc_bus"; ++ resets = <&rstgen RSTN_U0_WAVE511_AXI>, ++ <&rstgen RSTN_U0_WAVE511_BPU>, ++ <&rstgen RSTN_U0_WAVE511_VCE>, ++ <&rstgen RSTN_U0_WAVE511_APB>, ++ <&rstgen RSTN_U0_AXIMEM_128B_AXI>; ++ reset-names = "rst_axi", "rst_bpu", "rst_vce", ++ "rst_apb", "rst_sram"; ++ starfive,vdec_noc_ctrl; ++ power-domains = <&pwrc JH7110_PD_VDEC>; ++ status = "disabled"; ++ }; ++ ++ vpu_enc: vpu_enc@130B0000 { ++ compatible = "starfive,venc"; ++ reg = <0x0 0x130B0000 0x0 0x10000>; ++ interrupts = <15>; ++ clocks = <&clkgen JH7110_WAVE420L_CLK_AXI>, ++ <&clkgen JH7110_WAVE420L_CLK_BPU>, ++ <&clkgen JH7110_WAVE420L_CLK_VCE>, ++ <&clkgen JH7110_WAVE420L_CLK_APB>, ++ <&clkgen JH7110_NOC_BUS_CLK_VENC_AXI>; ++ clock-names = "axi_clk", "bpu_clk", "vce_clk", ++ "apb_clk", "noc_bus"; ++ resets = <&rstgen RSTN_U0_WAVE420L_AXI>, ++ <&rstgen RSTN_U0_WAVE420L_BPU>, ++ <&rstgen RSTN_U0_WAVE420L_VCE>, ++ <&rstgen RSTN_U0_WAVE420L_APB>, ++ <&rstgen RSTN_U1_AXIMEM_128B_AXI>; ++ reset-names = "rst_axi", "rst_bpu", "rst_vce", ++ "rst_apb", "rst_sram"; ++ starfive,venc_noc_ctrl; ++ power-domains = <&pwrc JH7110_PD_VENC>; ++ status = "disabled"; ++ }; ++ ++ rstgen: reset-controller { ++ compatible = "starfive,jh7110-reset"; ++ reg = <0x0 0x13020000 0x0 0x10000>, ++ <0x0 0x10230000 0x0 0x10000>, ++ <0x0 0x17000000 0x0 0x10000>, ++ <0x0 0x19810000 0x0 0x10000>, ++ <0x0 0x295C0000 0x0 0x10000>; ++ reg-names = "syscrg", "stgcrg", "aoncrg", "ispcrg", "voutcrg"; ++ #reset-cells = <1>; ++ status = "okay"; ++ }; ++ ++ stmmac_axi_setup: stmmac-axi-config { ++ snps,wr_osr_lmt = <0xf>; ++ snps,rd_osr_lmt = <0xf>; ++ snps,blen = <256 128 64 32 0 0 0>; ++ }; ++ ++ gmac0: ethernet@16030000 { ++ compatible = "starfive,dwmac","snps,dwmac-5.10a"; ++ reg = <0x0 0x16030000 0x0 0x10000>; ++ clock-names = "gtx", ++ "tx", ++ "ptp_ref", ++ "stmmaceth", ++ "pclk", ++ "gtxc", ++ "rmii_rtx"; ++ clocks = <&clkgen JH7110_GMAC0_GTXCLK>, ++ <&clkgen JH7110_U0_GMAC5_CLK_TX>, ++ <&clkgen JH7110_GMAC0_PTP>, ++ <&clkgen JH7110_U0_GMAC5_CLK_AHB>, ++ <&clkgen JH7110_U0_GMAC5_CLK_AXI>, ++ <&clkgen JH7110_GMAC0_GTXC>, ++ <&clkgen JH7110_GMAC0_RMII_RTX>; ++ resets = <&rstgen RSTN_U0_DW_GMAC5_AXI64_AHB>, ++ <&rstgen RSTN_U0_DW_GMAC5_AXI64_AXI>; ++ reset-names = "ahb", "stmmaceth"; ++ interrupts = <7>, <6>, <5> ; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ max-frame-size = <9000>; ++ phy-mode = "rgmii-id"; ++ snps,multicast-filter-bins = <64>; ++ snps,perfect-filter-entries = <128>; ++ rx-fifo-depth = <2048>; ++ tx-fifo-depth = <2048>; ++ snps,fixed-burst; ++ snps,no-pbl-x8; ++ snps,force_thresh_dma_mode; ++ snps,axi-config = <&stmmac_axi_setup>; ++ snps,tso; ++ snps,en-tx-lpi-clockgating; ++ snps,en-lpi; ++ snps,write-requests = <4>; ++ snps,read-requests = <4>; ++ snps,burst-map = <0x7>; ++ snps,txpbl = <16>; ++ snps,rxpbl = <16>; ++ status = "disabled"; ++ }; ++ ++ gmac1: ethernet@16040000 { ++ compatible = "starfive,dwmac","snps,dwmac-5.10a"; ++ reg = <0x0 0x16040000 0x0 0x10000>; ++ clock-names = "gtx", ++ "tx", ++ "ptp_ref", ++ "stmmaceth", ++ "pclk", ++ "gtxc", ++ "rmii_rtx"; ++ clocks = <&clkgen JH7110_GMAC1_GTXCLK>, ++ <&clkgen JH7110_GMAC5_CLK_TX>, ++ <&clkgen JH7110_GMAC5_CLK_PTP>, ++ <&clkgen JH7110_GMAC5_CLK_AHB>, ++ <&clkgen JH7110_GMAC5_CLK_AXI>, ++ <&clkgen JH7110_GMAC1_GTXC>, ++ <&clkgen JH7110_GMAC1_RMII_RTX>; ++ resets = <&rstgen RSTN_U1_DW_GMAC5_AXI64_H_N>, ++ <&rstgen RSTN_U1_DW_GMAC5_AXI64_A_I>; ++ reset-names = "ahb", "stmmaceth"; ++ interrupts = <78>, <77>, <76> ; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ max-frame-size = <9000>; ++ phy-mode = "rgmii-id"; ++ snps,multicast-filter-bins = <64>; ++ snps,perfect-filter-entries = <128>; ++ rx-fifo-depth = <2048>; ++ tx-fifo-depth = <2048>; ++ snps,fixed-burst; ++ snps,no-pbl-x8; ++ snps,force_thresh_dma_mode; ++ snps,axi-config = <&stmmac_axi_setup>; ++ snps,tso; ++ snps,en-tx-lpi-clockgating; ++ snps,en-lpi; ++ snps,write-requests = <4>; ++ snps,read-requests = <4>; ++ snps,burst-map = <0x7>; ++ snps,txpbl = <16>; ++ snps,rxpbl = <16>; ++ status = "disabled"; ++ }; ++ ++ gpu: gpu@18000000 { ++ compatible = "img-gpu"; ++ reg = <0x0 0x18000000 0x0 0x100000>, ++ <0x0 0x130C000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_GPU_CORE>, ++ <&clkgen JH7110_GPU_CLK_APB>, ++ <&clkgen JH7110_GPU_RTC_TOGGLE>, ++ <&clkgen JH7110_GPU_CORE_CLK>, ++ <&clkgen JH7110_GPU_SYS_CLK>, ++ <&clkgen JH7110_NOC_BUS_CLK_GPU_AXI>; ++ clock-names = "clk_bv", "clk_apb", "clk_rtc", ++ "clk_core", "clk_sys", "clk_axi"; ++ resets = <&rstgen RSTN_U0_IMG_GPU_APB>, ++ <&rstgen RSTN_U0_IMG_GPU_DOMA>; ++ reset-names = "rst_apb", "rst_doma"; ++ power-domains = <&pwrc JH7110_PD_GPUA>; ++ interrupts = <82>; ++ current-clock = <8000000>; ++ status = "disabled"; ++ }; ++ ++ can0: can@130d0000 { ++ compatible = "starfive,jh7110-can", "ipms,can"; ++ reg = <0x0 0x130d0000 0x0 0x1000>; ++ interrupts = <112>; ++ clocks = <&clkgen JH7110_CAN0_CTRL_CLK_APB>, ++ <&clkgen JH7110_CAN0_CTRL_CLK_CAN>, ++ <&clkgen JH7110_CAN0_CTRL_CLK_TIMER>; ++ clock-names = "apb_clk", "core_clk", "timer_clk"; ++ resets = <&rstgen RSTN_U0_CAN_CTRL_APB>, ++ <&rstgen RSTN_U0_CAN_CTRL_CORE>, ++ <&rstgen RSTN_U0_CAN_CTRL_TIMER>; ++ reset-names = "rst_apb", "rst_core", "rst_timer"; ++ frequency = <40000000>; ++ starfive,sys-syscon = <&sys_syscon 0x10 0x3 0x8>; ++ syscon,can_or_canfd = <0>; ++ status = "disabled"; ++ }; ++ ++ can1: can@130e0000 { ++ compatible = "starfive,jh7110-can", "ipms,can"; ++ reg = <0x0 0x130e0000 0x0 0x1000>; ++ interrupts = <113>; ++ clocks = <&clkgen JH7110_CAN1_CTRL_CLK_APB>, ++ <&clkgen JH7110_CAN1_CTRL_CLK_CAN>, ++ <&clkgen JH7110_CAN1_CTRL_CLK_TIMER>; ++ clock-names = "apb_clk", "core_clk", "timer_clk"; ++ resets = <&rstgen RSTN_U1_CAN_CTRL_APB>, ++ <&rstgen RSTN_U1_CAN_CTRL_CORE>, ++ <&rstgen RSTN_U1_CAN_CTRL_TIMER>; ++ reset-names = "rst_apb", "rst_core", "rst_timer"; ++ frequency = <40000000>; ++ starfive,sys-syscon = <&sys_syscon 0x88 0x12 0x40000>; ++ syscon,can_or_canfd = <1>; ++ status = "disabled"; ++ }; ++ ++ tdm: tdm@10090000 { ++ compatible = "starfive,jh7110-tdm"; ++ reg = <0x0 0x10090000 0x0 0x1000>; ++ reg-names = "tdm"; ++ clocks = <&clkgen JH7110_TDM_CLK_AHB>, ++ <&clkgen JH7110_TDM_CLK_APB>, ++ <&clkgen JH7110_TDM_INTERNAL>, ++ <&tdm_ext>, ++ <&clkgen JH7110_TDM_CLK_TDM>, ++ <&clkgen JH7110_MCLK_INNER>; ++ clock-names = "clk_tdm_ahb", "clk_tdm_apb", ++ "clk_tdm_internal", "clk_tdm_ext", ++ "clk_tdm", "mclk_inner"; ++ resets = <&rstgen RSTN_U0_TDM16SLOT_AHB>, ++ <&rstgen RSTN_U0_TDM16SLOT_APB>, ++ <&rstgen RSTN_U0_TDM16SLOT_TDM>; ++ reset-names = "tdm_ahb", "tdm_apb", "tdm_rst"; ++ dmas = <&dma 20 1>, <&dma 21 1>; ++ dma-names = "rx","tx"; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spdif0: spdif0@100a0000 { ++ compatible = "starfive,jh7110-spdif"; ++ reg = <0x0 0x100a0000 0x0 0x1000>; ++ clocks = <&clkgen JH7110_SPDIF_CLK_APB>, ++ <&clkgen JH7110_SPDIF_CLK_CORE>, ++ <&clkgen JH7110_AUDIO_ROOT>, ++ <&clkgen JH7110_MCLK_INNER>, ++ <&mclk_ext>, <&clkgen JH7110_MCLK>; ++ clock-names = "spdif-apb", "spdif-core", ++ "audroot", "mclk_inner", ++ "mclk_ext", "mclk"; ++ resets = <&rstgen RSTN_U0_CDNS_SPDIF_APB>; ++ reset-names = "rst_apb"; ++ interrupts = <84>; ++ interrupt-names = "tx"; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ pwmdac: pwmdac@100b0000 { ++ compatible = "starfive,jh7110-pwmdac"; ++ reg = <0x0 0x100b0000 0x0 0x1000>; ++ clocks = <&clkgen JH7110_APB0>, ++ <&clkgen JH7110_PWMDAC_CLK_APB>, ++ <&clkgen JH7110_PWMDAC_CLK_CORE>; ++ clock-names = "apb0", "pwmdac-apb", "pwmdac-core"; ++ resets = <&rstgen RSTN_U0_PWMDAC_APB>; ++ reset-names = "rst-apb"; ++ dmas = <&dma 22 1>; ++ dma-names = "tx"; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2stx: i2stx@100c0000 { ++ compatible = "snps,designware-i2stx"; ++ reg = <0x0 0x100c0000 0x0 0x1000>; ++ interrupt-names = "tx"; ++ #sound-dai-cells = <0>; ++ dmas = <&dma 28 1>; ++ dma-names = "rx"; ++ status = "disabled"; ++ }; ++ ++ pdm: pdm@100d0000 { ++ compatible = "starfive,jh7110-pdm"; ++ reg = <0x0 0x100d0000 0x0 0x1000>; ++ reg-names = "pdm"; ++ clocks = <&clkgen JH7110_PDM_CLK_DMIC>, ++ <&clkgen JH7110_PDM_CLK_APB>, ++ <&clkgen JH7110_MCLK>, ++ <&mclk_ext>; ++ clock-names = "pdm_mclk", ++ "pdm_apb", "clk_mclk", ++ "mclk_ext"; ++ resets = <&rstgen RSTN_U0_PDM_4MIC_DMIC>, ++ <&rstgen RSTN_U0_PDM_4MIC_APB>; ++ reset-names = "pdm_dmic", "pdm_apb"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ i2srx_mst: i2srx_mst@100e0000 { ++ compatible = "starfive,jh7110-i2srx-master"; ++ reg = <0x0 0x100e0000 0x0 0x1000>; ++ clocks = <&clkgen JH7110_APB0>, ++ <&clkgen JH7110_I2SRX0_3CH_CLK_APB>, ++ <&clkgen JH7110_I2SRX_3CH_BCLK_MST>, ++ <&clkgen JH7110_I2SRX_3CH_LRCK_MST>, ++ <&clkgen JH7110_I2SRX0_3CH_BCLK>, ++ <&clkgen JH7110_I2SRX0_3CH_LRCK>, ++ <&clkgen JH7110_MCLK>, ++ <&mclk_ext>; ++ clock-names = "apb0", "i2srx_apb", ++ "i2srx_bclk_mst", "i2srx_lrck_mst", ++ "i2srx_bclk", "i2srx_lrck", ++ "mclk", "mclk_ext"; ++ resets = <&rstgen RSTN_U0_I2SRX_3CH_APB>, ++ <&rstgen RSTN_U0_I2SRX_3CH_BCLK>; ++ reset-names = "rst_apb_rx", "rst_bclk_rx"; ++ dmas = <&dma 24 1>; ++ dma-names = "rx"; ++ starfive,sys-syscon = <&sys_syscon 0x18 0x34>; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2srx_3ch: i2srx_3ch@100e0000 { ++ compatible = "starfive,jh7110-i2srx", "snps,designware-i2s"; ++ reg = <0x0 0x100e0000 0x0 0x1000>; ++ clocks = <&clkgen JH7110_APB0>, ++ <&clkgen JH7110_I2SRX0_3CH_CLK_APB>, ++ <&clkgen JH7110_AUDIO_ROOT>, ++ <&clkgen JH7110_MCLK_INNER>, ++ <&clkgen JH7110_I2SRX_3CH_BCLK_MST>, ++ <&clkgen JH7110_I2SRX_3CH_LRCK_MST>, ++ <&clkgen JH7110_I2SRX0_3CH_BCLK>, ++ <&clkgen JH7110_I2SRX0_3CH_LRCK>, ++ <&clkgen JH7110_MCLK>, ++ <&mclk_ext>, ++ <&i2srx_bclk_ext>, ++ <&i2srx_lrck_ext>; ++ clock-names = "apb0", "3ch-apb", ++ "audioroot", "mclk-inner", ++ "bclk_mst", "3ch-lrck", ++ "rx-bclk", "rx-lrck", ++ "mclk", "mclk_ext", ++ "bclk-ext", "lrck-ext"; ++ resets = <&rstgen RSTN_U0_I2SRX_3CH_APB>, ++ <&rstgen RSTN_U0_I2SRX_3CH_BCLK>; ++ dmas = <&dma 24 1>; ++ dma-names = "rx"; ++ starfive,sys-syscon = <&sys_syscon 0x18 0x34>; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2stx_4ch0: i2stx_4ch0@120b0000 { ++ compatible = "starfive,jh7110-i2stx-4ch0", "snps,designware-i2s"; ++ reg = <0x0 0x120b0000 0x0 0x1000>; ++ clocks = <&clkgen JH7110_MCLK_INNER>, ++ <&clkgen JH7110_I2STX_4CH0_BCLK_MST>, ++ <&clkgen JH7110_I2STX_4CH0_LRCK_MST>, ++ <&clkgen JH7110_MCLK>, ++ <&clkgen JH7110_I2STX0_4CHBCLK>, ++ <&clkgen JH7110_I2STX0_4CHLRCK>, ++ <&clkgen JH7110_I2STX0_4CHCLK_APB>, ++ <&mclk_ext>; ++ clock-names = "inner", "bclk-mst", ++ "lrck-mst", "mclk", ++ "bclk0", "lrck0", ++ "i2s_apb", "mclk_ext"; ++ resets = <&rstgen RSTN_U0_I2STX_4CH_APB>, ++ <&rstgen RSTN_U0_I2STX_4CH_BCLK>; ++ reset-names = "rst_apb", "rst_bclk"; ++ dmas = <&dma 47 1>; ++ dma-names = "tx"; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2stx_4ch1: i2stx_4ch1@120c0000 { ++ compatible = "starfive,jh7110-i2stx-4ch1", "snps,designware-i2s"; ++ reg = <0x0 0x120c0000 0x0 0x1000>; ++ clocks = <&clkgen JH7110_AUDIO_ROOT>, ++ <&clkgen JH7110_MCLK_INNER>, ++ <&clkgen JH7110_I2STX_4CH1_BCLK_MST>, ++ <&clkgen JH7110_I2STX_4CH1_LRCK_MST>, ++ <&clkgen JH7110_MCLK>, ++ <&clkgen JH7110_I2STX1_4CHBCLK>, ++ <&clkgen JH7110_I2STX1_4CHLRCK>, ++ <&clkgen JH7110_MCLK_OUT>, ++ <&clkgen JH7110_APB0>, ++ <&clkgen JH7110_I2STX1_4CHCLK_APB>, ++ <&mclk_ext>, ++ <&i2stx_bclk_ext>, ++ <&i2stx_lrck_ext>; ++ clock-names = "audroot", "mclk_inner", "bclk_mst", ++ "lrck_mst", "mclk", "4chbclk", ++ "4chlrck", "mclk_out", ++ "apb0", "clk_apb", ++ "mclk_ext", "bclk_ext", "lrck_ext"; ++ resets = <&rstgen RSTN_U1_I2STX_4CH_APB>, ++ <&rstgen RSTN_U1_I2STX_4CH_BCLK>; ++ dmas = <&dma 48 1>; ++ dma-names = "tx"; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ ptc: pwm@120d0000 { ++ compatible = "starfive,jh7110-pwm"; ++ reg = <0x0 0x120d0000 0x0 0x10000>; ++ reg-names = "control"; ++ clocks = <&clkgen JH7110_PWM_CLK_APB>; ++ resets = <&rstgen RSTN_U0_PWM_8CH_APB>; ++ starfive,approx-freq = <2000000>; ++ #pwm-cells=<3>; ++ starfive,npwm = <8>; ++ status = "disabled"; ++ }; ++ ++ spdif_transmitter: spdif_transmitter { ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ pwmdac_codec: pwmdac-transmitter { ++ compatible = "starfive,jh7110-pwmdac-dit"; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ dmic_codec: dmic_codec { ++ compatible = "dmic-codec"; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi0: spi@10060000 { ++ compatible = "arm,pl022", "arm,primecell"; ++ reg = <0x0 0x10060000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_SPI0_CLK_APB>; ++ clock-names = "apb_pclk"; ++ resets = <&rstgen RSTN_U0_SSP_SPI_APB>; ++ reset-names = "rst_apb"; ++ interrupts = <38>; ++ /* shortage of dma channel that not be used */ ++ /*dmas = <&dma 14 1>, <&dma 15 1>;*/ ++ /*dma-names = "rx","tx";*/ ++ arm,primecell-periphid = <0x00041022>; ++ num-cs = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi1: spi@10070000 { ++ compatible = "arm,pl022", "arm,primecell"; ++ reg = <0x0 0x10070000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_SPI1_CLK_APB>; ++ clock-names = "apb_pclk"; ++ resets = <&rstgen RSTN_U1_SSP_SPI_APB>; ++ reset-names = "rst_apb"; ++ interrupts = <39>; ++ /* shortage of dma channel that not be used */ ++ /*dmas = <&dma 16 1>, <&dma 17 1>;*/ ++ /*dma-names = "rx","tx";*/ ++ arm,primecell-periphid = <0x00041022>; ++ num-cs = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi2: spi@10080000 { ++ compatible = "arm,pl022", "arm,primecell"; ++ reg = <0x0 0x10080000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_SPI2_CLK_APB>; ++ clock-names = "apb_pclk"; ++ resets = <&rstgen RSTN_U2_SSP_SPI_APB>; ++ reset-names = "rst_apb"; ++ interrupts = <40>; ++ /* shortage of dma channel that not be used */ ++ /*dmas = <&dma 18 1>, <&dma 19 1>;*/ ++ /*dma-names = "rx","tx";*/ ++ arm,primecell-periphid = <0x00041022>; ++ num-cs = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi3: spi@12070000 { ++ compatible = "arm,pl022", "arm,primecell"; ++ reg = <0x0 0x12070000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_SPI3_CLK_APB>; ++ clock-names = "apb_pclk"; ++ resets = <&rstgen RSTN_U3_SSP_SPI_APB>; ++ reset-names = "rst_apb"; ++ interrupts = <52>; ++ /* shortage of dma channel that not be used */ ++ /*dmas = <&dma 39 1>, <&dma 40 1>;*/ ++ /*dma-names = "rx","tx";*/ ++ arm,primecell-periphid = <0x00041022>; ++ num-cs = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi4: spi@12080000 { ++ compatible = "arm,pl022", "arm,primecell"; ++ reg = <0x0 0x12080000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_SPI4_CLK_APB>; ++ clock-names = "apb_pclk"; ++ resets = <&rstgen RSTN_U4_SSP_SPI_APB>; ++ reset-names = "rst_apb"; ++ interrupts = <53>; ++ /* shortage of dma channel that not be used */ ++ /*dmas = <&dma 41 1>, <&dma 42 1>;*/ ++ /*dma-names = "rx","tx";*/ ++ arm,primecell-periphid = <0x00041022>; ++ num-cs = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi5: spi@12090000 { ++ compatible = "arm,pl022", "arm,primecell"; ++ reg = <0x0 0x12090000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_SPI5_CLK_APB>; ++ clock-names = "apb_pclk"; ++ resets = <&rstgen RSTN_U5_SSP_SPI_APB>; ++ reset-names = "rst_apb"; ++ interrupts = <54>; ++ /* shortage of dma channel that not be used */ ++ /*dmas = <&dma 43 1>, <&dma 44 1>;*/ ++ /*dma-names = "rx","tx";*/ ++ arm,primecell-periphid = <0x00041022>; ++ num-cs = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi6: spi@120A0000 { ++ compatible = "arm,pl022", "arm,primecell"; ++ reg = <0x0 0x120A0000 0x0 0x10000>; ++ clocks = <&clkgen JH7110_SPI6_CLK_APB>; ++ clock-names = "apb_pclk"; ++ resets = <&rstgen RSTN_U6_SSP_SPI_APB>; ++ reset-names = "rst_apb"; ++ interrupts = <55>; ++ /* shortage of dma channel that not be used */ ++ /*dmas = <&dma 45 1>, <&dma 46 1>;*/ ++ /*dma-names = "rx","tx";*/ ++ arm,primecell-periphid = <0x00041022>; ++ num-cs = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ pcie0: pcie@2B000000 { ++ compatible = "starfive,jh7110-pcie","plda,pci-xpressrich3-axi"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ #interrupt-cells = <1>; ++ reg = <0x0 0x2B000000 0x0 0x1000000 ++ 0x9 0x40000000 0x0 0x10000000>; ++ reg-names = "reg", "config"; ++ device_type = "pci"; ++ starfive,stg-syscon = <&stg_syscon 0xc0 0xc4 0x130 0x1b8>; ++ starfive,phyctrl = <&phyctrl0 0x28 0x80>; ++ bus-range = <0x0 0xff>; ++ ranges = <0x82000000 0x0 0x30000000 0x0 0x30000000 0x0 0x08000000>, ++ <0xc3000000 0x9 0x00000000 0x9 0x00000000 0x0 0x40000000>; ++ msi-parent = <&plic>; ++ interrupts = <56>; ++ interrupt-controller; ++ interrupt-names = "msi"; ++ interrupt-parent = <&plic>; ++ interrupt-map-mask = <0x0 0x0 0x0 0x7>; ++ interrupt-map = <0x0 0x0 0x0 0x1 &plic 0x1>, ++ <0x0 0x0 0x0 0x2 &plic 0x2>, ++ <0x0 0x0 0x0 0x3 &plic 0x3>, ++ <0x0 0x0 0x0 0x4 &plic 0x4>; ++ resets = <&rstgen RSTN_U0_PLDA_PCIE_AXI_MST0>, ++ <&rstgen RSTN_U0_PLDA_PCIE_AXI_SLV0>, ++ <&rstgen RSTN_U0_PLDA_PCIE_AXI_SLV>, ++ <&rstgen RSTN_U0_PLDA_PCIE_BRG>, ++ <&rstgen RSTN_U0_PLDA_PCIE_CORE>, ++ <&rstgen RSTN_U0_PLDA_PCIE_APB>; ++ reset-names = "rst_mst0", "rst_slv0", "rst_slv", ++ "rst_brg", "rst_core", "rst_apb"; ++ clocks = <&clkgen JH7110_NOC_BUS_CLK_STG_AXI>, ++ <&clkgen JH7110_PCIE0_CLK_TL>, ++ <&clkgen JH7110_PCIE0_CLK_AXI_MST0>, ++ <&clkgen JH7110_PCIE0_CLK_APB>; ++ clock-names = "noc", "tl", "axi_mst0", "apb"; ++ status = "disabled"; ++ }; ++ ++ pcie1: pcie@2C000000 { ++ compatible = "starfive,jh7110-pcie","plda,pci-xpressrich3-axi"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ #interrupt-cells = <1>; ++ reg = <0x0 0x2C000000 0x0 0x1000000 ++ 0x9 0xc0000000 0x0 0x10000000>; ++ reg-names = "reg", "config"; ++ device_type = "pci"; ++ starfive,stg-syscon = <&stg_syscon 0x270 0x274 0x2e0 0x368>; ++ starfive,phyctrl = <&phyctrl1 0x28 0x80>; ++ bus-range = <0x0 0xff>; ++ ranges = <0x82000000 0x0 0x38000000 0x0 0x38000000 0x0 0x08000000>, ++ <0xc3000000 0x9 0x80000000 0x9 0x80000000 0x0 0x40000000>; ++ msi-parent = <&plic>; ++ interrupts = <57>; ++ interrupt-controller; ++ interrupt-names = "msi"; ++ interrupt-parent = <&plic>; ++ interrupt-map-mask = <0x0 0x0 0x0 0x7>; ++ interrupt-map = <0x0 0x0 0x0 0x1 &plic 0x1>, ++ <0x0 0x0 0x0 0x2 &plic 0x2>, ++ <0x0 0x0 0x0 0x3 &plic 0x3>, ++ <0x0 0x0 0x0 0x4 &plic 0x4>; ++ resets = <&rstgen RSTN_U1_PLDA_PCIE_AXI_MST0>, ++ <&rstgen RSTN_U1_PLDA_PCIE_AXI_SLV0>, ++ <&rstgen RSTN_U1_PLDA_PCIE_AXI_SLV>, ++ <&rstgen RSTN_U1_PLDA_PCIE_BRG>, ++ <&rstgen RSTN_U1_PLDA_PCIE_CORE>, ++ <&rstgen RSTN_U1_PLDA_PCIE_APB>; ++ reset-names = "rst_mst0", "rst_slv0", "rst_slv", ++ "rst_brg", "rst_core", "rst_apb"; ++ clocks = <&clkgen JH7110_NOC_BUS_CLK_STG_AXI>, ++ <&clkgen JH7110_PCIE1_CLK_TL>, ++ <&clkgen JH7110_PCIE1_CLK_AXI_MST0>, ++ <&clkgen JH7110_PCIE1_CLK_APB>; ++ clock-names = "noc", "tl", "axi_mst0", "apb"; ++ status = "disabled"; ++ }; ++ ++ mailbox_contrl0: mailbox@0 { ++ compatible = "starfive,mail_box"; ++ reg = <0x0 0x13060000 0x0 0x0001000>; ++ clocks = <&clkgen JH7110_MAILBOX_CLK_APB>; ++ clock-names = "clk_apb"; ++ resets = <&rstgen RSTN_U0_MAILBOX_RRESETN>; ++ reset-names = "mbx_rre"; ++ interrupts = <26 27>; ++ #mbox-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ mailbox_client0: mailbox_client@0 { ++ compatible = "starfive,mailbox-test"; ++ mbox-names = "rx", "tx"; ++ mboxes = <&mailbox_contrl0 0 1>,<&mailbox_contrl0 1 0>; ++ status = "disabled"; ++ }; ++ ++ display: display-subsystem { ++ compatible = "starfive,jh7110-display","verisilicon,display-subsystem"; ++ ports = <&dc_out_dpi0>; ++ status = "disabled"; ++ }; ++ ++ dssctrl: dssctrl@295B0000 { ++ compatible = "starfive,jh7110-dssctrl","verisilicon,dss-ctrl", "syscon"; ++ reg = <0 0x295B0000 0 0x90>; ++ }; ++ ++ tda988x_pin: tda988x_pin { ++ compatible = "starfive,tda998x_rgb_pin"; ++ status = "disabled"; ++ }; ++ ++ rgb_output: rgb-output { ++ compatible = "starfive,jh7110-rgb_output","verisilicon,rgb-encoder"; ++ //verisilicon,dss-syscon = <&dssctrl>; ++ //verisilicon,mux-mask = <0x70 0x380>; ++ //verisilicon,mux-val = <0x40 0x280>; ++ status = "disabled"; ++ }; ++ ++ dc8200: dc8200@29400000 { ++ compatible = "starfive,jh7110-dc8200","verisilicon,dc8200"; ++ verisilicon,dss-syscon = <&dssctrl>;//20220624 panel syscon ++ reg = <0x0 0x29400000 0x0 0x100>, ++ <0x0 0x29400800 0x0 0x2000>, ++ <0x0 0x17030000 0x0 0x1000>; ++ interrupts = <95>; ++ status = "disabled"; ++ clocks = <&clkgen JH7110_NOC_BUS_CLK_DISP_AXI>, ++ <&clkgen JH7110_VOUT_SRC>, ++ <&clkgen JH7110_VOUT_TOP_CLK_VOUT_AXI>, ++ <&clkgen JH7110_VOUT_TOP_CLK_VOUT_AHB>, ++ <&clkvout JH7110_U0_DC8200_CLK_PIX0>, ++ <&clkvout JH7110_U0_DC8200_CLK_PIX1>, ++ <&clkvout JH7110_U0_DC8200_CLK_AXI>, ++ <&clkvout JH7110_U0_DC8200_CLK_CORE>, ++ <&clkvout JH7110_U0_DC8200_CLK_AHB>, ++ <&clkgen JH7110_VOUT_TOP_CLK_VOUT_AXI>, ++ <&clkvout JH7110_DOM_VOUT_TOP_LCD_CLK>, ++ <&hdmitx0_pixelclk>, ++ <&clkvout JH7110_DC8200_PIX0>, ++ <&clkvout JH7110_U0_DC8200_CLK_PIX0_OUT>, ++ <&clkvout JH7110_U0_DC8200_CLK_PIX1_OUT>; ++ clock-names = "noc_disp","vout_src", ++ "top_vout_axi","top_vout_ahb", ++ "pix_clk","vout_pix1", ++ "axi_clk","core_clk","vout_ahb", ++ "vout_top_axi","vout_top_lcd","hdmitx0_pixelclk","dc8200_pix0", ++ "dc8200_pix0_out","dc8200_pix1_out"; ++ resets = <&rstgen RSTN_U0_DOM_VOUT_TOP_SRC>, ++ <&rstgen RSTN_U0_DC8200_AXI>, ++ <&rstgen RSTN_U0_DC8200_AHB>, ++ <&rstgen RSTN_U0_DC8200_CORE>, ++ <&rstgen RSTN_U0_NOC_BUS_DISP_AXI_N>; ++ reset-names = "rst_vout_src","rst_axi","rst_ahb","rst_core", ++ "rst_noc_disp"; ++ }; ++ ++ dsi_output: dsi-output { ++ compatible = "starfive,jh7110-display-encoder","verisilicon,dsi-encoder"; ++ status = "disabled"; ++ }; ++ ++ mipi_dphy: mipi-dphy@295e0000{ ++ compatible = "starfive,jh7110-mipi-dphy-tx","m31,mipi-dphy-tx"; ++ reg = <0x0 0x295e0000 0x0 0x10000>; ++ clocks = <&clkvout JH7110_U0_MIPITX_DPHY_CLK_TXESC>; ++ clock-names = "dphy_txesc"; ++ resets = <&rstgen RSTN_U0_MIPITX_DPHY_SYS>, ++ <&rstgen RSTN_U0_MIPITX_DPHY_TXBYTEHS>; ++ reset-names = "dphy_sys", "dphy_txbytehs"; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ mipi_dsi: mipi@295d0000 { ++ compatible = "starfive,jh7110-mipi_dsi","cdns,dsi"; ++ reg = <0x0 0x295d0000 0x0 0x10000>; ++ interrupts = <98>; ++ reg-names = "dsi"; ++ clocks = <&clkvout JH7110_U0_CDNS_DSITX_CLK_SYS>, ++ <&clkvout JH7110_U0_CDNS_DSITX_CLK_APB>, ++ <&clkvout JH7110_U0_CDNS_DSITX_CLK_TXESC>, ++ <&clkvout JH7110_U0_CDNS_DSITX_CLK_DPI>; ++ clock-names = "sys", "apb", "txesc", "dpi"; ++ resets = <&rstgen RSTN_U0_CDNS_DSITX_DPI>, ++ <&rstgen RSTN_U0_CDNS_DSITX_APB>, ++ <&rstgen RSTN_U0_CDNS_DSITX_RXESC>, ++ <&rstgen RSTN_U0_CDNS_DSITX_SYS>, ++ <&rstgen RSTN_U0_CDNS_DSITX_TXBYTEHS>, ++ <&rstgen RSTN_U0_CDNS_DSITX_TXESC>; ++ reset-names = "dsi_dpi", "dsi_apb", "dsi_rxesc", ++ "dsi_sys", "dsi_txbytehs", "dsi_txesc"; ++ phys = <&mipi_dphy>; ++ phy-names = "dphy"; ++ status = "disabled"; ++ ++ }; ++ ++ hdmi: hdmi@29590000 { ++ compatible = "starfive,jh7110-hdmi","inno,hdmi"; ++ reg = <0x0 0x29590000 0x0 0x4000>; ++ interrupts = <99>; ++ /*interrupts = ;*/ ++ /*clocks = <&cru PCLK_HDMI>;*/ ++ /*clock-names = "pclk";*/ ++ /*pinctrl-names = "default";*/ ++ /*pinctrl-0 = <&hdmi_ctl>;*/ ++ status = "disabled"; ++ clocks = <&clkvout JH7110_U0_HDMI_TX_CLK_SYS>, ++ <&clkvout JH7110_U0_HDMI_TX_CLK_MCLK>, ++ <&clkvout JH7110_U0_HDMI_TX_CLK_BCLK>, ++ <&hdmitx0_pixelclk>; ++ clock-names = "sysclk", "mclk","bclk","pclk"; ++ resets = <&rstgen RSTN_U0_HDMI_TX_HDMI>; ++ reset-names = "hdmi_tx"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ sound0: snd-card0 { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Starfive-AC108-Sound-Card"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ sound1: snd-card1 { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Starfive-HDMI-Sound-Card"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ sound2: snd-card2 { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Starfive-PDM-Sound-Card"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ sound3: snd-card3 { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Starfive-PWMDAC-Sound-Card"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ sound4: snd-card4 { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Starfive-SPDIF-Sound-Card"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ sound5: snd-card5 { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Starfive-TDM-Sound-Card"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ sound6: snd-card6 { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Starfive-WM8960-Sound-Card"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ co_process: e24@0 { ++ compatible = "starfive,e24"; ++ reg = <0x0 0xc0110000 0x0 0x00001000>, ++ <0x0 0xc0111000 0x0 0x0001f000>; ++ reg-names = "ecmd", "espace"; ++ clocks = <&clkgen JH7110_E2_RTC_CLK>, ++ <&clkgen JH7110_E2_CLK_CORE>, ++ <&clkgen JH7110_E2_CLK_DBG>; ++ clock-names = "clk_rtc", "clk_core", "clk_dbg"; ++ resets = <&rstgen RSTN_U0_E24_CORE>; ++ reset-names = "e24_core"; ++ starfive,stg-syscon = <&stg_syscon>; ++ interrupt-parent = <&plic>; ++ firmware-name = "e24_elf"; ++ irq-mode = <1>; ++ mbox-names = "tx", "rx"; ++ mboxes = <&mailbox_contrl0 0 2>,<&mailbox_contrl0 2 0>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0xc0000000 0x0 0xc0000000 0x200000>; ++ status = "disabled"; ++ dsp@0 {}; ++ }; ++ ++ xrp: xrp@0 { ++ compatible = "cdns,xrp"; ++ reg = <0x0 0x10230000 0x0 0x00010000 ++ 0x0 0x10240000 0x0 0x00010000>; ++ memory-region = <&xrp_reserved>; ++ clocks = <&clkgen JH7110_HIFI4_CLK_CORE>; ++ clock-names = "core_clk"; ++ resets = <&rstgen RSTN_U0_HIFI4_CORE>, ++ <&rstgen RSTN_U0_HIFI4_AXI>; ++ reset-names = "rst_core","rst_axi"; ++ starfive,stg-syscon = <&stg_syscon>; ++ firmware-name = "hifi4_elf"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0x40000000 0x0 0x20000000 0x040000 ++ 0xf0000000 0x0 0xf0000000 0x03000000>; ++ status = "disabled"; ++ dsp@0 { ++ }; ++ }; ++ ++ starfive_cpufreq: starfive,jh7110-cpufreq { ++ compatible = "starfive,jh7110-cpufreq"; ++ clocks = <&clkgen JH7110_CPU_CORE>; ++ clock-names = "cpu_clk"; ++ }; ++ }; ++}; +diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig +index a20c51dadef2..8c3d1e451703 100644 +--- a/arch/riscv/configs/defconfig ++++ b/arch/riscv/configs/defconfig +@@ -16,11 +16,7 @@ CONFIG_EXPERT=y + CONFIG_BPF_SYSCALL=y + CONFIG_SOC_SIFIVE=y + CONFIG_SOC_VIRT=y +-CONFIG_SOC_MICROCHIP_POLARFIRE=y + CONFIG_SMP=y +-CONFIG_HOTPLUG_CPU=y +-CONFIG_VIRTUALIZATION=y +-CONFIG_KVM=y + CONFIG_JUMP_LABEL=y + CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y +@@ -71,6 +67,7 @@ CONFIG_SPI_SIFIVE=y + CONFIG_GPIOLIB=y + CONFIG_GPIO_SIFIVE=y + # CONFIG_PTP_1588_CLOCK is not set ++CONFIG_POWER_RESET=y + CONFIG_DRM=y + CONFIG_DRM_RADEON=y + CONFIG_DRM_VIRTIO_GPU=y +@@ -85,9 +82,6 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y + CONFIG_USB_STORAGE=y + CONFIG_USB_UAS=y + CONFIG_MMC=y +-CONFIG_MMC_SDHCI=y +-CONFIG_MMC_SDHCI_PLTFM=y +-CONFIG_MMC_SDHCI_CADENCE=y + CONFIG_MMC_SPI=y + CONFIG_RTC_CLASS=y + CONFIG_VIRTIO_PCI=y +@@ -103,7 +97,6 @@ CONFIG_MSDOS_FS=y + CONFIG_VFAT_FS=y + CONFIG_TMPFS=y + CONFIG_TMPFS_POSIX_ACL=y +-CONFIG_HUGETLBFS=y + CONFIG_NFS_FS=y + CONFIG_NFS_V4=y + CONFIG_NFS_V4_1=y +@@ -114,8 +107,29 @@ CONFIG_CRYPTO_USER_API_HASH=y + CONFIG_CRYPTO_DEV_VIRTIO=y + CONFIG_PRINTK_TIME=y + CONFIG_DEBUG_FS=y ++CONFIG_DEBUG_PAGEALLOC=y ++CONFIG_SCHED_STACK_END_CHECK=y ++CONFIG_DEBUG_VM=y ++CONFIG_DEBUG_VM_PGFLAGS=y ++CONFIG_DEBUG_MEMORY_INIT=y ++CONFIG_DEBUG_PER_CPU_MAPS=y + CONFIG_SOFTLOCKUP_DETECTOR=y + CONFIG_WQ_WATCHDOG=y ++CONFIG_DEBUG_TIMEKEEPING=y ++CONFIG_DEBUG_RT_MUTEXES=y ++CONFIG_DEBUG_SPINLOCK=y ++CONFIG_DEBUG_MUTEXES=y ++CONFIG_DEBUG_RWSEMS=y ++CONFIG_DEBUG_ATOMIC_SLEEP=y + CONFIG_STACKTRACE=y ++CONFIG_DEBUG_LIST=y ++CONFIG_DEBUG_PLIST=y ++CONFIG_DEBUG_SG=y + # CONFIG_RCU_TRACE is not set ++CONFIG_RCU_EQS_DEBUG=y ++CONFIG_DEBUG_BLOCK_EXT_DEVT=y ++# CONFIG_FTRACE is not set ++# CONFIG_RUNTIME_TESTING_MENU is not set ++CONFIG_MEMTEST=y ++# CONFIG_SYSFS_SYSCALL is not set + CONFIG_EFI=y +diff --git a/arch/riscv/configs/starfive_jh7110_defconfig b/arch/riscv/configs/starfive_jh7110_defconfig +new file mode 100755 +index 000000000000..d31249f1d396 +--- /dev/null ++++ b/arch/riscv/configs/starfive_jh7110_defconfig +@@ -0,0 +1,284 @@ ++CONFIG_COMPILE_TEST=y ++CONFIG_DEFAULT_HOSTNAME="StarFive" ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_USELIB=y ++CONFIG_NO_HZ_IDLE=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_CGROUPS=y ++CONFIG_CGROUP_SCHED=y ++CONFIG_CFS_BANDWIDTH=y ++CONFIG_CGROUP_BPF=y ++CONFIG_NAMESPACES=y ++CONFIG_USER_NS=y ++CONFIG_CHECKPOINT_RESTORE=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_EXPERT=y ++CONFIG_BPF_SYSCALL=y ++CONFIG_PERF_EVENTS=y ++CONFIG_SOC_STARFIVE=y ++CONFIG_SMP=y ++CONFIG_HZ_100=y ++CONFIG_HIBERNATION=y ++CONFIG_PM_STD_PARTITION="PARTLABEL=hibernation" ++CONFIG_PM_DEBUG=y ++CONFIG_PM_ADVANCED_DEBUG=y ++CONFIG_PM_TEST_SUSPEND=y ++CONFIG_ENERGY_MODEL=y ++CONFIG_CPU_IDLE=y ++CONFIG_RISCV_SBI_CPUIDLE=y ++# CONFIG_SECCOMP is not set ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_PAGE_REPORTING=y ++CONFIG_CMA=y ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_ADVANCED_ROUTER=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_BOOTP=y ++CONFIG_IP_PNP_RARP=y ++CONFIG_NETFILTER=y ++CONFIG_NETFILTER_NETLINK_ACCT=y ++CONFIG_NETFILTER_NETLINK_QUEUE=y ++CONFIG_NF_CONNTRACK=y ++CONFIG_NF_TABLES=y ++CONFIG_NFT_CT=y ++CONFIG_NFT_COMPAT=y ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y ++CONFIG_NETFILTER_XT_MATCH_IPCOMP=y ++CONFIG_NETFILTER_XT_MATCH_IPRANGE=y ++CONFIG_NETFILTER_XT_MATCH_MAC=y ++CONFIG_NETFILTER_XT_MATCH_MARK=y ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y ++CONFIG_NETFILTER_XT_MATCH_SOCKET=y ++CONFIG_NETFILTER_XT_MATCH_STATE=y ++CONFIG_NETFILTER_XT_MATCH_STRING=y ++CONFIG_NETFILTER_XT_MATCH_U32=y ++CONFIG_NF_TABLES_IPV4=y ++CONFIG_NFT_DUP_IPV4=y ++CONFIG_NFT_FIB_IPV4=y ++CONFIG_IP_NF_IPTABLES=y ++CONFIG_IP_NF_FILTER=y ++CONFIG_IP_NF_TARGET_REJECT=y ++CONFIG_IP_NF_NAT=y ++CONFIG_IP_NF_TARGET_MASQUERADE=y ++CONFIG_IP_NF_TARGET_NETMAP=y ++CONFIG_IP_NF_TARGET_REDIRECT=y ++CONFIG_NETLINK_DIAG=y ++CONFIG_CAN=y ++CONFIG_IPMS_CAN=y ++CONFIG_CFG80211=y ++CONFIG_MAC80211=y ++CONFIG_NET_9P=y ++CONFIG_NET_9P_VIRTIO=y ++CONFIG_PCI=y ++CONFIG_PCIEPORTBUS=y ++# CONFIG_PCIEASPM is not set ++CONFIG_PCIE_PLDA=y ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_MTD=y ++CONFIG_MTD_BLOCK=y ++CONFIG_MTD_SPI_NOR=y ++CONFIG_OF_CONFIGFS=y ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_VIRTIO_BLK=y ++CONFIG_BLK_DEV_NVME=y ++CONFIG_BLK_DEV_SD=y ++CONFIG_BLK_DEV_SR=y ++CONFIG_SCSI_VIRTIO=y ++CONFIG_ATA=y ++CONFIG_SATA_AHCI=y ++CONFIG_NETDEVICES=y ++CONFIG_VIRTIO_NET=y ++CONFIG_R8169=y ++CONFIG_STMMAC_ETH=y ++CONFIG_STMMAC_SELFTESTS=y ++CONFIG_DWMAC_STARFIVE_PLAT=y ++CONFIG_MARVELL_PHY=y ++CONFIG_MICREL_PHY=y ++CONFIG_MOTORCOMM_PHY=y ++CONFIG_IWLWIFI=y ++CONFIG_IWLDVM=y ++CONFIG_IWLMVM=y ++CONFIG_INPUT_EVDEV=y ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_TINKER_FT5406=y ++CONFIG_SERIAL_8250=y ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_SERIAL_8250_NR_UARTS=6 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=6 ++CONFIG_SERIAL_8250_EXTENDED=y ++CONFIG_SERIAL_8250_MANY_PORTS=y ++CONFIG_SERIAL_8250_DW=y ++CONFIG_SERIAL_OF_PLATFORM=y ++CONFIG_SERIAL_EARLYCON_RISCV_SBI=y ++CONFIG_SERIAL_SIFIVE=y ++CONFIG_SERIAL_SIFIVE_CONSOLE=y ++CONFIG_HVC_RISCV_SBI=y ++CONFIG_TTY_PRINTK=y ++CONFIG_VIRTIO_CONSOLE=y ++CONFIG_HW_RANDOM=y ++CONFIG_HW_RANDOM_STARFIVE=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_DESIGNWARE_PLATFORM=y ++CONFIG_SPI=y ++CONFIG_SPI_CADENCE_QUADSPI=y ++CONFIG_SPI_PL022_STARFIVE=y ++CONFIG_SPI_SIFIVE=y ++CONFIG_SPI_SPIDEV=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_STARFIVE_JH7110=y ++CONFIG_GPIO_SYSFS=y ++CONFIG_POWER_RESET=y ++CONFIG_POWER_RESET_SYSCON=y ++CONFIG_POWER_RESET_SYSCON_POWEROFF=y ++CONFIG_SENSORS_SFCTEMP=y ++CONFIG_THERMAL=y ++CONFIG_THERMAL_WRITABLE_TRIPS=y ++CONFIG_CPU_THERMAL=y ++CONFIG_THERMAL_EMULATION=y ++CONFIG_WATCHDOG=y ++CONFIG_WATCHDOG_SYSFS=y ++CONFIG_STARFIVE_WATCHDOG=y ++# CONFIG_ABX500_CORE is not set ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_AXP15060=y ++CONFIG_REGULATOR_STARFIVE_JH7110=y ++# CONFIG_MEDIA_CEC_SUPPORT is not set ++CONFIG_MEDIA_SUPPORT=y ++CONFIG_MEDIA_USB_SUPPORT=y ++CONFIG_USB_VIDEO_CLASS=y ++CONFIG_V4L_PLATFORM_DRIVERS=y ++CONFIG_VIDEO_STF_VIN=y ++CONFIG_VIN_SENSOR_SC2235=y ++CONFIG_VIN_SENSOR_OV4689=y ++CONFIG_VIN_SENSOR_IMX219=y ++CONFIG_DRM_I2C_NXP_TDA998X=y ++CONFIG_DRM_VERISILICON=y ++CONFIG_STARFIVE_INNO_HDMI=y ++CONFIG_STARFIVE_DSI=y ++CONFIG_DRM_IMG_ROGUE=y ++CONFIG_DRM_LEGACY=y ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_USB_AUDIO=y ++CONFIG_SND_SOC=y ++CONFIG_SND_SOC_STARFIVE=y ++CONFIG_SND_SOC_STARFIVE_PWMDAC=y ++CONFIG_SND_SOC_STARFIVE_PDM=y ++CONFIG_SND_SOC_STARFIVE_TDM=y ++CONFIG_SND_SOC_STARFIVE_SPDIF=y ++CONFIG_SND_SOC_STARFIVE_SPDIF_PCM=y ++CONFIG_SND_SOC_AC108=y ++CONFIG_SND_SOC_SPDIF=y ++CONFIG_SND_SOC_WM8960=y ++CONFIG_SND_SIMPLE_CARD=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_UAS=y ++CONFIG_USB_CDNS3=y ++CONFIG_USB_CDNS3_GADGET=y ++CONFIG_USB_CDNS3_HOST=y ++CONFIG_USB_CDNS3_STARFIVE=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_CONFIGFS=y ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS_F_FS=y ++CONFIG_MMC=y ++CONFIG_MMC_DEBUG=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_OF_DWCMSHC=y ++CONFIG_MMC_SPI=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_STARFIVE=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_DRV_STARFIVE=y ++CONFIG_RTC_DRV_GOLDFISH=y ++CONFIG_DMADEVICES=y ++CONFIG_DW_AXI_DMAC=y ++CONFIG_DMATEST=y ++CONFIG_GOLDFISH=y ++CONFIG_CLK_STARFIVE_JH7110_PLL=y ++CONFIG_STARFIVE_TIMER=y ++CONFIG_MAILBOX=y ++CONFIG_RPMSG_CHAR=y ++CONFIG_RPMSG_VIRTIO=y ++CONFIG_STARFIVE_PMU=y ++CONFIG_PWM=y ++CONFIG_PWM_STARFIVE_PTC=y ++CONFIG_PHY_M31_DPHY_RX0=y ++CONFIG_RAS=y ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_STAT=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_POWERSAVE=y ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y ++CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y ++CONFIG_CPUFREQ_DT=y ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=y ++CONFIG_CUSE=y ++CONFIG_VIRTIO_FS=y ++CONFIG_OVERLAY_FS=y ++CONFIG_OVERLAY_FS_INDEX=y ++CONFIG_OVERLAY_FS_XINO_AUTO=y ++CONFIG_OVERLAY_FS_METACOPY=y ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_UTF8=y ++CONFIG_EXFAT_FS=y ++CONFIG_NTFS_FS=y ++CONFIG_NTFS_RW=y ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_HUGETLBFS=y ++CONFIG_JFFS2_FS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V4=y ++CONFIG_NFS_V4_1=y ++CONFIG_NFS_V4_2=y ++CONFIG_ROOT_NFS=y ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_ISO8859_1=y ++CONFIG_CRYPTO_USER=y ++CONFIG_CRYPTO_ECDH=y ++CONFIG_CRYPTO_ECB=y ++CONFIG_CRYPTO_SHA512=y ++CONFIG_CRYPTO_USER_API_HASH=y ++CONFIG_CRYPTO_USER_API_SKCIPHER=y ++CONFIG_CRYPTO_USER_API_RNG=y ++CONFIG_CRYPTO_USER_API_AEAD=y ++CONFIG_CRYPTO_USER_API_AKCIPHER=y ++CONFIG_CRYPTO_DEV_VIRTIO=y ++CONFIG_CRYPTO_DEV_JH7110_ENCRYPT=y ++CONFIG_DMA_CMA=y ++CONFIG_PRINTK_TIME=y ++CONFIG_DEBUG_FS=y ++CONFIG_SOFTLOCKUP_DETECTOR=y ++CONFIG_WQ_WATCHDOG=y ++CONFIG_DEBUG_TIMEKEEPING=y ++CONFIG_DEBUG_RT_MUTEXES=y ++CONFIG_DEBUG_SPINLOCK=y ++CONFIG_DEBUG_RWSEMS=y ++CONFIG_DEBUG_ATOMIC_SLEEP=y ++CONFIG_STACKTRACE=y ++CONFIG_DEBUG_LIST=y ++CONFIG_DEBUG_PLIST=y ++CONFIG_DEBUG_SG=y ++CONFIG_RCU_EQS_DEBUG=y ++CONFIG_MEMTEST=y +diff --git a/arch/riscv/configs/starfive_visionfive2_defconfig b/arch/riscv/configs/starfive_visionfive2_defconfig +new file mode 100755 +index 000000000000..f3fd3ec329f6 +--- /dev/null ++++ b/arch/riscv/configs/starfive_visionfive2_defconfig +@@ -0,0 +1,287 @@ ++CONFIG_DEFAULT_HOSTNAME="StarFive" ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_USELIB=y ++CONFIG_NO_HZ_IDLE=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_CGROUPS=y ++CONFIG_CGROUP_SCHED=y ++CONFIG_CFS_BANDWIDTH=y ++CONFIG_CGROUP_BPF=y ++CONFIG_NAMESPACES=y ++CONFIG_USER_NS=y ++CONFIG_CHECKPOINT_RESTORE=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_EXPERT=y ++CONFIG_BPF_SYSCALL=y ++CONFIG_PERF_EVENTS=y ++CONFIG_SOC_STARFIVE=y ++CONFIG_SMP=y ++CONFIG_HZ_100=y ++CONFIG_HIBERNATION=y ++CONFIG_PM_STD_PARTITION="PARTLABEL=hibernation" ++CONFIG_PM_DEBUG=y ++CONFIG_PM_ADVANCED_DEBUG=y ++CONFIG_PM_TEST_SUSPEND=y ++CONFIG_CPU_IDLE=y ++CONFIG_RISCV_SBI_CPUIDLE=y ++# CONFIG_SECCOMP is not set ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_PAGE_REPORTING=y ++CONFIG_CMA=y ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_ADVANCED_ROUTER=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_BOOTP=y ++CONFIG_IP_PNP_RARP=y ++CONFIG_NETFILTER=y ++CONFIG_NETFILTER_NETLINK_ACCT=y ++CONFIG_NETFILTER_NETLINK_QUEUE=y ++CONFIG_NF_CONNTRACK=y ++CONFIG_NF_TABLES=y ++CONFIG_NFT_CT=y ++CONFIG_NFT_COMPAT=y ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y ++CONFIG_NETFILTER_XT_MATCH_IPCOMP=y ++CONFIG_NETFILTER_XT_MATCH_IPRANGE=y ++CONFIG_NETFILTER_XT_MATCH_MAC=y ++CONFIG_NETFILTER_XT_MATCH_MARK=y ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y ++CONFIG_NETFILTER_XT_MATCH_SOCKET=y ++CONFIG_NETFILTER_XT_MATCH_STATE=y ++CONFIG_NETFILTER_XT_MATCH_STRING=y ++CONFIG_NETFILTER_XT_MATCH_U32=y ++CONFIG_NF_TABLES_IPV4=y ++CONFIG_NFT_DUP_IPV4=y ++CONFIG_NFT_FIB_IPV4=y ++CONFIG_IP_NF_IPTABLES=y ++CONFIG_IP_NF_FILTER=y ++CONFIG_IP_NF_TARGET_REJECT=y ++CONFIG_IP_NF_NAT=y ++CONFIG_IP_NF_TARGET_MASQUERADE=y ++CONFIG_IP_NF_TARGET_NETMAP=y ++CONFIG_IP_NF_TARGET_REDIRECT=y ++CONFIG_NETLINK_DIAG=y ++CONFIG_CAN=y ++CONFIG_IPMS_CAN=y ++CONFIG_CFG80211=y ++CONFIG_MAC80211=y ++CONFIG_NET_9P=y ++CONFIG_NET_9P_VIRTIO=y ++CONFIG_PCI=y ++# CONFIG_PCIEASPM is not set ++CONFIG_PCIE_PLDA=y ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_MTD=y ++CONFIG_MTD_BLOCK=y ++CONFIG_MTD_SPI_NOR=y ++CONFIG_OF_CONFIGFS=y ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_VIRTIO_BLK=y ++CONFIG_BLK_DEV_NVME=y ++CONFIG_EEPROM_AT24=y ++CONFIG_BLK_DEV_SD=y ++CONFIG_BLK_DEV_SR=y ++CONFIG_SCSI_VIRTIO=y ++CONFIG_ATA=y ++CONFIG_SATA_AHCI=y ++CONFIG_NETDEVICES=y ++CONFIG_VIRTIO_NET=y ++CONFIG_R8169=y ++CONFIG_STMMAC_ETH=y ++CONFIG_STMMAC_SELFTESTS=y ++CONFIG_DWMAC_DWC_QOS_ETH=y ++CONFIG_DWMAC_STARFIVE_PLAT=y ++CONFIG_MARVELL_PHY=y ++CONFIG_MICREL_PHY=y ++CONFIG_MOTORCOMM_PHY=y ++CONFIG_IWLWIFI=y ++CONFIG_IWLDVM=y ++CONFIG_IWLMVM=y ++CONFIG_HOSTAP=y ++# CONFIG_RTL_CARDS is not set ++CONFIG_USB_WIFI_ECR6600U=y ++CONFIG_INPUT_EVDEV=y ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_GOODIX=y ++CONFIG_TOUCHSCREEN_TINKER_FT5406=y ++CONFIG_SERIAL_8250=y ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_SERIAL_8250_NR_UARTS=6 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=6 ++CONFIG_SERIAL_8250_EXTENDED=y ++CONFIG_SERIAL_8250_MANY_PORTS=y ++CONFIG_SERIAL_8250_DW=y ++CONFIG_SERIAL_OF_PLATFORM=y ++CONFIG_SERIAL_EARLYCON_RISCV_SBI=y ++CONFIG_SERIAL_SIFIVE=y ++CONFIG_SERIAL_SIFIVE_CONSOLE=y ++CONFIG_HVC_RISCV_SBI=y ++CONFIG_TTY_PRINTK=y ++CONFIG_VIRTIO_CONSOLE=y ++CONFIG_HW_RANDOM=y ++CONFIG_HW_RANDOM_STARFIVE=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_DESIGNWARE_PLATFORM=y ++CONFIG_SPI=y ++CONFIG_SPI_CADENCE_QUADSPI=y ++CONFIG_SPI_PL022_STARFIVE=y ++CONFIG_SPI_SIFIVE=y ++CONFIG_SPI_SPIDEV=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_STARFIVE_JH7110=y ++CONFIG_GPIO_SYSFS=y ++CONFIG_POWER_RESET=y ++CONFIG_POWER_RESET_GPIO_RESTART=y ++CONFIG_POWER_RESET_SYSCON=y ++CONFIG_POWER_RESET_SYSCON_POWEROFF=y ++CONFIG_SENSORS_SFCTEMP=y ++CONFIG_THERMAL=y ++CONFIG_THERMAL_WRITABLE_TRIPS=y ++CONFIG_CPU_THERMAL=y ++CONFIG_THERMAL_EMULATION=y ++CONFIG_WATCHDOG=y ++CONFIG_WATCHDOG_SYSFS=y ++CONFIG_STARFIVE_WATCHDOG=y ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_AXP15060=y ++CONFIG_MEDIA_SUPPORT=y ++CONFIG_MEDIA_USB_SUPPORT=y ++CONFIG_USB_VIDEO_CLASS=y ++CONFIG_V4L_PLATFORM_DRIVERS=y ++CONFIG_VIDEO_STF_VIN=y ++CONFIG_VIN_SENSOR_IMX219=y ++CONFIG_DRM_I2C_NXP_TDA998X=y ++CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=y ++CONFIG_DRM_VERISILICON=y ++CONFIG_STARFIVE_INNO_HDMI=y ++CONFIG_STARFIVE_DSI=y ++CONFIG_DRM_IMG_ROGUE=y ++CONFIG_DRM_LEGACY=y ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_USB_AUDIO=y ++CONFIG_SND_SOC=y ++CONFIG_SND_DESIGNWARE_I2S=y ++CONFIG_SND_SOC_STARFIVE=y ++CONFIG_SND_SOC_STARFIVE_PWMDAC=y ++CONFIG_SND_SOC_STARFIVE_I2S=y ++CONFIG_SND_SOC_AC108=y ++CONFIG_SND_SOC_WM8960=y ++CONFIG_SND_SIMPLE_CARD=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_UAS=y ++CONFIG_USB_CDNS3=y ++CONFIG_USB_CDNS3_GADGET=y ++CONFIG_USB_CDNS3_HOST=y ++CONFIG_USB_CDNS3_STARFIVE=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_CONFIGFS=y ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS_F_FS=y ++CONFIG_MMC=y ++CONFIG_MMC_DEBUG=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_OF_DWCMSHC=y ++CONFIG_MMC_SPI=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_STARFIVE=y ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=y ++CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_TRIGGER_HEARTBEAT=y ++CONFIG_LEDS_TRIGGER_GPIO=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_DRV_STARFIVE=y ++CONFIG_RTC_DRV_GOLDFISH=y ++CONFIG_DMADEVICES=y ++CONFIG_DW_AXI_DMAC=y ++CONFIG_DMATEST=y ++CONFIG_GOLDFISH=y ++CONFIG_CLK_STARFIVE_JH7110_PLL=y ++CONFIG_STARFIVE_TIMER=y ++CONFIG_MAILBOX=y ++CONFIG_RPMSG_CHAR=y ++CONFIG_RPMSG_VIRTIO=y ++CONFIG_STARFIVE_PMU=y ++CONFIG_PWM=y ++CONFIG_PWM_STARFIVE_PTC=y ++CONFIG_PHY_M31_DPHY_RX0=y ++CONFIG_RAS=y ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_STAT=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_POWERSAVE=y ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y ++CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y ++CONFIG_CPUFREQ_DT=y ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=y ++CONFIG_CUSE=y ++CONFIG_VIRTIO_FS=y ++CONFIG_OVERLAY_FS=y ++CONFIG_OVERLAY_FS_INDEX=y ++CONFIG_OVERLAY_FS_XINO_AUTO=y ++CONFIG_OVERLAY_FS_METACOPY=y ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_UTF8=y ++CONFIG_EXFAT_FS=y ++CONFIG_NTFS_FS=y ++CONFIG_NTFS_RW=y ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_HUGETLBFS=y ++CONFIG_JFFS2_FS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V4=y ++CONFIG_NFS_V4_1=y ++CONFIG_NFS_V4_2=y ++CONFIG_ROOT_NFS=y ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_ISO8859_1=y ++CONFIG_CRYPTO_USER=y ++CONFIG_CRYPTO_TEST=m ++CONFIG_CRYPTO_ECDH=y ++CONFIG_CRYPTO_ECB=y ++CONFIG_CRYPTO_SHA512=y ++CONFIG_CRYPTO_USER_API_HASH=y ++CONFIG_CRYPTO_USER_API_SKCIPHER=y ++CONFIG_CRYPTO_USER_API_RNG=y ++CONFIG_CRYPTO_USER_API_AEAD=y ++CONFIG_CRYPTO_USER_API_AKCIPHER=y ++CONFIG_CRYPTO_DEV_VIRTIO=y ++CONFIG_CRYPTO_DEV_JH7110_ENCRYPT=y ++CONFIG_DMA_CMA=y ++CONFIG_PRINTK_TIME=y ++CONFIG_DEBUG_FS=y ++CONFIG_SOFTLOCKUP_DETECTOR=y ++CONFIG_WQ_WATCHDOG=y ++CONFIG_DEBUG_TIMEKEEPING=y ++CONFIG_DEBUG_RT_MUTEXES=y ++CONFIG_DEBUG_SPINLOCK=y ++CONFIG_DEBUG_RWSEMS=y ++CONFIG_DEBUG_ATOMIC_SLEEP=y ++CONFIG_STACKTRACE=y ++CONFIG_DEBUG_LIST=y ++CONFIG_DEBUG_PLIST=y ++CONFIG_DEBUG_SG=y ++CONFIG_RCU_EQS_DEBUG=y ++CONFIG_MEMTEST=y +diff --git a/drivers/Kconfig b/drivers/Kconfig +index b1b3d958f065..6182f144ea29 100644 +--- a/drivers/Kconfig ++++ b/drivers/Kconfig +@@ -240,4 +240,6 @@ source "drivers/most/Kconfig" + + source "drivers/roh/Kconfig" + ++source "drivers/cpufreq/Kconfig" ++ + endmenu +diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig +index 53e63d68ffb1..994105828610 100644 +--- a/drivers/char/hw_random/Kconfig ++++ b/drivers/char/hw_random/Kconfig +@@ -550,6 +550,17 @@ config HW_RANDOM_XIPHERA + To compile this driver as a module, choose M here: the + module will be called xiphera-trng. + ++config HW_RANDOM_STARFIVE ++ tristate "Starfive True Random Number Generator support" ++ depends on SOC_STARFIVE ++ depends on HW_RANDOM ++ help ++ This driver provides kernel-side support for the Random Number ++ Generator hardware found on Starfive SoC. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called starfive-trng. ++ + endif # HW_RANDOM + + config UML_RANDOM +diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile +index 67377d9e10f7..e6357933c748 100644 +--- a/drivers/char/hw_random/Makefile ++++ b/drivers/char/hw_random/Makefile +@@ -47,3 +47,4 @@ obj-$(CONFIG_HW_RANDOM_OPTEE) += optee-rng.o + obj-$(CONFIG_HW_RANDOM_NPCM) += npcm-rng.o + obj-$(CONFIG_HW_RANDOM_CCTRNG) += cctrng.o + obj-$(CONFIG_HW_RANDOM_XIPHERA) += xiphera-trng.o ++obj-$(CONFIG_HW_RANDOM_STARFIVE) += starfive-trng.o +diff --git a/drivers/char/hw_random/starfive-trng.c b/drivers/char/hw_random/starfive-trng.c +new file mode 100644 +index 000000000000..4c7d60109385 +--- /dev/null ++++ b/drivers/char/hw_random/starfive-trng.c +@@ -0,0 +1,415 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * TRNG driver for the StarFive SoC ++ * ++ * Copyright (C) 2022 StarFive Technology Co. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* trng register offset */ ++#define STARFIVE_CTRL 0x00 ++#define STARFIVE_STAT 0x04 ++#define STARFIVE_MODE 0x08 ++#define STARFIVE_SMODE 0x0C ++#define STARFIVE_IE 0x10 ++#define STARFIVE_ISTAT 0x14 ++#define STARFIVE_RAND0 0x20 ++#define STARFIVE_RAND1 0x24 ++#define STARFIVE_RAND2 0x28 ++#define STARFIVE_RAND3 0x2C ++#define STARFIVE_RAND4 0x30 ++#define STARFIVE_RAND5 0x34 ++#define STARFIVE_RAND6 0x38 ++#define STARFIVE_RAND7 0x3C ++#define STARFIVE_AUTO_RQSTS 0x60 ++#define STARFIVE_AUTO_AGE 0x64 ++ ++/* CTRL CMD */ ++#define STARFIVE_CTRL_EXEC_NOP (0x0) ++#define STARFIVE_CTRL_GENE_RANDNUM (0x1) ++#define STARFIVE_CTRL_EXEC_RANDRESEED (0x2) ++ ++/* STAT */ ++#define STARFIVE_STAT_NONCE_MODE BIT(2) ++#define STARFIVE_STAT_R256 BIT(3) ++#define STARFIVE_STAT_MISSION_MODE BIT(8) ++#define STARFIVE_STAT_SEEDED BIT(9) ++#define STARFIVE_STAT_LAST_RESEED(x) ((x) << 16) ++#define STARFIVE_STAT_SRVC_RQST BIT(27) ++#define STARFIVE_STAT_RAND_GENERATING BIT(30) ++#define STARFIVE_STAT_RAND_SEEDING BIT(31) ++ ++/* MODE */ ++#define STARFIVE_MODE_R256 BIT(3) ++ ++/* SMODE */ ++#define STARFIVE_SMODE_NONCE_MODE BIT(2) ++#define STARFIVE_SMODE_MISSION_MODE BIT(8) ++#define STARFIVE_SMODE_MAX_REJECTS(x) ((x) << 16) ++ ++/* IE */ ++#define STARFIVE_IE_RAND_RDY_EN BIT(0) ++#define STARFIVE_IE_SEED_DONE_EN BIT(1) ++#define STARFIVE_IE_LFSR_LOCKUP_EN BIT(4) ++#define STARFIVE_IE_GLBL_EN BIT(31) ++ ++#define STARFIVE_IE_ALL (STARFIVE_IE_GLBL_EN | \ ++ STARFIVE_IE_RAND_RDY_EN | \ ++ STARFIVE_IE_SEED_DONE_EN | \ ++ STARFIVE_IE_LFSR_LOCKUP_EN) ++ ++/* ISTAT */ ++#define STARFIVE_ISTAT_RAND_RDY BIT(0) ++#define STARFIVE_ISTAT_SEED_DONE BIT(1) ++#define STARFIVE_ISTAT_LFSR_LOCKUP BIT(4) ++ ++#define STARFIVE_RAND_LEN sizeof(u32) ++ ++#define to_trng(p) container_of(p, struct starfive_trng, rng) ++ ++enum reseed { ++ RANDOM_RESEED, ++ NONCE_RESEED, ++}; ++ ++enum mode { ++ PRNG_128BIT, ++ PRNG_256BIT, ++}; ++ ++struct starfive_trng { ++ struct device *dev; ++ void __iomem *base; ++ struct clk *hclk; ++ struct clk *ahb; ++ struct reset_control *rst; ++ struct hwrng rng; ++ struct completion random_done; ++ struct completion reseed_done; ++ u32 mode; ++ u32 mission; ++ u32 reseed; ++}; ++ ++static u16 autoreq; ++module_param(autoreq, ushort, 0); ++MODULE_PARM_DESC(autoreq, "Auto-reseeding after random number requests by host reaches specified counter:\n" ++ " 0 - disable counter\n" ++ " other - reload value for internal counter"); ++ ++static u16 autoage; ++module_param(autoage, ushort, 0); ++MODULE_PARM_DESC(autoage, "Auto-reseeding after specified timer countdowns to 0:\n" ++ " 0 - disable timer\n" ++ " other - reload value for internal timer"); ++ ++static inline int starfive_trng_wait_idle(struct starfive_trng *trng) ++{ ++ u32 stat; ++ ++ return readl_relaxed_poll_timeout(trng->base + STARFIVE_STAT, stat, ++ !(stat & (STARFIVE_STAT_RAND_GENERATING | ++ STARFIVE_STAT_RAND_SEEDING)), ++ 10, 100000); ++} ++ ++static inline int starfive_trng_random_done(struct starfive_trng *trng) ++{ ++ return wait_for_completion_timeout(&trng->random_done, 3000); ++} ++ ++static inline int starfive_trng_reseed_done(struct starfive_trng *trng) ++{ ++ return wait_for_completion_timeout(&trng->reseed_done, 3000); ++} ++ ++static inline void starfive_trng_irq_mask_clear(struct starfive_trng *trng) ++{ ++ /* clear register: ISTAT */ ++ u32 data = readl(trng->base + STARFIVE_ISTAT); ++ ++ writel(data, trng->base + STARFIVE_ISTAT); ++} ++ ++static int starfive_trng_cmd(struct starfive_trng *trng, u32 cmd) ++{ ++ int ret; ++ ++ ret = starfive_trng_wait_idle(trng); ++ if (ret) ++ return -ETIMEDOUT; ++ ++ switch (cmd) { ++ case STARFIVE_CTRL_EXEC_NOP: ++ writel(cmd, trng->base + STARFIVE_CTRL); ++ break; ++ case STARFIVE_CTRL_GENE_RANDNUM: ++ reinit_completion(&trng->random_done); ++ writel(cmd, trng->base + STARFIVE_CTRL); ++ ret = starfive_trng_random_done(trng); ++ if (!ret) ++ return -ETIMEDOUT; ++ break; ++ case STARFIVE_CTRL_EXEC_RANDRESEED: ++ reinit_completion(&trng->reseed_done); ++ writel(cmd, trng->base + STARFIVE_CTRL); ++ ret = starfive_trng_reseed_done(trng); ++ if (!ret) ++ return -ETIMEDOUT; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int starfive_trng_init(struct hwrng *rng) ++{ ++ struct starfive_trng *trng = to_trng(rng); ++ u32 mode, smode, intr = 0; ++ ++ /* disable Auto Request/Age register */ ++ writel(autoage, trng->base + STARFIVE_AUTO_AGE); ++ writel(autoreq, trng->base + STARFIVE_AUTO_RQSTS); ++ ++ /* clear register: ISTAT */ ++ starfive_trng_irq_mask_clear(trng); ++ ++ /* set smode/mode */ ++ mode = readl(trng->base + STARFIVE_MODE); ++ smode = readl(trng->base + STARFIVE_SMODE); ++ ++ switch (trng->mode) { ++ case PRNG_128BIT: ++ mode &= ~STARFIVE_MODE_R256; ++ break; ++ case PRNG_256BIT: ++ mode |= STARFIVE_MODE_R256; ++ break; ++ default: ++ mode |= STARFIVE_MODE_R256; ++ break; ++ } ++ ++ intr |= STARFIVE_IE_ALL; ++ writel(intr, trng->base + STARFIVE_IE); ++ writel(mode, trng->base + STARFIVE_MODE); ++ writel(smode, trng->base + STARFIVE_SMODE); ++ ++ starfive_trng_cmd(trng, STARFIVE_CTRL_EXEC_NOP); ++ ++ return starfive_trng_cmd(trng, STARFIVE_CTRL_EXEC_RANDRESEED); ++} ++ ++static irqreturn_t starfive_trng_irq(int irq, void *priv) ++{ ++ u32 status; ++ struct starfive_trng *trng = (struct starfive_trng *)priv; ++ ++ status = readl(trng->base + STARFIVE_ISTAT); ++ if (status & STARFIVE_ISTAT_RAND_RDY) { ++ writel(STARFIVE_ISTAT_RAND_RDY, trng->base + STARFIVE_ISTAT); ++ complete(&trng->random_done); ++ } ++ ++ if (status & STARFIVE_ISTAT_SEED_DONE) { ++ writel(STARFIVE_ISTAT_SEED_DONE, trng->base + STARFIVE_ISTAT); ++ complete(&trng->reseed_done); ++ } ++ ++ if (status & STARFIVE_ISTAT_LFSR_LOCKUP) { ++ writel(STARFIVE_ISTAT_LFSR_LOCKUP, trng->base + STARFIVE_ISTAT); ++ starfive_trng_cmd(trng, STARFIVE_CTRL_EXEC_RANDRESEED); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static void starfive_trng_cleanup(struct hwrng *rng) ++{ ++ struct starfive_trng *trng = to_trng(rng); ++ ++ writel(0, trng->base + STARFIVE_CTRL); ++ ++ reset_control_assert(trng->rst); ++ clk_disable_unprepare(trng->hclk); ++ clk_disable_unprepare(trng->ahb); ++} ++ ++static int starfive_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait) ++{ ++ struct starfive_trng *trng = to_trng(rng); ++ int ret; ++ ++ pm_runtime_get_sync(trng->dev); ++ ++ if (trng->mode == PRNG_256BIT) ++ max = min_t(size_t, max, (STARFIVE_RAND_LEN * 8)); ++ else ++ max = min_t(size_t, max, (STARFIVE_RAND_LEN * 4)); ++ ++ ret = starfive_trng_cmd(trng, STARFIVE_CTRL_GENE_RANDNUM); ++ if (ret) ++ return ret; ++ ++ memcpy_fromio(buf, trng->base + STARFIVE_RAND0, max); ++ ++ pm_runtime_put_sync(trng->dev); ++ ++ return max; ++} ++ ++static int starfive_trng_probe(struct platform_device *pdev) ++{ ++ int ret; ++ int irq; ++ struct starfive_trng *trng; ++ ++ trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL); ++ if (!trng) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, trng); ++ trng->dev = &pdev->dev; ++ ++ trng->base = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(trng->base)) ++ return dev_err_probe(&pdev->dev, PTR_ERR(trng->base), ++ "Error remapping memory for platform device.\n"); ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) ++ return irq; ++ ++ ret = devm_request_irq(&pdev->dev, irq, starfive_trng_irq, 0, pdev->name, ++ (void *)trng); ++ if (ret) ++ return dev_err_probe(&pdev->dev, irq, ++ "Failed to register interrupt handler\n"); ++ ++ trng->hclk = devm_clk_get(&pdev->dev, "hclk"); ++ if (IS_ERR(trng->hclk)) ++ return dev_err_probe(&pdev->dev, PTR_ERR(trng->hclk), ++ "Error getting hardware reference clock\n"); ++ ++ trng->ahb = devm_clk_get(&pdev->dev, "ahb"); ++ if (IS_ERR(trng->ahb)) ++ return dev_err_probe(&pdev->dev, PTR_ERR(trng->ahb), ++ "Error getting ahb reference clock\n"); ++ ++ trng->rst = devm_reset_control_get_shared(&pdev->dev, NULL); ++ if (IS_ERR(trng->rst)) ++ return dev_err_probe(&pdev->dev, PTR_ERR(trng->rst), ++ "Error getting hardware reset line\n"); ++ ++ clk_prepare_enable(trng->hclk); ++ clk_prepare_enable(trng->ahb); ++ reset_control_deassert(trng->rst); ++ ++ init_completion(&trng->random_done); ++ init_completion(&trng->reseed_done); ++ ++ trng->rng.name = dev_driver_string(&pdev->dev); ++ trng->rng.init = starfive_trng_init; ++ trng->rng.cleanup = starfive_trng_cleanup; ++ trng->rng.read = starfive_trng_read; ++ ++ trng->mode = PRNG_256BIT; ++ trng->mission = 1; ++ trng->reseed = RANDOM_RESEED; ++ ++ ret = devm_hwrng_register(&pdev->dev, &trng->rng); ++ if (ret) { ++ dev_err_probe(&pdev->dev, ret, "Failed to register hwrng\n"); ++ goto err_fail_register; ++ } ++ ++ pm_runtime_use_autosuspend(&pdev->dev); ++ pm_runtime_set_autosuspend_delay(&pdev->dev, 100); ++ pm_runtime_enable(&pdev->dev); ++ ++ return 0; ++ ++err_fail_register: ++ pm_runtime_disable(&pdev->dev); ++ ++ reset_control_assert(trng->rst); ++ clk_disable_unprepare(trng->ahb); ++ clk_disable_unprepare(trng->hclk); ++ ++ return ret; ++} ++ ++#ifdef CONFIG_PM ++static int starfive_trng_runtime_suspend(struct device *dev) ++{ ++ struct starfive_trng *trng = dev_get_drvdata(dev); ++ ++ clk_disable_unprepare(trng->hclk); ++ clk_disable_unprepare(trng->ahb); ++ ++ return 0; ++} ++ ++static int starfive_trng_runtime_resume(struct device *dev) ++{ ++ struct starfive_trng *trng = dev_get_drvdata(dev); ++ ++ clk_prepare_enable(trng->hclk); ++ clk_prepare_enable(trng->ahb); ++ ++ return 0; ++} ++ ++static int starfive_trng_runtime_idle(struct device *dev) ++{ ++ pm_runtime_mark_last_busy(dev); ++ pm_runtime_autosuspend(dev); ++ ++ return 0; ++} ++#endif ++ ++static const struct dev_pm_ops starfive_trng_pm_ops = { ++ SET_RUNTIME_PM_OPS(starfive_trng_runtime_suspend, ++ starfive_trng_runtime_resume, ++ starfive_trng_runtime_idle) ++ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, ++ pm_runtime_force_resume) ++}; ++ ++static const struct of_device_id trng_dt_ids[] = { ++ { .compatible = "starfive,jh7110-trng" }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, trng_dt_ids); ++ ++static struct platform_driver starfive_trng_driver = { ++ .probe = starfive_trng_probe, ++ .driver = { ++ .name = "starfive-trng", ++ .pm = &starfive_trng_pm_ops, ++ .of_match_table = of_match_ptr(trng_dt_ids), ++ }, ++}; ++ ++module_platform_driver(starfive_trng_driver); ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("StarFive True Random Number Generator"); +diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig +index c715d4681a0b..bf736fc45bc5 100644 +--- a/drivers/clk/Kconfig ++++ b/drivers/clk/Kconfig +@@ -377,6 +377,7 @@ source "drivers/clk/rockchip/Kconfig" + source "drivers/clk/samsung/Kconfig" + source "drivers/clk/sifive/Kconfig" + source "drivers/clk/sprd/Kconfig" ++source "drivers/clk/starfive/Kconfig" + source "drivers/clk/sunxi/Kconfig" + source "drivers/clk/sunxi-ng/Kconfig" + source "drivers/clk/tegra/Kconfig" +diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile +index da8fcf147eb1..f5ab7752aa74 100644 +--- a/drivers/clk/Makefile ++++ b/drivers/clk/Makefile +@@ -111,6 +111,7 @@ obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ + obj-$(CONFIG_PLAT_SPEAR) += spear/ + obj-y += sprd/ + obj-$(CONFIG_ARCH_STI) += st/ ++obj-$(CONFIG_SOC_STARFIVE) += starfive/ + obj-$(CONFIG_ARCH_SUNXI) += sunxi/ + obj-$(CONFIG_SUNXI_CCU) += sunxi-ng/ + obj-$(CONFIG_ARCH_TEGRA) += tegra/ +diff --git a/drivers/clk/starfive/Kconfig b/drivers/clk/starfive/Kconfig +new file mode 100644 +index 000000000000..839538e33708 +--- /dev/null ++++ b/drivers/clk/starfive/Kconfig +@@ -0,0 +1,34 @@ ++# SPDX-License-Identifier: GPL-2.0 ++ ++config CLK_STARFIVE_JH7110 ++ bool "StarFive JH7110 clock support" ++ depends on SOC_STARFIVE || COMPILE_TEST ++ default y if SOC_STARFIVE ++ help ++ Say yes here to support the clock controller on the StarFive ++ JH7110 SoC. ++ ++config CLK_STARFIVE_JH7110_VOUT ++ bool "StarFive JH7110 vout clock support" ++ depends on CLK_STARFIVE_JH7110 ++ default y if SOC_STARFIVE ++ help ++ Say yes here to support the vout clocks on the StarFive ++ JH7100 SoC. ++ ++config CLK_STARFIVE_JH7110_ISP ++ bool "StarFive JH7110 isp clock support" ++ depends on CLK_STARFIVE_JH7110 ++ default y if SOC_STARFIVE ++ help ++ Say yes here to support the isp clocks on the StarFive ++ JH7110 SoC. ++ ++config CLK_STARFIVE_JH7110_PLL ++ bool "StarFive JH7110 pll clock support" ++ depends on CLK_STARFIVE_JH7110 ++ default y if SOC_STARFIVE_JH7110 ++ help ++ Say yes here to support the pll clocks on the StarFive ++ JH7110 SoC and then change or read the pll clock's rate ++ through setting or reading the syscon registers and calculate. +diff --git a/drivers/clk/starfive/Makefile b/drivers/clk/starfive/Makefile +new file mode 100644 +index 000000000000..8f01cb796309 +--- /dev/null ++++ b/drivers/clk/starfive/Makefile +@@ -0,0 +1,9 @@ ++# SPDX-License-Identifier: GPL-2.0 ++# StarFive Clock ++obj-$(CONFIG_CLK_STARFIVE_JH7110) += clk-starfive-jh7110-gen.o \ ++ clk-starfive-jh7110-sys.o \ ++ clk-starfive-jh7110-stg.o \ ++ clk-starfive-jh7110-aon.o ++obj-$(CONFIG_CLK_STARFIVE_JH7110_VOUT) += clk-starfive-jh7110-vout.o ++obj-$(CONFIG_CLK_STARFIVE_JH7110_ISP) += clk-starfive-jh7110-isp.o ++obj-$(CONFIG_CLK_STARFIVE_JH7110_PLL) += clk-starfive-jh7110-pll.o +diff --git a/drivers/clk/starfive/clk-starfive-jh7110-aon.c b/drivers/clk/starfive/clk-starfive-jh7110-aon.c +new file mode 100755 +index 000000000000..2786b37cc08f +--- /dev/null ++++ b/drivers/clk/starfive/clk-starfive-jh7110-aon.c +@@ -0,0 +1,165 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * StarFive JH7110 aon Clock Generator Driver ++ * ++ * Copyright (C) 2022 Xingyu Wu ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include "clk-starfive-jh7110.h" ++ ++/* external clocks */ ++#define JH7110_OSC (JH7110_CLK_END + 0) ++/* aon external clocks */ ++#define JH7110_GMAC0_RMII_REFIN (JH7110_CLK_END + 12) ++#define JH7110_GMAC0_RGMII_RXIN (JH7110_CLK_END + 13) ++#define JH7110_CLK_RTC (JH7110_CLK_END + 14) ++ ++static const struct jh7110_clk_data jh7110_clk_aon_data[] __initconst = { ++ //source ++ JH7110__DIV(JH7110_OSC_DIV4, "osc_div4", 4, JH7110_OSC), ++ JH7110__MUX(JH7110_AON_APB_FUNC, "aon_apb_func", PARENT_NUMS_2, ++ JH7110_OSC_DIV4, ++ JH7110_OSC), ++ //gmac5 ++ JH7110_GATE(JH7110_U0_GMAC5_CLK_AHB, ++ "u0_dw_gmac5_axi64_clk_ahb", ++ GATE_FLAG_NORMAL, JH7110_AON_AHB), ++ JH7110_GATE(JH7110_U0_GMAC5_CLK_AXI, ++ "u0_dw_gmac5_axi64_clk_axi", ++ GATE_FLAG_NORMAL, JH7110_AON_AHB), ++ JH7110__DIV(JH7110_GMAC0_RMII_RTX, ++ "gmac0_rmii_rtx", 30, JH7110_GMAC0_RMII_REFIN), ++ JH7110_GMUX(JH7110_U0_GMAC5_CLK_TX, ++ "u0_dw_gmac5_axi64_clk_tx", ++ GATE_FLAG_NORMAL, PARENT_NUMS_2, ++ JH7110_GMAC0_GTXCLK, ++ JH7110_GMAC0_RMII_RTX), ++ JH7110__INV(JH7110_U0_GMAC5_CLK_TX_INV, ++ "u0_dw_gmac5_axi64_clk_tx_inv", ++ JH7110_U0_GMAC5_CLK_TX), ++ JH7110__MUX(JH7110_U0_GMAC5_CLK_RX, ++ "u0_dw_gmac5_axi64_clk_rx", PARENT_NUMS_2, ++ JH7110_GMAC0_RGMII_RXIN, ++ JH7110_GMAC0_RMII_RTX), ++ JH7110__INV(JH7110_U0_GMAC5_CLK_RX_INV, ++ "u0_dw_gmac5_axi64_clk_rx_inv", ++ JH7110_U0_GMAC5_CLK_RX), ++ //otpc ++ JH7110_GATE(JH7110_OTPC_CLK_APB, ++ "u0_otpc_clk_apb", ++ CLK_IGNORE_UNUSED, JH7110_AON_APB), ++ //rtc ++ JH7110_GATE(JH7110_RTC_HMS_CLK_APB, ++ "u0_rtc_hms_clk_apb", ++ CLK_IGNORE_UNUSED, JH7110_AON_APB), ++ JH7110__DIV(JH7110_RTC_INTERNAL, ++ "rtc_internal", 1022, JH7110_OSC), ++ JH7110__MUX(JH7110_RTC_HMS_CLK_OSC32K, ++ "u0_rtc_hms_clk_osc32k", PARENT_NUMS_2, ++ JH7110_CLK_RTC, ++ JH7110_RTC_INTERNAL), ++ JH7110_GATE(JH7110_RTC_HMS_CLK_CAL, ++ "u0_rtc_hms_clk_cal", ++ GATE_FLAG_NORMAL, JH7110_OSC), ++}; ++ ++int __init clk_starfive_jh7110_aon_init(struct platform_device *pdev, ++ struct jh7110_clk_priv *priv) ++{ ++ unsigned int idx; ++ int ret = 0; ++ ++ priv->aon_base = devm_platform_ioremap_resource_byname(pdev, "aon"); ++ if (IS_ERR(priv->aon_base)) ++ return PTR_ERR(priv->aon_base); ++ ++ priv->pll[PLL_OF(JH7110_U0_GMAC5_CLK_PTP)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dw_gmac5_axi64_clk_ptp", "gmac0_ptp", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_U0_GMAC5_CLK_RMII)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dw_gmac5_axi64_clk_rmii", ++ "gmac0_rmii_refin", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_AON_SYSCON_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_aon_syscon_pclk", "aon_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_AON_IOMUX_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_aon_iomux_pclk", "aon_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_AON_CRG_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_aon_crg_pclk", "aon_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PMU_CLK_APB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_pmu_clk_apb", "aon_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PMU_CLK_WKUP)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_pmu_clk_wkup", "aon_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_RTC_HMS_CLK_OSC32K_G)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_rtc_hms_clk_osc32k_g", ++ "u0_rtc_hms_clk_osc32k", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_32K_OUT)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "32k_out", "clk_rtc", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_RESET0_CTRL_CLK_SRC)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_reset_ctrl_clk_src", "osc", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PCLK_MUX_FUNC_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_pclk_mux_func_pclk", "aon_apb_func", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PCLK_MUX_BIST_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_pclk_mux_bist_pclk", "bist_apb", 0, 1, 1); ++ ++ for (idx = JH7110_CLK_STG_REG_END; idx < JH7110_CLK_REG_END; idx++) { ++ u32 max = jh7110_clk_aon_data[idx].max; ++ struct clk_parent_data parents[4] = {}; ++ struct clk_init_data init = { ++ .name = jh7110_clk_aon_data[idx].name, ++ .ops = starfive_jh7110_clk_ops(max), ++ .parent_data = parents, ++ .num_parents = ((max & JH7110_CLK_MUX_MASK) >> ++ JH7110_CLK_MUX_SHIFT) + 1, ++ .flags = jh7110_clk_aon_data[idx].flags, ++ }; ++ struct jh7110_clk *clk = &priv->reg[idx]; ++ unsigned int i; ++ ++ for (i = 0; i < init.num_parents; i++) { ++ unsigned int pidx = jh7110_clk_aon_data[idx].parents[i]; ++ ++ if (pidx < JH7110_CLK_REG_END) ++ parents[i].hw = &priv->reg[pidx].hw; ++ else if ((pidx < JH7110_CLK_END) && ++ (pidx > JH7110_RTC_HMS_CLK_CAL)) ++ parents[i].hw = priv->pll[PLL_OF(pidx)]; ++ else if (pidx == JH7110_OSC) ++ parents[i].fw_name = "osc"; ++ else if (pidx == JH7110_GMAC0_RMII_REFIN) ++ parents[i].fw_name = "gmac0_rmii_refin"; ++ else if (pidx == JH7110_GMAC0_RGMII_RXIN) ++ parents[i].fw_name = "gmac0_rgmii_rxin"; ++ else if (pidx == JH7110_CLK_RTC) ++ parents[i].fw_name = "clk_rtc"; ++ } ++ ++ clk->hw.init = &init; ++ clk->idx = idx; ++ clk->max_div = max & JH7110_CLK_DIV_MASK; ++ clk->reg_flags = JH7110_CLK_AON_FLAG; ++ ++ ret = devm_clk_hw_register(priv->dev, &clk->hw); ++ if (ret) ++ return ret; ++ } ++ ++ dev_dbg(&pdev->dev, "starfive JH7110 clk_aon init successfully."); ++ return 0; ++} +diff --git a/drivers/clk/starfive/clk-starfive-jh7110-gen.c b/drivers/clk/starfive/clk-starfive-jh7110-gen.c +new file mode 100644 +index 000000000000..ac2e2f3fded1 +--- /dev/null ++++ b/drivers/clk/starfive/clk-starfive-jh7110-gen.c +@@ -0,0 +1,634 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * StarFive JH7110 Clock Generator Driver ++ * ++ * Copyright (C) 2022 Xingyu Wu ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include "clk-starfive-jh7110.h" ++#include "clk-starfive-jh7110-pll.h" ++ ++static struct jh7110_clk * __init jh7110_clk_from(struct clk_hw *hw) ++{ ++ return container_of(hw, struct jh7110_clk, hw); ++} ++ ++static struct jh7110_clk_priv *jh7110_priv_from(struct jh7110_clk *clk) ++{ ++ return container_of(clk, struct jh7110_clk_priv, reg[clk->idx]); ++} ++ ++void __iomem *jh7110_clk_reg_addr_get(struct jh7110_clk *clk) ++{ ++ void __iomem *reg; ++ struct jh7110_clk_priv *priv = jh7110_priv_from(clk); ++ ++ if (clk->reg_flags == JH7110_CLK_SYS_FLAG) ++ reg = priv->sys_base + 4 * clk->idx; ++ else if (clk->reg_flags == JH7110_CLK_STG_FLAG) ++ reg = priv->stg_base + 4 * (clk->idx - JH7110_CLK_SYS_REG_END); ++ else if (clk->reg_flags == JH7110_CLK_AON_FLAG) ++ reg = priv->aon_base + 4 * (clk->idx - JH7110_CLK_STG_REG_END); ++ else if (clk->reg_flags == JH7110_CLK_VOUT_FLAG) ++ reg = priv->vout_base + 4 * clk->idx; ++ else if (clk->reg_flags == JH7110_CLK_ISP_FLAG) ++ reg = priv->isp_base + 4 * clk->idx; ++ ++ return reg; ++} ++ ++static u32 jh7110_clk_reg_get(struct jh7110_clk *clk) ++{ ++ void __iomem *reg = jh7110_clk_reg_addr_get(clk); ++ ++ if ((clk->reg_flags == JH7110_CLK_ISP_FLAG) || (clk->reg_flags == JH7110_CLK_VOUT_FLAG)) { ++ int ret; ++ struct jh7110_clk_priv *priv = jh7110_priv_from(clk); ++ ++ if (pm_runtime_suspended(priv->dev)) { ++ ret = pm_runtime_get_sync(priv->dev); ++ if (ret < 0) { ++ dev_err(priv->dev, "cannot resume device :%d.\n", ret); ++ return 0; ++ } ++ pm_runtime_put(priv->dev); ++ } ++ } ++ ++ return readl_relaxed(reg); ++} ++ ++static void jh7110_clk_reg_rmw(struct jh7110_clk *clk, u32 mask, u32 value) ++{ ++ struct jh7110_clk_priv *priv = jh7110_priv_from(clk); ++ void __iomem *reg = jh7110_clk_reg_addr_get(clk); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&priv->rmw_lock, flags); ++ value |= jh7110_clk_reg_get(clk) & ~mask; ++ writel_relaxed(value, reg); ++ spin_unlock_irqrestore(&priv->rmw_lock, flags); ++} ++ ++static int jh7110_clk_enable(struct clk_hw *hw) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ ++ jh7110_clk_reg_rmw(clk, JH7110_CLK_ENABLE, JH7110_CLK_ENABLE); ++ return 0; ++} ++ ++static void jh7110_clk_disable(struct clk_hw *hw) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ ++ jh7110_clk_reg_rmw(clk, JH7110_CLK_ENABLE, 0); ++} ++ ++static int jh7110_clk_is_enabled(struct clk_hw *hw) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ ++ return !!(jh7110_clk_reg_get(clk) & JH7110_CLK_ENABLE); ++} ++ ++static unsigned long jh7110_clk_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ u32 div = jh7110_clk_reg_get(clk) & JH7110_CLK_DIV_MASK; ++ ++ if (clk->idx == JH7110_UART3_CLK_CORE ++ || clk->idx == JH7110_UART4_CLK_CORE ++ || clk->idx == JH7110_UART5_CLK_CORE) ++ div = div >> 8; ++ ++ return div ? parent_rate / div : 0; ++} ++ ++static int jh7110_clk_determine_rate(struct clk_hw *hw, ++ struct clk_rate_request *req) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ unsigned long parent = req->best_parent_rate; ++ unsigned long rate = clamp(req->rate, req->min_rate, req->max_rate); ++ unsigned long div = min_t(unsigned long, ++ DIV_ROUND_UP(parent, rate), clk->max_div); ++ unsigned long result = parent / div; ++ ++ /* ++ * we want the result clamped by min_rate and max_rate if possible: ++ * case 1: div hits the max divider value, which means it's less than ++ * parent / rate, so the result is greater than rate and min_rate in ++ * particular. we can't do anything about result > max_rate because the ++ * divider doesn't go any further. ++ * case 2: div = DIV_ROUND_UP(parent, rate) which means the result is ++ * always lower or equal to rate and max_rate. however the result may ++ * turn out lower than min_rate, but then the next higher rate is fine: ++ * div - 1 = ceil(parent / rate) - 1 < parent / rate ++ * and thus ++ * min_rate <= rate < parent / (div - 1) ++ */ ++ if (result < req->min_rate && div > 1) ++ result = parent / (div - 1); ++ ++ req->rate = result; ++ return 0; ++} ++ ++static int jh7110_clk_set_rate(struct clk_hw *hw, ++ unsigned long rate, ++ unsigned long parent_rate) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ unsigned long div = clamp(DIV_ROUND_CLOSEST(parent_rate, rate), ++ 1UL, (unsigned long)clk->max_div); ++ ++ /* UART3-5: [15:8]: integer part of the divisor. [7:0] fraction part of the divisor */ ++ if (clk->idx == JH7110_UART3_CLK_CORE || ++ clk->idx == JH7110_UART4_CLK_CORE || ++ clk->idx == JH7110_UART5_CLK_CORE) ++ div <<= 8; ++ ++ jh7110_clk_reg_rmw(clk, JH7110_CLK_DIV_MASK, div); ++ return 0; ++} ++ ++static u8 jh7110_clk_get_parent(struct clk_hw *hw) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ u32 value = jh7110_clk_reg_get(clk); ++ ++ return (value & JH7110_CLK_MUX_MASK) >> JH7110_CLK_MUX_SHIFT; ++} ++ ++static int jh7110_clk_set_parent(struct clk_hw *hw, u8 index) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ u32 value = (u32)index << JH7110_CLK_MUX_SHIFT; ++ ++ jh7110_clk_reg_rmw(clk, JH7110_CLK_MUX_MASK, value); ++ return 0; ++} ++ ++static int jh7110_clk_mux_determine_rate(struct clk_hw *hw, ++ struct clk_rate_request *req) ++{ ++ return clk_mux_determine_rate_flags(hw, req, 0); ++} ++ ++static int jh7110_clk_get_phase(struct clk_hw *hw) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ u32 value = jh7110_clk_reg_get(clk); ++ ++ return (value & JH7110_CLK_INVERT) ? 180 : 0; ++} ++ ++static int jh7110_clk_set_phase(struct clk_hw *hw, int degrees) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ u32 value; ++ ++ if (degrees == 0) ++ value = 0; ++ else if (degrees == 180) ++ value = JH7110_CLK_INVERT; ++ else ++ return -EINVAL; ++ ++ jh7110_clk_reg_rmw(clk, JH7110_CLK_INVERT, value); ++ return 0; ++} ++ ++#ifdef CONFIG_DEBUG_FS ++static void jh7110_clk_debug_init(struct clk_hw *hw, struct dentry *dentry) ++{ ++ static const struct debugfs_reg32 jh7110_clk_reg = { ++ .name = "CTRL", ++ .offset = 0, ++ }; ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ struct jh7110_clk_priv *priv = jh7110_priv_from(clk); ++ struct debugfs_regset32 *regset; ++ ++ regset = devm_kzalloc(priv->dev, sizeof(*regset), GFP_KERNEL); ++ if (!regset) ++ return; ++ ++ regset->regs = &jh7110_clk_reg; ++ regset->nregs = 1; ++ regset->base = jh7110_clk_reg_addr_get(clk); ++ ++ debugfs_create_regset32("registers", 0400, dentry, regset); ++} ++#else ++#define jh7110_clk_debug_init NULL ++#endif ++ ++#ifdef CONFIG_PM_SLEEP ++static int jh7110_clk_save_context(struct clk_hw *hw) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ void __iomem *reg = jh7110_clk_reg_addr_get(clk); ++ struct jh7110_clk_priv *priv = jh7110_priv_from(clk); ++ ++ if (!clk || !priv) ++ return 0; ++ ++ if ((clk->reg_flags == JH7110_CLK_ISP_FLAG) || (clk->reg_flags == JH7110_CLK_VOUT_FLAG)) ++ return 0; ++ ++ if (clk->idx >= JH7110_CLK_REG_END) ++ return 0; ++ ++ spin_lock(&priv->rmw_lock); ++ clk->saved_reg_value = readl_relaxed(reg); ++ spin_unlock(&priv->rmw_lock); ++ ++ return 0; ++} ++ ++static void jh7110_clk_gate_restore_context(struct clk_hw *hw) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ ++ if (!clk) ++ return; ++ ++ if ((clk->reg_flags == JH7110_CLK_ISP_FLAG) || (clk->reg_flags == JH7110_CLK_VOUT_FLAG)) ++ return; ++ ++ if (clk->idx >= JH7110_CLK_REG_END) ++ return; ++ ++ jh7110_clk_reg_rmw(clk, JH7110_CLK_ENABLE, clk->saved_reg_value); ++ ++ return; ++} ++ ++static void jh7110_clk_div_restore_context(struct clk_hw *hw) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ ++ if (!clk) ++ return; ++ ++ if ((clk->reg_flags == JH7110_CLK_ISP_FLAG) || (clk->reg_flags == JH7110_CLK_VOUT_FLAG)) ++ return; ++ ++ if (clk->idx >= JH7110_CLK_REG_END) ++ return; ++ ++ jh7110_clk_reg_rmw(clk, JH7110_CLK_DIV_MASK, clk->saved_reg_value); ++ ++ return; ++} ++ ++static void jh7110_clk_mux_restore_context(struct clk_hw *hw) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ ++ if (!clk) ++ return; ++ ++ if ((clk->reg_flags == JH7110_CLK_ISP_FLAG) || (clk->reg_flags == JH7110_CLK_VOUT_FLAG)) ++ return; ++ ++ if (clk->idx >= JH7110_CLK_REG_END) ++ return; ++ ++ jh7110_clk_reg_rmw(clk, JH7110_CLK_MUX_MASK, clk->saved_reg_value); ++ ++ return; ++} ++ ++static void jh7110_clk_inv_restore_context(struct clk_hw *hw) ++{ ++ struct jh7110_clk *clk = jh7110_clk_from(hw); ++ ++ if (!clk) ++ return; ++ ++ if ((clk->reg_flags == JH7110_CLK_ISP_FLAG) || (clk->reg_flags == JH7110_CLK_VOUT_FLAG)) ++ return; ++ ++ if (clk->idx >= JH7110_CLK_REG_END) ++ return; ++ ++ jh7110_clk_reg_rmw(clk, JH7110_CLK_INVERT, clk->saved_reg_value); ++ ++ return; ++} ++ ++static void jh7110_clk_gdiv_restore_context(struct clk_hw *hw) ++{ ++ jh7110_clk_div_restore_context(hw); ++ jh7110_clk_gate_restore_context(hw); ++ ++ return; ++} ++ ++static void jh7110_clk_gmux_restore_context(struct clk_hw *hw) ++{ ++ jh7110_clk_mux_restore_context(hw); ++ jh7110_clk_gate_restore_context(hw); ++ ++ return; ++} ++ ++static void jh7110_clk_mdiv_restore_context(struct clk_hw *hw) ++{ ++ jh7110_clk_mux_restore_context(hw); ++ jh7110_clk_div_restore_context(hw); ++ ++ return; ++} ++ ++static void jh7110_clk_gmd_restore_context(struct clk_hw *hw) ++{ ++ jh7110_clk_mux_restore_context(hw); ++ jh7110_clk_div_restore_context(hw); ++ jh7110_clk_gate_restore_context(hw); ++ ++ return; ++} ++ ++#endif ++ ++static const struct clk_ops jh7110_clk_gate_ops = { ++ .enable = jh7110_clk_enable, ++ .disable = jh7110_clk_disable, ++ .is_enabled = jh7110_clk_is_enabled, ++ .debug_init = jh7110_clk_debug_init, ++#ifdef CONFIG_PM_SLEEP ++ .save_context = jh7110_clk_save_context, ++ .restore_context = jh7110_clk_gate_restore_context, ++#endif ++}; ++ ++static const struct clk_ops jh7110_clk_div_ops = { ++ .recalc_rate = jh7110_clk_recalc_rate, ++ .determine_rate = jh7110_clk_determine_rate, ++ .set_rate = jh7110_clk_set_rate, ++ .debug_init = jh7110_clk_debug_init, ++#ifdef CONFIG_PM_SLEEP ++ .save_context = jh7110_clk_save_context, ++ .restore_context = jh7110_clk_div_restore_context, ++#endif ++}; ++ ++static const struct clk_ops jh7110_clk_gdiv_ops = { ++ .enable = jh7110_clk_enable, ++ .disable = jh7110_clk_disable, ++ .is_enabled = jh7110_clk_is_enabled, ++ .recalc_rate = jh7110_clk_recalc_rate, ++ .determine_rate = jh7110_clk_determine_rate, ++ .set_rate = jh7110_clk_set_rate, ++ .debug_init = jh7110_clk_debug_init, ++#ifdef CONFIG_PM_SLEEP ++ .save_context = jh7110_clk_save_context, ++ .restore_context = jh7110_clk_gdiv_restore_context, ++#endif ++}; ++ ++static const struct clk_ops jh7110_clk_mux_ops = { ++ .determine_rate = jh7110_clk_mux_determine_rate, ++ .set_parent = jh7110_clk_set_parent, ++ .get_parent = jh7110_clk_get_parent, ++ .debug_init = jh7110_clk_debug_init, ++#ifdef CONFIG_PM_SLEEP ++ .save_context = jh7110_clk_save_context, ++ .restore_context = jh7110_clk_mux_restore_context, ++#endif ++}; ++ ++static const struct clk_ops jh7110_clk_gmux_ops = { ++ .enable = jh7110_clk_enable, ++ .disable = jh7110_clk_disable, ++ .is_enabled = jh7110_clk_is_enabled, ++ .determine_rate = jh7110_clk_mux_determine_rate, ++ .set_parent = jh7110_clk_set_parent, ++ .get_parent = jh7110_clk_get_parent, ++ .debug_init = jh7110_clk_debug_init, ++#ifdef CONFIG_PM_SLEEP ++ .save_context = jh7110_clk_save_context, ++ .restore_context = jh7110_clk_gmux_restore_context, ++#endif ++}; ++ ++static const struct clk_ops jh7110_clk_mdiv_ops = { ++ .recalc_rate = jh7110_clk_recalc_rate, ++ .determine_rate = jh7110_clk_determine_rate, ++ .get_parent = jh7110_clk_get_parent, ++ .set_parent = jh7110_clk_set_parent, ++ .set_rate = jh7110_clk_set_rate, ++ .debug_init = jh7110_clk_debug_init, ++#ifdef CONFIG_PM_SLEEP ++ .save_context = jh7110_clk_save_context, ++ .restore_context = jh7110_clk_mdiv_restore_context, ++#endif ++}; ++ ++static const struct clk_ops jh7110_clk_gmd_ops = { ++ .enable = jh7110_clk_enable, ++ .disable = jh7110_clk_disable, ++ .is_enabled = jh7110_clk_is_enabled, ++ .recalc_rate = jh7110_clk_recalc_rate, ++ .determine_rate = jh7110_clk_determine_rate, ++ .get_parent = jh7110_clk_get_parent, ++ .set_parent = jh7110_clk_set_parent, ++ .set_rate = jh7110_clk_set_rate, ++ .debug_init = jh7110_clk_debug_init, ++#ifdef CONFIG_PM_SLEEP ++ .save_context = jh7110_clk_save_context, ++ .restore_context = jh7110_clk_gmd_restore_context, ++#endif ++}; ++ ++static const struct clk_ops jh7110_clk_inv_ops = { ++ .get_phase = jh7110_clk_get_phase, ++ .set_phase = jh7110_clk_set_phase, ++ .debug_init = jh7110_clk_debug_init, ++#ifdef CONFIG_PM_SLEEP ++ .save_context = jh7110_clk_save_context, ++ .restore_context = jh7110_clk_inv_restore_context, ++#endif ++}; ++ ++const struct clk_ops *starfive_jh7110_clk_ops(u32 max) ++{ ++ const struct clk_ops *ops; ++ ++ if (max & JH7110_CLK_DIV_MASK) { ++ if (max & JH7110_CLK_MUX_MASK) { ++ if (max & JH7110_CLK_ENABLE) ++ ops = &jh7110_clk_gmd_ops; ++ else ++ ops = &jh7110_clk_mdiv_ops; ++ } else if (max & JH7110_CLK_ENABLE) ++ ops = &jh7110_clk_gdiv_ops; ++ else ++ ops = &jh7110_clk_div_ops; ++ } else if (max & JH7110_CLK_MUX_MASK) { ++ if (max & JH7110_CLK_ENABLE) ++ ops = &jh7110_clk_gmux_ops; ++ else ++ ops = &jh7110_clk_mux_ops; ++ } else if (max & JH7110_CLK_ENABLE) ++ ops = &jh7110_clk_gate_ops; ++ else ++ ops = &jh7110_clk_inv_ops; ++ ++ return ops; ++} ++EXPORT_SYMBOL_GPL(starfive_jh7110_clk_ops); ++ ++#ifdef CONFIG_PM_SLEEP ++static int clk_starfive_jh7110_gen_system_suspend(struct device *dev) ++{ ++ return clk_save_context(); ++} ++ ++static int clk_starfive_jh7110_gen_system_resume(struct device *dev) ++{ ++ clk_restore_context(); ++ ++ return 0; ++} ++#endif ++ ++static const struct dev_pm_ops clk_starfive_jh7110_gen_pm_ops = { ++ SET_LATE_SYSTEM_SLEEP_PM_OPS(clk_starfive_jh7110_gen_system_suspend, ++ clk_starfive_jh7110_gen_system_resume) ++}; ++ ++static struct clk_hw *jh7110_clk_get(struct of_phandle_args *clkspec, ++ void *data) ++{ ++ struct jh7110_clk_priv *priv = data; ++ unsigned int idx = clkspec->args[0]; ++ ++ if (idx < JH7110_PLL0_OUT) ++ return &priv->reg[idx].hw; ++ ++ if (idx < JH7110_CLK_END) { ++#ifdef CONFIG_CLK_STARFIVE_JH7110_PLL ++ if ((idx == JH7110_PLL0_OUT) || (idx == JH7110_PLL2_OUT)) ++ return &priv->pll_priv[PLL_OF(idx)].hw; ++#endif ++ return priv->pll[PLL_OF(idx)]; ++ } ++ ++ return ERR_PTR(-EINVAL); ++} ++ ++ ++static int __init clk_starfive_jh7110_probe(struct platform_device *pdev) ++{ ++ struct jh7110_clk_priv *priv; ++ int ret = 0; ++ ++ priv = devm_kzalloc(&pdev->dev, struct_size(priv, reg, JH7110_PLL0_OUT), ++ GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ spin_lock_init(&priv->rmw_lock); ++ priv->dev = &pdev->dev; ++ ++ pm_runtime_enable(priv->dev); ++ ++#ifdef CONFIG_CLK_STARFIVE_JH7110_PLL ++ ret = clk_starfive_jh7110_pll_init(pdev, priv->pll_priv); ++ if (ret) ++ return ret; ++#endif ++ ++ ret = clk_starfive_jh7110_sys_init(pdev, priv); ++ if (ret) ++ return ret; ++ ++/* set PLL0 default rate */ ++#ifdef CONFIG_CLK_STARFIVE_JH7110_PLL ++ if (PLL0_DEFAULT_FREQ) { ++ struct clk *pll0_clk = priv->pll_priv[PLL0_INDEX].hw.clk; ++ struct clk *cpu_root = priv->reg[JH7110_CPU_ROOT].hw.clk; ++ struct clk *osc_clk = clk_get(&pdev->dev, "osc"); ++ ++ if (IS_ERR(osc_clk)) ++ dev_err(&pdev->dev, "get osc_clk failed\n"); ++ ++ if (PLL0_DEFAULT_FREQ >= PLL0_FREQ_1500_VALUE) { ++ struct clk *cpu_core = priv->reg[JH7110_CPU_CORE].hw.clk; ++ ++ if (clk_set_rate(cpu_core, clk_get_rate(pll0_clk) / 2)) { ++ dev_err(&pdev->dev, "set cpu_core rate failed\n"); ++ goto failed_set; ++ } ++ } ++ ++ if (clk_set_parent(cpu_root, osc_clk)) { ++ dev_err(&pdev->dev, "set parent to osc_clk failed\n"); ++ goto failed_set; ++ } ++ ++ if (clk_set_rate(pll0_clk, PLL0_DEFAULT_FREQ)) ++ dev_err(&pdev->dev, "set pll0 rate failed\n"); ++ ++ if (clk_set_parent(cpu_root, pll0_clk)) ++ dev_err(&pdev->dev, "set parent to pll0_clk failed\n"); ++ ++failed_set: ++ clk_put(osc_clk); ++ } ++#endif ++ ++ ret = clk_starfive_jh7110_stg_init(pdev, priv); ++ if (ret) ++ return ret; ++ ++ ret = clk_starfive_jh7110_aon_init(pdev, priv); ++ if (ret) ++ return ret; ++ ++ ret = devm_of_clk_add_hw_provider(priv->dev, jh7110_clk_get, priv); ++ if (ret) ++ return ret; ++ ++ dev_info(&pdev->dev, "starfive JH7110 clkgen init successfully."); ++ return 0; ++} ++ ++static const struct of_device_id clk_starfive_jh7110_match[] = { ++ {.compatible = "starfive,jh7110-clkgen"}, ++ { } ++}; ++ ++static struct platform_driver clk_starfive_jh7110_driver = { ++ .driver = { ++ .name = "clk-starfive-jh7110", ++ .of_match_table = clk_starfive_jh7110_match, ++ .pm = &clk_starfive_jh7110_gen_pm_ops, ++ }, ++}; ++builtin_platform_driver_probe(clk_starfive_jh7110_driver, ++ clk_starfive_jh7110_probe); ++ ++MODULE_AUTHOR("Xingyu Wu "); ++MODULE_DESCRIPTION("StarFive JH7110 sysgen clock driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/clk/starfive/clk-starfive-jh7110-isp.c b/drivers/clk/starfive/clk-starfive-jh7110-isp.c +new file mode 100644 +index 000000000000..e56be950986a +--- /dev/null ++++ b/drivers/clk/starfive/clk-starfive-jh7110-isp.c +@@ -0,0 +1,358 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * StarFive JH7110 Isp Clock Driver ++ * ++ * Copyright (C) 2022 Xingyu Wu ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "clk-starfive-jh7110.h" ++ ++/* external clocks */ ++#define JH7110_ISP_TOP_CLK_ISPCORE_2X_CLKGEN (JH7110_CLK_ISP_END + 0) ++#define JH7110_ISP_TOP_CLK_ISP_AXI_CLKGEN (JH7110_CLK_ISP_END + 1) ++#define JH7110_ISP_TOP_CLK_BIST_APB_CLKGEN (JH7110_CLK_ISP_END + 2) ++#define JH7110_ISP_TOP_CLK_DVP_CLKGEN (JH7110_CLK_ISP_END + 3) ++ ++struct isp_init_crg { ++ int num_clks; ++ struct clk_bulk_data *clks; ++ struct reset_control *rsts; ++}; ++ ++static const struct jh7110_clk_data jh7110_clk_isp_data[] __initconst = { ++ //syscon ++ JH7110__DIV(JH7110_DOM4_APB_FUNC, "dom4_apb_func", ++ 15, JH7110_ISP_TOP_CLK_ISP_AXI_CLKGEN), ++ //crg ++ JH7110__DIV(JH7110_MIPI_RX0_PXL, "mipi_rx0_pxl", ++ 8, JH7110_ISP_TOP_CLK_ISPCORE_2X_CLKGEN), ++ JH7110__INV(JH7110_DVP_INV, "dvp_inv", JH7110_ISP_TOP_CLK_DVP_CLKGEN), ++ //vin ++ JH7110__DIV(JH7110_U0_M31DPHY_CFGCLK_IN, "u0_m31dphy_cfgclk_in", ++ 16, JH7110_ISP_TOP_CLK_ISPCORE_2X_CLKGEN), ++ JH7110__DIV(JH7110_U0_M31DPHY_REFCLK_IN, "u0_m31dphy_refclk_in", ++ 16, JH7110_ISP_TOP_CLK_ISPCORE_2X_CLKGEN), ++ JH7110__DIV(JH7110_U0_M31DPHY_TXCLKESC_LAN0, "u0_m31dphy_txclkesc_lan0", ++ 60, JH7110_ISP_TOP_CLK_ISPCORE_2X_CLKGEN), ++ JH7110_GATE(JH7110_U0_VIN_PCLK, "u0_vin_pclk", ++ CLK_IGNORE_UNUSED, JH7110_DOM4_APB), ++ JH7110__DIV(JH7110_U0_VIN_SYS_CLK, "u0_vin_sys_clk", ++ 8, JH7110_ISP_TOP_CLK_ISPCORE_2X_CLKGEN), ++ JH7110_GATE(JH7110_U0_VIN_PIXEL_CLK_IF0, "u0_vin_pixel_clk_if0", ++ CLK_IGNORE_UNUSED, JH7110_MIPI_RX0_PXL), ++ JH7110_GATE(JH7110_U0_VIN_PIXEL_CLK_IF1, "u0_vin_pixel_clk_if1", ++ CLK_IGNORE_UNUSED, JH7110_MIPI_RX0_PXL), ++ JH7110_GATE(JH7110_U0_VIN_PIXEL_CLK_IF2, "u0_vin_pixel_clk_if2", ++ CLK_IGNORE_UNUSED, JH7110_MIPI_RX0_PXL), ++ JH7110_GATE(JH7110_U0_VIN_PIXEL_CLK_IF3, "u0_vin_pixel_clk_if3", ++ CLK_IGNORE_UNUSED, JH7110_MIPI_RX0_PXL), ++ JH7110__MUX(JH7110_U0_VIN_CLK_P_AXIWR, "u0_vin_clk_p_axiwr", ++ PARENT_NUMS_2, ++ JH7110_MIPI_RX0_PXL, ++ JH7110_DVP_INV), ++ //ispv2_top_wrapper ++ JH7110_GMUX(JH7110_U0_ISPV2_TOP_WRAPPER_CLK_C, ++ "u0_ispv2_top_wrapper_clk_c", ++ CLK_IGNORE_UNUSED, PARENT_NUMS_2, ++ JH7110_MIPI_RX0_PXL, ++ JH7110_DVP_INV), ++}; ++ ++static struct clk_bulk_data isp_top_clks[] = { ++ { .id = "u0_dom_isp_top_clk_dom_isp_top_clk_ispcore_2x" }, ++ { .id = "u0_dom_isp_top_clk_dom_isp_top_clk_isp_axi" }, ++}; ++ ++static int jh7110_isp_crg_get(struct device *dev, struct isp_init_crg *crg) ++{ ++ int ret; ++ ++ crg->rsts = devm_reset_control_array_get_shared(dev); ++ if (IS_ERR(crg->rsts)) { ++ dev_err(dev, "rst get failed\n"); ++ return PTR_ERR(crg->rsts); ++ } ++ ++ crg->clks = isp_top_clks; ++ crg->num_clks = ARRAY_SIZE(isp_top_clks); ++ ret = clk_bulk_get(dev, crg->num_clks, crg->clks); ++ if (ret) { ++ dev_err(dev, "clks get failed: %d\n", ret); ++ goto clks_get_failed; ++ } ++ ++ return 0; ++ ++clks_get_failed: ++ reset_control_assert(crg->rsts); ++ reset_control_put(crg->rsts); ++ ++ return ret; ++} ++ ++static int jh7110_isp_crg_enable(struct device *dev, struct isp_init_crg *crg, bool enable) ++{ ++ int ret; ++ ++ dev_dbg(dev, "starfive jh7110 isp clk&rst %sable\n", enable ? "en":"dis"); ++ if (enable) { ++ ret = reset_control_deassert(crg->rsts); ++ if (ret) { ++ dev_err(dev, "rst deassert failed: %d\n", ret); ++ goto crg_failed; ++ } ++ ++ ret = clk_bulk_prepare_enable(crg->num_clks, crg->clks); ++ if (ret) { ++ dev_err(dev, "clks enable failed: %d\n", ret); ++ goto crg_failed; ++ } ++ } else { ++ clk_bulk_disable_unprepare(crg->num_clks, crg->clks); ++ } ++ ++ return 0; ++crg_failed: ++ return ret; ++} ++ ++#ifdef CONFIG_PM_SLEEP ++static int clk_isp_system_suspend(struct device *dev) ++{ ++ return pm_runtime_force_suspend(dev); ++} ++ ++static int clk_isp_system_resume(struct device *dev) ++{ ++ return pm_runtime_force_resume(dev); ++} ++#endif ++ ++#ifdef CONFIG_PM ++static int clk_isp_runtime_suspend(struct device *dev) ++{ ++ struct isp_init_crg *crg = dev_get_drvdata(dev); ++ ++ return jh7110_isp_crg_enable(dev, crg, false); ++} ++ ++static int clk_isp_runtime_resume(struct device *dev) ++{ ++ struct isp_init_crg *crg = dev_get_drvdata(dev); ++ ++ return jh7110_isp_crg_enable(dev, crg, true); ++} ++#endif ++ ++static const struct dev_pm_ops clk_isp_pm_ops = { ++ SET_RUNTIME_PM_OPS(clk_isp_runtime_suspend, clk_isp_runtime_resume, NULL) ++ SET_LATE_SYSTEM_SLEEP_PM_OPS(clk_isp_system_suspend, clk_isp_system_resume) ++}; ++ ++static struct clk_hw *jh7110_isp_clk_get(struct of_phandle_args *clkspec, ++ void *data) ++{ ++ struct jh7110_clk_priv *priv = data; ++ unsigned int idx = clkspec->args[0]; ++ ++ if (idx < JH7110_CLK_ISP_REG_END) ++ return &priv->reg[idx].hw; ++ ++ if (idx < JH7110_CLK_ISP_END) ++ return priv->pll[PLL_OFI(idx)]; ++ ++ return ERR_PTR(-EINVAL); ++} ++ ++static int __init clk_starfive_jh7110_isp_probe(struct platform_device *pdev) ++{ ++ struct jh7110_clk_priv *priv; ++ struct isp_init_crg *crg; ++ unsigned int idx; ++ int ret = 0; ++ ++ priv = devm_kzalloc(&pdev->dev, struct_size(priv, reg, ++ JH7110_CLK_ISP_END), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ spin_lock_init(&priv->rmw_lock); ++ priv->dev = &pdev->dev; ++ priv->isp_base = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(priv->isp_base)) ++ return PTR_ERR(priv->isp_base); ++ ++ crg = devm_kzalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL); ++ if (!crg) ++ return -ENOMEM; ++ dev_set_drvdata(&pdev->dev, crg); ++ ++ ret = jh7110_isp_crg_get(&pdev->dev, crg); ++ if (ret) ++ goto init_failed; ++ ++ pm_runtime_use_autosuspend(&pdev->dev); ++ pm_runtime_set_autosuspend_delay(&pdev->dev, 50); ++ pm_runtime_enable(&pdev->dev); ++ ret = pm_runtime_get_sync(&pdev->dev); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "failed to get pm runtime: %d\n", ret); ++ goto init_failed; ++ } ++ ++ priv->pll[PLL_OFI(JH7110_U3_PCLK_MUX_FUNC_PCLK)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "u3_pclk_mux_func_pclk", ++ "dom4_apb_func", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U3_PCLK_MUX_BIST_PCLK)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "u3_pclk_mux_bist_pclk", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_bist_apb", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_DOM4_APB)] = ++ clk_hw_register_fixed_factor(priv->dev, "dom4_apb", ++ "u3_pclk_mux_pclk", 0, 1, 1); ++ /*vin*/ ++ priv->pll[PLL_OFI(JH7110_U0_VIN_PCLK_FREE)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "u0_vin_pclk_free", ++ "dom4_apb", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U0_VIN_CLK_P_AXIRD)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "u0_vin_clk_p_axird", ++ "mipi_rx0_pxl", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U0_VIN_ACLK)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "u0_vin_ACLK", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_isp_axi", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U0_ISPV2_TOP_WRAPPER_CLK_ISP_AXI_IN)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_ispv2_top_wrapper_clk_isp_axi_in", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_isp_axi", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U0_ISPV2_TOP_WRAPPER_CLK_ISP_X2)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_ispv2_top_wrapper_clk_isp_x2", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_ispcore_2x", ++ 0, 1, 1); ++ /*wrapper*/ ++ priv->pll[PLL_OFI(JH7110_U0_ISPV2_TOP_WRAPPER_CLK_ISP)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_ispv2_top_wrapper_clk_isp", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_isp_axi", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U0_ISPV2_TOP_WRAPPER_CLK_P)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_ispv2_top_wrapper_clk_p", ++ "mipi_rx0_pxl", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U0_CRG_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_crg_pclk", "dom4_apb", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U0_SYSCON_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_syscon_pclk", "dom4_apb", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U0_M31DPHY_APBCFG_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_m31dphy_apbcfg_pclk", "dom4_apb", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U0_AXI2APB_BRIDGE_CLK_DOM4_APB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_axi2apb_bridge_clk_dom4_apb", "dom4_apb", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U0_AXI2APB_BRIDGE_ISP_AXI4SLV_CLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_axi2apb_bridge_isp_axi4slv_clk", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_isp_axi", 0, 1, 1); ++ priv->pll[PLL_OFI(JH7110_U3_PCLK_MUX_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u3_pclk_mux_pclk", "u3_pclk_mux_func_pclk", 0, 1, 1); ++ ++ for (idx = 0; idx < JH7110_CLK_ISP_REG_END; idx++) { ++ u32 max = jh7110_clk_isp_data[idx].max; ++ struct clk_parent_data parents[2] = {}; ++ struct clk_init_data init = { ++ .name = jh7110_clk_isp_data[idx].name, ++ .ops = starfive_jh7110_clk_ops(max), ++ .parent_data = parents, ++ .num_parents = ((max & JH7110_CLK_MUX_MASK) >> ++ JH7110_CLK_MUX_SHIFT) + 1, ++ .flags = jh7110_clk_isp_data[idx].flags, ++ }; ++ struct jh7110_clk *clk = &priv->reg[idx]; ++ unsigned int i; ++ char *fw_name[4] = { ++ "u0_dom_isp_top_clk_dom_isp_top_clk_ispcore_2x", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_isp_axi", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_bist_apb", ++ "u0_dom_isp_top_clk_dom_isp_top_clk_dvp" ++ }; ++ ++ for (i = 0; i < init.num_parents; i++) { ++ unsigned int pidx = jh7110_clk_isp_data[idx].parents[i]; ++ ++ if (pidx < JH7110_CLK_ISP_REG_END) ++ parents[i].hw = &priv->reg[pidx].hw; ++ else if (pidx < JH7110_CLK_ISP_END) ++ parents[i].hw = priv->pll[PLL_OFI(pidx)]; ++ else if (pidx == JH7110_ISP_TOP_CLK_ISPCORE_2X_CLKGEN) ++ parents[i].fw_name = fw_name[0]; ++ else if (pidx == JH7110_ISP_TOP_CLK_ISP_AXI_CLKGEN) ++ parents[i].fw_name = fw_name[1]; ++ else if (pidx == JH7110_ISP_TOP_CLK_BIST_APB_CLKGEN) ++ parents[i].fw_name = fw_name[2]; ++ else if (pidx == JH7110_ISP_TOP_CLK_DVP_CLKGEN) ++ parents[i].fw_name = fw_name[3]; ++ } ++ ++ clk->hw.init = &init; ++ clk->idx = idx; ++ clk->max_div = max & JH7110_CLK_DIV_MASK; ++ clk->reg_flags = JH7110_CLK_ISP_FLAG; ++ ++ ret = devm_clk_hw_register(priv->dev, &clk->hw); ++ if (ret) ++ goto init_failed; ++ } ++ ++ ret = devm_of_clk_add_hw_provider(priv->dev, jh7110_isp_clk_get, priv); ++ if (ret) ++ goto init_failed; ++ ++ pm_runtime_put_sync(&pdev->dev); ++ ++ dev_info(&pdev->dev, "starfive JH7110 clk_isp init successfully."); ++ return 0; ++ ++init_failed: ++ return ret; ++} ++ ++static const struct of_device_id clk_starfive_jh7110_isp_match[] = { ++ {.compatible = "starfive,jh7110-clk-isp" }, ++ { } ++}; ++ ++static struct platform_driver clk_starfive_jh7110_isp_driver = { ++ .probe = clk_starfive_jh7110_isp_probe, ++ .driver = { ++ .name = "clk-starfive-jh7110-isp", ++ .of_match_table = clk_starfive_jh7110_isp_match, ++ .pm = &clk_isp_pm_ops, ++ }, ++}; ++module_platform_driver(clk_starfive_jh7110_isp_driver); ++ ++MODULE_AUTHOR("Xingyu Wu "); ++MODULE_DESCRIPTION("StarFive JH7110 isp clock driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/clk/starfive/clk-starfive-jh7110-pll.c b/drivers/clk/starfive/clk-starfive-jh7110-pll.c +new file mode 100644 +index 000000000000..e58dc4c4d32a +--- /dev/null ++++ b/drivers/clk/starfive/clk-starfive-jh7110-pll.c +@@ -0,0 +1,455 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * StarFive JH7110 PLL Clock Generator Driver ++ * ++ * Copyright (C) 2022 Xingyu Wu ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "clk-starfive-jh7110-pll.h" ++ ++static struct jh7110_clk_pll_data * __init ++ jh7110_pll_data_from(struct clk_hw *hw) ++{ ++ return container_of(hw, struct jh7110_clk_pll_data, hw); ++} ++ ++static unsigned long pll_calculate_freq(struct jh7110_clk_pll_data *data) ++{ ++ u32 dacpd; ++ u32 dsmpd; ++ u32 fbdiv; ++ u32 prediv; ++ u32 postdiv1; ++ u32 frac; ++ unsigned long refclk; ++ u32 reg_value; ++ unsigned long frac_cal; ++ unsigned long freq; ++ struct pll_syscon_offset *offset = &data->offset; ++ struct pll_syscon_mask *mask = &data->mask; ++ struct pll_syscon_shift *shift = &data->shift; ++ ++ if (regmap_read(data->sys_syscon_regmap, ++ offset->dacpd_offset, ®_value)) ++ goto read_register_error; ++ dacpd = (reg_value & mask->dacpd_mask) >> shift->dacpd_shift; ++ dev_dbg(data->dev, "pll%d read register dacpd:%d\n", data->idx, dacpd); ++ ++ if (regmap_read(data->sys_syscon_regmap, ++ offset->dsmpd_offset, ®_value)) ++ goto read_register_error; ++ dsmpd = (reg_value & mask->dsmpd_mask) >> shift->dsmpd_shift; ++ dev_dbg(data->dev, "pll%d read register dsmpd:%d\n", data->idx, dsmpd); ++ ++ if (regmap_read(data->sys_syscon_regmap, ++ offset->fbdiv_offset, ®_value)) ++ goto read_register_error; ++ fbdiv = (reg_value & mask->fbdiv_mask) >> shift->fbdiv_shift; ++ /* fbdiv value should be 8 to 4095 */ ++ if (fbdiv < 8) ++ goto read_register_error; ++ dev_dbg(data->dev, "pll%d read register fbdiv:%d\n", data->idx, fbdiv); ++ ++ if (regmap_read(data->sys_syscon_regmap, ++ offset->prediv_offset, ®_value)) ++ goto read_register_error; ++ prediv = (reg_value & mask->prediv_mask) >> shift->prediv_shift; ++ dev_dbg(data->dev, "pll%d read register prediv:%d\n", data->idx, prediv); ++ ++ if (regmap_read(data->sys_syscon_regmap, ++ offset->postdiv1_offset, ®_value)) ++ goto read_register_error; ++ /* postdiv1 = 2^reg */ ++ postdiv1 = 1 << ((reg_value & mask->postdiv1_mask) >> ++ shift->postdiv1_shift); ++ dev_dbg(data->dev, "pll%d read register postdiv1:%d\n", ++ data->idx, postdiv1); ++ ++ if (regmap_read(data->sys_syscon_regmap, ++ offset->frac_offset, ®_value)) ++ goto read_register_error; ++ frac = (reg_value & mask->frac_mask) >> shift->frac_shift; ++ dev_dbg(data->dev, "pll%d read register frac:0x%x\n", data->idx, frac); ++ ++ refclk = data->refclk_freq; ++ /* Integer Mode or Fraction Mode */ ++ if ((dacpd == 1) && (dsmpd == 1)) ++ frac_cal = 0; ++ else ++ frac_cal = (unsigned long) frac * FRAC_PATR_SIZE / (1 << 24); ++ ++ freq = (unsigned long) refclk / FRAC_PATR_SIZE * ++ (fbdiv * FRAC_PATR_SIZE + frac_cal) / prediv / postdiv1; ++ ++ dev_dbg(data->dev, "pll%d calculate freq:%ld\n", data->idx, freq); ++ return freq; ++ ++read_register_error: ++ return 0; ++} ++ ++static unsigned long pll_get_freq(struct jh7110_clk_pll_data *data) ++{ ++ unsigned long freq; ++ ++ freq = pll_calculate_freq(data); ++ if (freq == 0) { ++ dev_err(data->dev, "PLL calculate error or read syscon error.\n"); ++ return 0; ++ } ++ ++ return freq; ++} ++ ++static int pll_select_freq_syscon(struct jh7110_clk_pll_data *data, ++ unsigned long target_rate) ++{ ++ unsigned int id; ++ unsigned int pll_arry_size; ++ const struct starfive_pll_syscon_value *syscon_value; ++ ++ if (data->idx == PLL0_INDEX) ++ pll_arry_size = ARRAY_SIZE(jh7110_pll0_syscon_freq); ++ else if (data->idx == PLL1_INDEX) ++ pll_arry_size = ARRAY_SIZE(jh7110_pll1_syscon_freq); ++ else ++ pll_arry_size = ARRAY_SIZE(jh7110_pll2_syscon_freq); ++ ++ for (id = 0; id < pll_arry_size; id++) { ++ if (data->idx == PLL0_INDEX) ++ syscon_value = &jh7110_pll0_syscon_freq[id]; ++ else if (data->idx == PLL1_INDEX) ++ syscon_value = &jh7110_pll1_syscon_freq[id]; ++ else ++ syscon_value = &jh7110_pll2_syscon_freq[id]; ++ ++ if (target_rate == syscon_value->freq) ++ goto select_end; ++ } ++ ++ dev_err(data->dev, "pll%d frequency:%ld do not match, please check it.\n", ++ data->idx, target_rate); ++ return -EINVAL; ++ ++select_end: ++ data->freq_select_idx = id; ++ return 0; ++} ++ ++static int pll_set_freq_syscon(struct jh7110_clk_pll_data *data) ++{ ++ int ret; ++ const struct starfive_pll_syscon_value *syscon_value; ++ unsigned int freq_idx = data->freq_select_idx; ++ struct pll_syscon_offset *offset = &data->offset; ++ struct pll_syscon_mask *mask = &data->mask; ++ struct pll_syscon_shift *shift = &data->shift; ++ ++ if (data->idx == PLL0_INDEX) ++ syscon_value = &jh7110_pll0_syscon_freq[freq_idx]; ++ else if (data->idx == PLL1_INDEX) ++ syscon_value = &jh7110_pll1_syscon_freq[freq_idx]; ++ else ++ syscon_value = &jh7110_pll2_syscon_freq[freq_idx]; ++ ++ dev_dbg(data->dev, "dacpd:offset=0x%x, mask=0x%x, shift=%d, value=%d\n", ++ offset->dacpd_offset, mask->dacpd_mask, ++ shift->dacpd_shift, syscon_value->dacpd); ++ ret = regmap_update_bits(data->sys_syscon_regmap, offset->dacpd_offset, ++ mask->dacpd_mask, (syscon_value->dacpd << shift->dacpd_shift)); ++ if (ret) ++ goto set_failed; ++ dev_dbg(data->dev, "dsmpd:offset=%x, mask=%x, shift=%d, value=%d\n", ++ offset->dsmpd_offset, mask->dsmpd_mask, ++ shift->dsmpd_shift, syscon_value->dsmpd); ++ ret = regmap_update_bits(data->sys_syscon_regmap, offset->dsmpd_offset, ++ mask->dsmpd_mask, (syscon_value->dsmpd << shift->dsmpd_shift)); ++ if (ret) ++ goto set_failed; ++ ++ dev_dbg(data->dev, "prediv:offset=%x, mask=%x, shift=%d, value=%d\n", ++ offset->prediv_offset, mask->prediv_mask, ++ shift->prediv_shift, syscon_value->prediv); ++ ret = regmap_update_bits(data->sys_syscon_regmap, offset->prediv_offset, ++ mask->prediv_mask, (syscon_value->prediv << shift->prediv_shift)); ++ if (ret) ++ goto set_failed; ++ ++ dev_dbg(data->dev, "fbdiv:offset=%x, mask=%x, shift=%d, value=%d\n", ++ offset->fbdiv_offset, mask->fbdiv_mask, ++ shift->fbdiv_shift, syscon_value->fbdiv); ++ ret = regmap_update_bits(data->sys_syscon_regmap, offset->fbdiv_offset, ++ mask->fbdiv_mask, (syscon_value->fbdiv << shift->fbdiv_shift)); ++ if (ret) ++ goto set_failed; ++ ++ dev_dbg(data->dev, "postdiv:offset=0x%x, mask=0x%x, shift=%d, value=%d\n", ++ offset->postdiv1_offset, mask->postdiv1_mask, ++ shift->postdiv1_shift, syscon_value->postdiv1); ++ ret = regmap_update_bits(data->sys_syscon_regmap, ++ offset->postdiv1_offset, mask->postdiv1_mask, ++ ((syscon_value->postdiv1 >> 1) << shift->postdiv1_shift)); ++ if (ret) ++ goto set_failed; ++ /* frac */ ++ if ((syscon_value->dacpd == 0) && (syscon_value->dsmpd == 0)) { ++ dev_dbg(data->dev, "frac:offset=0x%x mask=0x%x shift=%d value=0x%x\n", ++ offset->frac_offset, mask->frac_mask, ++ shift->frac_shift, syscon_value->frac); ++ ret = regmap_update_bits(data->sys_syscon_regmap, offset->frac_offset, ++ mask->frac_mask, (syscon_value->frac << shift->frac_shift)); ++ if (ret) ++ goto set_failed; ++ } ++ ++ dev_dbg(data->dev, "pll%d set syscon register done and rate is %ld\n", ++ data->idx, syscon_value->freq); ++ return 0; ++ ++set_failed: ++ dev_err(data->dev, "pll set syscon failed:%d\n", ret); ++ return ret; ++} ++ ++static unsigned long jh7110_clk_pll_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ struct jh7110_clk_pll_data *data = jh7110_pll_data_from(hw); ++ ++ return pll_get_freq(data); ++} ++ ++static int jh7110_clk_pll_determine_rate(struct clk_hw *hw, ++ struct clk_rate_request *req) ++{ ++ int ret; ++ struct jh7110_clk_pll_data *data = jh7110_pll_data_from(hw); ++ ++ ret = pll_select_freq_syscon(data, req->rate); ++ if (ret) ++ return ret; ++ ++ if (data->idx == PLL0_INDEX) ++ req->rate = jh7110_pll0_syscon_freq[data->freq_select_idx].freq; ++ else if (data->idx == PLL1_INDEX) ++ req->rate = jh7110_pll1_syscon_freq[data->freq_select_idx].freq; ++ else ++ req->rate = jh7110_pll2_syscon_freq[data->freq_select_idx].freq; ++ ++ return 0; ++} ++ ++static int jh7110_clk_pll_set_rate(struct clk_hw *hw, ++ unsigned long rate, ++ unsigned long parent_rate) ++{ ++ struct jh7110_clk_pll_data *data = jh7110_pll_data_from(hw); ++ ++ return pll_set_freq_syscon(data); ++ ++} ++ ++#ifdef CONFIG_DEBUG_FS ++static void jh7110_clk_pll_debug_init(struct clk_hw *hw, ++ struct dentry *dentry) ++{ ++ static const struct debugfs_reg32 jh7110_clk_pll_reg = { ++ .name = "CTRL", ++ .offset = 0, ++ }; ++ struct jh7110_clk_pll_data *data = jh7110_pll_data_from(hw); ++ struct debugfs_regset32 *regset; ++ ++ regset = devm_kzalloc(data->dev, sizeof(*regset), GFP_KERNEL); ++ if (!regset) ++ return; ++ ++ regset->regs = &jh7110_clk_pll_reg; ++ regset->nregs = 1; ++ ++ debugfs_create_regset32("registers", 0400, dentry, regset); ++} ++#else ++#define jh7110_clk_debug_init NULL ++#endif ++ ++static const struct clk_ops jh7110_clk_pll_ops = { ++ .recalc_rate = jh7110_clk_pll_recalc_rate, ++ .determine_rate = jh7110_clk_pll_determine_rate, ++ .set_rate = jh7110_clk_pll_set_rate, ++ .debug_init = jh7110_clk_pll_debug_init, ++}; ++ ++static int pll_data_offset_get(struct jh7110_clk_pll_data *data, ++ struct of_phandle_args *args, int index) ++{ ++ struct pll_syscon_offset *offset = &data->offset; ++ struct pll_syscon_mask *mask = &data->mask; ++ struct pll_syscon_shift *shift = &data->shift; ++ ++ if (index == PLL0_INDEX) { ++ offset->dacpd_offset = args->args[0]; ++ offset->dsmpd_offset = args->args[0]; ++ offset->fbdiv_offset = args->args[1]; ++ offset->frac_offset = args->args[2]; ++ offset->prediv_offset = args->args[3]; ++ offset->postdiv1_offset = args->args[2]; ++ ++ mask->dacpd_mask = PLL0_DACPD_MASK; ++ mask->dsmpd_mask = PLL0_DSMPD_MASK; ++ mask->fbdiv_mask = PLL0_FBDIV_MASK; ++ mask->frac_mask = PLL0_FRAC_MASK; ++ mask->prediv_mask = PLL0_PREDIV_MASK; ++ mask->postdiv1_mask = PLL0_POSTDIV1_MASK; ++ ++ shift->dacpd_shift = PLL0_DACPD_SHIFT; ++ shift->dsmpd_shift = PLL0_DSMPD_SHIFT; ++ shift->fbdiv_shift = PLL0_FBDIV_SHIFT; ++ shift->frac_shift = PLL0_FRAC_SHIFT; ++ shift->prediv_shift = PLL0_PREDIV_SHIFT; ++ shift->postdiv1_shift = PLL0_POSTDIV1_SHIFT; ++ } else if (index == PLL1_INDEX) { ++ offset->dacpd_offset = args->args[3]; ++ offset->dsmpd_offset = args->args[3]; ++ offset->fbdiv_offset = args->args[3]; ++ offset->frac_offset = args->args[4]; ++ offset->prediv_offset = args->args[5]; ++ offset->postdiv1_offset = args->args[4]; ++ ++ mask->dacpd_mask = PLL1_DACPD_MASK; ++ mask->dsmpd_mask = PLL1_DSMPD_MASK; ++ mask->fbdiv_mask = PLL1_FBDIV_MASK; ++ mask->frac_mask = PLL1_FRAC_MASK; ++ mask->prediv_mask = PLL1_PREDIV_MASK; ++ mask->postdiv1_mask = PLL1_POSTDIV1_MASK; ++ ++ shift->dacpd_shift = PLL1_DACPD_SHIFT; ++ shift->dsmpd_shift = PLL1_DSMPD_SHIFT; ++ shift->fbdiv_shift = PLL1_FBDIV_SHIFT; ++ shift->frac_shift = PLL1_FRAC_SHIFT; ++ shift->prediv_shift = PLL1_PREDIV_SHIFT; ++ shift->postdiv1_shift = PLL1_POSTDIV1_SHIFT; ++ } else if (index == PLL2_INDEX) { ++ offset->dacpd_offset = args->args[5]; ++ offset->dsmpd_offset = args->args[5]; ++ offset->fbdiv_offset = args->args[5]; ++ offset->frac_offset = args->args[6]; ++ offset->prediv_offset = args->args[7]; ++ offset->postdiv1_offset = args->args[6]; ++ ++ mask->dacpd_mask = PLL2_DACPD_MASK; ++ mask->dsmpd_mask = PLL2_DSMPD_MASK; ++ mask->fbdiv_mask = PLL2_FBDIV_MASK; ++ mask->frac_mask = PLL2_FRAC_MASK; ++ mask->prediv_mask = PLL2_PREDIV_MASK; ++ mask->postdiv1_mask = PLL2_POSTDIV1_MASK; ++ ++ shift->dacpd_shift = PLL2_DACPD_SHIFT; ++ shift->dsmpd_shift = PLL2_DSMPD_SHIFT; ++ shift->fbdiv_shift = PLL2_FBDIV_SHIFT; ++ shift->frac_shift = PLL2_FRAC_SHIFT; ++ shift->prediv_shift = PLL2_PREDIV_SHIFT; ++ shift->postdiv1_shift = PLL2_POSTDIV1_SHIFT; ++ } else ++ return -ENOENT; ++ ++ return 0; ++} ++ ++int __init clk_starfive_jh7110_pll_init(struct platform_device *pdev, ++ struct jh7110_clk_pll_data *pll_priv) ++{ ++ int ret; ++ struct of_phandle_args args; ++ struct regmap *pll_syscon_regmap; ++ unsigned int idx; ++ struct clk *osc_clk; ++ unsigned long refclk_freq; ++ struct jh7110_clk_pll_data *data; ++ char *pll_name[3] = { ++ "pll0_out", ++ "pll1_out", ++ "pll2_out" ++ }; ++ ++ ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, ++ "starfive,sys-syscon", 8, 0, &args); ++ if (ret) { ++ dev_warn(&pdev->dev, "Failed to parse starfive,sys-syscon\n"); ++ goto pll_init_failed; ++ } ++ ++ pll_syscon_regmap = syscon_node_to_regmap(args.np); ++ of_node_put(args.np); ++ if (IS_ERR(pll_syscon_regmap)) { ++ ret = PTR_ERR(pll_syscon_regmap); ++ goto pll_init_failed; ++ } ++ ++ osc_clk = clk_get(&pdev->dev, "osc"); ++ if (!IS_ERR(osc_clk)) { ++ refclk_freq = clk_get_rate(osc_clk); ++ clk_put(osc_clk); ++ } else { ++ ret = PTR_ERR(osc_clk); ++ dev_err(&pdev->dev, "get osc clk failed :%d.\n", ret); ++ goto pll_init_failed; ++ } ++ ++ for (idx = 0; idx < PLL_INDEX_MAX; idx++) { ++ struct clk_parent_data parents = { ++ .fw_name = "osc", ++ }; ++ struct clk_init_data init = { ++ .name = pll_name[idx], ++ .ops = &jh7110_clk_pll_ops, ++ .parent_data = &parents, ++ .num_parents = 1, ++ .flags = 0, ++ }; ++ ++ data = &pll_priv[idx]; ++ data->dev = &pdev->dev; ++ data->sys_syscon_regmap = pll_syscon_regmap; ++ ++ ret = pll_data_offset_get(data, &args, idx); ++ if (ret) ++ goto pll_init_failed; ++ ++ data->hw.init = &init; ++ data->idx = idx; ++ data->refclk_freq = refclk_freq; ++ ++ ret = devm_clk_hw_register(&pdev->dev, &data->hw); ++ if (ret) ++ return ret; ++ } ++ ++ dev_dbg(&pdev->dev, "PLL0, PLL1 and PLL2 clock registered done\n"); ++ ++/* Change PLL2 rate before other driver up */ ++ if (PLL2_DEFAULT_FREQ) { ++ struct clk *pll2_clk = pll_priv[PLL2_INDEX].hw.clk; ++ ++ if (clk_set_rate(pll2_clk, PLL2_DEFAULT_FREQ)) ++ dev_info(&pdev->dev, "set pll2 failed\n"); ++ } ++ ++ return 0; ++ ++pll_init_failed: ++ return ret; ++} ++ ++ ++ +diff --git a/drivers/clk/starfive/clk-starfive-jh7110-pll.h b/drivers/clk/starfive/clk-starfive-jh7110-pll.h +new file mode 100644 +index 000000000000..87843181ecf8 +--- /dev/null ++++ b/drivers/clk/starfive/clk-starfive-jh7110-pll.h +@@ -0,0 +1,273 @@ ++/* SPDX-License-Identifier: GPL-2.0 OR MIT */ ++/* ++ * StarFive JH7110 PLL Clock Generator Driver ++ * ++ * Copyright (C) 2022 Xingyu Wu ++ */ ++ ++#ifndef _CLK_STARFIVE_JH7110_PLL_H_ ++#define _CLK_STARFIVE_JH7110_PLL_H_ ++ ++/* ++ * If set PLL2_DEFAULT_FREQ NULL of 0 , then PLL2 frequency is original. ++ * If set PLL2_DEFAULT_FREQ one of 'starfive_pll2_freq_value', then PLL2 ++ * frequency will be set the new rate during clock tree registering. ++ */ ++#define PLL0_DEFAULT_FREQ PLL0_FREQ_1500_VALUE ++#define PLL2_DEFAULT_FREQ PLL2_FREQ_1188_VALUE ++ ++#define PLL0_INDEX 0 ++#define PLL1_INDEX 1 ++#define PLL2_INDEX 2 ++ ++#define PLL_INDEX_MAX 3 ++ ++#define PLL0_DACPD_SHIFT 24 ++#define PLL0_DACPD_MASK 0x1000000 ++#define PLL0_DSMPD_SHIFT 25 ++#define PLL0_DSMPD_MASK 0x2000000 ++#define PLL0_FBDIV_SHIFT 0 ++#define PLL0_FBDIV_MASK 0xFFF ++#define PLL0_FRAC_SHIFT 0 ++#define PLL0_FRAC_MASK 0xFFFFFF ++#define PLL0_POSTDIV1_SHIFT 28 ++#define PLL0_POSTDIV1_MASK 0x30000000 ++#define PLL0_PREDIV_SHIFT 0 ++#define PLL0_PREDIV_MASK 0x3F ++ ++#define PLL1_DACPD_SHIFT 15 ++#define PLL1_DACPD_MASK 0x8000 ++#define PLL1_DSMPD_SHIFT 16 ++#define PLL1_DSMPD_MASK 0x10000 ++#define PLL1_FBDIV_SHIFT 17 ++#define PLL1_FBDIV_MASK 0x1FFE0000 ++#define PLL1_FRAC_SHIFT 0 ++#define PLL1_FRAC_MASK 0xFFFFFF ++#define PLL1_POSTDIV1_SHIFT 28 ++#define PLL1_POSTDIV1_MASK 0x30000000 ++#define PLL1_PREDIV_SHIFT 0 ++#define PLL1_PREDIV_MASK 0x3F ++ ++#define PLL2_DACPD_SHIFT 15 ++#define PLL2_DACPD_MASK 0x8000 ++#define PLL2_DSMPD_SHIFT 16 ++#define PLL2_DSMPD_MASK 0x10000 ++#define PLL2_FBDIV_SHIFT 17 ++#define PLL2_FBDIV_MASK 0x1FFE0000 ++#define PLL2_FRAC_SHIFT 0 ++#define PLL2_FRAC_MASK 0xFFFFFF ++#define PLL2_POSTDIV1_SHIFT 28 ++#define PLL2_POSTDIV1_MASK 0x30000000 ++#define PLL2_PREDIV_SHIFT 0 ++#define PLL2_PREDIV_MASK 0x3F ++ ++#define FRAC_PATR_SIZE 1000 ++ ++struct pll_syscon_offset { ++ u32 dacpd_offset; ++ u32 dsmpd_offset; ++ u32 fbdiv_offset; ++ u32 frac_offset; ++ u32 prediv_offset; ++ u32 postdiv1_offset; ++}; ++ ++struct pll_syscon_mask { ++ u32 dacpd_mask; ++ u32 dsmpd_mask; ++ u32 fbdiv_mask; ++ u32 frac_mask; ++ u32 prediv_mask; ++ u32 postdiv1_mask; ++}; ++ ++struct pll_syscon_shift { ++ u32 dacpd_shift; ++ u32 dsmpd_shift; ++ u32 fbdiv_shift; ++ u32 frac_shift; ++ u32 prediv_shift; ++ u32 postdiv1_shift; ++}; ++ ++struct jh7110_clk_pll_data { ++ struct device *dev; ++ struct clk_hw hw; ++ unsigned long refclk_freq; ++ unsigned int idx; ++ unsigned int freq_select_idx; ++ ++ struct regmap *sys_syscon_regmap; ++ struct pll_syscon_offset offset; ++ struct pll_syscon_mask mask; ++ struct pll_syscon_shift shift; ++}; ++ ++struct starfive_pll_syscon_value { ++ unsigned long freq; ++ u32 prediv; ++ u32 fbdiv; ++ u32 postdiv1; ++/* Both daxpd and dsmpd set 1 while integer multiple mode */ ++/* Both daxpd and dsmpd set 0 while fraction multiple mode */ ++ u32 dacpd; ++ u32 dsmpd; ++/* frac value should be decimals multiplied by 2^24 */ ++ u32 frac; ++}; ++ ++enum starfive_pll0_freq_value { ++ PLL0_FREQ_375_VALUE = 375000000, ++ PLL0_FREQ_500_VALUE = 500000000, ++ PLL0_FREQ_625_VALUE = 625000000, ++ PLL0_FREQ_750_VALUE = 750000000, ++ PLL0_FREQ_875_VALUE = 875000000, ++ PLL0_FREQ_1000_VALUE = 1000000000, ++ PLL0_FREQ_1250_VALUE = 1250000000, ++ PLL0_FREQ_1375_VALUE = 1375000000, ++ PLL0_FREQ_1500_VALUE = 1500000000 ++}; ++ ++enum starfive_pll0_freq { ++ PLL0_FREQ_375 = 0, ++ PLL0_FREQ_500, ++ PLL0_FREQ_625, ++ PLL0_FREQ_750, ++ PLL0_FREQ_875, ++ PLL0_FREQ_1000, ++ PLL0_FREQ_1250, ++ PLL0_FREQ_1375, ++ PLL0_FREQ_1500, ++ PLL0_FREQ_MAX = PLL0_FREQ_1500 ++}; ++ ++enum starfive_pll1_freq_value { ++ PLL1_FREQ_1066_VALUE = 1066000000, ++}; ++ ++enum starfive_pll1_freq { ++ PLL1_FREQ_1066 = 0, ++}; ++ ++enum starfive_pll2_freq_value { ++ PLL2_FREQ_1188_VALUE = 1188000000, ++ PLL2_FREQ_12288_VALUE = 1228800000, ++}; ++ ++enum starfive_pll2_freq { ++ PLL2_FREQ_1188 = 0, ++ PLL2_FREQ_12288, ++}; ++ ++static const struct starfive_pll_syscon_value ++ jh7110_pll0_syscon_freq[] = { ++ [PLL0_FREQ_375] = { ++ .freq = PLL0_FREQ_375_VALUE, ++ .prediv = 8, ++ .fbdiv = 125, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++ [PLL0_FREQ_500] = { ++ .freq = PLL0_FREQ_500_VALUE, ++ .prediv = 6, ++ .fbdiv = 125, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++ [PLL0_FREQ_625] = { ++ .freq = PLL0_FREQ_625_VALUE, ++ .prediv = 24, ++ .fbdiv = 625, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++ [PLL0_FREQ_750] = { ++ .freq = PLL0_FREQ_750_VALUE, ++ .prediv = 4, ++ .fbdiv = 125, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++ [PLL0_FREQ_875] = { ++ .freq = PLL0_FREQ_875_VALUE, ++ .prediv = 24, ++ .fbdiv = 875, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++ [PLL0_FREQ_1000] = { ++ .freq = PLL0_FREQ_1000_VALUE, ++ .prediv = 3, ++ .fbdiv = 125, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++ [PLL0_FREQ_1250] = { ++ .freq = PLL0_FREQ_1250_VALUE, ++ .prediv = 12, ++ .fbdiv = 625, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++ [PLL0_FREQ_1375] = { ++ .freq = PLL0_FREQ_1375_VALUE, ++ .prediv = 24, ++ .fbdiv = 1375, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++ [PLL0_FREQ_1500] = { ++ .freq = PLL0_FREQ_1500_VALUE, ++ .prediv = 2, ++ .fbdiv = 125, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++}; ++ ++static const struct starfive_pll_syscon_value ++ jh7110_pll1_syscon_freq[] = { ++ [PLL1_FREQ_1066] = { ++ .freq = PLL1_FREQ_1066_VALUE, ++ .prediv = 12, ++ .fbdiv = 533, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++}; ++ ++static const struct starfive_pll_syscon_value ++ jh7110_pll2_syscon_freq[] = { ++ [PLL2_FREQ_1188] = { ++ .freq = PLL2_FREQ_1188_VALUE, ++ .prediv = 2, ++ .fbdiv = 99, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++ [PLL2_FREQ_12288] = { ++ .freq = PLL2_FREQ_12288_VALUE, ++ .prediv = 5, ++ .fbdiv = 256, ++ .postdiv1 = 1, ++ .dacpd = 1, ++ .dsmpd = 1, ++ }, ++}; ++ ++int __init clk_starfive_jh7110_pll_init(struct platform_device *pdev, ++ struct jh7110_clk_pll_data *pll_priv); ++ ++#endif +diff --git a/drivers/clk/starfive/clk-starfive-jh7110-stg.c b/drivers/clk/starfive/clk-starfive-jh7110-stg.c +new file mode 100755 +index 000000000000..d47b04e0fbc9 +--- /dev/null ++++ b/drivers/clk/starfive/clk-starfive-jh7110-stg.c +@@ -0,0 +1,170 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * StarFive JH7110 stg Clock Generator Driver ++ * ++ * Copyright (C) 2022 Xingyu Wu ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include "clk-starfive-jh7110.h" ++ ++/* external clocks */ ++#define JH7110_OSC (JH7110_CLK_END + 0) ++ ++static const struct jh7110_clk_data jh7110_clk_stg_data[] __initconst = { ++ //hifi4 ++ JH7110_GATE(JH7110_HIFI4_CLK_CORE, "u0_hifi4_clk_core", ++ GATE_FLAG_NORMAL, JH7110_HIFI4_CORE), ++ //usb ++ JH7110_GATE(JH7110_USB0_CLK_USB_APB, "u0_cdn_usb_clk_usb_apb", ++ GATE_FLAG_NORMAL, JH7110_STG_APB), ++ JH7110_GATE(JH7110_USB0_CLK_UTMI_APB, "u0_cdn_usb_clk_utmi_apb", ++ GATE_FLAG_NORMAL, JH7110_STG_APB), ++ JH7110_GATE(JH7110_USB0_CLK_AXI, "u0_cdn_usb_clk_axi", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++ JH7110_GDIV(JH7110_USB0_CLK_LPM, "u0_cdn_usb_clk_lpm", ++ GATE_FLAG_NORMAL, 2, JH7110_OSC), ++ JH7110_GDIV(JH7110_USB0_CLK_STB, "u0_cdn_usb_clk_stb", ++ GATE_FLAG_NORMAL, 4, JH7110_OSC), ++ JH7110_GATE(JH7110_USB0_CLK_APP_125, "u0_cdn_usb_clk_app_125", ++ GATE_FLAG_NORMAL, JH7110_USB_125M), ++ JH7110__DIV(JH7110_USB0_REFCLK, "u0_cdn_usb_refclk", 2, JH7110_OSC), ++ //pci-e ++ JH7110_GATE(JH7110_PCIE0_CLK_AXI_MST0, "u0_plda_pcie_clk_axi_mst0", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_PCIE0_CLK_APB, "u0_plda_pcie_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_STG_APB), ++ JH7110_GATE(JH7110_PCIE0_CLK_TL, "u0_plda_pcie_clk_tl", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_PCIE1_CLK_AXI_MST0, "u1_plda_pcie_clk_axi_mst0", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_PCIE1_CLK_APB, "u1_plda_pcie_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_STG_APB), ++ JH7110_GATE(JH7110_PCIE1_CLK_TL, "u1_plda_pcie_clk_tl", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_PCIE01_SLV_DEC_MAINCLK, "u0_pcie01_slv_dec_mainclk", ++ CLK_IGNORE_UNUSED, JH7110_STG_AXIAHB), ++ //security ++ JH7110_GATE(JH7110_SEC_HCLK, "u0_sec_top_hclk", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_SEC_MISCAHB_CLK, "u0_sec_top_miscahb_clk", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++ //stg mtrx ++ JH7110_GATE(JH7110_STG_MTRX_GRP0_CLK_MAIN, "u0_stg_mtrx_grp0_clk_main", ++ CLK_IGNORE_UNUSED, JH7110_CPU_BUS), ++ JH7110_GATE(JH7110_STG_MTRX_GRP0_CLK_BUS, "u0_stg_mtrx_grp0_clk_bus", ++ CLK_IGNORE_UNUSED, JH7110_NOCSTG_BUS), ++ JH7110_GATE(JH7110_STG_MTRX_GRP0_CLK_STG, "u0_stg_mtrx_grp0_clk_stg", ++ CLK_IGNORE_UNUSED, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_STG_MTRX_GRP1_CLK_MAIN, "u0_stg_mtrx_grp1_clk_main", ++ CLK_IGNORE_UNUSED, JH7110_CPU_BUS), ++ JH7110_GATE(JH7110_STG_MTRX_GRP1_CLK_BUS, "u0_stg_mtrx_grp1_clk_bus", ++ CLK_IGNORE_UNUSED, JH7110_NOCSTG_BUS), ++ JH7110_GATE(JH7110_STG_MTRX_GRP1_CLK_STG, "u0_stg_mtrx_grp1_clk_stg", ++ CLK_IGNORE_UNUSED, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_STG_MTRX_GRP1_CLK_HIFI, "u0_stg_mtrx_grp1_clk_hifi", ++ CLK_IGNORE_UNUSED, JH7110_HIFI4_AXI), ++ //e24_rvpi ++ JH7110_GDIV(JH7110_E2_RTC_CLK, "u0_e2_sft7110_rtc_clk", ++ GATE_FLAG_NORMAL, 24, JH7110_OSC), ++ JH7110_GATE(JH7110_E2_CLK_CORE, "u0_e2_sft7110_clk_core", ++ CLK_IGNORE_UNUSED, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_E2_CLK_DBG, "u0_e2_sft7110_clk_dbg", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++ //dw_sgdma1p ++ JH7110_GATE(JH7110_DMA1P_CLK_AXI, "u0_dw_dma1p_8ch_56hs_clk_axi", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_DMA1P_CLK_AHB, "u0_dw_dma1p_8ch_56hs_clk_ahb", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++}; ++ ++int __init clk_starfive_jh7110_stg_init(struct platform_device *pdev, ++ struct jh7110_clk_priv *priv) ++{ ++ unsigned int idx; ++ int ret = 0; ++ ++ priv->stg_base = devm_platform_ioremap_resource_byname(pdev, "stg"); ++ if (IS_ERR(priv->stg_base)) ++ return PTR_ERR(priv->stg_base); ++ ++ priv->pll[PLL_OF(JH7110_PCIE0_CLK_AXI_SLV0)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_plda_pcie_clk_axi_slv0", ++ "u0_plda_pcie_clk_axi_mst0", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PCIE0_CLK_AXI_SLV)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_plda_pcie_clk_axi_slv", ++ "u0_plda_pcie_clk_axi_mst0", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PCIE0_CLK_OSC)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_plda_pcie_clk_osc", "osc", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PCIE1_CLK_AXI_SLV0)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_plda_pcie_clk_axi_slv0", ++ "u1_plda_pcie_clk_axi_mst0", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PCIE1_CLK_AXI_SLV)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_plda_pcie_clk_axi_slv", ++ "u1_plda_pcie_clk_axi_mst0", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PCIE1_CLK_OSC)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_plda_pcie_clk_osc", "osc", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_E2_IRQ_SYNC_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_e2_sft7110_irq_sync_clk_core", ++ "stg_axiahb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_STG_CRG_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_stg_crg_pclk", "stg_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_STG_SYSCON_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_stg_syscon_pclk", "stg_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_STG_APB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "stg_apb", "apb_bus", 0, 1, 1); ++ ++ for (idx = JH7110_CLK_SYS_REG_END; idx < JH7110_CLK_STG_REG_END; idx++) { ++ u32 max = jh7110_clk_stg_data[idx].max; ++ struct clk_parent_data parents[4] = {}; ++ struct clk_init_data init = { ++ .name = jh7110_clk_stg_data[idx].name, ++ .ops = starfive_jh7110_clk_ops(max), ++ .parent_data = parents, ++ .num_parents = ((max & JH7110_CLK_MUX_MASK) >> ++ JH7110_CLK_MUX_SHIFT) + 1, ++ .flags = jh7110_clk_stg_data[idx].flags, ++ }; ++ struct jh7110_clk *clk = &priv->reg[idx]; ++ unsigned int i; ++ ++ for (i = 0; i < init.num_parents; i++) { ++ unsigned int pidx = jh7110_clk_stg_data[idx].parents[i]; ++ ++ if (pidx < JH7110_CLK_REG_END ) ++ parents[i].hw = &priv->reg[pidx].hw; ++ else if ((pidx < JH7110_CLK_STG_END) && ++ (pidx > (JH7110_CLK_SYS_END - 1))) ++ parents[i].hw = priv->pll[PLL_OF(pidx)]; ++ else if (pidx == JH7110_OSC) ++ parents[i].fw_name = "osc"; ++ } ++ ++ clk->hw.init = &init; ++ clk->idx = idx; ++ clk->max_div = max & JH7110_CLK_DIV_MASK; ++ clk->reg_flags = JH7110_CLK_STG_FLAG; ++ ++ ret = devm_clk_hw_register(priv->dev, &clk->hw); ++ if (ret) ++ return ret; ++ } ++ ++ dev_dbg(&pdev->dev, "starfive JH7110 clk_stg init successfully."); ++ return 0; ++} +diff --git a/drivers/clk/starfive/clk-starfive-jh7110-sys.c b/drivers/clk/starfive/clk-starfive-jh7110-sys.c +new file mode 100644 +index 000000000000..8f94e61957fa +--- /dev/null ++++ b/drivers/clk/starfive/clk-starfive-jh7110-sys.c +@@ -0,0 +1,845 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * StarFive JH7110 sys Clock Generator Driver ++ * ++ * Copyright (C) 2022 Xingyu Wu ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include "clk-starfive-jh7110.h" ++ ++/* sys external clocks */ ++#define JH7110_OSC (JH7110_CLK_END + 0) ++#define JH7110_GMAC1_RMII_REFIN (JH7110_CLK_END + 1) ++#define JH7110_GMAC1_RGMII_RXIN (JH7110_CLK_END + 2) ++#define JH7110_I2STX_BCLK_EXT (JH7110_CLK_END + 3) ++#define JH7110_I2STX_LRCK_EXT (JH7110_CLK_END + 4) ++#define JH7110_I2SRX_BCLK_EXT (JH7110_CLK_END + 5) ++#define JH7110_I2SRX_LRCK_EXT (JH7110_CLK_END + 6) ++#define JH7110_TDM_EXT (JH7110_CLK_END + 7) ++#define JH7110_MCLK_EXT (JH7110_CLK_END + 8) ++#define JH7110_JTAG_TCK_INNER (JH7110_CLK_END + 9) ++#define JH7110_BIST_APB (JH7110_CLK_END + 10) ++ ++static const struct jh7110_clk_data jh7110_clk_sys_data[] __initconst = { ++ /*root*/ ++ JH7110__MUX(JH7110_CPU_ROOT, "cpu_root", PARENT_NUMS_2, ++ JH7110_OSC, ++ JH7110_PLL0_OUT), ++ JH7110__DIV(JH7110_CPU_CORE, "cpu_core", 7, JH7110_CPU_ROOT), ++ JH7110__DIV(JH7110_CPU_BUS, "cpu_bus", 2, JH7110_CPU_CORE), ++ JH7110__MUX(JH7110_GPU_ROOT, "gpu_root", PARENT_NUMS_2, ++ JH7110_PLL2_OUT, ++ JH7110_PLL1_OUT), ++ JH7110_MDIV(JH7110_PERH_ROOT, "perh_root", 2, PARENT_NUMS_2, ++ JH7110_PLL0_OUT, ++ JH7110_PLL2_OUT), ++ JH7110__MUX(JH7110_BUS_ROOT, "bus_root", PARENT_NUMS_2, ++ JH7110_OSC, ++ JH7110_PLL2_OUT), ++ JH7110__DIV(JH7110_NOCSTG_BUS, "nocstg_bus", 3, JH7110_BUS_ROOT), ++ JH7110__DIV(JH7110_AXI_CFG0, "axi_cfg0", 3, JH7110_BUS_ROOT), ++ JH7110__DIV(JH7110_STG_AXIAHB, "stg_axiahb", 2, JH7110_AXI_CFG0), ++ JH7110_GATE(JH7110_AHB0, "ahb0", CLK_IS_CRITICAL, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_AHB1, "ahb1", CLK_IS_CRITICAL, JH7110_STG_AXIAHB), ++ JH7110__DIV(JH7110_APB_BUS_FUNC, "apb_bus_func", ++ 8, JH7110_STG_AXIAHB), ++ JH7110_GATE(JH7110_APB0, "apb0", CLK_IS_CRITICAL, JH7110_APB_BUS), ++ JH7110__DIV(JH7110_PLL0_DIV2, "pll0_div2", 2, JH7110_PLL0_OUT), ++ JH7110__DIV(JH7110_PLL1_DIV2, "pll1_div2", 2, JH7110_PLL1_OUT), ++ JH7110__DIV(JH7110_PLL2_DIV2, "pll2_div2", 2, JH7110_PLL2_OUT), ++ JH7110__DIV(JH7110_AUDIO_ROOT, "audio_root", 8, JH7110_PLL2_OUT), ++ JH7110__DIV(JH7110_MCLK_INNER, "mclk_inner", 64, JH7110_AUDIO_ROOT), ++ JH7110__MUX(JH7110_MCLK, "mclk", PARENT_NUMS_2, ++ JH7110_MCLK_INNER, ++ JH7110_MCLK_EXT), ++ JH7110_GATE(JH7110_MCLK_OUT, "mclk_out", GATE_FLAG_NORMAL, ++ JH7110_MCLK_INNER), ++ JH7110_MDIV(JH7110_ISP_2X, "isp_2x", 8, PARENT_NUMS_2, ++ JH7110_PLL2_OUT, ++ JH7110_PLL1_OUT), ++ JH7110__DIV(JH7110_ISP_AXI, "isp_axi", 4, JH7110_ISP_2X), ++ JH7110_GDIV(JH7110_GCLK0, "gclk0", GATE_FLAG_NORMAL, ++ 62, JH7110_PLL0_DIV2), ++ JH7110_GDIV(JH7110_GCLK1, "gclk1", GATE_FLAG_NORMAL, ++ 62, JH7110_PLL1_DIV2), ++ JH7110_GDIV(JH7110_GCLK2, "gclk2", GATE_FLAG_NORMAL, ++ 62, JH7110_PLL2_DIV2), ++ /*u0_u7mc_sft7110*/ ++ JH7110_GATE(JH7110_U7_CORE_CLK, "u0_u7mc_sft7110_core_clk", ++ CLK_IGNORE_UNUSED, JH7110_CPU_CORE), ++ JH7110_GATE(JH7110_U7_CORE_CLK1, "u0_u7mc_sft7110_core_clk1", ++ CLK_IGNORE_UNUSED, JH7110_CPU_CORE), ++ JH7110_GATE(JH7110_U7_CORE_CLK2, "u0_u7mc_sft7110_core_clk2", ++ CLK_IGNORE_UNUSED, JH7110_CPU_CORE), ++ JH7110_GATE(JH7110_U7_CORE_CLK3, "u0_u7mc_sft7110_core_clk3", ++ CLK_IGNORE_UNUSED, JH7110_CPU_CORE), ++ JH7110_GATE(JH7110_U7_CORE_CLK4, "u0_u7mc_sft7110_core_clk4", ++ CLK_IGNORE_UNUSED, JH7110_CPU_CORE), ++ JH7110_GATE(JH7110_U7_DEBUG_CLK, "u0_u7mc_sft7110_debug_clk", ++ CLK_IGNORE_UNUSED, JH7110_CPU_BUS), ++ JH7110__DIV(JH7110_U7_RTC_TOGGLE, "u0_u7mc_sft7110_rtc_toggle", ++ 6, JH7110_OSC), ++ JH7110_GATE(JH7110_U7_TRACE_CLK0, "u0_u7mc_sft7110_trace_clk0", ++ CLK_IGNORE_UNUSED, JH7110_CPU_CORE), ++ JH7110_GATE(JH7110_U7_TRACE_CLK1, "u0_u7mc_sft7110_trace_clk1", ++ CLK_IGNORE_UNUSED, JH7110_CPU_CORE), ++ JH7110_GATE(JH7110_U7_TRACE_CLK2, "u0_u7mc_sft7110_trace_clk2", ++ CLK_IGNORE_UNUSED, JH7110_CPU_CORE), ++ JH7110_GATE(JH7110_U7_TRACE_CLK3, "u0_u7mc_sft7110_trace_clk3", ++ CLK_IGNORE_UNUSED, JH7110_CPU_CORE), ++ JH7110_GATE(JH7110_U7_TRACE_CLK4, "u0_u7mc_sft7110_trace_clk4", ++ CLK_IGNORE_UNUSED, JH7110_CPU_CORE), ++ JH7110_GATE(JH7110_U7_TRACE_COM_CLK, "u0_u7mc_sft7110_trace_com_clk", ++ CLK_IGNORE_UNUSED, JH7110_CPU_BUS), ++ //NOC ++ JH7110_GATE(JH7110_NOC_BUS_CLK_CPU_AXI, ++ "u0_sft7110_noc_bus_clk_cpu_axi", ++ CLK_IS_CRITICAL, JH7110_CPU_BUS), ++ JH7110_GATE(JH7110_NOC_BUS_CLK_AXICFG0_AXI, ++ "u0_sft7110_noc_bus_clk_axicfg0_axi", ++ CLK_IS_CRITICAL, JH7110_AXI_CFG0), ++ //DDRC ++ JH7110__DIV(JH7110_OSC_DIV2, "osc_div2", 2, JH7110_OSC), ++ JH7110__DIV(JH7110_PLL1_DIV4, "pll1_div4", 2, JH7110_PLL1_DIV2), ++ JH7110__DIV(JH7110_PLL1_DIV8, "pll1_div8", 2, JH7110_PLL1_DIV4), ++ JH7110__MUX(JH7110_DDR_BUS, "ddr_bus", PARENT_NUMS_4, ++ JH7110_OSC_DIV2, ++ JH7110_PLL1_DIV2, ++ JH7110_PLL1_DIV4, ++ JH7110_PLL1_DIV8), ++ JH7110_GATE(JH7110_DDR_CLK_AXI, "u0_ddr_sft7110_clk_axi", ++ CLK_IGNORE_UNUSED, JH7110_DDR_BUS), ++ //GPU ++ JH7110__DIV(JH7110_GPU_CORE, "gpu_core", 7, JH7110_GPU_ROOT), ++ JH7110_GATE(JH7110_GPU_CORE_CLK, "u0_img_gpu_core_clk", ++ GATE_FLAG_NORMAL, JH7110_GPU_CORE), ++ JH7110_GATE(JH7110_GPU_SYS_CLK, "u0_img_gpu_sys_clk", ++ GATE_FLAG_NORMAL, JH7110_AXI_CFG1), ++ JH7110_GATE(JH7110_GPU_CLK_APB, "u0_img_gpu_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GDIV(JH7110_GPU_RTC_TOGGLE, "u0_img_gpu_rtc_toggle", ++ GATE_FLAG_NORMAL, 12, JH7110_OSC), ++ JH7110_GATE(JH7110_NOC_BUS_CLK_GPU_AXI, ++ "u0_sft7110_noc_bus_clk_gpu_axi", ++ GATE_FLAG_NORMAL, JH7110_GPU_CORE), ++ //ISP ++ JH7110_GATE(JH7110_ISP_TOP_CLK_ISPCORE_2X, ++ "u0_dom_isp_top_clk_dom_isp_top_clk_ispcore_2x", ++ GATE_FLAG_NORMAL, JH7110_ISP_2X), ++ JH7110_GATE(JH7110_ISP_TOP_CLK_ISP_AXI, ++ "u0_dom_isp_top_clk_dom_isp_top_clk_isp_axi", ++ GATE_FLAG_NORMAL, JH7110_ISP_AXI), ++ JH7110_GATE(JH7110_NOC_BUS_CLK_ISP_AXI, ++ "u0_sft7110_noc_bus_clk_isp_axi", ++ CLK_IS_CRITICAL, JH7110_ISP_AXI), ++ //HIFI4 ++ JH7110__DIV(JH7110_HIFI4_CORE, "hifi4_core", 15, JH7110_BUS_ROOT), ++ JH7110__DIV(JH7110_HIFI4_AXI, "hifi4_axi", 2, JH7110_HIFI4_CORE), ++ //AXICFG1_DEC ++ JH7110_GATE(JH7110_AXI_CFG1_DEC_CLK_MAIN, "u0_axi_cfg1_dec_clk_main", ++ CLK_IGNORE_UNUSED, JH7110_AXI_CFG1), ++ JH7110_GATE(JH7110_AXI_CFG1_DEC_CLK_AHB, "u0_axi_cfg1_dec_clk_ahb", ++ CLK_IGNORE_UNUSED, JH7110_AHB0), ++ //VOUT ++ JH7110_GATE(JH7110_VOUT_SRC, ++ "u0_dom_vout_top_clk_dom_vout_top_clk_vout_src", ++ GATE_FLAG_NORMAL, JH7110_VOUT_ROOT), ++ JH7110__DIV(JH7110_VOUT_AXI, "vout_axi", 7, JH7110_VOUT_ROOT), ++ JH7110_GATE(JH7110_NOC_BUS_CLK_DISP_AXI, ++ "u0_sft7110_noc_bus_clk_disp_axi", ++ GATE_FLAG_NORMAL, JH7110_VOUT_AXI), ++ JH7110_GATE(JH7110_VOUT_TOP_CLK_VOUT_AHB, ++ "u0_dom_vout_top_clk_dom_vout_top_clk_vout_ahb", ++ GATE_FLAG_NORMAL, JH7110_AHB1), ++ JH7110_GATE(JH7110_VOUT_TOP_CLK_VOUT_AXI, ++ "u0_dom_vout_top_clk_dom_vout_top_clk_vout_axi", ++ GATE_FLAG_NORMAL, JH7110_VOUT_AXI), ++ JH7110_GATE(JH7110_VOUT_TOP_CLK_HDMITX0_MCLK, ++ "u0_dom_vout_top_clk_dom_vout_top_clk_hdmitx0_mclk", ++ GATE_FLAG_NORMAL, JH7110_MCLK), ++ JH7110__DIV(JH7110_VOUT_TOP_CLK_MIPIPHY_REF, ++ "u0_dom_vout_top_clk_dom_vout_top_clk_mipiphy_ref", ++ 2, JH7110_OSC), ++ //JPEGC ++ JH7110__DIV(JH7110_JPEGC_AXI, "jpegc_axi", 16, JH7110_VENC_ROOT), ++ JH7110_GATE(JH7110_CODAJ12_CLK_AXI, "u0_CODAJ12_clk_axi", ++ GATE_FLAG_NORMAL, JH7110_JPEGC_AXI), ++ JH7110_GDIV(JH7110_CODAJ12_CLK_CORE, "u0_CODAJ12_clk_core", ++ GATE_FLAG_NORMAL, 16, JH7110_VENC_ROOT), ++ JH7110_GATE(JH7110_CODAJ12_CLK_APB, "u0_CODAJ12_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ //VDEC ++ JH7110__DIV(JH7110_VDEC_AXI, "vdec_axi", 7, JH7110_BUS_ROOT), ++ JH7110_GATE(JH7110_WAVE511_CLK_AXI, "u0_WAVE511_clk_axi", ++ GATE_FLAG_NORMAL, JH7110_VDEC_AXI), ++ JH7110_GDIV(JH7110_WAVE511_CLK_BPU, "u0_WAVE511_clk_bpu", ++ GATE_FLAG_NORMAL, 7, JH7110_BUS_ROOT), ++ JH7110_GDIV(JH7110_WAVE511_CLK_VCE, "u0_WAVE511_clk_vce", ++ GATE_FLAG_NORMAL, 7, JH7110_VDEC_ROOT), ++ JH7110_GATE(JH7110_WAVE511_CLK_APB, "u0_WAVE511_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GATE(JH7110_VDEC_JPG_ARB_JPGCLK, "u0_vdec_jpg_arb_jpgclk", ++ CLK_IGNORE_UNUSED, JH7110_JPEGC_AXI), ++ JH7110_GATE(JH7110_VDEC_JPG_ARB_MAINCLK, "u0_vdec_jpg_arb_mainclk", ++ CLK_IGNORE_UNUSED, JH7110_VDEC_AXI), ++ JH7110_GATE(JH7110_NOC_BUS_CLK_VDEC_AXI, ++ "u0_sft7110_noc_bus_clk_vdec_axi", ++ GATE_FLAG_NORMAL, JH7110_VDEC_AXI), ++ //VENC ++ JH7110__DIV(JH7110_VENC_AXI, "venc_axi", 15, JH7110_VENC_ROOT), ++ JH7110_GATE(JH7110_WAVE420L_CLK_AXI, "u0_wave420l_clk_axi", ++ GATE_FLAG_NORMAL, JH7110_VENC_AXI), ++ JH7110_GDIV(JH7110_WAVE420L_CLK_BPU, "u0_wave420l_clk_bpu", ++ GATE_FLAG_NORMAL, 15, JH7110_VENC_ROOT), ++ JH7110_GDIV(JH7110_WAVE420L_CLK_VCE, "u0_wave420l_clk_vce", ++ GATE_FLAG_NORMAL, 15, JH7110_VENC_ROOT), ++ JH7110_GATE(JH7110_WAVE420L_CLK_APB, "u0_wave420l_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GATE(JH7110_NOC_BUS_CLK_VENC_AXI, ++ "u0_sft7110_noc_bus_clk_venc_axi", ++ GATE_FLAG_NORMAL, JH7110_VENC_AXI), ++ //INTMEM ++ JH7110_GATE(JH7110_AXI_CFG0_DEC_CLK_MAIN_DIV, ++ "u0_axi_cfg0_dec_clk_main_div", ++ CLK_IGNORE_UNUSED, JH7110_AHB1), ++ JH7110_GATE(JH7110_AXI_CFG0_DEC_CLK_MAIN, "u0_axi_cfg0_dec_clk_main", ++ CLK_IGNORE_UNUSED, JH7110_AXI_CFG0), ++ JH7110_GATE(JH7110_AXI_CFG0_DEC_CLK_HIFI4, "u0_axi_cfg0_dec_clk_hifi4", ++ CLK_IGNORE_UNUSED, JH7110_HIFI4_AXI), ++ JH7110_GATE(JH7110_AXIMEM2_128B_CLK_AXI, "u2_aximem_128b_clk_axi", ++ CLK_IGNORE_UNUSED, JH7110_AXI_CFG0), ++ //QSPI ++ JH7110_GATE(JH7110_QSPI_CLK_AHB, "u0_cdns_qspi_clk_ahb", ++ CLK_IGNORE_UNUSED, JH7110_AHB1), ++ JH7110_GATE(JH7110_QSPI_CLK_APB, "u0_cdns_qspi_clk_apb", ++ CLK_IGNORE_UNUSED, JH7110_APB12), ++ JH7110__DIV(JH7110_QSPI_REF_SRC, "u0_cdns_qspi_ref_src", ++ 16, JH7110_GMACUSB_ROOT), ++ JH7110_GMUX(JH7110_QSPI_CLK_REF, "u0_cdns_qspi_clk_ref", ++ CLK_IGNORE_UNUSED, PARENT_NUMS_2, ++ JH7110_OSC, ++ JH7110_QSPI_REF_SRC), ++ //SDIO ++ JH7110_GATE(JH7110_SDIO0_CLK_AHB, "u0_dw_sdio_clk_ahb", ++ CLK_IGNORE_UNUSED, JH7110_AHB0), ++ JH7110_GATE(JH7110_SDIO1_CLK_AHB, "u1_dw_sdio_clk_ahb", ++ CLK_IGNORE_UNUSED, JH7110_AHB0), ++ JH7110_GDIV(JH7110_SDIO0_CLK_SDCARD, "u0_dw_sdio_clk_sdcard", ++ CLK_IGNORE_UNUSED, 15, JH7110_AXI_CFG0), ++ JH7110_GDIV(JH7110_SDIO1_CLK_SDCARD, "u1_dw_sdio_clk_sdcard", ++ CLK_IGNORE_UNUSED, 15, JH7110_AXI_CFG0), ++ //STG ++ JH7110__DIV(JH7110_USB_125M, "usb_125m", 15, JH7110_GMACUSB_ROOT), ++ JH7110_GATE(JH7110_NOC_BUS_CLK_STG_AXI, ++ "u0_sft7110_noc_bus_clk_stg_axi", ++ CLK_IGNORE_UNUSED, JH7110_NOCSTG_BUS), ++ //GMAC1 ++ JH7110_GATE(JH7110_GMAC5_CLK_AHB, "u1_dw_gmac5_axi64_clk_ahb", ++ GATE_FLAG_NORMAL, JH7110_AHB0), ++ JH7110_GATE(JH7110_GMAC5_CLK_AXI, "u1_dw_gmac5_axi64_clk_axi", ++ GATE_FLAG_NORMAL, JH7110_STG_AXIAHB), ++ JH7110__DIV(JH7110_GMAC_SRC, "gmac_src", 7, JH7110_GMACUSB_ROOT), ++ JH7110__DIV(JH7110_GMAC1_GTXCLK, "gmac1_gtxclk", ++ 15, JH7110_GMACUSB_ROOT), ++ JH7110__DIV(JH7110_GMAC1_RMII_RTX, "gmac1_rmii_rtx", ++ 30, JH7110_GMAC1_RMII_REFIN), ++ JH7110_GDIV(JH7110_GMAC5_CLK_PTP, "u1_dw_gmac5_axi64_clk_ptp", ++ GATE_FLAG_NORMAL, 31, JH7110_GMAC_SRC), ++ JH7110__MUX(JH7110_GMAC5_CLK_RX, "u1_dw_gmac5_axi64_clk_rx", ++ PARENT_NUMS_2, ++ JH7110_GMAC1_RGMII_RXIN, ++ JH7110_GMAC1_RMII_RTX), ++ JH7110__INV(JH7110_GMAC5_CLK_RX_INV, "u1_dw_gmac5_axi64_clk_rx_inv", ++ JH7110_GMAC5_CLK_RX), ++ JH7110_GMUX(JH7110_GMAC5_CLK_TX, "u1_dw_gmac5_axi64_clk_tx", ++ GATE_FLAG_NORMAL, PARENT_NUMS_2, ++ JH7110_GMAC1_GTXCLK, ++ JH7110_GMAC1_RMII_RTX), ++ JH7110__INV(JH7110_GMAC5_CLK_TX_INV, "u1_dw_gmac5_axi64_clk_tx_inv", ++ JH7110_GMAC5_CLK_TX), ++ JH7110_GATE(JH7110_GMAC1_GTXC, "gmac1_gtxc", ++ GATE_FLAG_NORMAL, JH7110_GMAC1_GTXCLK), ++ //GMAC0 ++ JH7110_GDIV(JH7110_GMAC0_GTXCLK, "gmac0_gtxclk", ++ GATE_FLAG_NORMAL, 15, JH7110_GMACUSB_ROOT), ++ JH7110_GDIV(JH7110_GMAC0_PTP, "gmac0_ptp", ++ GATE_FLAG_NORMAL, 31, JH7110_GMAC_SRC), ++ JH7110_GDIV(JH7110_GMAC_PHY, "gmac_phy", ++ GATE_FLAG_NORMAL, 31, JH7110_GMAC_SRC), ++ JH7110_GATE(JH7110_GMAC0_GTXC, "gmac0_gtxc", ++ GATE_FLAG_NORMAL, JH7110_GMAC0_GTXCLK), ++ //SYS MISC ++ JH7110_GATE(JH7110_SYS_IOMUX_PCLK, "u0_sys_iomux_pclk", ++ CLK_IGNORE_UNUSED, JH7110_APB12), ++ JH7110_GATE(JH7110_MAILBOX_CLK_APB, "u0_mailbox_clk_apb", ++ CLK_IGNORE_UNUSED, JH7110_APB12), ++ JH7110_GATE(JH7110_INT_CTRL_CLK_APB, "u0_int_ctrl_clk_apb", ++ CLK_IGNORE_UNUSED, JH7110_APB12), ++ //CAN ++ JH7110_GATE(JH7110_CAN0_CTRL_CLK_APB, "u0_can_ctrl_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GDIV(JH7110_CAN0_CTRL_CLK_TIMER, "u0_can_ctrl_clk_timer", ++ GATE_FLAG_NORMAL, 24, JH7110_OSC), ++ JH7110_GDIV(JH7110_CAN0_CTRL_CLK_CAN, "u0_can_ctrl_clk_can", ++ GATE_FLAG_NORMAL, 63, JH7110_PERH_ROOT), ++ JH7110_GATE(JH7110_CAN1_CTRL_CLK_APB, "u1_can_ctrl_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GDIV(JH7110_CAN1_CTRL_CLK_TIMER, "u1_can_ctrl_clk_timer", ++ GATE_FLAG_NORMAL, 24, JH7110_OSC), ++ JH7110_GDIV(JH7110_CAN1_CTRL_CLK_CAN, "u1_can_ctrl_clk_can", ++ GATE_FLAG_NORMAL, 63, JH7110_PERH_ROOT), ++ //PWM ++ JH7110_GATE(JH7110_PWM_CLK_APB, "u0_pwm_8ch_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ //WDT ++ JH7110_GATE(JH7110_DSKIT_WDT_CLK_APB, "u0_dskit_wdt_clk_apb", ++ CLK_IGNORE_UNUSED, JH7110_APB12), ++ JH7110_GATE(JH7110_DSKIT_WDT_CLK_WDT, "u0_dskit_wdt_clk_wdt", ++ CLK_IGNORE_UNUSED, JH7110_OSC), ++ //TIMER ++ JH7110_GATE(JH7110_TIMER_CLK_APB, "u0_si5_timer_clk_apb", ++ CLK_IGNORE_UNUSED, JH7110_APB12), ++ JH7110_GATE(JH7110_TIMER_CLK_TIMER0, "u0_si5_timer_clk_timer0", ++ CLK_IGNORE_UNUSED, JH7110_OSC), ++ JH7110_GATE(JH7110_TIMER_CLK_TIMER1, "u0_si5_timer_clk_timer1", ++ CLK_IGNORE_UNUSED, JH7110_OSC), ++ JH7110_GATE(JH7110_TIMER_CLK_TIMER2, "u0_si5_timer_clk_timer2", ++ CLK_IGNORE_UNUSED, JH7110_OSC), ++ JH7110_GATE(JH7110_TIMER_CLK_TIMER3, "u0_si5_timer_clk_timer3", ++ CLK_IGNORE_UNUSED, JH7110_OSC), ++ //TEMP SENSOR ++ JH7110_GATE(JH7110_TEMP_SENSOR_CLK_APB, "u0_temp_sensor_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GDIV(JH7110_TEMP_SENSOR_CLK_TEMP, "u0_temp_sensor_clk_temp", ++ GATE_FLAG_NORMAL, 24, JH7110_OSC), ++ //SPI ++ JH7110_GATE(JH7110_SPI0_CLK_APB, "u0_ssp_spi_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GATE(JH7110_SPI1_CLK_APB, "u1_ssp_spi_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GATE(JH7110_SPI2_CLK_APB, "u2_ssp_spi_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GATE(JH7110_SPI3_CLK_APB, "u3_ssp_spi_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GATE(JH7110_SPI4_CLK_APB, "u4_ssp_spi_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GATE(JH7110_SPI5_CLK_APB, "u5_ssp_spi_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GATE(JH7110_SPI6_CLK_APB, "u6_ssp_spi_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ //I2C ++ JH7110_GATE(JH7110_I2C0_CLK_APB, "u0_dw_i2c_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GATE(JH7110_I2C1_CLK_APB, "u1_dw_i2c_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GATE(JH7110_I2C2_CLK_APB, "u2_dw_i2c_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GATE(JH7110_I2C3_CLK_APB, "u3_dw_i2c_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GATE(JH7110_I2C4_CLK_APB, "u4_dw_i2c_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GATE(JH7110_I2C5_CLK_APB, "u5_dw_i2c_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ JH7110_GATE(JH7110_I2C6_CLK_APB, "u6_dw_i2c_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB12), ++ //UART ++ JH7110_GATE(JH7110_UART0_CLK_APB, "u0_dw_uart_clk_apb", ++ CLK_IGNORE_UNUSED, JH7110_APB0), ++ JH7110_GATE(JH7110_UART0_CLK_CORE, "u0_dw_uart_clk_core", ++ CLK_IGNORE_UNUSED, JH7110_OSC), ++ JH7110_GATE(JH7110_UART1_CLK_APB, "u1_dw_uart_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GATE(JH7110_UART1_CLK_CORE, "u1_dw_uart_clk_core", ++ GATE_FLAG_NORMAL, JH7110_OSC), ++ JH7110_GATE(JH7110_UART2_CLK_APB, "u2_dw_uart_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GATE(JH7110_UART2_CLK_CORE, "u2_dw_uart_clk_core", ++ GATE_FLAG_NORMAL, JH7110_OSC), ++ JH7110_GATE(JH7110_UART3_CLK_APB, "u3_dw_uart_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GDIV(JH7110_UART3_CLK_CORE, "u3_dw_uart_clk_core", ++ GATE_FLAG_NORMAL, 10, JH7110_PERH_ROOT), ++ JH7110_GATE(JH7110_UART4_CLK_APB, "u4_dw_uart_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GDIV(JH7110_UART4_CLK_CORE, "u4_dw_uart_clk_core", ++ GATE_FLAG_NORMAL, 10, JH7110_PERH_ROOT), ++ JH7110_GATE(JH7110_UART5_CLK_APB, "u5_dw_uart_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GDIV(JH7110_UART5_CLK_CORE, "u5_dw_uart_clk_core", ++ GATE_FLAG_NORMAL, 10, JH7110_PERH_ROOT), ++ //PWMDAC ++ JH7110_GATE(JH7110_PWMDAC_CLK_APB, "u0_pwmdac_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GDIV(JH7110_PWMDAC_CLK_CORE, "u0_pwmdac_clk_core", ++ GATE_FLAG_NORMAL, 256, JH7110_AUDIO_ROOT), ++ //SPDIF ++ JH7110_GATE(JH7110_SPDIF_CLK_APB, "u0_cdns_spdif_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GATE(JH7110_SPDIF_CLK_CORE, "u0_cdns_spdif_clk_core", ++ GATE_FLAG_NORMAL, JH7110_MCLK), ++ //I2STX0_4CH0 ++ JH7110_GATE(JH7110_I2STX0_4CHCLK_APB, "u0_i2stx_4ch_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GDIV(JH7110_I2STX_4CH0_BCLK_MST, "i2stx_4ch0_bclk_mst", ++ GATE_FLAG_NORMAL, 32, JH7110_MCLK), ++ JH7110__INV(JH7110_I2STX_4CH0_BCLK_MST_INV, "i2stx_4ch0_bclk_mst_inv", ++ JH7110_I2STX_4CH0_BCLK_MST), ++ JH7110_MDIV(JH7110_I2STX_4CH0_LRCK_MST, "i2stx_4ch0_lrck_mst", ++ 64, PARENT_NUMS_2, ++ JH7110_I2STX_4CH0_BCLK_MST_INV, ++ JH7110_I2STX_4CH0_BCLK_MST), ++ JH7110__MUX(JH7110_I2STX0_4CHBCLK, "u0_i2stx_4ch_bclk", ++ PARENT_NUMS_2, ++ JH7110_I2STX_4CH0_BCLK_MST, ++ JH7110_I2STX_BCLK_EXT), ++ JH7110__INV(JH7110_I2STX0_4CHBCLK_N, "u0_i2stx_4ch_bclk_n", ++ JH7110_I2STX0_4CHBCLK), ++ JH7110__MUX(JH7110_I2STX0_4CHLRCK, "u0_i2stx_4ch_lrck", ++ PARENT_NUMS_2, ++ JH7110_I2STX_4CH0_LRCK_MST, ++ JH7110_I2STX_LRCK_EXT), ++ //I2STX1_4CH0 ++ JH7110_GATE(JH7110_I2STX1_4CHCLK_APB, "u1_i2stx_4ch_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GDIV(JH7110_I2STX_4CH1_BCLK_MST, "i2stx_4ch1_bclk_mst", ++ GATE_FLAG_NORMAL, 32, JH7110_MCLK), ++ JH7110__INV(JH7110_I2STX_4CH1_BCLK_MST_INV, "i2stx_4ch1_bclk_mst_inv", ++ JH7110_I2STX_4CH1_BCLK_MST), ++ JH7110_MDIV(JH7110_I2STX_4CH1_LRCK_MST, "i2stx_4ch1_lrck_mst", ++ 64, PARENT_NUMS_2, ++ JH7110_I2STX_4CH1_BCLK_MST_INV, ++ JH7110_I2STX_4CH1_BCLK_MST), ++ JH7110__MUX(JH7110_I2STX1_4CHBCLK, "u1_i2stx_4ch_bclk", ++ PARENT_NUMS_2, ++ JH7110_I2STX_4CH1_BCLK_MST, ++ JH7110_I2STX_BCLK_EXT), ++ JH7110__INV(JH7110_I2STX1_4CHBCLK_N, "u1_i2stx_4ch_bclk_n", ++ JH7110_I2STX1_4CHBCLK), ++ JH7110__MUX(JH7110_I2STX1_4CHLRCK, "u1_i2stx_4ch_lrck", ++ PARENT_NUMS_2, ++ JH7110_I2STX_4CH1_LRCK_MST, ++ JH7110_I2STX_LRCK_EXT), ++ //I2SRX_3CH ++ JH7110_GATE(JH7110_I2SRX0_3CH_CLK_APB, "u0_i2srx_3ch_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GDIV(JH7110_I2SRX_3CH_BCLK_MST, "i2srx_3ch_bclk_mst", ++ GATE_FLAG_NORMAL, 32, JH7110_MCLK), ++ JH7110__INV(JH7110_I2SRX_3CH_BCLK_MST_INV, "i2srx_3ch_bclk_mst_inv", ++ JH7110_I2SRX_3CH_BCLK_MST), ++ JH7110_MDIV(JH7110_I2SRX_3CH_LRCK_MST, "i2srx_3ch_lrck_mst", ++ 64, PARENT_NUMS_2, ++ JH7110_I2SRX_3CH_BCLK_MST_INV, ++ JH7110_I2SRX_3CH_BCLK_MST), ++ JH7110__MUX(JH7110_I2SRX0_3CH_BCLK, "u0_i2srx_3ch_bclk", ++ PARENT_NUMS_2, ++ JH7110_I2SRX_3CH_BCLK_MST, ++ JH7110_I2SRX_BCLK_EXT), ++ JH7110__INV(JH7110_I2SRX0_3CH_BCLK_N, "u0_i2srx_3ch_bclk_n", ++ JH7110_I2SRX0_3CH_BCLK), ++ JH7110__MUX(JH7110_I2SRX0_3CH_LRCK, "u0_i2srx_3ch_lrck", ++ PARENT_NUMS_2, ++ JH7110_I2SRX_3CH_LRCK_MST, ++ JH7110_I2SRX_LRCK_EXT), ++ //PDM_4MIC ++ JH7110_GDIV(JH7110_PDM_CLK_DMIC, "u0_pdm_4mic_clk_dmic", ++ GATE_FLAG_NORMAL, 64, JH7110_MCLK), ++ JH7110_GATE(JH7110_PDM_CLK_APB, "u0_pdm_4mic_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ //TDM ++ JH7110_GATE(JH7110_TDM_CLK_AHB, "u0_tdm16slot_clk_ahb", ++ GATE_FLAG_NORMAL, JH7110_AHB0), ++ JH7110_GATE(JH7110_TDM_CLK_APB, "u0_tdm16slot_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_APB0), ++ JH7110_GDIV(JH7110_TDM_INTERNAL, "tdm_internal", ++ GATE_FLAG_NORMAL, 64, JH7110_MCLK), ++ JH7110__MUX(JH7110_TDM_CLK_TDM, "u0_tdm16slot_clk_tdm", ++ PARENT_NUMS_2, ++ JH7110_TDM_INTERNAL, ++ JH7110_TDM_EXT), ++ JH7110__INV(JH7110_TDM_CLK_TDM_N, "u0_tdm16slot_clk_tdm_n", ++ JH7110_TDM_CLK_TDM), ++ JH7110__DIV(JH7110_JTAG_CERTIFICATION_TRNG_CLK, ++ "u0_jtag_certification_trng_clk", 4, JH7110_OSC), ++}; ++ ++int __init clk_starfive_jh7110_sys_init(struct platform_device *pdev, ++ struct jh7110_clk_priv *priv) ++{ ++ unsigned int idx; ++ int ret = 0; ++ ++ priv->sys_base = devm_platform_ioremap_resource_byname(pdev, "sys"); ++ if (IS_ERR(priv->sys_base)) ++ return PTR_ERR(priv->sys_base); ++ ++#ifndef CONFIG_CLK_STARFIVE_JH7110_PLL ++ priv->pll[PLL_OF(JH7110_PLL0_OUT)] = ++ clk_hw_register_fixed_rate(priv->dev, ++ "pll0_out", "osc", 0, 1250000000); ++ if (IS_ERR(priv->pll[PLL_OF(JH7110_PLL0_OUT)])) ++ return PTR_ERR(priv->pll[PLL_OF(JH7110_PLL0_OUT)]); ++ ++ priv->pll[PLL_OF(JH7110_PLL1_OUT)] = ++ clk_hw_register_fixed_rate(priv->dev, ++ "pll1_out", "osc", 0, 1066000000); ++ if (IS_ERR(priv->pll[PLL_OF(JH7110_PLL1_OUT)])) ++ return PTR_ERR(priv->pll[PLL_OF(JH7110_PLL1_OUT)]); ++ ++ priv->pll[PLL_OF(JH7110_PLL2_OUT)] = ++ clk_hw_register_fixed_rate(priv->dev, ++ "pll2_out", "osc", 0, 1228800000); ++ if (IS_ERR(priv->pll[PLL_OF(JH7110_PLL2_OUT)])) ++ return PTR_ERR(priv->pll[PLL_OF(JH7110_PLL2_OUT)]); ++#endif ++ ++ priv->pll[PLL_OF(JH7110_AON_APB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "aon_apb", "apb_bus_func", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_RESET1_CTRL_CLK_SRC)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_reset_ctrl_clk_src", "osc", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_DDR_ROOT)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "ddr_root", "pll1_out", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_VDEC_ROOT)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "vdec_root", "pll0_out", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_VENC_ROOT)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "venc_root", "pll2_out", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_VOUT_ROOT)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "vout_root", "pll2_out", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_GMACUSB_ROOT)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "gmacusb_root", "pll0_out", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PCLK2_MUX_FUNC_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u2_pclk_mux_func_pclk", "apb_bus_func", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PCLK2_MUX_BIST_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u2_pclk_mux_bist_pclk", "bist_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_APB_BUS)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "apb_bus", "u2_pclk_mux_pclk", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_APB12)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "apb12", "apb_bus", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_AXI_CFG1)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "axi_cfg1", "isp_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PLL_WRAP_CRG_GCLK0)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_pll_wrap_crg_gclk0", "gclk0", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PLL_WRAP_CRG_GCLK1)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_pll_wrap_crg_gclk1", "gclk1", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PLL_WRAP_CRG_GCLK2)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_pll_wrap_crg_gclk2", "gclk2", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_JTAG2APB_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_jtag2apb_pclk", "bist_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_U7_BUS_CLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_u7mc_sft7110_bus_clk", "cpu_bus", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_U7_IRQ_SYNC_BUS_CLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_u7mc_sft7110_irq_sync_bus_clk", "cpu_bus", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK2_CPU_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk2_cpu_axi", ++ "u0_sft7110_noc_bus_clk_cpu_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK_APB_BUS)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk_apb_bus", "apb_bus", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK2_APB_BUS)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk2_apb_bus", ++ "u0_sft7110_noc_bus_clk_apb_bus", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK2_AXICFG0_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk2_axicfg0_axi", ++ "u0_sft7110_noc_bus_clk_axicfg0_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_DDR_CLK_DDRPHY_PLL_BYPASS)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_ddr_sft7110_clk_ddrphy_pll_bypass", ++ "pll1_out", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_DDR_CLK_OSC)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_ddr_sft7110_clk_osc", "osc", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_DDR_CLK_APB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_ddr_sft7110_clk_apb", "apb12", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK_DDRC)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk_ddrc", "ddr_bus", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK2_DDRC)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk2_ddrc", ++ "u0_sft7110_noc_bus_clk_ddrc", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SYS_AHB_DEC_CLK_AHB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_saif_amba_sys_ahb_dec_clk_ahb", "ahb0", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_STG_AHB_DEC_CLK_AHB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_saif_amba_stg_ahb_dec_clk_ahb", "ahb0", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK2_GPU_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk2_gpu_axi", ++ "u0_sft7110_noc_bus_clk_gpu_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_ISP_TOP_CLK_DVP)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dom_isp_top_clk_dom_isp_top_clk_dvp", ++ "dvp_clk", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK2_ISP_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk2_isp_axi", ++ "u0_sft7110_noc_bus_clk_isp_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_ISP_TOP_CLK_BIST_APB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dom_isp_top_clk_dom_isp_top_clk_bist_apb", ++ "bist_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK2_DISP_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk2_disp_axi", ++ "u0_sft7110_noc_bus_clk_disp_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_VOUT_TOP_CLK_HDMITX0_BCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dom_vout_top_clk_dom_vout_top_clk_hdmitx0_bclk", ++ "u0_i2stx_4ch_bclk", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_VOUT_TOP_U0_HDMI_TX_PIN_WS)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dom_vout_top_u0_hdmi_tx_pin_ws", ++ "u0_i2stx_4ch_lrck", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_VOUT_TOP_CLK_HDMIPHY_REF)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dom_vout_top_clk_dom_vout_top_clk_hdmiphy_ref", ++ "osc", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_VOUT_TOP_BIST_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dom_vout_top_clk_dom_vout_top_bist_pclk", ++ "bist_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_AXIMEM0_128B_CLK_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_aximem_128b_clk_axi", ++ "u0_WAVE511_clk_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_VDEC_INTSRAM_CLK_VDEC_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_vdec_intsram_clk_vdec_axi", ++ "u0_aximem_128b_clk_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK2_VDEC_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk2_vdec_axi", ++ "u0_sft7110_noc_bus_clk_vdec_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_AXIMEM1_128B_CLK_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_aximem_128b_clk_axi", ++ "u0_wave420l_clk_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_VENC_INTSRAM_CLK_VENC_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_venc_intsram_clk_venc_axi", ++ "u0_wave420l_clk_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK2_VENC_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk2_venc_axi", ++ "u0_sft7110_noc_bus_clk_venc_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SRAM_CLK_ROM)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_intmem_rom_sram_clk_rom", ++ "u2_aximem_128b_clk_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_NOC_BUS_CLK2_STG_AXI)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sft7110_noc_bus_clk2_stg_axi", ++ "u0_sft7110_noc_bus_clk_stg_axi", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_GMAC5_CLK_RMII)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_dw_gmac5_axi64_clk_rmii", ++ "gmac1_rmii_refin", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_AON_AHB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "aon_ahb", "stg_axiahb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SYS_CRG_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sys_crg_pclk", "apb12", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SYS_SYSCON_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sys_syscon_pclk", "apb12", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SPI0_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_ssp_spi_clk_core", "u0_ssp_spi_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SPI1_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_ssp_spi_clk_core", "u1_ssp_spi_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SPI2_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u2_ssp_spi_clk_core", "u2_ssp_spi_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SPI3_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u3_ssp_spi_clk_core", "u3_ssp_spi_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SPI4_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u4_ssp_spi_clk_core", "u4_ssp_spi_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SPI5_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u5_ssp_spi_clk_core", "u5_ssp_spi_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SPI6_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u6_ssp_spi_clk_core", "u6_ssp_spi_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2C0_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dw_i2c_clk_core", "u0_dw_i2c_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2C1_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_dw_i2c_clk_core", "u1_dw_i2c_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2C2_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u2_dw_i2c_clk_core", "u2_dw_i2c_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2C3_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u3_dw_i2c_clk_core", "u3_dw_i2c_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2C4_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u4_dw_i2c_clk_core", "u4_dw_i2c_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2C5_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u5_dw_i2c_clk_core", "u5_dw_i2c_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2C6_CLK_CORE)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u6_dw_i2c_clk_core", "u6_dw_i2c_clk_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2STX_BCLK_MST)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "i2stx_bclk_mst", "i2stx_4ch1_bclk_mst", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2STX_LRCK_MST)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "i2stx_lrck_mst", "i2stx_4ch1_lrck_mst", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2SRX_BCLK_MST)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "i2srx_bclk_mst", "i2srx_3ch_bclk_mst", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_I2SRX_LRCK_MST)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "i2srx_lrck_mst", "i2srx_3ch_lrck_mst", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PDM_CLK_DMIC0_BCLK_SLV)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_pdm_4mic_clk_dmic0_bclk_slv", ++ "u0_i2srx_3ch_bclk", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PDM_CLK_DMIC0_LRCK_SLV)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_pdm_4mic_clk_dmic0_lrck_slv", ++ "u0_i2srx_3ch_lrck", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PDM_CLK_DMIC1_BCLK_SLV)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_pdm_4mic_clk_dmic1_bclk_slv", ++ "u0_i2srx_3ch_bclk", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_PDM_CLK_DMIC1_LRCK_SLV)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_pdm_4mic_clk_dmic1_lrck_slv", ++ "u0_i2srx_3ch_lrck", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_TDM_CLK_MST)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "tdm_clk_mst", "ahb0", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_AHB2APB_CLK_AHB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_ahb2apb_clk_ahb", "tdm_internal", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_P2P_ASYNC_CLK_APBS)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_p2p_async_clk_apbs", "apb0", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_P2P_ASYNC_CLK_APBM)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u1_p2p_async_clk_apbm", "aon_apb", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_JTAG_DAISY_CHAIN_JTAG_TCK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_jtag_daisy_chain_JTAG_TCK", ++ "jtag_tck_inner", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_U7_DEBUG_SYSTEMJTAG_JTAG_TCK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_u7mc_sft7110_debug_systemjtag_jtag_TCK", ++ "u0_jtag_daisy_chain_jtag_tck_0", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_E2_DEBUG_SYSTEMJTAG_TCK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_e2_sft7110_debug_systemjtag_jtag_TCK", ++ "u0_jtag_daisy_chain_jtag_tck_1", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_JTAG_CERTIFICATION_TCK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_jtag_certification_tck", ++ "jtag_tck_inner", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_SEC_SKP_CLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_sec_top_skp_clk", ++ "u0_jtag_certification_trng_clk", 0, 1, 1); ++ priv->pll[PLL_OF(JH7110_U2_PCLK_MUX_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u2_pclk_mux_pclk", ++ "u2_pclk_mux_func_pclk", 0, 1, 1); ++ ++ ++ for (idx = 0; idx < JH7110_CLK_SYS_REG_END; idx++) { ++ u32 max = jh7110_clk_sys_data[idx].max; ++ struct clk_parent_data parents[4] = {}; ++ struct clk_init_data init = { ++ .name = jh7110_clk_sys_data[idx].name, ++ .ops = starfive_jh7110_clk_ops(max), ++ .parent_data = parents, ++ .num_parents = ((max & JH7110_CLK_MUX_MASK) >> ++ JH7110_CLK_MUX_SHIFT) + 1, ++ .flags = jh7110_clk_sys_data[idx].flags, ++ }; ++ struct jh7110_clk *clk = &priv->reg[idx]; ++ unsigned int i; ++ ++ for (i = 0; i < init.num_parents; i++) { ++ unsigned int pidx = jh7110_clk_sys_data[idx].parents[i]; ++ ++ if (pidx < JH7110_CLK_SYS_REG_END) ++ parents[i].hw = &priv->reg[pidx].hw; ++#ifdef CONFIG_CLK_STARFIVE_JH7110_PLL ++ else if ((pidx == JH7110_PLL0_OUT) || (pidx == JH7110_PLL2_OUT)) ++ parents[i].hw = &priv->pll_priv[PLL_OF(pidx)].hw; ++#endif ++ else if ((pidx < JH7110_CLK_SYS_END) && ++ (pidx > JH7110_CLK_SYS_REG_END)) ++ parents[i].hw = priv->pll[PLL_OF(pidx)]; ++ else if (pidx == JH7110_OSC) ++ parents[i].fw_name = "osc"; ++ else if (pidx == JH7110_GMAC1_RMII_REFIN) ++ parents[i].fw_name = "gmac1_rmii_refin"; ++ else if (pidx == JH7110_GMAC1_RGMII_RXIN) ++ parents[i].fw_name = "gmac1_rgmii_rxin"; ++ else if (pidx == JH7110_I2STX_BCLK_EXT) ++ parents[i].fw_name = "i2stx_bclk_ext"; ++ else if (pidx == JH7110_I2STX_LRCK_EXT) ++ parents[i].fw_name = "i2stx_lrck_ext"; ++ else if (pidx == JH7110_I2SRX_BCLK_EXT) ++ parents[i].fw_name = "i2srx_bclk_ext"; ++ else if (pidx == JH7110_I2SRX_LRCK_EXT) ++ parents[i].fw_name = "i2srx_lrck_ext"; ++ else if (pidx == JH7110_TDM_EXT) ++ parents[i].fw_name = "tdm_ext"; ++ else if (pidx == JH7110_MCLK_EXT) ++ parents[i].fw_name = "mclk_ext"; ++ else if (pidx == JH7110_JTAG_TCK_INNER) ++ parents[i].fw_name = "jtag_tclk_inner"; ++ else if (pidx == JH7110_BIST_APB) ++ parents[i].fw_name = "bist_apb"; ++ } ++ ++ clk->hw.init = &init; ++ clk->idx = idx; ++ clk->max_div = max & JH7110_CLK_DIV_MASK; ++ clk->reg_flags = JH7110_CLK_SYS_FLAG; ++ ++ ret = devm_clk_hw_register(priv->dev, &clk->hw); ++ if (ret) ++ return ret; ++ } ++ ++ dev_dbg(&pdev->dev, "starfive JH7110 clk_sys init successfully."); ++ return 0; ++} +diff --git a/drivers/clk/starfive/clk-starfive-jh7110-vout.c b/drivers/clk/starfive/clk-starfive-jh7110-vout.c +new file mode 100644 +index 000000000000..fbd26303126d +--- /dev/null ++++ b/drivers/clk/starfive/clk-starfive-jh7110-vout.c +@@ -0,0 +1,403 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * StarFive JH7110 vout Clock Driver ++ * ++ * Copyright (C) 2022 Xingyu Wu ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include "clk-starfive-jh7110.h" ++ ++/* external clocks */ ++#define JH7110_HDMITX0_PIXELCLK (JH7110_CLK_VOUT_END + 0) ++#define JH7110_MIPITX_DPHY_RXESC (JH7110_CLK_VOUT_END + 1) ++#define JH7110_MIPITX_DPHY_TXBYTEHS (JH7110_CLK_VOUT_END + 2) ++ ++struct vout_init_crg { ++ int num_clks; ++ struct clk_bulk_data *clks; ++ struct reset_control *rsts; ++}; ++ ++static const struct jh7110_clk_data jh7110_clk_vout_data[] __initconst = { ++ //divider ++ JH7110__DIV(JH7110_APB, "apb", 8, JH7110_DISP_AHB), ++ JH7110__DIV(JH7110_DC8200_PIX0, "dc8200_pix0", 63, JH7110_DISP_ROOT), ++ JH7110__DIV(JH7110_DSI_SYS, "dsi_sys", 31, JH7110_DISP_ROOT), ++ JH7110__DIV(JH7110_TX_ESC, "tx_esc", 31, JH7110_DISP_AHB), ++ //dc8200 ++ JH7110_GATE(JH7110_U0_DC8200_CLK_AXI, "u0_dc8200_clk_axi", ++ GATE_FLAG_NORMAL, JH7110_DISP_AXI), ++ JH7110_GATE(JH7110_U0_DC8200_CLK_CORE, "u0_dc8200_clk_core", ++ GATE_FLAG_NORMAL, JH7110_DISP_AXI), ++ JH7110_GATE(JH7110_U0_DC8200_CLK_AHB, "u0_dc8200_clk_ahb", ++ GATE_FLAG_NORMAL, JH7110_DISP_AHB), ++ JH7110_GMUX(JH7110_U0_DC8200_CLK_PIX0, "u0_dc8200_clk_pix0", ++ GATE_FLAG_NORMAL, PARENT_NUMS_2, ++ JH7110_DC8200_PIX0, ++ JH7110_HDMITX0_PIXELCLK), ++ JH7110_GMUX(JH7110_U0_DC8200_CLK_PIX1, "u0_dc8200_clk_pix1", ++ GATE_FLAG_NORMAL, PARENT_NUMS_2, ++ JH7110_DC8200_PIX0, ++ JH7110_HDMITX0_PIXELCLK), ++ ++ JH7110_GMUX(JH7110_DOM_VOUT_TOP_LCD_CLK, "dom_vout_top_lcd_clk", ++ GATE_FLAG_NORMAL, PARENT_NUMS_2, ++ JH7110_U0_DC8200_CLK_PIX0_OUT, ++ JH7110_U0_DC8200_CLK_PIX1_OUT), ++ //dsiTx ++ JH7110_GATE(JH7110_U0_CDNS_DSITX_CLK_APB, "u0_cdns_dsiTx_clk_apb", ++ GATE_FLAG_NORMAL, JH7110_DSI_SYS), ++ JH7110_GATE(JH7110_U0_CDNS_DSITX_CLK_SYS, "u0_cdns_dsiTx_clk_sys", ++ GATE_FLAG_NORMAL, JH7110_DSI_SYS), ++ JH7110_GMUX(JH7110_U0_CDNS_DSITX_CLK_DPI, "u0_cdns_dsiTx_clk_api", ++ GATE_FLAG_NORMAL, PARENT_NUMS_2, ++ JH7110_DC8200_PIX0, ++ JH7110_HDMITX0_PIXELCLK), ++ JH7110_GATE(JH7110_U0_CDNS_DSITX_CLK_TXESC, "u0_cdns_dsiTx_clk_txesc", ++ GATE_FLAG_NORMAL, JH7110_TX_ESC), ++ //mipitx DPHY ++ JH7110_GATE(JH7110_U0_MIPITX_DPHY_CLK_TXESC, "u0_mipitx_dphy_clk_txesc", ++ GATE_FLAG_NORMAL, JH7110_TX_ESC), ++ //hdmi ++ JH7110_GATE(JH7110_U0_HDMI_TX_CLK_MCLK, "u0_hdmi_tx_clk_mclk", ++ GATE_FLAG_NORMAL, JH7110_HDMITX0_MCLK), ++ JH7110_GATE(JH7110_U0_HDMI_TX_CLK_BCLK, "u0_hdmi_tx_clk_bclk", ++ GATE_FLAG_NORMAL, JH7110_HDMITX0_SCK), ++ JH7110_GATE(JH7110_U0_HDMI_TX_CLK_SYS, "u0_hdmi_tx_clk_sys", ++ GATE_FLAG_NORMAL, JH7110_DISP_APB), ++}; ++ ++static struct clk_bulk_data vout_top_clks[] = { ++ { .id = "vout_src" }, ++ { .id = "vout_top_ahb" }, ++}; ++ ++static int jh7110_vout_crg_get(struct device *dev, struct vout_init_crg *crg) ++{ ++ int ret; ++ ++ crg->rsts = devm_reset_control_array_get_shared(dev); ++ if (IS_ERR(crg->rsts)) { ++ dev_err(dev, "rst get failed\n"); ++ return PTR_ERR(crg->rsts); ++ } ++ ++ crg->clks = vout_top_clks; ++ crg->num_clks = ARRAY_SIZE(vout_top_clks); ++ ret = clk_bulk_get(dev, crg->num_clks, crg->clks); ++ if (ret) { ++ dev_err(dev, "clks get failed: %d\n", ret); ++ goto clks_get_failed; ++ } ++ ++ return 0; ++ ++clks_get_failed: ++ reset_control_assert(crg->rsts); ++ reset_control_put(crg->rsts); ++ ++ return ret; ++} ++ ++static int jh7110_vout_crg_enable(struct device *dev, struct vout_init_crg *crg, bool enable) ++{ ++ int ret; ++ ++ dev_dbg(dev, "jh7110_vout_crg_%sable\n", enable ? "en":"dis"); ++ ++ if (enable) { ++ ret = reset_control_deassert(crg->rsts); ++ if (ret) { ++ dev_err(dev, "rst deassert failed: %d\n", ret); ++ goto crg_failed; ++ } ++ ++ ret = clk_bulk_prepare_enable(crg->num_clks, crg->clks); ++ if (ret) { ++ dev_err(dev, "clks enable failed: %d\n", ret); ++ goto crg_failed; ++ } ++ } else { ++ clk_bulk_disable_unprepare(crg->num_clks, crg->clks); ++ } ++ ++ return 0; ++crg_failed: ++ return ret; ++} ++ ++#ifdef CONFIG_PM_SLEEP ++static int clk_vout_system_pm_suspend(struct device *dev) ++{ ++ return pm_runtime_force_suspend(dev); ++} ++ ++static int clk_vout_system_pm_resume(struct device *dev) ++{ ++ return pm_runtime_force_resume(dev); ++} ++#endif ++ ++#ifdef CONFIG_PM ++static int clk_vout_runtime_suspend(struct device *dev) ++{ ++ struct vout_init_crg *crg = dev_get_drvdata(dev); ++ ++ return jh7110_vout_crg_enable(dev, crg, false); ++} ++ ++static int clk_vout_runtime_resume(struct device *dev) ++{ ++ struct vout_init_crg *crg = dev_get_drvdata(dev); ++ ++ return jh7110_vout_crg_enable(dev, crg, true); ++} ++#endif ++ ++static const struct dev_pm_ops clk_vout_pm_ops = { ++ SET_RUNTIME_PM_OPS(clk_vout_runtime_suspend, clk_vout_runtime_resume, NULL) ++ SET_LATE_SYSTEM_SLEEP_PM_OPS(clk_vout_system_pm_suspend, clk_vout_system_pm_resume) ++}; ++ ++static struct clk_hw *jh7110_vout_clk_get(struct of_phandle_args *clkspec, ++ void *data) ++{ ++ struct jh7110_clk_priv *priv = data; ++ unsigned int idx = clkspec->args[0]; ++ ++ if (idx < JH7110_CLK_VOUT_REG_END) ++ return &priv->reg[idx].hw; ++ ++ if (idx < JH7110_CLK_VOUT_END) ++ return priv->pll[PLL_OFV(idx)]; ++ ++ return ERR_PTR(-EINVAL); ++} ++ ++static int __init clk_starfive_jh7110_vout_probe(struct platform_device *pdev) ++{ ++ struct jh7110_clk_priv *priv; ++ struct vout_init_crg *crg; ++ unsigned int idx; ++ int ret = 0; ++ ++ priv = devm_kzalloc(&pdev->dev, struct_size(priv, ++ reg, JH7110_DISP_ROOT), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ spin_lock_init(&priv->rmw_lock); ++ priv->dev = &pdev->dev; ++ priv->vout_base = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(priv->vout_base)) ++ return PTR_ERR(priv->vout_base); ++ ++ crg = devm_kzalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL); ++ if (!crg) ++ return -ENOMEM; ++ dev_set_drvdata(&pdev->dev, crg); ++ ++ ret = jh7110_vout_crg_get(&pdev->dev, crg); ++ if (ret) ++ goto init_failed; ++ ++ pm_runtime_use_autosuspend(&pdev->dev); ++ pm_runtime_set_autosuspend_delay(&pdev->dev, 50); ++ pm_runtime_enable(&pdev->dev); ++ ret = pm_runtime_get_sync(&pdev->dev); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "failed to get pm runtime: %d\n", ret); ++ goto init_failed; ++ } ++ ++ /*source*/ ++ priv->pll[PLL_OFV(JH7110_DISP_ROOT)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "disp_root", ++ "u0_dom_vout_top_clk_dom_vout_top_clk_vout_src", ++ 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_DISP_AXI)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "disp_axi", ++ "u0_dom_vout_top_clk_dom_vout_top_clk_vout_axi", ++ 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_DISP_AHB)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "disp_ahb", ++ "u0_dom_vout_top_clk_dom_vout_top_clk_vout_ahb", ++ 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_HDMI_PHY_REF)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "hdmi_phy_ref", ++ "u0_dom_vout_top_clk_dom_vout_top_clk_hdmiphy_ref", ++ 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_HDMITX0_MCLK)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "hdmitx0_mclk", ++ "u0_dom_vout_top_clk_dom_vout_top_clk_hdmitx0_mclk", ++ 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_HDMITX0_SCK)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "hdmitx0_sck", ++ "u0_dom_vout_top_clk_dom_vout_top_clk_hdmitx0_bclk", ++ 0, 1, 1); ++ ++ priv->pll[PLL_OFV(JH7110_MIPI_DPHY_REF)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "mipi_dphy_ref", ++ "u0_dom_vout_top_clk_dom_vout_top_clk_mipiphy_ref", ++ 0, 1, 1); ++ //divider ++ priv->pll[PLL_OFV(JH7110_U0_PCLK_MUX_BIST_PCLK)] = ++ clk_hw_register_fixed_factor( ++ priv->dev, "u0_pclk_mux_bist_pclk", ++ "u0_dom_vout_top_clk_dom_vout_top_bist_pclk", ++ 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_DISP_APB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "disp_apb", "u0_pclk_mux_func_pclk", 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_U0_PCLK_MUX_FUNC_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_pclk_mux_func_pclk", "apb", 0, 1, 1); ++ //bus ++ priv->pll[PLL_OFV(JH7110_U0_DOM_VOUT_CRG_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dom_vout_crg_pclk", "disp_apb", 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_U0_DOM_VOUT_SYSCON_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dom_vout_syscon_pclk", "disp_apb", 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_U0_SAIF_AMBA_DOM_VOUT_AHB_DEC_CLK_AHB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_saif_amba_dom_vout_ahb_dec_clk_ahb", ++ "disp_ahb", 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_U0_AHB2APB_CLK_AHB)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_ahb2apb_clk_ahb", "disp_ahb", 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_U0_P2P_ASYNC_CLK_APBS)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_p2p_async_clk_apbs", "disp_apb", 0, 1, 1); ++ //dsiTx ++ priv->pll[PLL_OFV(JH7110_U0_CDNS_DSITX_CLK_RXESC)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_cdns_dsiTx_clk_rxesc", ++ "mipitx_dphy_rxesc", 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_U0_CDNS_DSITX_CLK_TXBYTEHS)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_cdns_dsiTx_clk_txbytehs", ++ "mipitx_dphy_txbytehs", 0, 1, 1); ++ //mipitx DPHY ++ priv->pll[PLL_OFV(JH7110_U0_MIPITX_DPHY_CLK_SYS)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_mipitx_dphy_clk_sys", "disp_apb", 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_U0_MIPITX_DPHY_CLK_DPHY_REF)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_mipitx_dphy_clk_dphy_ref", ++ "mipi_dphy_ref", 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_U0_MIPITX_APBIF_PCLK)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_mipitx_apbif_pclk", "disp_apb", 0, 1, 1); ++ //hdmi ++ priv->pll[PLL_OFV(JH7110_HDMI_TX_CLK_REF)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_hdmi_tx_clk_ref", "hdmi_phy_ref", 0, 1, 1); ++ ++ priv->pll[PLL_OFV(JH7110_U0_DC8200_CLK_PIX0_OUT)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dc8200_clk_pix0_out", ++ "u0_dc8200_clk_pix0", 0, 1, 1); ++ priv->pll[PLL_OFV(JH7110_U0_DC8200_CLK_PIX1_OUT)] = ++ clk_hw_register_fixed_factor(priv->dev, ++ "u0_dc8200_clk_pix1_out", ++ "u0_dc8200_clk_pix1", 0, 1, 1); ++ ++ for (idx = 0; idx < JH7110_DISP_ROOT; idx++) { ++ u32 max = jh7110_clk_vout_data[idx].max; ++ struct clk_parent_data parents[2] = {}; ++ struct clk_init_data init = { ++ .name = jh7110_clk_vout_data[idx].name, ++ .ops = starfive_jh7110_clk_ops(max), ++ .parent_data = parents, ++ .num_parents = ((max & JH7110_CLK_MUX_MASK) >> ++ JH7110_CLK_MUX_SHIFT) + 1, ++ .flags = jh7110_clk_vout_data[idx].flags, ++ }; ++ struct jh7110_clk *clk = &priv->reg[idx]; ++ unsigned int i; ++ ++ for (i = 0; i < init.num_parents; i++) { ++ unsigned int pidx = jh7110_clk_vout_data[idx].parents[i]; ++ ++ if (pidx < JH7110_DISP_ROOT) ++ parents[i].hw = &priv->reg[pidx].hw; ++ else if (pidx < JH7110_CLK_VOUT_END) ++ parents[i].hw = priv->pll[PLL_OFV(pidx)]; ++ else if (pidx == JH7110_HDMITX0_PIXELCLK) ++ parents[i].fw_name = "hdmitx0_pixelclk"; ++ else if (pidx == JH7110_MIPITX_DPHY_RXESC) ++ parents[i].fw_name = "mipitx_dphy_rxesc"; ++ else if (pidx == JH7110_MIPITX_DPHY_TXBYTEHS) ++ parents[i].fw_name = "mipitx_dphy_txbytehs"; ++ else if (pidx == JH7110_U0_DC8200_CLK_PIX0_OUT) ++ parents[i].fw_name = "u0_dc8200_clk_pix0_out"; ++ else if (pidx == JH7110_U0_DC8200_CLK_PIX1_OUT) ++ parents[i].fw_name = "u0_dc8200_clk_pix1_out"; ++ } ++ ++ clk->hw.init = &init; ++ clk->idx = idx; ++ clk->max_div = max & JH7110_CLK_DIV_MASK; ++ clk->reg_flags = JH7110_CLK_VOUT_FLAG; ++ ++ ret = devm_clk_hw_register(priv->dev, &clk->hw); ++ if (ret) ++ return ret; ++ } ++ ++ ret = devm_of_clk_add_hw_provider(priv->dev, jh7110_vout_clk_get, priv); ++ if (ret) ++ return ret; ++ ++ pm_runtime_put_sync(&pdev->dev); ++ ++ dev_info(&pdev->dev, "starfive JH7110 clk_vout init successfully."); ++ return 0; ++ ++init_failed: ++ return ret; ++ ++} ++ ++static const struct of_device_id clk_starfive_jh7110_vout_match[] = { ++ {.compatible = "starfive,jh7110-clk-vout" }, ++ { } ++}; ++ ++static struct platform_driver clk_starfive_jh7110_vout_driver = { ++ .probe = clk_starfive_jh7110_vout_probe, ++ .driver = { ++ .name = "clk-starfive-jh7110-vout", ++ .of_match_table = clk_starfive_jh7110_vout_match, ++ .pm = &clk_vout_pm_ops, ++ }, ++}; ++module_platform_driver(clk_starfive_jh7110_vout_driver); ++ ++MODULE_AUTHOR("Xingyu Wu "); ++MODULE_DESCRIPTION("StarFive JH7110 vout clock driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/clk/starfive/clk-starfive-jh7110.h b/drivers/clk/starfive/clk-starfive-jh7110.h +new file mode 100644 +index 000000000000..e394d220bdf1 +--- /dev/null ++++ b/drivers/clk/starfive/clk-starfive-jh7110.h +@@ -0,0 +1,157 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * StarFive JH7110 Clock Generator Driver ++ * ++ * Copyright (C) 2022 Xingyu Wu ++ */ ++ ++#ifndef _CLK_STARFIVE_JH7110_H_ ++#define _CLK_STARFIVE_JH7110_H_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include "clk-starfive-jh7110-pll.h" ++ ++/* register flags */ ++#define JH7110_CLK_SYS_FLAG 1 ++#define JH7110_CLK_STG_FLAG 2 ++#define JH7110_CLK_AON_FLAG 3 ++#define JH7110_CLK_VOUT_FLAG 4 ++#define JH7110_CLK_ISP_FLAG 5 ++ ++/* register fields */ ++#define JH7110_CLK_ENABLE BIT(31) ++#define JH7110_CLK_INVERT BIT(30) ++#define JH7110_CLK_MUX_MASK GENMASK(29, 24) ++#define JH7110_CLK_MUX_SHIFT 24 ++#define JH7110_CLK_DIV_MASK GENMASK(23, 0) ++ ++/* clkgen PLL CLOCK offset */ ++#define PLL_OF(x) (x - JH7110_CLK_REG_END) ++/* vout PLL CLOCK offset */ ++#define PLL_OFV(x) (x - JH7110_CLK_VOUT_REG_END) ++/* isp PLL CLOCK offset */ ++#define PLL_OFI(x) (x - JH7110_CLK_ISP_REG_END) ++ ++#define GATE_FLAG_NORMAL 0 ++ ++enum { ++ PARENT_NUMS_1 = 1, ++ PARENT_NUMS_2, ++ PARENT_NUMS_3, ++ PARENT_NUMS_4, ++}; ++ ++/* clock data */ ++struct jh7110_clk_data { ++ const char *name; ++ unsigned long flags; ++ u32 max; ++ u16 parents[4]; ++}; ++ ++struct jh7110_clk { ++ struct clk_hw hw; ++ unsigned int idx; ++ unsigned int max_div; ++ unsigned int reg_flags; ++ u32 saved_reg_value; ++}; ++ ++struct jh7110_clk_priv { ++ /* protect clk enable and set rate/parent from happening at the same time */ ++ spinlock_t rmw_lock; ++ struct device *dev; ++ void __iomem *sys_base; ++ void __iomem *stg_base; ++ void __iomem *aon_base; ++ void __iomem *vout_base; ++ void __iomem *isp_base; ++ struct clk_hw *pll[PLL_OF(JH7110_CLK_END)]; ++#ifdef CONFIG_CLK_STARFIVE_JH7110_PLL ++ struct jh7110_clk_pll_data pll_priv[PLL_INDEX_MAX]; ++#endif ++ struct jh7110_clk reg[]; ++}; ++ ++#define JH7110_GATE(_idx, _name, _flags, _parent)\ ++[_idx] = {\ ++ .name = _name,\ ++ .flags = CLK_SET_RATE_PARENT | (_flags),\ ++ .max = JH7110_CLK_ENABLE,\ ++ .parents = { [0] = _parent },\ ++} ++ ++#define JH7110__DIV(_idx, _name, _max, _parent)\ ++[_idx] = {\ ++ .name = _name,\ ++ .flags = 0,\ ++ .max = _max,\ ++ .parents = { [0] = _parent },\ ++} ++ ++#define JH7110_GDIV(_idx, _name, _flags, _max, _parent)\ ++[_idx] = {\ ++ .name = _name,\ ++ .flags = _flags,\ ++ .max = JH7110_CLK_ENABLE | (_max),\ ++ .parents = { [0] = _parent },\ ++} ++ ++#define JH7110__MUX(_idx, _name, _nparents, ...)\ ++[_idx] = {\ ++ .name = _name,\ ++ .flags = 0,\ ++ .max = ((_nparents) - 1) << JH7110_CLK_MUX_SHIFT,\ ++ .parents = { __VA_ARGS__ },\ ++} ++ ++#define JH7110_GMUX(_idx, _name, _flags, _nparents, ...)\ ++[_idx] = {\ ++ .name = _name,\ ++ .flags = _flags,\ ++ .max = JH7110_CLK_ENABLE |\ ++ (((_nparents) - 1) << JH7110_CLK_MUX_SHIFT),\ ++ .parents = { __VA_ARGS__ },\ ++} ++ ++#define JH7110_MDIV(_idx, _name, _max, _nparents, ...)\ ++[_idx] = {\ ++ .name = _name,\ ++ .flags = 0,\ ++ .max = (((_nparents) - 1) << JH7110_CLK_MUX_SHIFT) | (_max),\ ++ .parents = { __VA_ARGS__ },\ ++} ++ ++#define JH7110__GMD(_idx, _name, _flags, _max, _nparents, ...)\ ++[_idx] = {\ ++ .name = _name,\ ++ .flags = _flags,\ ++ .max = JH7110_CLK_ENABLE |\ ++ (((_nparents) - 1) << JH7110_CLK_MUX_SHIFT) | (_max),\ ++ .parents = { __VA_ARGS__ },\ ++} ++ ++#define JH7110__INV(_idx, _name, _parent)\ ++[_idx] = {\ ++ .name = _name,\ ++ .flags = CLK_SET_RATE_PARENT,\ ++ .max = JH7110_CLK_INVERT,\ ++ .parents = { [0] = _parent },\ ++} ++ ++void __iomem *jh7110_clk_reg_addr_get(struct jh7110_clk *clk); ++const struct clk_ops *starfive_jh7110_clk_ops(u32 max); ++ ++int __init clk_starfive_jh7110_sys_init(struct platform_device *pdev, ++ struct jh7110_clk_priv *priv); ++int __init clk_starfive_jh7110_stg_init(struct platform_device *pdev, ++ struct jh7110_clk_priv *priv); ++int __init clk_starfive_jh7110_aon_init(struct platform_device *pdev, ++ struct jh7110_clk_priv *priv); ++ ++#endif +diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig +index a0c6e88bebe0..d7fe3d11174c 100644 +--- a/drivers/clocksource/Kconfig ++++ b/drivers/clocksource/Kconfig +@@ -664,6 +664,17 @@ config RISCV_TIMER + is accessed via both the SBI and the rdcycle instruction. This is + required for all RISC-V systems. + ++config STARFIVE_TIMER ++ bool "Timer for the STARFIVE SOCS" ++ depends on RISCV && OF ++ select TIMER_OF ++ select CLKSRC_MMIO ++ help ++ This enables the starfive timers for SoCs. On RISC-V platform, ++ the system has started RISCV_TIMER. But you can also use these timers ++ to do a lot more on StarFive Soc. These timers can provide much ++ higher precision than RISCV_TIMER. ++ + config CLINT_TIMER + bool "CLINT Timer for the RISC-V platform" if COMPILE_TEST + depends on GENERIC_SCHED_CLOCK && RISCV +diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile +index 1c444cc3bb44..0e5671016356 100644 +--- a/drivers/clocksource/Makefile ++++ b/drivers/clocksource/Makefile +@@ -94,3 +94,4 @@ obj-$(CONFIG_CSKY_MP_TIMER) += timer-mp-csky.o + obj-$(CONFIG_GX6605S_TIMER) += timer-gx6605s.o + obj-$(CONFIG_HYPERV_TIMER) += hyperv_timer.o + obj-$(CONFIG_MICROCHIP_PIT64B) += timer-microchip-pit64b.o ++obj-$(CONFIG_STARFIVE_TIMER) += timer-starfive.o +diff --git a/drivers/clocksource/timer-starfive.c b/drivers/clocksource/timer-starfive.c +new file mode 100644 +index 000000000000..46003d13fa1d +--- /dev/null ++++ b/drivers/clocksource/timer-starfive.c +@@ -0,0 +1,531 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Starfive Timer driver ++ * ++ * Copyright 2021 StarFive, Inc. All rights reserved. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "timer-starfive.h" ++ ++#define CLOCK_SOURCE_RATE 200 ++#define VALID_BITS 32 ++#define DELAY_US 0 ++#define TIMEOUT_US 10000 ++#define CLOCKEVENT_RATING 300 ++#define MAX_TICKS 0xffffffff ++#define MIN_TICKS 0xf ++ ++struct starfive_timer __initdata jh7110_starfive_timer = { ++ .ctrl = STF_TIMER_CTL, ++ .load = STF_TIMER_LOAD, ++ .enable = STF_TIMER_ENABLE, ++ .reload = STF_TIMER_RELOAD, ++ .value = STF_TIMER_VALUE, ++ .intclr = STF_TIMER_INT_CLR, ++ .intmask = STF_TIMER_INT_MASK, ++ .timer_base = {TIMER_BASE(0), TIMER_BASE(1), TIMER_BASE(2), ++ TIMER_BASE(3), TIMER_BASE(4), TIMER_BASE(5), ++ TIMER_BASE(6), TIMER_BASE(7)}, ++}; ++ ++struct starfive_timer_misc_count sfcmisc = { ++ .clk_count = 0, ++ .flg_init_clk = false, ++}; ++ ++static inline struct starfive_clkevt * ++to_starfive_clkevt(struct clock_event_device *evt) ++{ ++ return container_of(evt, struct starfive_clkevt, evt); ++} ++ ++static inline struct starfive_clkevt * ++to_starfive_clksrc(struct clocksource *cs) ++{ ++ return container_of(cs, struct starfive_clkevt, cs); ++} ++ ++static inline void timer_set_mod(struct starfive_clkevt *clkevt, int mod) ++{ ++ writel(mod, clkevt->ctrl); ++} ++ ++/* ++ * After disable timer, then enable, the timer will start ++ * from the reload count value(0x08[31:0]). ++ */ ++static inline void timer_int_enable(struct starfive_clkevt *clkevt) ++{ ++ writel(INTMASK_ENABLE_DIS, clkevt->intmask); ++} ++ ++static inline void timer_int_disable(struct starfive_clkevt *clkevt) ++{ ++ writel(INTMASK_ENABLE, clkevt->intmask); ++} ++ ++static inline void timer_int_clear(struct starfive_clkevt *clkevt) ++{ ++ /* waiting interrupt can be to clearing */ ++ u32 value; ++ int ret = 0; ++ ++ value = readl(clkevt->intclr); ++ ret = readl_poll_timeout_atomic(clkevt->intclr, value, ++ !(value & INT_STATUS_CLR_AVA), DELAY_US, TIMEOUT_US); ++ if (!ret) ++ writel(1, clkevt->intclr); ++} ++ ++/* ++ * The initial value to be loaded into the ++ * counter and is also used as the reload value. ++ */ ++static inline void timer_set_val(struct starfive_clkevt *clkevt, u32 val) ++{ ++ writel(val, clkevt->load); ++} ++ ++static inline u32 timer_get_val(struct starfive_clkevt *clkevt) ++{ ++ return readl(clkevt->value); ++} ++ ++static inline u32 timer_get_load_val(struct starfive_clkevt *clkevt) ++{ ++ return readl(clkevt->load); ++} ++ ++/* ++ * Write RELOAD register to reload preset value to counter. ++ * (Write 0 and write 1 are both ok) ++ */ ++static inline void ++timer_set_reload(struct starfive_clkevt *clkevt) ++{ ++ writel(1, clkevt->reload); ++} ++ ++static inline void timer_enable(struct starfive_clkevt *clkevt) ++{ ++ writel(TIMER_ENA, clkevt->enable); ++} ++ ++static inline void timer_disable(struct starfive_clkevt *clkevt) ++{ ++ writel(TIMER_ENA_DIS, clkevt->enable); ++} ++ ++static void timer_shutdown(struct starfive_clkevt *clkevt) ++{ ++ timer_int_disable(clkevt); ++ timer_disable(clkevt); ++} ++ ++#ifdef CONFIG_PM_SLEEP ++ ++static void starfive_timer_suspend(struct clocksource *cs) ++{ ++ struct starfive_clkevt *clkevt; ++ struct clk *pclk; ++ ++ clkevt = to_starfive_clksrc(cs); ++ ++ clkevt->reload_val = timer_get_load_val(clkevt); ++ timer_disable(clkevt); ++ timer_int_disable(clkevt); ++ ++ clkevt->misc->clk_count--; ++ ++ if (clkevt->misc->clk_count < 1) ++ pclk = of_clk_get_by_name(clkevt->device_node, "apb_clk"); ++ ++ if (!clkevt->misc->flg_init_clk) { ++ const char *name = NULL; ++ ++ of_property_read_string_index(clkevt->device_node, ++ "clock-names", clkevt->index, &name); ++ clkevt->clk = of_clk_get_by_name(clkevt->device_node, name); ++ clk_prepare_enable(clkevt->clk); ++ clk_disable_unprepare(clkevt->clk); ++ ++ if (clkevt->misc->clk_count < 1) { ++ clk_prepare_enable(pclk); ++ clk_disable_unprepare(pclk); ++ } ++ } else { ++ clk_disable_unprepare(clkevt->clk); ++ ++ if (clkevt->misc->clk_count < 1) ++ clk_disable_unprepare(pclk); ++ } ++} ++ ++static void starfive_timer_resume(struct clocksource *cs) ++{ ++ struct starfive_clkevt *clkevt; ++ ++ clkevt = to_starfive_clksrc(cs); ++ ++ clkevt->misc->flg_init_clk = true; ++ ++ if (clkevt->misc->clk_count < 1) { ++ struct clk *pclk; ++ ++ pclk = of_clk_get_by_name(clkevt->device_node, "apb_clk"); ++ clk_prepare_enable(pclk); ++ } ++ clk_prepare_enable(clkevt->clk); ++ clkevt->misc->clk_count++; ++ ++ timer_set_val(clkevt, clkevt->reload_val); ++ timer_set_reload(clkevt); ++ timer_int_enable(clkevt); ++ timer_enable(clkevt); ++} ++ ++#endif /*CONIFG PM SLEEP*/ ++ ++static int starfive_timer_shutdown(struct clock_event_device *evt) ++{ ++ struct starfive_clkevt *clkevt; ++ ++ clkevt = to_starfive_clkevt(evt); ++ timer_shutdown(clkevt); ++ ++ return 0; ++} ++ ++static int ++starfive_get_clock_rate(struct starfive_clkevt *clkevt, struct device_node *np) ++{ ++ int ret; ++ u32 rate; ++ ++ if (clkevt->clk) { ++ clkevt->rate = clk_get_rate(clkevt->clk); ++ if (clkevt->rate > 0) { ++ pr_debug("clk_get_rate clkevt->rate: %lld\n", ++ clkevt->rate); ++ return 0; ++ } ++ } ++ ++ /* Next we try to get clock-frequency from dts.*/ ++ ret = of_property_read_u32(np, "clock-frequency", &rate); ++ if (!ret) { ++ pr_debug("Timer: try get clock-frequency:%d MHz\n", rate); ++ clkevt->rate = (u64)rate; ++ return 0; ++ } ++ pr_err("Timer: get rate failed, need clock-frequency define in dts.\n"); ++ ++ return -ENOENT; ++} ++ ++static u64 starfive_clocksource_mmio_readl_down(struct clocksource *c) ++{ ++ return ~(u64)readl_relaxed(to_starfive_clksrc(c)->value) & c->mask; ++} ++ ++static int starfive_clocksource_init(struct starfive_clkevt *clkevt, ++ const char *name, struct device_node *np) ++{ ++ ++ if (VALID_BITS > 64 || VALID_BITS < 16) ++ return -EINVAL; ++ ++ clkevt->cs.name = name; ++ clkevt->cs.rating = CLOCK_SOURCE_RATE; ++ clkevt->cs.read = starfive_clocksource_mmio_readl_down; ++ clkevt->cs.mask = CLOCKSOURCE_MASK(VALID_BITS); ++ clkevt->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS; ++ clkevt->cs.suspend = starfive_timer_suspend; ++ clkevt->cs.resume = starfive_timer_resume; ++ ++ timer_set_mod(clkevt, MOD_CONTIN); ++ timer_set_val(clkevt, MAX_TICKS); /* val = rate --> 1s */ ++ timer_int_disable(clkevt); ++ timer_int_clear(clkevt); ++ timer_int_enable(clkevt); ++ timer_enable(clkevt); ++ ++ clocksource_register_hz(&clkevt->cs, clkevt->rate); ++ ++ return 0; ++} ++ ++/* ++ * IRQ handler for the timer ++ */ ++static irqreturn_t starfive_timer_interrupt(int irq, void *priv) ++{ ++ struct clock_event_device *evt = (struct clock_event_device *)priv; ++ struct starfive_clkevt *clkevt = to_starfive_clkevt(evt); ++ ++ timer_int_clear(clkevt); ++ if (evt->event_handler) ++ evt->event_handler(evt); ++ ++ return IRQ_HANDLED; ++} ++ ++static int starfive_timer_set_periodic(struct clock_event_device *evt) ++{ ++ struct starfive_clkevt *clkevt; ++ ++ clkevt = to_starfive_clkevt(evt); ++ ++ timer_disable(clkevt); ++ timer_set_mod(clkevt, MOD_CONTIN); ++ timer_set_val(clkevt, clkevt->periodic); ++ timer_int_disable(clkevt); ++ timer_int_clear(clkevt); ++ timer_int_enable(clkevt); ++ timer_enable(clkevt); ++ ++ return 0; ++} ++ ++static int starfive_timer_set_oneshot(struct clock_event_device *evt) ++{ ++ struct starfive_clkevt *clkevt; ++ ++ clkevt = to_starfive_clkevt(evt); ++ ++ timer_disable(clkevt); ++ timer_set_mod(clkevt, MOD_SINGLE); ++ timer_set_val(clkevt, MAX_TICKS); ++ timer_int_disable(clkevt); ++ timer_int_clear(clkevt); ++ timer_int_enable(clkevt); ++ timer_enable(clkevt); ++ ++ return 0; ++} ++ ++static int starfive_timer_set_next_event(unsigned long next, ++ struct clock_event_device *evt) ++{ ++ struct starfive_clkevt *clkevt; ++ ++ clkevt = to_starfive_clkevt(evt); ++ ++ timer_disable(clkevt); ++ timer_set_mod(clkevt, MOD_SINGLE); ++ timer_set_val(clkevt, next); ++ timer_enable(clkevt); ++ ++ return 0; ++} ++ ++static void starfive_set_clockevent(struct clock_event_device *evt) ++{ ++ evt->features = CLOCK_EVT_FEAT_PERIODIC | ++ CLOCK_EVT_FEAT_ONESHOT | ++ CLOCK_EVT_FEAT_DYNIRQ; ++ evt->set_state_shutdown = starfive_timer_shutdown; ++ evt->set_state_periodic = starfive_timer_set_periodic; ++ evt->set_state_oneshot = starfive_timer_set_oneshot; ++ evt->set_state_oneshot_stopped = starfive_timer_shutdown; ++ evt->set_next_event = starfive_timer_set_next_event; ++ evt->rating = CLOCKEVENT_RATING; ++} ++ ++static int starfive_clockevents_register(struct starfive_clkevt *clkevt, unsigned int irq, ++ struct device_node *np, const char *name) ++{ ++ int ret = 0; ++ ++ ret = starfive_get_clock_rate(clkevt, np); ++ if (ret) ++ return -EINVAL; ++ ++ clkevt->periodic = DIV_ROUND_CLOSEST(clkevt->rate, HZ); ++ ++ starfive_set_clockevent(&clkevt->evt); ++ clkevt->evt.name = name; ++ clkevt->evt.irq = irq; ++ clkevt->evt.cpumask = cpu_possible_mask; ++ ++ ret = request_irq(irq, starfive_timer_interrupt, ++ IRQF_TIMER | IRQF_IRQPOLL, name, &clkevt->evt); ++ if (ret) ++ pr_err("%s: request_irq failed\n", name); ++ ++ clockevents_config_and_register(&clkevt->evt, clkevt->rate, ++ MIN_TICKS, MAX_TICKS); ++ ++ return ret; ++} ++ ++static void __init starfive_clkevt_init(struct starfive_timer *timer, ++ struct starfive_clkevt *clkevt, ++ void __iomem *base, int index) ++{ ++ void __iomem *timer_base; ++ ++ timer_base = base + timer->timer_base[index]; ++ clkevt->base = timer_base; ++ clkevt->ctrl = timer_base + timer->ctrl; ++ clkevt->load = timer_base + timer->load; ++ clkevt->enable = timer_base + timer->enable; ++ clkevt->reload = timer_base + timer->reload; ++ clkevt->value = timer_base + timer->value; ++ clkevt->intclr = timer_base + timer->intclr; ++ clkevt->intmask = timer_base + timer->intmask; ++} ++ ++static int __init do_starfive_timer_of_init(struct device_node *np, ++ struct starfive_timer *timer) ++{ ++ int index, count, irq, ret = -EINVAL; ++ const char *name = NULL; ++ struct clk *clk; ++ struct clk *pclk; ++ struct reset_control *prst; ++ struct reset_control *rst; ++ struct starfive_clkevt *clkevt[4]; ++ void __iomem *base; ++ ++ base = of_iomap(np, 0); ++ if (!base) ++ return -ENXIO; ++ ++ if (!of_device_is_available(np)) { ++ ret = -EINVAL; ++ goto err; ++ } ++ ++ pclk = of_clk_get_by_name(np, "apb_clk"); ++ if (!IS_ERR(pclk)) ++ if (clk_prepare_enable(pclk)) ++ pr_warn("pclk for %pOFn is present," ++ "but could not be activated\n", np); ++ ++ prst = of_reset_control_get(np, "apb_rst"); ++ if (!IS_ERR(prst)) { ++ reset_control_assert(prst); ++ reset_control_deassert(prst); ++ } ++ ++ count = of_irq_count(np); ++ if (count > NR_TIMERS || count <= 0) { ++ ret = -EINVAL; ++ goto count_err; ++ } ++ ++ for (index = 0; index < count; index++) { ++ /* one of timer is wdog-timer, skip...*/ ++ of_property_read_string_index(np, "clock-names", index, &name); ++ if (strncmp(name, "timer", strlen("timer"))) ++ continue; ++ ++ clkevt[index] = kzalloc(sizeof(*clkevt[index]), GFP_KERNEL); ++ if (!clkevt[index]) { ++ ret = -ENOMEM; ++ goto clkevt_err; ++ } ++ clkevt[index]->device_node = np; ++ clkevt[index]->index = index; ++ clkevt[index]->misc = &sfcmisc; ++ ++ starfive_clkevt_init(timer, clkevt[index], base, index); ++ ++ /* Ensure timers are disabled */ ++ timer_disable(clkevt[index]); ++ ++ clk = of_clk_get_by_name(np, name); ++ if (!IS_ERR(clk)) { ++ clkevt[index]->clk = clk; ++ ++ if (clk_prepare_enable(clk)) { ++ pr_warn("clk for %pOFn is present," ++ "but could not be activated\n", np); ++ } ++ } ++ ++ clkevt[index]->misc->clk_count++; ++ ++ rst = of_reset_control_get(np, name); ++ if (!IS_ERR(rst)) { ++ reset_control_assert(rst); ++ reset_control_deassert(rst); ++ } ++ ++ irq = irq_of_parse_and_map(np, index); ++ if (irq < 0) { ++ ret = -EINVAL; ++ goto irq_err; ++ } ++ ++ snprintf(clkevt[index]->name, sizeof(clkevt[index]->name), "%s.ch%d", ++ np->full_name, index); ++ ++ ret = starfive_clockevents_register(clkevt[index], irq, np, clkevt[index]->name); ++ if (ret) { ++ pr_err("%s: init clockevents failed.\n", clkevt[index]->name); ++ goto register_err; ++ } ++ clkevt[index]->irq = irq; ++ ++ ret = starfive_clocksource_init(clkevt[index], clkevt[index]->name, np); ++ if (ret) ++ goto init_err; ++ } ++ if (!IS_ERR(pclk)) ++ clk_put(pclk); ++ ++ return 0; ++ ++init_err: ++register_err: ++ free_irq(clkevt[index]->irq, &clkevt[index]->evt); ++irq_err: ++ if (!rst) { ++ reset_control_assert(rst); ++ reset_control_put(rst); ++ } ++ if (!clkevt[index]->clk) { ++ clk_disable_unprepare(clkevt[index]->clk); ++ clk_put(clkevt[index]->clk); ++ } ++ kfree(clkevt[index]); ++clkevt_err: ++count_err: ++ if (!IS_ERR(pclk)) { ++ if (!index) ++ clk_disable_unprepare(pclk); ++ clk_put(pclk); ++ } ++err: ++ iounmap(base); ++ return ret; ++} ++ ++static int __init starfive_timer_of_init(struct device_node *np) ++{ ++ return do_starfive_timer_of_init(np, &jh7110_starfive_timer); ++} ++TIMER_OF_DECLARE(starfive_timer, "starfive,jh7110-timers", starfive_timer_of_init); ++ ++MODULE_AUTHOR("xingyu.wu "); ++MODULE_AUTHOR("samin.guo "); ++MODULE_DESCRIPTION("StarFive Timer Device Driver"); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/clocksource/timer-starfive.h b/drivers/clocksource/timer-starfive.h +new file mode 100644 +index 000000000000..f2ccc07d0e22 +--- /dev/null ++++ b/drivers/clocksource/timer-starfive.h +@@ -0,0 +1,110 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright 2021 StarFive, Inc ++ * ++ * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING ++ * CUSTOMERS WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER ++ * FOR THEM TO SAVE TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE ++ * FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY ++ * CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE ++ * BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION ++ * WITH THEIR PRODUCTS. ++ */ ++#ifndef STARFIVE_TIMER_H ++#define STARFIVE_TIMER_H ++ ++#define NR_TIMERS TIMERS_MAX ++#define PER_TIMER_LEN 0x40 ++#define TIMER_BASE(x) ((TIMER_##x)*PER_TIMER_LEN) ++ ++/* ++ * JH7100 timwer TIMER_INT_STATUS: ++ * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ * | Bits | 08~31 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | ++ * ---------------------------------------------------------- ++ * | timer(n)_int | res | 6 | 5 | 4 | Wdt | 3 | 2 | 1 | 0 | ++ * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++ * ++ * Software can read this register to know which interrupt is occurred. ++ */ ++#define STF_TIMER_INT_STATUS 0x00 ++#define STF_TIMER_CTL 0x04 ++#define STF_TIMER_LOAD 0x08 ++#define STF_TIMER_ENABLE 0x10 ++#define STF_TIMER_RELOAD 0x14 ++#define STF_TIMER_VALUE 0x18 ++#define STF_TIMER_INT_CLR 0x20 ++#define STF_TIMER_INT_MASK 0x24 ++#define INT_STATUS_CLR_AVA BIT(1) ++ ++enum STF_TIMERS { ++ TIMER_0 = 0, ++ TIMER_1, ++ TIMER_2, ++ TIMER_3, ++ TIMER_4, /*WDT*/ ++ TIMER_5, ++ TIMER_6, ++ TIMER_7, ++ TIMERS_MAX ++}; ++ ++enum TIMERI_INTMASK { ++ INTMASK_ENABLE_DIS = 0, ++ INTMASK_ENABLE = 1 ++}; ++ ++enum TIMER_MOD { ++ MOD_CONTIN = 0, ++ MOD_SINGLE = 1 ++}; ++ ++enum TIMER_CTL_EN { ++ TIMER_ENA_DIS = 0, ++ TIMER_ENA = 1 ++}; ++ ++enum { ++ INT_CLR_AVAILABLE = 0, ++ INT_CLR_NOT_AVAILABLE = 1 ++}; ++ ++struct starfive_timer { ++ u32 ctrl; ++ u32 load; ++ u32 enable; ++ u32 reload; ++ u32 value; ++ u32 intclr; ++ u32 intmask; ++ u32 wdt_lock; /* 0x3c+i*0x40 watchdog use ONLY */ ++ u32 timer_base[NR_TIMERS]; ++}; ++ ++struct starfive_timer_misc_count { ++ u8 clk_count; ++ bool flg_init_clk; ++}; ++ ++struct starfive_clkevt { ++ struct clock_event_device evt; ++ struct clocksource cs; ++ struct device_node *device_node; ++ struct starfive_timer_misc_count *misc; ++ struct clk *clk; ++ char name[20]; ++ int index; ++ int irq; ++ u64 periodic; ++ u64 rate; ++ u32 reload_val; ++ void __iomem *base; ++ void __iomem *ctrl; ++ void __iomem *load; ++ void __iomem *enable; ++ void __iomem *reload; ++ void __iomem *value; ++ void __iomem *intclr; ++ void __iomem *intmask; ++}; ++#endif /* STARFIVE_TIMER_H */ +diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile +index 7c762e105146..7b096ab3fabd 100644 +--- a/drivers/cpufreq/Makefile ++++ b/drivers/cpufreq/Makefile +@@ -100,6 +100,10 @@ obj-$(CONFIG_CPU_FREQ_PMAC64) += pmac64-cpufreq.o + obj-$(CONFIG_PPC_PASEMI_CPUFREQ) += pasemi-cpufreq.o + obj-$(CONFIG_POWERNV_CPUFREQ) += powernv-cpufreq.o + ++################################################################################## ++# Riscv platform drivers ++obj-$(CONFIG_RISCV_STARFIVE_CPUFREQ) += starfive-cpufreq.o ++ + ################################################################################## + # Other platform drivers + obj-$(CONFIG_BMIPS_CPUFREQ) += bmips-cpufreq.o +diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c +index a3734014db47..9faff7ffeaed 100644 +--- a/drivers/cpufreq/cpufreq-dt-platdev.c ++++ b/drivers/cpufreq/cpufreq-dt-platdev.c +@@ -92,6 +92,7 @@ static const struct of_device_id whitelist[] __initconst = { + + { .compatible = "xlnx,zynq-7000", }, + { .compatible = "xlnx,zynqmp", }, ++ { .compatible = "starfive,jh7110", }, + + { } + }; +diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig +index ff5e85eefbf6..1445b863a4e3 100644 +--- a/drivers/crypto/Kconfig ++++ b/drivers/crypto/Kconfig +@@ -882,6 +882,8 @@ config CRYPTO_DEV_CCREE + + source "drivers/crypto/hisilicon/Kconfig" + ++source "drivers/crypto/starfive/Kconfig" ++ + source "drivers/crypto/amlogic/Kconfig" + + config CRYPTO_DEV_SA2UL +diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile +index 53fc115cf459..9dfac445df93 100644 +--- a/drivers/crypto/Makefile ++++ b/drivers/crypto/Makefile +@@ -49,5 +49,6 @@ obj-$(CONFIG_CRYPTO_DEV_BCM_SPU) += bcm/ + obj-$(CONFIG_CRYPTO_DEV_SAFEXCEL) += inside-secure/ + obj-$(CONFIG_CRYPTO_DEV_ARTPEC6) += axis/ + obj-$(CONFIG_CRYPTO_DEV_ZYNQMP_AES) += xilinx/ ++obj-$(CONFIG_SOC_STARFIVE) += starfive/ + obj-y += hisilicon/ + obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/ +diff --git a/drivers/crypto/starfive/Kconfig b/drivers/crypto/starfive/Kconfig +new file mode 100644 +index 000000000000..371e26f1c655 +--- /dev/null ++++ b/drivers/crypto/starfive/Kconfig +@@ -0,0 +1,18 @@ ++# ++# Starfive crypto drivers configuration ++# ++ ++config CRYPTO_DEV_JH7110_ENCRYPT ++ tristate "Starfive's Cryptographic Engine driver" ++ depends on RISCV ++ select CRYPTO_ENGINE ++ select CRYPTO_RSA ++ select CRYPTO_LIB_DES ++ select CRYPTO_SKCIPHER ++ select AMBA_PL08X ++ default m ++ help ++ Support for Starfive JH7110 cryptographic acceleration instructions ++ on riscv64 CPU. This hardware crypto module supports acceleration for ++ public key algo, ciphers, AEAD and hash functions. ++ If you choose 'M' here, this module will be called jh7110-crypto. +diff --git a/drivers/crypto/starfive/Makefile b/drivers/crypto/starfive/Makefile +new file mode 100644 +index 000000000000..9bdfd41069cd +--- /dev/null ++++ b/drivers/crypto/starfive/Makefile +@@ -0,0 +1,2 @@ ++# SPDX-License-Identifier: GPL-2.0 ++obj-y += jh7110/ +diff --git a/drivers/crypto/starfive/jh7110/Makefile b/drivers/crypto/starfive/jh7110/Makefile +new file mode 100644 +index 000000000000..1d10020aef1a +--- /dev/null ++++ b/drivers/crypto/starfive/jh7110/Makefile +@@ -0,0 +1,3 @@ ++# SPDX-License-Identifier: GPL-2.0 ++obj-$(CONFIG_CRYPTO_DEV_JH7110_ENCRYPT) += jh7110-crypto.o ++jh7110-crypto-objs := jh7110-sec.o jh7110-sha.o jh7110-aes.o jh7110-pka.o +diff --git a/drivers/crypto/starfive/jh7110/jh7110-aes.c b/drivers/crypto/starfive/jh7110/jh7110-aes.c +new file mode 100644 +index 000000000000..0c9310ca2dfd +--- /dev/null ++++ b/drivers/crypto/starfive/jh7110/jh7110-aes.c +@@ -0,0 +1,1802 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2021 StarFive, Inc ++ * Copyright 2021 StarFive, Inc ++ * ++ * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING ++ * CUSTOMERS WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER ++ * FOR THEM TO SAVE TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE ++ * FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY ++ * CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE ++ * BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION ++ * WITH THEIR PRODUCTS. ++ */ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "jh7110-str.h" ++ ++/* Mode mask = bits [3..0] */ ++#define FLG_MODE_MASK GENMASK(2, 0) ++ ++/* Bit [4] encrypt / decrypt */ ++#define FLG_ENCRYPT BIT(4) ++ ++/* Bit [31..16] status */ ++#define FLG_CCM_PADDED_WA BIT(5) ++ ++#define SR_BUSY 0x00000010 ++#define SR_OFNE 0x00000004 ++ ++#define IMSCR_IN BIT(0) ++#define IMSCR_OUT BIT(1) ++ ++#define MISR_IN BIT(0) ++#define MISR_OUT BIT(1) ++ ++/* Misc */ ++#define AES_BLOCK_32 (AES_BLOCK_SIZE / sizeof(u32)) ++#define GCM_CTR_INIT 1 ++#define CRYP_AUTOSUSPEND_DELAY 50 ++ ++static inline int jh7110_aes_wait_busy(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ u32 status; ++ ++ return readl_relaxed_poll_timeout(sdev->io_base + JH7110_AES_CSR, status, ++ !(status & JH7110_AES_BUSY), 10, 100000); ++} ++ ++static inline int jh7110_aes_wait_keydone(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ u32 status; ++ ++ return readl_relaxed_poll_timeout(sdev->io_base + JH7110_AES_CSR, status, ++ (status & JH7110_AES_KEY_DONE), 10, 100000); ++} ++ ++static inline int jh7110_aes_wait_gcmdone(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ u32 status; ++ ++ return readl_relaxed_poll_timeout(sdev->io_base + JH7110_AES_CSR, status, ++ (status & JH7110_AES_GCM_DONE), 10, 100000); ++} ++ ++static int jh7110_cryp_check_aligned(struct scatterlist *sg, size_t total, ++ size_t align) ++{ ++ int len = 0; ++ ++ if (!total) ++ return 0; ++ ++ if (!IS_ALIGNED(total, align)) ++ return -EINVAL; ++ ++ while (sg) { ++ if (!IS_ALIGNED(sg->offset, sizeof(u32))) ++ return -EINVAL; ++ ++ if (!IS_ALIGNED(sg->length, align)) ++ return -EINVAL; ++ ++ len += sg->length; ++ sg = sg_next(sg); ++ } ++ ++ if (len != total) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int jh7110_cryp_check_io_aligned(struct jh7110_sec_request_ctx *rctx) ++{ ++ int ret; ++ ++ ret = jh7110_cryp_check_aligned(rctx->in_sg, rctx->total_in, ++ rctx->hw_blocksize); ++ ++ if (ret) ++ return ret; ++ ++ ret = jh7110_cryp_check_aligned(rctx->out_sg, rctx->total_out, ++ rctx->hw_blocksize); ++ ++ return ret; ++} ++ ++static void sg_copy_buf(void *buf, struct scatterlist *sg, ++ unsigned int start, unsigned int nbytes, int out) ++{ ++ struct scatter_walk walk; ++ ++ if (!nbytes) ++ return; ++ ++ scatterwalk_start(&walk, sg); ++ scatterwalk_advance(&walk, start); ++ scatterwalk_copychunks(buf, &walk, nbytes, out); ++ scatterwalk_done(&walk, out, 0); ++} ++ ++static int jh7110_cryp_copy_sgs(struct jh7110_sec_request_ctx *rctx) ++{ ++ void *buf_in, *buf_out; ++ int pages, total_in, total_out; ++ ++ if (!jh7110_cryp_check_io_aligned(rctx)) { ++ rctx->sgs_copied = 0; ++ return 0; ++ } ++ ++ total_in = ALIGN(rctx->total_in, rctx->hw_blocksize); ++ pages = total_in ? get_order(total_in) : 1; ++ buf_in = (void *)__get_free_pages(GFP_ATOMIC, pages); ++ ++ total_out = ALIGN(rctx->total_out, rctx->hw_blocksize); ++ pages = total_out ? get_order(total_out) : 1; ++ buf_out = (void *)__get_free_pages(GFP_ATOMIC, pages); ++ ++ if (!buf_in || !buf_out) { ++ dev_err(rctx->sdev->dev, "Can't allocate pages when unaligned\n"); ++ rctx->sgs_copied = 0; ++ return -EFAULT; ++ } ++ ++ sg_copy_buf(buf_in, rctx->in_sg, 0, rctx->total_in, 0); ++ ++ sg_init_one(&rctx->in_sgl, buf_in, total_in); ++ rctx->in_sg = &rctx->in_sgl; ++ rctx->in_sg_len = 1; ++ ++ sg_init_one(&rctx->out_sgl, buf_out, total_out); ++ rctx->out_sg_save = rctx->out_sg; ++ rctx->out_sg = &rctx->out_sgl; ++ rctx->out_sg_len = 1; ++ ++ rctx->sgs_copied = 1; ++ ++ return 0; ++} ++ ++static inline int is_ecb(struct jh7110_sec_request_ctx *rctx) ++{ ++ return (rctx->flags & FLG_MODE_MASK) == JH7110_AES_MODE_ECB; ++} ++ ++static inline int is_cbc(struct jh7110_sec_request_ctx *rctx) ++{ ++ return (rctx->flags & FLG_MODE_MASK) == JH7110_AES_MODE_CBC; ++} ++ ++static inline int is_ofb(struct jh7110_sec_request_ctx *rctx) ++{ ++ return (rctx->flags & FLG_MODE_MASK) == JH7110_AES_MODE_OFB; ++} ++ ++static inline int is_cfb(struct jh7110_sec_request_ctx *rctx) ++{ ++ return (rctx->flags & FLG_MODE_MASK) == JH7110_AES_MODE_CFB; ++} ++ ++static inline int is_ctr(struct jh7110_sec_request_ctx *rctx) ++{ ++ return (rctx->flags & FLG_MODE_MASK) == JH7110_AES_MODE_CTR; ++} ++ ++static inline int is_gcm(struct jh7110_sec_request_ctx *rctx) ++{ ++ return (rctx->flags & FLG_MODE_MASK) == JH7110_AES_MODE_GCM; ++} ++ ++static inline int is_ccm(struct jh7110_sec_request_ctx *rctx) ++{ ++ return (rctx->flags & FLG_MODE_MASK) == JH7110_AES_MODE_CCM; ++} ++ ++static inline int get_aes_mode(struct jh7110_sec_request_ctx *rctx) ++{ ++ return rctx->flags & FLG_MODE_MASK; ++} ++ ++static inline int is_encrypt(struct jh7110_sec_request_ctx *rctx) ++{ ++ return !!(rctx->flags & FLG_ENCRYPT); ++} ++ ++static inline int is_decrypt(struct jh7110_sec_request_ctx *rctx) ++{ ++ return !is_encrypt(rctx); ++} ++ ++static int jh7110_cryp_read_auth_tag(struct jh7110_sec_ctx *ctx); ++ ++static inline void jh7110_aes_reset(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ ++ rctx->csr.aes_csr.v = 0; ++ rctx->csr.aes_csr.aesrst = 1; ++ jh7110_sec_write(ctx->sdev, JH7110_AES_CSR, rctx->csr.aes_csr.v); ++ ++} ++ ++static inline void jh7110_aes_xcm_start(struct jh7110_sec_ctx *ctx, u32 hw_mode) ++{ ++ unsigned int value; ++ ++ switch (hw_mode) { ++ case JH7110_AES_MODE_GCM: ++ value = jh7110_sec_read(ctx->sdev, JH7110_AES_CSR); ++ value |= JH7110_AES_GCM_START; ++ jh7110_sec_write(ctx->sdev, JH7110_AES_CSR, value); ++ break; ++ case JH7110_AES_MODE_CCM: ++ value = jh7110_sec_read(ctx->sdev, JH7110_AES_CSR); ++ value |= JH7110_AES_CCM_START; ++ jh7110_sec_write(ctx->sdev, JH7110_AES_CSR, value); ++ break; ++ } ++} ++ ++static inline void jh7110_aes_csr_setup(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ ++ rctx->csr.aes_csr.v = 0; ++ switch (ctx->keylen) { ++ case AES_KEYSIZE_128: ++ rctx->csr.aes_csr.keymode = JH7110_AES_KEYMODE_128; ++ break; ++ case AES_KEYSIZE_192: ++ rctx->csr.aes_csr.keymode = JH7110_AES_KEYMODE_192; ++ break; ++ case AES_KEYSIZE_256: ++ rctx->csr.aes_csr.keymode = JH7110_AES_KEYMODE_256; ++ break; ++ default: ++ return; ++ } ++ rctx->csr.aes_csr.mode = rctx->flags & FLG_MODE_MASK; ++ rctx->csr.aes_csr.cmode = is_decrypt(rctx); ++ rctx->csr.aes_csr.stream_mode = rctx->stmode; ++ ++ if (ctx->sdev->use_side_channel_mitigation) { ++ rctx->csr.aes_csr.delay_aes = 1; ++ rctx->csr.aes_csr.vaes_start = 1; ++ } ++ ++ if (jh7110_aes_wait_busy(ctx)) { ++ dev_err(ctx->sdev->dev, "reset error\n"); ++ return; ++ } ++ ++ jh7110_sec_write(ctx->sdev, JH7110_AES_CSR, rctx->csr.aes_csr.v); ++} ++ ++static inline void jh7110_aes_set_ivlen(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ ++ if (is_gcm(rctx)) ++ jh7110_sec_write(sdev, JH7110_AES_IVLEN, GCM_AES_IV_SIZE); ++ else ++ jh7110_sec_write(sdev, JH7110_AES_IVLEN, AES_BLOCK_SIZE); ++} ++ ++static inline void jh7110_aes_set_alen(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ ++ jh7110_sec_write(sdev, JH7110_AES_ALEN0, (ctx->rctx->assoclen >> 32) & 0xffffffff); ++ jh7110_sec_write(sdev, JH7110_AES_ALEN1, ctx->rctx->assoclen & 0xffffffff); ++} ++ ++static unsigned int jh7110_cryp_get_input_text_len(struct jh7110_sec_ctx *ctx); ++ ++static inline void jh7110_aes_set_mlen(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ size_t data_len; ++ ++ data_len = jh7110_cryp_get_input_text_len(ctx); ++ ++ jh7110_sec_write(sdev, JH7110_AES_MLEN0, (data_len >> 32) & 0xffffffff); ++ jh7110_sec_write(sdev, JH7110_AES_MLEN1, data_len & 0xffffffff); ++} ++ ++static inline int crypto_ccm_check_iv(const u8 *iv) ++{ ++ /* 2 <= L <= 8, so 1 <= L' <= 7. */ ++ if (iv[0] < 1 || iv[0] > 7) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++ ++static int jh7110_cryp_hw_write_iv(struct jh7110_sec_ctx *ctx, u32 *iv) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ ++ if (!iv) ++ return -EINVAL; ++ ++ jh7110_sec_write(sdev, JH7110_AES_IV0, iv[0]); ++ jh7110_sec_write(sdev, JH7110_AES_IV1, iv[1]); ++ jh7110_sec_write(sdev, JH7110_AES_IV2, iv[2]); ++ ++ if (!is_gcm(rctx)) ++ jh7110_sec_write(sdev, JH7110_AES_IV3, iv[3]); ++ else ++ if (jh7110_aes_wait_gcmdone(ctx)) ++ return -ETIMEDOUT; ++ ++ return 0; ++} ++ ++static void jh7110_cryp_hw_get_iv(struct jh7110_sec_ctx *ctx, u32 *iv) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ ++ if (!iv) ++ return; ++ ++ iv[0] = jh7110_sec_read(sdev, JH7110_AES_IV0); ++ iv[1] = jh7110_sec_read(sdev, JH7110_AES_IV1); ++ iv[2] = jh7110_sec_read(sdev, JH7110_AES_IV2); ++ iv[3] = jh7110_sec_read(sdev, JH7110_AES_IV3); ++} ++ ++static void jh7110_cryp_hw_write_ctr(struct jh7110_sec_ctx *ctx, u32 *ctr) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ ++ jh7110_sec_write(sdev, JH7110_AES_NONCE0, ctr[0]); ++ jh7110_sec_write(sdev, JH7110_AES_NONCE1, ctr[1]); ++ jh7110_sec_write(sdev, JH7110_AES_NONCE2, ctr[2]); ++ jh7110_sec_write(sdev, JH7110_AES_NONCE3, ctr[3]); ++} ++ ++static int jh7110_cryp_hw_write_key(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ u32 *key = (u32 *)ctx->key; ++ ++ switch (ctx->keylen) { ++ case AES_KEYSIZE_256: ++ case AES_KEYSIZE_192: ++ case AES_KEYSIZE_128: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (ctx->keylen >= AES_KEYSIZE_128) { ++ jh7110_sec_write(sdev, JH7110_AES_KEY0, key[0]); ++ jh7110_sec_write(sdev, JH7110_AES_KEY1, key[1]); ++ jh7110_sec_write(sdev, JH7110_AES_KEY2, key[2]); ++ jh7110_sec_write(sdev, JH7110_AES_KEY3, key[3]); ++ } ++ ++ if (ctx->keylen >= AES_KEYSIZE_192) { ++ jh7110_sec_write(sdev, JH7110_AES_KEY4, key[4]); ++ jh7110_sec_write(sdev, JH7110_AES_KEY5, key[5]); ++ } ++ ++ if (ctx->keylen >= AES_KEYSIZE_256) { ++ jh7110_sec_write(sdev, JH7110_AES_KEY6, key[6]); ++ jh7110_sec_write(sdev, JH7110_AES_KEY7, key[7]); ++ } ++ ++ if (jh7110_aes_wait_keydone(ctx)) ++ return -ETIMEDOUT; ++ ++ return 0; ++} ++ ++static unsigned int jh7110_cryp_get_input_text_len(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ ++ return is_encrypt(rctx) ? rctx->req.areq->cryptlen : ++ rctx->req.areq->cryptlen - rctx->authsize; ++} ++ ++static int jh7110_cryp_gcm_init(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ int ret; ++ /* Phase 1 : init */ ++ memcpy(rctx->last_ctr, rctx->req.areq->iv, 12); ++ ++ ret = jh7110_cryp_hw_write_iv(ctx, (u32 *)rctx->last_ctr); ++ ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ ++static int jh7110_cryp_ccm_init(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ u8 iv[AES_BLOCK_SIZE], *b0; ++ unsigned int textlen; ++ ++ /* Phase 1 : init. Firstly set the CTR value to 1 (not 0) */ ++ memcpy(iv, rctx->req.areq->iv, AES_BLOCK_SIZE); ++ memset(iv + AES_BLOCK_SIZE - 1 - iv[0], 0, iv[0] + 1); ++ ++ /* Build B0 */ ++ b0 = (u8 *)sdev->aes_data; ++ memcpy(b0, iv, AES_BLOCK_SIZE); ++ ++ b0[0] |= (8 * ((rctx->authsize - 2) / 2)); ++ ++ if (rctx->req.areq->assoclen) ++ b0[0] |= 0x40; ++ ++ textlen = jh7110_cryp_get_input_text_len(ctx); ++ ++ b0[AES_BLOCK_SIZE - 2] = textlen >> 8; ++ b0[AES_BLOCK_SIZE - 1] = textlen & 0xFF; ++ ++ memcpy((void *)rctx->last_ctr, sdev->aes_data, AES_BLOCK_SIZE); ++ jh7110_cryp_hw_write_ctr(ctx, (u32 *)b0); ++ ++ return 0; ++} ++ ++static int jh7110_cryp_hw_init(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ int ret; ++ u32 hw_mode; ++ ++ pm_runtime_resume_and_get(ctx->sdev->dev); ++ ++ jh7110_aes_reset(ctx); ++ ++ hw_mode = get_aes_mode(ctx->rctx); ++ if (hw_mode == JH7110_AES_MODE_CFB || ++ hw_mode == JH7110_AES_MODE_OFB) ++ rctx->stmode = JH7110_AES_MODE_XFB_128; ++ else ++ rctx->stmode = JH7110_AES_MODE_XFB_1; ++ ++ jh7110_aes_csr_setup(ctx); ++ ++ ret = jh7110_cryp_hw_write_key(ctx); ++ ++ switch (hw_mode) { ++ case JH7110_AES_MODE_GCM: ++ memset(ctx->sdev->aes_data, 0, JH7110_MSG_BUFFER_SIZE); ++ jh7110_aes_set_alen(ctx); ++ jh7110_aes_set_mlen(ctx); ++ jh7110_aes_set_ivlen(ctx); ++ jh7110_aes_xcm_start(ctx, hw_mode); ++ ++ if (jh7110_aes_wait_gcmdone(ctx)) ++ return -ETIMEDOUT; ++ ++ memset((void *)rctx->last_ctr, 0, sizeof(rctx->last_ctr)); ++ jh7110_cryp_gcm_init(ctx); ++ ++ break; ++ case JH7110_AES_MODE_CCM: ++ memset(ctx->sdev->aes_data, 0, JH7110_MSG_BUFFER_SIZE); ++ memset((void *)rctx->last_ctr, 0, sizeof(rctx->last_ctr)); ++ jh7110_aes_set_alen(ctx); ++ jh7110_aes_set_mlen(ctx); ++ ++ /* Phase 1 : init */ ++ jh7110_cryp_ccm_init(ctx); ++ ++ jh7110_aes_xcm_start(ctx, hw_mode); ++ ++ break; ++ case JH7110_AES_MODE_OFB: ++ case JH7110_AES_MODE_CFB: ++ case JH7110_AES_MODE_CBC: ++ case JH7110_AES_MODE_CTR: ++ ret = jh7110_cryp_hw_write_iv(ctx, (void *)rctx->req.sreq->iv); ++ break; ++ default: ++ break; ++ } ++ ++ return ret; ++} ++ ++static int jh7110_cryp_get_from_sg(struct jh7110_sec_request_ctx *rctx, size_t offset, ++ size_t count, size_t data_offset) ++{ ++ size_t of, ct, index; ++ struct scatterlist *sg = rctx->in_sg; ++ ++ of = offset; ++ ct = count; ++ while (sg->length <= of) { ++ of -= sg->length; ++ ++ if (!sg_is_last(sg)) { ++ sg = sg_next(sg); ++ continue; ++ } else { ++ return -EBADE; ++ } ++ } ++ ++ index = data_offset; ++ while (ct > 0) { ++ if (sg->length - of >= ct) { ++ scatterwalk_map_and_copy(rctx->sdev->aes_data + index, sg, ++ of, ct, 0); ++ index = index + ct; ++ return index - data_offset; ++ } ++ scatterwalk_map_and_copy(rctx->sdev->aes_data + index, sg, ++ of, sg->length - of, 0); ++ index += sg->length - of; ++ ct = ct - (sg->length - of); ++ ++ of = 0; ++ ++ if (!sg_is_last(sg)) ++ sg = sg_next(sg); ++ else ++ return -EBADE; ++ } ++ return index - data_offset; ++} ++ ++static int jh7110_cryp_read_auth_tag(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ int loop, total_len, start_addr; ++ ++ total_len = AES_BLOCK_SIZE / sizeof(u32); ++ start_addr = JH7110_AES_NONCE0; ++ ++ if (jh7110_aes_wait_busy(ctx)) ++ return -EBUSY; ++ ++ if (is_gcm(rctx)) ++ for (loop = 0; loop < total_len; loop++, start_addr += 4) ++ rctx->tag_out[loop] = jh7110_sec_read(sdev, start_addr); ++ else ++ for (loop = 0; loop < total_len; loop++) ++ rctx->tag_out[loop] = jh7110_sec_read(sdev, JH7110_AES_AESDIO0R); ++ ++ if (is_encrypt(rctx)) ++ sg_copy_buffer(rctx->out_sg, sg_nents(rctx->out_sg), rctx->tag_out, ++ rctx->authsize, rctx->offset, 0); ++ else { ++ scatterwalk_map_and_copy(rctx->tag_in, rctx->in_sg, ++ rctx->total_in_save - rctx->authsize, ++ rctx->authsize, 0); ++ ++ if (crypto_memneq(rctx->tag_in, rctx->tag_out, rctx->authsize)) ++ return -EBADMSG; ++ } ++ ++ return 0; ++} ++ ++static int jh7110_gcm_zero_message_data(struct jh7110_sec_ctx *ctx); ++ ++static void jh7110_cryp_finish_req(struct jh7110_sec_ctx *ctx, int err) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ ++ if (!err && (is_gcm(rctx) || is_ccm(rctx))) { ++ /* Phase 4 : output tag */ ++ err = jh7110_cryp_read_auth_tag(ctx); ++ } ++ ++ if (!err && (is_cbc(rctx) || is_ctr(rctx))) ++ jh7110_cryp_hw_get_iv(ctx, (void *)rctx->req.sreq->iv); ++ ++ if (rctx->sgs_copied) { ++ void *buf_in, *buf_out; ++ int pages, len; ++ ++ buf_in = sg_virt(&rctx->in_sgl); ++ buf_out = sg_virt(&rctx->out_sgl); ++ ++ sg_copy_buf(buf_out, rctx->out_sg_save, 0, ++ rctx->total_out_save, 1); ++ ++ len = ALIGN(rctx->total_in_save, rctx->hw_blocksize); ++ pages = len ? get_order(len) : 1; ++ free_pages((unsigned long)buf_in, pages); ++ ++ len = ALIGN(rctx->total_out_save, rctx->hw_blocksize); ++ pages = len ? get_order(len) : 1; ++ free_pages((unsigned long)buf_out, pages); ++ } ++ ++ pm_runtime_mark_last_busy(ctx->sdev->dev); ++ pm_runtime_put_autosuspend(ctx->sdev->dev); ++ ++ if (is_gcm(rctx) || is_ccm(rctx)) ++ crypto_finalize_aead_request(ctx->sdev->engine, rctx->req.areq, err); ++ else ++ crypto_finalize_skcipher_request(ctx->sdev->engine, rctx->req.sreq, ++ err); ++} ++ ++static bool jh7110_check_counter_overflow(struct jh7110_sec_ctx *ctx, size_t count) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ bool ret = false; ++ u32 start, end, ctr, blocks; ++ ++ if (count) { ++ blocks = DIV_ROUND_UP(count, AES_BLOCK_SIZE); ++ rctx->last_ctr[3] = cpu_to_be32(be32_to_cpu(rctx->last_ctr[3]) + blocks); ++ ++ if (rctx->last_ctr[3] == 0) { ++ rctx->last_ctr[2] = cpu_to_be32(be32_to_cpu(rctx->last_ctr[2]) + 1); ++ if (rctx->last_ctr[2] == 0) { ++ rctx->last_ctr[1] = cpu_to_be32(be32_to_cpu(rctx->last_ctr[1]) + 1); ++ if (rctx->last_ctr[1] == 0) { ++ rctx->last_ctr[0] = cpu_to_be32(be32_to_cpu(rctx->last_ctr[0]) + 1); ++ if (rctx->last_ctr[1] == 0) ++ jh7110_cryp_hw_write_ctr(ctx, (u32 *)rctx->last_ctr); ++ } ++ } ++ } ++ } ++ ++ /* ctr counter overflow. */ ++ ctr = rctx->total_in - rctx->assoclen - rctx->authsize; ++ blocks = DIV_ROUND_UP(ctr, AES_BLOCK_SIZE); ++ start = be32_to_cpu(rctx->last_ctr[3]); ++ ++ end = start + blocks - 1; ++ if (end < start) { ++ rctx->ctr_over_count = AES_BLOCK_SIZE * -start; ++ ret = true; ++ } ++ ++ return ret; ++} ++ ++static void jh7110_aes_dma_callback(void *param) ++{ ++ struct jh7110_sec_dev *sdev = param; ++ ++ complete(&sdev->sec_comp_p); ++} ++ ++static void vic_debug_dma_info(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ int loop; ++ ++ for (loop = 0; loop <= 0x34; loop += 4) ++ dev_dbg(sdev->dev, "dma[%x] = %x\n", loop, readl_relaxed(sdev->dma_base + loop)); ++ for (loop = 0x100; loop <= 0x110; loop += 4) ++ dev_dbg(sdev->dev, "dma[%x] = %x\n", loop, readl_relaxed(sdev->dma_base + loop)); ++ for (loop = 0x120; loop <= 0x130; loop += 4) ++ dev_dbg(sdev->dev, "dma[%x] = %x\n", loop, readl_relaxed(sdev->dma_base + loop)); ++} ++ ++static int jh7110_cryp_write_out_dma(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct dma_async_tx_descriptor *in_desc, *out_desc; ++ union jh7110_alg_cr alg_cr; ++ dma_cookie_t cookie; ++ unsigned int *out; ++ int total_len; ++ int err; ++ int loop; ++ ++ total_len = rctx->bufcnt; ++ ++ alg_cr.v = 0; ++ alg_cr.start = 1; ++ alg_cr.aes_dma_en = 1; ++ jh7110_sec_write(sdev, JH7110_ALG_CR_OFFSET, alg_cr.v); ++ ++ total_len = (total_len & 0xf) ? (((total_len >> 4) + 1) << 4) : total_len; ++ ++ jh7110_sec_write(sdev, JH7110_DMA_IN_LEN_OFFSET, total_len); ++ jh7110_sec_write(sdev, JH7110_DMA_OUT_LEN_OFFSET, total_len); ++ ++ sg_init_table(&ctx->sg[0], 1); ++ sg_set_buf(&ctx->sg[0], sdev->aes_data, total_len); ++ sg_dma_address(&ctx->sg[0]) = phys_to_dma(sdev->dev, (unsigned long long)(sdev->aes_data)); ++ sg_dma_len(&ctx->sg[0]) = total_len; ++ ++ sg_init_table(&ctx->sg[1], 1); ++ sg_set_buf(&ctx->sg[1], sdev->aes_data + (JH7110_MSG_BUFFER_SIZE >> 1), total_len); ++ sg_dma_address(&ctx->sg[1]) = phys_to_dma(sdev->dev, (unsigned long long)(sdev->aes_data + (JH7110_MSG_BUFFER_SIZE >> 1))); ++ sg_dma_len(&ctx->sg[1]) = total_len; ++ ++ err = dma_map_sg(sdev->dev, &ctx->sg[0], 1, DMA_TO_DEVICE); ++ if (!err) { ++ dev_err(sdev->dev, "dma_map_sg() error\n"); ++ return -EINVAL; ++ } ++ ++ err = dma_map_sg(sdev->dev, &ctx->sg[1], 1, DMA_FROM_DEVICE); ++ if (!err) { ++ dev_err(sdev->dev, "dma_map_sg() error\n"); ++ return -EINVAL; ++ } ++ ++ sdev->cfg_in.direction = DMA_MEM_TO_DEV; ++ sdev->cfg_in.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ sdev->cfg_in.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ sdev->cfg_in.src_maxburst = sdev->dma_maxburst; ++ sdev->cfg_in.dst_maxburst = sdev->dma_maxburst; ++ sdev->cfg_in.dst_addr = sdev->io_phys_base + JH7110_ALG_FIFO_OFFSET; ++ ++ dmaengine_slave_config(sdev->sec_xm_m, &sdev->cfg_in); ++ ++ sdev->cfg_out.direction = DMA_DEV_TO_MEM; ++ sdev->cfg_out.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ sdev->cfg_out.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ sdev->cfg_out.src_maxburst = 4; ++ sdev->cfg_out.dst_maxburst = 4; ++ sdev->cfg_out.src_addr = sdev->io_phys_base + JH7110_ALG_FIFO_OFFSET; ++ ++ dmaengine_slave_config(sdev->sec_xm_p, &sdev->cfg_out); ++ ++ in_desc = dmaengine_prep_slave_sg(sdev->sec_xm_m, &ctx->sg[0], ++ 1, DMA_MEM_TO_DEV, ++ DMA_PREP_INTERRUPT | DMA_CTRL_ACK); ++ if (!in_desc) ++ return -EINVAL; ++ ++ cookie = dmaengine_submit(in_desc); ++ dma_async_issue_pending(sdev->sec_xm_m); ++ ++ out_desc = dmaengine_prep_slave_sg(sdev->sec_xm_p, &ctx->sg[1], ++ 1, DMA_DEV_TO_MEM, ++ DMA_PREP_INTERRUPT | DMA_CTRL_ACK); ++ if (!out_desc) ++ return -EINVAL; ++ ++ reinit_completion(&sdev->sec_comp_p); ++ ++ out_desc->callback = jh7110_aes_dma_callback; ++ out_desc->callback_param = sdev; ++ ++ dmaengine_submit(out_desc); ++ dma_async_issue_pending(sdev->sec_xm_p); ++ ++ err = 0; ++ ++ if (!wait_for_completion_timeout(&sdev->sec_comp_p, ++ msecs_to_jiffies(10000))) { ++ alg_cr.v = 0; ++ alg_cr.clear = 1; ++ ++ jh7110_sec_write(sdev, JH7110_ALG_CR_OFFSET, alg_cr.v); ++ ++ vic_debug_dma_info(ctx); ++ dev_err(sdev->dev, "wait_for_completion_timeout out error cookie = %x\n", ++ dma_async_is_tx_complete(sdev->sec_xm_p, cookie, ++ NULL, NULL)); ++ } ++ ++ out = (unsigned int *)(sdev->aes_data + (JH7110_MSG_BUFFER_SIZE >> 1)); ++ ++ for (loop = 0; loop < total_len / 4; loop++) ++ dev_dbg(sdev->dev, "this is debug [%d] = %x\n", loop, out[loop]); ++ ++ sg_copy_buffer(rctx->out_sg, sg_nents(rctx->out_sg), out, ++ total_len, rctx->offset, 0); ++ ++ dma_unmap_sg(sdev->dev, &ctx->sg[0], 1, DMA_TO_DEVICE); ++ dma_unmap_sg(sdev->dev, &ctx->sg[1], 1, DMA_FROM_DEVICE); ++ ++ alg_cr.v = 0; ++ alg_cr.clear = 1; ++ ++ jh7110_sec_write(sdev, JH7110_ALG_CR_OFFSET, alg_cr.v); ++ ++ return 0; ++} ++ ++static int jh7110_cryp_write_out_cpu(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ unsigned int *buffer, *out; ++ int total_len, loop, count; ++ ++ total_len = rctx->bufcnt; ++ buffer = (unsigned int *)sdev->aes_data; ++ out = (unsigned int *)(sdev->aes_data + (JH7110_MSG_BUFFER_SIZE >> 1)); ++ ++ while (total_len > 0) { ++ for (loop = 0; loop < 4; loop++, buffer++) ++ jh7110_sec_write(sdev, JH7110_AES_AESDIO0R, *buffer); ++ ++ if (jh7110_aes_wait_busy(ctx)) { ++ dev_err(sdev->dev, "jh7110_aes_wait_busy error\n"); ++ return -ETIMEDOUT; ++ } ++ ++ for (loop = 0; loop < 4; loop++, out++) ++ *out = jh7110_sec_read(sdev, JH7110_AES_AESDIO0R); ++ ++ total_len -= 16; ++ } ++ ++ if (rctx->bufcnt >= rctx->total_out) ++ count = rctx->total_out; ++ else ++ count = rctx->bufcnt; ++ ++ out = (unsigned int *)(sdev->aes_data + (JH7110_MSG_BUFFER_SIZE >> 1)); ++ ++ sg_copy_buffer(rctx->out_sg, sg_nents(rctx->out_sg), out, ++ count, rctx->offset, 0); ++ ++ return 0; ++} ++ ++static int jh7110_cryp_write_data(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ size_t data_len, total, count, data_buf_len, data_offset; ++ int ret; ++ bool fragmented = false; ++ ++ sdev->cry_type = JH7110_AES_TYPE; ++ ++ /* ctr counter overflow. */ ++ fragmented = jh7110_check_counter_overflow(ctx, 0); ++ ++ total = 0; ++ rctx->offset = 0; ++ rctx->data_offset = 0; ++ ++ data_offset = rctx->data_offset; ++ while (total < rctx->total_in) { ++ data_buf_len = sdev->data_buf_len - (sdev->data_buf_len % ctx->keylen) - data_offset; ++ count = min(rctx->total_in - rctx->offset, data_buf_len); ++ ++ /* ctr counter overflow. */ ++ if (fragmented && rctx->ctr_over_count != 0) { ++ if (count >= rctx->ctr_over_count) ++ count = rctx->ctr_over_count; ++ } ++ data_len = jh7110_cryp_get_from_sg(rctx, rctx->offset, count, data_offset); ++ ++ if (data_len < 0) ++ return data_len; ++ if (data_len != count) ++ return -EINVAL; ++ ++ rctx->bufcnt = data_len + data_offset; ++ total += data_len; ++ ++ if (!is_encrypt(rctx) && (total + rctx->assoclen >= rctx->total_in)) ++ rctx->bufcnt = rctx->bufcnt - rctx->authsize; ++ ++ if (rctx->bufcnt) { ++ if (sdev->use_dma) ++ ret = jh7110_cryp_write_out_dma(ctx); ++ else ++ ret = jh7110_cryp_write_out_cpu(ctx); ++ ++ if (ret) ++ return ret; ++ } ++ data_offset = 0; ++ rctx->offset += data_len; ++ fragmented = jh7110_check_counter_overflow(ctx, data_len); ++ } ++ ++ return ret; ++} ++ ++static int jh7110_cryp_gcm_write_aad(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ unsigned int *buffer; ++ int total_len, loop; ++ ++ if (rctx->assoclen) { ++ total_len = rctx->assoclen; ++ total_len = (total_len & 0xf) ? (((total_len >> 4) + 1) << 2) : (total_len >> 2); ++ } ++ ++ buffer = (unsigned int *)sdev->aes_data; ++ ++ for (loop = 0; loop < total_len; loop += 4) { ++ jh7110_sec_write(sdev, JH7110_AES_NONCE0, *buffer); ++ buffer++; ++ jh7110_sec_write(sdev, JH7110_AES_NONCE1, *buffer); ++ buffer++; ++ jh7110_sec_write(sdev, JH7110_AES_NONCE2, *buffer); ++ buffer++; ++ jh7110_sec_write(sdev, JH7110_AES_NONCE3, *buffer); ++ buffer++; ++ udelay(2); ++ } ++ ++ if (jh7110_aes_wait_gcmdone(ctx)) ++ return -ETIMEDOUT; ++ ++ return 0; ++} ++ ++static int jh7110_cryp_ccm_write_aad(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ unsigned int *buffer, *out; ++ unsigned char *ci; ++ int total_len, mlen, loop; ++ ++ total_len = rctx->bufcnt; ++ buffer = (unsigned int *)sdev->aes_data; ++ out = (unsigned int *)(sdev->aes_data + (JH7110_MSG_BUFFER_SIZE >> 1)); ++ ++ ci = (unsigned char *)buffer; ++ jh7110_sec_writeb(sdev, JH7110_AES_AESDIO0R, *ci); ++ ci++; ++ jh7110_sec_writeb(sdev, JH7110_AES_AESDIO0R, *ci); ++ ci++; ++ total_len -= 2; ++ buffer = (unsigned int *)ci; ++ for (loop = 0; loop < 3; loop++, buffer++) ++ jh7110_sec_write(sdev, JH7110_AES_AESDIO0R, *buffer); ++ ++ if (jh7110_aes_wait_busy(ctx)) { ++ dev_err(sdev->dev, "jh7110_aes_wait_busy error\n"); ++ return -ETIMEDOUT; ++ } ++ total_len -= 12; ++ ++ while (total_len >= 16) { ++ for (loop = 0; loop < 4; loop++, buffer++) ++ jh7110_sec_write(sdev, JH7110_AES_AESDIO0R, *buffer); ++ ++ if (jh7110_aes_wait_busy(ctx)) { ++ dev_err(sdev->dev, "jh7110_aes_wait_busy error\n"); ++ return -ETIMEDOUT; ++ } ++ total_len -= 16; ++ } ++ ++ if (total_len > 0) { ++ mlen = total_len; ++ for (; total_len >= 4; total_len -= 4, buffer++) ++ jh7110_sec_write(sdev, JH7110_AES_AESDIO0R, *buffer); ++ ++ ci = (unsigned char *)buffer; ++ for (; total_len > 0; total_len--, ci++) ++ jh7110_sec_writeb(sdev, JH7110_AES_AESDIO0R, *ci); ++ ++ if (jh7110_aes_wait_busy(ctx)) { ++ dev_err(sdev->dev, "jh7110_aes_wait_busy error\n"); ++ return -ETIMEDOUT; ++ } ++ } ++ ++ if (jh7110_aes_wait_busy(ctx)) { ++ dev_err(sdev->dev, "jh7110_aes_wait_busy error\n"); ++ return -ETIMEDOUT; ++ } ++ ++ return 0; ++} ++ ++static int jh7110_cryp_xcm_write_data(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ size_t data_len, total, count, data_buf_len, offset, auths; ++ int ret; ++ bool fragmented = false; ++ ++ sdev->cry_type = JH7110_AES_TYPE; ++ ++ /* ctr counter overflow. */ ++ fragmented = jh7110_check_counter_overflow(ctx, 0); ++ ++ total = 0; ++ rctx->offset = 0; ++ rctx->data_offset = 0; ++ offset = 0; ++ ++ while (total < rctx->assoclen) { ++ data_buf_len = sdev->data_buf_len - (sdev->data_buf_len % ctx->keylen); ++ count = min(rctx->assoclen - offset, data_buf_len); ++ count = min(count, rctx->assoclen - total); ++ data_len = jh7110_cryp_get_from_sg(rctx, offset, count, 0); ++ if (data_len < 0) ++ return data_len; ++ if (data_len != count) ++ return -EINVAL; ++ ++ offset += data_len; ++ rctx->offset += data_len; ++ if ((data_len + 2) & 0xF) { ++ memset(sdev->aes_data + data_len, 0, 16 - ((data_len + 2) & 0xf)); ++ data_len += 16 - ((data_len + 2) & 0xf); ++ } ++ ++ rctx->bufcnt = data_len; ++ total += data_len; ++ ++ if (is_ccm(rctx)) ++ ret = jh7110_cryp_ccm_write_aad(ctx); ++ else ++ ret = jh7110_cryp_gcm_write_aad(ctx); ++ ++ if (ret) ++ return ret; ++ } ++ ++ total = 0; ++ auths = 0; ++ ++ while (total + auths < rctx->total_in - rctx->assoclen) { ++ data_buf_len = sdev->data_buf_len - (sdev->data_buf_len % ctx->keylen); ++ count = min(rctx->total_in - rctx->offset, data_buf_len); ++ ++ if (is_encrypt(rctx)) ++ count = min(count, rctx->total_in - rctx->assoclen - total); ++ else { ++ count = min(count, rctx->total_in - rctx->assoclen - total - rctx->authsize); ++ auths = rctx->authsize; ++ } ++ ++ /* ctr counter overflow. */ ++ if (fragmented && rctx->ctr_over_count != 0) { ++ if (count >= rctx->ctr_over_count) ++ count = rctx->ctr_over_count; ++ } ++ ++ data_len = jh7110_cryp_get_from_sg(rctx, rctx->offset, count, 0); ++ ++ if (data_len < 0) ++ return data_len; ++ if (data_len != count) ++ return -EINVAL; ++ ++ if (data_len % JH7110_AES_IV_LEN) { ++ memset(sdev->aes_data + data_len, 0, JH7110_AES_IV_LEN - (data_len % JH7110_AES_IV_LEN)); ++ data_len = data_len + (JH7110_AES_IV_LEN - (data_len % JH7110_AES_IV_LEN)); ++ } ++ ++ rctx->bufcnt = data_len; ++ total += data_len; ++ ++ if (rctx->bufcnt) { ++ if (sdev->use_dma) ++ ret = jh7110_cryp_write_out_dma(ctx); ++ else ++ ret = jh7110_cryp_write_out_cpu(ctx); ++ } ++ ++ rctx->offset += count; ++ offset += count; ++ ++ fragmented = jh7110_check_counter_overflow(ctx, data_len); ++ } ++ ++ return ret; ++} ++ ++static int jh7110_gcm_zero_message_data(struct jh7110_sec_ctx *ctx) ++{ ++ int ret; ++ ++ ctx->rctx->bufcnt = 0; ++ ctx->rctx->offset = 0; ++ if (ctx->sdev->use_dma) ++ ret = jh7110_cryp_write_out_dma(ctx); ++ else ++ ret = jh7110_cryp_write_out_cpu(ctx); ++ ++ return ret; ++} ++ ++static int jh7110_cryp_cpu_start(struct jh7110_sec_ctx *ctx, struct jh7110_sec_request_ctx *rctx) ++{ ++ int ret; ++ ++ ret = jh7110_cryp_write_data(ctx); ++ if (ret) ++ return ret; ++ ++ jh7110_cryp_finish_req(ctx, ret); ++ ++ return 0; ++} ++ ++static int jh7110_cryp_xcm_start(struct jh7110_sec_ctx *ctx, struct jh7110_sec_request_ctx *rctx) ++{ ++ int ret; ++ ++ ret = jh7110_cryp_xcm_write_data(ctx); ++ if (ret) ++ return ret; ++ ++ jh7110_cryp_finish_req(ctx, ret); ++ ++ mutex_unlock(&ctx->sdev->lock); ++ ++ return 0; ++} ++ ++static int jh7110_cryp_cipher_one_req(struct crypto_engine *engine, void *areq); ++static int jh7110_cryp_prepare_cipher_req(struct crypto_engine *engine, ++ void *areq); ++ ++static int jh7110_cryp_cra_init(struct crypto_skcipher *tfm) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_skcipher_ctx(tfm); ++ ++ ctx->sdev = jh7110_sec_find_dev(ctx); ++ if (!ctx->sdev) ++ return -ENODEV; ++ ++ crypto_skcipher_set_reqsize(tfm, sizeof(struct jh7110_sec_request_ctx)); ++ ++ ctx->enginectx.op.do_one_request = jh7110_cryp_cipher_one_req; ++ ctx->enginectx.op.prepare_request = jh7110_cryp_prepare_cipher_req; ++ ctx->enginectx.op.unprepare_request = NULL; ++ ++ return 0; ++} ++ ++static void jh7110_cryp_cra_exit(struct crypto_skcipher *tfm) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_skcipher_ctx(tfm); ++ ++ ctx->enginectx.op.do_one_request = NULL; ++ ctx->enginectx.op.prepare_request = NULL; ++ ctx->enginectx.op.unprepare_request = NULL; ++} ++ ++static int jh7110_cryp_aead_one_req(struct crypto_engine *engine, void *areq); ++static int jh7110_cryp_prepare_aead_req(struct crypto_engine *engine, ++ void *areq); ++ ++static int jh7110_cryp_aes_aead_init(struct crypto_aead *tfm) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_aead_ctx(tfm); ++ struct crypto_tfm *aead = crypto_aead_tfm(tfm); ++ struct crypto_alg *alg = aead->__crt_alg; ++ ++ ctx->sdev = jh7110_sec_find_dev(ctx); ++ ++ if (!ctx->sdev) ++ return -ENODEV; ++ ++ crypto_aead_set_reqsize(tfm, sizeof(struct jh7110_sec_request_ctx)); ++ ++ if (alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) { ++ ctx->fallback.aead = ++ crypto_alloc_aead(alg->cra_name, 0, ++ CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_NEED_FALLBACK); ++ if (IS_ERR(ctx->fallback.aead)) { ++ pr_err("%s() failed to allocate fallback for %s\n", ++ __func__, alg->cra_name); ++ return PTR_ERR(ctx->fallback.aead); ++ } ++ } ++ ++ ctx->enginectx.op.do_one_request = jh7110_cryp_aead_one_req; ++ ctx->enginectx.op.prepare_request = jh7110_cryp_prepare_aead_req; ++ ctx->enginectx.op.unprepare_request = NULL; ++ ++ return 0; ++} ++ ++static void jh7110_cryp_aes_aead_exit(struct crypto_aead *tfm) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_aead_ctx(tfm); ++ ++ if (ctx->fallback.aead) { ++ crypto_free_aead(ctx->fallback.aead); ++ ctx->fallback.aead = NULL; ++ } ++ ++ ctx->enginectx.op.do_one_request = NULL; ++ ctx->enginectx.op.prepare_request = NULL; ++ ctx->enginectx.op.unprepare_request = NULL; ++} ++ ++static int jh7110_cryp_crypt(struct skcipher_request *req, unsigned long flags) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_skcipher_ctx( ++ crypto_skcipher_reqtfm(req)); ++ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); ++ struct jh7110_sec_request_ctx *rctx = skcipher_request_ctx(req); ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ unsigned int blocksize_align = crypto_skcipher_blocksize(tfm) - 1; ++ ++ if (!sdev) ++ return -ENODEV; ++ ++ rctx->flags = flags; ++ rctx->req_type = JH7110_ABLK_REQ; ++ ++ if (is_ecb(rctx) || is_cbc(rctx)) ++ if (req->cryptlen & (blocksize_align)) ++ return -EINVAL; ++ ++ return crypto_transfer_skcipher_request_to_engine(sdev->engine, req); ++} ++ ++static int aead_do_fallback(struct aead_request *req) ++{ ++ struct aead_request *subreq = aead_request_ctx(req); ++ struct crypto_aead *aead = crypto_aead_reqtfm(req); ++ struct jh7110_sec_ctx *ctx = crypto_aead_ctx(aead); ++ ++ aead_request_set_tfm(subreq, ctx->fallback.aead); ++ aead_request_set_callback(subreq, req->base.flags, ++ req->base.complete, req->base.data); ++ aead_request_set_crypt(subreq, req->src, ++ req->dst, req->cryptlen, req->iv); ++ aead_request_set_ad(subreq, req->assoclen); ++ ++ return crypto_aead_decrypt(subreq); ++} ++ ++static int jh7110_cryp_aead_crypt(struct aead_request *req, unsigned long flags) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req)); ++ struct jh7110_sec_request_ctx *rctx = aead_request_ctx(req); ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ ++ if (!sdev) ++ return -ENODEV; ++ ++ rctx->flags = flags; ++ rctx->req_type = JH7110_AEAD_REQ; ++ ++ /* HW engine could not perform tag verification on ++ * non-blocksize aligned ciphertext, use fallback algo instead ++ */ ++ if (ctx->fallback.aead && is_decrypt(rctx)) ++ return aead_do_fallback(req); ++ ++ return crypto_transfer_aead_request_to_engine(sdev->engine, req); ++} ++ ++static int jh7110_cryp_setkey(struct crypto_skcipher *tfm, const u8 *key, ++ unsigned int keylen) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_skcipher_ctx(tfm); ++ ++ memcpy(ctx->key, key, keylen); ++ ctx->keylen = keylen; ++ { ++ int loop; ++ ++ for (loop = 0; loop < keylen; loop++) ++ pr_debug("key[%d] = %x ctx->key[%d] = %x\n", loop, key[loop], loop, ctx->key[loop]); ++ } ++ return 0; ++} ++ ++static int jh7110_cryp_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, ++ unsigned int keylen) ++{ ++ if (!key || !keylen) ++ return -EINVAL; ++ ++ if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 && ++ keylen != AES_KEYSIZE_256) ++ return -EINVAL; ++ else ++ return jh7110_cryp_setkey(tfm, key, keylen); ++} ++ ++static int jh7110_cryp_aes_aead_setkey(struct crypto_aead *tfm, const u8 *key, ++ unsigned int keylen) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_aead_ctx(tfm); ++ int ret = 0; ++ ++ if (!key || !keylen) ++ return -EINVAL; ++ ++ if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 && ++ keylen != AES_KEYSIZE_256) { ++ return -EINVAL; ++ } ++ ++ memcpy(ctx->key, key, keylen); ++ ctx->keylen = keylen; ++ ++ if (ctx->fallback.aead) ++ ret = crypto_aead_setkey(ctx->fallback.aead, key, keylen); ++ ++ return ret; ++} ++ ++static int jh7110_cryp_aes_gcm_setauthsize(struct crypto_aead *tfm, ++ unsigned int authsize) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_aead_ctx(tfm); ++ ++ tfm->authsize = authsize; ++ ++ if (ctx->fallback.aead) ++ ctx->fallback.aead->authsize = authsize; ++ ++ return crypto_gcm_check_authsize(authsize); ++} ++ ++static int jh7110_cryp_aes_ccm_setauthsize(struct crypto_aead *tfm, ++ unsigned int authsize) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_aead_ctx(tfm); ++ int ret = 0; ++ ++ switch (authsize) { ++ case 4: ++ case 6: ++ case 8: ++ case 10: ++ case 12: ++ case 14: ++ case 16: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ tfm->authsize = authsize; ++ ++ if (ctx->fallback.aead) ++ ctx->fallback.aead->authsize = authsize; ++ ++ return ret; ++} ++ ++static int jh7110_cryp_aes_ecb_encrypt(struct skcipher_request *req) ++{ ++ return jh7110_cryp_crypt(req, JH7110_AES_MODE_ECB | FLG_ENCRYPT); ++} ++ ++static int jh7110_cryp_aes_ecb_decrypt(struct skcipher_request *req) ++{ ++ return jh7110_cryp_crypt(req, JH7110_AES_MODE_ECB); ++} ++ ++static int jh7110_cryp_aes_cbc_encrypt(struct skcipher_request *req) ++{ ++ return jh7110_cryp_crypt(req, JH7110_AES_MODE_CBC | FLG_ENCRYPT); ++} ++ ++static int jh7110_cryp_aes_cbc_decrypt(struct skcipher_request *req) ++{ ++ return jh7110_cryp_crypt(req, JH7110_AES_MODE_CBC); ++} ++ ++static int jh7110_cryp_aes_cfb_encrypt(struct skcipher_request *req) ++{ ++ return jh7110_cryp_crypt(req, JH7110_AES_MODE_CFB | FLG_ENCRYPT); ++} ++ ++static int jh7110_cryp_aes_cfb_decrypt(struct skcipher_request *req) ++{ ++ return jh7110_cryp_crypt(req, JH7110_AES_MODE_CFB); ++} ++ ++static int jh7110_cryp_aes_ofb_encrypt(struct skcipher_request *req) ++{ ++ return jh7110_cryp_crypt(req, JH7110_AES_MODE_OFB | FLG_ENCRYPT); ++} ++ ++static int jh7110_cryp_aes_ofb_decrypt(struct skcipher_request *req) ++{ ++ return jh7110_cryp_crypt(req, JH7110_AES_MODE_OFB); ++} ++ ++static int jh7110_cryp_aes_ctr_encrypt(struct skcipher_request *req) ++{ ++ return jh7110_cryp_crypt(req, JH7110_AES_MODE_CTR | FLG_ENCRYPT); ++} ++ ++static int jh7110_cryp_aes_ctr_decrypt(struct skcipher_request *req) ++{ ++ return jh7110_cryp_crypt(req, JH7110_AES_MODE_CTR); ++} ++ ++static int jh7110_cryp_aes_gcm_encrypt(struct aead_request *req) ++{ ++ return jh7110_cryp_aead_crypt(req, JH7110_AES_MODE_GCM | FLG_ENCRYPT); ++} ++ ++static int jh7110_cryp_aes_gcm_decrypt(struct aead_request *req) ++{ ++ return jh7110_cryp_aead_crypt(req, JH7110_AES_MODE_GCM); ++} ++ ++static int jh7110_cryp_aes_ccm_encrypt(struct aead_request *req) ++{ ++ int ret; ++ ++ ret = crypto_ccm_check_iv(req->iv); ++ if (ret) ++ return ret; ++ ++ return jh7110_cryp_aead_crypt(req, JH7110_AES_MODE_CCM | FLG_ENCRYPT); ++} ++ ++static int jh7110_cryp_aes_ccm_decrypt(struct aead_request *req) ++{ ++ int ret; ++ ++ ret = crypto_ccm_check_iv(req->iv); ++ if (ret) ++ return ret; ++ ++ return jh7110_cryp_aead_crypt(req, JH7110_AES_MODE_CCM); ++} ++ ++static int jh7110_cryp_prepare_req(struct skcipher_request *req, ++ struct aead_request *areq) ++{ ++ struct jh7110_sec_ctx *ctx; ++ struct jh7110_sec_dev *sdev; ++ struct jh7110_sec_request_ctx *rctx; ++ int ret; ++ ++ if (!req && !areq) ++ return -EINVAL; ++ ++ ctx = req ? crypto_skcipher_ctx(crypto_skcipher_reqtfm(req)) : ++ crypto_aead_ctx(crypto_aead_reqtfm(areq)); ++ ++ sdev = ctx->sdev; ++ ++ if (!sdev) ++ return -ENODEV; ++ ++ rctx = req ? skcipher_request_ctx(req) : aead_request_ctx(areq); ++ ++ mutex_lock(&ctx->sdev->lock); ++ ++ rctx->sdev = sdev; ++ ctx->rctx = rctx; ++ rctx->hw_blocksize = AES_BLOCK_SIZE; ++ ++ if (req) { ++ rctx->req.sreq = req; ++ rctx->req_type = JH7110_ABLK_REQ; ++ rctx->total_in = req->cryptlen; ++ rctx->total_out = rctx->total_in; ++ rctx->authsize = 0; ++ rctx->assoclen = 0; ++ } else { ++ /* ++ * Length of input and output data: ++ * Encryption case: ++ * INPUT = AssocData || PlainText ++ * <- assoclen -> <- cryptlen -> ++ * <------- total_in -----------> ++ * ++ * OUTPUT = AssocData || CipherText || AuthTag ++ * <- assoclen -> <- cryptlen -> <- authsize -> ++ * <---------------- total_out -----------------> ++ * ++ * Decryption case: ++ * INPUT = AssocData || CipherText || AuthTag ++ * <- assoclen -> <--------- cryptlen ---------> ++ * <- authsize -> ++ * <---------------- total_in ------------------> ++ * ++ * OUTPUT = AssocData || PlainText ++ * <- assoclen -> <- crypten - authsize -> ++ * <---------- total_out -----------------> ++ */ ++ rctx->req.areq = areq; ++ rctx->req_type = JH7110_AEAD_REQ; ++ rctx->authsize = crypto_aead_authsize(crypto_aead_reqtfm(areq)); ++ rctx->total_in = areq->assoclen + areq->cryptlen; ++ rctx->assoclen = areq->assoclen; ++ if (is_encrypt(rctx)) ++ /* Append auth tag to output */ ++ rctx->total_out = rctx->total_in + rctx->authsize; ++ else ++ /* No auth tag in output */ ++ rctx->total_out = rctx->total_in - rctx->authsize; ++ } ++ ++ rctx->total_in_save = rctx->total_in; ++ rctx->total_out_save = rctx->total_out; ++ ++ rctx->in_sg = req ? req->src : areq->src; ++ rctx->out_sg = req ? req->dst : areq->dst; ++ rctx->out_sg_save = rctx->out_sg; ++ ++ rctx->in_sg_len = sg_nents_for_len(rctx->in_sg, rctx->total_in); ++ if (rctx->in_sg_len < 0) { ++ dev_err(sdev->dev, "Cannot get in_sg_len\n"); ++ ret = rctx->in_sg_len; ++ goto out; ++ } ++ ++ rctx->out_sg_len = sg_nents_for_len(rctx->out_sg, rctx->total_out); ++ if (rctx->out_sg_len < 0) { ++ dev_err(sdev->dev, "Cannot get out_sg_len\n"); ++ ret = rctx->out_sg_len; ++ goto out; ++ } ++ ++ ret = jh7110_cryp_copy_sgs(rctx); ++ if (ret) ++ return ret; ++ ++ ret = jh7110_cryp_hw_init(ctx); ++ if (ret) ++ goto out; ++ ++ return ret; ++out: ++ mutex_unlock(&sdev->doing); ++ ++ return ret; ++} ++ ++static int jh7110_cryp_prepare_cipher_req(struct crypto_engine *engine, ++ void *areq) ++{ ++ struct skcipher_request *req = container_of(areq, ++ struct skcipher_request, ++ base); ++ return jh7110_cryp_prepare_req(req, NULL); ++} ++ ++static int jh7110_cryp_cipher_one_req(struct crypto_engine *engine, void *areq) ++{ ++ struct skcipher_request *req = container_of(areq, ++ struct skcipher_request, ++ base); ++ struct jh7110_sec_request_ctx *rctx = skcipher_request_ctx(req); ++ struct jh7110_sec_ctx *ctx = crypto_skcipher_ctx( ++ crypto_skcipher_reqtfm(req)); ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ int ret; ++ ++ if (!sdev) ++ return -ENODEV; ++ ++ ret = jh7110_cryp_cpu_start(ctx, rctx); ++ ++ mutex_unlock(&sdev->lock); ++ ++ return ret; ++} ++ ++static int jh7110_cryp_prepare_aead_req(struct crypto_engine *engine, void *areq) ++{ ++ struct aead_request *req = container_of(areq, struct aead_request, ++ base); ++ return jh7110_cryp_prepare_req(NULL, req); ++} ++ ++static int jh7110_cryp_aead_one_req(struct crypto_engine *engine, void *areq) ++{ ++ struct aead_request *req = container_of(areq, struct aead_request, ++ base); ++ struct jh7110_sec_request_ctx *rctx = aead_request_ctx(req); ++ struct jh7110_sec_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req)); ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ ++ if (!sdev) ++ return -ENODEV; ++ ++ if (unlikely(!rctx->req.areq->assoclen && ++ !jh7110_cryp_get_input_text_len(ctx))) { ++ /* No input data to process: get tag and finish */ ++ jh7110_gcm_zero_message_data(ctx); ++ jh7110_cryp_finish_req(ctx, 0); ++ mutex_unlock(&ctx->sdev->lock); ++ return 0; ++ } ++ ++ return jh7110_cryp_xcm_start(ctx, rctx); ++} ++ ++static struct skcipher_alg crypto_algs[] = { ++{ ++ .base.cra_name = "ecb(aes)", ++ .base.cra_driver_name = "jh7110-ecb-aes", ++ .base.cra_priority = 200, ++ .base.cra_flags = CRYPTO_ALG_ASYNC, ++ .base.cra_blocksize = AES_BLOCK_SIZE, ++ .base.cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .base.cra_alignmask = 0xf, ++ .base.cra_module = THIS_MODULE, ++ .init = jh7110_cryp_cra_init, ++ .exit = jh7110_cryp_cra_exit, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .setkey = jh7110_cryp_aes_setkey, ++ .encrypt = jh7110_cryp_aes_ecb_encrypt, ++ .decrypt = jh7110_cryp_aes_ecb_decrypt, ++}, { ++ .base.cra_name = "cbc(aes)", ++ .base.cra_driver_name = "jh7110-cbc-aes", ++ .base.cra_priority = 200, ++ .base.cra_flags = CRYPTO_ALG_ASYNC, ++ .base.cra_blocksize = AES_BLOCK_SIZE, ++ .base.cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .base.cra_alignmask = 0xf, ++ .base.cra_module = THIS_MODULE, ++ .init = jh7110_cryp_cra_init, ++ .exit = jh7110_cryp_cra_exit, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .ivsize = AES_BLOCK_SIZE, ++ .setkey = jh7110_cryp_aes_setkey, ++ .encrypt = jh7110_cryp_aes_cbc_encrypt, ++ .decrypt = jh7110_cryp_aes_cbc_decrypt, ++}, { ++ .base.cra_name = "ctr(aes)", ++ .base.cra_driver_name = "jh7110-ctr-aes", ++ .base.cra_priority = 200, ++ .base.cra_flags = CRYPTO_ALG_ASYNC, ++ .base.cra_blocksize = 1, ++ .base.cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .base.cra_alignmask = 0xf, ++ .base.cra_module = THIS_MODULE, ++ .init = jh7110_cryp_cra_init, ++ .exit = jh7110_cryp_cra_exit, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .ivsize = AES_BLOCK_SIZE, ++ .setkey = jh7110_cryp_aes_setkey, ++ .encrypt = jh7110_cryp_aes_ctr_encrypt, ++ .decrypt = jh7110_cryp_aes_ctr_decrypt, ++}, { ++ .base.cra_name = "cfb(aes)", ++ .base.cra_driver_name = "jh7110-cfb-aes", ++ .base.cra_priority = 200, ++ .base.cra_flags = CRYPTO_ALG_ASYNC, ++ .base.cra_blocksize = AES_BLOCK_SIZE, ++ .base.cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .base.cra_alignmask = 0xf, ++ .base.cra_module = THIS_MODULE, ++ .init = jh7110_cryp_cra_init, ++ .exit = jh7110_cryp_cra_exit, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .ivsize = AES_BLOCK_SIZE, ++ .setkey = jh7110_cryp_aes_setkey, ++ .encrypt = jh7110_cryp_aes_cfb_encrypt, ++ .decrypt = jh7110_cryp_aes_cfb_decrypt, ++}, { ++ .base.cra_name = "ofb(aes)", ++ .base.cra_driver_name = "jh7110-ofb-aes", ++ .base.cra_priority = 200, ++ .base.cra_flags = CRYPTO_ALG_ASYNC, ++ .base.cra_blocksize = AES_BLOCK_SIZE, ++ .base.cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .base.cra_alignmask = 0xf, ++ .base.cra_module = THIS_MODULE, ++ .init = jh7110_cryp_cra_init, ++ .exit = jh7110_cryp_cra_exit, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .ivsize = AES_BLOCK_SIZE, ++ .setkey = jh7110_cryp_aes_setkey, ++ .encrypt = jh7110_cryp_aes_ofb_encrypt, ++ .decrypt = jh7110_cryp_aes_ofb_decrypt, ++}, ++}; ++ ++static struct aead_alg aead_algs[] = { ++{ ++ .setkey = jh7110_cryp_aes_aead_setkey, ++ .setauthsize = jh7110_cryp_aes_gcm_setauthsize, ++ .encrypt = jh7110_cryp_aes_gcm_encrypt, ++ .decrypt = jh7110_cryp_aes_gcm_decrypt, ++ .init = jh7110_cryp_aes_aead_init, ++ .exit = jh7110_cryp_aes_aead_exit, ++ .ivsize = GCM_AES_IV_SIZE, ++ .maxauthsize = AES_BLOCK_SIZE, ++ ++ .base = { ++ .cra_name = "gcm(aes)", ++ .cra_driver_name = "jh7110-gcm-aes", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 0xf, ++ .cra_module = THIS_MODULE, ++ }, ++}, { ++ .setkey = jh7110_cryp_aes_aead_setkey, ++ .setauthsize = jh7110_cryp_aes_ccm_setauthsize, ++ .encrypt = jh7110_cryp_aes_ccm_encrypt, ++ .decrypt = jh7110_cryp_aes_ccm_decrypt, ++ .init = jh7110_cryp_aes_aead_init, ++ .exit = jh7110_cryp_aes_aead_exit, ++ .ivsize = AES_BLOCK_SIZE, ++ .maxauthsize = AES_BLOCK_SIZE, ++ ++ .base = { ++ .cra_name = "ccm(aes)", ++ .cra_driver_name = "jh7110-ccm-aes", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = 1, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 0xf, ++ .cra_module = THIS_MODULE, ++ }, ++}, ++}; ++ ++int jh7110_aes_register_algs(void) ++{ ++ int ret; ++ ++ ret = crypto_register_skciphers(crypto_algs, ARRAY_SIZE(crypto_algs)); ++ ++ if (ret) { ++ pr_err("Could not register algs\n"); ++ goto err_algs; ++ } ++ ++ ret = crypto_register_aeads(aead_algs, ARRAY_SIZE(aead_algs)); ++ if (ret) ++ goto err_aead_algs; ++ ++ return 0; ++ ++err_aead_algs: ++ crypto_unregister_skciphers(crypto_algs, ARRAY_SIZE(crypto_algs)); ++err_algs: ++ return ret; ++} ++ ++void jh7110_aes_unregister_algs(void) ++{ ++ crypto_unregister_aeads(aead_algs, ARRAY_SIZE(aead_algs)); ++ crypto_unregister_skciphers(crypto_algs, ARRAY_SIZE(crypto_algs)); ++} +diff --git a/drivers/crypto/starfive/jh7110/jh7110-pka.c b/drivers/crypto/starfive/jh7110/jh7110-pka.c +new file mode 100644 +index 000000000000..2cada3ac51f7 +--- /dev/null ++++ b/drivers/crypto/starfive/jh7110/jh7110-pka.c +@@ -0,0 +1,733 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2021 StarFive, Inc ++ * ++ * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING ++ * CUSTOMERS WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER ++ * FOR THEM TO SAVE TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE ++ * FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY ++ * CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE ++ * BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION ++ * WITH THEIR PRODUCTS. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "jh7110-str.h" ++ ++#define JH7110_RSA_KEYSZ_LEN (2048 >> 2) ++#define JH7110_RSA_KEY_SIZE (JH7110_RSA_KEYSZ_LEN * 3) ++#define JH7110_RSA_MAX_KEYSZ 256 ++#define swap32(val) ( \ ++ (((u32)(val) << 24) & (u32)0xFF000000) | \ ++ (((u32)(val) << 8) & (u32)0x00FF0000) | \ ++ (((u32)(val) >> 8) & (u32)0x0000FF00) | \ ++ (((u32)(val) >> 24) & (u32)0x000000FF)) ++ ++static inline int jh7110_pka_wait_pre(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ u32 status; ++ ++ return readl_relaxed_poll_timeout(sdev->io_base + JH7110_CRYPTO_CASR_OFFSET, status, ++ (status & JH7110_PKA_DONE_FLAGS), 10, 100000); ++} ++ ++static int jh7110_pka_wait_done(struct jh7110_sec_dev *sdev) ++{ ++ int ret = -1; ++ ++ wait_for_completion(&sdev->rsa_comp); ++ reinit_completion(&sdev->rsa_comp); ++ mutex_unlock(&sdev->doing); ++ mutex_lock(&sdev->doing); ++ if (sdev->done_flags & JH7110_PKA_DONE) ++ ret = 0; ++ mutex_unlock(&sdev->doing); ++ ++ return ret; ++} ++ ++static void jh7110_rsa_free_key(struct jh7110_rsa_key *key) ++{ ++ if (key->d) ++ kfree_sensitive(key->d); ++ if (key->e) ++ kfree_sensitive(key->e); ++ if (key->n) ++ kfree_sensitive(key->n); ++ memset(key, 0, sizeof(*key)); ++} ++ ++static unsigned int jh7110_rsa_get_nbit(u8 *pa, u32 snum, int key_sz) ++{ ++ u32 i; ++ u8 value; ++ ++ i = snum >> 3; ++ ++ value = pa[key_sz - i - 1]; ++ value >>= snum & 0x7; ++ value &= 0x1; ++ ++ return value; ++} ++ ++static int jh7110_rsa_domain_transfer(struct jh7110_sec_ctx *ctx, u32 *result, u32 *opa, u8 domain, u32 *mod, int bit_len) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ unsigned int *info; ++ int loop; ++ u8 opsize; ++ u32 temp; ++ ++ mutex_lock(&sdev->doing); ++ ++ opsize = (bit_len - 1) >> 5; ++ rctx->csr.pka_csr.v = 0; ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CACR_OFFSET, rctx->csr.pka_csr.v); ++ ++ info = (unsigned int *)mod; ++ for (loop = 0; loop <= opsize; loop++) ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CANR_OFFSET + loop * 4, info[opsize - loop]); ++ ++ ++ if (domain != 0) { ++ rctx->csr.pka_csr.v = 0; ++ rctx->csr.pka_csr.cln_done = 1; ++ rctx->csr.pka_csr.opsize = opsize; ++ rctx->csr.pka_csr.exposize = opsize; ++ rctx->csr.pka_csr.cmd = CRYPTO_CMD_PRE; ++ rctx->csr.pka_csr.ie = 1; ++ rctx->csr.pka_csr.start = 0x1; ++ rctx->csr.pka_csr.not_r2 = 0x1; ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CACR_OFFSET, rctx->csr.pka_csr.v); ++ ++ jh7110_pka_wait_done(sdev); ++ ++ mutex_lock(&sdev->doing); ++ ++ info = (unsigned int *)opa; ++ for (loop = 0; loop <= opsize; loop++) ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CAAR_OFFSET + loop * 4, info[opsize - loop]); ++ ++ for (loop = 0; loop <= opsize; loop++) { ++ if (loop == 0) ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CAER_OFFSET + loop * 4, 0x1000000); ++ else ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CAER_OFFSET + loop * 4, 0); ++ } ++ ++ rctx->csr.pka_csr.v = 0; ++ rctx->csr.pka_csr.cln_done = 1; ++ rctx->csr.pka_csr.ie = 1; ++ rctx->csr.pka_csr.opsize = opsize; ++ rctx->csr.pka_csr.exposize = opsize; ++ rctx->csr.pka_csr.cmd = CRYPTO_CMD_AERN; ++ rctx->csr.pka_csr.start = 0x1; ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CACR_OFFSET, rctx->csr.pka_csr.v); ++ ++ jh7110_pka_wait_done(sdev); ++ } else { ++ rctx->csr.pka_csr.v = 0; ++ rctx->csr.pka_csr.cln_done = 1; ++ rctx->csr.pka_csr.opsize = opsize; ++ rctx->csr.pka_csr.exposize = opsize; ++ rctx->csr.pka_csr.cmd = CRYPTO_CMD_PRE; ++ rctx->csr.pka_csr.ie = 1; ++ rctx->csr.pka_csr.start = 0x1; ++ rctx->csr.pka_csr.pre_expf = 0x1; ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CACR_OFFSET, rctx->csr.pka_csr.v); ++ ++ jh7110_pka_wait_done(sdev); ++ ++ mutex_lock(&sdev->doing); ++ ++ info = (unsigned int *)opa; ++ for (loop = 0; loop <= opsize; loop++) ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CAER_OFFSET + loop * 4, info[opsize - loop]); ++ ++ rctx->csr.pka_csr.v = 0; ++ rctx->csr.pka_csr.cln_done = 1; ++ rctx->csr.pka_csr.opsize = opsize; ++ rctx->csr.pka_csr.exposize = opsize; ++ rctx->csr.pka_csr.cmd = CRYPTO_CMD_ARN; ++ rctx->csr.pka_csr.ie = 1; ++ rctx->csr.pka_csr.start = 0x1; ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CACR_OFFSET, rctx->csr.pka_csr.v); ++ ++ jh7110_pka_wait_done(sdev); ++ } ++ ++ mutex_lock(&sdev->doing); ++ for (loop = 0; loop <= opsize; loop++) { ++ temp = jh7110_sec_read(sdev, JH7110_CRYPTO_CAAR_OFFSET + 0x4 * loop); ++ result[opsize - loop] = temp; ++ } ++ mutex_unlock(&sdev->doing); ++ ++ return 0; ++} ++ ++static int jh7110_rsa_cpu_powm(struct jh7110_sec_ctx *ctx, u32 *result, u8 *de, u32 *n, int key_sz) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ struct jh7110_rsa_key *key = &ctx->rsa_key; ++ u32 initial; ++ int opsize, mlen, bs, loop; ++ unsigned int *mta; ++ ++ opsize = (key_sz - 1) >> 2; ++ initial = 1; ++ ++ mta = kmalloc(key_sz, GFP_KERNEL); ++ if (!mta) ++ return -ENOMEM; ++ ++ jh7110_rsa_domain_transfer(ctx, mta, sdev->pka_data, 0, n, key_sz << 3); ++ ++ for (loop = 0; loop <= opsize; loop++) ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CANR_OFFSET + loop * 4, n[opsize - loop]); ++ ++ mutex_lock(&sdev->doing); ++ ++ rctx->csr.pka_csr.v = 0; ++ rctx->csr.pka_csr.cln_done = 1; ++ rctx->csr.pka_csr.opsize = opsize; ++ rctx->csr.pka_csr.exposize = opsize; ++ rctx->csr.pka_csr.cmd = CRYPTO_CMD_PRE; ++ rctx->csr.pka_csr.ie = 1; ++ rctx->csr.pka_csr.not_r2 = 0x1; ++ rctx->csr.pka_csr.start = 0x1; ++ ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CACR_OFFSET, rctx->csr.pka_csr.v); ++ ++ jh7110_pka_wait_done(sdev); ++ ++ for (loop = 0; loop <= opsize; loop++) ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CAER_OFFSET + loop * 4, mta[opsize - loop]); ++ ++ for (loop = key->bitlen; loop > 0; loop--) { ++ if (initial) { ++ for (bs = 0; bs <= opsize; bs++) ++ result[bs] = mta[bs]; ++ ++ initial = 0; ++ } else { ++ mlen = jh7110_rsa_get_nbit(de, loop - 1, key_sz); ++ ++ mutex_lock(&sdev->doing); ++ ++ rctx->csr.pka_csr.v = 0; ++ rctx->csr.pka_csr.cln_done = 1; ++ rctx->csr.pka_csr.opsize = opsize; ++ rctx->csr.pka_csr.exposize = opsize; ++ rctx->csr.pka_csr.cmd = CRYPTO_CMD_AARN; ++ rctx->csr.pka_csr.ie = 1; ++ rctx->csr.pka_csr.start = 0x1; ++ ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CACR_OFFSET, rctx->csr.pka_csr.v); ++ ++ jh7110_pka_wait_done(sdev); ++ ++ if (mlen) { ++ mutex_lock(&sdev->doing); ++ ++ rctx->csr.pka_csr.v = 0; ++ rctx->csr.pka_csr.cln_done = 1; ++ rctx->csr.pka_csr.opsize = opsize; ++ rctx->csr.pka_csr.exposize = opsize; ++ rctx->csr.pka_csr.cmd = CRYPTO_CMD_AERN; ++ rctx->csr.pka_csr.ie = 1; ++ rctx->csr.pka_csr.start = 0x1; ++ ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CACR_OFFSET, rctx->csr.pka_csr.v); ++ ++ jh7110_pka_wait_done(sdev); ++ } ++ } ++ } ++ ++ mutex_lock(&sdev->doing); ++ for (loop = 0; loop <= opsize; loop++) { ++ unsigned int temp; ++ ++ temp = jh7110_sec_read(sdev, JH7110_CRYPTO_CAAR_OFFSET + 0x4 * loop); ++ result[opsize - loop] = temp; ++ } ++ mutex_unlock(&sdev->doing); ++ ++ jh7110_rsa_domain_transfer(ctx, result, result, 1, n, key_sz << 3); ++ ++ return 0; ++} ++ ++static int jh7110_rsa_powm(struct jh7110_sec_ctx *ctx, u8 *result, u8 *de, u8 *n, int key_sz) ++{ ++ return jh7110_rsa_cpu_powm(ctx, (u32 *)result, de, (u32 *)n, key_sz); ++} ++ ++static int jh7110_rsa_get_from_sg(struct jh7110_sec_request_ctx *rctx, size_t offset, ++ size_t count, size_t data_offset) ++{ ++ size_t of, ct, index; ++ struct scatterlist *sg = rctx->sg; ++ ++ of = offset; ++ ct = count; ++ ++ while (sg->length <= of) { ++ of -= sg->length; ++ ++ if (!sg_is_last(sg)) { ++ sg = sg_next(sg); ++ continue; ++ } else { ++ return -EBADE; ++ } ++ } ++ ++ index = data_offset; ++ while (ct > 0) { ++ if (sg->length - of >= ct) { ++ scatterwalk_map_and_copy(rctx->sdev->pka_data + index, sg, ++ of, ct, 0); ++ index = index + ct; ++ return index - data_offset; ++ } ++ scatterwalk_map_and_copy(rctx->sdev->pka_data + index, sg, ++ of, sg->length - of, 0); ++ index += sg->length - of; ++ ct = ct - (sg->length - of); ++ ++ of = 0; ++ ++ if (!sg_is_last(sg)) ++ sg = sg_next(sg); ++ else ++ return -EBADE; ++ } ++ return index - data_offset; ++} ++ ++static int jh7110_rsa_enc_core(struct jh7110_sec_ctx *ctx, int enc) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ struct jh7110_rsa_key *key = &ctx->rsa_key; ++ size_t data_len, total, count, data_offset; ++ int ret = 0; ++ unsigned int *info; ++ int loop; ++ ++ sdev->cry_type = JH7110_PKA_TYPE; ++ ++ rctx->csr.pka_csr.v = 0; ++ rctx->csr.pka_csr.reset = 1; ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CACR_OFFSET, rctx->csr.pka_csr.v); ++ ++ if (jh7110_pka_wait_pre(ctx)) ++ dev_dbg(sdev->dev, "this is debug for lophyel pka_casr = %x %s %s %d\n", ++ jh7110_sec_read(sdev, JH7110_CRYPTO_CASR_OFFSET), __FILE__, __func__, __LINE__); ++ ++ rctx->offset = 0; ++ total = 0; ++ ++ while (total < rctx->total_in) { ++ count = min(sdev->data_buf_len, rctx->total_in); ++ count = min(count, key->key_sz); ++ memset(sdev->pka_data, 0, key->key_sz); ++ data_offset = key->key_sz - count; ++ ++ data_len = jh7110_rsa_get_from_sg(rctx, rctx->offset, count, data_offset); ++ if (data_len < 0) ++ return data_len; ++ if (data_len != count) ++ return -EINVAL; ++ ++ if (enc) { ++ key->bitlen = key->e_bitlen; ++ ret = jh7110_rsa_powm(ctx, sdev->pka_data + JH7110_RSA_KEYSZ_LEN, key->e, key->n, key->key_sz); ++ } else { ++ key->bitlen = key->d_bitlen; ++ ret = jh7110_rsa_powm(ctx, sdev->pka_data + JH7110_RSA_KEYSZ_LEN, key->d, key->n, key->key_sz); ++ } ++ ++ ++ if (ret) ++ return ret; ++ ++ info = (unsigned int *)(sdev->pka_data + JH7110_RSA_KEYSZ_LEN); ++ for (loop = 0; loop < key->key_sz >> 2; loop++) ++ dev_dbg(sdev->dev, "result[%d] = %x\n", loop, info[loop]); ++ ++ sg_copy_buffer(rctx->out_sg, sg_nents(rctx->out_sg), sdev->pka_data + JH7110_RSA_KEYSZ_LEN, ++ key->key_sz, rctx->offset, 0); ++ ++ rctx->offset += data_len; ++ total += data_len; ++ } ++ ++ return ret; ++} ++ ++static int jh7110_rsa_enc(struct akcipher_request *req) ++{ ++ struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); ++ struct jh7110_sec_ctx *ctx = akcipher_tfm_ctx(tfm); ++ struct jh7110_rsa_key *key = &ctx->rsa_key; ++ struct jh7110_sec_request_ctx *rctx = akcipher_request_ctx(req); ++ int ret = 0; ++ ++ if (key->key_sz > JH7110_RSA_MAX_KEYSZ) { ++ akcipher_request_set_tfm(req, ctx->fallback.akcipher); ++ ret = crypto_akcipher_encrypt(req); ++ akcipher_request_set_tfm(req, tfm); ++ return ret; ++ } ++ ++ if (unlikely(!key->n || !key->e)) ++ return -EINVAL; ++ ++ if (req->dst_len < key->key_sz) { ++ req->dst_len = key->key_sz; ++ dev_err(ctx->sdev->dev, "Output buffer length less than parameter n\n"); ++ return -EOVERFLOW; ++ } ++ ++ mutex_lock(&ctx->sdev->rsa_lock); ++ ++ rctx->sg = req->src; ++ rctx->out_sg = req->dst; ++ rctx->sdev = ctx->sdev; ++ ctx->rctx = rctx; ++ rctx->total_in = req->src_len; ++ rctx->total_out = req->dst_len; ++ ++ ret = jh7110_rsa_enc_core(ctx, 1); ++ ++ mutex_unlock(&ctx->sdev->rsa_lock); ++ ++ return ret; ++} ++ ++static int jh7110_rsa_dec(struct akcipher_request *req) ++{ ++ struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); ++ struct jh7110_sec_ctx *ctx = akcipher_tfm_ctx(tfm); ++ struct jh7110_rsa_key *key = &ctx->rsa_key; ++ struct jh7110_sec_request_ctx *rctx = akcipher_request_ctx(req); ++ int ret = 0; ++ ++ if (key->key_sz > JH7110_RSA_MAX_KEYSZ) { ++ akcipher_request_set_tfm(req, ctx->fallback.akcipher); ++ ret = crypto_akcipher_decrypt(req); ++ akcipher_request_set_tfm(req, tfm); ++ return ret; ++ } ++ ++ if (unlikely(!key->n || !key->d)) ++ return -EINVAL; ++ ++ if (req->dst_len < key->key_sz) { ++ req->dst_len = key->key_sz; ++ dev_err(ctx->sdev->dev, "Output buffer length less than parameter n\n"); ++ return -EOVERFLOW; ++ } ++ ++ mutex_lock(&ctx->sdev->rsa_lock); ++ ++ rctx->sg = req->src; ++ rctx->out_sg = req->dst; ++ rctx->sdev = ctx->sdev; ++ ctx->rctx = rctx; ++ rctx->total_in = req->src_len; ++ rctx->total_out = req->dst_len; ++ ++ ret = jh7110_rsa_enc_core(ctx, 0); ++ ++ mutex_unlock(&ctx->sdev->rsa_lock); ++ ++ return ret; ++} ++ ++static unsigned long jh7110_rsa_enc_fn_id(unsigned int len) ++{ ++ unsigned int bitslen = len << 3; ++ ++ if (bitslen & 0x1f) ++ return -EINVAL; ++ ++ if (bitslen > 2048) ++ return false; ++ ++ return true; ++} ++ ++static int jh7110_rsa_set_n(struct jh7110_rsa_key *rsa_key, const char *value, ++ size_t vlen) ++{ ++ const char *ptr = value; ++ int ret; ++ ++ while (!*ptr && vlen) { ++ ptr++; ++ vlen--; ++ } ++ rsa_key->key_sz = vlen; ++ ret = -EINVAL; ++ /* invalid key size provided */ ++ if (!jh7110_rsa_enc_fn_id(rsa_key->key_sz)) ++ return 0; ++ ++ ret = -ENOMEM; ++ rsa_key->n = kmemdup(ptr, rsa_key->key_sz, GFP_KERNEL); ++ if (!rsa_key->n) ++ goto err; ++ ++ return 1; ++ err: ++ rsa_key->key_sz = 0; ++ rsa_key->n = NULL; ++ return ret; ++} ++ ++static int jh7110_rsa_set_e(struct jh7110_rsa_key *rsa_key, const char *value, ++ size_t vlen) ++{ ++ const char *ptr = value; ++ unsigned char pt; ++ int loop; ++ ++ while (!*ptr && vlen) { ++ ptr++; ++ vlen--; ++ } ++ pt = *ptr; ++ ++ if (!rsa_key->key_sz || !vlen || vlen > rsa_key->key_sz) { ++ rsa_key->e = NULL; ++ return -EINVAL; ++ } ++ ++ rsa_key->e = kzalloc(rsa_key->key_sz, GFP_KERNEL); ++ if (!rsa_key->e) ++ return -ENOMEM; ++ ++ for (loop = 8; loop > 0; loop--) { ++ if (pt >> (loop - 1)) ++ break; ++ } ++ ++ rsa_key->e_bitlen = (vlen - 1) * 8 + loop; ++ ++ memcpy(rsa_key->e + (rsa_key->key_sz - vlen), ptr, vlen); ++ ++ return 0; ++} ++ ++static int jh7110_rsa_set_d(struct jh7110_rsa_key *rsa_key, const char *value, ++ size_t vlen) ++{ ++ const char *ptr = value; ++ unsigned char pt; ++ int loop; ++ int ret; ++ ++ while (!*ptr && vlen) { ++ ptr++; ++ vlen--; ++ } ++ pt = *ptr; ++ ++ ret = -EINVAL; ++ if (!rsa_key->key_sz || !vlen || vlen > rsa_key->key_sz) ++ goto err; ++ ++ ret = -ENOMEM; ++ rsa_key->d = kzalloc(rsa_key->key_sz, GFP_KERNEL); ++ if (!rsa_key->d) ++ goto err; ++ ++ for (loop = 8; loop > 0; loop--) { ++ pr_debug("this is debug for lophyel loop = %d pt >> (loop - 1) = %x value[%d] = %x %s %s %d\n", ++ loop, pt >> (loop - 1), loop, value[loop], __FILE__, __func__, __LINE__); ++ if (pt >> (loop - 1)) ++ break; ++ } ++ ++ rsa_key->d_bitlen = (vlen - 1) * 8 + loop; ++ ++ memcpy(rsa_key->d + (rsa_key->key_sz - vlen), ptr, vlen); ++ ++ return 0; ++ err: ++ rsa_key->d = NULL; ++ return ret; ++} ++ ++static int jh7110_rsa_setkey(struct crypto_akcipher *tfm, const void *key, ++ unsigned int keylen, bool private) ++{ ++ struct jh7110_sec_ctx *ctx = akcipher_tfm_ctx(tfm); ++ struct rsa_key raw_key = {NULL}; ++ struct jh7110_rsa_key *rsa_key = &ctx->rsa_key; ++ int ret; ++ ++ jh7110_rsa_free_key(rsa_key); ++ ++ if (private) ++ ret = rsa_parse_priv_key(&raw_key, key, keylen); ++ else ++ ret = rsa_parse_pub_key(&raw_key, key, keylen); ++ if (ret < 0) ++ goto err; ++ ++ ret = jh7110_rsa_set_n(rsa_key, raw_key.n, raw_key.n_sz); ++ if (ret <= 0) ++ return ret; ++ ++ ret = jh7110_rsa_set_e(rsa_key, raw_key.e, raw_key.e_sz); ++ if (ret < 0) ++ goto err; ++ ++ if (private) { ++ ret = jh7110_rsa_set_d(rsa_key, raw_key.d, raw_key.d_sz); ++ if (ret < 0) ++ goto err; ++ } ++ ++ if (!rsa_key->n || !rsa_key->e) { ++ /* invalid key provided */ ++ ret = -EINVAL; ++ goto err; ++ } ++ if (private && !rsa_key->d) { ++ /* invalid private key provided */ ++ ret = -EINVAL; ++ goto err; ++ } ++ ++ return 0; ++ err: ++ jh7110_rsa_free_key(rsa_key); ++ return ret; ++} ++ ++static int jh7110_rsa_set_pub_key(struct crypto_akcipher *tfm, const void *key, ++ unsigned int keylen) ++{ ++ struct jh7110_sec_ctx *ctx = akcipher_tfm_ctx(tfm); ++ int ret; ++ ++ ret = crypto_akcipher_set_pub_key(ctx->fallback.akcipher, key, keylen); ++ if (ret) ++ return ret; ++ ++ return jh7110_rsa_setkey(tfm, key, keylen, false); ++} ++ ++static int jh7110_rsa_set_priv_key(struct crypto_akcipher *tfm, const void *key, ++ unsigned int keylen) ++{ ++ struct jh7110_sec_ctx *ctx = akcipher_tfm_ctx(tfm); ++ int ret; ++ ++ ret = crypto_akcipher_set_priv_key(ctx->fallback.akcipher, key, keylen); ++ if (ret) ++ return ret; ++ ++ return jh7110_rsa_setkey(tfm, key, keylen, true); ++} ++ ++static unsigned int jh7110_rsa_max_size(struct crypto_akcipher *tfm) ++{ ++ struct jh7110_sec_ctx *ctx = akcipher_tfm_ctx(tfm); ++ ++ /* For key sizes > 2Kb, use software tfm */ ++ if (ctx->rsa_key.key_sz > JH7110_RSA_MAX_KEYSZ) ++ return crypto_akcipher_maxsize(ctx->fallback.akcipher); ++ ++ return ctx->rsa_key.key_sz; ++} ++ ++/* Per session pkc's driver context creation function */ ++static int jh7110_rsa_init_tfm(struct crypto_akcipher *tfm) ++{ ++ struct jh7110_sec_ctx *ctx = akcipher_tfm_ctx(tfm); ++ ++ ctx->fallback.akcipher = crypto_alloc_akcipher("rsa-generic", 0, 0); ++ if (IS_ERR(ctx->fallback.akcipher)) { ++ pr_err("Can not alloc_akcipher!\n"); ++ return PTR_ERR(ctx->fallback.akcipher); ++ } ++ ++ ctx->sdev = jh7110_sec_find_dev(ctx); ++ if (!ctx->sdev) { ++ crypto_free_akcipher(ctx->fallback.akcipher); ++ return -ENODEV; ++ } ++ ++ akcipher_set_reqsize(tfm, sizeof(struct jh7110_sec_request_ctx)); ++ ++ return 0; ++} ++ ++/* Per session pkc's driver context cleanup function */ ++static void jh7110_rsa_exit_tfm(struct crypto_akcipher *tfm) ++{ ++ struct jh7110_sec_ctx *ctx = akcipher_tfm_ctx(tfm); ++ struct jh7110_rsa_key *key = (struct jh7110_rsa_key *)&ctx->rsa_key; ++ ++ crypto_free_akcipher(ctx->fallback.akcipher); ++ jh7110_rsa_free_key(key); ++} ++ ++static struct akcipher_alg jh7110_rsa = { ++ .encrypt = jh7110_rsa_enc, ++ .decrypt = jh7110_rsa_dec, ++ .sign = jh7110_rsa_dec, ++ .verify = jh7110_rsa_enc, ++ .set_pub_key = jh7110_rsa_set_pub_key, ++ .set_priv_key = jh7110_rsa_set_priv_key, ++ .max_size = jh7110_rsa_max_size, ++ .init = jh7110_rsa_init_tfm, ++ .exit = jh7110_rsa_exit_tfm, ++ .reqsize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "rsa", ++ .cra_driver_name = "rsa-jh7110", ++ .cra_flags = CRYPTO_ALG_TYPE_AKCIPHER | ++ CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_priority = 3000, ++ .cra_module = THIS_MODULE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ }, ++}; ++ ++int jh7110_pka_register_algs(void) ++{ ++ int ret = 0; ++ ++ ret = crypto_register_akcipher(&jh7110_rsa); ++ if (ret) ++ pr_err("JH7110 RSA registration failed\n"); ++ ++ return ret; ++} ++ ++void jh7110_pka_unregister_algs(void) ++{ ++ crypto_unregister_akcipher(&jh7110_rsa); ++} +diff --git a/drivers/crypto/starfive/jh7110/jh7110-regs.h b/drivers/crypto/starfive/jh7110/jh7110-regs.h +new file mode 100644 +index 000000000000..f484b04bb7a8 +--- /dev/null ++++ b/drivers/crypto/starfive/jh7110/jh7110-regs.h +@@ -0,0 +1,237 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright 2021 StarFive, Inc ++ */ ++#ifndef __JH7110_REGS_H__ ++#define __JH7110_REGS_H__ ++ ++#include ++#include ++ ++#define JH7110_ALG_CR_OFFSET 0x0 ++#define JH7110_ALG_FIFO_OFFSET 0x4 ++#define JH7110_IE_MASK_OFFSET 0x8 ++#define JH7110_IE_FLAG_OFFSET 0xc ++#define JH7110_DMA_IN_LEN_OFFSET 0x10 ++#define JH7110_DMA_OUT_LEN_OFFSET 0x14 ++ ++#define JH7110_AES_REGS_OFFSET 0x100 ++#define JH7110_SHA_REGS_OFFSET 0x300 ++#define JH7110_CRYPTO_REGS_OFFSET 0x400 ++ ++union jh7110_alg_cr { ++ u32 v; ++ struct { ++ u32 start :1; ++ u32 aes_dma_en :1; ++ u32 des_dma_en :1; ++ u32 sha_dma_en :1; ++ u32 alg_done :1; ++ u32 rsvd_0 :3; ++ u32 clear :1; ++ u32 rsvd_1 :23; ++ }; ++}; ++ ++union jh7110_ie_mask { ++ u32 v; ++ struct { ++ u32 aes_ie_mask :1; ++ u32 des_ie_mask :1; ++ u32 sha_ie_mask :1; ++ u32 crypto_ie_mask :1; ++ u32 rsvd_0 :28; ++ }; ++}; ++ ++union jh7110_ie_flag { ++ u32 v; ++ struct { ++ u32 aes_ie_done :1; ++ u32 des_ie_done :1; ++ u32 sha_ie_done :1; ++ u32 crypto_ie_done :1; ++ u32 rsvd_0 :28; ++ }; ++}; ++ ++#define JH7110_CRYPTO_CACR_OFFSET (JH7110_CRYPTO_REGS_OFFSET + 0x0) ++#define JH7110_CRYPTO_CASR_OFFSET (JH7110_CRYPTO_REGS_OFFSET + 0x4) ++#define JH7110_CRYPTO_CAAR_OFFSET (JH7110_CRYPTO_REGS_OFFSET + 0x8) ++#define JH7110_CRYPTO_CAER_OFFSET (JH7110_CRYPTO_REGS_OFFSET + 0x108) ++#define JH7110_CRYPTO_CANR_OFFSET (JH7110_CRYPTO_REGS_OFFSET + 0x208) ++#define JH7110_CRYPTO_CAAFR_OFFSET (JH7110_CRYPTO_REGS_OFFSET + 0x308) ++#define JH7110_CRYPTO_CAEFR_OFFSET (JH7110_CRYPTO_REGS_OFFSET + 0x30c) ++#define JH7110_CRYPTO_CANFR_OFFSET (JH7110_CRYPTO_REGS_OFFSET + 0x310) ++#define JH7110_FIFO_COUNTER_OFFSET (JH7110_CRYPTO_REGS_OFFSET + 0x314) ++ ++// R^2 mod N and N0' ++#define CRYPTO_CMD_PRE 0x0 ++// (A + A) mod N, ==> A ++#define CRYPTO_CMD_AAN 0x1 ++// A ^ E mod N ==> A ++#define CRYPTO_CMD_AMEN 0x2 ++// A + E mod N ==> A ++#define CRYPTO_CMD_AAEN 0x3 ++// A - E mod N ==> A ++#define CRYPTO_CMD_ADEN 0x4 ++// A * R mod N ==> A ++#define CRYPTO_CMD_ARN 0x5 ++// A * E * R mod N ==> A ++#define CRYPTO_CMD_AERN 0x6 ++// A * A * R mod N ==> A ++#define CRYPTO_CMD_AARN 0x7 ++// ECC2P ==> A ++#define CRYPTO_CMD_ECC2P 0x8 ++// ECCPQ ==> A ++#define CRYPTO_CMD_ECCPQ 0x9 ++ ++union jh7110_crypto_cacr { ++ u32 v; ++ struct { ++ u32 start :1; ++ u32 reset :1; ++ u32 ie :1; ++ u32 rsvd_0 :1; ++ u32 fifo_mode :1; ++ u32 not_r2 :1; ++ u32 ecc_sub :1; ++ u32 pre_expf :1; ++ ++ u32 cmd :4; ++ u32 rsvd_1 :1; ++ u32 ctrl_dummy :1; ++ u32 ctrl_false :1; ++ u32 cln_done :1; ++ ++ u32 opsize :6; ++ u32 rsvd_2 :2; ++ ++ u32 exposize :6; ++ u32 rsvd_3 :1; ++ u32 bigendian :1; ++ }; ++}; ++ ++union jh7110_crypto_casr { ++ u32 v; ++ struct { ++#define JH7110_PKA_DONE_FLAGS BIT(0) ++ u32 done :1; ++ u32 rsvd_0 :31; ++ }; ++}; ++ ++#define JH7110_AES_AESDIO0R (JH7110_AES_REGS_OFFSET + 0x0) ++#define JH7110_AES_KEY0 (JH7110_AES_REGS_OFFSET + 0x4) ++#define JH7110_AES_KEY1 (JH7110_AES_REGS_OFFSET + 0x8) ++#define JH7110_AES_KEY2 (JH7110_AES_REGS_OFFSET + 0xC) ++#define JH7110_AES_KEY3 (JH7110_AES_REGS_OFFSET + 0x10) ++#define JH7110_AES_KEY4 (JH7110_AES_REGS_OFFSET + 0x14) ++#define JH7110_AES_KEY5 (JH7110_AES_REGS_OFFSET + 0x18) ++#define JH7110_AES_KEY6 (JH7110_AES_REGS_OFFSET + 0x1C) ++#define JH7110_AES_KEY7 (JH7110_AES_REGS_OFFSET + 0x20) ++#define JH7110_AES_CSR (JH7110_AES_REGS_OFFSET + 0x24) ++#define JH7110_AES_IV0 (JH7110_AES_REGS_OFFSET + 0x28) ++#define JH7110_AES_IV1 (JH7110_AES_REGS_OFFSET + 0x2C) ++#define JH7110_AES_IV2 (JH7110_AES_REGS_OFFSET + 0x30) ++#define JH7110_AES_IV3 (JH7110_AES_REGS_OFFSET + 0x34) ++#define JH7110_AES_NONCE0 (JH7110_AES_REGS_OFFSET + 0x3C) ++#define JH7110_AES_NONCE1 (JH7110_AES_REGS_OFFSET + 0x40) ++#define JH7110_AES_NONCE2 (JH7110_AES_REGS_OFFSET + 0x44) ++#define JH7110_AES_NONCE3 (JH7110_AES_REGS_OFFSET + 0x48) ++#define JH7110_AES_ALEN0 (JH7110_AES_REGS_OFFSET + 0x4C) ++#define JH7110_AES_ALEN1 (JH7110_AES_REGS_OFFSET + 0x50) ++#define JH7110_AES_MLEN0 (JH7110_AES_REGS_OFFSET + 0x54) ++#define JH7110_AES_MLEN1 (JH7110_AES_REGS_OFFSET + 0x58) ++#define JH7110_AES_IVLEN (JH7110_AES_REGS_OFFSET + 0x5C) ++ ++union jh7110_aes_csr { ++ u32 v; ++ struct { ++ u32 cmode :1; ++#define JH7110_AES_KEYMODE_128 0x0 ++#define JH7110_AES_KEYMODE_192 0x1 ++#define JH7110_AES_KEYMODE_256 0x2 ++ u32 keymode :2; ++#define JH7110_AES_BUSY BIT(3) ++ u32 busy :1; ++ u32 done :1; ++#define JH7110_AES_KEY_DONE BIT(5) ++ u32 krdy :1; ++ u32 aesrst :1; ++ u32 aesie :1; ++ ++#define JH7110_AES_CCM_START BIT(8) ++ u32 ccm_start :1; ++#define JH7110_AES_MODE_ECB 0x0 ++#define JH7110_AES_MODE_CBC 0x1 ++#define JH7110_AES_MODE_CFB 0x2 ++#define JH7110_AES_MODE_OFB 0x3 ++#define JH7110_AES_MODE_CTR 0x4 ++#define JH7110_AES_MODE_CCM 0x5 ++#define JH7110_AES_MODE_GCM 0x6 ++ u32 mode :3; ++#define JH7110_AES_GCM_START BIT(12) ++ u32 gcm_start :1; ++#define JH7110_AES_GCM_DONE BIT(13) ++ u32 gcm_done :1; ++ u32 delay_aes :1; ++ u32 vaes_start :1; ++ ++ u32 rsvd_0 :8; ++ ++#define JH7110_AES_MODE_XFB_1 0x0 ++#define JH7110_AES_MODE_XFB_128 0x5 ++ u32 stream_mode :3; ++ u32 rsvd_1 :5; ++ }; ++}; ++ ++#define JH7110_SHA_SHACSR (JH7110_SHA_REGS_OFFSET + 0x0) ++#define JH7110_SHA_SHAWDR (JH7110_SHA_REGS_OFFSET + 0x4) ++#define JH7110_SHA_SHARDR (JH7110_SHA_REGS_OFFSET + 0x8) ++#define JH7110_SHA_SHAWSR (JH7110_SHA_REGS_OFFSET + 0xC) ++#define JH7110_SHA_SHAWLEN3 (JH7110_SHA_REGS_OFFSET + 0x10) ++#define JH7110_SHA_SHAWLEN2 (JH7110_SHA_REGS_OFFSET + 0x14) ++#define JH7110_SHA_SHAWLEN1 (JH7110_SHA_REGS_OFFSET + 0x18) ++#define JH7110_SHA_SHAWLEN0 (JH7110_SHA_REGS_OFFSET + 0x1C) ++#define JH7110_SHA_SHAWKR (JH7110_SHA_REGS_OFFSET + 0x20) ++#define JH7110_SHA_SHAWKLEN (JH7110_SHA_REGS_OFFSET + 0x24) ++ ++union jh7110_sha_shacsr { ++ u32 v; ++ struct { ++ u32 start :1; ++ u32 reset :1; ++ u32 ie :1; ++ u32 firstb :1; ++#define JH7110_SHA_SM3 0x0 ++#define JH7110_SHA_SHA0 0x1 ++#define JH7110_SHA_SHA1 0x2 ++#define JH7110_SHA_SHA224 0x3 ++#define JH7110_SHA_SHA256 0x4 ++#define JH7110_SHA_SHA384 0x5 ++#define JH7110_SHA_SHA512 0x6 ++#define JH7110_SHA_MODE_MASK 0x7 ++ u32 mode :3; ++ u32 rsvd_0 :1; ++ ++ u32 final :1; ++ u32 rsvd_1 :2; ++#define JH7110_SHA_HMAC_FLAGS 0x800 ++ u32 hmac :1; ++ u32 rsvd_2 :1; ++#define JH7110_SHA_KEY_DONE BIT(13) ++ u32 key_done :1; ++ u32 key_flag :1; ++#define JH7110_SHA_HMAC_DONE BIT(15) ++ u32 hmac_done :1; ++#define JH7110_SHA_BUSY BIT(16) ++ u32 busy :1; ++ u32 shadone :1; ++ u32 rsvd_3 :14; ++ }; ++}; ++ ++#endif +diff --git a/drivers/crypto/starfive/jh7110/jh7110-sec.c b/drivers/crypto/starfive/jh7110/jh7110-sec.c +new file mode 100644 +index 000000000000..b328a0c83a28 +--- /dev/null ++++ b/drivers/crypto/starfive/jh7110/jh7110-sec.c +@@ -0,0 +1,432 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2021 StarFive, Inc ++ * Copyright 2021 StarFive, Inc ++ * ++ * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING ++ * CUSTOMERS WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER ++ * FOR THEM TO SAVE TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE ++ * FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY ++ * CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE ++ * BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION ++ * WITH THEIR PRODUCTS. ++ */ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "jh7110-str.h" ++ ++#define DRIVER_NAME "jh7110-sec" ++ ++struct jh7110_dev_list { ++ struct list_head dev_list; ++ spinlock_t lock; /* protect dev_list */ ++}; ++ ++static struct jh7110_dev_list dev_list = { ++ .dev_list = LIST_HEAD_INIT(dev_list.dev_list), ++ .lock = __SPIN_LOCK_UNLOCKED(dev_list.lock), ++}; ++ ++struct jh7110_sec_dev *jh7110_sec_find_dev(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = NULL, *tmp; ++ ++ spin_lock_bh(&dev_list.lock); ++ if (!ctx->sdev) { ++ list_for_each_entry(tmp, &dev_list.dev_list, list) { ++ sdev = tmp; ++ break; ++ } ++ ctx->sdev = sdev; ++ } else { ++ sdev = ctx->sdev; ++ } ++ ++ spin_unlock_bh(&dev_list.lock); ++ ++ return sdev; ++} ++ ++static irqreturn_t jh7110_cryp_irq_thread(int irq, void *arg) ++{ ++ struct jh7110_sec_dev *sdev = (struct jh7110_sec_dev *) arg; ++ ++ if (sdev->use_dma) ++ if (sdev->cry_type != JH7110_PKA_TYPE) ++ return IRQ_HANDLED; ++ ++ ++ complete(&sdev->rsa_comp); ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t jh7110_cryp_irq(int irq, void *arg) ++{ ++ struct jh7110_sec_dev *sdev = (struct jh7110_sec_dev *) arg; ++ union jh7110_sha_shacsr sha_csr; ++ union jh7110_aes_csr aes_csr; ++ union jh7110_crypto_cacr cry_cacr; ++ union jh7110_crypto_casr cry_casr; ++ irqreturn_t ret = IRQ_WAKE_THREAD; ++ ++ switch (sdev->cry_type) { ++ case JH7110_SHA_TYPE: ++ sha_csr.v = jh7110_sec_read(sdev, JH7110_SHA_SHACSR); ++ if (sha_csr.hmac_done) ++ sdev->done_flags |= JH7110_SHA_HMAC_DONE; ++ if (sha_csr.shadone) ++ sdev->done_flags |= JH7110_SHA_SHA_DONE; ++ ++ jh7110_sec_write(sdev, JH7110_SHA_SHACSR, sha_csr.v | BIT(15) | BIT(17)); ++ break; ++ case JH7110_AES_TYPE: ++ aes_csr.v = jh7110_sec_read(sdev, JH7110_AES_CSR); ++ if (aes_csr.done) { ++ sdev->done_flags |= JH7110_AES_DONE; ++ jh7110_sec_write(sdev, JH7110_AES_CSR, aes_csr.v); ++ } ++ ++ break; ++ case JH7110_PKA_TYPE: ++ cry_casr.v = jh7110_sec_read(sdev, JH7110_CRYPTO_CASR_OFFSET); ++ if (cry_casr.done) ++ sdev->done_flags |= JH7110_PKA_DONE_FLAGS; ++ cry_cacr.v = jh7110_sec_read(sdev, JH7110_CRYPTO_CACR_OFFSET); ++ cry_cacr.cln_done = 1; ++ jh7110_sec_write(sdev, JH7110_CRYPTO_CACR_OFFSET, cry_cacr.v); ++ break; ++ default: ++ break; ++ } ++ return ret; ++} ++ ++static const struct of_device_id jh7110_dt_ids[] = { ++ { .compatible = "starfive,jh7110-sec", .data = NULL}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, jh7110_dt_ids); ++ ++static int jh7110_dma_init(struct jh7110_sec_dev *sdev) ++{ ++ dma_cap_mask_t mask; ++ int err; ++ ++ sdev->sec_xm_m = NULL; ++ sdev->sec_xm_p = NULL; ++ ++ dma_cap_zero(mask); ++ dma_cap_set(DMA_SLAVE, mask); ++ ++ sdev->sec_xm_m = dma_request_chan(sdev->dev, "sec_m"); ++ if (IS_ERR(sdev->sec_xm_m)) { ++ dev_err(sdev->dev, "Unable to request sec_m dma channel in DMA channel\n"); ++ return PTR_ERR(sdev->sec_xm_m); ++ } ++ ++ sdev->sec_xm_p = dma_request_chan(sdev->dev, "sec_p"); ++ if (IS_ERR(sdev->sec_xm_p)) { ++ dev_err(sdev->dev, "Unable to request sec_p dma channel in DMA channel\n"); ++ goto err_sha_out; ++ } ++ ++ init_completion(&sdev->sec_comp_m); ++ init_completion(&sdev->sec_comp_p); ++ ++ return 0; ++ ++err_sha_out: ++ dma_release_channel(sdev->sec_xm_m); ++ ++ return err; ++} ++ ++static void jh7110_dma_cleanup(struct jh7110_sec_dev *sdev) ++{ ++ dma_release_channel(sdev->sec_xm_p); ++ dma_release_channel(sdev->sec_xm_m); ++} ++struct gpio_desc *gpio; ++ ++static int jh7110_cryp_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct jh7110_sec_dev *sdev; ++ struct resource *res; ++ int pages = 0; ++ int ret; ++ ++ sdev = devm_kzalloc(dev, sizeof(*sdev), GFP_KERNEL); ++ if (!sdev) ++ return -ENOMEM; ++ ++ sdev->dev = dev; ++ ++ mutex_init(&sdev->lock); ++ mutex_init(&sdev->doing); ++ mutex_init(&sdev->pl080_doing); ++ mutex_init(&sdev->sha_lock); ++ mutex_init(&sdev->aes_lock); ++ mutex_init(&sdev->rsa_lock); ++ init_completion(&sdev->rsa_comp); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "secreg"); ++ sdev->io_base = devm_ioremap_resource(dev, res); ++ if (IS_ERR(sdev->io_base)) ++ return PTR_ERR(sdev->io_base); ++ ++ sdev->io_phys_base = res->start; ++ ++ sdev->dma_base = ioremap(0x16008000, 0x4000); ++ if (IS_ERR(sdev->dma_base)) ++ return PTR_ERR(sdev->dma_base); ++ ++ sdev->use_side_channel_mitigation = device_property_read_bool(dev, "enable-side-channel-mitigation"); ++ sdev->use_dma = device_property_read_bool(dev, "enable-dma"); ++ sdev->dma_maxburst = 32; ++ ++ sdev->secirq = platform_get_irq_byname(pdev, "secirq"); ++ sdev->secirq = platform_get_irq(pdev, 0); ++ if (sdev->secirq < 0) { ++ dev_err(dev, "Cannot get IRQ resource\n"); ++ return sdev->secirq; ++ } ++ ++ ret = devm_request_threaded_irq(dev, sdev->secirq, jh7110_cryp_irq, ++ jh7110_cryp_irq_thread, IRQF_SHARED, ++ dev_name(dev), sdev); ++ if (ret) { ++ dev_err(&pdev->dev, "Can't get interrupt working.\n"); ++ return ret; ++ } ++ ++ sdev->sec_hclk = devm_clk_get(dev, "sec_hclk"); ++ if (IS_ERR(sdev->sec_hclk)) { ++ dev_err(dev, "failed to get sec clock\n"); ++ return PTR_ERR(sdev->sec_hclk); ++ } ++ ++ sdev->sec_ahb = devm_clk_get(dev, "sec_ahb"); ++ if (IS_ERR(sdev->sec_ahb)) { ++ dev_err(dev, "failed to get sec clock\n"); ++ return PTR_ERR(sdev->sec_ahb); ++ } ++ ++ pm_runtime_set_autosuspend_delay(dev, 50); ++ pm_runtime_use_autosuspend(dev); ++ ++ pm_runtime_get_noresume(dev); ++ pm_runtime_set_active(dev); ++ ++ if (!pm_runtime_enabled(dev)) ++ pm_runtime_enable(dev); ++ ++ sdev->rst_hresetn = devm_reset_control_get_shared(sdev->dev, "sec_hre"); ++ if (IS_ERR(sdev->rst_hresetn)) { ++ dev_err(sdev->dev, "failed to get sec reset\n"); ++ return PTR_ERR(sdev->rst_hresetn); ++ } ++ ++ clk_prepare_enable(sdev->sec_hclk); ++ clk_prepare_enable(sdev->sec_ahb); ++ reset_control_deassert(sdev->rst_hresetn); ++ ++ platform_set_drvdata(pdev, sdev); ++ ++ spin_lock(&dev_list.lock); ++ list_add(&sdev->list, &dev_list.dev_list); ++ spin_unlock(&dev_list.lock); ++ ++ if (sdev->use_dma) { ++ ret = jh7110_dma_init(sdev); ++ if (ret) { ++ dev_err(dev, "Cannot initial dma chan\n"); ++ goto err_dma_init; ++ } ++ } ++ ++ pages = get_order(JH7110_MSG_BUFFER_SIZE); ++ ++ sdev->sha_data = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA32, pages); ++ if (!sdev->sha_data) { ++ dev_err(sdev->dev, "Can't allocate aes buffer pages when unaligned\n"); ++ goto err_sha_data; ++ } ++ ++ sdev->aes_data = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA32, pages); ++ if (!sdev->aes_data) { ++ dev_err(sdev->dev, "Can't allocate aes buffer pages when unaligned\n"); ++ goto err_aes_data; ++ } ++ ++ sdev->pka_data = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA32, pages); ++ if (!sdev->pka_data) { ++ dev_err(sdev->dev, "Can't allocate pka buffer pages when unaligned\n"); ++ goto err_pka_data; ++ } ++ ++ sdev->pages_count = pages >> 1; ++ sdev->data_buf_len = JH7110_MSG_BUFFER_SIZE >> 1; ++ ++ /* Initialize crypto engine */ ++ sdev->engine = crypto_engine_alloc_init(dev, 1); ++ if (!sdev->engine) { ++ ret = -ENOMEM; ++ goto err_engine; ++ } ++ ++ ret = crypto_engine_start(sdev->engine); ++ if (ret) ++ goto err_engine_start; ++ ++ ret = jh7110_hash_register_algs(); ++ if (ret) ++ goto err_algs_sha; ++ ++ ret = jh7110_aes_register_algs(); ++ if (ret) ++ goto err_algs_aes; ++ ++ ret = jh7110_pka_register_algs(); ++ if (ret) ++ goto err_algs_pka; ++ ++ dev_info(dev, "Initialized\n"); ++ ++ pm_runtime_put_sync(dev); ++ ++ return 0; ++ err_algs_pka: ++ jh7110_aes_unregister_algs(); ++ err_algs_aes: ++ jh7110_hash_unregister_algs(); ++ err_algs_sha: ++ crypto_engine_stop(sdev->engine); ++ err_engine_start: ++ crypto_engine_exit(sdev->engine); ++ err_engine: ++ free_pages((unsigned long)sdev->pka_data, pages); ++ err_pka_data: ++ free_pages((unsigned long)sdev->aes_data, pages); ++ err_aes_data: ++ free_pages((unsigned long)sdev->sha_data, pages); ++ err_sha_data: ++ jh7110_dma_cleanup(sdev); ++ err_dma_init: ++ spin_lock(&dev_list.lock); ++ list_del(&sdev->list); ++ spin_unlock(&dev_list.lock); ++ ++ return ret; ++} ++ ++static int jh7110_cryp_remove(struct platform_device *pdev) ++{ ++ struct jh7110_sec_dev *sdev = platform_get_drvdata(pdev); ++ int ret; ++ ++ if (!sdev) ++ return -ENODEV; ++ ++ ret = pm_runtime_resume_and_get(sdev->dev); ++ if (ret < 0) ++ return ret; ++ ++ jh7110_pka_unregister_algs(); ++ jh7110_aes_unregister_algs(); ++ jh7110_hash_unregister_algs(); ++ ++ crypto_engine_stop(sdev->engine); ++ crypto_engine_exit(sdev->engine); ++ ++ jh7110_dma_cleanup(sdev); ++ ++ free_pages((unsigned long)sdev->pka_data, sdev->pages_count); ++ free_pages((unsigned long)sdev->aes_data, sdev->pages_count); ++ free_pages((unsigned long)sdev->sha_data, sdev->pages_count); ++ sdev->pka_data = NULL; ++ sdev->aes_data = NULL; ++ sdev->sha_data = NULL; ++ ++ spin_lock(&dev_list.lock); ++ list_del(&sdev->list); ++ spin_unlock(&dev_list.lock); ++ ++ pm_runtime_disable(sdev->dev); ++ pm_runtime_put_noidle(sdev->dev); ++ ++ clk_disable_unprepare(sdev->sec_hclk); ++ clk_disable_unprepare(sdev->sec_ahb); ++ reset_control_assert(sdev->rst_hresetn); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int jh7110_cryp_runtime_suspend(struct device *dev) ++{ ++ struct jh7110_sec_dev *sdev = dev_get_drvdata(dev); ++ ++ clk_disable_unprepare(sdev->sec_ahb); ++ clk_disable_unprepare(sdev->sec_hclk); ++ ++ return 0; ++} ++ ++static int jh7110_cryp_runtime_resume(struct device *dev) ++{ ++ struct jh7110_sec_dev *sdev = dev_get_drvdata(dev); ++ int ret; ++ ++ ret = clk_prepare_enable(sdev->sec_ahb); ++ if (ret) { ++ dev_err(sdev->dev, "Failed to prepare_enable sec_ahb clock\n"); ++ return ret; ++ } ++ ++ ret = clk_prepare_enable(sdev->sec_hclk); ++ if (ret) { ++ dev_err(sdev->dev, "Failed to prepare_enable sec_hclk clock\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++#endif ++ ++static const struct dev_pm_ops jh7110_cryp_pm_ops = { ++ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, ++ pm_runtime_force_resume) ++ SET_RUNTIME_PM_OPS(jh7110_cryp_runtime_suspend, ++ jh7110_cryp_runtime_resume, NULL) ++}; ++ ++ ++ ++static struct platform_driver jh7110_cryp_driver = { ++ .probe = jh7110_cryp_probe, ++ .remove = jh7110_cryp_remove, ++ .driver = { ++ .name = DRIVER_NAME, ++ .pm = &jh7110_cryp_pm_ops, ++ .of_match_table = jh7110_dt_ids, ++ }, ++}; ++ ++module_platform_driver(jh7110_cryp_driver); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Huan Feng "); ++MODULE_DESCRIPTION("Starfive JH7110 CRYP SHA and AES driver"); +diff --git a/drivers/crypto/starfive/jh7110/jh7110-sha.c b/drivers/crypto/starfive/jh7110/jh7110-sha.c +new file mode 100644 +index 000000000000..fc8269ce8845 +--- /dev/null ++++ b/drivers/crypto/starfive/jh7110/jh7110-sha.c +@@ -0,0 +1,1260 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2021 StarFive, Inc ++ * ++ * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING ++ * CUSTOMERS WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER ++ * FOR THEM TO SAVE TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE ++ * FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY ++ * CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE ++ * BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION ++ * WITH THEIR PRODUCTS. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "jh7110-str.h" ++ ++#define HASH_OP_UPDATE 1 ++#define HASH_OP_FINAL 2 ++ ++#define HASH_FLAGS_INIT BIT(0) ++#define HASH_FLAGS_FINAL BIT(1) ++#define HASH_FLAGS_FINUP BIT(2) ++ ++#define JH7110_MAX_ALIGN_SIZE SHA512_BLOCK_SIZE ++ ++#define JH7110_HASH_BUFLEN 8192 ++#define JH7110_HASH_THRES 2048 ++ ++static inline int jh7110_hash_wait_hmac_done(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ u32 status; ++ ++ return readl_relaxed_poll_timeout(sdev->io_base + JH7110_SHA_SHACSR, status, ++ (status & JH7110_SHA_HMAC_DONE), 10, 100000); ++} ++ ++static inline int jh7110_hash_wait_busy(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ u32 status; ++ ++ return readl_relaxed_poll_timeout(sdev->io_base + JH7110_SHA_SHACSR, status, ++ !(status & JH7110_SHA_BUSY), 10, 100000); ++} ++ ++static inline int jh7110_hash_wait_key_done(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ u32 status; ++ ++ return readl_relaxed_poll_timeout(sdev->io_base + JH7110_SHA_SHACSR, status, ++ (status & JH7110_SHA_KEY_DONE), 10, 100000); ++} ++ ++static int jh7110_get_hash_size(struct jh7110_sec_ctx *ctx) ++{ ++ unsigned int hashsize; ++ ++ switch (ctx->sha_mode & JH7110_SHA_MODE_MASK) { ++ case JH7110_SHA_SHA1: ++ hashsize = SHA1_DIGEST_SIZE; ++ break; ++ case JH7110_SHA_SHA224: ++ hashsize = SHA224_DIGEST_SIZE; ++ break; ++ case JH7110_SHA_SHA256: ++ hashsize = SHA256_DIGEST_SIZE; ++ break; ++ case JH7110_SHA_SHA384: ++ hashsize = SHA384_DIGEST_SIZE; ++ break; ++ case JH7110_SHA_SHA512: ++ hashsize = SHA512_DIGEST_SIZE; ++ break; ++ case JH7110_SHA_SM3: ++ hashsize = SM3_DIGEST_SIZE; ++ break; ++ default: ++ return 0; ++ } ++ return hashsize; ++} ++ ++static void jh7110_hash_start(struct jh7110_sec_ctx *ctx, int flags) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ ++ rctx->csr.sha_csr.v = jh7110_sec_read(sdev, JH7110_SHA_SHACSR); ++ rctx->csr.sha_csr.firstb = 0; ++ ++ if (flags) ++ rctx->csr.sha_csr.final = 1; ++ ++ jh7110_sec_write(sdev, JH7110_SHA_SHACSR, rctx->csr.sha_csr.v); ++} ++ ++static int jh7110_sha_hmac_key(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ int klen = ctx->keylen, loop; ++ unsigned int *key = (unsigned int *)ctx->key; ++ unsigned char *cl; ++ ++ jh7110_sec_write(sdev, JH7110_SHA_SHAWKLEN, ctx->keylen); ++ ++ rctx->csr.sha_csr.hmac = !!(ctx->sha_mode & JH7110_SHA_HMAC_FLAGS); ++ rctx->csr.sha_csr.key_flag = 1; ++ ++ jh7110_sec_write(sdev, JH7110_SHA_SHACSR, rctx->csr.sha_csr.v); ++ ++ for (loop = 0; loop < klen / sizeof(unsigned int); loop++, key++) ++ jh7110_sec_write(sdev, JH7110_SHA_SHAWKR, *key); ++ ++ if (klen & 0x3) { ++ cl = (unsigned char *)key; ++ for (loop = 0; loop < (klen & 0x3); loop++, cl++) ++ jh7110_sec_writeb(sdev, JH7110_SHA_SHAWKR, *cl); ++ } ++ ++ if (jh7110_hash_wait_key_done(ctx)) { ++ dev_err(sdev->dev, " jh7110_hash_wait_key_done error\n"); ++ return -ETIMEDOUT; ++ } ++ return 0; ++} ++ ++static void jh7110_sha_dma_callback(void *param) ++{ ++ struct jh7110_sec_dev *sdev = param; ++ ++ complete(&sdev->sec_comp_m); ++} ++ ++static int jh7110_hash_xmit_dma(struct jh7110_sec_ctx *ctx, int flags) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct dma_async_tx_descriptor *in_desc; ++ dma_cookie_t cookie; ++ union jh7110_alg_cr alg_cr; ++ int total_len; ++ int ret; ++ ++ if (!rctx->bufcnt) ++ return 0; ++ ++ ctx->sha_len_total += rctx->bufcnt; ++ ++ total_len = rctx->bufcnt; ++ ++ jh7110_sec_write(sdev, JH7110_DMA_IN_LEN_OFFSET, rctx->bufcnt); ++ ++ total_len = (total_len & 0x3) ? (((total_len >> 2) + 1) << 2) : total_len; ++ ++ memset(sdev->sha_data + rctx->bufcnt, 0, total_len - rctx->bufcnt); ++ ++ alg_cr.v = 0; ++ alg_cr.start = 1; ++ alg_cr.sha_dma_en = 1; ++ jh7110_sec_write(sdev, JH7110_ALG_CR_OFFSET, alg_cr.v); ++ ++ sg_init_table(&ctx->sg[0], 1); ++ sg_set_buf(&ctx->sg[0], sdev->sha_data, total_len); ++ sg_dma_address(&ctx->sg[0]) = phys_to_dma(sdev->dev, (unsigned long long)(sdev->sha_data)); ++ sg_dma_len(&ctx->sg[0]) = total_len; ++ ++ ret = dma_map_sg(sdev->dev, &ctx->sg[0], 1, DMA_TO_DEVICE); ++ if (!ret) { ++ dev_err(sdev->dev, "dma_map_sg() error\n"); ++ return -EINVAL; ++ } ++ ++ sdev->cfg_in.direction = DMA_MEM_TO_DEV; ++ sdev->cfg_in.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ sdev->cfg_in.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ sdev->cfg_in.src_maxburst = sdev->dma_maxburst; ++ sdev->cfg_in.dst_maxburst = sdev->dma_maxburst; ++ sdev->cfg_in.dst_addr = sdev->io_phys_base + JH7110_ALG_FIFO_OFFSET; ++ ++ dmaengine_slave_config(sdev->sec_xm_m, &sdev->cfg_in); ++ ++ in_desc = dmaengine_prep_slave_sg(sdev->sec_xm_m, &ctx->sg[0], ++ 1, DMA_MEM_TO_DEV, ++ DMA_PREP_INTERRUPT | DMA_CTRL_ACK); ++ if (!in_desc) ++ return -EINVAL; ++ ++ reinit_completion(&sdev->sec_comp_m); ++ ++ in_desc->callback = jh7110_sha_dma_callback; ++ in_desc->callback_param = sdev; ++ ++ cookie = dmaengine_submit(in_desc); ++ dma_async_issue_pending(sdev->sec_xm_m); ++ ++ if (!wait_for_completion_timeout(&sdev->sec_comp_m, ++ msecs_to_jiffies(10000))) { ++ dev_dbg(sdev->dev, "this is debug for lophyel status = %x err = %x control0 = %x control1 = %x %s %s %d\n", ++ readl_relaxed(sdev->dma_base + PL080_TC_STATUS), readl_relaxed(sdev->dma_base + PL080_ERR_STATUS), ++ readl_relaxed(sdev->dma_base + 0x10c), readl_relaxed(sdev->dma_base + 0x12c), ++ __FILE__, __func__, __LINE__); ++ dev_err(sdev->dev, "wait_for_completion_timeout out error cookie = %x\n", ++ dma_async_is_tx_complete(sdev->sec_xm_p, cookie, ++ NULL, NULL)); ++ } ++ ++ dma_unmap_sg(sdev->dev, &ctx->sg[0], 1, DMA_TO_DEVICE); ++ ++ alg_cr.v = 0; ++ alg_cr.clear = 1; ++ jh7110_sec_write(sdev, JH7110_ALG_CR_OFFSET, alg_cr.v); ++ ++ return 0; ++} ++ ++static int jh7110_hash_xmit_cpu(struct jh7110_sec_ctx *ctx, int flags) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ int total_len, mlen, loop; ++ unsigned int *buffer; ++ unsigned char *cl; ++ ++ if (!rctx->bufcnt) ++ return 0; ++ ++ ctx->sha_len_total += rctx->bufcnt; ++ ++ total_len = rctx->bufcnt; ++ mlen = total_len / sizeof(u32);// DIV_ROUND_UP(total_len, sizeof(u32)); ++ buffer = (unsigned int *)ctx->buffer; ++ ++ for (loop = 0; loop < mlen; loop++, buffer++) { ++ jh7110_sec_write(sdev, JH7110_SHA_SHAWDR, *buffer); ++ udelay(2); ++ } ++ ++ if (total_len & 0x3) { ++ cl = (unsigned char *)buffer; ++ for (loop = 0; loop < (total_len & 0x3); loop++, cl++) { ++ jh7110_sec_writeb(sdev, JH7110_SHA_SHAWDR, *cl); ++ udelay(2); ++ } ++ } ++ ++ return 0; ++} ++ ++static void jh7110_hash_append_sg(struct jh7110_sec_request_ctx *rctx) ++{ ++ struct jh7110_sec_ctx *ctx = rctx->ctx; ++ size_t count; ++ ++ while ((rctx->bufcnt < rctx->buflen) && rctx->total) { ++ count = min(rctx->in_sg->length - rctx->offset, rctx->total); ++ count = min(count, rctx->buflen - rctx->bufcnt); ++ ++ if (count <= 0) { ++ if ((rctx->in_sg->length == 0) && !sg_is_last(rctx->in_sg)) { ++ rctx->in_sg = sg_next(rctx->in_sg); ++ continue; ++ } else { ++ break; ++ } ++ } ++ ++ scatterwalk_map_and_copy(ctx->buffer + rctx->bufcnt, rctx->in_sg, ++ rctx->offset, count, 0); ++ ++ rctx->bufcnt += count; ++ rctx->offset += count; ++ rctx->total -= count; ++ ++ if (rctx->offset == rctx->in_sg->length) { ++ rctx->in_sg = sg_next(rctx->in_sg); ++ if (rctx->in_sg) ++ rctx->offset = 0; ++ else ++ rctx->total = 0; ++ } ++ } ++} ++ ++static int jh7110_hash_xmit(struct jh7110_sec_ctx *ctx, int flags) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ int ret; ++ ++ sdev->cry_type = JH7110_SHA_TYPE; ++ ++ rctx->csr.sha_csr.v = 0; ++ rctx->csr.sha_csr.reset = 1; ++ jh7110_sec_write(sdev, JH7110_SHA_SHACSR, rctx->csr.sha_csr.v); ++ ++ if (jh7110_hash_wait_busy(ctx)) { ++ dev_err(sdev->dev, "jh7110_hash_wait_busy error\n"); ++ return -ETIMEDOUT; ++ } ++ ++ rctx->csr.sha_csr.v = 0; ++ rctx->csr.sha_csr.mode = ctx->sha_mode & JH7110_SHA_MODE_MASK; ++ ++ if (ctx->sha_mode & JH7110_SHA_HMAC_FLAGS) ++ ret = jh7110_sha_hmac_key(ctx); ++ ++ if (ret) ++ return ret; ++ ++ if (!rctx->csr.sha_csr.hmac) { ++ rctx->csr.sha_csr.start = 1; ++ rctx->csr.sha_csr.firstb = 1; ++ jh7110_sec_write(sdev, JH7110_SHA_SHACSR, rctx->csr.sha_csr.v); ++ } ++ ++ if (ctx->sdev->use_dma) { ++ ret = jh7110_hash_xmit_dma(ctx, flags); ++ if (flags) ++ rctx->flags |= HASH_FLAGS_FINAL; ++ } else { ++ ret = jh7110_hash_xmit_cpu(ctx, flags); ++ if (flags) ++ rctx->flags |= HASH_FLAGS_FINAL; ++ } ++ ++ if (ret) ++ return ret; ++ ++ jh7110_hash_start(ctx, flags); ++ ++ if (jh7110_hash_wait_busy(ctx)) { ++ dev_err(sdev->dev, "jh7110_hash_wait_busy error\n"); ++ return -ETIMEDOUT; ++ } ++ ++ if (ctx->sha_mode & JH7110_SHA_HMAC_FLAGS) ++ if (jh7110_hash_wait_hmac_done(ctx)) { ++ dev_err(sdev->dev, "jh7110_hash_wait_hmac_done error\n"); ++ return -ETIMEDOUT; ++ } ++ return 0; ++} ++ ++static int jh7110_hash_update_req(struct jh7110_sec_ctx *ctx) ++{ ++ struct jh7110_sec_request_ctx *rctx = ctx->rctx; ++ int err = 0, final; ++ ++ final = (rctx->flags & HASH_FLAGS_FINUP); ++ ++ while ((rctx->total >= rctx->buflen) || ++ (rctx->bufcnt + rctx->total >= rctx->buflen)) { ++ jh7110_hash_append_sg(rctx); ++ err = jh7110_hash_xmit(ctx, 0); ++ rctx->bufcnt = 0; ++ } ++ ++ jh7110_hash_append_sg(rctx); ++ ++ if (final) { ++ err = jh7110_hash_xmit(ctx, ++ (rctx->flags & HASH_FLAGS_FINUP)); ++ rctx->bufcnt = 0; ++ } ++ ++ return err; ++} ++ ++static int jh7110_hash_final_req(struct jh7110_sec_ctx *ctx) ++{ ++ struct ahash_request *req = ctx->rctx->req.hreq; ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ int err = 0; ++ ++ err = jh7110_hash_xmit(ctx, 1); ++ rctx->bufcnt = 0; ++ ++ return err; ++} ++ ++ ++static int jh7110_hash_out_cpu(struct ahash_request *req) ++{ ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ struct jh7110_sec_ctx *ctx = rctx->ctx; ++ int count, *data; ++ int mlen; ++ ++ if (!req->result) ++ return 0; ++ ++ mlen = jh7110_get_hash_size(ctx) / sizeof(u32); ++ ++ data = (u32 *)req->result; ++ for (count = 0; count < mlen; count++) ++ data[count] = jh7110_sec_read(ctx->sdev, JH7110_SHA_SHARDR); ++ ++ return 0; ++} ++ ++static int jh7110_hash_copy_hash(struct ahash_request *req) ++{ ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ struct jh7110_sec_ctx *ctx = rctx->ctx; ++ int hashsize; ++ int ret; ++ ++ hashsize = jh7110_get_hash_size(ctx); ++ ++ ret = jh7110_hash_out_cpu(req); ++ ++ if (ret) ++ return ret; ++ ++ memcpy(rctx->sha_digest_mid, req->result, hashsize); ++ rctx->sha_digest_len = hashsize; ++ ++ return ret; ++} ++ ++static void jh7110_hash_finish_req(struct ahash_request *req, int err) ++{ ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ struct jh7110_sec_dev *sdev = rctx->sdev; ++ ++ if (!err && (HASH_FLAGS_FINAL & rctx->flags)) { ++ err = jh7110_hash_copy_hash(req); ++ rctx->flags &= ~(HASH_FLAGS_FINAL | ++ HASH_FLAGS_INIT); ++ } ++ ++ crypto_finalize_hash_request(sdev->engine, req, err); ++} ++ ++static int jh7110_hash_prepare_req(struct crypto_engine *engine, void *areq) ++{ ++ struct ahash_request *req = container_of(areq, struct ahash_request, ++ base); ++ struct jh7110_sec_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req)); ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx; ++ ++ if (!sdev) ++ return -ENODEV; ++ ++ mutex_lock(&ctx->sdev->lock); ++ ++ rctx = ahash_request_ctx(req); ++ ++ rctx->req.hreq = req; ++ ++ return 0; ++} ++ ++static int jh7110_hash_one_request(struct crypto_engine *engine, void *areq) ++{ ++ struct ahash_request *req = container_of(areq, struct ahash_request, ++ base); ++ struct jh7110_sec_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req)); ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ struct jh7110_sec_request_ctx *rctx; ++ int err = 0; ++ ++ if (!sdev) ++ return -ENODEV; ++ ++ rctx = ahash_request_ctx(req); ++ ++ if (rctx->op == HASH_OP_UPDATE) ++ err = jh7110_hash_update_req(ctx); ++ else if (rctx->op == HASH_OP_FINAL) ++ err = jh7110_hash_final_req(ctx); ++ ++ if (err != -EINPROGRESS) ++ /* done task will not finish it, so do it here */ ++ jh7110_hash_finish_req(req, err); ++ ++ mutex_unlock(&ctx->sdev->lock); ++ ++ return 0; ++} ++ ++static int jh7110_hash_handle_queue(struct jh7110_sec_dev *sdev, ++ struct ahash_request *req) ++{ ++ return crypto_transfer_hash_request_to_engine(sdev->engine, req); ++} ++ ++static int jh7110_hash_enqueue(struct ahash_request *req, unsigned int op) ++{ ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ struct jh7110_sec_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ ++ rctx->op = op; ++ ++ return jh7110_hash_handle_queue(sdev, req); ++} ++ ++static int jh7110_hash_init(struct ahash_request *req) ++{ ++ struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); ++ struct jh7110_sec_ctx *ctx = crypto_ahash_ctx(tfm); ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ struct jh7110_sec_dev *sdev = ctx->sdev; ++ ++ memset(rctx, 0, sizeof(struct jh7110_sec_request_ctx)); ++ ++ rctx->sdev = sdev; ++ rctx->ctx = ctx; ++ rctx->req.hreq = req; ++ rctx->bufcnt = 0; ++ ++ rctx->total = 0; ++ rctx->offset = 0; ++ rctx->bufcnt = 0; ++ rctx->buflen = JH7110_HASH_BUFLEN; ++ ++ memset(ctx->buffer, 0, JH7110_HASH_BUFLEN); ++ ++ ctx->rctx = rctx; ++ ++ dev_dbg(sdev->dev, "%s Flags %lx\n", __func__, rctx->flags); ++ ++ return 0; ++} ++ ++static int jh7110_hash_update(struct ahash_request *req) ++{ ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ ++ if (!req->nbytes) ++ return 0; ++ ++ rctx->total = req->nbytes; ++ rctx->in_sg = req->src; ++ rctx->offset = 0; ++ ++ if ((rctx->bufcnt + rctx->total < rctx->buflen)) { ++ jh7110_hash_append_sg(rctx); ++ return 0; ++ } ++ ++ return jh7110_hash_enqueue(req, HASH_OP_UPDATE); ++} ++ ++static int jh7110_hash_final(struct ahash_request *req) ++{ ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ struct jh7110_sec_ctx *ctx = crypto_tfm_ctx(req->base.tfm); ++ ++ rctx->flags |= HASH_FLAGS_FINUP; ++ ++ if (ctx->fallback_available && (rctx->bufcnt < JH7110_HASH_THRES)) { ++ if (ctx->sha_mode & JH7110_SHA_HMAC_FLAGS) ++ crypto_shash_setkey(ctx->fallback.shash, ctx->key, ++ ctx->keylen); ++ ++ return crypto_shash_tfm_digest(ctx->fallback.shash, ctx->buffer, ++ rctx->bufcnt, req->result); ++ } ++ ++ return jh7110_hash_enqueue(req, HASH_OP_FINAL); ++} ++ ++static int jh7110_hash_finup(struct ahash_request *req) ++{ ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ int err1, err2; ++ int nents; ++ ++ nents = sg_nents_for_len(req->src, req->nbytes); ++ ++ rctx->flags |= HASH_FLAGS_FINUP; ++ ++ err1 = jh7110_hash_update(req); ++ ++ if (err1 == -EINPROGRESS || err1 == -EBUSY) ++ return err1; ++ ++ /* ++ * final() has to be always called to cleanup resources ++ * even if update() failed, except EINPROGRESS ++ */ ++ err2 = jh7110_hash_final(req); ++ ++ return err1 ?: err2; ++} ++ ++static int jh7110_hash_digest(struct ahash_request *req) ++{ ++ return jh7110_hash_init(req) ?: jh7110_hash_finup(req); ++} ++ ++static int jh7110_hash_export(struct ahash_request *req, void *out) ++{ ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ ++ memcpy(out, rctx, sizeof(*rctx)); ++ ++ return 0; ++} ++ ++static int jh7110_hash_import(struct ahash_request *req, const void *in) ++{ ++ struct jh7110_sec_request_ctx *rctx = ahash_request_ctx(req); ++ ++ memcpy(rctx, in, sizeof(*rctx)); ++ ++ return 0; ++} ++ ++static int jh7110_hash_cra_init_algs(struct crypto_tfm *tfm, ++ const char *algs_hmac_name, ++ unsigned int mode) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_tfm_ctx(tfm); ++ const char *alg_name = crypto_tfm_alg_name(tfm); ++ ++ ctx->sdev = jh7110_sec_find_dev(ctx); ++ ctx->fallback_available = true; ++ ++ if (!ctx->sdev) ++ return -ENODEV; ++ ++ ctx->fallback.shash = crypto_alloc_shash(alg_name, 0, ++ CRYPTO_ALG_NEED_FALLBACK); ++ ++ if (IS_ERR(ctx->fallback.shash)) ++ ctx->fallback_available = false; ++ ++ crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), ++ sizeof(struct jh7110_sec_request_ctx)); ++ ++ ctx->keylen = 0; ++ ctx->sha_mode = mode; ++ ctx->sha_len_total = 0; ++ ctx->buffer = ctx->sdev->sha_data; ++ ++ if (algs_hmac_name) ++ ctx->sha_mode |= JH7110_SHA_HMAC_FLAGS; ++ ++ pm_runtime_resume_and_get(ctx->sdev->dev); ++ ++ ctx->enginectx.op.do_one_request = jh7110_hash_one_request; ++ ctx->enginectx.op.prepare_request = jh7110_hash_prepare_req; ++ ctx->enginectx.op.unprepare_request = NULL; ++ ++ return 0; ++} ++ ++static void jh7110_hash_cra_exit(struct crypto_tfm *tfm) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_tfm_ctx(tfm); ++ ++ crypto_free_shash(ctx->fallback.shash); ++ ++ pm_runtime_put_sync_suspend(ctx->sdev->dev); ++ ++ ctx->fallback.shash = NULL; ++ ctx->enginectx.op.do_one_request = NULL; ++ ctx->enginectx.op.prepare_request = NULL; ++ ctx->enginectx.op.unprepare_request = NULL; ++} ++ ++static int jh7110_hash_long_setkey(struct jh7110_sec_ctx *ctx, ++ const u8 *key, unsigned int keylen, ++ const char *alg_name) ++{ ++ struct crypto_wait wait; ++ struct ahash_request *req; ++ struct scatterlist sg; ++ struct crypto_ahash *ahash_tfm; ++ u8 *buf; ++ int ret; ++ ++ ahash_tfm = crypto_alloc_ahash(alg_name, 0, 0); ++ if (IS_ERR(ahash_tfm)) ++ return PTR_ERR(ahash_tfm); ++ ++ req = ahash_request_alloc(ahash_tfm, GFP_KERNEL); ++ if (!req) { ++ ret = -ENOMEM; ++ goto err_free_ahash; ++ } ++ ++ crypto_init_wait(&wait); ++ ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG, ++ crypto_req_done, &wait); ++ crypto_ahash_clear_flags(ahash_tfm, ~0); ++ ++ buf = kzalloc(keylen + JH7110_MAX_ALIGN_SIZE, GFP_KERNEL); ++ if (!buf) { ++ ret = -ENOMEM; ++ goto err_free_req; ++ } ++ ++ memcpy(buf, key, keylen); ++ sg_init_one(&sg, buf, keylen); ++ ahash_request_set_crypt(req, &sg, ctx->key, keylen); ++ ++ ret = crypto_wait_req(crypto_ahash_digest(req), &wait); ++ ++err_free_req: ++ ahash_request_free(req); ++err_free_ahash: ++ crypto_free_ahash(ahash_tfm); ++ return ret; ++} ++ ++static int jh7110_hash1_setkey(struct crypto_ahash *tfm, ++ const u8 *key, unsigned int keylen) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_ahash_ctx(tfm); ++ unsigned int digestsize = crypto_ahash_digestsize(tfm); ++ unsigned int blocksize; ++ int ret = 0; ++ ++ blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm)); ++ if (keylen <= blocksize) { ++ memcpy(ctx->key, key, keylen); ++ ctx->keylen = keylen; ++ } else { ++ ctx->keylen = digestsize; ++ ret = jh7110_hash_long_setkey(ctx, key, keylen, "jh7110-sha1"); ++ } ++ ++ return ret; ++} ++ ++static int jh7110_hash224_setkey(struct crypto_ahash *tfm, ++ const u8 *key, unsigned int keylen) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_ahash_ctx(tfm); ++ unsigned int digestsize = crypto_ahash_digestsize(tfm); ++ unsigned int blocksize; ++ int ret = 0; ++ ++ blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm)); ++ ++ if (keylen <= blocksize) { ++ memcpy(ctx->key, key, keylen); ++ ctx->keylen = keylen; ++ } else { ++ ctx->keylen = digestsize; ++ ret = jh7110_hash_long_setkey(ctx, key, keylen, "jh7110-sha224"); ++ } ++ ++ return ret; ++} ++ ++static int jh7110_hash256_setkey(struct crypto_ahash *tfm, ++ const u8 *key, unsigned int keylen) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_ahash_ctx(tfm); ++ unsigned int digestsize = crypto_ahash_digestsize(tfm); ++ unsigned int blocksize; ++ int ret = 0; ++ ++ blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm)); ++ ++ if (keylen <= blocksize) { ++ memcpy(ctx->key, key, keylen); ++ ctx->keylen = keylen; ++ } else { ++ ctx->keylen = digestsize; ++ ret = jh7110_hash_long_setkey(ctx, key, keylen, "jh7110-sha256"); ++ } ++ ++ return ret; ++} ++ ++static int jh7110_hash384_setkey(struct crypto_ahash *tfm, ++ const u8 *key, unsigned int keylen) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_ahash_ctx(tfm); ++ unsigned int digestsize = crypto_ahash_digestsize(tfm); ++ unsigned int blocksize; ++ int ret = 0; ++ ++ blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm)); ++ ++ if (keylen <= blocksize) { ++ memcpy(ctx->key, key, keylen); ++ ctx->keylen = keylen; ++ } else { ++ ctx->keylen = digestsize; ++ ret = jh7110_hash_long_setkey(ctx, key, keylen, "jh7110-sha384"); ++ } ++ ++ return ret; ++} ++ ++static int jh7110_hash512_setkey(struct crypto_ahash *tfm, ++ const u8 *key, unsigned int keylen) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_ahash_ctx(tfm); ++ unsigned int digestsize = crypto_ahash_digestsize(tfm); ++ unsigned int blocksize; ++ int ret = 0; ++ ++ blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm)); ++ ++ if (keylen <= blocksize) { ++ memcpy(ctx->key, key, keylen); ++ ctx->keylen = keylen; ++ } else { ++ ctx->keylen = digestsize; ++ ret = jh7110_hash_long_setkey(ctx, key, keylen, "jh7110-sha512"); ++ } ++ ++ return ret; ++} ++ ++static int jh7110_sm3_setkey(struct crypto_ahash *tfm, ++ const u8 *key, unsigned int keylen) ++{ ++ struct jh7110_sec_ctx *ctx = crypto_ahash_ctx(tfm); ++ unsigned int digestsize = crypto_ahash_digestsize(tfm); ++ unsigned int blocksize; ++ int ret = 0; ++ ++ blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm)); ++ ++ if (keylen <= blocksize) { ++ memcpy(ctx->key, key, keylen); ++ ctx->keylen = keylen; ++ } else { ++ ctx->keylen = digestsize; ++ ret = jh7110_hash_long_setkey(ctx, key, keylen, "jh7110-sm3"); ++ } ++ ++ return ret; ++} ++ ++static int jh7110_hash_cra_sha1_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, NULL, JH7110_SHA_SHA1); ++} ++ ++static int jh7110_hash_cra_sha224_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, NULL, JH7110_SHA_SHA224); ++} ++ ++static int jh7110_hash_cra_sha256_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, NULL, JH7110_SHA_SHA256); ++} ++ ++static int jh7110_hash_cra_sha384_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, NULL, JH7110_SHA_SHA384); ++} ++ ++static int jh7110_hash_cra_sha512_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, NULL, JH7110_SHA_SHA512); ++} ++ ++static int jh7110_hash_cra_sm3_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, NULL, JH7110_SHA_SM3); ++} ++ ++static int jh7110_hash_cra_hmac_sha1_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, "sha1", JH7110_SHA_SHA1); ++} ++ ++static int jh7110_hash_cra_hmac_sha224_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, "sha224", JH7110_SHA_SHA224); ++} ++ ++static int jh7110_hash_cra_hmac_sha256_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, "sha256", JH7110_SHA_SHA256); ++} ++ ++static int jh7110_hash_cra_hmac_sha384_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, "sha384", JH7110_SHA_SHA384); ++} ++ ++static int jh7110_hash_cra_hmac_sha512_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, "sha512", JH7110_SHA_SHA512); ++} ++ ++static int jh7110_hash_cra_hmac_sm3_init(struct crypto_tfm *tfm) ++{ ++ return jh7110_hash_cra_init_algs(tfm, "sm3", JH7110_SHA_SM3); ++} ++ ++static struct ahash_alg algs_sha0_sha512_sm3[] = { ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .halg = { ++ .digestsize = SHA1_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "sha1", ++ .cra_driver_name = "jh7110-sha1", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SHA1_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_sha1_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .setkey = jh7110_hash1_setkey, ++ .halg = { ++ .digestsize = SHA1_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "hmac(sha1)", ++ .cra_driver_name = "jh7110-hmac-sha1", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SHA1_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_hmac_sha1_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .halg = { ++ .digestsize = SHA224_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "sha224", ++ .cra_driver_name = "jh7110-sha224", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SHA224_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_sha224_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .setkey = jh7110_hash224_setkey, ++ .halg = { ++ .digestsize = SHA224_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "hmac(sha224)", ++ .cra_driver_name = "jh7110-hmac-sha224", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SHA224_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_hmac_sha224_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .halg = { ++ .digestsize = SHA256_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "sha256", ++ .cra_driver_name = "jh7110-sha256", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SHA256_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_sha256_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .setkey = jh7110_hash256_setkey, ++ .halg = { ++ .digestsize = SHA256_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "hmac(sha256)", ++ .cra_driver_name = "jh7110-hmac-sha256", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SHA256_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_hmac_sha256_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .halg = { ++ .digestsize = SHA384_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "sha384", ++ .cra_driver_name = "jh7110-sha384", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SHA384_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_sha384_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .setkey = jh7110_hash384_setkey, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .halg = { ++ .digestsize = SHA384_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "hmac(sha384)", ++ .cra_driver_name = "jh7110-hmac-sha384", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SHA384_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_hmac_sha384_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .halg = { ++ .digestsize = SHA512_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "sha512", ++ .cra_driver_name = "jh7110-sha512", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH, ++ .cra_blocksize = SHA512_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_sha512_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .setkey = jh7110_hash512_setkey, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .halg = { ++ .digestsize = SHA512_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "hmac(sha512)", ++ .cra_driver_name = "jh7110-hmac-sha512", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SHA512_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_hmac_sha512_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .halg = { ++ .digestsize = SM3_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "sm3", ++ .cra_driver_name = "jh7110-sm3", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SM3_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_sm3_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++{ ++ .init = jh7110_hash_init, ++ .update = jh7110_hash_update, ++ .final = jh7110_hash_final, ++ .finup = jh7110_hash_finup, ++ .digest = jh7110_hash_digest, ++ .setkey = jh7110_sm3_setkey, ++ .export = jh7110_hash_export, ++ .import = jh7110_hash_import, ++ .halg = { ++ .digestsize = SM3_DIGEST_SIZE, ++ .statesize = sizeof(struct jh7110_sec_request_ctx), ++ .base = { ++ .cra_name = "hmac(sm3)", ++ .cra_driver_name = "jh7110-hmac-sm3", ++ .cra_priority = 200, ++ .cra_flags = CRYPTO_ALG_ASYNC | ++ CRYPTO_ALG_TYPE_AHASH | ++ CRYPTO_ALG_NEED_FALLBACK, ++ .cra_blocksize = SM3_BLOCK_SIZE, ++ .cra_ctxsize = sizeof(struct jh7110_sec_ctx), ++ .cra_alignmask = 3, ++ .cra_init = jh7110_hash_cra_hmac_sm3_init, ++ .cra_exit = jh7110_hash_cra_exit, ++ .cra_module = THIS_MODULE, ++ } ++ } ++}, ++}; ++ ++int jh7110_hash_register_algs(void) ++{ ++ int ret = 0; ++ ++ ret = crypto_register_ahashes(algs_sha0_sha512_sm3, ARRAY_SIZE(algs_sha0_sha512_sm3)); ++ ++ return ret; ++} ++ ++void jh7110_hash_unregister_algs(void) ++{ ++ crypto_unregister_ahashes(algs_sha0_sha512_sm3, ARRAY_SIZE(algs_sha0_sha512_sm3)); ++} +diff --git a/drivers/crypto/starfive/jh7110/jh7110-str.h b/drivers/crypto/starfive/jh7110/jh7110-str.h +new file mode 100644 +index 000000000000..9113805cd83e +--- /dev/null ++++ b/drivers/crypto/starfive/jh7110/jh7110-str.h +@@ -0,0 +1,276 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Copyright 2021 StarFive, Inc ++ */ ++#ifndef __JH7110_STR_H__ ++#define __JH7110_STR_H__ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "jh7110-regs.h" ++ ++#define JH7110_MSG_BUFFER_SIZE (16 * 1024) ++#define MAX_KEY_SIZE SHA512_BLOCK_SIZE ++ ++#define JH7110_AES_IV_LEN AES_BLOCK_SIZE ++#define JH7110_AES_CTR_LEN AES_BLOCK_SIZE ++ ++struct jh7110_rsa_key { ++ u8 *n; ++ u8 *e; ++ u8 *d; ++ u8 *p; ++ u8 *q; ++ u8 *dp; ++ u8 *dq; ++ u8 *qinv; ++ u8 *rinv; ++ u8 *rinv_p; ++ u8 *rinv_q; ++ u8 *mp; ++ u8 *rsqr; ++ u8 *rsqr_p; ++ u8 *rsqr_q; ++ u8 *pmp; ++ u8 *qmp; ++ int e_bitlen; ++ int d_bitlen; ++ int bitlen; ++ size_t key_sz; ++ bool crt_mode; ++}; ++ ++struct jh7110_sec_ctx { ++ struct crypto_engine_ctx enginectx; ++ ++ struct jh7110_sec_request_ctx *rctx; ++ struct jh7110_sec_dev *sdev; ++ ++ unsigned int sha_mode; ++ ++ u8 key[MAX_KEY_SIZE]; ++ int keylen; ++ int sec_init; ++ struct scatterlist sg[2]; ++ struct jh7110_rsa_key rsa_key; ++ size_t sha_len_total; ++ u8 *buffer; ++ union { ++ struct crypto_akcipher *akcipher; ++ struct crypto_aead *aead; ++ struct crypto_shash *shash; ++ } fallback; ++ bool fallback_available; ++}; ++ ++struct jh7110_sec_dev { ++ struct list_head list; ++ struct device *dev; ++ ++ struct clk *sec_hclk; ++ struct clk *sec_ahb; ++ struct reset_control *rst_hresetn; ++ ++ struct jh7110_pl08x_device *pl080; ++ ++ void __iomem *io_base; ++ void __iomem *dma_base; ++ phys_addr_t io_phys_base; ++ void *sha_data; ++ void *aes_data; ++ void *pka_data; ++ unsigned int secirq; ++ unsigned int irq; ++ ++ size_t data_buf_len; ++ int pages_count; ++ u32 use_side_channel_mitigation; ++ u32 use_dma; ++ u32 dma_maxburst; ++ struct dma_chan *sec_xm_m; ++ struct dma_chan *sec_xm_p; ++ struct dma_slave_config cfg_in; ++ struct dma_slave_config cfg_out; ++ struct completion sec_comp_m; ++ struct completion sec_comp_p; ++ struct scatterlist in_sg; ++ struct scatterlist out_sg; ++ unsigned long in_sg_len; ++ unsigned long out_sg_len; ++ ++ struct mutex doing; ++ struct mutex pl080_doing; ++ struct mutex lock; /* protects req / areq */ ++ struct mutex sha_lock; ++ struct mutex aes_lock; ++ struct mutex rsa_lock; ++ struct completion rsa_comp; ++ ++#define JH7110_SHA_SHA_DONE BIT(2) ++#define JH7110_AES_DONE BIT(3) ++#define JH7110_PKA_DONE BIT(5) ++ u32 done_flags; ++#define JH7110_SHA_TYPE 0x1 ++#define JH7110_AES_TYPE 0x2 ++#define JH7110_PKA_TYPE 0x4 ++ u32 cry_type; ++ ++ struct crypto_engine *engine; ++ ++ union jh7110_alg_cr alg_cr; ++ union jh7110_ie_mask ie_mask; ++ union jh7110_ie_flag ie_flag; ++}; ++ ++struct jh7110_sec_request_ctx { ++ struct jh7110_sec_ctx *ctx; ++ struct jh7110_sec_dev *sdev; ++ ++ union { ++ struct ahash_request *hreq; ++ struct skcipher_request *sreq; ++ struct aead_request *areq; ++ } req; ++#define JH7110_AHASH_REQ 0 ++#define JH7110_ABLK_REQ 1 ++#define JH7110_AEAD_REQ 2 ++ unsigned int req_type; ++ ++ union { ++ union jh7110_crypto_cacr pka_csr; ++ union jh7110_aes_csr aes_csr; ++ union jh7110_sha_shacsr sha_csr; ++ } csr; ++ ++ struct scatterlist *sg; ++ struct scatterlist *in_sg; ++ struct scatterlist *out_sg; ++ struct scatterlist *out_sg_save; ++ struct scatterlist in_sgl; ++ struct scatterlist out_sgl; ++ bool sgs_copied; ++ ++ unsigned long sg_len; ++ unsigned long in_sg_len; ++ unsigned long out_sg_len; ++ ++ unsigned long flags; ++ unsigned long op; ++ unsigned long stmode; ++ unsigned long long jiffies_hw; ++ unsigned long long jiffies_cp; ++ ++ size_t bufcnt; ++ size_t buflen; ++ size_t total; ++ size_t offset; ++ size_t data_offset; ++ size_t authsize; ++ size_t hw_blocksize; ++ size_t total_in; ++ size_t total_in_save; ++ size_t total_out; ++ size_t total_out_save; ++ size_t assoclen; ++ size_t ctr_over_count; ++ ++ u32 last_ctr[4]; ++ u32 aes_iv[4]; ++ u32 tag_out[4]; ++ u32 tag_in[4]; ++ u8 sha_digest_mid[SHA512_DIGEST_SIZE]__aligned(sizeof(u32)); ++ unsigned int sha_digest_len; ++}; ++ ++struct jh7110_sec_dma { ++ struct dma_slave_config cfg; ++ union jh7110_alg_cr alg_cr; ++ struct dma_chan *chan; ++ struct completion *dma_comp; ++ struct scatterlist *sg; ++ struct jh7110_sec_ctx *ctx; ++ void *data; ++ size_t total; ++}; ++ ++static inline u64 jh7110_sec_readq(struct jh7110_sec_dev *sdev, u32 offset) ++{ ++#ifdef CONFIG_64BIT ++ return __raw_readq(sdev->io_base + offset); ++#else ++ return ((u64)__raw_readl(sdev->io_base + offset) << 32) | (u64)__raw_readl(sdev->io_base + offset + 4); ++#endif ++} ++ ++static inline u32 jh7110_sec_read(struct jh7110_sec_dev *sdev, u32 offset) ++{ ++ return __raw_readl(sdev->io_base + offset); ++} ++ ++static inline u16 jh7110_sec_readw(struct jh7110_sec_dev *sdev, u32 offset) ++{ ++ return __raw_readw(sdev->io_base + offset); ++} ++ ++static inline u8 jh7110_sec_readb(struct jh7110_sec_dev *sdev, u32 offset) ++{ ++ return __raw_readb(sdev->io_base + offset); ++} ++ ++static inline void jh7110_sec_writeq(struct jh7110_sec_dev *sdev, ++ u32 offset, u64 value) ++{ ++#ifdef CONFIG_64BIT ++ __raw_writeq(value, sdev->io_base + offset); ++#else ++ __raw_writel((value >> 32), sdev->io_base + offset); ++ __raw_writel(value & 0xffffffff, sdev->io_base + offset + 4); ++#endif ++} ++ ++static inline void jh7110_sec_write(struct jh7110_sec_dev *sdev, ++ u32 offset, u32 value) ++{ ++ __raw_writel(value, sdev->io_base + offset); ++} ++ ++static inline void jh7110_sec_writew(struct jh7110_sec_dev *sdev, ++ u32 offset, u16 value) ++{ ++ __raw_writew(value, sdev->io_base + offset); ++} ++ ++static inline void jh7110_sec_writeb(struct jh7110_sec_dev *sdev, ++ u32 offset, u8 value) ++{ ++ __raw_writeb(value, sdev->io_base + offset); ++} ++ ++extern struct jh7110_sec_dev *jh7110_sec_find_dev(struct jh7110_sec_ctx *ctx); ++ ++extern int jh7110_hash_register_algs(void); ++extern void jh7110_hash_unregister_algs(void); ++ ++extern int jh7110_aes_register_algs(void); ++extern void jh7110_aes_unregister_algs(void); ++ ++extern int jh7110_pka_register_algs(void); ++extern void jh7110_pka_unregister_algs(void); ++ ++extern int jh7110_dma_sg_to_device(struct jh7110_sec_dma *sdma); ++extern int jh7110_dma_mem_to_device(struct jh7110_sec_dma *sdma); ++extern int jh7110_dma_sg_from_device(struct jh7110_sec_dma *sdma); ++extern int jh7110_dma_mem_from_device(struct jh7110_sec_dma *sdma); ++extern int jh7110_mem_to_mem_test(struct jh7110_sec_ctx *ctx); ++ ++extern int jh7110_dmac_init(struct jh7110_sec_dev *sdev, int irq); ++extern int jh7110_dmac_secdata_out(struct jh7110_sec_dev *sdev, u8 chan, u32 src, u32 dst, u32 size); ++extern int jh7110_dmac_secdata_in(struct jh7110_sec_dev *sdev, u8 chan, u32 src, u32 dst, u32 size); ++extern int jh7110_dmac_wait_done(struct jh7110_sec_dev *sdev, u8 chan); ++ ++#endif +diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +index 14c1ac26f866..6e0e54fcd531 100644 +--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c ++++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +@@ -27,6 +27,8 @@ + #include "../dmaengine.h" + #include "../virt-dma.h" + ++#include ++ + /* + * The set of bus widths supported by the DMA controller. DW AXI DMAC supports + * master data bus width up to 512 bits (for both AXI master interfaces), but +@@ -732,6 +734,17 @@ static int axi_dma_resume(struct axi_dma_chip *chip) + return 0; + } + ++void axi_dma_cyclic_stop(struct dma_chan *dchan) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&chan->vc.lock, flags); ++ axi_chan_disable(chan); ++ spin_unlock_irqrestore(&chan->vc.lock, flags); ++ ++} ++EXPORT_SYMBOL(axi_dma_cyclic_stop); + static int __maybe_unused axi_dma_runtime_suspend(struct device *dev) + { + struct axi_dma_chip *chip = dev_get_drvdata(dev); +@@ -983,6 +996,7 @@ static const struct dev_pm_ops dw_axi_dma_pm_ops = { + + static const struct of_device_id dw_dma_of_id_table[] = { + { .compatible = "snps,axi-dma-1.01a" }, ++ { .compatible = "starfive,jh7110-dma" }, + {} + }; + MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); +diff --git a/drivers/dma/jh7110-pl08x.c b/drivers/dma/jh7110-pl08x.c +new file mode 100755 +index 000000000000..76df9cf7b59b +--- /dev/null ++++ b/drivers/dma/jh7110-pl08x.c +@@ -0,0 +1,3200 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Copyright (c) 2006 ARM Ltd. ++ * Copyright (c) 2010 ST-Ericsson SA ++ * Copyirght (c) 2017 Linaro Ltd. ++ * ++ * Author: Peter Pearse ++ * Author: Linus Walleij ++ * ++ * Documentation: ARM DDI 0196G == PL080 ++ * Documentation: ARM DDI 0218E == PL081 ++ * Documentation: S3C6410 User's Manual == PL080S ++ * ++ * PL080 & PL081 both have 16 sets of DMA signals that can be routed to any ++ * channel. ++ * ++ * The PL080 has 8 channels available for simultaneous use, and the PL081 ++ * has only two channels. So on these DMA controllers the number of channels ++ * and the number of incoming DMA signals are two totally different things. ++ * It is usually not possible to theoretically handle all physical signals, ++ * so a multiplexing scheme with possible denial of use is necessary. ++ * ++ * The PL080 has a dual bus master, PL081 has a single master. ++ * ++ * PL080S is a version modified by Samsung and used in S3C64xx SoCs. ++ * It differs in following aspects: ++ * - CH_CONFIG register at different offset, ++ * - separate CH_CONTROL2 register for transfer size, ++ * - bigger maximum transfer size, ++ * - 8-word aligned LLI, instead of 4-word, due to extra CCTL2 word, ++ * - no support for peripheral flow control. ++ * ++ * Memory to peripheral transfer may be visualized as ++ * Get data from memory to DMAC ++ * Until no data left ++ * On burst request from peripheral ++ * Destination burst from DMAC to peripheral ++ * Clear burst request ++ * Raise terminal count interrupt ++ * ++ * For peripherals with a FIFO: ++ * Source burst size == half the depth of the peripheral FIFO ++ * Destination burst size == the depth of the peripheral FIFO ++ * ++ * (Bursts are irrelevant for mem to mem transfers - there are no burst ++ * signals, the DMA controller will simply facilitate its AHB master.) ++ * ++ * ASSUMES default (little) endianness for DMA transfers ++ * ++ * The PL08x has two flow control settings: ++ * - DMAC flow control: the transfer size defines the number of transfers ++ * which occur for the current LLI entry, and the DMAC raises TC at the ++ * end of every LLI entry. Observed behaviour shows the DMAC listening ++ * to both the BREQ and SREQ signals (contrary to documented), ++ * transferring data if either is active. The LBREQ and LSREQ signals ++ * are ignored. ++ * ++ * - Peripheral flow control: the transfer size is ignored (and should be ++ * zero). The data is transferred from the current LLI entry, until ++ * after the final transfer signalled by LBREQ or LSREQ. The DMAC ++ * will then move to the next LLI entry. Unsupported by PL080S. ++ */ ++//#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "dmaengine.h" ++#include "virt-dma.h" ++ ++#define DRIVER_NAME "pl08xdmac" ++ ++#define PL80X_DMA_BUSWIDTHS \ ++ BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) | \ ++ BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \ ++ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \ ++ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) ++ ++//static struct amba_driver pl08x_amba_driver; ++struct pl08x_driver_data; ++ ++/** ++ * struct vendor_data - vendor-specific config parameters for PL08x derivatives ++ * @config_offset: offset to the configuration register ++ * @channels: the number of channels available in this variant ++ * @signals: the number of request signals available from the hardware ++ * @dualmaster: whether this version supports dual AHB masters or not. ++ * @nomadik: whether this variant is a ST Microelectronics Nomadik, where the ++ * channels have Nomadik security extension bits that need to be checked ++ * for permission before use and some registers are missing ++ * @pl080s: whether this variant is a Samsung PL080S, which has separate ++ * register and LLI word for transfer size. ++ * @ftdmac020: whether this variant is a Faraday Technology FTDMAC020 ++ * @max_transfer_size: the maximum single element transfer size for this ++ * PL08x variant. ++ */ ++struct vendor_data { ++ u8 config_offset; ++ u8 channels; ++ u8 signals; ++ bool dualmaster; ++ bool nomadik; ++ bool pl080s; ++ bool ftdmac020; ++ u32 max_transfer_size; ++}; ++ ++/** ++ * struct pl08x_bus_data - information of source or destination ++ * busses for a transfer ++ * @addr: current address ++ * @maxwidth: the maximum width of a transfer on this bus ++ * @buswidth: the width of this bus in bytes: 1, 2 or 4 ++ */ ++struct pl08x_bus_data { ++ dma_addr_t addr; ++ u8 maxwidth; ++ u8 buswidth; ++}; ++ ++#define IS_BUS_ALIGNED(bus) IS_ALIGNED((bus)->addr, (bus)->buswidth) ++ ++/** ++ * struct pl08x_phy_chan - holder for the physical channels ++ * @id: physical index to this channel ++ * @base: memory base address for this physical channel ++ * @reg_config: configuration address for this physical channel ++ * @reg_control: control address for this physical channel ++ * @reg_src: transfer source address register ++ * @reg_dst: transfer destination address register ++ * @reg_lli: transfer LLI address register ++ * @reg_busy: if the variant has a special per-channel busy register, ++ * this contains a pointer to it ++ * @lock: a lock to use when altering an instance of this struct ++ * @serving: the virtual channel currently being served by this physical ++ * channel ++ * @locked: channel unavailable for the system, e.g. dedicated to secure ++ * world ++ * @ftdmac020: channel is on a FTDMAC020 ++ * @pl080s: channel is on a PL08s ++ */ ++struct pl08x_phy_chan { ++ unsigned int id; ++ void __iomem *base; ++ void __iomem *reg_config; ++ void __iomem *reg_control; ++ void __iomem *reg_src; ++ void __iomem *reg_dst; ++ void __iomem *reg_lli; ++ void __iomem *reg_busy; ++ spinlock_t lock; ++ struct pl08x_dma_chan *serving; ++ bool locked; ++ bool ftdmac020; ++ bool pl080s; ++}; ++ ++/** ++ * struct pl08x_sg - structure containing data per sg ++ * @src_addr: src address of sg ++ * @dst_addr: dst address of sg ++ * @len: transfer len in bytes ++ * @node: node for txd's dsg_list ++ */ ++struct pl08x_sg { ++ dma_addr_t src_addr; ++ dma_addr_t dst_addr; ++ size_t len; ++ struct list_head node; ++}; ++ ++/** ++ * struct pl08x_txd - wrapper for struct dma_async_tx_descriptor ++ * @vd: virtual DMA descriptor ++ * @dsg_list: list of children sg's ++ * @llis_bus: DMA memory address (physical) start for the LLIs ++ * @llis_va: virtual memory address start for the LLIs ++ * @cctl: control reg values for current txd ++ * @ccfg: config reg values for current txd ++ * @done: this marks completed descriptors, which should not have their ++ * mux released. ++ * @cyclic: indicate cyclic transfers ++ */ ++struct pl08x_txd { ++ struct virt_dma_desc vd; ++ struct list_head dsg_list; ++ dma_addr_t llis_bus; ++ u32 *llis_va; ++ /* Default cctl value for LLIs */ ++ u32 cctl; ++ /* ++ * Settings to be put into the physical channel when we ++ * trigger this txd. Other registers are in llis_va[0]. ++ */ ++ u32 ccfg; ++ bool done; ++ bool cyclic; ++}; ++ ++/** ++ * enum pl08x_dma_chan_state - holds the PL08x specific virtual channel ++ * states ++ * @PL08X_CHAN_IDLE: the channel is idle ++ * @PL08X_CHAN_RUNNING: the channel has allocated a physical transport ++ * channel and is running a transfer on it ++ * @PL08X_CHAN_PAUSED: the channel has allocated a physical transport ++ * channel, but the transfer is currently paused ++ * @PL08X_CHAN_WAITING: the channel is waiting for a physical transport ++ * channel to become available (only pertains to memcpy channels) ++ */ ++enum pl08x_dma_chan_state { ++ PL08X_CHAN_IDLE, ++ PL08X_CHAN_RUNNING, ++ PL08X_CHAN_PAUSED, ++ PL08X_CHAN_WAITING, ++}; ++ ++/** ++ * struct pl08x_dma_chan - this structure wraps a DMA ENGINE channel ++ * @vc: wrappped virtual channel ++ * @phychan: the physical channel utilized by this channel, if there is one ++ * @name: name of channel ++ * @cd: channel platform data ++ * @cfg: slave configuration ++ * @at: active transaction on this channel ++ * @host: a pointer to the host (internal use) ++ * @state: whether the channel is idle, paused, running etc ++ * @slave: whether this channel is a device (slave) or for memcpy ++ * @signal: the physical DMA request signal which this channel is using ++ * @mux_use: count of descriptors using this DMA request signal setting ++ * @waiting_at: time in jiffies when this channel moved to waiting state ++ */ ++struct pl08x_dma_chan { ++ struct virt_dma_chan vc; ++ struct pl08x_phy_chan *phychan; ++ const char *name; ++ struct pl08x_channel_data *cd; ++ struct dma_slave_config cfg; ++ struct pl08x_txd *at; ++ struct pl08x_driver_data *host; ++ enum pl08x_dma_chan_state state; ++ int chan_id; ++ bool slave; ++ int signal; ++ unsigned mux_use; ++ unsigned long waiting_at; ++}; ++ ++/** ++ * struct pl08x_driver_data - the local state holder for the PL08x ++ * @slave: optional slave engine for this instance ++ * @memcpy: memcpy engine for this instance ++ * @has_slave: the PL08x has a slave engine (routed signals) ++ * @base: virtual memory base (remapped) for the PL08x ++ * @adev: the corresponding AMBA (PrimeCell) bus entry ++ * @vd: vendor data for this PL08x variant ++ * @pd: platform data passed in from the platform/machine ++ * @phy_chans: array of data for the physical channels ++ * @pool: a pool for the LLI descriptors ++ * @lli_buses: bitmask to or in to LLI pointer selecting AHB port for LLI ++ * fetches ++ * @mem_buses: set to indicate memory transfers on AHB2. ++ * @lli_words: how many words are used in each LLI item for this variant ++ */ ++struct pl08x_driver_data { ++ struct dma_device slave; ++ struct dma_device memcpy; ++ bool has_slave; ++ void __iomem *base; ++ struct platform_device *adev; ++ const struct vendor_data *vd; ++ struct pl08x_platform_data *pd; ++ struct pl08x_phy_chan *phy_chans; ++ struct dma_pool *pool; ++ u8 lli_buses; ++ u8 mem_buses; ++ u8 lli_words; ++}; ++ ++/* ++ * PL08X specific defines ++ */ ++ ++/* The order of words in an LLI. */ ++#define PL080_LLI_SRC 0 ++#define PL080_LLI_DST 1 ++#define PL080_LLI_LLI 2 ++#define PL080_LLI_CCTL 3 ++#define PL080S_LLI_CCTL2 4 ++ ++/* Total words in an LLI. */ ++#define PL080_LLI_WORDS 4 ++#define PL080S_LLI_WORDS 8 ++ ++/* ++ * Number of LLIs in each LLI buffer allocated for one transfer ++ * (maximum times we call dma_pool_alloc on this pool without freeing) ++ */ ++#define MAX_NUM_TSFR_LLIS 512 ++#define PL08X_ALIGN 8 ++ ++static inline struct pl08x_dma_chan *to_pl08x_chan(struct dma_chan *chan) ++{ ++ return container_of(chan, struct pl08x_dma_chan, vc.chan); ++} ++ ++static inline struct pl08x_txd *to_pl08x_txd(struct dma_async_tx_descriptor *tx) ++{ ++ return container_of(tx, struct pl08x_txd, vd.tx); ++} ++ ++/* ++ * Mux handling. ++ * ++ * This gives us the DMA request input to the PL08x primecell which the ++ * peripheral described by the channel data will be routed to, possibly ++ * via a board/SoC specific external MUX. One important point to note ++ * here is that this does not depend on the physical channel. ++ */ ++static int pl08x_request_mux(struct pl08x_dma_chan *plchan) ++{ ++ const struct pl08x_platform_data *pd = plchan->host->pd; ++ int ret; ++ ++ if (plchan->mux_use++ == 0 && pd->get_xfer_signal) { ++ ret = pd->get_xfer_signal(plchan->cd); ++ if (ret < 0) { ++ plchan->mux_use = 0; ++ return ret; ++ } ++ ++ plchan->signal = ret; ++ } ++ return 0; ++} ++ ++static void pl08x_release_mux(struct pl08x_dma_chan *plchan) ++{ ++ const struct pl08x_platform_data *pd = plchan->host->pd; ++ ++ if (plchan->signal >= 0) { ++ WARN_ON(plchan->mux_use == 0); ++ ++ if (--plchan->mux_use == 0 && pd->put_xfer_signal) { ++ pd->put_xfer_signal(plchan->cd, plchan->signal); ++ plchan->signal = -1; ++ } ++ } ++} ++ ++/* ++ * Physical channel handling ++ */ ++ ++/* Whether a certain channel is busy or not */ ++static int pl08x_phy_channel_busy(struct pl08x_phy_chan *ch) ++{ ++ unsigned int val; ++ ++ /* If we have a special busy register, take a shortcut */ ++ if (ch->reg_busy) { ++ val = readl(ch->reg_busy); ++ return !!(val & BIT(ch->id)); ++ } ++ val = readl(ch->reg_config); ++ return val & PL080_CONFIG_ACTIVE; ++} ++ ++/* ++ * pl08x_write_lli() - Write an LLI into the DMA controller. ++ * ++ * The PL08x derivatives support linked lists, but the first item of the ++ * list containing the source, destination, control word and next LLI is ++ * ignored. Instead the driver has to write those values directly into the ++ * SRC, DST, LLI and control registers. On FTDMAC020 also the SIZE ++ * register need to be set up for the first transfer. ++ */ ++static void pl08x_write_lli(struct pl08x_driver_data *pl08x, ++ struct pl08x_phy_chan *phychan, const u32 *lli, u32 ccfg) ++{ ++ if (pl08x->vd->pl080s) ++ dev_vdbg(&pl08x->adev->dev, ++ "WRITE channel %d: csrc=0x%08x, cdst=0x%08x, " ++ "clli=0x%08x, cctl=0x%08x, cctl2=0x%08x, ccfg=0x%08x\n", ++ phychan->id, lli[PL080_LLI_SRC], lli[PL080_LLI_DST], ++ lli[PL080_LLI_LLI], lli[PL080_LLI_CCTL], ++ lli[PL080S_LLI_CCTL2], ccfg); ++ else ++ //dev_vdbg(&pl08x->adev->dev, ++ dev_info(&pl08x->adev->dev, ++ "WRITE channel %d: csrc=0x%08x, cdst=0x%08x, " ++ "clli=0x%08x, cctl=0x%08x, ccfg=0x%08x\n", ++ phychan->id, lli[PL080_LLI_SRC], lli[PL080_LLI_DST], ++ lli[PL080_LLI_LLI], lli[PL080_LLI_CCTL], ccfg); ++ ++ writel_relaxed(lli[PL080_LLI_SRC], phychan->reg_src); ++ writel_relaxed(lli[PL080_LLI_DST], phychan->reg_dst); ++ writel_relaxed(lli[PL080_LLI_LLI], phychan->reg_lli); ++ ++ /* ++ * The FTMAC020 has a different layout in the CCTL word of the LLI ++ * and the CCTL register which is split in CSR and SIZE registers. ++ * Convert the LLI item CCTL into the proper values to write into ++ * the CSR and SIZE registers. ++ */ ++ if (phychan->ftdmac020) { ++ u32 llictl = lli[PL080_LLI_CCTL]; ++ u32 val = 0; ++ ++ /* Write the transfer size (12 bits) to the size register */ ++ writel_relaxed(llictl & FTDMAC020_LLI_TRANSFER_SIZE_MASK, ++ phychan->base + FTDMAC020_CH_SIZE); ++ /* ++ * Then write the control bits 28..16 to the control register ++ * by shuffleing the bits around to where they are in the ++ * main register. The mapping is as follows: ++ * Bit 28: TC_MSK - mask on all except last LLI ++ * Bit 27..25: SRC_WIDTH ++ * Bit 24..22: DST_WIDTH ++ * Bit 21..20: SRCAD_CTRL ++ * Bit 19..17: DSTAD_CTRL ++ * Bit 17: SRC_SEL ++ * Bit 16: DST_SEL ++ */ ++ if (llictl & FTDMAC020_LLI_TC_MSK) ++ val |= FTDMAC020_CH_CSR_TC_MSK; ++ val |= ((llictl & FTDMAC020_LLI_SRC_WIDTH_MSK) >> ++ (FTDMAC020_LLI_SRC_WIDTH_SHIFT - ++ FTDMAC020_CH_CSR_SRC_WIDTH_SHIFT)); ++ val |= ((llictl & FTDMAC020_LLI_DST_WIDTH_MSK) >> ++ (FTDMAC020_LLI_DST_WIDTH_SHIFT - ++ FTDMAC020_CH_CSR_DST_WIDTH_SHIFT)); ++ val |= ((llictl & FTDMAC020_LLI_SRCAD_CTL_MSK) >> ++ (FTDMAC020_LLI_SRCAD_CTL_SHIFT - ++ FTDMAC020_CH_CSR_SRCAD_CTL_SHIFT)); ++ val |= ((llictl & FTDMAC020_LLI_DSTAD_CTL_MSK) >> ++ (FTDMAC020_LLI_DSTAD_CTL_SHIFT - ++ FTDMAC020_CH_CSR_DSTAD_CTL_SHIFT)); ++ if (llictl & FTDMAC020_LLI_SRC_SEL) ++ val |= FTDMAC020_CH_CSR_SRC_SEL; ++ if (llictl & FTDMAC020_LLI_DST_SEL) ++ val |= FTDMAC020_CH_CSR_DST_SEL; ++ ++ /* ++ * Set up the bits that exist in the CSR but are not ++ * part the LLI, i.e. only gets written to the control ++ * register right here. ++ * ++ * FIXME: do not just handle memcpy, also handle slave DMA. ++ */ ++ switch (pl08x->pd->memcpy_burst_size) { ++ default: ++ case PL08X_BURST_SZ_1: ++ val |= PL080_BSIZE_1 << ++ FTDMAC020_CH_CSR_SRC_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_4: ++ val |= PL080_BSIZE_4 << ++ FTDMAC020_CH_CSR_SRC_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_8: ++ val |= PL080_BSIZE_8 << ++ FTDMAC020_CH_CSR_SRC_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_16: ++ val |= PL080_BSIZE_16 << ++ FTDMAC020_CH_CSR_SRC_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_32: ++ val |= PL080_BSIZE_32 << ++ FTDMAC020_CH_CSR_SRC_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_64: ++ val |= PL080_BSIZE_64 << ++ FTDMAC020_CH_CSR_SRC_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_128: ++ val |= PL080_BSIZE_128 << ++ FTDMAC020_CH_CSR_SRC_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_256: ++ val |= PL080_BSIZE_256 << ++ FTDMAC020_CH_CSR_SRC_SIZE_SHIFT; ++ break; ++ } ++ ++ /* Protection flags */ ++ if (pl08x->pd->memcpy_prot_buff) ++ val |= FTDMAC020_CH_CSR_PROT2; ++ if (pl08x->pd->memcpy_prot_cache) ++ val |= FTDMAC020_CH_CSR_PROT3; ++ /* We are the kernel, so we are in privileged mode */ ++ val |= FTDMAC020_CH_CSR_PROT1; ++ ++ writel_relaxed(val, phychan->reg_control); ++ } else { ++ /* printk("this is debug lli[PL080_LLI_CCTL] = %x reg_control = %x %s %s %d\n", ++ lli[PL080_LLI_CCTL],phychan->reg_control,__FILE__,__func__,__LINE__); ++ */ ++ /* Bits are just identical */ ++ writel_relaxed(lli[PL080_LLI_CCTL], phychan->reg_control); ++ } ++ ++ /* Second control word on the PL080s */ ++ if (pl08x->vd->pl080s) ++ writel_relaxed(lli[PL080S_LLI_CCTL2], ++ phychan->base + PL080S_CH_CONTROL2); ++ ++ /* ++ printk("this is debug ccfg = %x reg_config = %x %s %s %d\n", ++ ccfg,phychan->reg_config,__FILE__,__func__,__LINE__); ++ */ ++ writel(ccfg, phychan->reg_config); ++} ++ ++/* ++ * Set the initial DMA register values i.e. those for the first LLI ++ * The next LLI pointer and the configuration interrupt bit have ++ * been set when the LLIs were constructed. Poke them into the hardware ++ * and start the transfer. ++ */ ++static void pl08x_start_next_txd(struct pl08x_dma_chan *plchan) ++{ ++ struct pl08x_driver_data *pl08x = plchan->host; ++ struct pl08x_phy_chan *phychan = plchan->phychan; ++ struct virt_dma_desc *vd = vchan_next_desc(&plchan->vc); ++ struct pl08x_txd *txd = to_pl08x_txd(&vd->tx); ++ u32 val; ++ ++ list_del(&txd->vd.node); ++ ++ plchan->at = txd; ++ ++ /* Wait for channel inactive */ ++ while (pl08x_phy_channel_busy(phychan)) ++ cpu_relax(); ++ //printk("this is debug txd->ccfg = %x %s %s %d\n",txd->ccfg,__FILE__,__func__,__LINE__); ++ pl08x_write_lli(pl08x, phychan, &txd->llis_va[0], txd->ccfg); ++ ++ /* Enable the DMA channel */ ++ /* Do not access config register until channel shows as disabled */ ++ //printk("this is debug en_chan = %x id = %d %s %s %d\n",readl(pl08x->base + PL080_EN_CHAN),phychan->id,__FILE__,__func__,__LINE__); ++ while (readl(pl08x->base + PL080_EN_CHAN) & BIT(phychan->id)) ++ cpu_relax(); ++ ++ //printk("this is debug en_chan = %x id = %d %s %s %d\n",readl(pl08x->base + PL080_EN_CHAN),phychan->id,__FILE__,__func__,__LINE__); ++ /* Do not access config register until channel shows as inactive */ ++ if (phychan->ftdmac020) { ++ val = readl(phychan->reg_config); ++ while (val & FTDMAC020_CH_CFG_BUSY) ++ val = readl(phychan->reg_config); ++ ++ val = readl(phychan->reg_control); ++ while (val & FTDMAC020_CH_CSR_EN) ++ val = readl(phychan->reg_control); ++ ++ writel(val | FTDMAC020_CH_CSR_EN, ++ phychan->reg_control); ++ } else { ++ val = readl(phychan->reg_config); ++ while ((val & PL080_CONFIG_ACTIVE) || ++ (val & PL080_CONFIG_ENABLE)) ++ val = readl(phychan->reg_config); ++ //printk("this is debug val = %x phychan->reg_config = %x %s %s %d\n",val, phychan->reg_config,__FILE__,__func__,__LINE__); ++ writel(val | PL080_CONFIG_ENABLE, phychan->reg_config); ++#if 0 ++ while(!(readl(pl08x->base + PL080_EN_CHAN) & BIT(phychan->id))){ ++ printk("this is debug val = %x phychan->reg_config = %x %s %s %d\n",val, phychan->reg_config,__FILE__,__func__,__LINE__); ++ writel(val | PL080_CONFIG_ENABLE, phychan->reg_config); ++ } ++#endif ++ } ++ //printk("this is debug reg_config = %x en_chan = %x id = %d %s %s %d\n",readl(phychan->reg_config), ++ // readl(pl08x->base + PL080_EN_CHAN),phychan->id,__FILE__,__func__,__LINE__); ++} ++ ++/* ++ * Pause the channel by setting the HALT bit. ++ * ++ * For M->P transfers, pause the DMAC first and then stop the peripheral - ++ * the FIFO can only drain if the peripheral is still requesting data. ++ * (note: this can still timeout if the DMAC FIFO never drains of data.) ++ * ++ * For P->M transfers, disable the peripheral first to stop it filling ++ * the DMAC FIFO, and then pause the DMAC. ++ */ ++static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) ++{ ++ u32 val; ++ int timeout; ++ ++ if (ch->ftdmac020) { ++ /* Use the enable bit on the FTDMAC020 */ ++ val = readl(ch->reg_control); ++ val &= ~FTDMAC020_CH_CSR_EN; ++ writel(val, ch->reg_control); ++ return; ++ } ++ ++ /* Set the HALT bit and wait for the FIFO to drain */ ++ val = readl(ch->reg_config); ++ val |= PL080_CONFIG_HALT; ++ writel(val, ch->reg_config); ++ ++ /* Wait for channel inactive */ ++ for (timeout = 1000; timeout; timeout--) { ++ if (!pl08x_phy_channel_busy(ch)) ++ break; ++ udelay(1); ++ } ++ if (pl08x_phy_channel_busy(ch)) ++ pr_err("pl08x: channel%u timeout waiting for pause\n", ch->id); ++} ++ ++static void pl08x_resume_phy_chan(struct pl08x_phy_chan *ch) ++{ ++ u32 val; ++ ++ /* Use the enable bit on the FTDMAC020 */ ++ if (ch->ftdmac020) { ++ val = readl(ch->reg_control); ++ val |= FTDMAC020_CH_CSR_EN; ++ writel(val, ch->reg_control); ++ return; ++ } ++ ++ /* Clear the HALT bit */ ++ val = readl(ch->reg_config); ++ val &= ~PL080_CONFIG_HALT; ++ writel(val, ch->reg_config); ++} ++ ++/* ++ * pl08x_terminate_phy_chan() stops the channel, clears the FIFO and ++ * clears any pending interrupt status. This should not be used for ++ * an on-going transfer, but as a method of shutting down a channel ++ * (eg, when it's no longer used) or terminating a transfer. ++ */ ++static void pl08x_terminate_phy_chan(struct pl08x_driver_data *pl08x, ++ struct pl08x_phy_chan *ch) ++{ ++ u32 val; ++ ++ /* The layout for the FTDMAC020 is different */ ++ if (ch->ftdmac020) { ++ /* Disable all interrupts */ ++ val = readl(ch->reg_config); ++ val |= (FTDMAC020_CH_CFG_INT_ABT_MASK | ++ FTDMAC020_CH_CFG_INT_ERR_MASK | ++ FTDMAC020_CH_CFG_INT_TC_MASK); ++ writel(val, ch->reg_config); ++ ++ /* Abort and disable channel */ ++ val = readl(ch->reg_control); ++ val &= ~FTDMAC020_CH_CSR_EN; ++ val |= FTDMAC020_CH_CSR_ABT; ++ writel(val, ch->reg_control); ++ ++ /* Clear ABT and ERR interrupt flags */ ++ writel(BIT(ch->id) | BIT(ch->id + 16), ++ pl08x->base + PL080_ERR_CLEAR); ++ writel(BIT(ch->id), pl08x->base + PL080_TC_CLEAR); ++ ++ return; ++ } ++ ++ val = readl(ch->reg_config); ++ val &= ~(PL080_CONFIG_ENABLE | PL080_CONFIG_ERR_IRQ_MASK | ++ PL080_CONFIG_TC_IRQ_MASK); ++ writel(val, ch->reg_config); ++ ++ writel(BIT(ch->id), pl08x->base + PL080_ERR_CLEAR); ++ writel(BIT(ch->id), pl08x->base + PL080_TC_CLEAR); ++} ++ ++static u32 get_bytes_in_phy_channel(struct pl08x_phy_chan *ch) ++{ ++ u32 val; ++ u32 bytes; ++ ++ if (ch->ftdmac020) { ++ bytes = readl(ch->base + FTDMAC020_CH_SIZE); ++ ++ val = readl(ch->reg_control); ++ val &= FTDMAC020_CH_CSR_SRC_WIDTH_MSK; ++ val >>= FTDMAC020_CH_CSR_SRC_WIDTH_SHIFT; ++ } else if (ch->pl080s) { ++ val = readl(ch->base + PL080S_CH_CONTROL2); ++ bytes = val & PL080S_CONTROL_TRANSFER_SIZE_MASK; ++ ++ val = readl(ch->reg_control); ++ val &= PL080_CONTROL_SWIDTH_MASK; ++ val >>= PL080_CONTROL_SWIDTH_SHIFT; ++ } else { ++ /* Plain PL08x */ ++ val = readl(ch->reg_control); ++ bytes = val & PL080_CONTROL_TRANSFER_SIZE_MASK; ++ ++ val &= PL080_CONTROL_SWIDTH_MASK; ++ val >>= PL080_CONTROL_SWIDTH_SHIFT; ++ } ++ ++ switch (val) { ++ case PL080_WIDTH_8BIT: ++ break; ++ case PL080_WIDTH_16BIT: ++ bytes *= 2; ++ break; ++ case PL080_WIDTH_32BIT: ++ bytes *= 4; ++ break; ++ } ++ return bytes; ++} ++ ++static u32 get_bytes_in_lli(struct pl08x_phy_chan *ch, const u32 *llis_va) ++{ ++ u32 val; ++ u32 bytes; ++ ++ if (ch->ftdmac020) { ++ val = llis_va[PL080_LLI_CCTL]; ++ bytes = val & FTDMAC020_LLI_TRANSFER_SIZE_MASK; ++ ++ val = llis_va[PL080_LLI_CCTL]; ++ val &= FTDMAC020_LLI_SRC_WIDTH_MSK; ++ val >>= FTDMAC020_LLI_SRC_WIDTH_SHIFT; ++ } else if (ch->pl080s) { ++ val = llis_va[PL080S_LLI_CCTL2]; ++ bytes = val & PL080S_CONTROL_TRANSFER_SIZE_MASK; ++ ++ val = llis_va[PL080_LLI_CCTL]; ++ val &= PL080_CONTROL_SWIDTH_MASK; ++ val >>= PL080_CONTROL_SWIDTH_SHIFT; ++ } else { ++ /* Plain PL08x */ ++ val = llis_va[PL080_LLI_CCTL]; ++ bytes = val & PL080_CONTROL_TRANSFER_SIZE_MASK; ++ ++ val &= PL080_CONTROL_SWIDTH_MASK; ++ val >>= PL080_CONTROL_SWIDTH_SHIFT; ++ } ++ ++ switch (val) { ++ case PL080_WIDTH_8BIT: ++ break; ++ case PL080_WIDTH_16BIT: ++ bytes *= 2; ++ break; ++ case PL080_WIDTH_32BIT: ++ bytes *= 4; ++ break; ++ } ++ return bytes; ++} ++ ++/* The channel should be paused when calling this */ ++static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan) ++{ ++ struct pl08x_driver_data *pl08x = plchan->host; ++ const u32 *llis_va, *llis_va_limit; ++ struct pl08x_phy_chan *ch; ++ dma_addr_t llis_bus; ++ struct pl08x_txd *txd; ++ u32 llis_max_words; ++ size_t bytes; ++ u32 clli; ++ ++ ch = plchan->phychan; ++ txd = plchan->at; ++ ++ if (!ch || !txd) ++ return 0; ++ ++ /* ++ * Follow the LLIs to get the number of remaining ++ * bytes in the currently active transaction. ++ */ ++ clli = readl(ch->reg_lli) & ~PL080_LLI_LM_AHB2; ++ ++ /* First get the remaining bytes in the active transfer */ ++ bytes = get_bytes_in_phy_channel(ch); ++ ++ if (!clli) ++ return bytes; ++ ++ llis_va = txd->llis_va; ++ llis_bus = txd->llis_bus; ++ ++ llis_max_words = pl08x->lli_words * MAX_NUM_TSFR_LLIS; ++ BUG_ON(clli < llis_bus || clli >= llis_bus + ++ sizeof(u32) * llis_max_words); ++ ++ /* ++ * Locate the next LLI - as this is an array, ++ * it's simple maths to find. ++ */ ++ llis_va += (clli - llis_bus) / sizeof(u32); ++ ++ llis_va_limit = llis_va + llis_max_words; ++ ++ for (; llis_va < llis_va_limit; llis_va += pl08x->lli_words) { ++ bytes += get_bytes_in_lli(ch, llis_va); ++ ++ /* ++ * A LLI pointer going backward terminates the LLI list ++ */ ++ if (llis_va[PL080_LLI_LLI] <= clli) ++ break; ++ } ++ ++ return bytes; ++} ++ ++/* ++ * Allocate a physical channel for a virtual channel ++ * ++ * Try to locate a physical channel to be used for this transfer. If all ++ * are taken return NULL and the requester will have to cope by using ++ * some fallback PIO mode or retrying later. ++ */ ++static struct pl08x_phy_chan * ++pl08x_get_phy_channel(struct pl08x_driver_data *pl08x, ++ struct pl08x_dma_chan *virt_chan) ++{ ++ struct pl08x_phy_chan *ch = NULL; ++ unsigned long flags; ++ int i; ++ ++ //printk("this is debug virt_chan->id = %d %s %s %d\n",virt_chan->chan_id,__FILE__,__func__,__LINE__); ++#if 1 ++ ch = &pl08x->phy_chans[virt_chan->chan_id]; ++ ++ spin_lock_irqsave(&ch->lock, flags); ++ ++ if (!ch->locked && !ch->serving) { ++ ch->serving = virt_chan; ++ spin_unlock_irqrestore(&ch->lock, flags); ++ return ch; ++ } ++ ++ spin_unlock_irqrestore(&ch->lock, flags); ++#endif ++ for (i = 0; i < pl08x->vd->channels; i++) { ++ ch = &pl08x->phy_chans[i]; ++ ++ spin_lock_irqsave(&ch->lock, flags); ++ ++ if (!ch->locked && !ch->serving) { ++ ch->serving = virt_chan; ++ spin_unlock_irqrestore(&ch->lock, flags); ++ break; ++ } ++ ++ spin_unlock_irqrestore(&ch->lock, flags); ++ } ++ ++ if (i == pl08x->vd->channels) { ++ /* No physical channel available, cope with it */ ++ return NULL; ++ } ++ ++ return ch; ++} ++ ++/* Mark the physical channel as free. Note, this write is atomic. */ ++static inline void pl08x_put_phy_channel(struct pl08x_driver_data *pl08x, ++ struct pl08x_phy_chan *ch) ++{ ++ ch->serving = NULL; ++} ++ ++/* ++ * Try to allocate a physical channel. When successful, assign it to ++ * this virtual channel, and initiate the next descriptor. The ++ * virtual channel lock must be held at this point. ++ */ ++static void pl08x_phy_alloc_and_start(struct pl08x_dma_chan *plchan) ++{ ++ struct pl08x_driver_data *pl08x = plchan->host; ++ struct pl08x_phy_chan *ch; ++ ++ ch = pl08x_get_phy_channel(pl08x, plchan); ++ if (!ch) { ++ dev_dbg(&pl08x->adev->dev, "no physical channel available for xfer on %s\n", plchan->name); ++ plchan->state = PL08X_CHAN_WAITING; ++ plchan->waiting_at = jiffies; ++ return; ++ } ++ ++ dev_dbg(&pl08x->adev->dev, "allocated physical channel %d for xfer on %s\n", ++ ch->id, plchan->name); ++ ++ plchan->phychan = ch; ++ plchan->state = PL08X_CHAN_RUNNING; ++ pl08x_start_next_txd(plchan); ++} ++ ++static void pl08x_phy_reassign_start(struct pl08x_phy_chan *ch, ++ struct pl08x_dma_chan *plchan) ++{ ++ struct pl08x_driver_data *pl08x = plchan->host; ++ ++ dev_dbg(&pl08x->adev->dev, "reassigned physical channel %d for xfer on %s\n", ++ ch->id, plchan->name); ++ ++ /* ++ * We do this without taking the lock; we're really only concerned ++ * about whether this pointer is NULL or not, and we're guaranteed ++ * that this will only be called when it _already_ is non-NULL. ++ */ ++ ch->serving = plchan; ++ plchan->phychan = ch; ++ plchan->state = PL08X_CHAN_RUNNING; ++ pl08x_start_next_txd(plchan); ++} ++ ++/* ++ * Free a physical DMA channel, potentially reallocating it to another ++ * virtual channel if we have any pending. ++ */ ++static void pl08x_phy_free(struct pl08x_dma_chan *plchan) ++{ ++ struct pl08x_driver_data *pl08x = plchan->host; ++ struct pl08x_dma_chan *p, *next; ++ unsigned long waiting_at; ++ retry: ++ next = NULL; ++ waiting_at = jiffies; ++ ++ /* ++ * Find a waiting virtual channel for the next transfer. ++ * To be fair, time when each channel reached waiting state is compared ++ * to select channel that is waiting for the longest time. ++ */ ++ list_for_each_entry(p, &pl08x->memcpy.channels, vc.chan.device_node) ++ if (p->state == PL08X_CHAN_WAITING && ++ p->waiting_at <= waiting_at) { ++ next = p; ++ waiting_at = p->waiting_at; ++ } ++ ++ if (!next && pl08x->has_slave) { ++ list_for_each_entry(p, &pl08x->slave.channels, vc.chan.device_node) ++ if (p->state == PL08X_CHAN_WAITING && ++ p->waiting_at <= waiting_at) { ++ next = p; ++ waiting_at = p->waiting_at; ++ } ++ } ++ ++ /* Ensure that the physical channel is stopped */ ++ pl08x_terminate_phy_chan(pl08x, plchan->phychan); ++ ++ if (next) { ++ bool success; ++ ++ /* ++ * Eww. We know this isn't going to deadlock ++ * but lockdep probably doesn't. ++ */ ++ spin_lock(&next->vc.lock); ++ /* Re-check the state now that we have the lock */ ++ success = next->state == PL08X_CHAN_WAITING; ++ if (success) ++ pl08x_phy_reassign_start(plchan->phychan, next); ++ spin_unlock(&next->vc.lock); ++ ++ /* If the state changed, try to find another channel */ ++ if (!success) ++ goto retry; ++ } else { ++ /* No more jobs, so free up the physical channel */ ++ pl08x_put_phy_channel(pl08x, plchan->phychan); ++ } ++ ++ plchan->phychan = NULL; ++ plchan->state = PL08X_CHAN_IDLE; ++} ++ ++/* ++ * LLI handling ++ */ ++ ++static inline unsigned int ++pl08x_get_bytes_for_lli(struct pl08x_driver_data *pl08x, ++ u32 cctl, ++ bool source) ++{ ++ u32 val; ++ ++ if (pl08x->vd->ftdmac020) { ++ if (source) ++ val = (cctl & FTDMAC020_LLI_SRC_WIDTH_MSK) >> ++ FTDMAC020_LLI_SRC_WIDTH_SHIFT; ++ else ++ val = (cctl & FTDMAC020_LLI_DST_WIDTH_MSK) >> ++ FTDMAC020_LLI_DST_WIDTH_SHIFT; ++ } else { ++ if (source) ++ val = (cctl & PL080_CONTROL_SWIDTH_MASK) >> ++ PL080_CONTROL_SWIDTH_SHIFT; ++ else ++ val = (cctl & PL080_CONTROL_DWIDTH_MASK) >> ++ PL080_CONTROL_DWIDTH_SHIFT; ++ } ++ ++ switch (val) { ++ case PL080_WIDTH_8BIT: ++ return 1; ++ case PL080_WIDTH_16BIT: ++ return 2; ++ case PL080_WIDTH_32BIT: ++ return 4; ++ default: ++ break; ++ } ++ BUG(); ++ return 0; ++} ++ ++static inline u32 pl08x_lli_control_bits(struct pl08x_driver_data *pl08x, ++ u32 cctl, ++ u8 srcwidth, u8 dstwidth, ++ size_t tsize) ++{ ++ u32 retbits = cctl; ++ ++ /* ++ * Remove all src, dst and transfer size bits, then set the ++ * width and size according to the parameters. The bit offsets ++ * are different in the FTDMAC020 so we need to accound for this. ++ */ ++ if (pl08x->vd->ftdmac020) { ++ retbits &= ~FTDMAC020_LLI_DST_WIDTH_MSK; ++ retbits &= ~FTDMAC020_LLI_SRC_WIDTH_MSK; ++ retbits &= ~FTDMAC020_LLI_TRANSFER_SIZE_MASK; ++ ++ switch (srcwidth) { ++ case 1: ++ retbits |= PL080_WIDTH_8BIT << ++ FTDMAC020_LLI_SRC_WIDTH_SHIFT; ++ break; ++ case 2: ++ retbits |= PL080_WIDTH_16BIT << ++ FTDMAC020_LLI_SRC_WIDTH_SHIFT; ++ break; ++ case 4: ++ retbits |= PL080_WIDTH_32BIT << ++ FTDMAC020_LLI_SRC_WIDTH_SHIFT; ++ break; ++ default: ++ BUG(); ++ break; ++ } ++ ++ switch (dstwidth) { ++ case 1: ++ retbits |= PL080_WIDTH_8BIT << ++ FTDMAC020_LLI_DST_WIDTH_SHIFT; ++ break; ++ case 2: ++ retbits |= PL080_WIDTH_16BIT << ++ FTDMAC020_LLI_DST_WIDTH_SHIFT; ++ break; ++ case 4: ++ retbits |= PL080_WIDTH_32BIT << ++ FTDMAC020_LLI_DST_WIDTH_SHIFT; ++ break; ++ default: ++ BUG(); ++ break; ++ } ++ ++ tsize &= FTDMAC020_LLI_TRANSFER_SIZE_MASK; ++ retbits |= tsize << FTDMAC020_LLI_TRANSFER_SIZE_SHIFT; ++ } else { ++ retbits &= ~PL080_CONTROL_DWIDTH_MASK; ++ retbits &= ~PL080_CONTROL_SWIDTH_MASK; ++ retbits &= ~PL080_CONTROL_TRANSFER_SIZE_MASK; ++ ++ switch (srcwidth) { ++ case 1: ++ retbits |= PL080_WIDTH_8BIT << ++ PL080_CONTROL_SWIDTH_SHIFT; ++ break; ++ case 2: ++ retbits |= PL080_WIDTH_16BIT << ++ PL080_CONTROL_SWIDTH_SHIFT; ++ break; ++ case 4: ++ retbits |= PL080_WIDTH_32BIT << ++ PL080_CONTROL_SWIDTH_SHIFT; ++ break; ++ default: ++ BUG(); ++ break; ++ } ++ ++ switch (dstwidth) { ++ case 1: ++ retbits |= PL080_WIDTH_8BIT << ++ PL080_CONTROL_DWIDTH_SHIFT; ++ break; ++ case 2: ++ retbits |= PL080_WIDTH_16BIT << ++ PL080_CONTROL_DWIDTH_SHIFT; ++ break; ++ case 4: ++ retbits |= PL080_WIDTH_32BIT << ++ PL080_CONTROL_DWIDTH_SHIFT; ++ break; ++ default: ++ BUG(); ++ break; ++ } ++ ++ tsize &= PL080_CONTROL_TRANSFER_SIZE_MASK; ++ retbits |= tsize << PL080_CONTROL_TRANSFER_SIZE_SHIFT; ++ } ++ ++ return retbits; ++} ++ ++struct pl08x_lli_build_data { ++ struct pl08x_txd *txd; ++ struct pl08x_bus_data srcbus; ++ struct pl08x_bus_data dstbus; ++ size_t remainder; ++ u32 lli_bus; ++}; ++ ++/* ++ * Autoselect a master bus to use for the transfer. Slave will be the chosen as ++ * victim in case src & dest are not similarly aligned. i.e. If after aligning ++ * masters address with width requirements of transfer (by sending few byte by ++ * byte data), slave is still not aligned, then its width will be reduced to ++ * BYTE. ++ * - prefers the destination bus if both available ++ * - prefers bus with fixed address (i.e. peripheral) ++ */ ++static void pl08x_choose_master_bus(struct pl08x_driver_data *pl08x, ++ struct pl08x_lli_build_data *bd, ++ struct pl08x_bus_data **mbus, ++ struct pl08x_bus_data **sbus, ++ u32 cctl) ++{ ++ bool dst_incr; ++ bool src_incr; ++ ++ /* ++ * The FTDMAC020 only supports memory-to-memory transfer, so ++ * source and destination always increase. ++ */ ++ if (pl08x->vd->ftdmac020) { ++ dst_incr = true; ++ src_incr = true; ++ } else { ++ dst_incr = !!(cctl & PL080_CONTROL_DST_INCR); ++ src_incr = !!(cctl & PL080_CONTROL_SRC_INCR); ++ } ++ ++ /* ++ * If either bus is not advancing, i.e. it is a peripheral, that ++ * one becomes master ++ */ ++ if (!dst_incr) { ++ *mbus = &bd->dstbus; ++ *sbus = &bd->srcbus; ++ } else if (!src_incr) { ++ *mbus = &bd->srcbus; ++ *sbus = &bd->dstbus; ++ } else { ++ if (bd->dstbus.buswidth >= bd->srcbus.buswidth) { ++ *mbus = &bd->dstbus; ++ *sbus = &bd->srcbus; ++ } else { ++ *mbus = &bd->srcbus; ++ *sbus = &bd->dstbus; ++ } ++ } ++} ++ ++/* ++ * Fills in one LLI for a certain transfer descriptor and advance the counter ++ */ ++static void pl08x_fill_lli_for_desc(struct pl08x_driver_data *pl08x, ++ struct pl08x_lli_build_data *bd, ++ int num_llis, int len, u32 cctl, u32 cctl2) ++{ ++ u32 offset = num_llis * pl08x->lli_words; ++ u32 *llis_va = bd->txd->llis_va + offset; ++ dma_addr_t llis_bus = bd->txd->llis_bus; ++ ++ BUG_ON(num_llis >= MAX_NUM_TSFR_LLIS); ++ ++ /* ++ printk("this is debug num_llis = %x lli_words = %x %s %s %d\n", ++ num_llis,pl08x->lli_words,__FILE__,__func__,__LINE__); ++ */ ++ /* Advance the offset to next LLI. */ ++ offset += pl08x->lli_words; ++ ++ llis_va[PL080_LLI_SRC] = bd->srcbus.addr; ++ llis_va[PL080_LLI_DST] = bd->dstbus.addr; ++ llis_va[PL080_LLI_LLI] = (llis_bus + sizeof(u32) * offset); ++ llis_va[PL080_LLI_LLI] |= bd->lli_bus; ++ llis_va[PL080_LLI_CCTL] = cctl; ++ if (pl08x->vd->pl080s) ++ llis_va[PL080S_LLI_CCTL2] = cctl2; ++ ++ if (pl08x->vd->ftdmac020) { ++ /* FIXME: only memcpy so far so both increase */ ++ bd->srcbus.addr += len; ++ bd->dstbus.addr += len; ++ } else { ++ if (cctl & PL080_CONTROL_SRC_INCR) ++ bd->srcbus.addr += len; ++ if (cctl & PL080_CONTROL_DST_INCR) ++ bd->dstbus.addr += len; ++ } ++ ++ BUG_ON(bd->remainder < len); ++ ++ bd->remainder -= len; ++} ++ ++static inline void prep_byte_width_lli(struct pl08x_driver_data *pl08x, ++ struct pl08x_lli_build_data *bd, u32 *cctl, u32 len, ++ int num_llis, size_t *total_bytes) ++{ ++ *cctl = pl08x_lli_control_bits(pl08x, *cctl, 1, 1, len); ++ pl08x_fill_lli_for_desc(pl08x, bd, num_llis, len, *cctl, len); ++ (*total_bytes) += len; ++} ++ ++#if 1 ++static void pl08x_dump_lli(struct pl08x_driver_data *pl08x, ++ const u32 *llis_va, int num_llis) ++{ ++ int i; ++ ++ if (pl08x->vd->pl080s) { ++ dev_vdbg(&pl08x->adev->dev, ++ "%-3s %-9s %-10s %-10s %-10s %-10s %s\n", ++ "lli", "", "csrc", "cdst", "clli", "cctl", "cctl2"); ++ for (i = 0; i < num_llis; i++) { ++ dev_vdbg(&pl08x->adev->dev, ++ "%3d @%p: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", ++ i, llis_va, llis_va[PL080_LLI_SRC], ++ llis_va[PL080_LLI_DST], llis_va[PL080_LLI_LLI], ++ llis_va[PL080_LLI_CCTL], ++ llis_va[PL080S_LLI_CCTL2]); ++ llis_va += pl08x->lli_words; ++ } ++ } else { ++ //dev_vdbg(&pl08x->adev->dev, ++ dev_info(&pl08x->adev->dev, ++ "%-3s %-9s %-10s %-10s %-10s %s\n", ++ "lli", "", "csrc", "cdst", "clli", "cctl"); ++ for (i = 0; i < num_llis; i++) { ++ //dev_vdbg(&pl08x->adev->dev, ++ dev_info(&pl08x->adev->dev, ++ "%3d @%p: 0x%08x 0x%08x 0x%08x 0x%08x\n", ++ i, llis_va, llis_va[PL080_LLI_SRC], ++ llis_va[PL080_LLI_DST], llis_va[PL080_LLI_LLI], ++ llis_va[PL080_LLI_CCTL]); ++ llis_va += pl08x->lli_words; ++ } ++ } ++} ++#else ++static inline void pl08x_dump_lli(struct pl08x_driver_data *pl08x, ++ const u32 *llis_va, int num_llis) {} ++#endif ++ ++extern u64 dw_virt_to_phys(void *vaddr); ++/* ++ * This fills in the table of LLIs for the transfer descriptor ++ * Note that we assume we never have to change the burst sizes ++ * Return 0 for error ++ */ ++static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, ++ struct pl08x_txd *txd) ++{ ++ struct pl08x_bus_data *mbus, *sbus; ++ struct pl08x_lli_build_data bd; ++ int num_llis = 0; ++ u32 cctl, early_bytes = 0; ++ size_t max_bytes_per_lli, total_bytes; ++ u32 *llis_va, *last_lli; ++ struct pl08x_sg *dsg; ++ ++ txd->llis_va = dma_pool_alloc(pl08x->pool, GFP_NOWAIT, &txd->llis_bus); ++ if (!txd->llis_va) { ++ dev_err(&pl08x->adev->dev, "%s no memory for llis\n", __func__); ++ return 0; ++ } ++ ++ /* ++ printk("this is debug txd->llis_bus = %llx pl08x->lli_buses = %x llis_va = %llx %s %s %d\n", ++ txd->llis_bus,pl08x->lli_buses,dw_virt_to_phys(txd->llis_va),__FILE__,__func__,__LINE__); ++ */ ++ bd.txd = txd; ++ bd.lli_bus = (pl08x->lli_buses & PL08X_AHB2) ? PL080_LLI_LM_AHB2 : 0; ++ cctl = txd->cctl; ++ ++ /* Find maximum width of the source bus */ ++ bd.srcbus.maxwidth = pl08x_get_bytes_for_lli(pl08x, cctl, true); ++ ++ /* Find maximum width of the destination bus */ ++ bd.dstbus.maxwidth = pl08x_get_bytes_for_lli(pl08x, cctl, false); ++ ++ list_for_each_entry(dsg, &txd->dsg_list, node) { ++ total_bytes = 0; ++ cctl = txd->cctl; ++ ++ bd.srcbus.addr = dsg->src_addr; ++ bd.dstbus.addr = dsg->dst_addr; ++ bd.remainder = dsg->len; ++ bd.srcbus.buswidth = bd.srcbus.maxwidth; ++ bd.dstbus.buswidth = bd.dstbus.maxwidth; ++ ++ pl08x_choose_master_bus(pl08x, &bd, &mbus, &sbus, cctl); ++ ++ dev_vdbg(&pl08x->adev->dev, ++ "src=0x%08llx%s/%u dst=0x%08llx%s/%u len=%zu\n", ++ (u64)bd.srcbus.addr, ++ cctl & PL080_CONTROL_SRC_INCR ? "+" : "", ++ bd.srcbus.buswidth, ++ (u64)bd.dstbus.addr, ++ cctl & PL080_CONTROL_DST_INCR ? "+" : "", ++ bd.dstbus.buswidth, ++ bd.remainder); ++ dev_vdbg(&pl08x->adev->dev, "mbus=%s sbus=%s\n", ++ mbus == &bd.srcbus ? "src" : "dst", ++ sbus == &bd.srcbus ? "src" : "dst"); ++ ++ /* ++ * Zero length is only allowed if all these requirements are ++ * met: ++ * - flow controller is peripheral. ++ * - src.addr is aligned to src.width ++ * - dst.addr is aligned to dst.width ++ * ++ * sg_len == 1 should be true, as there can be two cases here: ++ * ++ * - Memory addresses are contiguous and are not scattered. ++ * Here, Only one sg will be passed by user driver, with ++ * memory address and zero length. We pass this to controller ++ * and after the transfer it will receive the last burst ++ * request from peripheral and so transfer finishes. ++ * ++ * - Memory addresses are scattered and are not contiguous. ++ * Here, Obviously as DMA controller doesn't know when a lli's ++ * transfer gets over, it can't load next lli. So in this ++ * case, there has to be an assumption that only one lli is ++ * supported. Thus, we can't have scattered addresses. ++ */ ++ if (!bd.remainder) { ++ u32 fc; ++ ++ /* FTDMAC020 only does memory-to-memory */ ++ if (pl08x->vd->ftdmac020) ++ fc = PL080_FLOW_MEM2MEM; ++ else ++ fc = (txd->ccfg & PL080_CONFIG_FLOW_CONTROL_MASK) >> ++ PL080_CONFIG_FLOW_CONTROL_SHIFT; ++ if (!((fc >= PL080_FLOW_SRC2DST_DST) && ++ (fc <= PL080_FLOW_SRC2DST_SRC))) { ++ dev_err(&pl08x->adev->dev, "%s sg len can't be zero", ++ __func__); ++ return 0; ++ } ++ ++ if (!IS_BUS_ALIGNED(&bd.srcbus) || ++ !IS_BUS_ALIGNED(&bd.dstbus)) { ++ dev_err(&pl08x->adev->dev, ++ "%s src & dst address must be aligned to src" ++ " & dst width if peripheral is flow controller", ++ __func__); ++ return 0; ++ } ++ ++ cctl = pl08x_lli_control_bits(pl08x, cctl, ++ bd.srcbus.buswidth, bd.dstbus.buswidth, ++ 0); ++ pl08x_fill_lli_for_desc(pl08x, &bd, num_llis++, ++ 0, cctl, 0); ++ break; ++ } ++ ++ /* ++ * Send byte by byte for following cases ++ * - Less than a bus width available ++ * - until master bus is aligned ++ */ ++ if (bd.remainder < mbus->buswidth) ++ early_bytes = bd.remainder; ++ else if (!IS_BUS_ALIGNED(mbus)) { ++ early_bytes = mbus->buswidth - ++ (mbus->addr & (mbus->buswidth - 1)); ++ if ((bd.remainder - early_bytes) < mbus->buswidth) ++ early_bytes = bd.remainder; ++ } ++ ++ if (early_bytes) { ++ dev_vdbg(&pl08x->adev->dev, ++ "%s byte width LLIs (remain 0x%08zx)\n", ++ __func__, bd.remainder); ++ prep_byte_width_lli(pl08x, &bd, &cctl, early_bytes, ++ num_llis++, &total_bytes); ++ } ++ ++ if (bd.remainder) { ++ /* ++ * Master now aligned ++ * - if slave is not then we must set its width down ++ */ ++ if (!IS_BUS_ALIGNED(sbus)) { ++ dev_dbg(&pl08x->adev->dev, ++ "%s set down bus width to one byte\n", ++ __func__); ++ ++ sbus->buswidth = 1; ++ } ++ ++ /* ++ * Bytes transferred = tsize * src width, not ++ * MIN(buswidths) ++ */ ++ max_bytes_per_lli = bd.srcbus.buswidth * ++ pl08x->vd->max_transfer_size; ++ dev_vdbg(&pl08x->adev->dev, ++ "%s max bytes per lli = %zu\n", ++ __func__, max_bytes_per_lli); ++ ++ /* ++ * Make largest possible LLIs until less than one bus ++ * width left ++ */ ++ while (bd.remainder > (mbus->buswidth - 1)) { ++ size_t lli_len, tsize, width; ++ ++ /* ++ * If enough left try to send max possible, ++ * otherwise try to send the remainder ++ */ ++ lli_len = min(bd.remainder, max_bytes_per_lli); ++ ++ /* ++ * Check against maximum bus alignment: ++ * Calculate actual transfer size in relation to ++ * bus width an get a maximum remainder of the ++ * highest bus width - 1 ++ */ ++ width = max(mbus->buswidth, sbus->buswidth); ++ lli_len = (lli_len / width) * width; ++ tsize = lli_len / bd.srcbus.buswidth; ++ ++ dev_vdbg(&pl08x->adev->dev, ++ "%s fill lli with single lli chunk of " ++ "size 0x%08zx (remainder 0x%08zx)\n", ++ __func__, lli_len, bd.remainder); ++ ++ cctl = pl08x_lli_control_bits(pl08x, cctl, ++ bd.srcbus.buswidth, bd.dstbus.buswidth, ++ tsize); ++ pl08x_fill_lli_for_desc(pl08x, &bd, num_llis++, ++ lli_len, cctl, tsize); ++ total_bytes += lli_len; ++ } ++ ++ /* ++ * Send any odd bytes ++ */ ++ if (bd.remainder) { ++ dev_vdbg(&pl08x->adev->dev, ++ "%s align with boundary, send odd bytes (remain %zu)\n", ++ __func__, bd.remainder); ++ prep_byte_width_lli(pl08x, &bd, &cctl, ++ bd.remainder, num_llis++, &total_bytes); ++ } ++ } ++ ++ if (total_bytes != dsg->len) { ++ dev_err(&pl08x->adev->dev, ++ "%s size of encoded lli:s don't match total txd, transferred 0x%08zx from size 0x%08zx\n", ++ __func__, total_bytes, dsg->len); ++ return 0; ++ } ++ ++ if (num_llis >= MAX_NUM_TSFR_LLIS) { ++ dev_err(&pl08x->adev->dev, ++ "%s need to increase MAX_NUM_TSFR_LLIS from 0x%08x\n", ++ __func__, MAX_NUM_TSFR_LLIS); ++ return 0; ++ } ++ } ++ ++ llis_va = txd->llis_va; ++ last_lli = llis_va + (num_llis - 1) * pl08x->lli_words; ++ ++ if (txd->cyclic) { ++ /* Link back to the first LLI. */ ++ last_lli[PL080_LLI_LLI] = txd->llis_bus | bd.lli_bus; ++ } else { ++ /* The final LLI terminates the LLI. */ ++ last_lli[PL080_LLI_LLI] = 0; ++ /* The final LLI element shall also fire an interrupt. */ ++ if (pl08x->vd->ftdmac020) ++ last_lli[PL080_LLI_CCTL] &= ~FTDMAC020_LLI_TC_MSK; ++ else ++ last_lli[PL080_LLI_CCTL] |= PL080_CONTROL_TC_IRQ_EN; ++ } ++ ++ pl08x_dump_lli(pl08x, llis_va, num_llis); ++ ++ return num_llis; ++} ++ ++static void pl08x_free_txd(struct pl08x_driver_data *pl08x, ++ struct pl08x_txd *txd) ++{ ++ struct pl08x_sg *dsg, *_dsg; ++ ++ if (txd->llis_va) ++ dma_pool_free(pl08x->pool, txd->llis_va, txd->llis_bus); ++ ++ list_for_each_entry_safe(dsg, _dsg, &txd->dsg_list, node) { ++ list_del(&dsg->node); ++ kfree(dsg); ++ } ++ ++ kfree(txd); ++} ++ ++static void pl08x_desc_free(struct virt_dma_desc *vd) ++{ ++ struct pl08x_txd *txd = to_pl08x_txd(&vd->tx); ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(vd->tx.chan); ++ ++ dma_descriptor_unmap(&vd->tx); ++ if (!txd->done) ++ pl08x_release_mux(plchan); ++ ++ pl08x_free_txd(plchan->host, txd); ++} ++ ++static void pl08x_free_txd_list(struct pl08x_driver_data *pl08x, ++ struct pl08x_dma_chan *plchan) ++{ ++ LIST_HEAD(head); ++ ++ vchan_get_all_descriptors(&plchan->vc, &head); ++ vchan_dma_desc_free_list(&plchan->vc, &head); ++} ++ ++/* ++ * The DMA ENGINE API ++ */ ++static void pl08x_free_chan_resources(struct dma_chan *chan) ++{ ++ /* Ensure all queued descriptors are freed */ ++ vchan_free_chan_resources(to_virt_chan(chan)); ++} ++ ++static struct dma_async_tx_descriptor *pl08x_prep_dma_interrupt( ++ struct dma_chan *chan, unsigned long flags) ++{ ++ struct dma_async_tx_descriptor *retval = NULL; ++ ++ return retval; ++} ++ ++/* ++ * Code accessing dma_async_is_complete() in a tight loop may give problems. ++ * If slaves are relying on interrupts to signal completion this function ++ * must not be called with interrupts disabled. ++ */ ++static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan, ++ dma_cookie_t cookie, struct dma_tx_state *txstate) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ struct virt_dma_desc *vd; ++ unsigned long flags; ++ enum dma_status ret; ++ size_t bytes = 0; ++ ++ ret = dma_cookie_status(chan, cookie, txstate); ++ if (ret == DMA_COMPLETE) ++ return ret; ++ ++ /* ++ * There's no point calculating the residue if there's ++ * no txstate to store the value. ++ */ ++ if (!txstate) { ++ if (plchan->state == PL08X_CHAN_PAUSED) ++ ret = DMA_PAUSED; ++ return ret; ++ } ++ ++ spin_lock_irqsave(&plchan->vc.lock, flags); ++ ret = dma_cookie_status(chan, cookie, txstate); ++ if (ret != DMA_COMPLETE) { ++ vd = vchan_find_desc(&plchan->vc, cookie); ++ if (vd) { ++ /* On the issued list, so hasn't been processed yet */ ++ struct pl08x_txd *txd = to_pl08x_txd(&vd->tx); ++ struct pl08x_sg *dsg; ++ ++ list_for_each_entry(dsg, &txd->dsg_list, node) ++ bytes += dsg->len; ++ } else { ++ bytes = pl08x_getbytes_chan(plchan); ++ } ++ } ++ spin_unlock_irqrestore(&plchan->vc.lock, flags); ++ ++ /* ++ * This cookie not complete yet ++ * Get number of bytes left in the active transactions and queue ++ */ ++ dma_set_residue(txstate, bytes); ++ ++ if (plchan->state == PL08X_CHAN_PAUSED && ret == DMA_IN_PROGRESS) ++ ret = DMA_PAUSED; ++ ++ /* Whether waiting or running, we're in progress */ ++ return ret; ++} ++ ++/* PrimeCell DMA extension */ ++struct burst_table { ++ u32 burstwords; ++ u32 reg; ++}; ++ ++static const struct burst_table burst_sizes[] = { ++ { ++ .burstwords = 256, ++ .reg = PL080_BSIZE_256, ++ }, ++ { ++ .burstwords = 128, ++ .reg = PL080_BSIZE_128, ++ }, ++ { ++ .burstwords = 64, ++ .reg = PL080_BSIZE_64, ++ }, ++ { ++ .burstwords = 32, ++ .reg = PL080_BSIZE_32, ++ }, ++ { ++ .burstwords = 16, ++ .reg = PL080_BSIZE_16, ++ }, ++ { ++ .burstwords = 8, ++ .reg = PL080_BSIZE_8, ++ }, ++ { ++ .burstwords = 4, ++ .reg = PL080_BSIZE_4, ++ }, ++ { ++ .burstwords = 0, ++ .reg = PL080_BSIZE_1, ++ }, ++}; ++ ++/* ++ * Given the source and destination available bus masks, select which ++ * will be routed to each port. We try to have source and destination ++ * on separate ports, but always respect the allowable settings. ++ */ ++static u32 pl08x_select_bus(bool ftdmac020, u8 src, u8 dst) ++{ ++ u32 cctl = 0; ++ u32 dst_ahb2; ++ u32 src_ahb2; ++ ++ /* The FTDMAC020 use different bits to indicate src/dst bus */ ++ if (ftdmac020) { ++ dst_ahb2 = FTDMAC020_LLI_DST_SEL; ++ src_ahb2 = FTDMAC020_LLI_SRC_SEL; ++ } else { ++ dst_ahb2 = PL080_CONTROL_DST_AHB2; ++ src_ahb2 = PL080_CONTROL_SRC_AHB2; ++ } ++ ++ if (!(dst & PL08X_AHB1) || ((dst & PL08X_AHB2) && (src & PL08X_AHB1))) ++ cctl |= dst_ahb2; ++ if (!(src & PL08X_AHB1) || ((src & PL08X_AHB2) && !(dst & PL08X_AHB2))) ++ cctl |= src_ahb2; ++ ++ //printk("this is debug dst = %x src = %x cctl = %x %s %s %d\n",dst,src,cctl,__FILE__,__func__,__LINE__); ++ ++ return cctl; ++} ++ ++static u32 pl08x_cctl(u32 cctl) ++{ ++ cctl &= ~(PL080_CONTROL_SRC_AHB2 | PL080_CONTROL_DST_AHB2 | ++ PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR | ++ PL080_CONTROL_PROT_MASK); ++ ++ /* Access the cell in privileged mode, non-bufferable, non-cacheable */ ++ return cctl | PL080_CONTROL_PROT_SYS; ++} ++ ++static u32 pl08x_width(enum dma_slave_buswidth width) ++{ ++ switch (width) { ++ case DMA_SLAVE_BUSWIDTH_1_BYTE: ++ return PL080_WIDTH_8BIT; ++ case DMA_SLAVE_BUSWIDTH_2_BYTES: ++ return PL080_WIDTH_16BIT; ++ case DMA_SLAVE_BUSWIDTH_4_BYTES: ++ return PL080_WIDTH_32BIT; ++ default: ++ return ~0; ++ } ++} ++ ++static u32 pl08x_burst(u32 maxburst) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(burst_sizes); i++) ++ if (burst_sizes[i].burstwords <= maxburst) ++ break; ++ ++ return burst_sizes[i].reg; ++} ++ ++static u32 pl08x_get_cctl(struct pl08x_dma_chan *plchan, ++ enum dma_slave_buswidth addr_width, u32 maxburst) ++{ ++ u32 width, burst, cctl = 0; ++ ++ width = pl08x_width(addr_width); ++ if (width == ~0) ++ return ~0; ++ ++ cctl |= width << PL080_CONTROL_SWIDTH_SHIFT; ++ cctl |= width << PL080_CONTROL_DWIDTH_SHIFT; ++ ++ /* ++ * If this channel will only request single transfers, set this ++ * down to ONE element. Also select one element if no maxburst ++ * is specified. ++ */ ++ if (plchan->cd->single) ++ maxburst = 1; ++ ++ burst = pl08x_burst(maxburst); ++ cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT; ++ cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT; ++ ++ return pl08x_cctl(cctl); ++} ++ ++/* ++ * Slave transactions callback to the slave device to allow ++ * synchronization of slave DMA signals with the DMAC enable ++ */ ++static void pl08x_issue_pending(struct dma_chan *chan) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ unsigned long flags; ++ ++ plchan->chan_id = chan->chan_id; ++ ++ spin_lock_irqsave(&plchan->vc.lock, flags); ++ if (vchan_issue_pending(&plchan->vc)) { ++ if (!plchan->phychan && plchan->state != PL08X_CHAN_WAITING) ++ pl08x_phy_alloc_and_start(plchan); ++ } ++ spin_unlock_irqrestore(&plchan->vc.lock, flags); ++} ++ ++static struct pl08x_txd *pl08x_get_txd(struct pl08x_dma_chan *plchan) ++{ ++ struct pl08x_txd *txd = kzalloc(sizeof(*txd), GFP_NOWAIT); ++ ++ if (txd) ++ INIT_LIST_HEAD(&txd->dsg_list); ++ return txd; ++} ++ ++static u32 pl08x_memcpy_cctl(struct pl08x_driver_data *pl08x) ++{ ++ u32 cctl = 0; ++ ++ /* Conjure cctl */ ++ switch (pl08x->pd->memcpy_burst_size) { ++ default: ++ dev_err(&pl08x->adev->dev, ++ "illegal burst size for memcpy, set to 1\n"); ++ fallthrough; ++ case PL08X_BURST_SZ_1: ++ cctl |= PL080_BSIZE_1 << PL080_CONTROL_SB_SIZE_SHIFT | ++ PL080_BSIZE_1 << PL080_CONTROL_DB_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_4: ++ cctl |= PL080_BSIZE_4 << PL080_CONTROL_SB_SIZE_SHIFT | ++ PL080_BSIZE_4 << PL080_CONTROL_DB_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_8: ++ cctl |= PL080_BSIZE_8 << PL080_CONTROL_SB_SIZE_SHIFT | ++ PL080_BSIZE_8 << PL080_CONTROL_DB_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_16: ++ cctl |= PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | ++ PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_32: ++ cctl |= PL080_BSIZE_32 << PL080_CONTROL_SB_SIZE_SHIFT | ++ PL080_BSIZE_32 << PL080_CONTROL_DB_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_64: ++ cctl |= PL080_BSIZE_64 << PL080_CONTROL_SB_SIZE_SHIFT | ++ PL080_BSIZE_64 << PL080_CONTROL_DB_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_128: ++ cctl |= PL080_BSIZE_128 << PL080_CONTROL_SB_SIZE_SHIFT | ++ PL080_BSIZE_128 << PL080_CONTROL_DB_SIZE_SHIFT; ++ break; ++ case PL08X_BURST_SZ_256: ++ cctl |= PL080_BSIZE_256 << PL080_CONTROL_SB_SIZE_SHIFT | ++ PL080_BSIZE_256 << PL080_CONTROL_DB_SIZE_SHIFT; ++ break; ++ } ++ ++ switch (pl08x->pd->memcpy_bus_width) { ++ default: ++ dev_err(&pl08x->adev->dev, ++ "illegal bus width for memcpy, set to 8 bits\n"); ++ fallthrough; ++ case PL08X_BUS_WIDTH_8_BITS: ++ cctl |= PL080_WIDTH_8BIT << PL080_CONTROL_SWIDTH_SHIFT | ++ PL080_WIDTH_8BIT << PL080_CONTROL_DWIDTH_SHIFT; ++ break; ++ case PL08X_BUS_WIDTH_16_BITS: ++ cctl |= PL080_WIDTH_16BIT << PL080_CONTROL_SWIDTH_SHIFT | ++ PL080_WIDTH_16BIT << PL080_CONTROL_DWIDTH_SHIFT; ++ break; ++ case PL08X_BUS_WIDTH_32_BITS: ++ cctl |= PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | ++ PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT; ++ break; ++ } ++ ++ /* Protection flags */ ++ if (pl08x->pd->memcpy_prot_buff) ++ cctl |= PL080_CONTROL_PROT_BUFF; ++ if (pl08x->pd->memcpy_prot_cache) ++ cctl |= PL080_CONTROL_PROT_CACHE; ++ ++ /* We are the kernel, so we are in privileged mode */ ++ cctl |= PL080_CONTROL_PROT_SYS; ++ ++ /* Both to be incremented or the code will break */ ++ cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR; ++ ++ if (pl08x->vd->dualmaster) ++ cctl |= pl08x_select_bus(false, ++ pl08x->mem_buses, ++ pl08x->mem_buses); ++ ++ return cctl; ++} ++ ++static u32 pl08x_ftdmac020_memcpy_cctl(struct pl08x_driver_data *pl08x) ++{ ++ u32 cctl = 0; ++ ++ /* Conjure cctl */ ++ switch (pl08x->pd->memcpy_bus_width) { ++ default: ++ dev_err(&pl08x->adev->dev, ++ "illegal bus width for memcpy, set to 8 bits\n"); ++ fallthrough; ++ case PL08X_BUS_WIDTH_8_BITS: ++ cctl |= PL080_WIDTH_8BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT | ++ PL080_WIDTH_8BIT << FTDMAC020_LLI_DST_WIDTH_SHIFT; ++ break; ++ case PL08X_BUS_WIDTH_16_BITS: ++ cctl |= PL080_WIDTH_16BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT | ++ PL080_WIDTH_16BIT << FTDMAC020_LLI_DST_WIDTH_SHIFT; ++ break; ++ case PL08X_BUS_WIDTH_32_BITS: ++ cctl |= PL080_WIDTH_32BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT | ++ PL080_WIDTH_32BIT << FTDMAC020_LLI_DST_WIDTH_SHIFT; ++ break; ++ } ++ ++ /* ++ * By default mask the TC IRQ on all LLIs, it will be unmasked on ++ * the last LLI item by other code. ++ */ ++ cctl |= FTDMAC020_LLI_TC_MSK; ++ ++ /* ++ * Both to be incremented so leave bits FTDMAC020_LLI_SRCAD_CTL ++ * and FTDMAC020_LLI_DSTAD_CTL as zero ++ */ ++ if (pl08x->vd->dualmaster) ++ cctl |= pl08x_select_bus(true, ++ pl08x->mem_buses, ++ pl08x->mem_buses); ++ ++ return cctl; ++} ++ ++/* ++ * Initialize a descriptor to be used by memcpy submit ++ */ ++static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy( ++ struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, ++ size_t len, unsigned long flags) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ struct pl08x_driver_data *pl08x = plchan->host; ++ struct pl08x_txd *txd; ++ struct pl08x_sg *dsg; ++ int ret; ++ //printk("this is debug for lophyel %s %s %d\n",__FILE__,__func__,__LINE__); ++ txd = pl08x_get_txd(plchan); ++ if (!txd) { ++ dev_err(&pl08x->adev->dev, ++ "%s no memory for descriptor\n", __func__); ++ return NULL; ++ } ++ //printk("this is debug for lophyel %s %s %d\n",__FILE__,__func__,__LINE__); ++ dsg = kzalloc(sizeof(struct pl08x_sg), GFP_NOWAIT); ++ if (!dsg) { ++ pl08x_free_txd(pl08x, txd); ++ return NULL; ++ } ++ list_add_tail(&dsg->node, &txd->dsg_list); ++ //printk("this is debug for lophyel %s %s %d\n",__FILE__,__func__,__LINE__); ++ dsg->src_addr = src; ++ dsg->dst_addr = dest; ++ dsg->len = len; ++ if (pl08x->vd->ftdmac020) { ++ /* Writing CCFG zero ENABLES all interrupts */ ++ txd->ccfg = 0; ++ txd->cctl = pl08x_ftdmac020_memcpy_cctl(pl08x); ++ } else { ++ txd->ccfg = PL080_CONFIG_ERR_IRQ_MASK | ++ PL080_CONFIG_TC_IRQ_MASK | ++ PL080_FLOW_MEM2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT; ++ txd->cctl = pl08x_memcpy_cctl(pl08x); ++ } ++ //printk("this is debug for lophyel %s %s %d\n",__FILE__,__func__,__LINE__); ++ ret = pl08x_fill_llis_for_desc(plchan->host, txd); ++ if (!ret) { ++ pl08x_free_txd(pl08x, txd); ++ return NULL; ++ } ++ //printk("this is debug for lophyel %s %s %d\n",__FILE__,__func__,__LINE__); ++ return vchan_tx_prep(&plchan->vc, &txd->vd, flags); ++} ++ ++static struct pl08x_txd *pl08x_init_txd( ++ struct dma_chan *chan, ++ enum dma_transfer_direction direction, ++ dma_addr_t *slave_addr) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ struct pl08x_driver_data *pl08x = plchan->host; ++ struct pl08x_txd *txd; ++ enum dma_slave_buswidth addr_width; ++ int ret, tmp; ++ u8 src_buses, dst_buses; ++ u32 maxburst, cctl; ++ ++ txd = pl08x_get_txd(plchan); ++ if (!txd) { ++ dev_err(&pl08x->adev->dev, "%s no txd\n", __func__); ++ return NULL; ++ } ++ ++ /* ++ * Set up addresses, the PrimeCell configured address ++ * will take precedence since this may configure the ++ * channel target address dynamically at runtime. ++ */ ++ if (direction == DMA_MEM_TO_DEV) { ++ //printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ cctl = PL080_CONTROL_SRC_INCR; ++ *slave_addr = plchan->cfg.dst_addr; ++ addr_width = plchan->cfg.dst_addr_width; ++ maxburst = plchan->cfg.dst_maxburst; ++ src_buses = pl08x->mem_buses; ++ dst_buses = plchan->cd->periph_buses; ++ } else if (direction == DMA_DEV_TO_MEM) { ++ //printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ cctl = PL080_CONTROL_DST_INCR; ++ *slave_addr = plchan->cfg.src_addr; ++ addr_width = plchan->cfg.src_addr_width; ++ maxburst = plchan->cfg.src_maxburst; ++ src_buses = plchan->cd->periph_buses; ++ dst_buses = pl08x->mem_buses; ++ } else { ++ pl08x_free_txd(pl08x, txd); ++ dev_err(&pl08x->adev->dev, ++ "%s direction unsupported\n", __func__); ++ return NULL; ++ } ++ ++ cctl |= pl08x_get_cctl(plchan, addr_width, maxburst); ++ if (cctl == ~0) { ++ pl08x_free_txd(pl08x, txd); ++ dev_err(&pl08x->adev->dev, ++ "DMA slave configuration botched?\n"); ++ return NULL; ++ } ++ ++ txd->cctl = cctl | pl08x_select_bus(false, src_buses, dst_buses); ++ ++ if (plchan->cfg.device_fc) ++ tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER_PER : ++ PL080_FLOW_PER2MEM_PER; ++ else ++ tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER : ++ PL080_FLOW_PER2MEM; ++ ++ txd->ccfg = PL080_CONFIG_ERR_IRQ_MASK | ++ PL080_CONFIG_TC_IRQ_MASK | ++ tmp << PL080_CONFIG_FLOW_CONTROL_SHIFT; ++ //printk("this is debug cctl = %x ccfg = %x %s %s %d\n",txd->cctl,txd->ccfg,__FILE__,__func__,__LINE__); ++ ++ ret = pl08x_request_mux(plchan); ++ if (ret < 0) { ++ pl08x_free_txd(pl08x, txd); ++ dev_dbg(&pl08x->adev->dev, ++ "unable to mux for transfer on %s due to platform restrictions\n", ++ plchan->name); ++ return NULL; ++ } ++ ++ dev_dbg(&pl08x->adev->dev, "allocated DMA request signal %d for xfer on %s\n", ++ plchan->signal, plchan->name); ++ ++ /* Assign the flow control signal to this channel */ ++ if (direction == DMA_MEM_TO_DEV) ++ txd->ccfg |= plchan->signal << PL080_CONFIG_DST_SEL_SHIFT; ++ else ++ txd->ccfg |= plchan->signal << PL080_CONFIG_SRC_SEL_SHIFT; ++ ++ return txd; ++} ++ ++static int pl08x_tx_add_sg(struct pl08x_txd *txd, ++ enum dma_transfer_direction direction, ++ dma_addr_t slave_addr, ++ dma_addr_t buf_addr, ++ unsigned int len) ++{ ++ struct pl08x_sg *dsg; ++ ++ dsg = kzalloc(sizeof(struct pl08x_sg), GFP_NOWAIT); ++ if (!dsg) ++ return -ENOMEM; ++ ++ list_add_tail(&dsg->node, &txd->dsg_list); ++ ++ dsg->len = len; ++ if (direction == DMA_MEM_TO_DEV) { ++ dsg->src_addr = buf_addr; ++ dsg->dst_addr = slave_addr; ++ } else { ++ dsg->src_addr = slave_addr; ++ dsg->dst_addr = buf_addr; ++ } ++ ++ return 0; ++} ++ ++static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( ++ struct dma_chan *chan, struct scatterlist *sgl, ++ unsigned int sg_len, enum dma_transfer_direction direction, ++ unsigned long flags, void *context) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ struct pl08x_driver_data *pl08x = plchan->host; ++ struct pl08x_txd *txd; ++ struct scatterlist *sg; ++ int ret, tmp; ++ dma_addr_t slave_addr; ++ ++ dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n", ++ __func__, sg_dma_len(sgl), plchan->name); ++ ++ txd = pl08x_init_txd(chan, direction, &slave_addr); ++ if (!txd) ++ return NULL; ++ ++ for_each_sg(sgl, sg, sg_len, tmp) { ++ ret = pl08x_tx_add_sg(txd, direction, slave_addr, ++ sg_dma_address(sg), ++ sg_dma_len(sg)); ++ /* ++ printk("this is debug direction = %x slave_addr = %x addr = %x len = %x %s %s %d\n", ++ direction,slave_addr,sg_dma_address(sg),sg_dma_len(sg), ++ __FILE__,__func__,__LINE__); ++ */ ++ if (ret) { ++ pl08x_release_mux(plchan); ++ pl08x_free_txd(pl08x, txd); ++ dev_err(&pl08x->adev->dev, "%s no mem for pl080 sg\n", ++ __func__); ++ return NULL; ++ } ++ } ++ ++ ret = pl08x_fill_llis_for_desc(plchan->host, txd); ++ if (!ret) { ++ pl08x_release_mux(plchan); ++ pl08x_free_txd(pl08x, txd); ++ return NULL; ++ } ++ ++ return vchan_tx_prep(&plchan->vc, &txd->vd, flags); ++} ++ ++static struct dma_async_tx_descriptor *pl08x_prep_dma_cyclic( ++ struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, ++ size_t period_len, enum dma_transfer_direction direction, ++ unsigned long flags) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ struct pl08x_driver_data *pl08x = plchan->host; ++ struct pl08x_txd *txd; ++ int ret, tmp; ++ dma_addr_t slave_addr; ++ ++ dev_dbg(&pl08x->adev->dev, ++ "%s prepare cyclic transaction of %zd/%zd bytes %s %s\n", ++ __func__, period_len, buf_len, ++ direction == DMA_MEM_TO_DEV ? "to" : "from", ++ plchan->name); ++ ++ txd = pl08x_init_txd(chan, direction, &slave_addr); ++ if (!txd) ++ return NULL; ++ ++ txd->cyclic = true; ++ txd->cctl |= PL080_CONTROL_TC_IRQ_EN; ++ for (tmp = 0; tmp < buf_len; tmp += period_len) { ++ ret = pl08x_tx_add_sg(txd, direction, slave_addr, ++ buf_addr + tmp, period_len); ++ if (ret) { ++ pl08x_release_mux(plchan); ++ pl08x_free_txd(pl08x, txd); ++ return NULL; ++ } ++ } ++ ++ ret = pl08x_fill_llis_for_desc(plchan->host, txd); ++ if (!ret) { ++ pl08x_release_mux(plchan); ++ pl08x_free_txd(pl08x, txd); ++ return NULL; ++ } ++ ++ return vchan_tx_prep(&plchan->vc, &txd->vd, flags); ++} ++ ++static int pl08x_config(struct dma_chan *chan, ++ struct dma_slave_config *config) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ struct pl08x_driver_data *pl08x = plchan->host; ++ ++ if (!plchan->slave) ++ return -EINVAL; ++ ++ /* Reject definitely invalid configurations */ ++ if (config->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES || ++ config->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES) ++ return -EINVAL; ++ ++ if (config->device_fc && pl08x->vd->pl080s) { ++ dev_err(&pl08x->adev->dev, ++ "%s: PL080S does not support peripheral flow control\n", ++ __func__); ++ return -EINVAL; ++ } ++ ++ /* ++ printk("this is debug chan = %x chan-id = %d plchan = %x plchan->signal = %d %s %s %d\n", ++ chan,chan->chan_id,plchan,plchan->signal,__FILE__,__func__,__LINE__); ++ */ ++ plchan->cfg = *config; ++ ++ return 0; ++} ++ ++static int pl08x_terminate_all(struct dma_chan *chan) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ struct pl08x_driver_data *pl08x = plchan->host; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&plchan->vc.lock, flags); ++ if (!plchan->phychan && !plchan->at) { ++ spin_unlock_irqrestore(&plchan->vc.lock, flags); ++ return 0; ++ } ++ ++ plchan->state = PL08X_CHAN_IDLE; ++ ++ if (plchan->phychan) { ++ /* ++ * Mark physical channel as free and free any slave ++ * signal ++ */ ++ pl08x_phy_free(plchan); ++ } ++ /* Dequeue jobs and free LLIs */ ++ if (plchan->at) { ++ vchan_terminate_vdesc(&plchan->at->vd); ++ plchan->at = NULL; ++ } ++ /* Dequeue jobs not yet fired as well */ ++ pl08x_free_txd_list(pl08x, plchan); ++ ++ spin_unlock_irqrestore(&plchan->vc.lock, flags); ++ ++ return 0; ++} ++ ++static void pl08x_synchronize(struct dma_chan *chan) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ ++ printk("this is debug %s %s %d \n",__FILE__,__func__,__LINE__); ++ vchan_synchronize(&plchan->vc); ++} ++ ++static int pl08x_pause(struct dma_chan *chan) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ unsigned long flags; ++ ++ /* ++ * Anything succeeds on channels with no physical allocation and ++ * no queued transfers. ++ */ ++ printk("this is debug %s %s %d \n",__FILE__,__func__,__LINE__); ++ spin_lock_irqsave(&plchan->vc.lock, flags); ++ if (!plchan->phychan && !plchan->at) { ++ spin_unlock_irqrestore(&plchan->vc.lock, flags); ++ return 0; ++ } ++ ++ pl08x_pause_phy_chan(plchan->phychan); ++ plchan->state = PL08X_CHAN_PAUSED; ++ ++ spin_unlock_irqrestore(&plchan->vc.lock, flags); ++ ++ return 0; ++} ++ ++static int pl08x_resume(struct dma_chan *chan) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ unsigned long flags; ++ ++ /* ++ * Anything succeeds on channels with no physical allocation and ++ * no queued transfers. ++ */ ++ printk("this is debug %s %s %d \n",__FILE__,__func__,__LINE__); ++ spin_lock_irqsave(&plchan->vc.lock, flags); ++ if (!plchan->phychan && !plchan->at) { ++ spin_unlock_irqrestore(&plchan->vc.lock, flags); ++ return 0; ++ } ++ ++ pl08x_resume_phy_chan(plchan->phychan); ++ plchan->state = PL08X_CHAN_RUNNING; ++ ++ spin_unlock_irqrestore(&plchan->vc.lock, flags); ++ ++ return 0; ++} ++#if 0 ++bool pl08x_filter_id(struct dma_chan *chan, void *chan_id) ++{ ++ struct pl08x_dma_chan *plchan; ++ char *name = chan_id; ++ ++ /* Reject channels for devices not bound to this driver */ ++ if (chan->device->dev->driver != &pl08x_amba_driver.drv) ++ return false; ++ ++ plchan = to_pl08x_chan(chan); ++ ++ /* Check that the channel is not taken! */ ++ if (!strcmp(plchan->name, name)) ++ return true; ++ ++ return false; ++} ++EXPORT_SYMBOL_GPL(pl08x_filter_id); ++#endif ++static bool pl08x_filter_fn(struct dma_chan *chan, void *chan_id) ++{ ++ struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); ++ ++ return plchan->cd == chan_id; ++} ++ ++/* ++ * Just check that the device is there and active ++ * TODO: turn this bit on/off depending on the number of physical channels ++ * actually used, if it is zero... well shut it off. That will save some ++ * power. Cut the clock at the same time. ++ */ ++static void pl08x_ensure_on(struct pl08x_driver_data *pl08x) ++{ ++ /* The Nomadik variant does not have the config register */ ++ if (pl08x->vd->nomadik) ++ return; ++ /* The FTDMAC020 variant does this in another register */ ++ if (pl08x->vd->ftdmac020) { ++ writel(PL080_CONFIG_ENABLE, pl08x->base + FTDMAC020_CSR); ++ return; ++ } ++ writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG); ++} ++ ++static irqreturn_t pl08x_irq(int irq, void *dev) ++{ ++ struct pl08x_driver_data *pl08x = dev; ++ u32 mask = 0, err, tc, i; ++ ++ /* check & clear - ERR & TC interrupts */ ++ err = readl(pl08x->base + PL080_ERR_STATUS); ++ if (err) { ++ dev_err(&pl08x->adev->dev, "%s error interrupt, register value 0x%08x\n", ++ __func__, err); ++ writel(err, pl08x->base + PL080_ERR_CLEAR); ++ } ++ tc = readl(pl08x->base + PL080_TC_STATUS); ++ if (tc) { ++ writel(tc, pl08x->base + PL080_TC_CLEAR); ++ } ++ ++ if (!err && !tc) { ++ return IRQ_NONE; ++ } ++ ++ for (i = 0; i < pl08x->vd->channels; i++) { ++ if ((BIT(i) & err) || (BIT(i) & tc)) { ++ /* Locate physical channel */ ++ struct pl08x_phy_chan *phychan = &pl08x->phy_chans[i]; ++ struct pl08x_dma_chan *plchan = phychan->serving; ++ struct pl08x_txd *tx; ++ ++ if (!plchan) { ++ dev_err(&pl08x->adev->dev, ++ "%s Error TC interrupt on unused channel: 0x%08x\n", ++ __func__, i); ++ continue; ++ } ++ ++ spin_lock(&plchan->vc.lock); ++ tx = plchan->at; ++ if (tx && tx->cyclic) { ++ vchan_cyclic_callback(&tx->vd); ++ } else if (tx) { ++ plchan->at = NULL; ++ /* ++ * This descriptor is done, release its mux ++ * reservation. ++ */ ++ pl08x_release_mux(plchan); ++ tx->done = true; ++ vchan_cookie_complete(&tx->vd); ++ ++ /* ++ * And start the next descriptor (if any), ++ * otherwise free this channel. ++ */ ++ if (vchan_next_desc(&plchan->vc)) ++ pl08x_start_next_txd(plchan); ++ else ++ pl08x_phy_free(plchan); ++ } ++ spin_unlock(&plchan->vc.lock); ++ ++ mask |= BIT(i); ++ } ++ } ++ ++ return mask ? IRQ_HANDLED : IRQ_NONE; ++} ++ ++static void pl08x_dma_slave_init(struct pl08x_dma_chan *chan) ++{ ++ chan->slave = true; ++ chan->name = chan->cd->bus_id; ++ chan->cfg.src_addr = chan->cd->addr; ++ chan->cfg.dst_addr = chan->cd->addr; ++} ++ ++/* ++ * Initialise the DMAC memcpy/slave channels. ++ * Make a local wrapper to hold required data ++ */ ++static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x, ++ struct dma_device *dmadev, unsigned int channels, bool slave) ++{ ++ struct pl08x_dma_chan *chan; ++ int i; ++ ++ INIT_LIST_HEAD(&dmadev->channels); ++ ++ /* ++ * Register as many many memcpy as we have physical channels, ++ * we won't always be able to use all but the code will have ++ * to cope with that situation. ++ */ ++ for (i = 0; i < channels; i++) { ++ chan = kzalloc(sizeof(*chan), GFP_KERNEL); ++ if (!chan) ++ return -ENOMEM; ++ ++ chan->host = pl08x; ++ chan->state = PL08X_CHAN_IDLE; ++ chan->signal = -1; ++ ++ if (slave) { ++ chan->cd = &pl08x->pd->slave_channels[i]; ++ /* ++ * Some implementations have muxed signals, whereas some ++ * use a mux in front of the signals and need dynamic ++ * assignment of signals. ++ */ ++ chan->signal = i; ++ pl08x_dma_slave_init(chan); ++ } else { ++ chan->cd = kzalloc(sizeof(*chan->cd), GFP_KERNEL); ++ if (!chan->cd) { ++ kfree(chan); ++ return -ENOMEM; ++ } ++ chan->cd->bus_id = "memcpy"; ++ chan->cd->periph_buses = pl08x->pd->mem_buses; ++ chan->name = kasprintf(GFP_KERNEL, "memcpy%d", i); ++ if (!chan->name) { ++ kfree(chan->cd); ++ kfree(chan); ++ return -ENOMEM; ++ } ++ } ++ dev_dbg(&pl08x->adev->dev, ++ "initialize virtual channel \"%s\"\n", ++ chan->name); ++ ++ chan->vc.desc_free = pl08x_desc_free; ++ vchan_init(&chan->vc, dmadev); ++ } ++ dev_info(&pl08x->adev->dev, "initialized %d virtual %s channels\n", ++ i, slave ? "slave" : "memcpy"); ++ return i; ++} ++ ++static void pl08x_free_virtual_channels(struct dma_device *dmadev) ++{ ++ struct pl08x_dma_chan *chan = NULL; ++ struct pl08x_dma_chan *next; ++ ++ list_for_each_entry_safe(chan, ++ next, &dmadev->channels, vc.chan.device_node) { ++ list_del(&chan->vc.chan.device_node); ++ kfree(chan); ++ } ++} ++ ++#ifdef CONFIG_DEBUG_FS ++static const char *pl08x_state_str(enum pl08x_dma_chan_state state) ++{ ++ switch (state) { ++ case PL08X_CHAN_IDLE: ++ return "idle"; ++ case PL08X_CHAN_RUNNING: ++ return "running"; ++ case PL08X_CHAN_PAUSED: ++ return "paused"; ++ case PL08X_CHAN_WAITING: ++ return "waiting"; ++ default: ++ break; ++ } ++ return "UNKNOWN STATE"; ++} ++ ++static int pl08x_debugfs_show(struct seq_file *s, void *data) ++{ ++ struct pl08x_driver_data *pl08x = s->private; ++ struct pl08x_dma_chan *chan; ++ struct pl08x_phy_chan *ch; ++ unsigned long flags; ++ int i; ++ ++ seq_printf(s, "PL08x physical channels:\n"); ++ seq_printf(s, "CHANNEL:\tUSER:\n"); ++ seq_printf(s, "--------\t-----\n"); ++ for (i = 0; i < pl08x->vd->channels; i++) { ++ struct pl08x_dma_chan *virt_chan; ++ ++ ch = &pl08x->phy_chans[i]; ++ ++ spin_lock_irqsave(&ch->lock, flags); ++ virt_chan = ch->serving; ++ ++ seq_printf(s, "%d\t\t%s%s\n", ++ ch->id, ++ virt_chan ? virt_chan->name : "(none)", ++ ch->locked ? " LOCKED" : ""); ++ ++ spin_unlock_irqrestore(&ch->lock, flags); ++ } ++ ++ seq_printf(s, "\nPL08x virtual memcpy channels:\n"); ++ seq_printf(s, "CHANNEL:\tSTATE:\n"); ++ seq_printf(s, "--------\t------\n"); ++ list_for_each_entry(chan, &pl08x->memcpy.channels, vc.chan.device_node) { ++ seq_printf(s, "%s\t\t%s\n", chan->name, ++ pl08x_state_str(chan->state)); ++ } ++ ++ if (pl08x->has_slave) { ++ seq_printf(s, "\nPL08x virtual slave channels:\n"); ++ seq_printf(s, "CHANNEL:\tSTATE:\n"); ++ seq_printf(s, "--------\t------\n"); ++ list_for_each_entry(chan, &pl08x->slave.channels, ++ vc.chan.device_node) { ++ seq_printf(s, "%s\t\t%s\n", chan->name, ++ pl08x_state_str(chan->state)); ++ } ++ } ++ ++ return 0; ++} ++ ++DEFINE_SHOW_ATTRIBUTE(pl08x_debugfs); ++ ++static void init_pl08x_debugfs(struct pl08x_driver_data *pl08x) ++{ ++ /* Expose a simple debugfs interface to view all clocks */ ++ debugfs_create_file(dev_name(&pl08x->adev->dev), S_IFREG | S_IRUGO, ++ NULL, pl08x, &pl08x_debugfs_fops); ++} ++ ++#else ++static inline void init_pl08x_debugfs(struct pl08x_driver_data *pl08x) ++{ ++} ++#endif ++ ++#ifdef CONFIG_OF ++static struct dma_chan *pl08x_find_chan_id(struct pl08x_driver_data *pl08x, ++ u32 id) ++{ ++ struct pl08x_dma_chan *chan; ++ ++ /* Trying to get a slave channel from something with no slave support */ ++ if (!pl08x->has_slave) ++ return NULL; ++ ++ list_for_each_entry(chan, &pl08x->slave.channels, vc.chan.device_node) { ++ if (chan->signal == id) ++ return &chan->vc.chan; ++ } ++ ++ return NULL; ++} ++ ++static struct dma_chan *pl08x_of_xlate(struct of_phandle_args *dma_spec, ++ struct of_dma *ofdma) ++{ ++ struct pl08x_driver_data *pl08x = ofdma->of_dma_data; ++ struct dma_chan *dma_chan; ++ struct pl08x_dma_chan *plchan; ++ ++ if (!pl08x) ++ return NULL; ++ ++ if (dma_spec->args_count != 2) { ++ dev_err(&pl08x->adev->dev, ++ "DMA channel translation requires two cells\n"); ++ return NULL; ++ } ++ ++ dma_chan = pl08x_find_chan_id(pl08x, dma_spec->args[0]); ++ if (!dma_chan) { ++ dev_err(&pl08x->adev->dev, ++ "DMA slave channel not found\n"); ++ return NULL; ++ } ++ ++ plchan = to_pl08x_chan(dma_chan); ++ dev_dbg(&pl08x->adev->dev, ++ "translated channel for signal %d\n", ++ dma_spec->args[0]); ++ ++ /* Augment channel data for applicable AHB buses */ ++ plchan->cd->periph_buses = dma_spec->args[1]; ++ return dma_get_slave_channel(dma_chan); ++} ++ ++static int pl08x_of_probe(struct platform_device *adev, ++ struct pl08x_driver_data *pl08x, ++ struct device_node *np) ++{ ++ struct pl08x_platform_data *pd; ++ struct pl08x_channel_data *chanp = NULL; ++ u32 val; ++ int ret; ++ int i; ++ ++ pd = devm_kzalloc(&adev->dev, sizeof(*pd), GFP_KERNEL); ++ if (!pd) ++ return -ENOMEM; ++ ++ /* Eligible bus masters for fetching LLIs */ ++ if (of_property_read_bool(np, "lli-bus-interface-ahb1")) ++ pd->lli_buses |= PL08X_AHB1; ++ if (of_property_read_bool(np, "lli-bus-interface-ahb2")) ++ pd->lli_buses |= PL08X_AHB2; ++ if (!pd->lli_buses) { ++ dev_info(&adev->dev, "no bus masters for LLIs stated, assume all\n"); ++ pd->lli_buses |= PL08X_AHB1 | PL08X_AHB2; ++ } ++ ++ /* Eligible bus masters for memory access */ ++ if (of_property_read_bool(np, "mem-bus-interface-ahb1")) ++ pd->mem_buses |= PL08X_AHB1; ++ if (of_property_read_bool(np, "mem-bus-interface-ahb2")) ++ pd->mem_buses |= PL08X_AHB2; ++ if (!pd->mem_buses) { ++ dev_info(&adev->dev, "no bus masters for memory stated, assume all\n"); ++ pd->mem_buses |= PL08X_AHB1 | PL08X_AHB2; ++ } ++ ++ /* Parse the memcpy channel properties */ ++ ret = of_property_read_u32(np, "memcpy-burst-size", &val); ++ if (ret) { ++ dev_info(&adev->dev, "no memcpy burst size specified, using 1 byte\n"); ++ val = 1; ++ } ++ switch (val) { ++ default: ++ dev_err(&adev->dev, "illegal burst size for memcpy, set to 1\n"); ++ fallthrough; ++ case 1: ++ pd->memcpy_burst_size = PL08X_BURST_SZ_1; ++ break; ++ case 4: ++ pd->memcpy_burst_size = PL08X_BURST_SZ_4; ++ break; ++ case 8: ++ pd->memcpy_burst_size = PL08X_BURST_SZ_8; ++ break; ++ case 16: ++ pd->memcpy_burst_size = PL08X_BURST_SZ_16; ++ break; ++ case 32: ++ pd->memcpy_burst_size = PL08X_BURST_SZ_32; ++ break; ++ case 64: ++ pd->memcpy_burst_size = PL08X_BURST_SZ_64; ++ break; ++ case 128: ++ pd->memcpy_burst_size = PL08X_BURST_SZ_128; ++ break; ++ case 256: ++ pd->memcpy_burst_size = PL08X_BURST_SZ_256; ++ break; ++ } ++ ++ ret = of_property_read_u32(np, "memcpy-bus-width", &val); ++ if (ret) { ++ dev_info(&adev->dev, "no memcpy bus width specified, using 8 bits\n"); ++ val = 8; ++ } ++ switch (val) { ++ default: ++ dev_err(&adev->dev, "illegal bus width for memcpy, set to 8 bits\n"); ++ fallthrough; ++ case 8: ++ pd->memcpy_bus_width = PL08X_BUS_WIDTH_8_BITS; ++ break; ++ case 16: ++ pd->memcpy_bus_width = PL08X_BUS_WIDTH_16_BITS; ++ break; ++ case 32: ++ pd->memcpy_bus_width = PL08X_BUS_WIDTH_32_BITS; ++ break; ++ } ++ ++ /* ++ * Allocate channel data for all possible slave channels (one ++ * for each possible signal), channels will then be allocated ++ * for a device and have it's AHB interfaces set up at ++ * translation time. ++ */ ++ if (pl08x->vd->signals) { ++ chanp = devm_kcalloc(&adev->dev, ++ pl08x->vd->signals, ++ sizeof(struct pl08x_channel_data), ++ GFP_KERNEL); ++ if (!chanp) ++ return -ENOMEM; ++ ++ pd->slave_channels = chanp; ++ for (i = 0; i < pl08x->vd->signals; i++) { ++ /* ++ * chanp->periph_buses will be assigned at translation ++ */ ++ chanp->bus_id = kasprintf(GFP_KERNEL, "slave%d", i); ++ chanp++; ++ } ++ pd->num_slave_channels = pl08x->vd->signals; ++ } ++ ++ pl08x->pd = pd; ++ ++ return of_dma_controller_register(adev->dev.of_node, pl08x_of_xlate, ++ pl08x); ++} ++#else ++static inline int pl08x_of_probe(struct platform_device *adev, ++ struct pl08x_driver_data *pl08x, ++ struct device_node *np) ++{ ++ return -EINVAL; ++} ++#endif ++ ++static int pl08x_probe(struct platform_device *adev) //, const struct amba_id *id) ++{ ++ struct pl08x_driver_data *pl08x; ++ struct vendor_data *vd; ++ struct device_node *np = adev->dev.of_node; ++ struct resource *res; ++ u32 tsfr_size; ++ int irq, ret = 0; ++ int i; ++ ++ //printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++#if 0 ++ ret = amba_request_regions(adev, NULL); ++ if (ret){ ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ return ret; ++ } ++#endif ++ /* Ensure that we can do DMA */ ++ ret = dma_set_mask_and_coherent(&adev->dev, DMA_BIT_MASK(32)); ++ if (ret){ ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ return ret; ++ } ++ ++ /* Create the driver state holder */ ++ pl08x = kzalloc(sizeof(*pl08x), GFP_KERNEL); ++ if (!pl08x) { ++ ret = -ENOMEM; ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ return ret; ++ } ++ ++ /* Assign useful pointers to the driver state */ ++ pl08x->adev = adev; ++ vd = of_device_get_match_data(&adev->dev); ++ if(!vd) ++ return -ENODEV; ++ pl08x->vd = vd; ++ ++ res = platform_get_resource_byname(adev, IORESOURCE_MEM, "sec_dma"); ++ pl08x->base = devm_ioremap_resource(&adev->dev, res); ++ if (!pl08x->base) { ++ ret = -ENOMEM; ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ goto out_no_ioremap; ++ } ++ ++ if (vd->ftdmac020) { ++ u32 val; ++ ++ val = readl(pl08x->base + FTDMAC020_REVISION); ++ dev_dbg(&pl08x->adev->dev, "FTDMAC020 %d.%d rel %d\n", ++ (val >> 16) & 0xff, (val >> 8) & 0xff, val & 0xff); ++ val = readl(pl08x->base + FTDMAC020_FEATURE); ++ dev_dbg(&pl08x->adev->dev, "FTDMAC020 %d channels, " ++ "%s built-in bridge, %s, %s linked lists\n", ++ (val >> 12) & 0x0f, ++ (val & BIT(10)) ? "no" : "has", ++ (val & BIT(9)) ? "AHB0 and AHB1" : "AHB0", ++ (val & BIT(8)) ? "supports" : "does not support"); ++ ++ /* Vendor data from feature register */ ++ if (!(val & BIT(8))) ++ dev_warn(&pl08x->adev->dev, ++ "linked lists not supported, required\n"); ++ vd->channels = (val >> 12) & 0x0f; ++ vd->dualmaster = !!(val & BIT(9)); ++ } ++ ++ /* Initialize memcpy engine */ ++ dma_cap_set(DMA_MEMCPY, pl08x->memcpy.cap_mask); ++ pl08x->memcpy.dev = &adev->dev; ++ pl08x->memcpy.device_free_chan_resources = pl08x_free_chan_resources; ++ pl08x->memcpy.device_prep_dma_memcpy = pl08x_prep_dma_memcpy; ++ pl08x->memcpy.device_prep_dma_interrupt = pl08x_prep_dma_interrupt; ++ pl08x->memcpy.device_tx_status = pl08x_dma_tx_status; ++ pl08x->memcpy.device_issue_pending = pl08x_issue_pending; ++ pl08x->memcpy.device_config = pl08x_config; ++ pl08x->memcpy.device_pause = pl08x_pause; ++ pl08x->memcpy.device_resume = pl08x_resume; ++ pl08x->memcpy.device_terminate_all = pl08x_terminate_all; ++ pl08x->memcpy.device_synchronize = pl08x_synchronize; ++ pl08x->memcpy.src_addr_widths = PL80X_DMA_BUSWIDTHS; ++ pl08x->memcpy.dst_addr_widths = PL80X_DMA_BUSWIDTHS; ++ pl08x->memcpy.directions = BIT(DMA_MEM_TO_MEM); ++ pl08x->memcpy.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; ++ if (vd->ftdmac020) ++ pl08x->memcpy.copy_align = DMAENGINE_ALIGN_4_BYTES; ++ ++ ++ /* ++ * Initialize slave engine, if the block has no signals, that means ++ * we have no slave support. ++ */ ++ if (vd->signals) { ++ pl08x->has_slave = true; ++ dma_cap_set(DMA_SLAVE, pl08x->slave.cap_mask); ++ dma_cap_set(DMA_CYCLIC, pl08x->slave.cap_mask); ++ pl08x->slave.dev = &adev->dev; ++ pl08x->slave.device_free_chan_resources = ++ pl08x_free_chan_resources; ++ pl08x->slave.device_prep_dma_interrupt = ++ pl08x_prep_dma_interrupt; ++ pl08x->slave.device_tx_status = pl08x_dma_tx_status; ++ pl08x->slave.device_issue_pending = pl08x_issue_pending; ++ pl08x->slave.device_prep_slave_sg = pl08x_prep_slave_sg; ++ pl08x->slave.device_prep_dma_cyclic = pl08x_prep_dma_cyclic; ++ pl08x->slave.device_config = pl08x_config; ++ pl08x->slave.device_pause = pl08x_pause; ++ pl08x->slave.device_resume = pl08x_resume; ++ pl08x->slave.device_terminate_all = pl08x_terminate_all; ++ pl08x->slave.device_synchronize = pl08x_synchronize; ++ pl08x->slave.src_addr_widths = PL80X_DMA_BUSWIDTHS; ++ pl08x->slave.dst_addr_widths = PL80X_DMA_BUSWIDTHS; ++ pl08x->slave.directions = ++ BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); ++ pl08x->slave.residue_granularity = ++ DMA_RESIDUE_GRANULARITY_SEGMENT; ++ } ++ ++ /* Get the platform data */ ++ pl08x->pd = dev_get_platdata(&adev->dev); ++ if (!pl08x->pd) { ++ if (np) { ++ ret = pl08x_of_probe(adev, pl08x, np); ++ if (ret) { ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ goto out_no_platdata; ++ } ++ } else { ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ dev_err(&adev->dev, "no platform data supplied\n"); ++ ret = -EINVAL; ++ goto out_no_platdata; ++ } ++ } else { ++ pl08x->slave.filter.map = pl08x->pd->slave_map; ++ pl08x->slave.filter.mapcnt = pl08x->pd->slave_map_len; ++ pl08x->slave.filter.fn = pl08x_filter_fn; ++ } ++ ++ /* By default, AHB1 only. If dualmaster, from platform */ ++ pl08x->lli_buses = PL08X_AHB1; ++ pl08x->mem_buses = PL08X_AHB1; ++ if (pl08x->vd->dualmaster) { ++ pl08x->lli_buses = pl08x->pd->lli_buses; ++ pl08x->mem_buses = pl08x->pd->mem_buses; ++ } ++ ++ if (vd->pl080s) ++ pl08x->lli_words = PL080S_LLI_WORDS; ++ else ++ pl08x->lli_words = PL080_LLI_WORDS; ++ tsfr_size = MAX_NUM_TSFR_LLIS * pl08x->lli_words * sizeof(u32); ++ ++ /* A DMA memory pool for LLIs, align on 1-byte boundary */ ++ pl08x->pool = dma_pool_create(DRIVER_NAME, &pl08x->adev->dev, ++ tsfr_size, PL08X_ALIGN, 0); ++ if (!pl08x->pool) { ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ ret = -ENOMEM; ++ goto out_no_lli_pool; ++ } ++ ++ /* Turn on the PL08x */ ++ pl08x_ensure_on(pl08x); ++ ++ /* Clear any pending interrupts */ ++ if (vd->ftdmac020) ++ /* This variant has error IRQs in bits 16-19 */ ++ writel(0x0000FFFF, pl08x->base + PL080_ERR_CLEAR); ++ else ++ writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR); ++ writel(0x000000FF, pl08x->base + PL080_TC_CLEAR); ++ ++ /* Attach the interrupt handler */ ++ irq = platform_get_irq(adev, 0); ++ if (irq < 0) { ++ dev_err(&adev->dev, "Cannot get IRQ resource\n"); ++ return irq; ++ } ++ ++ ret = request_irq(irq, pl08x_irq, 0, DRIVER_NAME, pl08x); ++ if (ret) { ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ dev_err(&adev->dev, "%s failed to request interrupt %d\n", ++ __func__, irq); ++ goto out_no_irq; ++ } ++ ++ /* Initialize physical channels */ ++ pl08x->phy_chans = kzalloc((vd->channels * sizeof(*pl08x->phy_chans)), ++ GFP_KERNEL); ++ if (!pl08x->phy_chans) { ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ ret = -ENOMEM; ++ goto out_no_phychans; ++ } ++ ++ for (i = 0; i < vd->channels; i++) { ++ struct pl08x_phy_chan *ch = &pl08x->phy_chans[i]; ++ ++ ch->id = i; ++ ch->base = pl08x->base + PL080_Cx_BASE(i); ++ if (vd->ftdmac020) { ++ /* FTDMA020 has a special channel busy register */ ++ ch->reg_busy = ch->base + FTDMAC020_CH_BUSY; ++ ch->reg_config = ch->base + FTDMAC020_CH_CFG; ++ ch->reg_control = ch->base + FTDMAC020_CH_CSR; ++ ch->reg_src = ch->base + FTDMAC020_CH_SRC_ADDR; ++ ch->reg_dst = ch->base + FTDMAC020_CH_DST_ADDR; ++ ch->reg_lli = ch->base + FTDMAC020_CH_LLP; ++ ch->ftdmac020 = true; ++ } else { ++ printk("this is debug i = %d ch->base = %x %s %s %d\n",i,ch->base,__FILE__,__func__,__LINE__); ++ ch->reg_config = ch->base + vd->config_offset; ++ ch->reg_control = ch->base + PL080_CH_CONTROL; ++ ch->reg_src = ch->base + PL080_CH_SRC_ADDR; ++ ch->reg_dst = ch->base + PL080_CH_DST_ADDR; ++ ch->reg_lli = ch->base + PL080_CH_LLI; ++ } ++ if (vd->pl080s) ++ ch->pl080s = true; ++ ++ spin_lock_init(&ch->lock); ++ ++ /* ++ * Nomadik variants can have channels that are locked ++ * down for the secure world only. Lock up these channels ++ * by perpetually serving a dummy virtual channel. ++ */ ++ if (vd->nomadik) { ++ u32 val; ++ ++ val = readl(ch->reg_config); ++ if (val & (PL080N_CONFIG_ITPROT | PL080N_CONFIG_SECPROT)) { ++ dev_dbg(&adev->dev, "physical channel %d reserved for secure access only\n", i); ++ ch->locked = true; ++ } ++ } ++ ++ //dev_dbg(&adev->dev, "physical channel %d is %s\n", ++ dev_dbg(&adev->dev, "physical channel %d is %s\n", ++ i, pl08x_phy_channel_busy(ch) ? "BUSY" : "FREE"); ++ } ++ ++ /* Register as many memcpy channels as there are physical channels */ ++ ret = pl08x_dma_init_virtual_channels(pl08x, &pl08x->memcpy, ++ pl08x->vd->channels, false); ++ if (ret <= 0) { ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ dev_warn(&pl08x->adev->dev, ++ "%s failed to enumerate memcpy channels - %d\n", ++ __func__, ret); ++ goto out_no_memcpy; ++ } ++ ++ /* Register slave channels */ ++ if (pl08x->has_slave) { ++ ret = pl08x_dma_init_virtual_channels(pl08x, &pl08x->slave, ++ pl08x->pd->num_slave_channels, true); ++ if (ret < 0) { ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ dev_warn(&pl08x->adev->dev, ++ "%s failed to enumerate slave channels - %d\n", ++ __func__, ret); ++ goto out_no_slave; ++ } ++ } ++ ++ ret = dma_async_device_register(&pl08x->memcpy); ++ if (ret) { ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ dev_warn(&pl08x->adev->dev, ++ "%s failed to register memcpy as an async device - %d\n", ++ __func__, ret); ++ goto out_no_memcpy_reg; ++ } ++ ++ if (pl08x->has_slave) { ++ ret = dma_async_device_register(&pl08x->slave); ++ if (ret) { ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ dev_warn(&pl08x->adev->dev, ++ "%s failed to register slave as an async device - %d\n", ++ __func__, ret); ++ goto out_no_slave_reg; ++ } ++ } ++ ++ platform_set_drvdata(adev, pl08x); ++ init_pl08x_debugfs(pl08x); ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ { ++ int loop; ++ ++ for (loop = 0xfe0;loop <= 0xffc; loop += 4) { ++ dev_dbg(&pl08x->adev->dev, "periphid[0x%x] = %x ", ++ loop,readl(pl08x->base + loop)); ++ } ++ } ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ dev_dbg(&pl08x->adev->dev, "DMA: PL080 at 0x%08llx irq %d\n", ++ (unsigned long long)res->start, irq); ++ ++ return 0; ++ ++out_no_slave_reg: ++ dma_async_device_unregister(&pl08x->memcpy); ++out_no_memcpy_reg: ++ if (pl08x->has_slave) ++ pl08x_free_virtual_channels(&pl08x->slave); ++out_no_slave: ++ pl08x_free_virtual_channels(&pl08x->memcpy); ++out_no_memcpy: ++ kfree(pl08x->phy_chans); ++out_no_phychans: ++ free_irq(irq, pl08x); ++out_no_irq: ++ dma_pool_destroy(pl08x->pool); ++out_no_lli_pool: ++out_no_platdata: ++ iounmap(pl08x->base); ++out_no_ioremap: ++ kfree(pl08x); ++ //out_no_pl08x: ++ //amba_release_regions(adev); ++ printk("this is debug %s %s %d\n",__FILE__,__func__,__LINE__); ++ return ret; ++} ++ ++/* PL080 has 8 channels and the PL080 have just 2 */ ++static struct vendor_data vendor_pl080 = { ++ .config_offset = PL080_CH_CONFIG, ++ .channels = 8, ++ .signals = 16, ++ .dualmaster = true, ++ .max_transfer_size = PL080_CONTROL_TRANSFER_SIZE_MASK, ++}; ++#if 0 ++static struct vendor_data vendor_nomadik = { ++ .config_offset = PL080_CH_CONFIG, ++ .channels = 8, ++ .signals = 32, ++ .dualmaster = true, ++ .nomadik = true, ++ .max_transfer_size = PL080_CONTROL_TRANSFER_SIZE_MASK, ++}; ++ ++static struct vendor_data vendor_pl080s = { ++ .config_offset = PL080S_CH_CONFIG, ++ .channels = 8, ++ .signals = 32, ++ .pl080s = true, ++ .max_transfer_size = PL080S_CONTROL_TRANSFER_SIZE_MASK, ++}; ++ ++static struct vendor_data vendor_pl081 = { ++ .config_offset = PL080_CH_CONFIG, ++ .channels = 2, ++ .signals = 16, ++ .dualmaster = false, ++ .max_transfer_size = PL080_CONTROL_TRANSFER_SIZE_MASK, ++}; ++ ++static struct vendor_data vendor_ftdmac020 = { ++ .config_offset = PL080_CH_CONFIG, ++ .ftdmac020 = true, ++ .max_transfer_size = PL080_CONTROL_TRANSFER_SIZE_MASK, ++}; ++ ++static const struct amba_id pl08x_ids[] = { ++ /* Samsung PL080S variant */ ++ { ++ .id = 0x0a141080, ++ .mask = 0xffffffff, ++ .data = &vendor_pl080s, ++ }, ++ /* PL080 */ ++ { ++ .id = 0x00041080, ++ .mask = 0x000fffff, ++ .data = &vendor_pl080, ++ }, ++ /* PL081 */ ++ { ++ .id = 0x00041081, ++ .mask = 0x000fffff, ++ .data = &vendor_pl081, ++ }, ++ /* Nomadik 8815 PL080 variant */ ++ { ++ .id = 0x00280080, ++ .mask = 0x00ffffff, ++ .data = &vendor_nomadik, ++ }, ++ /* Faraday Technology FTDMAC020 */ ++ { ++ .id = 0x0003b080, ++ .mask = 0x000fffff, ++ .data = &vendor_ftdmac020, ++ }, ++ { 0, 0 }, ++}; ++ ++MODULE_DEVICE_TABLE(amba, pl08x_ids); ++ ++static struct amba_driver pl08x_amba_driver = { ++ .drv.name = DRIVER_NAME, ++ .id_table = pl08x_ids, ++ .probe = pl08x_probe, ++}; ++#endif ++static const struct of_device_id vic7110_dma_ids[] = { ++ { .compatible = "starfive,pl080", .data = &vendor_pl080}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, vic7110_dma_ids); ++ ++static struct platform_driver vic7110_pl08x_driver = { ++ .probe = pl08x_probe, ++ .driver = { ++ .name = DRIVER_NAME, ++ .of_match_table = vic7110_dma_ids, ++ }, ++}; ++ ++module_platform_driver(vic7110_pl08x_driver); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Huan Feng "); ++MODULE_DESCRIPTION("Starfive VIC7110 CRYP DMA driver"); +diff --git a/drivers/gpu/drm/i2c/tda998x_pin.c b/drivers/gpu/drm/i2c/tda998x_pin.c +new file mode 100644 +index 000000000000..995efc8e55ed +--- /dev/null ++++ b/drivers/gpu/drm/i2c/tda998x_pin.c +@@ -0,0 +1,47 @@ ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "starfive" ++#define DRIVER_DESC "StarFive Soc DRM" ++#define DRIVER_DATE "20220624" ++#define DRIVER_MAJOR 1 ++#define DRIVER_MINOR 0 ++#define DRIVER_VERSION "v1.0.0" ++ ++static struct drm_driver starfive_drm_driver = { ++ .name = DRIVER_NAME, ++ .desc = DRIVER_DESC, ++ .date = DRIVER_DATE, ++ .major = DRIVER_MAJOR, ++ .minor = DRIVER_MINOR, ++}; ++ ++static int starfive_drm_platform_probe(struct platform_device *pdev) ++{ ++ dev_info(&pdev->dev, "%s, ok\n", __func__); ++ ++ return 0; ++} ++ ++static const struct of_device_id tda998x_rgb_dt_ids[] = { ++ { .compatible = "starfive,tda998x_rgb_pin", }, ++ { /* sentinel */ }, ++}; ++MODULE_DEVICE_TABLE(of, starfive_drm_dt_ids); ++ ++static struct platform_driver starfive_drm_platform_driver = { ++ .probe = starfive_drm_platform_probe, ++ .driver = { ++ .name = "tda998x_rgb_dt_ids", ++ .of_match_table = tda998x_rgb_dt_ids, ++ }, ++}; ++ ++module_platform_driver(starfive_drm_platform_driver); ++ ++MODULE_AUTHOR("David Li "); ++MODULE_DESCRIPTION("starfive DRM Driver"); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c +new file mode 100755 +index 000000000000..0b7341cecc45 +--- /dev/null ++++ b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c +@@ -0,0 +1,704 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (c) 2019 Radxa Limited ++ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. ++ * ++ * Author: ++ * - Jagan Teki ++ * - Stephen Chen ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include