From b034ca61f7756e9bc09cfe67ed7fd8afc8d3d9d0 Mon Sep 17 00:00:00 2001 From: sunyuechi Date: Thu, 14 Aug 2025 13:27:10 +0800 Subject: [PATCH 1/2] Fix: Illegal instruction in H.264 decoder on RISC-V V extension Signed-off-by: sunyuechi --- backport-fix-h264idct-rvv.patch | 81 +++++++++++++++++++++++++++++++++ ffmpeg.spec | 8 +++- 2 files changed, 88 insertions(+), 1 deletion(-) create mode 100644 backport-fix-h264idct-rvv.patch diff --git a/backport-fix-h264idct-rvv.patch b/backport-fix-h264idct-rvv.patch new file mode 100644 index 0000000..c6ed38f --- /dev/null +++ b/backport-fix-h264idct-rvv.patch @@ -0,0 +1,81 @@ +From 20cbd13a11c1b4262545006c7541c0380ba1936d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?R=C3=A9mi=20Denis-Courmont?= +Date: Sat, 16 Nov 2024 08:58:35 +0200 +Subject: [PATCH] lavc/h264dsp: remove RISC-V table alignment + +These values are bytes and need not be aligned. + +lavc/h264idct: fix RISC-V group multiplier + +After the branch, the expected SEW/LMUL ratio is 1 byte/vector. +So we have to set the same ratio before branching (QEMU does not care, +but real hardware does). + +lavc/h264idct: fix compilation for RV32IMA +--- + libavcodec/riscv/h264idct_rvv.S | 12 +++++++----- + 1 file changed, 7 insertions(+), 5 deletions(-) + +diff --git a/libavcodec/riscv/h264idct_rvv.S b/libavcodec/riscv/h264idct_rvv.S +index d2f77a5b47..2a40e87d62 100644 +--- a/libavcodec/riscv/h264idct_rvv.S ++++ b/libavcodec/riscv/h264idct_rvv.S +@@ -542,7 +542,7 @@ func ff_h264_idct8_dc_add_\depth\()_rvv, zve64x + endfunc + .endr + +-const ff_h264_scan8 ++const ff_h264_scan8, align=0 + .byte 014, 015, 024, 025, 016, 017, 026, 027 + .byte 034, 035, 044, 045, 036, 037, 046, 047 + .byte 064, 065, 074, 075, 066, 067, 076, 077 +@@ -629,6 +629,7 @@ endfunc + .endm + + .macro idct4_add8 type, depth ++#if (__riscv_xlen == 64) + func ff_h264_idct4_add\type\()_\depth\()_rvv, zve32x + .if \depth == 8 + lpad 0 +@@ -644,7 +645,7 @@ func ff_h264_idct4_add\type\()_\depth\()_rvv, zve32x + sd a4, 24(sp) + ld a0, 0(a0) # dest[0] + addi a1, a1, 16 * 4 # &block_offset[16] +- vsetivli zero, 4, e8, mf4, ta, ma ++ vsetivli zero, 4, e8, m1, ta, ma + jal .Lidct4_add4_\depth\()_rvv + + ld a4, 24(sp) # nnzc +@@ -655,7 +656,7 @@ func ff_h264_idct4_add\type\()_\depth\()_rvv, zve32x + ld a0, 8(a0) # dest[1] + lla t0, ff_h264_scan8 + 32 + .ifc \type, 8_422 +- vsetivli zero, 4, e8, mf4, ta, ma ++ vsetivli zero, 4, e8, m1, ta, ma + jal .Lidct4_add4_\depth\()_rvv + + ld a4, 24(sp) # nnzc +@@ -665,7 +666,7 @@ func ff_h264_idct4_add\type\()_\depth\()_rvv, zve32x + addi a1, t5, (-8 - 4) * 4 # &block_offset[24] + ld a0, 0(a0) # dest[0] + lla t0, ff_h264_scan8 + 24 +- vsetivli zero, 4, e8, mf4, ta, ma ++ vsetivli zero, 4, e8, m1, ta, ma + jal .Lidct4_add4_\depth\()_rvv + + ld a4, 24(sp) # nnzc +@@ -679,9 +680,10 @@ func ff_h264_idct4_add\type\()_\depth\()_rvv, zve32x + ld ra, 8(sp) + ld s0, 0(sp) + addi sp, sp, 32 +- vsetivli zero, 4, e8, mf4, ta, ma ++ vsetivli zero, 4, e8, m1, ta, ma + j .Lidct4_add4_\depth\()_rvv + endfunc ++#endif + .endm + + .irp depth, 8, 16 +-- +2.50.1 + diff --git a/ffmpeg.spec b/ffmpeg.spec index abefd75..7521257 100644 --- a/ffmpeg.spec +++ b/ffmpeg.spec @@ -73,7 +73,7 @@ Summary: Digital VCR and streaming server Name: ffmpeg%{?flavor} Version: 7.1 -Release: 9 +Release: 10 License: GPL-3.0-or-later URL: https://ffmpeg.org/ Source0: https://ffmpeg.org/releases/ffmpeg-%{version}.tar.xz @@ -88,6 +88,9 @@ Patch9: CVE-2025-1816.patch Patch10: CVE-2025-25473.patch Patch11: CVE-2024-55069.patch Patch12: fix-CVE-2025-22919.patch +# https://github.com/FFmpeg/FFmpeg/commit/690c015758dcbf08dd53b95981a65ccb9687dfa4 +# https://github.com/FFmpeg/FFmpeg/commit/bbb0fdedb78c289f1d3ce3fccb000f031ccfa748 +Patch13: backport-fix-h264idct-rvv.patch Requires: %{name}-libs%{?_isa} = %{version}-%{release} %{?_with_cuda:BuildRequires: cuda-minimal-build-%{_cuda_version_rpm} cuda-drivers-devel} @@ -411,6 +414,9 @@ install -pm755 tools/qt-faststart %{buildroot}%{_bindir} %{_libdir}/lib*.so %changelog +* Thu Aug 14 2025 yoo - 7.1-10 +- Fix: Illegal instruction in H.264 decoder on RISC-V V extension + * Tue Jul 15 2025 happyworker <208suo@208suo.com> - 7.1-9 - fix-CVE-2025-22919 -- Gitee From 0c16e6358b96e020132bacde86f741975b90fa9b Mon Sep 17 00:00:00 2001 From: sunyuechi Date: Sun, 17 Aug 2025 18:20:33 +0800 Subject: [PATCH 2/2] Fix: RISC-V compilation without Vector support Signed-off-by: sunyuechi --- ...x-compilation-without-Vector-support.patch | 33 +++++++++++++++++++ ffmpeg.spec | 7 +++- 2 files changed, 39 insertions(+), 1 deletion(-) create mode 100644 backport-riscv-fix-compilation-without-Vector-support.patch diff --git a/backport-riscv-fix-compilation-without-Vector-support.patch b/backport-riscv-fix-compilation-without-Vector-support.patch new file mode 100644 index 0000000..5dd4fb8 --- /dev/null +++ b/backport-riscv-fix-compilation-without-Vector-support.patch @@ -0,0 +1,33 @@ +From e29432e6bbb6184d3ff2c7d1e070e9424cb25fe6 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?R=C3=A9mi=20Denis-Courmont?= +Date: Sun, 17 Nov 2024 11:15:01 +0200 +Subject: [PATCH] lavu/riscv: fix compilation without Vector support + +The half-baked assembler in Clang 16 and earlier can't process our +RISC-V assembler. This adds yet another work around that. + +If you must use Clang, please use version 17 or later. +--- + libavutil/riscv/cpu.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/libavutil/riscv/cpu.h b/libavutil/riscv/cpu.h +index 191e4478c5..f2e6b7b430 100644 +--- a/libavutil/riscv/cpu.h ++++ b/libavutil/riscv/cpu.h +@@ -56,7 +56,6 @@ static inline size_t ff_get_rv_vlenb(void) + ".option pop\n" : "=r" (vlenb)); + return vlenb; + } +-#endif + + /** + * Checks that the vector bit-size is at least the given value. +@@ -78,3 +77,4 @@ static inline bool ff_rv_vlen_least(unsigned int bits) + return bits <= (8 * ff_get_rv_vlenb()); + } + #endif ++#endif /* HAVE_RVV */ +-- +2.50.1 + diff --git a/ffmpeg.spec b/ffmpeg.spec index 7521257..ce0588b 100644 --- a/ffmpeg.spec +++ b/ffmpeg.spec @@ -73,7 +73,7 @@ Summary: Digital VCR and streaming server Name: ffmpeg%{?flavor} Version: 7.1 -Release: 10 +Release: 11 License: GPL-3.0-or-later URL: https://ffmpeg.org/ Source0: https://ffmpeg.org/releases/ffmpeg-%{version}.tar.xz @@ -91,6 +91,8 @@ Patch12: fix-CVE-2025-22919.patch # https://github.com/FFmpeg/FFmpeg/commit/690c015758dcbf08dd53b95981a65ccb9687dfa4 # https://github.com/FFmpeg/FFmpeg/commit/bbb0fdedb78c289f1d3ce3fccb000f031ccfa748 Patch13: backport-fix-h264idct-rvv.patch +# https://github.com/FFmpeg/FFmpeg/commit/e29432e6bbb6184d3ff2c7d1e070e9424cb25fe6 +Patch14: backport-riscv-fix-compilation-without-Vector-support.patch Requires: %{name}-libs%{?_isa} = %{version}-%{release} %{?_with_cuda:BuildRequires: cuda-minimal-build-%{_cuda_version_rpm} cuda-drivers-devel} @@ -414,6 +416,9 @@ install -pm755 tools/qt-faststart %{buildroot}%{_bindir} %{_libdir}/lib*.so %changelog +* Sun Aug 17 2025 yoo - 7.1-11 +- Fix: RISC-V compilation without Vector support + * Thu Aug 14 2025 yoo - 7.1-10 - Fix: Illegal instruction in H.264 decoder on RISC-V V extension -- Gitee