# kianRiscV

**Repository Path**: weimingtom2000/kianRiscV

## Basic Information

- **Project Name**: kianRiscV
- **Description**: Imported from https://github.com/splinedrive/kianRiscV
- **Primary Language**: Unknown
- **License**: ISC
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 0
- **Created**: 2024-11-28
- **Last Updated**: 2024-11-28

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

<img src="zendots_blue_red.png" alt="Kianv logo"/>

You'll own nothing and be happy!
================================
I am a professional embedded systems engineer. I started in 2021 with logic
design, motivated to learn. My goal was to implement a RISC-V Linux SoC because I love
Linux. Now, that goal has come true. In the future, I aim to work on advanced
designs and improvements, step by step.

RISC-V ASIC/FPGA uLinux/MMU Linux/XV6 SoCs:
===========================================
If you're interested in trying out the KianV SV32 (MMU) RV32IMA Zicntr SSTC Linux/XV6 SoC, complete with virtual memory support, check out the link here:
[KianV SV32 RV32IMA Zicntr](https://github.com/splinedrive/kianRiscV/tree/master/linux_socs/kianv_mc_rv32ima_sv32).

Checkout my KianV RISC-V uLinux SoC!
[FPGA implementation details here](https://github.com/splinedrive/kianRiscV/blob/master/linux_socs/kianv_harris_mcycle_edition/README.md).
I have made a uLinux ASIC with TinyTapeout.
[Check my designs here](https://github.com/splinedrive/kianRiscV/tree/master/asic).

<img src="ulinux_asic_tt05.jpg" alt="Kianv uLinux ASIC Soc TT05"/>

```
 __  __ __               ___ ___ _____   __
|  |/  |__|.---.-.-----.|   |   |     |_|__|.-----.--.--.--.--.
|     <|  ||  _  |     ||   |   |       |  ||     |  |  |_   _|
|__|\__|__||___._|__|__| \_____/|_______|__||__|__|_____|__.__|
```