• 1
• 0
• 18

lcy/FT2232HL-SMT3 forked from 浮栅雪崩注入MOS/FT2232HL-SMT3

Xilinx的调试器

• 1
• 0
• 1

lcy/PYNQ_CNN_Accelerator_Tutorial forked from zero/PYNQ_CNN_Accelerator_Tutorial

中文：

• 1
• 0
• 0

lcy/openwifi

open-source IEEE802.11/Wi-Fi baseband chip/FPGA design

• 1
• 1
• 1

lcy/openwifi-hw

FPGA/hardware design of openwifi

• 1
• 0
• 0

lcy/riffa

Full duplex version of https://github.com/KastnerRG/riffa/issues/30

• 1
• 1
• 2

lcy/aws-fpga

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

• 1
• 0
• 0

lcy/PYNQ

Python Productivity for ZYNQ

• 1
• 1
• 1

lcy/PYNQ-Classification

Python on Zynq FPGA for Convolutional Neural Networks

• 1
• 0
• 0

lcy/openmv-ide

QtCreator based OpenMV IDE

• 1
• 0
• 0

lcy/BNN-PYNQ

• 1
• 0
• 0

lcy/zedboard-axi-dma

Demonstration of the AXI DMA engine on the ZedBoard

• 1
• 0
• 0

lcy/remote_sensor

a remote_sensor hub

• 1
• 0
• 0

lcy/micropython-rocky

micropython and OpenMV port to NXP MCUs

• 1
• 0
• 2

lcy/fpga-network-stack

TCP/IP Network Stack for FPGAs

• 1
• 1
• 0

lcy/rtl-ais

A simple AIS tuner and generic dual-frequency FM demodulator

• 1
• 0
• 0

lcy/dump1090

Dump1090 is a simple Mode S decoder for RTLSDR devices

• 1
• 1
• 0

lcy/ADI_hdl

a copy of ADI_hdl

• 1
• 0
• 0

lcy/ubertooth

Software, firmware and hardware designs for Ubertooth

• 1
• 0
• 0

lcy/cores

Various HDL (Verilog) IP Cores

• 1
• 3
• 1

lcy/verilog-ethernet

Verilog Ethernet components for FPGA implementation